[U-Boot] [PATCH V3 09/11] ARM/PPC: add a common way to access registers

[U-Boot] [PATCH V3 09/11] ARM/PPC: add a common way to access registers

[Stefano Babic]

Some Freescale's processors of different architecture
have the same peripheral (eSDHC controller in PowerPC
and i.MX51). This patch adds neutral functions to access
to the internal registers of the SOCs that can be used
by both architectures.

Signed-off-by: Stefano Babic <sbabic@denx.de>
---
 include/asm-arm/io.h |   39 +++++++++++++++++++++++++++++++++++++++
 include/asm-ppc/io.h |   21 +++++++++++++++++++++
 2 files changed, 60 insertions(+), 0 deletions(-)

diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index fec3a7e..d7d6f41 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -112,6 +112,45 @@ extern void __raw_readsl(unsigned int addr, void *data, int longlen);
 #define __raw_base_readw(base,off)	__arch_base_getw(base,off)
 #define __raw_base_readl(base,off)	__arch_base_getl(base,off)
 
+/* Clear and set bits in one shot. These macros can be used to clear and
+ * set multiple bits in a register using a single call. These macros can
+ * also be used to set a multiple-bit bit pattern using a mask, by
+ * specifying the mask in the 'clear' parameter and the new bit pattern
+ * in the 'set' parameter.
+ */
+
+#define clrbits(type, addr, clear) \
+	write##type(__raw_read##type(addr) & ~(clear), (addr))
+
+#define setbits(type, addr, set) \
+	write##type(__raw_read##type(addr) | (set), (addr))
+
+#define clrsetbits(type, addr, clear, set) \
+	write##type((__raw_read##type(addr) & ~(clear)) | (set), (addr))
+
+#define write_reg(type,a,v)	write##type(v,a)
+#define read_reg(type,a)	__raw_read##type(a)
+
+#define write_reg32(a,v)	write_reg(l,a,v)
+#define write_reg16(a,v)	write_reg(w,a,v)
+#define write_reg8(a,v)		write_reg(b,a,v)
+
+#define read_reg32(a)		read_reg(l,a)
+#define read_reg16(a)		read_reg(w,a)
+#define read_reg8(a)		read_reg(b,a)
+
+#define clrbits_reg32(addr, clear) clrbits(l, addr, clear)
+#define setbits_reg32(addr, set) setbits(l, addr, set)
+#define clrsetbits_reg32(addr, clear, set) clrsetbits(l, addr, clear, set)
+
+#define clrbits_reg16(addr, clear) clrbits(w, addr, clear)
+#define setbits_reg16(addr, set) setbits(w, addr, set)
+#define clrsetbits_reg16(addr, clear, set) clrsetbits(w, addr, clear, set)
+
+#define clrbits_reg8(addr, clear) clrbits(b, addr, clear)
+#define setbits_reg8(addr, set) setbits(b, addr, set)
+#define clrsetbits_reg8(addr, clear, set) clrsetbits(b, addr, clear, set)
+
 /*
  * Now, pick up the machine-defined IO definitions
  */
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index 4ddad26..d8f7cd7 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -242,6 +242,15 @@ extern inline void out_be32(volatile unsigned __iomem *addr, int val)
 	__asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
 }
 
+/* Define cross-platform function to access to registers */
+
+#define write_reg32(a,v)	out_be32(a,v)
+#define write_reg16(a,v)	out_be16(a,v)
+#define write_reg8(a,v)		out_be8(a,v)
+#define read_reg32(a)		in_be32(a)
+#define read_reg16(a)		in_be16(a)
+#define read_reg8(a)		in_be8(a)
+
 /* Clear and set bits in one shot. These macros can be used to clear and
  * set multiple bits in a register using a single call. These macros can
  * also be used to set a multiple-bit bit pattern using a mask, by
@@ -278,6 +287,18 @@ extern inline void out_be32(volatile unsigned __iomem *addr, int val)
 #define setbits_8(addr, set) setbits(8, addr, set)
 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
 
+#define clrbits_reg32(addr, clear) clrbits(be32, addr, clear)
+#define setbits_reg32(addr, set) setbits(be32, addr, set)
+#define clrsetbits_reg32(addr, clear, set) clrsetbits(be32, addr, clear, set)
+
+#define clrbits_reg16(addr, clear) clrbits(be16, addr, clear)
+#define setbits_reg16(addr, set) setbits(be16, addr, set)
+#define clrsetbits_reg16(addr, clear, set) clrsetbits(be16, addr, clear, set)
+
+#define clrbits_reg8(addr, clear) clrbits(be8, addr, clear)
+#define setbits_reg8(addr, set) setbits(be8, addr, set)
+#define clrsetbits_reg8(addr, clear, set) clrsetbits(be8, addr, clear, set)
+
 /*
  * Given a physical address and a length, return a virtual address
  * that can be used to access the memory range with the caching
-- 
1.6.3.3

[U-Boot] [PATCH V3 09/11] ARM/PPC: add a common way to access registers

[Wolfgang Denk]

Dear Stefano Babic,

In message <1264008133-20906-1-git-send-email-sbabic@denx.de> you wrote:
> Some Freescale's processors of different architecture
> have the same peripheral (eSDHC controller in PowerPC
> and i.MX51). This patch adds neutral functions to access
> to the internal registers of the SOCs that can be used
> by both architectures.
> 
> Signed-off-by: Stefano Babic <sbabic@denx.de>
> ---
>  include/asm-arm/io.h |   39 +++++++++++++++++++++++++++++++++++++++
>  include/asm-ppc/io.h |   21 +++++++++++++++++++++
>  2 files changed, 60 insertions(+), 0 deletions(-)

Please document these new macros.  Please be explicit about the
behaviour of these macros on systems with different endianess.

> +/* Clear and set bits in one shot. These macros can be used to clear and
> + * set multiple bits in a register using a single call. These macros can
> + * also be used to set a multiple-bit bit pattern using a mask, by
> + * specifying the mask in the 'clear' parameter and the new bit pattern
> + * in the 'set' parameter.
> + */

Incorrect multi-line comment style.

> +#define clrbits(type, addr, clear) \
> +	write##type(__raw_read##type(addr) & ~(clear), (addr))
> +
> +#define setbits(type, addr, set) \
> +	write##type(__raw_read##type(addr) | (set), (addr))
> +
> +#define clrsetbits(type, addr, clear, set) \
> +	write##type((__raw_read##type(addr) & ~(clear)) | (set), (addr))
> +
> +#define write_reg(type,a,v)	write##type(v,a)
> +#define read_reg(type,a)	__raw_read##type(a)
> +
> +#define write_reg32(a,v)	write_reg(l,a,v)
> +#define write_reg16(a,v)	write_reg(w,a,v)
> +#define write_reg8(a,v)		write_reg(b,a,v)
> +
> +#define read_reg32(a)		read_reg(l,a)
> +#define read_reg16(a)		read_reg(w,a)
> +#define read_reg8(a)		read_reg(b,a)

What exactly is the definition of a "register" here? Is this memory
mapped I/O?

and - should we really invent our own, private way of doing this?
Should we not rather reuse definitions already present in Linux?

How about using ioread*()/iowrite*() instead?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
The Gates in my computer are AND, OR and NOT; they are not Bill.

[U-Boot] [PATCH V3 09/11] ARM/PPC: add a common way to access registers

[Stefano Babic]

Wolfgang Denk wrote:

 >> +/* Clear and set bits in one shot. These macros can be used to
clear and
>> + * set multiple bits in a register using a single call. These macros can
>> + * also be used to set a multiple-bit bit pattern using a mask, by
>> + * specifying the mask in the 'clear' parameter and the new bit pattern
>> + * in the 'set' parameter.
>> + */
> 
> Incorrect multi-line comment style.

Sorry, you have already found this point. I forgot to change it.

> What exactly is the definition of a "register" here? Is this memory
> mapped I/O?

Yes, they are.

> 
> and - should we really invent our own, private way of doing this?
> Should we not rather reuse definitions already present in Linux?
> 
> How about using ioread*()/iowrite*() instead?

You are right. I will replace them.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

[U-Boot] [PATCH V4 09/11] ARM: add accessors functions

[Stefano Babic]

Some Freescale's processors of different architecture
have the same peripheral (eSDHC controller in PowerPC
and i.MX51). This patch adds accessors for
the internal registers of the SOCs, as already
implemented in the PowerPC architecture.

Signed-off-by: Stefano Babic <sbabic@denx.de>
---
 include/asm-arm/io.h |   55 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 55 insertions(+), 0 deletions(-)

diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index fec3a7e..0a4b5be 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -113,6 +113,61 @@ extern void __raw_readsl(unsigned int addr, void *data, int longlen);
 #define __raw_base_readl(base,off)	__arch_base_getl(base,off)
 
 /*
+ * Clear and set bits in one shot. These macros can be used to clear and
+ * set multiple bits in a register using a single call. These macros can
+ * also be used to set a multiple-bit bit pattern using a mask, by
+ * specifying the mask in the 'clear' parameter and the new bit pattern
+ * in the 'set' parameter.
+ */
+
+#define out_arch(type,endian,a,v)	__raw_write##type(cpu_to_##endian(v),a)
+#define in_arch(type,endian,a)		endian##_to_cpu(__raw_read##type(a))
+
+#define out_le32(a,v)	out_arch(l,le32,a,v)
+#define out_le16(a,v)	out_arch(w,le16,a,v)
+
+#define in_le32(a)	in_arch(l,le32,a)
+#define in_le16(a)	in_arch(w,le16,a)
+
+#define out_be32(a,v)	out_arch(l,be32,a,v)
+#define out_be16(a,v)	out_arch(w,be16,a,v)
+
+#define in_be32(a)	in_arch(l,be32,a)
+#define in_be16(a)	in_arch(w,be16,a)
+
+#define out_8(a,v)	__raw_writeb(v,a)
+#define in_8(a)		__raw_readb(a)
+
+#define clrbits(type, addr, clear) \
+	out_##type((addr), in_##type(addr) & ~(clear))
+
+#define setbits(type, addr, set) \
+	out_##type((addr), in_##type(addr) | (set))
+
+#define clrsetbits(type, addr, clear, set) \
+	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
+
+#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
+#define setbits_be32(addr, set) setbits(be32, addr, set)
+#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
+
+#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
+#define setbits_le32(addr, set) setbits(le32, addr, set)
+#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
+
+#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
+#define setbits_be16(addr, set) setbits(be16, addr, set)
+#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
+
+#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
+#define setbits_le16(addr, set) setbits(le16, addr, set)
+#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
+
+#define clrbits_8(addr, clear) clrbits(8, addr, clear)
+#define setbits_8(addr, set) setbits(8, addr, set)
+#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
+
+/*
  * Now, pick up the machine-defined IO definitions
  */
 #if 0	/* XXX###XXX */
-- 
1.6.3.3