[U-Boot] Booting from NAND on MX51

* [U-Boot] Booting from NAND on MX51
@ 2010-02-10 11:08 Andreas Orfanos
  2010-02-10 11:43 ` Stefano Babic
  0 siblings, 1 reply; 12+ messages in thread
From: Andreas Orfanos @ 2010-02-10 11:08 UTC (permalink / raw)
  To: u-boot

Hi,

I am using mx51 3stack Freescale dev board, and I would like to make it
boot u-boot from NAND.
Does anyone have any local changes that enable that feature?

The u-boot works when is downloaded into RAM from Jtag, but can't get it
boot from NAND when I write it there. 
Do I have to develop nand_spl, early stage0 loader?

I have also tried to change the following setting on the standard
mx51_3stack config but still cannot get it boot from NAND.

#undef  CONFIG_SKIP_RELOCATE_UBOOT  
#define CONFIG_SYS_NAND_BOOT   1

Does anyone have u-boot booting from NAND on mx51? Any repository, or a
patch that might be available? 

Regards,
Andreas 

------------------------------------------------------------------------
-

/*
 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
 *
 * (C) Copyright 2009 Freescale Semiconductor, Inc.
 *
 * Configuration settings for the MX51-3Stack Freescale board.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/arch/mx51.h>

 /* High Level Configuration Options */
#define CONFIG_ARMV7		1	/* This is armv7 Cortex-A8 CPU
core */
#define CONFIG_SYS_APCS_GNU
#define CONFIG_L2_OFF

#define CONFIG_MXC		1
#define CONFIG_MX51_3DS		1	/* in a mx51 */
#define CONFIG_FLASH_HEADER	1
#define CONFIG_FLASH_HEADER_OFFSET 0x400
#define CONFIG_FLASH_HEADER_BARKER 0xB1

#undef  CONFIG_SKIP_RELOCATE_UBOOT  
#define CONFIG_SYS_NAND_BOOT   1

#define CONFIG_MX51_HCLK_FREQ	24000000	/* RedBoot says 26MHz */

#define CONFIG_ARCH_CPU_INIT
#define CONFIG_ARCH_MMU

#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

#define BOARD_LATE_INIT
/*
 * Disabled for now due to build problems under Debian and a significant
 * increase in the final file size: 144260 vs. 109536 Bytes.
 */

#define CONFIG_CMDLINE_TAG		1	/* enable passing of
ATAGs */
#define CONFIG_REVISION_TAG		1
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_INITRD_TAG		1

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 *
1024)
/* size in bytes reserved for initial data */
#define CONFIG_SYS_GBL_DATA_SIZE	128

/*
 * Hardware drivers
 */
#define CONFIG_MX51_UART	1
#define CONFIG_MX51_UART1	1

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	1
#define CONFIG_BAUDRATE		115200
#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600,
115200}

/***********************************************************
 * Command definition
 ***********************************************************/

#include <config_cmd_default.h>

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
/* Enable below configure when supporting nand */
#define CONFIG_CMD_NAND
#define CONFIG_MXC_NAND
#define CONFIG_CMD_ENV
#define CMD_SAVEENV
#undef CONFIG_CMD_IMLS
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_NET_RETRY_COUNT	100
#define CONFIG_NET_MULTI
#define CONFIG_CMD_MMC

/*
 * MMC Configs
 */
#ifdef CONFIG_CMD_MMC
	#define CONFIG_MMC				1
	#define CONFIG_GENERIC_MMC
	#define CONFIG_IMX_MMC
	#define CONFIG_DOS_PARTITION	1
	#define CONFIG_CMD_FAT		1
#endif

/*
 * I2C Configs
 */
#define CONFIG_CMD_I2C          1
#define CONFIG_HARD_I2C         1
#define CONFIG_I2C_MXC          1
#define CONFIG_SYS_I2C_PORT             I2C2_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED            400000
#define CONFIG_SYS_I2C_SLAVE            0xfe

#define CONFIG_BOOTDELAY	3

#define CONFIG_LOADADDR		0x90800000	/* loadaddr env var */

#define	CONFIG_EXTRA_ENV_SETTINGS
\
		"netdev=eth0\0"
\
		"ethprime=smc911x\0"
\
		"uboot_addr=0xa0000000\0"
\
		"uboot=u-boot.bin\0"			\
		"kernel=uImage\0"				\
		"nfsroot=/opt/eldk/arm\0"
\
		"bootargs_base=setenv bootargs
console=ttymxc0,115200\0"\
		"bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs
"\
			"ip=dhcp
nfsroot=${serverip}:${nfsroot},v3,tcp\0"\
		"bootcmd=run bootcmd_net\0"
\
		"bootcmd_net=run bootargs_base bootargs_nfs; "
\
			"tftpboot ${loadaddr} ${kernel}; bootm\0"
\
		"prg_uboot=tftpboot ${loadaddr} ${uboot}; "
\
			"protect off ${uboot_addr} 0xa003ffff; "
\
			"erase ${uboot_addr} 0xa003ffff; "
\
			"cp.b ${loadaddr} ${uboot_addr} ${filesize}; "
\
			"setenv filesize; saveenv\0"

/*Support LAN9217*/
#define CONFIG_SMC911X	1
#define CONFIG_SMC911X_16_BIT 1
#define CONFIG_SMC911X_BASE mx51_io_base_addr

/*
 * The MX51 3stack board seems to have a hardware "peculiarity"
confirmed under
 * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the
CS8900A
 * controller inverted. The controller is capable of detecting and
correcting
 * this, but it needs 4 network packets for that. Which means, at
startup, you
 * will not receive answers to the first 4 packest, unless there have
been some
 * broadcasts on the network, or your board is on a hub. Reducing the
ARP
 * timeout from default 5 seconds to 200ms we speed up the initial TFTP
 * transfer, should the user wish one, significantly.
 */
#define CONFIG_ARP_TIMEOUT	200UL

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP		/* undef to save memory */
#define CONFIG_SYS_PROMPT		"MX51 U-Boot > "
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer
Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT)
+ 16)
#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer
Size */

#define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x10000

#undef	CONFIG_SYS_CLKS_IN_HZ		/* everything, incl board info,
in Hz */

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

#define CONFIG_SYS_HZ				1000

#define CONFIG_CMDLINE_EDITING	1

/*----------------------------------------------------------------------
-
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128 * 1024)	/* regular stack */

/*----------------------------------------------------------------------
-
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1
#define PHYS_SDRAM_1		CSD0_BASE_ADDR
/* TO1 boards */
/* #define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024) */
#define PHYS_SDRAM_1_SIZE	(512 * 1024 * 1024)

/*----------------------------------------------------------------------
-
 * FLASH and environment organization
 */
#define CONFIG_SYS_NO_FLASH

/*----------------------------------------------------------------------
-
 * NAND FLASH driver setup
 */
#define NAND_MAX_CHIPS         8
#define CONFIG_SYS_MAX_NAND_DEVICE    1
#define CONFIG_SYS_NAND_BASE          0x40000000
#define CONFIG_NAND_FW_16BIT	0 /* 1: 16bit 0: 8bit */

/* Monitor at beginning of flash */
#define CONFIG_FSL_ENV_IN_NAND
/* #define CONFIG_FSL_ENV_IN_NAND */

#define CONFIG_ENV_SECT_SIZE    (128 * 1024)
#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
#if defined(CONFIG_FSL_ENV_IN_NAND)
	#define CONFIG_ENV_IS_IN_NAND 1
	#define CONFIG_ENV_OFFSET	0x100000
#elif defined(CONFIG_FSL_ENV_IN_MMC)
	#define CONFIG_ENV_IS_IN_MMC	1
	#define CONFIG_ENV_OFFSET	(768 * 1024)
#else
	#define CONFIG_ENV_IS_NOWHERE	1
#endif
/*
 * JFFS2 partitions
 */
#undef CONFIG_JFFS2_CMDLINE
#define CONFIG_JFFS2_DEV	"nand0"

#endif				/* __CONFIG_H */  

^ permalink raw reply	[flat|nested] 12+ messages in thread