[U-Boot] various at91 patches to make some boards compilable again

[U-Boot] various at91 patches to make some boards compilable again

[Alexander Stein]

This patch series changes some at91 boards to SoC access and adds some defines
to make the boards compilable again.
Please note: All changes are untested!

Best regards,
Alexander

[U-Boot] [PATCH 01/11] at91sam9260: Replace PHYS_SDRAM with CONFIG_SYS_SDRAM_BASE

[Alexander Stein]

Same for PHYS_SDRAM_SIZE and CONFIG_SYS_SDRAM_SIZE and use SZ_* macros

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
---
 board/atmel/at91sam9260ek/at91sam9260ek.c |    6 +++---
 include/configs/at91sam9260ek.h           |   17 ++++++++++++-----
 2 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c
index 64c6d17..063ddbf 100644
--- a/board/atmel/at91sam9260ek/at91sam9260ek.c
+++ b/board/atmel/at91sam9260ek/at91sam9260ek.c
@@ -153,7 +153,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9260EK;
 #endif
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
 	at91_serial_hw_init();
 #ifdef CONFIG_CMD_NAND
@@ -171,8 +171,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = CONFIG_SYS_SDRAM_SIZE;
 	return 0;
 }
 
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index 5e7dee5..8aee5a6 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -27,6 +27,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <asm/sizes.h>
+
 #define CONFIG_AT91_LEGACY
 
 /* ARM asynchronous clock */
@@ -40,6 +42,7 @@
 #else
 #define CONFIG_AT91SAM9260	1	/* It's an Atmel AT91SAM9260 SoC*/
 #endif
+#define CONFIG_AT91FAMILY
 
 #define CONFIG_ARCH_CPU_INIT
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
@@ -93,8 +96,8 @@
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM			0x20000000
-#define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
+#define CONFIG_SYS_SDRAM_BASE		0x20000000
+#define CONFIG_SYS_SDRAM_SIZE		SZ_64M
 
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
@@ -150,7 +153,7 @@
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END			0x23e00000
 
 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
@@ -211,9 +214,13 @@
 /*
  * Size of malloc() pool
  */
-#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
+#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + SZ_128K, 0x1000)
+/* size in bytes reserved for initial data */
+
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_4K \
+					- GENERATED_GBL_DATA_SIZE)
 
-#define CONFIG_STACKSIZE	(32*1024)	/* regular stack */
+#define CONFIG_STACKSIZE	(SZ_32K)	/* regular stack */
 
 #ifdef CONFIG_USE_IRQ
 #error CONFIG_USE_IRQ not supported
-- 
1.7.2.2

[U-Boot] [PATCH 02/11] at91: Add USART & DBGU base address defines

[Alexander Stein]

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
---
 arch/arm/include/asm/arch-at91/at91cap9.h    |   12 ++++++++----
 arch/arm/include/asm/arch-at91/at91sam9260.h |    7 +++++++
 arch/arm/include/asm/arch-at91/at91sam9261.h |    4 ++++
 arch/arm/include/asm/arch-at91/at91sam9263.h |    3 +++
 arch/arm/include/asm/arch-at91/at91sam9g45.h |    5 +++++
 arch/arm/include/asm/arch-at91/at91sam9rl.h  |    4 ++++
 6 files changed, 31 insertions(+), 4 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91cap9.h b/arch/arm/include/asm/arch-at91/at91cap9.h
index 5af6fdc..f109c66 100644
--- a/arch/arm/include/asm/arch-at91/at91cap9.h
+++ b/arch/arm/include/asm/arch-at91/at91cap9.h
@@ -53,10 +53,14 @@
 #define AT91CAP9_ID_IRQ0	30	/* Advanced Interrupt Controller (IRQ0) */
 #define AT91CAP9_ID_IRQ1	31	/* Advanced Interrupt Controller (IRQ1) */
 
-#define AT91_PIO_BASE	0xfffff200
-#define AT91_PMC_BASE	0xfffffc00
-#define AT91_RSTC_BASE	0xfffffd00
-#define AT91_PIT_BASE	0xfffffd30
+#define AT91_USART0_BASE	0xfff8c000
+#define AT91_USART1_BASE	0xfff90000
+#define AT91_USART2_BASE	0xfff94000
+#define AT91_DBGU_BASE		0xffffee00
+#define AT91_PIO_BASE		0xfffff200
+#define AT91_PMC_BASE		0xfffffc00
+#define AT91_RSTC_BASE		0xfffffd00
+#define AT91_PIT_BASE		0xfffffd30
 
 #ifdef CONFIG_AT91_LEGACY
 
diff --git a/arch/arm/include/asm/arch-at91/at91sam9260.h b/arch/arm/include/asm/arch-at91/at91sam9260.h
index cb34a94..4b1b09f 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9260.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9260.h
@@ -49,10 +49,17 @@
 #define AT91SAM9260_ID_IRQ1	30	/* Advanced Interrupt Controller (IRQ1) */
 #define AT91SAM9260_ID_IRQ2	31	/* Advanced Interrupt Controller (IRQ2) */
 
+#define AT91_USART0_BASE	0xfffb0000
+#define AT91_USART1_BASE	0xfffb4000
+#define AT91_USART2_BASE	0xfffb8000
 #define AT91_EMAC_BASE		0xfffc4000
+#define AT91_USART3_BASE	0xfffd0000
+#define AT91_USART4_BASE	0xfffd4000
+#define AT91_USART5_BASE	0xfffd8000
 #define AT91_SDRAMC_BASE	0xffffea00
 #define AT91_SMC_BASE		0xffffec00
 #define AT91_MATRIX_BASE	0xffffee00
+#define AT91_DBGU_BASE		0xfffff200
 #define AT91_PIO_BASE		0xfffff400
 #define AT91_PMC_BASE		0xfffffc00
 #define AT91_RSTC_BASE		0xfffffd00
diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h b/arch/arm/include/asm/arch-at91/at91sam9261.h
index 7ca0283..49be91f 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9261.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9261.h
@@ -43,9 +43,13 @@
 #define AT91SAM9261_ID_IRQ1	30	/* Advanced Interrupt Controller (IRQ1) */
 #define AT91SAM9261_ID_IRQ2	31	/* Advanced Interrupt Controller (IRQ2) */
 
+#define AT91_USART0_BASE	0xfffb0000
+#define AT91_USART1_BASE	0xfffb4000
+#define AT91_USART2_BASE	0xfffb8000
 #define AT91_SDRAMC_BASE	0xffffea00
 #define AT91_SMC_BASE		0xffffec00
 #define AT91_MATRIX_BASE	0xffffee00
+#define AT91_DBGU_BASE		0xfffff200
 #define AT91_PIO_BASE		0xfffff400
 #define AT91_PMC_BASE		0xfffffc00
 #define AT91_RSTC_BASE		0xfffffd00
diff --git a/arch/arm/include/asm/arch-at91/at91sam9263.h b/arch/arm/include/asm/arch-at91/at91sam9263.h
index 4ada1ce..cdda301 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9263.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9263.h
@@ -47,6 +47,9 @@
 #define AT91SAM9263_ID_IRQ0	30	/* Advanced Interrupt Controller (IRQ0) */
 #define AT91SAM9263_ID_IRQ1	31	/* Advanced Interrupt Controller (IRQ1) */
 
+#define AT91_US0_BASE		0xfff8c000
+#define AT91_US1_BASE		0xfff90000
+#define AT91_US2_BASE		0xfff94000
 #define AT91_EMAC_BASE		0xfffbc000
 #define AT91_ECC0_BASE		0xffffe000
 #define AT91_SDRAMC0_BASE	0xffffe200
diff --git a/arch/arm/include/asm/arch-at91/at91sam9g45.h b/arch/arm/include/asm/arch-at91/at91sam9g45.h
index 445f4b2..b6767fd 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9g45.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9g45.h
@@ -51,9 +51,14 @@
 #define AT91SAM9G45_ID_VDEC	30	/* Video Decoder */
 #define AT91SAM9G45_ID_IRQ0	31	/* Advanced Interrupt Controller */
 
+#define AT91_USART0_BASE	0xfff8c000
+#define AT91_USART1_BASE	0xfff90000
+#define AT91_USART2_BASE	0xfff94000
+#define AT91_USART3_BASE	0xfff98000
 #define AT91_EMAC_BASE		0xfffbc000
 #define AT91_SMC_BASE		0xffffe800
 #define AT91_MATRIX_BASE	0xffffea00
+#define AT91_DBGU_BASE		0xffffee00
 #define AT91_PIO_BASE		0xfffff200
 #define AT91_PMC_BASE		0xfffffc00
 #define AT91_RSTC_BASE		0xfffffd00
diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl.h b/arch/arm/include/asm/arch-at91/at91sam9rl.h
index 8eb0d4f..ffa6687 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9rl.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9rl.h
@@ -44,6 +44,10 @@
 #define AT91SAM9RL_ID_AC97C	24	/* AC97 Controller */
 #define AT91SAM9RL_ID_IRQ0	31	/* Advanced Interrupt Controller (IRQ0) */
 
+#define AT91_US0_BASE		0xfffb0000
+#define AT91_US1_BASE		0xfffb4000
+#define AT91_US2_BASE		0xfffb8000
+#define AT91_US3_BASE		0xfffbc000
 #define AT91_SDRAMC_BASE	0xffffea00
 #define AT91_SMC_BASE		0xffffec00
 #define AT91_MATRIX_BASE	0xffffee00
-- 
1.7.2.2

[U-Boot] [PATCH 03/11] at91: Use AT91_USART0_BASE instead of AT91_USART0

[Alexander Stein]

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
---
 arch/arm/include/asm/arch-at91/memory-map.h |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/memory-map.h b/arch/arm/include/asm/arch-at91/memory-map.h
index f605f37..dd42bec 100644
--- a/arch/arm/include/asm/arch-at91/memory-map.h
+++ b/arch/arm/include/asm/arch-at91/memory-map.h
@@ -26,10 +26,10 @@
 
 #include <asm/arch/hardware.h>
 
-#define USART0_BASE AT91_USART0
-#define USART1_BASE AT91_USART1
-#define USART2_BASE AT91_USART2
-#define USART3_BASE (AT91_BASE_SYS + AT91_DBGU)
+#define USART0_BASE AT91_USART0_BASE
+#define USART1_BASE AT91_USART1_BASE
+#define USART2_BASE AT91_USART2_BASE
+#define USART3_BASE AT91_DBGU_BASE
 #define SPI0_BASE	AT91_BASE_SPI
 
 #endif /* __ASM_ARM_ARCH_MEMORYMAP_H__ */
-- 
1.7.2.2

[U-Boot] [PATCH 04/11] at91sam9260ek: Convert to SoC

[Alexander Stein]

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
---
 board/atmel/at91sam9260ek/at91sam9260ek.c |   88 +++++++++++++---------------
 board/atmel/at91sam9260ek/led.c           |   12 ++--
 include/configs/at91sam9260ek.h           |   12 ++--
 3 files changed, 53 insertions(+), 59 deletions(-)

diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c
index 063ddbf..8126c4f 100644
--- a/board/atmel/at91sam9260ek/at91sam9260ek.c
+++ b/board/atmel/at91sam9260ek/at91sam9260ek.c
@@ -29,6 +29,7 @@
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
+#include <asm/arch/at91_matrix.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/io.h>
 #include <asm/arch/hardware.h>
@@ -48,48 +49,55 @@ DECLARE_GLOBAL_DATA_PTR;
 static void at91sam9260ek_nand_hw_init(void)
 {
 	unsigned long csa;
+	at91_smc_t	*smc 	= (at91_smc_t *) AT91_SMC_BASE;
+	at91_matrix_t	*matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
 
 	/* Enable CS3 */
-	csa = at91_sys_read(AT91_MATRIX_EBICSA);
-	at91_sys_write(AT91_MATRIX_EBICSA,
-		       csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+	csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A;
+	writel(csa, &matrix->csa);
 
 	/* Configure SMC CS3 for NAND/SmartMedia */
-	at91_sys_write(AT91_SMC_SETUP(3),
-		       AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
-		       AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-	at91_sys_write(AT91_SMC_PULSE(3),
-		       AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
-		       AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-	at91_sys_write(AT91_SMC_CYCLE(3),
-		       AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-	at91_sys_write(AT91_SMC_MODE(3),
-		       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-		       AT91_SMC_EXNWMODE_DISABLE |
+	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+		AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+		&smc->cs[3].setup);
+
+	writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+		AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+		&smc->cs[3].pulse);
+
+	writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+		&smc->cs[3].cycle);
+	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+		AT91_SMC_MODE_EXNW_DISABLE |
 #ifdef CONFIG_SYS_NAND_DBW_16
-		       AT91_SMC_DBW_16 |
+		       AT91_SMC_MODE_DBW_16 |
 #else /* CONFIG_SYS_NAND_DBW_8 */
-		       AT91_SMC_DBW_8 |
+		       AT91_SMC_MODE_DBW_8 |
 #endif
-		       AT91_SMC_TDF_(2));
+		       AT91_SMC_MODE_TDF_CYCLE(2),
+		&smc->cs[3].mode);
 
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
+	writel(1 << AT91SAM9260_ID_PIOC, &pmc->pcer);
 
 	/* Configure RDY/BSY */
-	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+	at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
 	/* Enable NandFlash */
-	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+	at91_set_pio_input(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 }
 #endif
 
 #ifdef CONFIG_MACB
 static void at91sam9260ek_macb_hw_init(void)
 {
-	unsigned long rstc;
+	unsigned long erstl;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pio_t	*pio	= (at91_pio_t *) AT91_PIO_BASE;
+	at91_rstc_t	*rstc	= (at91_rstc_t *) AT91_RSTC_BASE;
 
 	/* Enable clock */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
+	writel(1 << AT91SAM9260_ID_EMAC, &pmc->pcer);
 
 	/*
 	 * Disable pull-up on:
@@ -102,39 +110,25 @@ static void at91sam9260ek_macb_hw_init(void)
 	 *
 	 * PHY has internal pull-down
 	 */
-	writel(pin_to_mask(AT91_PIN_PA14) |
-	       pin_to_mask(AT91_PIN_PA15) |
-	       pin_to_mask(AT91_PIN_PA17) |
-	       pin_to_mask(AT91_PIN_PA25) |
-	       pin_to_mask(AT91_PIN_PA26) |
-	       pin_to_mask(AT91_PIN_PA28),
-	       pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
 
-	rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
+	writel((1 << 17) | (1 << 14) | (1 << 15) | (1 << 25) | (1 << 26) | (1 << 28), &pio->pioa.pudr);
 
-	/* Need to reset PHY -> 500ms reset */
-	at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-				     (AT91_RSTC_ERSTL & (0x0D << 8)) |
-				     AT91_RSTC_URSTEN);
+	erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
 
-	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
+	/* Need to reset PHY -> 500ms reset */
+	writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) |
+		AT91_RSTC_MR_URSTEN, &rstc->mr);
 
+	writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
 	/* Wait for end hardware reset */
-	while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
+	while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
+		;
 
 	/* Restore NRST value */
-	at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-				     (rstc) |
-				     AT91_RSTC_URSTEN);
+	writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
 
 	/* Re-enable pull-up */
-	writel(pin_to_mask(AT91_PIN_PA14) |
-	       pin_to_mask(AT91_PIN_PA15) |
-	       pin_to_mask(AT91_PIN_PA17) |
-	       pin_to_mask(AT91_PIN_PA25) |
-	       pin_to_mask(AT91_PIN_PA26) |
-	       pin_to_mask(AT91_PIN_PA28),
-	       pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
+	writel((1 << 17) | (1 << 14) | (1 << 15) | (1 << 25) | (1 << 26) | (1 << 28), &pio->pioa.puer);
 
 	at91_macb_hw_init();
 }
@@ -186,7 +180,7 @@ int board_eth_init(bd_t *bis)
 {
 	int rc = 0;
 #ifdef CONFIG_MACB
-	rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00);
+	rc = macb_eth_initialize(0, (void *)AT91_EMAC_BASE, 0x00);
 #endif
 	return rc;
 }
diff --git a/board/atmel/at91sam9260ek/led.c b/board/atmel/at91sam9260ek/led.c
index 2424d27..fd29dd8 100644
--- a/board/atmel/at91sam9260ek/led.c
+++ b/board/atmel/at91sam9260ek/led.c
@@ -30,12 +30,14 @@
 
 void coloured_LED_init(void)
 {
+	at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+
 	/* Enable clock */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA);
+	writel(1 << AT91SAM9260_ID_PIOA, &pmc->pcer);
 
-	at91_set_gpio_output(CONFIG_RED_LED, 1);
-	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
+	at91_set_pio_output(CONFIG_RED_LED, 1);
+	at91_set_pio_output(CONFIG_GREEN_LED, 1);
 
-	at91_set_gpio_value(CONFIG_RED_LED, 0);
-	at91_set_gpio_value(CONFIG_GREEN_LED, 1);
+	at91_set_pio_output(CONFIG_RED_LED, 0);
+	at91_set_pio_output(CONFIG_GREEN_LED, 1);
 }
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index 8aee5a6..bcce5d1 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -29,8 +29,6 @@
 
 #include <asm/sizes.h>
 
-#define CONFIG_AT91_LEGACY
-
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432 MHz crystal */
 #define CONFIG_SYS_HZ		1000
@@ -65,8 +63,8 @@
 
 /* LED */
 #define CONFIG_AT91_LED
-#define	CONFIG_RED_LED		AT91_PIN_PA9	/* this is the power led */
-#define	CONFIG_GREEN_LED	AT91_PIN_PA6	/* this is the user led */
+#define	CONFIG_RED_LED		AT91_PIO_PORTA, 9	/* this is the power led */
+#define	CONFIG_GREEN_LED	AT91_PIO_PORTA, 6	/* this is the user led */
 
 #define CONFIG_BOOTDELAY	3
 
@@ -101,7 +99,7 @@
 
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH		1
+#define CONFIG_HAS_DATAFLASH
 #define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
@@ -125,8 +123,8 @@
 #define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
-#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
-#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC13
+#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIO_PORTC, 14
+#define CONFIG_SYS_NAND_READY_PIN		AT91_PIO_PORTC, 13
 
 #endif
 
-- 
1.7.2.2

[U-Boot] [PATCH 05/11] at91: Fix pdc register names and add some defines

[Alexander Stein]

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
---
 arch/arm/include/asm/arch-at91/at91_pdc.h |    9 +++++++--
 1 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91_pdc.h b/arch/arm/include/asm/arch-at91/at91_pdc.h
index 42f87ca..2ee6c9d 100644
--- a/arch/arm/include/asm/arch-at91/at91_pdc.h
+++ b/arch/arm/include/asm/arch-at91/at91_pdc.h
@@ -28,12 +28,17 @@ typedef struct at91_pdc {
 	u32	rcr;		/* 0x104 Receive Counter Register */
 	u32	tpr;		/* 0x108 Transmit Pointer Register */
 	u32	tcr;		/* 0x10C Transmit Counter Register */
-	u32	pnpr;		/* 0x110 Receive Next Pointer Register */
-	u32	pncr;		/* 0x114 Receive Next Counter Register */
+	u32	rnpr;		/* 0x110 Receive Next Pointer Register */
+	u32	rncr;		/* 0x114 Receive Next Counter Register */
 	u32	tnpr;		/* 0x118 Transmit Next Pointer Register */
 	u32	tncr;		/* 0x11C Transmit Next Counter Register */
 	u32	ptcr;		/* 0x120 Transfer Control Register */
 	u32	ptsr;		/* 0x124 Transfer Status Register */
 } at91_pdc_t;
 
+#define AT91_PDC_PTCR_RXTEN		0x00000001
+#define AT91_PDC_PTCR_RXTDIS	0x00000002
+#define AT91_PDC_PTCR_TXTEN		0x00000100
+#define AT91_PDC_PTCR_TXTDIS	0x00000200
+
 #endif
-- 
1.7.2.2

[U-Boot] [PATCH 06/11] at91: Add defines for spi SoC access

[Alexander Stein]

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
---
 arch/arm/include/asm/arch-at91/at91_spi.h |   14 ++++++++++++++
 1 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91_spi.h b/arch/arm/include/asm/arch-at91/at91_spi.h
index c520e89..75d4324 100644
--- a/arch/arm/include/asm/arch-at91/at91_spi.h
+++ b/arch/arm/include/asm/arch-at91/at91_spi.h
@@ -33,6 +33,20 @@ typedef struct at91_spi {
 	at91_pdc_t	pdc;
 } at91_spi_t;
 
+#define AT91_SPI_CR_SPIEN	0x00000001
+#define AT91_SPI_CR_SWRST	0x00000080
+
+#define AT91_SPI_MR_MSTR	0x00000001
+#define AT91_SPI_MR_MODFDIS	0x00000004
+#define AT91_SPI_MR_PCS		0x000f0000
+
+#define AT91_SPI_SR_RXBUFF	0x00000040
+#define AT91_SPI_SR_SPIENS	0x00010000
+
+#define AT91_SPI_CSR_NCPHA	0x00000001
+#define AT91_SPI_CSR_DLYBS	0x00ff0000
+#define AT91_SPI_CSR_DLYBCT	0xff000000
+
 #ifdef CONFIG_AT91_LEGACY
 
 #define AT91_SPI_CR			0x00		/* Control Register */
-- 
1.7.2.2

[U-Boot] [PATCH 07/11] at91: Add spi base addresses

[Alexander Stein]

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
---
 arch/arm/include/asm/arch-at91/at91cap9.h    |    2 ++
 arch/arm/include/asm/arch-at91/at91sam9260.h |    2 ++
 arch/arm/include/asm/arch-at91/at91sam9261.h |    2 ++
 arch/arm/include/asm/arch-at91/at91sam9263.h |    2 ++
 arch/arm/include/asm/arch-at91/at91sam9g45.h |    2 ++
 arch/arm/include/asm/arch-at91/at91sam9rl.h  |    1 +
 6 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91cap9.h b/arch/arm/include/asm/arch-at91/at91cap9.h
index f109c66..2bd0718 100644
--- a/arch/arm/include/asm/arch-at91/at91cap9.h
+++ b/arch/arm/include/asm/arch-at91/at91cap9.h
@@ -56,6 +56,8 @@
 #define AT91_USART0_BASE	0xfff8c000
 #define AT91_USART1_BASE	0xfff90000
 #define AT91_USART2_BASE	0xfff94000
+#define AT91_SPI0_BASE		0xfffa4000
+#define AT91_SPI1_BASE		0xfffa8000
 #define AT91_DBGU_BASE		0xffffee00
 #define AT91_PIO_BASE		0xfffff200
 #define AT91_PMC_BASE		0xfffffc00
diff --git a/arch/arm/include/asm/arch-at91/at91sam9260.h b/arch/arm/include/asm/arch-at91/at91sam9260.h
index 4b1b09f..bc3f2fd 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9260.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9260.h
@@ -53,6 +53,8 @@
 #define AT91_USART1_BASE	0xfffb4000
 #define AT91_USART2_BASE	0xfffb8000
 #define AT91_EMAC_BASE		0xfffc4000
+#define AT91_SPI0_BASE		0xfffc8000
+#define AT91_SPI1_BASE		0xfffcc000
 #define AT91_USART3_BASE	0xfffd0000
 #define AT91_USART4_BASE	0xfffd4000
 #define AT91_USART5_BASE	0xfffd8000
diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h b/arch/arm/include/asm/arch-at91/at91sam9261.h
index 49be91f..22b4e4f 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9261.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9261.h
@@ -46,6 +46,8 @@
 #define AT91_USART0_BASE	0xfffb0000
 #define AT91_USART1_BASE	0xfffb4000
 #define AT91_USART2_BASE	0xfffb8000
+#define AT91_SPI0_BASE		0xfffc8000
+#define AT91_SPI1_BASE		0xfffcc000
 #define AT91_SDRAMC_BASE	0xffffea00
 #define AT91_SMC_BASE		0xffffec00
 #define AT91_MATRIX_BASE	0xffffee00
diff --git a/arch/arm/include/asm/arch-at91/at91sam9263.h b/arch/arm/include/asm/arch-at91/at91sam9263.h
index cdda301..ac55282 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9263.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9263.h
@@ -50,6 +50,8 @@
 #define AT91_US0_BASE		0xfff8c000
 #define AT91_US1_BASE		0xfff90000
 #define AT91_US2_BASE		0xfff94000
+#define AT91_SPI0_BASE		0xfffa4000
+#define AT91_SPI1_BASE		0xfffa8000
 #define AT91_EMAC_BASE		0xfffbc000
 #define AT91_ECC0_BASE		0xffffe000
 #define AT91_SDRAMC0_BASE	0xffffe200
diff --git a/arch/arm/include/asm/arch-at91/at91sam9g45.h b/arch/arm/include/asm/arch-at91/at91sam9g45.h
index b6767fd..931e4a2 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9g45.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9g45.h
@@ -55,6 +55,8 @@
 #define AT91_USART1_BASE	0xfff90000
 #define AT91_USART2_BASE	0xfff94000
 #define AT91_USART3_BASE	0xfff98000
+#define AT91_SPI0_BASE		0xfffa4000
+#define AT91_SPI1_BASE		0xfffa8000
 #define AT91_EMAC_BASE		0xfffbc000
 #define AT91_SMC_BASE		0xffffe800
 #define AT91_MATRIX_BASE	0xffffea00
diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl.h b/arch/arm/include/asm/arch-at91/at91sam9rl.h
index ffa6687..0e2b73e 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9rl.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9rl.h
@@ -48,6 +48,7 @@
 #define AT91_US1_BASE		0xfffb4000
 #define AT91_US2_BASE		0xfffb8000
 #define AT91_US3_BASE		0xfffbc000
+#define AT91_SPI_BASE		0xfffcc000
 #define AT91_SDRAMC_BASE	0xffffea00
 #define AT91_SMC_BASE		0xffffec00
 #define AT91_MATRIX_BASE	0xffffee00
-- 
1.7.2.2

[U-Boot] [PATCH 08/11] atmel_dataflash: Update to SoC access

[Alexander Stein]

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
---
 arch/arm/include/asm/arch-at91/hardware.h |   10 ++--
 drivers/spi/atmel_dataflash_spi.c         |  109 +++++++++++++++--------------
 2 files changed, 60 insertions(+), 59 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/hardware.h b/arch/arm/include/asm/arch-at91/hardware.h
index f5f80e0..06ae26c 100644
--- a/arch/arm/include/asm/arch-at91/hardware.h
+++ b/arch/arm/include/asm/arch-at91/hardware.h
@@ -22,22 +22,22 @@
 #elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
 #include <asm/arch/at91sam9260.h>
 #define AT91_BASE_MCI	AT91SAM9260_BASE_MCI
-#define AT91_BASE_SPI	AT91SAM9260_BASE_SPI0
+#define AT91_BASE_SPI	AT91_SPI0_BASE
 #define AT91_ID_UHP	AT91SAM9260_ID_UHP
 #define AT91_PMC_UHP	AT91SAM926x_PMC_UHP
 #elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
 #include <asm/arch/at91sam9261.h>
-#define AT91_BASE_SPI	AT91SAM9261_BASE_SPI0
+#define AT91_BASE_SPI	AT91_SPI0_BASE
 #define AT91_ID_UHP	AT91SAM9261_ID_UHP
 #define AT91_PMC_UHP	AT91SAM926x_PMC_UHP
 #elif defined(CONFIG_AT91SAM9263)
 #include <asm/arch/at91sam9263.h>
-#define AT91_BASE_SPI	AT91SAM9263_BASE_SPI0
+#define AT91_BASE_SPI	AT91_SPI0_BASE
 #define AT91_ID_UHP	AT91SAM9263_ID_UHP
 #define AT91_PMC_UHP	AT91SAM926x_PMC_UHP
 #elif defined(CONFIG_AT91SAM9RL)
 #include <asm/arch/at91sam9rl.h>
-#define AT91_BASE_SPI	AT91SAM9RL_BASE_SPI
+#define AT91_BASE_SPI	AT91_SPI_BASE
 #define AT91_ID_UHP	AT91SAM9RL_ID_UHP
 #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
 #include <asm/arch/at91sam9g45.h>
@@ -47,7 +47,7 @@
 #define AT91_PMC_UHP    AT91SAM926x_PMC_UHP
 #elif defined(CONFIG_AT91CAP9)
 #include <asm/arch/at91cap9.h>
-#define AT91_BASE_SPI	AT91CAP9_BASE_SPI0
+#define AT91_BASE_SPI	AT91_SPI0_BASE
 #define AT91_ID_UHP	AT91CAP9_ID_UHP
 #define AT91_PMC_UHP	AT91CAP9_PMC_UHP
 #elif defined(CONFIG_AT91X40)
diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c
index 4a5c4aa..f325647 100644
--- a/drivers/spi/atmel_dataflash_spi.c
+++ b/drivers/spi/atmel_dataflash_spi.c
@@ -20,10 +20,7 @@
  */
 
 #include <common.h>
-#ifndef CONFIG_AT91_LEGACY
-#define CONFIG_AT91_LEGACY
-#warning Please update to use C structur SoC access !
-#endif
+
 #include <asm/arch/hardware.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
@@ -40,93 +37,96 @@
 
 void AT91F_SpiInit(void)
 {
+	at91_spi_t *spi = (at91_spi_t *) AT91_BASE_SPI;
+
 	/* Reset the SPI */
-	writel(AT91_SPI_SWRST, AT91_BASE_SPI + AT91_SPI_CR);
+	writel(AT91_SPI_CR_SWRST, &spi->cr);
 
 	/* Configure SPI in Master Mode with No CS selected !!! */
-	writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS,
-	       AT91_BASE_SPI + AT91_SPI_MR);
+	writel(AT91_SPI_MR_MSTR | AT91_SPI_MR_MODFDIS | AT91_SPI_MR_PCS,
+	       &spi->mr);
 
 	/* Configure CS0 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
+	writel(AT91_SPI_CSR_NCPHA |
+	       (AT91_SPI_CSR_DLYBS & DATAFLASH_TCSS) |
+	       (AT91_SPI_CSR_DLYBCT & DATAFLASH_TCHS) |
 	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       AT91_BASE_SPI + AT91_SPI_CSR(0));
+	       &spi->csr[0]);
 
 #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
 	/* Configure CS1 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
+	writel(AT91_SPI_CSR_NCPHA |
+	       (AT91_SPI_CSR_DLYBS & DATAFLASH_TCSS) |
+	       (AT91_SPI_CSR_DLYBCT & DATAFLASH_TCHS) |
 	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       AT91_BASE_SPI + AT91_SPI_CSR(1));
+	       &spi->csr[1]);
 #endif
 #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
 	/* Configure CS2 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
+	writel(AT91_SPI_CSR_NCPHA |
+	       (AT91_SPI_CSR_DLYBS & DATAFLASH_TCSS) |
+	       (AT91_SPI_CSR_DLYBCT & DATAFLASH_TCHS) |
 	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       AT91_BASE_SPI + AT91_SPI_CSR(2));
+	       &spi->csr[2]);
 #endif
 #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
 	/* Configure CS3 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
+	writel(AT91_SPI_CSR_NCPHA |
+	       (AT91_SPI_CSR_DLYBS & DATAFLASH_TCSS) |
+	       (AT91_SPI_CSR_DLYBCT & DATAFLASH_TCHS) |
 	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       AT91_BASE_SPI + AT91_SPI_CSR(3));
+	       &spi->csr[3]);
 #endif
 
 	/* SPI_Enable */
-	writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR);
+	writel(AT91_SPI_CR_SPIEN, &spi->cr);
 
-	while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_SPIENS));
+	while (!(readl(&spi->sr) & AT91_SPI_SR_SPIENS));
 
 	/*
 	 * Add tempo to get SPI in a safe state.
 	 * Should not be needed for new silicon (Rev B)
 	 */
 	udelay(500000);
-	readl(AT91_BASE_SPI + AT91_SPI_SR);
-	readl(AT91_BASE_SPI + AT91_SPI_RDR);
+	readl(&spi->sr);
+	readl(&spi->rdr);
 
 }
 
 void AT91F_SpiEnable(int cs)
 {
 	unsigned long mode;
+	at91_spi_t *spi = (at91_spi_t *) AT91_BASE_SPI;
 
 	switch (cs) {
 	case 0:	/* Configure SPI CS0 for Serial DataFlash AT45DBxx */
-		mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+		mode = readl(&spi->mr);
 		mode &= 0xFFF0FFFF;
-		writel(mode | ((AT91_SPI_PCS0_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
-		       AT91_BASE_SPI + AT91_SPI_MR);
+		writel(mode | ((AT91_SPI_PCS0_DATAFLASH_CARD<<16) & AT91_SPI_MR_PCS),
+		       &spi->mr);
 		break;
 	case 1:	/* Configure SPI CS1 for Serial DataFlash AT45DBxx */
-		mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+		mode = readl(&spi->mr);
 		mode &= 0xFFF0FFFF;
-		writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
-		       AT91_BASE_SPI + AT91_SPI_MR);
+		writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD<<16) & AT91_SPI_MR_PCS),
+		       &spi->mr);
 		break;
 	case 2:	/* Configure SPI CS2 for Serial DataFlash AT45DBxx */
-		mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+		mode = readl(&spi->mr);
 		mode &= 0xFFF0FFFF;
-		writel(mode | ((AT91_SPI_PCS2_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
-		       AT91_BASE_SPI + AT91_SPI_MR);
+		writel(mode | ((AT91_SPI_PCS2_DATAFLASH_CARD<<16) & AT91_SPI_MR_PCS),
+		       &spi->mr);
 		break;
 	case 3:
-		mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+		mode = readl(&spi->mr);
 		mode &= 0xFFF0FFFF;
-		writel(mode | ((AT91_SPI_PCS3_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
-		       AT91_BASE_SPI + AT91_SPI_MR);
+		writel(mode | ((AT91_SPI_PCS3_DATAFLASH_CARD<<16) & AT91_SPI_MR_PCS),
+		       &spi->mr);
 		break;
 	}
 
 	/* SPI_Enable */
-	writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR);
+	writel(AT91_SPI_CR_SPIEN, &spi->cr);
 }
 
 unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc);
@@ -134,37 +134,38 @@ unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc);
 unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
 {
 	unsigned int timeout;
+	at91_spi_t *spi = (at91_spi_t *) AT91_BASE_SPI;
 
 	pDesc->state = BUSY;
 
-	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR);
+	writel(AT91_PDC_PTCR_TXTDIS + AT91_PDC_PTCR_RXTDIS, &spi->pdc.ptcr);
 
 	/* Initialize the Transmit and Receive Pointer */
-	writel((unsigned int)pDesc->rx_cmd_pt, AT91_BASE_SPI + AT91_SPI_RPR);
-	writel((unsigned int)pDesc->tx_cmd_pt, AT91_BASE_SPI + AT91_SPI_TPR);
+	writel((unsigned int)pDesc->rx_cmd_pt, &spi->pdc.rpr);
+	writel((unsigned int)pDesc->tx_cmd_pt, &spi->pdc.tpr);
 
 	/* Intialize the Transmit and Receive Counters */
-	writel(pDesc->rx_cmd_size, AT91_BASE_SPI + AT91_SPI_RCR);
-	writel(pDesc->tx_cmd_size, AT91_BASE_SPI + AT91_SPI_TCR);
+	writel(pDesc->rx_cmd_size, &spi->pdc.rcr);
+	writel(pDesc->tx_cmd_size, &spi->pdc.tcr);
 
 	if (pDesc->tx_data_size != 0) {
 		/* Initialize the Next Transmit and Next Receive Pointer */
-		writel((unsigned int)pDesc->rx_data_pt, AT91_BASE_SPI + AT91_SPI_RNPR);
-		writel((unsigned int)pDesc->tx_data_pt, AT91_BASE_SPI + AT91_SPI_TNPR);
+		writel((unsigned int)pDesc->rx_data_pt, &spi->pdc.rnpr);
+		writel((unsigned int)pDesc->tx_data_pt, &spi->pdc.tnpr);
 
 		/* Intialize the Next Transmit and Next Receive Counters */
-		writel(pDesc->rx_data_size, AT91_BASE_SPI + AT91_SPI_RNCR);
-		writel(pDesc->tx_data_size, AT91_BASE_SPI + AT91_SPI_TNCR);
+		writel(pDesc->rx_data_size, &spi->pdc.rncr);
+		writel(pDesc->tx_data_size, &spi->pdc.tncr);
 	}
 
 	/* arm simple, non interrupt dependent timer */
-	reset_timer_masked();
+	reset_timer();
 	timeout = 0;
 
-	writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN, AT91_BASE_SPI + AT91_SPI_PTCR);
-	while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_RXBUFF) &&
-		((timeout = get_timer_masked()) < CONFIG_SYS_SPI_WRITE_TOUT));
-	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR);
+	writel(AT91_PDC_PTCR_TXTEN + AT91_PDC_PTCR_RXTEN, &spi->pdc.ptcr);
+	while (!(readl(&spi->sr) & AT91_SPI_SR_RXBUFF) &&
+		((timeout = get_timer(timeout)) < CONFIG_SYS_SPI_WRITE_TOUT));
+	writel(AT91_PDC_PTCR_TXTDIS + AT91_PDC_PTCR_RXTDIS, &spi->pdc.ptcr);
 	pDesc->state = IDLE;
 
 	if (timeout >= CONFIG_SYS_SPI_WRITE_TOUT) {
-- 
1.7.2.2

[U-Boot] [PATCH 09/11] at91sam9261ek: make compilable again

[Alexander Stein]

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
---
 board/atmel/at91sam9261ek/at91sam9261ek.c |    6 +++---
 include/configs/at91sam9261ek.h           |   15 +++++++++++----
 2 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c
index de5cfae..afe561f 100644
--- a/board/atmel/at91sam9261ek/at91sam9261ek.c
+++ b/board/atmel/at91sam9261ek/at91sam9261ek.c
@@ -246,7 +246,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9261EK;
 #endif
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
 	at91_serial_hw_init();
 #ifdef CONFIG_CMD_NAND
@@ -273,8 +273,8 @@ int board_eth_init(bd_t *bis)
 
 int dram_init(void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = CONFIG_SYS_SDRAM_SIZE;
 	return 0;
 }
 
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 401478b..05eb15a 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -27,6 +27,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <asm/sizes.h>
+
 #define CONFIG_AT91_LEGACY
 
 /* ARM asynchronous clock */
@@ -39,6 +41,7 @@
 #else
 #define CONFIG_AT91SAM9261	1	/* It's an Atmel AT91SAM9261 SoC*/
 #endif
+#define CONFIG_AT91FAMILY
 #define CONFIG_ARCH_CPU_INIT
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
 
@@ -108,8 +111,8 @@
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM			0x20000000
-#define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
+#define CONFIG_SYS_SDRAM_BASE			0x20000000
+#define CONFIG_SYS_SDRAM_SIZE			SZ_64M	/* 64 megs */
 
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
@@ -168,7 +171,7 @@
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END			0x23e00000
 
 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
@@ -230,8 +233,12 @@
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
+/* size in bytes reserved for initial data */
+
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_4K \
+					- GENERATED_GBL_DATA_SIZE)
 
-#define CONFIG_STACKSIZE	(32*1024)	/* regular stack */
+#define CONFIG_STACKSIZE	(SZ_32K)	/* regular stack */
 
 #ifdef CONFIG_USE_IRQ
 #error CONFIG_USE_IRQ not supported
-- 
1.7.2.2

[U-Boot] [PATCH 10/11] at91sam9263ek: make compilable again

[Alexander Stein]

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
---
 board/atmel/at91sam9263ek/at91sam9263ek.c |    6 +++---
 include/configs/at91sam9263ek.h           |   15 +++++++++++----
 2 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c
index 91efc07..c9c8eac 100644
--- a/board/atmel/at91sam9263ek/at91sam9263ek.c
+++ b/board/atmel/at91sam9263ek/at91sam9263ek.c
@@ -252,7 +252,7 @@ int board_init(void)
 	/* arch number of AT91SAM9263EK-Board */
 	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK;
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
 	at91_serial_hw_init();
 #ifdef CONFIG_CMD_NAND
@@ -276,8 +276,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = CONFIG_SYS_SDRAM_SIZE;
 	return 0;
 }
 
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index f6cb406..33c921b 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -27,6 +27,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <asm/sizes.h>
+
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	16367660	/* 16.367 MHz crystal */
 #define CONFIG_SYS_HZ		1000
@@ -34,6 +36,7 @@
 #define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
 #define CONFIG_AT91SAM9263	1	/* It's an Atmel AT91SAM9263 SoC*/
 #define CONFIG_AT91SAM9263EK	1	/* on an AT91SAM9263EK Board	*/
+#define CONFIG_AT91FAMILY
 #define CONFIG_ARCH_CPU_INIT
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
 
@@ -101,8 +104,8 @@
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM			0x20000000
-#define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
+#define CONFIG_SYS_SDRAM_BASE		0x20000000
+#define CONFIG_SYS_SDRAM_SIZE		SZ_64M	/* 64 megs */
 
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
@@ -291,7 +294,7 @@
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END			0x23e00000
 
 #ifdef CONFIG_SYS_USE_DATAFLASH
@@ -340,8 +343,12 @@
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
+/* size in bytes reserved for initial data */
+
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_4K \
+					- GENERATED_GBL_DATA_SIZE)
 
-#define CONFIG_STACKSIZE	(32*1024)	/* regular stack */
+#define CONFIG_STACKSIZE	(SZ_32K)	/* regular stack */
 
 #ifdef CONFIG_USE_IRQ
 #error CONFIG_USE_IRQ not supported
-- 
1.7.2.2

[U-Boot] [PATCH 11/11] at91cap9adk: make compilable again

[Alexander Stein]

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
---
 board/atmel/at91cap9adk/at91cap9adk.c |    6 +++---
 include/configs/at91cap9adk.h         |   15 +++++++++++----
 2 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c
index 2ab8bc2..ce77a13 100644
--- a/board/atmel/at91cap9adk/at91cap9adk.c
+++ b/board/atmel/at91cap9adk/at91cap9adk.c
@@ -306,7 +306,7 @@ int board_init(void)
 	/* arch number of AT91CAP9ADK-Board */
 	gd->bd->bi_arch_number = MACH_TYPE_AT91CAP9ADK;
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
 	at91_serial_hw_init();
 	at91cap9_slowclock_hw_init();
@@ -331,8 +331,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = CONFIG_SYS_SDRAM_SIZE;
 	return 0;
 }
 
diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h
index 49c923f..8768c53 100644
--- a/include/configs/at91cap9adk.h
+++ b/include/configs/at91cap9adk.h
@@ -27,6 +27,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <asm/sizes.h>
+
 #define CONFIG_AT91_LEGACY
 
 /* ARM asynchronous clock */
@@ -36,6 +38,7 @@
 #define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
 #define CONFIG_AT91CAP9		1	/* It's an Atmel AT91CAP9 SoC	*/
 #define CONFIG_AT91CAP9ADK	1	/* on an AT91CAP9ADK Board	*/
+#define CONFIG_AT91FAMILY
 #define CONFIG_ARCH_CPU_INIT
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
 
@@ -100,8 +103,8 @@
 
 /* SDRAM: Careful: this supposes an AT91CAP-MEM33 expansion card */
 #define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM			0x70000000
-#define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
+#define CONFIG_SYS_SDRAM_BASE		0x70000000
+#define CONFIG_SYS_SDRAM_SIZE		SZ_64M	/* 64 megs */
 
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
@@ -155,7 +158,7 @@
 
 #define CONFIG_SYS_LOAD_ADDR			0x72000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END			0x73e00000
 
 #define CONFIG_SYS_USE_DATAFLASH		1
@@ -208,8 +211,12 @@
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN		ROUND(CONFIG_ENV_SIZE + 128*1024, 0x1000)
+/* size in bytes reserved for initial data */
+
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_4K \
+					- GENERATED_GBL_DATA_SIZE)
 
-#define CONFIG_STACKSIZE	(32*1024)	/* regular stack */
+#define CONFIG_STACKSIZE	(SZ_32K)	/* regular stack */
 
 #ifdef CONFIG_USE_IRQ
 #error CONFIG_USE_IRQ not supported
-- 
1.7.2.2

[U-Boot] various at91 patches to make some boards compilable again

[Reinhard Meyer]

Dear Alexander Stein,
> This patch series changes some at91 boards to SoC access and adds some defines
> to make the boards compilable again.
> Please note: All changes are untested!

Ok, I will look over them, and apply them in a test branch here, if they don't break
my board I think they can be mainlined, BUT you would need to be the maintainer of those
boards.

But if we receive no positive test reports in some time, those boards ultimately have to
be deleted.

I can only test on an at91sam9xe-ek.

Best Regards,

Reinhard

[U-Boot] [PATCH 06/11] at91: Add defines for spi SoC access

[Reinhard Meyer]

Dear Alexander Stein,
> Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
> ---
>  arch/arm/include/asm/arch-at91/at91_spi.h |   14 ++++++++++++++
>  1 files changed, 14 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-at91/at91_spi.h b/arch/arm/include/asm/arch-at91/at91_spi.h
> index c520e89..75d4324 100644
> --- a/arch/arm/include/asm/arch-at91/at91_spi.h
> +++ b/arch/arm/include/asm/arch-at91/at91_spi.h
> @@ -33,6 +33,20 @@ typedef struct at91_spi {
>  	at91_pdc_t	pdc;
>  } at91_spi_t;

If we touch header and driver anyway, we could get rid of the depreciated typedefs,
to get conform to the coding style.

See discussion about that 1-2 days ago :)

>  
> +#define AT91_SPI_CR_SPIEN	0x00000001
> +#define AT91_SPI_CR_SWRST	0x00000080
> +
> +#define AT91_SPI_MR_MSTR	0x00000001
> +#define AT91_SPI_MR_MODFDIS	0x00000004
> +#define AT91_SPI_MR_PCS		0x000f0000
> +
> +#define AT91_SPI_SR_RXBUFF	0x00000040
> +#define AT91_SPI_SR_SPIENS	0x00010000
> +
> +#define AT91_SPI_CSR_NCPHA	0x00000001
> +#define AT91_SPI_CSR_DLYBS	0x00ff0000
> +#define AT91_SPI_CSR_DLYBCT	0xff000000
> +
>  #ifdef CONFIG_AT91_LEGACY

After that patch, do we still need LEGACY?

Best Regards,
Reinhard

[U-Boot] various at91 patches to make some boards compilable again

[Alexander Stein]

Dear Reinhard Meyer,

On Monday 01 November 2010, 09:40:52 Reinhard Meyer wrote:
> > This patch series changes some at91 boards to SoC access and adds some
> > defines to make the boards compilable again.
> > Please note: All changes are untested!
> 
> Ok, I will look over them, and apply them in a test branch here, if they
> don't break my board I think they can be mainlined, BUT you would need to
> be the maintainer of those boards.

Well, I have only occasional access to at91sam9g20ek and at91sam9263ek atm. 
All other boards were just done by adjusting the same things. I'm unsure how 
well I could maintain those boards.

> But if we receive no positive test reports in some time, those boards
> ultimately have to be deleted.
> 
> I can only test on an at91sam9xe-ek.

Ok, i see.

Best regards,
Alexander

[U-Boot] [PATCH 06/11] at91: Add defines for spi SoC access

[Alexander Stein]

On Monday 01 November 2010, 09:43:57 Reinhard Meyer wrote:
> Dear Alexander Stein,
> 
> > Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
> > ---
> > 
> >  arch/arm/include/asm/arch-at91/at91_spi.h |   14 ++++++++++++++
> >  1 files changed, 14 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/arm/include/asm/arch-at91/at91_spi.h
> > b/arch/arm/include/asm/arch-at91/at91_spi.h index c520e89..75d4324
> > 100644
> > --- a/arch/arm/include/asm/arch-at91/at91_spi.h
> > +++ b/arch/arm/include/asm/arch-at91/at91_spi.h
> > @@ -33,6 +33,20 @@ typedef struct at91_spi {
> > 
> >  	at91_pdc_t	pdc;
> >  
> >  } at91_spi_t;
> 
> If we touch header and driver anyway, we could get rid of the depreciated
> typedefs, to get conform to the coding style.
> 
> See discussion about that 1-2 days ago :)

Ok, will do a repost after some time.

> > +#define AT91_SPI_CR_SPIEN	0x00000001
> > +#define AT91_SPI_CR_SWRST	0x00000080
> > +
> > +#define AT91_SPI_MR_MSTR	0x00000001
> > +#define AT91_SPI_MR_MODFDIS	0x00000004
> > +#define AT91_SPI_MR_PCS		0x000f0000
> > +
> > +#define AT91_SPI_SR_RXBUFF	0x00000040
> > +#define AT91_SPI_SR_SPIENS	0x00010000
> > +
> > +#define AT91_SPI_CSR_NCPHA	0x00000001
> > +#define AT91_SPI_CSR_DLYBS	0x00ff0000
> > +#define AT91_SPI_CSR_DLYBCT	0xff000000
> > +
> > 
> >  #ifdef CONFIG_AT91_LEGACY
> 
> After that patch, do we still need LEGACY?

I'm unsure about that yet. Anyway I would prefer to remove CONFIG_AT91_LEGACY 
globally at all occurrences.

Best regards,
Alexander

[U-Boot] various at91 patches to make some boards compilable again

[Wolfgang Denk]

Dear Alexander Stein,

In message <201011010950.05938.alexander.stein@systec-electronic.com> you wrote:
>
> Well, I have only occasional access to at91sam9g20ek and at91sam9263ek atm. 

If U-Boot has been tested on these boards, you can list yourself as
maintainer.  If any later changes should require testing and you find
yourself in a position that you cannot do that any more (for whatever
reason), we can still orphan or even remove these boards.

> All other boards were just done by adjusting the same things. I'm unsure how 
> well I could maintain those boards.

Agreed.

> > But if we receive no positive test reports in some time, those boards
> > ultimately have to be deleted.
> > 
> > I can only test on an at91sam9xe-ek.

Well, I suggest we add respective notes to the MAINTAINERS file: in
addition to the "orphaned" group of boards, we could add an "orphaned
/ untested / remove-list" group entry.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"At least they're __________EXPERIENCED incompetents"

[U-Boot] [PATCH 01/11] at91sam9260: Replace PHYS_SDRAM with CONFIG_SYS_SDRAM_BASE

[Wolfgang Denk]

Dear Alexander Stein,

In message <1288600195-6960-2-git-send-email-alexander.stein@systec-electronic.com> you wrote:
> Same for PHYS_SDRAM_SIZE and CONFIG_SYS_SDRAM_SIZE and use SZ_* macros
> 
> Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>

Please don't add more use to the SZ macros.  They are on my kill-list.


Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Monday is an awful way to spend one seventh of your life.

[U-Boot] [PATCH 06/11] at91: Add defines for spi SoC access

[Wolfgang Denk]

Dear Reinhard Meyer,

In message <4CCE7DCD.6090004@emk-elektronik.de> you wrote:
>
> If we touch header and driver anyway, we could get rid of the depreciated typedefs,
> to get conform to the coding style.

I recommend NOT doing this, at least not as part of this patch series.

If a clean-up is intended, it should be done in a strictly separate set
of patches (either before or after the current series).

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
This is an unauthorized cybernetic announcement.

[U-Boot] [PATCH 10/11] at91sam9263ek: make compilable again

[Wolfgang Denk]

Dear Alexander Stein,

In message <1288600195-6960-11-git-send-email-alexander.stein@systec-electronic.com> you wrote:
> Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
> ---
>  board/atmel/at91sam9263ek/at91sam9263ek.c |    6 +++---
>  include/configs/at91sam9263ek.h           |   15 +++++++++++----
>  2 files changed, 14 insertions(+), 7 deletions(-)
> 
> diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c
> index 91efc07..c9c8eac 100644
> --- a/board/atmel/at91sam9263ek/at91sam9263ek.c
> +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c
> @@ -252,7 +252,7 @@ int board_init(void)
>  	/* arch number of AT91SAM9263EK-Board */
>  	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK;
>  	/* adress of boot parameters */
> -	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
> +	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;

PLease refactor these patches.  The rename PHYS_SDRAM =>
CONFIG_SYS_SDRAM_BASE was done in an earlier patch, so this and
similar changes in other patches should be part of that rename patch.

The rename patch should contain _all_ such renames, like any patch
should contain all modifications that belong to it logically.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
G's Third Law:             In spite of all evidence  to  the  contra-
ry,  the  entire  universe  is composed of only two basic substances:
magic and bullshit.
H's Dictum:                There is no magic ...

[U-Boot] [PATCH 03/11] at91: Use AT91_USART0_BASE instead of AT91_USART0

[Andreas Bießmann]

Dear Alexander Stein,
Am 01.11.2010 um 09:29 schrieb Alexander Stein:

> Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
> ---
> arch/arm/include/asm/arch-at91/memory-map.h |    8 ++++----
> 1 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-at91/memory-map.h b/arch/arm/include/asm/arch-at91/memory-map.h
> index f605f37..dd42bec 100644
> --- a/arch/arm/include/asm/arch-at91/memory-map.h
> +++ b/arch/arm/include/asm/arch-at91/memory-map.h
> @@ -26,10 +26,10 @@
> 
> #include <asm/arch/hardware.h>
> 
> -#define USART0_BASE AT91_USART0
> -#define USART1_BASE AT91_USART1
> -#define USART2_BASE AT91_USART2
> -#define USART3_BASE (AT91_BASE_SYS + AT91_DBGU)
> +#define USART0_BASE AT91_USART0_BASE
> +#define USART1_BASE AT91_USART1_BASE
> +#define USART2_BASE AT91_USART2_BASE
> +#define USART3_BASE AT91_DBGU_BASE
> #define SPI0_BASE	AT91_BASE_SPI

can we just drop these definitions? Not to criticize your patch but this is on my todo list, I just hate this USART3->DBGU redefinition.

RFC:
I would like to get rid of the three time definition/translation of these AT91 USART stuff.
The board config include uses CONFIG_USARTx, the atmel_usart.c use this definition to get USART_BASE/USART_ID out of some other definitions in asm/arch/hardware.h and asm/arch/memory-map.h which are also re-definitions of some other values in the respective SOC header files.

But beware, avr32 uses the same driver and needs to be changed in the same way.
A nice solution could be to define USART_BASE/USART_ID in respective board config files directly and get rid of the re-definitions in hardware.h/memory-map.h

regards

Andreas Bie?mann

[U-Boot] [PATCH 02/11] at91: Add USART & DBGU base address defines

[Andreas Bießmann]

Dear Alexander Stein,

Am 01.11.2010 um 09:29 schrieb Alexander Stein:

> Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
> ---
> arch/arm/include/asm/arch-at91/at91cap9.h    |   12 ++++++++----
> arch/arm/include/asm/arch-at91/at91sam9260.h |    7 +++++++
> arch/arm/include/asm/arch-at91/at91sam9261.h |    4 ++++
> arch/arm/include/asm/arch-at91/at91sam9263.h |    3 +++
> arch/arm/include/asm/arch-at91/at91sam9g45.h |    5 +++++
> arch/arm/include/asm/arch-at91/at91sam9rl.h  |    4 ++++
> 6 files changed, 31 insertions(+), 4 deletions(-)

> --- a/arch/arm/include/asm/arch-at91/at91sam9g45.h
> +++ b/arch/arm/include/asm/arch-at91/at91sam9g45.h
> @@ -51,9 +51,14 @@
> #define AT91SAM9G45_ID_VDEC	30	/* Video Decoder */
> #define AT91SAM9G45_ID_IRQ0	31	/* Advanced Interrupt Controller */
> 
> +#define AT91_USART0_BASE	0xfff8c000
> +#define AT91_USART1_BASE	0xfff90000
> +#define AT91_USART2_BASE	0xfff94000
> +#define AT91_USART3_BASE	0xfff98000
> #define AT91_EMAC_BASE		0xfffbc000
> #define AT91_SMC_BASE		0xffffe800
> #define AT91_MATRIX_BASE	0xffffea00
> +#define AT91_DBGU_BASE		0xffffee00
> #define AT91_PIO_BASE		0xfffff200
> #define AT91_PMC_BASE		0xfffffc00
> #define AT91_RSTC_BASE		0xfffffd00
> diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl.h b/arch/arm/include/asm/arch-at91/at91sam9rl.h
> index 8eb0d4f..ffa6687 100644


> --- a/arch/arm/include/asm/arch-at91/at91sam9rl.h
> +++ b/arch/arm/include/asm/arch-at91/at91sam9rl.h
> @@ -44,6 +44,10 @@
> #define AT91SAM9RL_ID_AC97C	24	/* AC97 Controller */
> #define AT91SAM9RL_ID_IRQ0	31	/* Advanced Interrupt Controller (IRQ0) */
> 
> +#define AT91_US0_BASE		0xfffb0000
> +#define AT91_US1_BASE		0xfffb4000
> +#define AT91_US2_BASE		0xfffb8000
> +#define AT91_US3_BASE		0xfffbc000
> #define AT91_SDRAMC_BASE	0xffffea00
> #define AT91_SMC_BASE		0xffffec00
> #define AT91_MATRIX_BASE	0xffffee00

can we just use one naming scheme here? I dunno whether it should be AT91_USx or AT91_USARTx but it should be the same in any case.

regards

Andreas Bie?mann

[U-Boot] [PATCH 02/11] at91: Add USART & DBGU base address defines

[Alexander Stein]

Dear Andreas,

On Monday 01 November 2010, 11:57:14 Andreas Bie?mann wrote:
> Am 01.11.2010 um 09:29 schrieb Alexander Stein:
> > Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
> > ---
> > arch/arm/include/asm/arch-at91/at91cap9.h    |   12 ++++++++----
> > arch/arm/include/asm/arch-at91/at91sam9260.h |    7 +++++++
> > arch/arm/include/asm/arch-at91/at91sam9261.h |    4 ++++
> > arch/arm/include/asm/arch-at91/at91sam9263.h |    3 +++
> > arch/arm/include/asm/arch-at91/at91sam9g45.h |    5 +++++
> > arch/arm/include/asm/arch-at91/at91sam9rl.h  |    4 ++++
> > 6 files changed, 31 insertions(+), 4 deletions(-)
> > 
> > --- a/arch/arm/include/asm/arch-at91/at91sam9g45.h
> > +++ b/arch/arm/include/asm/arch-at91/at91sam9g45.h
> > @@ -51,9 +51,14 @@
> > #define AT91SAM9G45_ID_VDEC	30	/* Video Decoder */
> > #define AT91SAM9G45_ID_IRQ0	31	/* Advanced Interrupt Controller */
> > 
> > +#define AT91_USART0_BASE	0xfff8c000
> > +#define AT91_USART1_BASE	0xfff90000
> > +#define AT91_USART2_BASE	0xfff94000
> > +#define AT91_USART3_BASE	0xfff98000
> > #define AT91_EMAC_BASE		0xfffbc000
> > #define AT91_SMC_BASE		0xffffe800
> > #define AT91_MATRIX_BASE	0xffffea00
> > +#define AT91_DBGU_BASE		0xffffee00
> > #define AT91_PIO_BASE		0xfffff200
> > #define AT91_PMC_BASE		0xfffffc00
> > #define AT91_RSTC_BASE		0xfffffd00
> > diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl.h
> > b/arch/arm/include/asm/arch-at91/at91sam9rl.h index 8eb0d4f..ffa6687
> > 100644
> > 
> > 
> > --- a/arch/arm/include/asm/arch-at91/at91sam9rl.h
> > +++ b/arch/arm/include/asm/arch-at91/at91sam9rl.h
> > @@ -44,6 +44,10 @@
> > #define AT91SAM9RL_ID_AC97C	24	/* AC97 Controller */
> > #define AT91SAM9RL_ID_IRQ0	31	/* Advanced Interrupt Controller (IRQ0) 
*/
> > 
> > +#define AT91_US0_BASE		0xfffb0000
> > +#define AT91_US1_BASE		0xfffb4000
> > +#define AT91_US2_BASE		0xfffb8000
> > +#define AT91_US3_BASE		0xfffbc000
> > #define AT91_SDRAMC_BASE	0xffffea00
> > #define AT91_SMC_BASE		0xffffec00
> > #define AT91_MATRIX_BASE	0xffffee00
> 
> can we just use one naming scheme here? I dunno whether it should be
> AT91_USx or AT91_USARTx but it should be the same in any case.

Yes, sure. I justed copied the dfine and reworded it to match the 
AT91_$COMPONENT_BASE scheme. Always using USARTx is fine though.

Best regards,
Alexander Stein

[U-Boot] various at91 patches to make some boards compilable again

[Andreas Bießmann]

Dear Alexander Stein,
Am 01.11.2010 um 09:50 schrieb Alexander Stein:

> Dear Reinhard Meyer,
> 
> On Monday 01 November 2010, 09:40:52 Reinhard Meyer wrote:
>>> This patch series changes some at91 boards to SoC access and adds some
>>> defines to make the boards compilable again.
>>> Please note: All changes are untested!
>> 
>> Ok, I will look over them, and apply them in a test branch here, if they
>> don't break my board I think they can be mainlined, BUT you would need to
>> be the maintainer of those boards.
> 
> Well, I have only occasional access to at91sam9g20ek and at91sam9263ek atm. 

if you sign up for those boards as maintainer please also provide patches to remove the configure stuff in Makefile, add them to boards.cfg and adopt MAKEALL.

> All other boards were just done by adjusting the same things. I'm unsure how 
> well I could maintain those boards.

I could test the at91sam9260ek stuff ... but the at91rm9200ek stuff takes all my rare spare time currently ;(

regards

Andreas Bie?mann

[U-Boot] [PATCH 02/11] at91: Add USART & DBGU base address defines

[Andreas Bießmann]

Dear Alexander,
Am 01.11.2010 um 12:05 schrieb Alexander Stein:

> Dear Andreas,
> 
> On Monday 01 November 2010, 11:57:14 Andreas Bie?mann wrote:
>> Am 01.11.2010 um 09:29 schrieb Alexander Stein:
>>> Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
>>> ---
>>> arch/arm/include/asm/arch-at91/at91cap9.h    |   12 ++++++++----
>>> arch/arm/include/asm/arch-at91/at91sam9260.h |    7 +++++++
>>> arch/arm/include/asm/arch-at91/at91sam9261.h |    4 ++++
>>> arch/arm/include/asm/arch-at91/at91sam9263.h |    3 +++
>>> arch/arm/include/asm/arch-at91/at91sam9g45.h |    5 +++++
>>> arch/arm/include/asm/arch-at91/at91sam9rl.h  |    4 ++++
>>> 6 files changed, 31 insertions(+), 4 deletions(-)
>>> 
>>> --- a/arch/arm/include/asm/arch-at91/at91sam9g45.h
>>> +++ b/arch/arm/include/asm/arch-at91/at91sam9g45.h
>>> @@ -51,9 +51,14 @@
>>> #define AT91SAM9G45_ID_VDEC	30	/* Video Decoder */
>>> #define AT91SAM9G45_ID_IRQ0	31	/* Advanced Interrupt Controller */
>>> 
>>> +#define AT91_USART0_BASE	0xfff8c000
>>> +#define AT91_USART1_BASE	0xfff90000
>>> +#define AT91_USART2_BASE	0xfff94000
>>> +#define AT91_USART3_BASE	0xfff98000
>>> #define AT91_EMAC_BASE		0xfffbc000
>>> #define AT91_SMC_BASE		0xffffe800
>>> #define AT91_MATRIX_BASE	0xffffea00
>>> +#define AT91_DBGU_BASE		0xffffee00
>>> #define AT91_PIO_BASE		0xfffff200
>>> #define AT91_PMC_BASE		0xfffffc00
>>> #define AT91_RSTC_BASE		0xfffffd00
>>> diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl.h
>>> b/arch/arm/include/asm/arch-at91/at91sam9rl.h index 8eb0d4f..ffa6687
>>> 100644
>>> 
>>> 
>>> --- a/arch/arm/include/asm/arch-at91/at91sam9rl.h
>>> +++ b/arch/arm/include/asm/arch-at91/at91sam9rl.h
>>> @@ -44,6 +44,10 @@
>>> #define AT91SAM9RL_ID_AC97C	24	/* AC97 Controller */
>>> #define AT91SAM9RL_ID_IRQ0	31	/* Advanced Interrupt Controller (IRQ0) 
> */
>>> 
>>> +#define AT91_US0_BASE		0xfffb0000
>>> +#define AT91_US1_BASE		0xfffb4000
>>> +#define AT91_US2_BASE		0xfffb8000
>>> +#define AT91_US3_BASE		0xfffbc000
>>> #define AT91_SDRAMC_BASE	0xffffea00
>>> #define AT91_SMC_BASE		0xffffec00
>>> #define AT91_MATRIX_BASE	0xffffee00
>> 
>> can we just use one naming scheme here? I dunno whether it should be
>> AT91_USx or AT91_USARTx but it should be the same in any case.
> 
> Yes, sure. I justed copied the dfine and reworded it to match the 
> AT91_$COMPONENT_BASE scheme. Always using USARTx is fine though.

Hmm ... I just thought they have renamed their registers in spec, but all checked datasheets use US_xx for USART register names.
I also prefer USART here but Reinhard can you please give a comment?

regards

Andreas Bie?mann

[U-Boot] [PATCH 02/11] at91: Add USART & DBGU base address defines

[Reinhard Meyer]

Dear All concerned,
>> On Monday 01 November 2010, 11:57:14 Andreas Bie?mann wrote:
>>> Am 01.11.2010 um 09:29 schrieb Alexander Stein:
>>>> Signed-off-by: Alexander Stein<alexander.stein@systec-electronic.com>
>>>> ---
>>>> arch/arm/include/asm/arch-at91/at91cap9.h    |   12 ++++++++----
>>>> arch/arm/include/asm/arch-at91/at91sam9260.h |    7 +++++++
>>>> arch/arm/include/asm/arch-at91/at91sam9261.h |    4 ++++
>>>> arch/arm/include/asm/arch-at91/at91sam9263.h |    3 +++
>>>> arch/arm/include/asm/arch-at91/at91sam9g45.h |    5 +++++
>>>> arch/arm/include/asm/arch-at91/at91sam9rl.h  |    4 ++++
>>>> 6 files changed, 31 insertions(+), 4 deletions(-)
>>>>
>>>> --- a/arch/arm/include/asm/arch-at91/at91sam9g45.h
>>>> +++ b/arch/arm/include/asm/arch-at91/at91sam9g45.h
>>>> @@ -51,9 +51,14 @@
>>>> #define AT91SAM9G45_ID_VDEC	30	/* Video Decoder */
>>>> #define AT91SAM9G45_ID_IRQ0	31	/* Advanced Interrupt Controller */
>>>>
>>>> +#define AT91_USART0_BASE	0xfff8c000
>>>> +#define AT91_USART1_BASE	0xfff90000
>>>> +#define AT91_USART2_BASE	0xfff94000
>>>> +#define AT91_USART3_BASE	0xfff98000
>>>> #define AT91_EMAC_BASE		0xfffbc000
>>>> #define AT91_SMC_BASE		0xffffe800
>>>> #define AT91_MATRIX_BASE	0xffffea00
>>>> +#define AT91_DBGU_BASE		0xffffee00
>>>> #define AT91_PIO_BASE		0xfffff200
>>>> #define AT91_PMC_BASE		0xfffffc00
>>>> #define AT91_RSTC_BASE		0xfffffd00
>>>> diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl.h
>>>> b/arch/arm/include/asm/arch-at91/at91sam9rl.h index 8eb0d4f..ffa6687
>>>> 100644
>>>>
>>>>
>>>> --- a/arch/arm/include/asm/arch-at91/at91sam9rl.h
>>>> +++ b/arch/arm/include/asm/arch-at91/at91sam9rl.h
>>>> @@ -44,6 +44,10 @@
>>>> #define AT91SAM9RL_ID_AC97C	24	/* AC97 Controller */
>>>> #define AT91SAM9RL_ID_IRQ0	31	/* Advanced Interrupt Controller (IRQ0)
>> */
>>>>
>>>> +#define AT91_US0_BASE		0xfffb0000
>>>> +#define AT91_US1_BASE		0xfffb4000
>>>> +#define AT91_US2_BASE		0xfffb8000
>>>> +#define AT91_US3_BASE		0xfffbc000
>>>> #define AT91_SDRAMC_BASE	0xffffea00
>>>> #define AT91_SMC_BASE		0xffffec00
>>>> #define AT91_MATRIX_BASE	0xffffee00
>>>
>>> can we just use one naming scheme here? I dunno whether it should be
>>> AT91_USx or AT91_USARTx but it should be the same in any case.
>>
>> Yes, sure. I justed copied the dfine and reworded it to match the
>> AT91_$COMPONENT_BASE scheme. Always using USARTx is fine though.
>
> Hmm ... I just thought they have renamed their registers in spec, but all checked datasheets use US_xx for USART register names.
> I also prefer USART here but Reinhard can you please give a comment?
Honestly I would prefer a much more thorough cleanup on the long run
(or instantly):

As was pointed out long ago and just now: a triple indirection of the defines
until used in the driver is bad.

Since only one of the at91samxxxx.h files is included, all files should
directly define the address of a component like follows:

#define ATMEL_USART0_BASE 0x'something'

Note: that I used ATMEL, not AT91, since the same components are used in
AVR32 as well.

The name should be descriptive enough, and preferably adhere to what the
component is called in the datasheet(s). (Hopefully its consistent there...)

Another note: even if currently there is only one incarnation of some
peripherals like emac or mci we should try to number them starting from 0,
e.g. ATMEL_EMAC0_BASE.

As a way to go there I can offer to make a branch at91cleanup where I
collect all work and which allows everyone to do incremental improvements
which can be squashed into fewer patches later. Then we don't need to base
all patch revisions on current master.

If you see no other priority, I would delay "build-fixing" individual boards,
but concentrate on cleanup work. Right now is the best opportunity for that
since most boards are not building anyway and do not need to be utterly
concerned with breaking them even more. After the cleanup is done, we can
attend to fixing certain boards.

Work could therefore start with cleaning up the at91samxxxx.h files.
I am also game with throwing out all LEGACY stuff and fix build problems
that occur when they occur.

If you agree, the cleanup in the *.h files should entail:

1. remove legacy parts
2. rename AT91xxxx_<component>_BASE consistently into ATMEL_<component>_BASE
and make for example EMAC into EMAC0, I2C into I2C0. I am currently unsure if
that needs to be done for SDRAMC, SMC. I think here we can live with SDRAMC
and having SDRAMC1 _if_ there is a second one.
3. get rid of hardware.h and have a simple #if-elif-endif chain in memory_map.h
instead. So that when memory_map.h is included and the proper #define AT91SAMxxxx
is set we get exactly the defines valid for that SoC. memory_map.h is consistent
with the AVR32 case. The common drivers all include memory_map.h.

This *.h cleanup could be patch 1/n of a series. Each individual driver cleanup
to remove legacy and adapt to the naming would be 2/n, 3/n, etc. I am willing
to collect them in the above mentioned branch and also squash incremental improvements
later to produce a clean patch series later.

With best regards,
Reinhard

[U-Boot] [PATCH 06/11] at91: Add defines for spi SoC access

[Reinhard Meyer]

Dear Wolfgang Denk,
> Dear Reinhard Meyer,
>
> In message<4CCE7DCD.6090004@emk-elektronik.de>  you wrote:
>>
>> If we touch header and driver anyway, we could get rid of the depreciated typedefs,
>> to get conform to the coding style.
>
> I recommend NOT doing this, at least not as part of this patch series.
>
> If a clean-up is intended, it should be done in a strictly separate set
> of patches (either before or after the current series).

In this particular case the driver is not yet using the (existing) struct
at91_spi at all....


WAIT....!!!

There is the COMMON driver atmel_spi.c with atmel_spi.h in drivers/spi.

There need not be and should not be an at91_spi.h; or do I miss
something here?

Best Regards,
Reinhard

[U-Boot] [PATCH 06/11] at91: Add defines for spi SoC access

[Alexander Stein]

Dear Reinhard,

On Monday 01 November 2010, 13:31:38 Reinhard Meyer wrote:
> In this particular case the driver is not yet using the (existing) struct
> at91_spi at all....
> 
> 
> WAIT....!!!
> 
> There is the COMMON driver atmel_spi.c with atmel_spi.h in drivers/spi.
> 
> There need not be and should not be an at91_spi.h; or do I miss
> something here?

Well, the cause for adding those defines is atmel_dataflash_spi.c not 
atmel_spi.c. See also PATCH 8/11

Best regards,
Alexander

[U-Boot] [PATCH 02/11] at91: Add USART & DBGU base address defines

[Reinhard Meyer]

Dear All concerned,
>>> On Monday 01 November 2010, 11:57:14 Andreas Bie?mann wrote:
>>>> Am 01.11.2010 um 09:29 schrieb Alexander Stein:
>>>>> Signed-off-by: Alexander Stein<alexander.stein@systec-electronic.com>
>>>>> ---
>>>>> arch/arm/include/asm/arch-at91/at91cap9.h    |   12 ++++++++----
>>>>> arch/arm/include/asm/arch-at91/at91sam9260.h |    7 +++++++
>>>>> arch/arm/include/asm/arch-at91/at91sam9261.h |    4 ++++
>>>>> arch/arm/include/asm/arch-at91/at91sam9263.h |    3 +++
>>>>> arch/arm/include/asm/arch-at91/at91sam9g45.h |    5 +++++
>>>>> arch/arm/include/asm/arch-at91/at91sam9rl.h  |    4 ++++
>>>>> 6 files changed, 31 insertions(+), 4 deletions(-)
>>>>>
>>>>> --- a/arch/arm/include/asm/arch-at91/at91sam9g45.h
>>>>> +++ b/arch/arm/include/asm/arch-at91/at91sam9g45.h
>>>>> @@ -51,9 +51,14 @@
>>>>> #define AT91SAM9G45_ID_VDEC	30	/* Video Decoder */
>>>>> #define AT91SAM9G45_ID_IRQ0	31	/* Advanced Interrupt Controller */
>>>>>
>>>>> +#define AT91_USART0_BASE	0xfff8c000
>>>>> +#define AT91_USART1_BASE	0xfff90000
>>>>> +#define AT91_USART2_BASE	0xfff94000
>>>>> +#define AT91_USART3_BASE	0xfff98000
>>>>> #define AT91_EMAC_BASE		0xfffbc000
>>>>> #define AT91_SMC_BASE		0xffffe800
>>>>> #define AT91_MATRIX_BASE	0xffffea00
>>>>> +#define AT91_DBGU_BASE		0xffffee00
>>>>> #define AT91_PIO_BASE		0xfffff200
>>>>> #define AT91_PMC_BASE		0xfffffc00
>>>>> #define AT91_RSTC_BASE		0xfffffd00
>>>>> diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl.h
>>>>> b/arch/arm/include/asm/arch-at91/at91sam9rl.h index 8eb0d4f..ffa6687
>>>>> 100644
>>>>>
>>>>>
>>>>> --- a/arch/arm/include/asm/arch-at91/at91sam9rl.h
>>>>> +++ b/arch/arm/include/asm/arch-at91/at91sam9rl.h
>>>>> @@ -44,6 +44,10 @@
>>>>> #define AT91SAM9RL_ID_AC97C	24	/* AC97 Controller */
>>>>> #define AT91SAM9RL_ID_IRQ0	31	/* Advanced Interrupt Controller (IRQ0)
>>> */
>>>>> +#define AT91_US0_BASE		0xfffb0000
>>>>> +#define AT91_US1_BASE		0xfffb4000
>>>>> +#define AT91_US2_BASE		0xfffb8000
>>>>> +#define AT91_US3_BASE		0xfffbc000
>>>>> #define AT91_SDRAMC_BASE	0xffffea00
>>>>> #define AT91_SMC_BASE		0xffffec00
>>>>> #define AT91_MATRIX_BASE	0xffffee00
>>>> can we just use one naming scheme here? I dunno whether it should be
>>>> AT91_USx or AT91_USARTx but it should be the same in any case.
>>> Yes, sure. I justed copied the dfine and reworded it to match the
>>> AT91_$COMPONENT_BASE scheme. Always using USARTx is fine though.
>> Hmm ... I just thought they have renamed their registers in spec, but all checked datasheets use US_xx for USART register names.
>> I also prefer USART here but Reinhard can you please give a comment?
> Honestly I would prefer a much more thorough cleanup on the long run
> (or instantly):
> 
> As was pointed out long ago and just now: a triple indirection of the defines
> until used in the driver is bad.
> 
> Since only one of the at91samxxxx.h files is included, all files should
> directly define the address of a component like follows:
> 
> #define ATMEL_USART0_BASE 0x'something'
> 
> Note: that I used ATMEL, not AT91, since the same components are used in
> AVR32 as well.
> 
> The name should be descriptive enough, and preferably adhere to what the
> component is called in the datasheet(s). (Hopefully its consistent there...)
> 
> Another note: even if currently there is only one incarnation of some
> peripherals like emac or mci we should try to number them starting from 0,
> e.g. ATMEL_EMAC0_BASE.
> 
> As a way to go there I can offer to make a branch at91cleanup where I
> collect all work and which allows everyone to do incremental improvements
> which can be squashed into fewer patches later. Then we don't need to base
> all patch revisions on current master.
> 
> If you see no other priority, I would delay "build-fixing" individual boards,
> but concentrate on cleanup work. Right now is the best opportunity for that
> since most boards are not building anyway and do not need to be utterly
> concerned with breaking them even more. After the cleanup is done, we can
> attend to fixing certain boards.
> 
> Work could therefore start with cleaning up the at91samxxxx.h files.
> I am also game with throwing out all LEGACY stuff and fix build problems
> that occur when they occur.
> 
> If you agree, the cleanup in the *.h files should entail:
> 
> 1. remove legacy parts
> 2. rename AT91xxxx_<component>_BASE consistently into ATMEL_<component>_BASE
> and make for example EMAC into EMAC0, I2C into I2C0. I am currently unsure if
> that needs to be done for SDRAMC, SMC. I think here we can live with SDRAMC
> and having SDRAMC1 _if_ there is a second one.
> 3. get rid of hardware.h and have a simple #if-elif-endif chain in memory_map.h
> instead. So that when memory_map.h is included and the proper #define AT91SAMxxxx
> is set we get exactly the defines valid for that SoC. memory_map.h is consistent
> with the AVR32 case. The common drivers all include memory_map.h.
> 
> This *.h cleanup could be patch 1/n of a series. Each individual driver cleanup
> to remove legacy and adapt to the naming would be 2/n, 3/n, etc. I am willing
> to collect them in the above mentioned branch and also squash incremental improvements
> later to produce a clean patch series later.

Another optical issue:

We have ATxxx_ID_yyy consistently. but

both ATxxx_BASE_yyy or ATxxx_yyy_BASE.

ATxxx_BASE_yyy would be consistent with the ID variant and look better:
ATMEL_BASE_USART0
ATMEL_BASE_SPI0
...

With best regards,
Reinhard

[U-Boot] [RFC] AT91 cleanup, was: Re: [PATCH 02/11] at91: Add USART & DBGU base address defines

[Reinhard Meyer]

Reinhard Meyer schrieb:
> Dear All concerned,
>>>> On Monday 01 November 2010, 11:57:14 Andreas Bie?mann wrote:
>>>>> Am 01.11.2010 um 09:29 schrieb Alexander Stein:
>>>>>> Signed-off-by: Alexander Stein<alexander.stein@systec-electronic.com>
...

>>>>>> #define AT91_MATRIX_BASE	0xffffee00
>>>>> can we just use one naming scheme here? I dunno whether it should be
>>>>> AT91_USx or AT91_USARTx but it should be the same in any case.
>>>> Yes, sure. I justed copied the dfine and reworded it to match the
>>>> AT91_$COMPONENT_BASE scheme. Always using USARTx is fine though.
>>> Hmm ... I just thought they have renamed their registers in spec, but all checked datasheets use US_xx for USART register names.
>>> I also prefer USART here but Reinhard can you please give a comment?
>> Honestly I would prefer a much more thorough cleanup on the long run
>> (or instantly):
>>
>> As was pointed out long ago and just now: a triple indirection of the defines
>> until used in the driver is bad.
>>
>> Since only one of the at91samxxxx.h files is included, all files should
>> directly define the address of a component like follows:
>>
>> #define ATMEL_USART0_BASE 0x'something'
>>
>> Note: that I used ATMEL, not AT91, since the same components are used in
>> AVR32 as well.
>>
>> The name should be descriptive enough, and preferably adhere to what the
>> component is called in the datasheet(s). (Hopefully its consistent there...)
>>
>> Another note: even if currently there is only one incarnation of some
>> peripherals like emac or mci we should try to number them starting from 0,
>> e.g. ATMEL_EMAC0_BASE.
>>
>> As a way to go there I can offer to make a branch at91cleanup where I
>> collect all work and which allows everyone to do incremental improvements
>> which can be squashed into fewer patches later. Then we don't need to base
>> all patch revisions on current master.
>>
>> If you see no other priority, I would delay "build-fixing" individual boards,
>> but concentrate on cleanup work. Right now is the best opportunity for that
>> since most boards are not building anyway and do not need to be utterly
>> concerned with breaking them even more. After the cleanup is done, we can
>> attend to fixing certain boards.
>>
>> Work could therefore start with cleaning up the at91samxxxx.h files.
>> I am also game with throwing out all LEGACY stuff and fix build problems
>> that occur when they occur.
>>
>> If you agree, the cleanup in the *.h files should entail:
>>
>> 1. remove legacy parts
>> 2. rename AT91xxxx_<component>_BASE consistently into ATMEL_<component>_BASE
>> and make for example EMAC into EMAC0, I2C into I2C0. I am currently unsure if
>> that needs to be done for SDRAMC, SMC. I think here we can live with SDRAMC
>> and having SDRAMC1 _if_ there is a second one.
>> 3. get rid of hardware.h and have a simple #if-elif-endif chain in memory_map.h
>> instead. So that when memory_map.h is included and the proper #define AT91SAMxxxx
>> is set we get exactly the defines valid for that SoC. memory_map.h is consistent
>> with the AVR32 case. The common drivers all include memory_map.h.
>>
>> This *.h cleanup could be patch 1/n of a series. Each individual driver cleanup
>> to remove legacy and adapt to the naming would be 2/n, 3/n, etc. I am willing
>> to collect them in the above mentioned branch and also squash incremental improvements
>> later to produce a clean patch series later.
> 
> Another optical issue:
> 
> We have ATxxx_ID_yyy consistently. but
> 
> both ATxxx_BASE_yyy or ATxxx_yyy_BASE.
> 
> ATxxx_BASE_yyy would be consistent with the ID variant and look better:
> ATMEL_BASE_USART0
> ATMEL_BASE_SPI0
> ...

I leaped a bit ahead there, and did some cleanups already. Note that they are
not complete and are up for discussion. In order to avoid flooding the list with
patches, you can have a look at u-boot-atmel, at91cleanup branch.

With best regards,
Reinhard

[U-Boot] [RFC] AT91 cleanup, was: Re: [PATCH 02/11] at91: Add USART & DBGU base address defines

[Alexander Stein]

Hello,

On Tuesday 02 November 2010, 15:11:00 Reinhard Meyer wrote:
> I leaped a bit ahead there, and did some cleanups already. Note that they
> are not complete and are up for discussion. In order to avoid flooding the
> list with patches, you can have a look at u-boot-atmel, at91cleanup
> branch.

At a first look it seems OK to me. Could be a good starting base.

Best regards,
Alexander

[U-Boot] [RFC] AT91 cleanup, was: Re: [PATCH 02/11] at91: Add USART & DBGU base address defines

[Reinhard Meyer]

Dear Alexander Stein,

> Hello,
> 
> On Tuesday 02 November 2010, 15:11:00 Reinhard Meyer wrote:
>> I leaped a bit ahead there, and did some cleanups already. Note that they
>> are not complete and are up for discussion. In order to avoid flooding the
>> list with patches, you can have a look at u-boot-atmel, at91cleanup
>> branch.
> 
> At a first look it seems OK to me. Could be a good starting base.

Thank you. I see the following issues left:

Basically all legacy is gone in the drivers I use for TOP9000, except
for accesses to SMC, PMC and MATRIX.

When that is fixed arch/asm/io.h is not needed anymore.

ATMEL_ID_EMAC --> ATMEL_ID_EMAC0

CONFIG_USART_ID should be set to ATMEL_ID_USARTx to be prepared once
there are different clock domains per USART (this is not the case right
now on AT91 SoCs, but used in AVR32)

CONFIG_SYS_AT91_xxx_CLOCK could be shorter: CONFIG_SYS_xxx_CLOCK

AVR32 includes "memory-map.h", AT91 did include "hardware.h".
I changed that to "memory-map.h" and deleted hardware.h. However
including "hardware.h" seems common in other architectures. We could
go for hardware.h and adapt the AVR32 case.

Finally eliminate all LEGACY definitions in the header files.

...?

Best Regards,
Reinhard

[U-Boot] [RFC] AT91 cleanup, was: Re: [PATCH 02/11] at91: Add USART & DBGU base address defines

[Andreas Bießmann]

Dear Reinhard Meyer,
Am 03.11.2010 10:17, schrieb Reinhard Meyer:

> ATMEL_ID_EMAC --> ATMEL_ID_EMAC0

emac? isn't the sam9/avr32 mac called macb?

> AVR32 includes "memory-map.h", AT91 did include "hardware.h".
> I changed that to "memory-map.h" and deleted hardware.h. However
> including "hardware.h" seems common in other architectures. We could
> go for hardware.h and adapt the AVR32 case.

I prefer hardware.h, will change avr32 case cause i am currently working
with avr32 board.

> Finally eliminate all LEGACY definitions in the header files.

would be fine

regards

Andreas Bie?mann

[U-Boot] [RFC] AT91 cleanup, was: Re: [PATCH 02/11] at91: Add USART & DBGU base address defines

[Reinhard Meyer]

Andreas Bie?mann schrieb:
> Dear Reinhard Meyer,
> Am 03.11.2010 10:17, schrieb Reinhard Meyer:
> 
>> ATMEL_ID_EMAC --> ATMEL_ID_EMAC0
> 
> emac? isn't the sam9/avr32 mac called macb?

In AT91 its called EMAC, but uses the MACB driver. Ask ATMEL why it is named
differently :)
The value ATMEL_BASE_EMAC0 is a parameter to the MACB driver, so it does not
matter how it is named.

I try to use the component names as used in the chapter headers of the
datasheets. Where it is likely that there are multiple incarnations of the
same component in the future, I will number the only one with "0".
(There are 2x EMAC variants of the AT91 in the cooker).

>> AVR32 includes "memory-map.h", AT91 did include "hardware.h".
>> I changed that to "memory-map.h" and deleted hardware.h. However
>> including "hardware.h" seems common in other architectures. We could
>> go for hardware.h and adapt the AVR32 case.
> 
> I prefer hardware.h, will change avr32 case cause i am currently working
> with avr32 board.

Do you have a ATNGW100 to check changes for that one?
Ok, I will undo the changes and remove "memory-map.h" instead.

>> Finally eliminate all LEGACY definitions in the header files.
> 
> would be fine

All in at91sam9260.h have gone already.

Best Regards,
Reinhard

[U-Boot] [PATCH 1/2] [RFC] AVR32: move memory-map.h to hardware.h

[Andreas Bießmann]

 - fixup address definitions as done in at91
 - fixup required files in arch/avr32

Signed-off-by: Andreas Bie?mann <biessmann@corscience.de>
---
 arch/avr32/cpu/at32ap700x/clk.c                    |    2 +-
 arch/avr32/cpu/at32ap700x/portmux.c                |    2 +-
 arch/avr32/cpu/at32ap700x/sm.h                     |    4 +-
 arch/avr32/cpu/cpu.c                               |    2 +-
 arch/avr32/cpu/hsdramc.c                           |    2 +-
 arch/avr32/cpu/hsdramc1.h                          |    4 +-
 arch/avr32/cpu/hsmc3.h                             |    4 +-
 arch/avr32/cpu/interrupts.c                        |    4 +-
 arch/avr32/cpu/portmux-gpio.c                      |    2 +-
 arch/avr32/cpu/portmux-pio.c                       |    2 +-
 arch/avr32/include/asm/arch-at32ap700x/gpio.h      |   12 ++--
 arch/avr32/include/asm/arch-at32ap700x/hardware.h  |   86 ++++++++++++++++++++
 .../avr32/include/asm/arch-at32ap700x/memory-map.h |   86 --------------------
 arch/avr32/include/asm/arch-at32ap700x/portmux.h   |   10 +-
 arch/avr32/include/asm/hmatrix-common.h            |    2 +-
 15 files changed, 112 insertions(+), 112 deletions(-)
 create mode 100644 arch/avr32/include/asm/arch-at32ap700x/hardware.h
 delete mode 100644 arch/avr32/include/asm/arch-at32ap700x/memory-map.h

diff --git a/arch/avr32/cpu/at32ap700x/clk.c b/arch/avr32/cpu/at32ap700x/clk.c
index 742bc6b..b63b9df 100644
--- a/arch/avr32/cpu/at32ap700x/clk.c
+++ b/arch/avr32/cpu/at32ap700x/clk.c
@@ -24,7 +24,7 @@
 #include <asm/io.h>
 
 #include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/portmux.h>
 
 #include "sm.h"
diff --git a/arch/avr32/cpu/at32ap700x/portmux.c b/arch/avr32/cpu/at32ap700x/portmux.c
index b1f2c6f..e3e38a2 100644
--- a/arch/avr32/cpu/at32ap700x/portmux.c
+++ b/arch/avr32/cpu/at32ap700x/portmux.c
@@ -24,7 +24,7 @@
 #include <asm/io.h>
 
 #include <asm/arch/chip-features.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/portmux.h>
 
 /*
diff --git a/arch/avr32/cpu/at32ap700x/sm.h b/arch/avr32/cpu/at32ap700x/sm.h
index b6e4409..9a3804e 100644
--- a/arch/avr32/cpu/at32ap700x/sm.h
+++ b/arch/avr32/cpu/at32ap700x/sm.h
@@ -197,8 +197,8 @@
 
 /* Register access macros */
 #define sm_readl(reg)					\
-	readl((void *)SM_BASE + SM_##reg)
+	readl((void *)ATMEL_BASE_SM + SM_##reg)
 #define sm_writel(reg,value)				\
-	writel((value), (void *)SM_BASE + SM_##reg)
+	writel((value), (void *)ATMEL_BASE_SM + SM_##reg)
 
 #endif /* __CPU_AT32AP_SM_H__ */
diff --git a/arch/avr32/cpu/cpu.c b/arch/avr32/cpu/cpu.c
index e4489bb..7907837 100644
--- a/arch/avr32/cpu/cpu.c
+++ b/arch/avr32/cpu/cpu.c
@@ -27,7 +27,7 @@
 #include <asm/sysreg.h>
 
 #include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #include "hsmc3.h"
 
diff --git a/arch/avr32/cpu/hsdramc.c b/arch/avr32/cpu/hsdramc.c
index b6eae66..1485494 100644
--- a/arch/avr32/cpu/hsdramc.c
+++ b/arch/avr32/cpu/hsdramc.c
@@ -25,7 +25,7 @@
 #include <asm/sdram.h>
 
 #include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #include "hsdramc1.h"
 
diff --git a/arch/avr32/cpu/hsdramc1.h b/arch/avr32/cpu/hsdramc1.h
index 305d2cb..e18e074 100644
--- a/arch/avr32/cpu/hsdramc1.h
+++ b/arch/avr32/cpu/hsdramc1.h
@@ -136,8 +136,8 @@
 
 /* Register access macros */
 #define hsdramc1_readl(reg)					\
-	readl((void *)HSDRAMC_BASE + HSDRAMC1_##reg)
+	readl((void *)ATMEL_BASE_HSDRAMC + HSDRAMC1_##reg)
 #define hsdramc1_writel(reg,value)				\
-	writel((value), (void *)HSDRAMC_BASE + HSDRAMC1_##reg)
+	writel((value), (void *)ATMEL_BASE_HSDRAMC + HSDRAMC1_##reg)
 
 #endif /* __ASM_AVR32_HSDRAMC1_H__ */
diff --git a/arch/avr32/cpu/hsmc3.h b/arch/avr32/cpu/hsmc3.h
index ca533b9..ac47295 100644
--- a/arch/avr32/cpu/hsmc3.h
+++ b/arch/avr32/cpu/hsmc3.h
@@ -119,8 +119,8 @@
 
 /* Register access macros */
 #define hsmc3_readl(reg)					\
-	readl((void *)HSMC_BASE + HSMC3_##reg)
+	readl((void *)ATMEL_BASE_HSMC + HSMC3_##reg)
 #define hsmc3_writel(reg,value)					\
-	writel((value), (void *)HSMC_BASE + HSMC3_##reg)
+	writel((value), (void *)ATMEL_BASE_HSMC + HSMC3_##reg)
 
 #endif /* __CPU_AT32AP_HSMC3_H__ */
diff --git a/arch/avr32/cpu/interrupts.c b/arch/avr32/cpu/interrupts.c
index c6d8d16..c6ea435 100644
--- a/arch/avr32/cpu/interrupts.c
+++ b/arch/avr32/cpu/interrupts.c
@@ -27,7 +27,7 @@
 #include <asm/processor.h>
 #include <asm/sysreg.h>
 
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #define HANDLER_MASK	0x00ffffff
 #define INTLEV_SHIFT	30
@@ -125,7 +125,7 @@ static int set_interrupt_handler(unsigned int nr, void (*handler)(void),
 
 	intpr = (handler_addr & HANDLER_MASK);
 	intpr |= (priority & INTLEV_MASK) << INTLEV_SHIFT;
-	writel(intpr, (void *)INTC_BASE + 4 * nr);
+	writel(intpr, (void *)ATMEL_BASE_INTC + 4 * nr);
 
 	return 0;
 }
diff --git a/arch/avr32/cpu/portmux-gpio.c b/arch/avr32/cpu/portmux-gpio.c
index 9acd040..7b64c89 100644
--- a/arch/avr32/cpu/portmux-gpio.c
+++ b/arch/avr32/cpu/portmux-gpio.c
@@ -22,7 +22,7 @@
 #include <common.h>
 
 #include <asm/io.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/gpio.h>
 
 void portmux_select_peripheral(void *port, unsigned long pin_mask,
diff --git a/arch/avr32/cpu/portmux-pio.c b/arch/avr32/cpu/portmux-pio.c
index a29f94e..cb5e962 100644
--- a/arch/avr32/cpu/portmux-pio.c
+++ b/arch/avr32/cpu/portmux-pio.c
@@ -22,7 +22,7 @@
 #include <common.h>
 
 #include <asm/io.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/gpio.h>
 
 void portmux_select_peripheral(void *port, unsigned long pin_mask,
diff --git a/arch/avr32/include/asm/arch-at32ap700x/gpio.h b/arch/avr32/include/asm/arch-at32ap700x/gpio.h
index 303e353..4322eac 100644
--- a/arch/avr32/include/asm/arch-at32ap700x/gpio.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/gpio.h
@@ -23,7 +23,7 @@
 #define __ASM_AVR32_ARCH_GPIO_H__
 
 #include <asm/arch/chip-features.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #define NR_GPIO_CONTROLLERS	5
 
@@ -45,15 +45,15 @@ static inline void *pio_pin_to_port(unsigned int pin)
 {
 	switch (pin >> 5) {
 	case 0:
-		return (void *)PIOA_BASE;
+		return (void *)ATMEL_BASE_PIOA;
 	case 1:
-		return (void *)PIOB_BASE;
+		return (void *)ATMEL_BASE_PIOB;
 	case 2:
-		return (void *)PIOC_BASE;
+		return (void *)ATMEL_BASE_PIOC;
 	case 3:
-		return (void *)PIOD_BASE;
+		return (void *)ATMEL_BASE_PIOD;
 	case 4:
-		return (void *)PIOE_BASE;
+		return (void *)ATMEL_BASE_PIOE;
 	default:
 		return NULL;
 	}
diff --git a/arch/avr32/include/asm/arch-at32ap700x/hardware.h b/arch/avr32/include/asm/arch-at32ap700x/hardware.h
new file mode 100644
index 0000000..9172eef
--- /dev/null
+++ b/arch/avr32/include/asm/arch-at32ap700x/hardware.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (C) 2005-2006 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __AT32AP7000_HARDWARE_H__
+#define __AT32AP7000_HARDWARE_H__
+
+/* Internal and external memories */
+#define EBI_SRAM_CS0_BASE			0x00000000
+#define EBI_SRAM_CS0_SIZE			0x04000000
+#define EBI_SRAM_CS4_BASE			0x04000000
+#define EBI_SRAM_CS4_SIZE			0x04000000
+#define EBI_SRAM_CS2_BASE			0x08000000
+#define EBI_SRAM_CS2_SIZE			0x04000000
+#define EBI_SRAM_CS3_BASE			0x0c000000
+#define EBI_SRAM_CS3_SIZE			0x04000000
+#define EBI_SRAM_CS1_BASE			0x10000000
+#define EBI_SRAM_CS1_SIZE			0x10000000
+#define EBI_SRAM_CS5_BASE			0x20000000
+#define EBI_SRAM_CS5_SIZE			0x04000000
+
+#define EBI_SDRAM_BASE				EBI_SRAM_CS1_BASE
+#define EBI_SDRAM_SIZE				EBI_SRAM_CS1_SIZE
+
+#define INTERNAL_SRAM_BASE			0x24000000
+#define INTERNAL_SRAM_SIZE			0x00008000
+
+/* Devices on the High Speed Bus (HSB) */
+#define LCDC_BASE					0xFF000000
+#define DMAC_BASE					0xFF200000
+#define USB_FIFO					0xFF300000
+
+/* Devices on Peripheral Bus A (PBA) */
+#define ATMEL_BASE_SPI0				0xFFE00000
+#define ATMEL_BASE_SPI1				0xFFE00400
+#define ATMEL_BASE_TWI0				0xFFE00800
+#define ATMEL_BASE_USART0			0xFFE00C00
+#define ATMEL_BASE_USART1			0xFFE01000
+#define ATMEL_BASE_USART2			0xFFE01400
+#define ATMEL_BASE_USART3			0xFFE01800
+#define ATMEL_BASE_SSC0				0xFFE01C00
+#define ATMEL_BASE_SSC1				0xFFE02000
+#define ATMEL_BASE_SSC2				0xFFE02400
+#define ATMEL_BASE_PIOA				0xFFE02800
+#define ATMEL_BASE_PIOB				0xFFE02C00
+#define ATMEL_BASE_PIOC				0xFFE03000
+#define ATMEL_BASE_PIOD				0xFFE03400
+#define ATMEL_BASE_PIOE				0xFFE03800
+#define ATMEL_BASE_PSIF				0xFFE03C00
+
+/* Devices on Peripheral Bus B (PBB) */
+#define ATMEL_BASE_SM				0xFFF00000
+#define ATMEL_BASE_INTC				0xFFF00400
+#define ATMEL_BASE_HMATRIX			0xFFF00800
+#define ATMEL_BASE_TIMER0			0xFFF00C00
+#define ATMEL_BASE_TIMER1			0xFFF01000
+#define ATMEL_BASE_PWM				0xFFF01400
+#define ATMEL_BASE_MACB0			0xFFF01800
+#define ATMEL_BASE_MACB1			0xFFF01C00
+#define ATMEL_BASE_DAC				0xFFF02000
+#define ATMEL_BASE_MMCI				0xFFF02400
+#define ATMEL_BASE_AUDIOC			0xFFF02800
+#define ATMEL_BASE_HISI				0xFFF02C00
+#define ATMEL_BASE_USB				0xFFF03000
+#define ATMEL_BASE_HSMC				0xFFF03400
+#define ATMEL_BASE_HSDRAMC			0xFFF03800
+#define ATMEL_BASE_ECC				0xFFF03C00
+
+#endif /* __AT32AP7000_HARDWARE_H__ */
diff --git a/arch/avr32/include/asm/arch-at32ap700x/memory-map.h b/arch/avr32/include/asm/arch-at32ap700x/memory-map.h
deleted file mode 100644
index 6592c03..0000000
--- a/arch/avr32/include/asm/arch-at32ap700x/memory-map.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * Copyright (C) 2005-2006 Atmel Corporation
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#ifndef __AT32AP7000_MEMORY_MAP_H__
-#define __AT32AP7000_MEMORY_MAP_H__
-
-/* Internal and external memories */
-#define EBI_SRAM_CS0_BASE			0x00000000
-#define EBI_SRAM_CS0_SIZE			0x04000000
-#define EBI_SRAM_CS4_BASE			0x04000000
-#define EBI_SRAM_CS4_SIZE			0x04000000
-#define EBI_SRAM_CS2_BASE			0x08000000
-#define EBI_SRAM_CS2_SIZE			0x04000000
-#define EBI_SRAM_CS3_BASE			0x0c000000
-#define EBI_SRAM_CS3_SIZE			0x04000000
-#define EBI_SRAM_CS1_BASE			0x10000000
-#define EBI_SRAM_CS1_SIZE			0x10000000
-#define EBI_SRAM_CS5_BASE			0x20000000
-#define EBI_SRAM_CS5_SIZE			0x04000000
-
-#define EBI_SDRAM_BASE				EBI_SRAM_CS1_BASE
-#define EBI_SDRAM_SIZE				EBI_SRAM_CS1_SIZE
-
-#define INTERNAL_SRAM_BASE			0x24000000
-#define INTERNAL_SRAM_SIZE			0x00008000
-
-/* Devices on the High Speed Bus (HSB) */
-#define LCDC_BASE				0xFF000000
-#define DMAC_BASE				0xFF200000
-#define USB_FIFO				0xFF300000
-
-/* Devices on Peripheral Bus A (PBA) */
-#define SPI0_BASE				0xFFE00000
-#define SPI1_BASE				0xFFE00400
-#define TWI_BASE				0xFFE00800
-#define USART0_BASE				0xFFE00C00
-#define USART1_BASE				0xFFE01000
-#define USART2_BASE				0xFFE01400
-#define USART3_BASE				0xFFE01800
-#define SSC0_BASE				0xFFE01C00
-#define SSC1_BASE				0xFFE02000
-#define SSC2_BASE				0xFFE02400
-#define PIOA_BASE				0xFFE02800
-#define PIOB_BASE				0xFFE02C00
-#define PIOC_BASE				0xFFE03000
-#define PIOD_BASE				0xFFE03400
-#define PIOE_BASE				0xFFE03800
-#define PSIF_BASE				0xFFE03C00
-
-/* Devices on Peripheral Bus B (PBB) */
-#define SM_BASE					0xFFF00000
-#define INTC_BASE				0xFFF00400
-#define HMATRIX_BASE				0xFFF00800
-#define TIMER0_BASE				0xFFF00C00
-#define TIMER1_BASE				0xFFF01000
-#define PWM_BASE				0xFFF01400
-#define MACB0_BASE				0xFFF01800
-#define MACB1_BASE				0xFFF01C00
-#define DAC_BASE				0xFFF02000
-#define MMCI_BASE				0xFFF02400
-#define AUDIOC_BASE				0xFFF02800
-#define HISI_BASE				0xFFF02C00
-#define USB_BASE				0xFFF03000
-#define HSMC_BASE				0xFFF03400
-#define HSDRAMC_BASE				0xFFF03800
-#define ECC_BASE				0xFFF03C00
-
-#endif /* __AT32AP7000_MEMORY_MAP_H__ */
diff --git a/arch/avr32/include/asm/arch-at32ap700x/portmux.h b/arch/avr32/include/asm/arch-at32ap700x/portmux.h
index 1ba52e5..859c121 100644
--- a/arch/avr32/include/asm/arch-at32ap700x/portmux.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/portmux.h
@@ -24,11 +24,11 @@
 
 #include <asm/arch/gpio.h>
 
-#define PORTMUX_PORT_A		((void *)PIOA_BASE)
-#define PORTMUX_PORT_B		((void *)PIOB_BASE)
-#define PORTMUX_PORT_C		((void *)PIOC_BASE)
-#define PORTMUX_PORT_D		((void *)PIOD_BASE)
-#define PORTMUX_PORT_E		((void *)PIOE_BASE)
+#define PORTMUX_PORT_A		((void *)ATMEL_BASE_PIOA)
+#define PORTMUX_PORT_B		((void *)ATMEL_BASE_PIOB)
+#define PORTMUX_PORT_C		((void *)ATMEL_BASE_PIOC)
+#define PORTMUX_PORT_D		((void *)ATMEL_BASE_PIOD)
+#define PORTMUX_PORT_E		((void *)ATMEL_BASE_PIOE)
 
 void portmux_enable_ebi(unsigned int bus_width, unsigned int addr_width,
 		unsigned long flags, unsigned long drive_strength);
diff --git a/arch/avr32/include/asm/hmatrix-common.h b/arch/avr32/include/asm/hmatrix-common.h
index 4b7e610..9a86fe4 100644
--- a/arch/avr32/include/asm/hmatrix-common.h
+++ b/arch/avr32/include/asm/hmatrix-common.h
@@ -117,7 +117,7 @@ struct hmatrix_regs {
 
 /* Register access macros */
 #define __hmatrix_reg(reg)					\
-	(((volatile struct hmatrix_regs *)HMATRIX_BASE)->reg)
+	(((volatile struct hmatrix_regs *)ATMEL_BASE_HMATRIX)->reg)
 #define hmatrix_read(reg)					\
 	(__hmatrix_reg(reg))
 #define hmatrix_write(reg, value)				\
-- 
1.7.2.3

[U-Boot] [PATCH 2/2] [RFC] drivers:atmel-related: fixup include to hardware.h

[Andreas Bießmann]

 - change includes from memory-map.h to hardware.h
 - fixup mmci_writel()/mmci_readl()

Signed-off-by: Andreas Bie?mann <biessmann@corscience.de>
---
 drivers/mmc/atmel_mci.c      |    2 +-
 drivers/mmc/atmel_mci.h      |    4 ++--
 drivers/mmc/gen_atmel_mci.c  |    2 +-
 drivers/serial/atmel_usart.c |    2 +-
 drivers/spi/atmel_spi.c      |    2 +-
 5 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/mmc/atmel_mci.c b/drivers/mmc/atmel_mci.c
index 3946ffe..0af8d42 100644
--- a/drivers/mmc/atmel_mci.c
+++ b/drivers/mmc/atmel_mci.c
@@ -28,7 +28,7 @@
 #include <asm/errno.h>
 #include <asm/byteorder.h>
 #include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #include "atmel_mci.h"
 
diff --git a/drivers/mmc/atmel_mci.h b/drivers/mmc/atmel_mci.h
index 823a77d..90ab6a8 100644
--- a/drivers/mmc/atmel_mci.h
+++ b/drivers/mmc/atmel_mci.h
@@ -238,8 +238,8 @@ typedef struct atmel_mci {
  * Register access macros
  */
 #define mmci_readl(reg)					\
-	readl((void *)MMCI_BASE + MMCI_##reg)
+	readl((void *)ATMEL_BASE_MMCI + MMCI_##reg)
 #define mmci_writel(reg,value)				\
-	writel((value), (void *)MMCI_BASE + MMCI_##reg)
+	writel((value), (void *)ATMEL_BASE_MMCI + MMCI_##reg)
 
 #endif /* __CPU_AT32AP_ATMEL_MCI_H__ */
diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
index fa4df99..5463250 100644
--- a/drivers/mmc/gen_atmel_mci.c
+++ b/drivers/mmc/gen_atmel_mci.c
@@ -33,7 +33,7 @@
 #include <asm/errno.h>
 #include <asm/byteorder.h>
 #include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 #include "atmel_mci.h"
 
 #ifndef CONFIG_SYS_MMC_CLK_OD
diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
index fb5375d..cb45fa2 100644
--- a/drivers/serial/atmel_usart.c
+++ b/drivers/serial/atmel_usart.c
@@ -23,7 +23,7 @@
 
 #include <asm/io.h>
 #include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #include "atmel_usart.h"
 
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 99470c7..33e38b6 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -26,7 +26,7 @@
 #include <asm/io.h>
 
 #include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #include "atmel_spi.h"
 
-- 
1.7.2.3

[U-Boot] [RFC] AT91 cleanup, was: Re: [PATCH 02/11] at91: Add USART & DBGU base address defines

[Andreas Bießmann]

Dear Reinhard Meyer,

Am 03.11.2010 11:03, schrieb Reinhard Meyer:
> Andreas Bie?mann schrieb:
>> Dear Reinhard Meyer,
>> Am 03.11.2010 10:17, schrieb Reinhard Meyer:

>> I prefer hardware.h, will change avr32 case cause i am currently working
>> with avr32 board.
> 
> Do you have a ATNGW100 to check changes for that one?
No, I have a stk1002. But the RFC patch just sent was only tested on my
own board.

> Ok, I will undo the changes and remove "memory-map.h" instead.

sounds good

regards

Andreas Bie?mann

[U-Boot] [PATCH 1/2] [RFC] AVR32: move memory-map.h to hardware.h

[Reinhard Meyer]

Dear Andreas Bie?mann,
>  - fixup address definitions as done in at91
>  - fixup required files in arch/avr32
> 
> Signed-off-by: Andreas Bie?mann <biessmann@corscience.de>
> ---

>  create mode 100644 arch/avr32/include/asm/arch-at32ap700x/hardware.h
>  delete mode 100644 arch/avr32/include/asm/arch-at32ap700x/memory-map.h

You should use git mv <old> <new> and then git format-patch -C to have
a rename operation in the patch. So everyone later can see it was a rename
with subsequent edit.

And then checkpatch complains as follows:

ERROR: patch seems to be corrupt (line wrapped?)
#71: FILE: arch/avr32/cpu/at32ap700x/clk.c:24:
=20

WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt
#467: FILE: arch/avr32/include/asm/hmatrix-common.h:119:
+	(((volatile struct hmatrix_regs *)ATMEL_BASE_HMATRIX)->reg)

total: 1 errors, 1 warnings, 275 lines checked

The warning can be ignored.

Best Regards,
Reinhard

[U-Boot] [PATCH 2/2] [RFC] drivers:atmel-related: fixup include to hardware.h

[Reinhard Meyer]

Dear Andreas Bie?mann,
>  - change includes from memory-map.h to hardware.h
>  - fixup mmci_writel()/mmci_readl()
> 
> Signed-off-by: Andreas Bie?mann <biessmann@corscience.de>
> ---
>  drivers/mmc/atmel_mci.c      |    2 +-
>  drivers/mmc/atmel_mci.h      |    4 ++--
>  drivers/mmc/gen_atmel_mci.c  |    2 +-
>  drivers/serial/atmel_usart.c |    2 +-
>  drivers/spi/atmel_spi.c      |    2 +-
>  5 files changed, 6 insertions(+), 6 deletions(-)

ERROR: patch seems to be corrupt (line wrapped?)
#60: FILE: drivers/mmc/atmel_mci.c:31:
=20

total: 1 errors, 0 warnings, 57 lines checked

I'll fix that while applying.

Best Regards,
Reinhard

[U-Boot] [PATCH 1/2] [RFC] AVR32: move memory-map.h to hardware.h

[Reinhard Meyer]

Dear Andreas Bie?mann,
>  - fixup address definitions as done in at91
>  - fixup required files in arch/avr32

Please also rebase onto the at91cleanup-rework branch,
three common files (usart, spi, gen_mci) were fixed by me
already, since they are used in my top9000 board.

Best Regards,
Reinhard

[U-Boot] [PATCH 06/11] at91: Add defines for spi SoC access

[Thomas Petazzoni]

On Mon, 01 Nov 2010 13:31:38 +0100
Reinhard Meyer <u-boot@emk-elektronik.de> wrote:

> In this particular case the driver is not yet using the (existing) struct
> at91_spi at all....
> 
> 
> WAIT....!!!
> 
> There is the COMMON driver atmel_spi.c with atmel_spi.h in drivers/spi.
> 
> There need not be and should not be an at91_spi.h; or do I miss
> something here?

On this topic, see the thread at
http://lists.denx.de/pipermail/u-boot/2010-June/072208.html

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[U-Boot] [PATCH v2 0/2] adopt avr32 to latest changes in u-boot-atmel/at91cleanup-rework

[Andreas Bießmann]

Dear Reinhard Meyer,

This series is on top of da94dc9ab80b30da0cd3ecadea27fd04f03a4489 in
u-boot-atmel/at91cleanup-rework. It renames memory-map.h to hardware.h and do
the rename of definitions like ATMEL_BASE_xx schema used in at91.

Tested to work on atstk1002 and selfmade, not jet upstream board.

regards

Andreas Bie?mann

Andreas Bie?mann (2):
  avr32: rename memory-map.h -> hardware.h
  avr32: fixup definitions to ATMEL_BASE_xxx

 arch/avr32/cpu/at32ap700x/clk.c                    |    2 +-
 arch/avr32/cpu/at32ap700x/portmux.c                |    2 +-
 arch/avr32/cpu/at32ap700x/sm.h                     |    4 +-
 arch/avr32/cpu/cpu.c                               |    2 +-
 arch/avr32/cpu/hsdramc.c                           |    2 +-
 arch/avr32/cpu/hsdramc1.h                          |    4 +-
 arch/avr32/cpu/hsmc3.h                             |    4 +-
 arch/avr32/cpu/interrupts.c                        |    4 +-
 arch/avr32/cpu/portmux-gpio.c                      |    2 +-
 arch/avr32/cpu/portmux-pio.c                       |    2 +-
 arch/avr32/include/asm/arch-at32ap700x/gpio.h      |   12 ++--
 .../arch-at32ap700x/{memory-map.h => hardware.h}   |   76 ++++++++++----------
 arch/avr32/include/asm/arch-at32ap700x/portmux.h   |   10 ++--
 arch/avr32/include/asm/hmatrix-common.h            |    2 +-
 board/atmel/atngw100/atngw100.c                    |    4 +-
 board/atmel/atstk1000/atstk1000.c                  |    4 +-
 board/earthlcd/favr-32-ezkit/favr-32-ezkit.c       |    2 +-
 board/mimc/mimc200/mimc200.c                       |    4 +-
 board/miromico/hammerhead/hammerhead.c             |    4 +-
 drivers/mmc/atmel_mci.c                            |    2 +-
 drivers/mmc/atmel_mci.h                            |    4 +-
 include/configs/atngw100.h                         |    6 +-
 include/configs/atstk1002.h                        |    8 +--
 include/configs/atstk1003.h                        |    8 +--
 include/configs/atstk1004.h                        |    8 +--
 include/configs/atstk1006.h                        |    8 +--
 include/configs/favr-32-ezkit.h                    |    8 +--
 include/configs/hammerhead.h                       |    3 +-
 include/configs/mimc200.h                          |    6 +-
 29 files changed, 100 insertions(+), 107 deletions(-)
 rename arch/avr32/include/asm/arch-at32ap700x/{memory-map.h => hardware.h} (53%)

-- 
1.7.2.3

[U-Boot] [PATCH v2 1/2] avr32: rename memory-map.h -> hardware.h

[Andreas Bießmann]

Signed-off-by: Andreas Bie?mann <biessmann@corscience.de>
---
changes since v1:
 - only rename in this patch and fixup includes in respective includes
 - use 'format-patch -C'

 arch/avr32/cpu/at32ap700x/clk.c                    |    2 +-
 arch/avr32/cpu/at32ap700x/portmux.c                |    2 +-
 arch/avr32/cpu/cpu.c                               |    2 +-
 arch/avr32/cpu/hsdramc.c                           |    2 +-
 arch/avr32/cpu/interrupts.c                        |    2 +-
 arch/avr32/cpu/portmux-gpio.c                      |    2 +-
 arch/avr32/cpu/portmux-pio.c                       |    2 +-
 arch/avr32/include/asm/arch-at32ap700x/gpio.h      |    2 +-
 .../arch-at32ap700x/{memory-map.h => hardware.h}   |    0
 board/miromico/hammerhead/hammerhead.c             |    2 +-
 drivers/mmc/atmel_mci.c                            |    2 +-
 include/configs/atngw100.h                         |    2 +-
 include/configs/atstk1002.h                        |    2 +-
 include/configs/atstk1003.h                        |    2 +-
 include/configs/atstk1004.h                        |    2 +-
 include/configs/atstk1006.h                        |    2 +-
 include/configs/favr-32-ezkit.h                    |    2 +-
 include/configs/mimc200.h                          |    2 +-
 18 files changed, 17 insertions(+), 17 deletions(-)
 rename arch/avr32/include/asm/arch-at32ap700x/{memory-map.h => hardware.h} (100%)

diff --git a/arch/avr32/cpu/at32ap700x/clk.c b/arch/avr32/cpu/at32ap700x/clk.c
index 742bc6b..b63b9df 100644
--- a/arch/avr32/cpu/at32ap700x/clk.c
+++ b/arch/avr32/cpu/at32ap700x/clk.c
@@ -24,7 +24,7 @@
 #include <asm/io.h>
 
 #include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/portmux.h>
 
 #include "sm.h"
diff --git a/arch/avr32/cpu/at32ap700x/portmux.c b/arch/avr32/cpu/at32ap700x/portmux.c
index b1f2c6f..e3e38a2 100644
--- a/arch/avr32/cpu/at32ap700x/portmux.c
+++ b/arch/avr32/cpu/at32ap700x/portmux.c
@@ -24,7 +24,7 @@
 #include <asm/io.h>
 
 #include <asm/arch/chip-features.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/portmux.h>
 
 /*
diff --git a/arch/avr32/cpu/cpu.c b/arch/avr32/cpu/cpu.c
index e4489bb..7907837 100644
--- a/arch/avr32/cpu/cpu.c
+++ b/arch/avr32/cpu/cpu.c
@@ -27,7 +27,7 @@
 #include <asm/sysreg.h>
 
 #include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #include "hsmc3.h"
 
diff --git a/arch/avr32/cpu/hsdramc.c b/arch/avr32/cpu/hsdramc.c
index b6eae66..1485494 100644
--- a/arch/avr32/cpu/hsdramc.c
+++ b/arch/avr32/cpu/hsdramc.c
@@ -25,7 +25,7 @@
 #include <asm/sdram.h>
 
 #include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #include "hsdramc1.h"
 
diff --git a/arch/avr32/cpu/interrupts.c b/arch/avr32/cpu/interrupts.c
index c6d8d16..c751981 100644
--- a/arch/avr32/cpu/interrupts.c
+++ b/arch/avr32/cpu/interrupts.c
@@ -27,7 +27,7 @@
 #include <asm/processor.h>
 #include <asm/sysreg.h>
 
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #define HANDLER_MASK	0x00ffffff
 #define INTLEV_SHIFT	30
diff --git a/arch/avr32/cpu/portmux-gpio.c b/arch/avr32/cpu/portmux-gpio.c
index 9acd040..7b64c89 100644
--- a/arch/avr32/cpu/portmux-gpio.c
+++ b/arch/avr32/cpu/portmux-gpio.c
@@ -22,7 +22,7 @@
 #include <common.h>
 
 #include <asm/io.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/gpio.h>
 
 void portmux_select_peripheral(void *port, unsigned long pin_mask,
diff --git a/arch/avr32/cpu/portmux-pio.c b/arch/avr32/cpu/portmux-pio.c
index a29f94e..cb5e962 100644
--- a/arch/avr32/cpu/portmux-pio.c
+++ b/arch/avr32/cpu/portmux-pio.c
@@ -22,7 +22,7 @@
 #include <common.h>
 
 #include <asm/io.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/gpio.h>
 
 void portmux_select_peripheral(void *port, unsigned long pin_mask,
diff --git a/arch/avr32/include/asm/arch-at32ap700x/gpio.h b/arch/avr32/include/asm/arch-at32ap700x/gpio.h
index 303e353..b0254f2 100644
--- a/arch/avr32/include/asm/arch-at32ap700x/gpio.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/gpio.h
@@ -23,7 +23,7 @@
 #define __ASM_AVR32_ARCH_GPIO_H__
 
 #include <asm/arch/chip-features.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #define NR_GPIO_CONTROLLERS	5
 
diff --git a/arch/avr32/include/asm/arch-at32ap700x/memory-map.h b/arch/avr32/include/asm/arch-at32ap700x/hardware.h
similarity index 100%
rename from arch/avr32/include/asm/arch-at32ap700x/memory-map.h
rename to arch/avr32/include/asm/arch-at32ap700x/hardware.h
diff --git a/board/miromico/hammerhead/hammerhead.c b/board/miromico/hammerhead/hammerhead.c
index 78f4fd4..a0794ba 100644
--- a/board/miromico/hammerhead/hammerhead.c
+++ b/board/miromico/hammerhead/hammerhead.c
@@ -29,7 +29,7 @@
 #include <asm/sdram.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/hmatrix.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/mmu.h>
 #include <asm/arch/portmux.h>
 
diff --git a/drivers/mmc/atmel_mci.c b/drivers/mmc/atmel_mci.c
index 3946ffe..0af8d42 100644
--- a/drivers/mmc/atmel_mci.c
+++ b/drivers/mmc/atmel_mci.c
@@ -28,7 +28,7 @@
 #include <asm/errno.h>
 #include <asm/byteorder.h>
 #include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #include "atmel_mci.h"
 
diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h
index 83056b6..f40771d 100644
--- a/include/configs/atngw100.h
+++ b/include/configs/atngw100.h
@@ -24,7 +24,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #define CONFIG_AVR32			1
 #define CONFIG_AT32AP			1
diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h
index 6416d17..252c5ae 100644
--- a/include/configs/atstk1002.h
+++ b/include/configs/atstk1002.h
@@ -24,7 +24,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #define CONFIG_AVR32			1
 #define CONFIG_AT32AP			1
diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h
index a4d9b0b..8f06081 100644
--- a/include/configs/atstk1003.h
+++ b/include/configs/atstk1003.h
@@ -24,7 +24,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #define CONFIG_AVR32			1
 #define CONFIG_AT32AP			1
diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h
index 06bb5da..12c9414 100644
--- a/include/configs/atstk1004.h
+++ b/include/configs/atstk1004.h
@@ -24,7 +24,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #define CONFIG_AVR32			1
 #define CONFIG_AT32AP			1
diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h
index d3cbee6..8cbaf75 100644
--- a/include/configs/atstk1006.h
+++ b/include/configs/atstk1006.h
@@ -24,7 +24,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #define CONFIG_AVR32			1
 #define CONFIG_AT32AP			1
diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h
index 1c381c7..a65fbd4 100644
--- a/include/configs/favr-32-ezkit.h
+++ b/include/configs/favr-32-ezkit.h
@@ -22,7 +22,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #define CONFIG_AVR32			1
 #define CONFIG_AT32AP			1
diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h
index 6ed9e75..be3941e 100644
--- a/include/configs/mimc200.h
+++ b/include/configs/mimc200.h
@@ -24,7 +24,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #define CONFIG_AVR32			1
 #define CONFIG_AT32AP			1
-- 
1.7.2.3

[U-Boot] [PATCH v2 2/2] avr32: fixup definitions to ATMEL_BASE_xxx

[Andreas Bießmann]

Signed-off-by: Andreas Bie?mann <biessmann@corscience.de>
---
changes since v1:
 - only rename definitions to ATMEL_BASE_xx schema in this patch
 - rename of memeory-map.h -> hardweare.h is required before

 arch/avr32/cpu/at32ap700x/sm.h                    |    4 +-
 arch/avr32/cpu/hsdramc1.h                         |    4 +-
 arch/avr32/cpu/hsmc3.h                            |    4 +-
 arch/avr32/cpu/interrupts.c                       |    2 +-
 arch/avr32/include/asm/arch-at32ap700x/gpio.h     |   10 ++--
 arch/avr32/include/asm/arch-at32ap700x/hardware.h |   76 ++++++++++----------
 arch/avr32/include/asm/arch-at32ap700x/portmux.h  |   10 ++--
 arch/avr32/include/asm/hmatrix-common.h           |    2 +-
 board/atmel/atngw100/atngw100.c                   |    4 +-
 board/atmel/atstk1000/atstk1000.c                 |    4 +-
 board/earthlcd/favr-32-ezkit/favr-32-ezkit.c      |    2 +-
 board/mimc/mimc200/mimc200.c                      |    4 +-
 board/miromico/hammerhead/hammerhead.c            |    2 +-
 drivers/mmc/atmel_mci.h                           |    4 +-
 include/configs/atngw100.h                        |    4 +-
 include/configs/atstk1002.h                       |    6 +-
 include/configs/atstk1003.h                       |    6 +-
 include/configs/atstk1004.h                       |    6 +-
 include/configs/atstk1006.h                       |    6 +-
 include/configs/favr-32-ezkit.h                   |    6 +-
 include/configs/hammerhead.h                      |    3 +-
 include/configs/mimc200.h                         |    4 +-
 22 files changed, 83 insertions(+), 90 deletions(-)

diff --git a/arch/avr32/cpu/at32ap700x/sm.h b/arch/avr32/cpu/at32ap700x/sm.h
index b6e4409..9a3804e 100644
--- a/arch/avr32/cpu/at32ap700x/sm.h
+++ b/arch/avr32/cpu/at32ap700x/sm.h
@@ -197,8 +197,8 @@
 
 /* Register access macros */
 #define sm_readl(reg)					\
-	readl((void *)SM_BASE + SM_##reg)
+	readl((void *)ATMEL_BASE_SM + SM_##reg)
 #define sm_writel(reg,value)				\
-	writel((value), (void *)SM_BASE + SM_##reg)
+	writel((value), (void *)ATMEL_BASE_SM + SM_##reg)
 
 #endif /* __CPU_AT32AP_SM_H__ */
diff --git a/arch/avr32/cpu/hsdramc1.h b/arch/avr32/cpu/hsdramc1.h
index 305d2cb..e18e074 100644
--- a/arch/avr32/cpu/hsdramc1.h
+++ b/arch/avr32/cpu/hsdramc1.h
@@ -136,8 +136,8 @@
 
 /* Register access macros */
 #define hsdramc1_readl(reg)					\
-	readl((void *)HSDRAMC_BASE + HSDRAMC1_##reg)
+	readl((void *)ATMEL_BASE_HSDRAMC + HSDRAMC1_##reg)
 #define hsdramc1_writel(reg,value)				\
-	writel((value), (void *)HSDRAMC_BASE + HSDRAMC1_##reg)
+	writel((value), (void *)ATMEL_BASE_HSDRAMC + HSDRAMC1_##reg)
 
 #endif /* __ASM_AVR32_HSDRAMC1_H__ */
diff --git a/arch/avr32/cpu/hsmc3.h b/arch/avr32/cpu/hsmc3.h
index ca533b9..ac47295 100644
--- a/arch/avr32/cpu/hsmc3.h
+++ b/arch/avr32/cpu/hsmc3.h
@@ -119,8 +119,8 @@
 
 /* Register access macros */
 #define hsmc3_readl(reg)					\
-	readl((void *)HSMC_BASE + HSMC3_##reg)
+	readl((void *)ATMEL_BASE_HSMC + HSMC3_##reg)
 #define hsmc3_writel(reg,value)					\
-	writel((value), (void *)HSMC_BASE + HSMC3_##reg)
+	writel((value), (void *)ATMEL_BASE_HSMC + HSMC3_##reg)
 
 #endif /* __CPU_AT32AP_HSMC3_H__ */
diff --git a/arch/avr32/cpu/interrupts.c b/arch/avr32/cpu/interrupts.c
index c751981..c6ea435 100644
--- a/arch/avr32/cpu/interrupts.c
+++ b/arch/avr32/cpu/interrupts.c
@@ -125,7 +125,7 @@ static int set_interrupt_handler(unsigned int nr, void (*handler)(void),
 
 	intpr = (handler_addr & HANDLER_MASK);
 	intpr |= (priority & INTLEV_MASK) << INTLEV_SHIFT;
-	writel(intpr, (void *)INTC_BASE + 4 * nr);
+	writel(intpr, (void *)ATMEL_BASE_INTC + 4 * nr);
 
 	return 0;
 }
diff --git a/arch/avr32/include/asm/arch-at32ap700x/gpio.h b/arch/avr32/include/asm/arch-at32ap700x/gpio.h
index b0254f2..4322eac 100644
--- a/arch/avr32/include/asm/arch-at32ap700x/gpio.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/gpio.h
@@ -45,15 +45,15 @@ static inline void *pio_pin_to_port(unsigned int pin)
 {
 	switch (pin >> 5) {
 	case 0:
-		return (void *)PIOA_BASE;
+		return (void *)ATMEL_BASE_PIOA;
 	case 1:
-		return (void *)PIOB_BASE;
+		return (void *)ATMEL_BASE_PIOB;
 	case 2:
-		return (void *)PIOC_BASE;
+		return (void *)ATMEL_BASE_PIOC;
 	case 3:
-		return (void *)PIOD_BASE;
+		return (void *)ATMEL_BASE_PIOD;
 	case 4:
-		return (void *)PIOE_BASE;
+		return (void *)ATMEL_BASE_PIOE;
 	default:
 		return NULL;
 	}
diff --git a/arch/avr32/include/asm/arch-at32ap700x/hardware.h b/arch/avr32/include/asm/arch-at32ap700x/hardware.h
index 6592c03..9172eef 100644
--- a/arch/avr32/include/asm/arch-at32ap700x/hardware.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/hardware.h
@@ -19,8 +19,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
-#ifndef __AT32AP7000_MEMORY_MAP_H__
-#define __AT32AP7000_MEMORY_MAP_H__
+#ifndef __AT32AP7000_HARDWARE_H__
+#define __AT32AP7000_HARDWARE_H__
 
 /* Internal and external memories */
 #define EBI_SRAM_CS0_BASE			0x00000000
@@ -43,44 +43,44 @@
 #define INTERNAL_SRAM_SIZE			0x00008000
 
 /* Devices on the High Speed Bus (HSB) */
-#define LCDC_BASE				0xFF000000
-#define DMAC_BASE				0xFF200000
-#define USB_FIFO				0xFF300000
+#define LCDC_BASE					0xFF000000
+#define DMAC_BASE					0xFF200000
+#define USB_FIFO					0xFF300000
 
 /* Devices on Peripheral Bus A (PBA) */
-#define SPI0_BASE				0xFFE00000
-#define SPI1_BASE				0xFFE00400
-#define TWI_BASE				0xFFE00800
-#define USART0_BASE				0xFFE00C00
-#define USART1_BASE				0xFFE01000
-#define USART2_BASE				0xFFE01400
-#define USART3_BASE				0xFFE01800
-#define SSC0_BASE				0xFFE01C00
-#define SSC1_BASE				0xFFE02000
-#define SSC2_BASE				0xFFE02400
-#define PIOA_BASE				0xFFE02800
-#define PIOB_BASE				0xFFE02C00
-#define PIOC_BASE				0xFFE03000
-#define PIOD_BASE				0xFFE03400
-#define PIOE_BASE				0xFFE03800
-#define PSIF_BASE				0xFFE03C00
+#define ATMEL_BASE_SPI0				0xFFE00000
+#define ATMEL_BASE_SPI1				0xFFE00400
+#define ATMEL_BASE_TWI0				0xFFE00800
+#define ATMEL_BASE_USART0			0xFFE00C00
+#define ATMEL_BASE_USART1			0xFFE01000
+#define ATMEL_BASE_USART2			0xFFE01400
+#define ATMEL_BASE_USART3			0xFFE01800
+#define ATMEL_BASE_SSC0				0xFFE01C00
+#define ATMEL_BASE_SSC1				0xFFE02000
+#define ATMEL_BASE_SSC2				0xFFE02400
+#define ATMEL_BASE_PIOA				0xFFE02800
+#define ATMEL_BASE_PIOB				0xFFE02C00
+#define ATMEL_BASE_PIOC				0xFFE03000
+#define ATMEL_BASE_PIOD				0xFFE03400
+#define ATMEL_BASE_PIOE				0xFFE03800
+#define ATMEL_BASE_PSIF				0xFFE03C00
 
 /* Devices on Peripheral Bus B (PBB) */
-#define SM_BASE					0xFFF00000
-#define INTC_BASE				0xFFF00400
-#define HMATRIX_BASE				0xFFF00800
-#define TIMER0_BASE				0xFFF00C00
-#define TIMER1_BASE				0xFFF01000
-#define PWM_BASE				0xFFF01400
-#define MACB0_BASE				0xFFF01800
-#define MACB1_BASE				0xFFF01C00
-#define DAC_BASE				0xFFF02000
-#define MMCI_BASE				0xFFF02400
-#define AUDIOC_BASE				0xFFF02800
-#define HISI_BASE				0xFFF02C00
-#define USB_BASE				0xFFF03000
-#define HSMC_BASE				0xFFF03400
-#define HSDRAMC_BASE				0xFFF03800
-#define ECC_BASE				0xFFF03C00
+#define ATMEL_BASE_SM				0xFFF00000
+#define ATMEL_BASE_INTC				0xFFF00400
+#define ATMEL_BASE_HMATRIX			0xFFF00800
+#define ATMEL_BASE_TIMER0			0xFFF00C00
+#define ATMEL_BASE_TIMER1			0xFFF01000
+#define ATMEL_BASE_PWM				0xFFF01400
+#define ATMEL_BASE_MACB0			0xFFF01800
+#define ATMEL_BASE_MACB1			0xFFF01C00
+#define ATMEL_BASE_DAC				0xFFF02000
+#define ATMEL_BASE_MMCI				0xFFF02400
+#define ATMEL_BASE_AUDIOC			0xFFF02800
+#define ATMEL_BASE_HISI				0xFFF02C00
+#define ATMEL_BASE_USB				0xFFF03000
+#define ATMEL_BASE_HSMC				0xFFF03400
+#define ATMEL_BASE_HSDRAMC			0xFFF03800
+#define ATMEL_BASE_ECC				0xFFF03C00
 
-#endif /* __AT32AP7000_MEMORY_MAP_H__ */
+#endif /* __AT32AP7000_HARDWARE_H__ */
diff --git a/arch/avr32/include/asm/arch-at32ap700x/portmux.h b/arch/avr32/include/asm/arch-at32ap700x/portmux.h
index 1ba52e5..859c121 100644
--- a/arch/avr32/include/asm/arch-at32ap700x/portmux.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/portmux.h
@@ -24,11 +24,11 @@
 
 #include <asm/arch/gpio.h>
 
-#define PORTMUX_PORT_A		((void *)PIOA_BASE)
-#define PORTMUX_PORT_B		((void *)PIOB_BASE)
-#define PORTMUX_PORT_C		((void *)PIOC_BASE)
-#define PORTMUX_PORT_D		((void *)PIOD_BASE)
-#define PORTMUX_PORT_E		((void *)PIOE_BASE)
+#define PORTMUX_PORT_A		((void *)ATMEL_BASE_PIOA)
+#define PORTMUX_PORT_B		((void *)ATMEL_BASE_PIOB)
+#define PORTMUX_PORT_C		((void *)ATMEL_BASE_PIOC)
+#define PORTMUX_PORT_D		((void *)ATMEL_BASE_PIOD)
+#define PORTMUX_PORT_E		((void *)ATMEL_BASE_PIOE)
 
 void portmux_enable_ebi(unsigned int bus_width, unsigned int addr_width,
 		unsigned long flags, unsigned long drive_strength);
diff --git a/arch/avr32/include/asm/hmatrix-common.h b/arch/avr32/include/asm/hmatrix-common.h
index 4b7e610..9a86fe4 100644
--- a/arch/avr32/include/asm/hmatrix-common.h
+++ b/arch/avr32/include/asm/hmatrix-common.h
@@ -117,7 +117,7 @@ struct hmatrix_regs {
 
 /* Register access macros */
 #define __hmatrix_reg(reg)					\
-	(((volatile struct hmatrix_regs *)HMATRIX_BASE)->reg)
+	(((volatile struct hmatrix_regs *)ATMEL_BASE_HMATRIX)->reg)
 #define hmatrix_read(reg)					\
 	(__hmatrix_reg(reg))
 #define hmatrix_write(reg, value)				\
diff --git a/board/atmel/atngw100/atngw100.c b/board/atmel/atngw100/atngw100.c
index 49bc03e..59577b8 100644
--- a/board/atmel/atngw100/atngw100.c
+++ b/board/atmel/atngw100/atngw100.c
@@ -112,8 +112,8 @@ int board_early_init_r(void)
 #ifdef CONFIG_CMD_NET
 int board_eth_init(bd_t *bi)
 {
-	macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
-	macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
+	macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
+	macb_eth_initialize(1, (void *)ATMEL_BASE_MACB1, bi->bi_phy_id[1]);
 	return 0;
 }
 #endif
diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c
index 8b1e1b5..58048a4 100644
--- a/board/atmel/atstk1000/atstk1000.c
+++ b/board/atmel/atstk1000/atstk1000.c
@@ -134,8 +134,8 @@ int board_early_init_r(void)
 #ifdef CONFIG_CMD_NET
 int board_eth_init(bd_t *bi)
 {
-	macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
-	macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
+	macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
+	macb_eth_initialize(1, (void *)ATMEL_BASE_MACB1, bi->bi_phy_id[1]);
 	return 0;
 }
 #endif
diff --git a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c b/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c
index b0eca93..2d25be3 100644
--- a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c
+++ b/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c
@@ -104,6 +104,6 @@ int board_early_init_r(void)
 #if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET)
 int board_eth_init(bd_t *bi)
 {
-	return macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
+	return macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
 }
 #endif
diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c
index 470adba..38fd35d 100644
--- a/board/mimc/mimc200/mimc200.c
+++ b/board/mimc/mimc200/mimc200.c
@@ -221,8 +221,8 @@ void spi_cs_deactivate(struct spi_slave *slave)
 #ifdef CONFIG_CMD_NET
 int board_eth_init(bd_t *bi)
 {
-	macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
-	macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
+	macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
+	macb_eth_initialize(1, (void *)ATMEL_BASE_MACB1, bi->bi_phy_id[1]);
 
 	return 0;
 }
diff --git a/board/miromico/hammerhead/hammerhead.c b/board/miromico/hammerhead/hammerhead.c
index a0794ba..876d64a 100644
--- a/board/miromico/hammerhead/hammerhead.c
+++ b/board/miromico/hammerhead/hammerhead.c
@@ -68,7 +68,7 @@ static const struct sdram_config sdram_config = {
 #ifdef CONFIG_CMD_NET
 int board_eth_init(bd_t *bis)
 {
-	return macb_eth_initialize(0, (void *)MACB0_BASE, bis->bi_phy_id[0]);
+	return macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bis->bi_phy_id[0]);
 }
 #endif
 
diff --git a/drivers/mmc/atmel_mci.h b/drivers/mmc/atmel_mci.h
index 823a77d..90ab6a8 100644
--- a/drivers/mmc/atmel_mci.h
+++ b/drivers/mmc/atmel_mci.h
@@ -238,8 +238,8 @@ typedef struct atmel_mci {
  * Register access macros
  */
 #define mmci_readl(reg)					\
-	readl((void *)MMCI_BASE + MMCI_##reg)
+	readl((void *)ATMEL_BASE_MMCI + MMCI_##reg)
 #define mmci_writel(reg,value)				\
-	writel((value), (void *)MMCI_BASE + MMCI_##reg)
+	writel((value), (void *)ATMEL_BASE_MMCI + MMCI_##reg)
 
 #endif /* __CPU_AT32AP_ATMEL_MCI_H__ */
diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h
index f40771d..27bfa9e 100644
--- a/include/configs/atngw100.h
+++ b/include/configs/atngw100.h
@@ -61,8 +61,8 @@
  */
 #define CONFIG_SYS_PLL0_OPT			0x04
 
-#define CONFIG_USART1			1
-
+#define CONFIG_USART_BASE		ATMEL_BASE_USART1
+#define CONFIG_USART_ID			1
 /* User serviceable stuff */
 #define CONFIG_DOS_PARTITION		1
 
diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h
index 252c5ae..ba1b56c 100644
--- a/include/configs/atstk1002.h
+++ b/include/configs/atstk1002.h
@@ -85,10 +85,8 @@
  */
 #define CONFIG_SYS_PLL0_OPT			0x04
 
-#undef CONFIG_USART0
-#define CONFIG_USART1			1
-#undef CONFIG_USART2
-#undef CONFIG_USART3
+#define CONFIG_USART_BASE		ATMEL_BASE_USART1
+#define CONFIG_USART_ID			1
 
 /* User serviceable stuff */
 #define CONFIG_DOS_PARTITION		1
diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h
index 8f06081..85337bf 100644
--- a/include/configs/atstk1003.h
+++ b/include/configs/atstk1003.h
@@ -85,10 +85,8 @@
  */
 #define CONFIG_SYS_PLL0_OPT			0x04
 
-#undef CONFIG_USART0
-#define CONFIG_USART1			1
-#undef CONFIG_USART2
-#undef CONFIG_USART3
+#define CONFIG_USART_BASE		ATMEL_BASE_USART1
+#define CONFIG_USART_ID			1
 
 /* User serviceable stuff */
 #define CONFIG_DOS_PARTITION		1
diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h
index 12c9414..344ba8f 100644
--- a/include/configs/atstk1004.h
+++ b/include/configs/atstk1004.h
@@ -85,10 +85,8 @@
  */
 #define CONFIG_SYS_PLL0_OPT			0x04
 
-#undef CONFIG_USART0
-#define CONFIG_USART1			1
-#undef CONFIG_USART2
-#undef CONFIG_USART3
+#define CONFIG_USART_BASE		ATMEL_BASE_USART1
+#define CONFIG_USART_ID			1
 
 /* User serviceable stuff */
 #define CONFIG_DOS_PARTITION		1
diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h
index 8cbaf75..e8553fc 100644
--- a/include/configs/atstk1006.h
+++ b/include/configs/atstk1006.h
@@ -85,10 +85,8 @@
  */
 #define CONFIG_SYS_PLL0_OPT			0x04
 
-#undef CONFIG_USART0
-#define CONFIG_USART1			1
-#undef CONFIG_USART2
-#undef CONFIG_USART3
+#define CONFIG_USART_BASE		ATMEL_BASE_USART1
+#define CONFIG_USART_ID			1
 
 /* User serviceable stuff */
 #define CONFIG_DOS_PARTITION		1
diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h
index a65fbd4..e723ad1 100644
--- a/include/configs/favr-32-ezkit.h
+++ b/include/configs/favr-32-ezkit.h
@@ -82,10 +82,8 @@
  */
 #define CONFIG_SYS_PLL0_OPT			0x04
 
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3			1
+#define CONFIG_USART_BASE		ATMEL_BASE_USART3
+#define CONFIG_USART_ID			3
 
 /* User serviceable stuff */
 #define CONFIG_DOS_PARTITION		1
diff --git a/include/configs/hammerhead.h b/include/configs/hammerhead.h
index 8ca04ea..1f20fff 100644
--- a/include/configs/hammerhead.h
+++ b/include/configs/hammerhead.h
@@ -59,7 +59,8 @@
  */
 #define CONFIG_SYS_PLL0_OPT			0x04
 
-#define CONFIG_USART1			1
+#define CONFIG_USART_BASE			ATMEL_BASE_USART1
+#define CONFIG_USART_ID				1
 
 #define CONFIG_HOSTNAME			hammerhead
 
diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h
index be3941e..14df234 100644
--- a/include/configs/mimc200.h
+++ b/include/configs/mimc200.h
@@ -63,7 +63,9 @@
  */
 #define CONFIG_SYS_PLL0_OPT			0x04
 
-#define CONFIG_USART1			1
+#define CONFIG_USART_BASE			ATMEL_BASE_USART1
+#define CONFIG_USART_ID				1
+
 #define CONFIG_MIMC200_DBGLINK		1
 
 /* User serviceable stuff */
-- 
1.7.2.3

[U-Boot] [PATCH v2 2/2] avr32: fixup definitions to ATMEL_BASE_xxx

[Reinhard Meyer]

Dear Andreas Bie?mann,
> Signed-off-by: Andreas Bie?mann <biessmann@corscience.de>

*maybe* your mailing system would abstain from escaping the patch
if you would use "ss" instead "?" ;)

(I am waiting for the first patch to arrive signed off in ???,
or even better, farsi (from right to left). My mailer can handle
that, but can git-am ?)

> ---
> changes since v1:
>  - only rename definitions to ATMEL_BASE_xx schema in this patch
>  - rename of memeory-map.h -> hardweare.h is required before
> 
>  arch/avr32/cpu/at32ap700x/sm.h                    |    4 +-
>  arch/avr32/cpu/hsdramc1.h                         |    4 +-
>  arch/avr32/cpu/hsmc3.h                            |    4 +-
>  arch/avr32/cpu/interrupts.c                       |    2 +-
>  arch/avr32/include/asm/arch-at32ap700x/gpio.h     |   10 ++--
>  arch/avr32/include/asm/arch-at32ap700x/hardware.h |   76 ++++++++++----------
>  arch/avr32/include/asm/arch-at32ap700x/portmux.h  |   10 ++--
>  arch/avr32/include/asm/hmatrix-common.h           |    2 +-
>  board/atmel/atngw100/atngw100.c                   |    4 +-
>  board/atmel/atstk1000/atstk1000.c                 |    4 +-
>  board/earthlcd/favr-32-ezkit/favr-32-ezkit.c      |    2 +-
>  board/mimc/mimc200/mimc200.c                      |    4 +-
>  board/miromico/hammerhead/hammerhead.c            |    2 +-
>  drivers/mmc/atmel_mci.h                           |    4 +-
>  include/configs/atngw100.h                        |    4 +-
>  include/configs/atstk1002.h                       |    6 +-
>  include/configs/atstk1003.h                       |    6 +-
>  include/configs/atstk1004.h                       |    6 +-
>  include/configs/atstk1006.h                       |    6 +-
>  include/configs/favr-32-ezkit.h                   |    6 +-
>  include/configs/hammerhead.h                      |    3 +-
>  include/configs/mimc200.h                         |    4 +-
>  22 files changed, 83 insertions(+), 90 deletions(-)

After hand-fixing the escape sequences,
applied into u-boot-atmel avr32cleanup branch:

> diff --git a/arch/avr32/include/asm/arch-at32ap700x/hardware.h b/arch/avr32/include/asm/arch-at32ap700x/hardware.h
> index 6592c03..9172eef 100644
> --- a/arch/avr32/include/asm/arch-at32ap700x/hardware.h
> +++ b/arch/avr32/include/asm/arch-at32ap700x/hardware.h
> @@ -19,8 +19,8 @@
>   * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>   * MA 02111-1307 USA
>   */
> -#ifndef __AT32AP7000_MEMORY_MAP_H__
> -#define __AT32AP7000_MEMORY_MAP_H__
> +#ifndef __AT32AP7000_HARDWARE_H__
> +#define __AT32AP7000_HARDWARE_H__
>  
>  /* Internal and external memories */
>  #define EBI_SRAM_CS0_BASE			0x00000000
> @@ -43,44 +43,44 @@
>  #define INTERNAL_SRAM_SIZE			0x00008000
>  
>  /* Devices on the High Speed Bus (HSB) */
> -#define LCDC_BASE				0xFF000000
> -#define DMAC_BASE				0xFF200000
> -#define USB_FIFO				0xFF300000
> +#define LCDC_BASE					0xFF000000
> +#define DMAC_BASE					0xFF200000
> +#define USB_FIFO					0xFF300000

ATMEL_BASE_*, ATMEL_SIZE_* for above defines in a later patch, maybe?

Otherwise it looks very good.

Best Regards,
Reinhard

[U-Boot] various at91 patches to make some boards compilable again

[Remy Bohmer]

Hi

2010/11/1 Reinhard Meyer <u-boot@emk-elektronik.de>:
> Dear Alexander Stein,
>> This patch series changes some at91 boards to SoC access and adds some defines
>> to make the boards compilable again.
>> Please note: All changes are untested!
>
> Ok, I will look over them, and apply them in a test branch here, if they don't break
> my board I think they can be mainlined, BUT you would need to be the maintainer of those
> boards.

If there is still no maintainer for the at91sam9261ek board, I am
volunteering...

Kind regards,

Remy

[U-Boot] [PATCH v2 1/2] avr32: rename memory-map.h -> hardware.h

[Reinhard Meyer]

Dear Andreas Bie?mann:
> Signed-off-by: Andreas Bie?mann <biessmann@corscience.de>
> ---
> changes since v1:
>  - only rename in this patch and fixup includes in respective includes
>  - use 'format-patch -C'
> 
>  arch/avr32/cpu/at32ap700x/clk.c                    |    2 +-
>  arch/avr32/cpu/at32ap700x/portmux.c                |    2 +-
>  arch/avr32/cpu/cpu.c                               |    2 +-
>  arch/avr32/cpu/hsdramc.c                           |    2 +-
>  arch/avr32/cpu/interrupts.c                        |    2 +-
>  arch/avr32/cpu/portmux-gpio.c                      |    2 +-
>  arch/avr32/cpu/portmux-pio.c                       |    2 +-
>  arch/avr32/include/asm/arch-at32ap700x/gpio.h      |    2 +-
>  .../arch-at32ap700x/{memory-map.h => hardware.h}   |    0
>  board/miromico/hammerhead/hammerhead.c             |    2 +-
>  drivers/mmc/atmel_mci.c                            |    2 +-
>  include/configs/atngw100.h                         |    2 +-
>  include/configs/atstk1002.h                        |    2 +-
>  include/configs/atstk1003.h                        |    2 +-
>  include/configs/atstk1004.h                        |    2 +-
>  include/configs/atstk1006.h                        |    2 +-
>  include/configs/favr-32-ezkit.h                    |    2 +-
>  include/configs/mimc200.h                          |    2 +-
>  18 files changed, 17 insertions(+), 17 deletions(-)
>  rename arch/avr32/include/asm/arch-at32ap700x/{memory-map.h => hardware.h} (100%)

Applied into u-boot-atmel/next.

Thanks,

Reinhard

[U-Boot] [PATCH v2 2/2] avr32: fixup definitions to ATMEL_BASE_xxx

[Reinhard Meyer]

Dear Andreas Bie?mann:
> Signed-off-by: Andreas Bie?mann <biessmann@corscience.de>
> ---
> changes since v1:
>  - only rename definitions to ATMEL_BASE_xx schema in this patch
>  - rename of memeory-map.h -> hardweare.h is required before
> 
>  arch/avr32/cpu/at32ap700x/sm.h                    |    4 +-
>  arch/avr32/cpu/hsdramc1.h                         |    4 +-
>  arch/avr32/cpu/hsmc3.h                            |    4 +-
>  arch/avr32/cpu/interrupts.c                       |    2 +-
>  arch/avr32/include/asm/arch-at32ap700x/gpio.h     |   10 ++--
>  arch/avr32/include/asm/arch-at32ap700x/hardware.h |   76 ++++++++++----------
>  arch/avr32/include/asm/arch-at32ap700x/portmux.h  |   10 ++--
>  arch/avr32/include/asm/hmatrix-common.h           |    2 +-
>  board/atmel/atngw100/atngw100.c                   |    4 +-
>  board/atmel/atstk1000/atstk1000.c                 |    4 +-
>  board/earthlcd/favr-32-ezkit/favr-32-ezkit.c      |    2 +-
>  board/mimc/mimc200/mimc200.c                      |    4 +-
>  board/miromico/hammerhead/hammerhead.c            |    2 +-
>  drivers/mmc/atmel_mci.h                           |    4 +-
>  include/configs/atngw100.h                        |    4 +-
>  include/configs/atstk1002.h                       |    6 +-
>  include/configs/atstk1003.h                       |    6 +-
>  include/configs/atstk1004.h                       |    6 +-
>  include/configs/atstk1006.h                       |    6 +-
>  include/configs/favr-32-ezkit.h                   |    6 +-
>  include/configs/hammerhead.h                      |    3 +-
>  include/configs/mimc200.h                         |    4 +-
>  22 files changed, 83 insertions(+), 90 deletions(-)

Has the following issues:

WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt
#210: FILE: arch/avr32/include/asm/hmatrix-common.h:120:
+	(((volatile struct hmatrix_regs *)ATMEL_BASE_HMATRIX)->reg)
[left as it is - since this is only a name change patch]

WARNING: line over 80 characters
#253: FILE: board/earthlcd/favr-32-ezkit/favr-32-ezkit.c:107:
+	return macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
[manually fixed]

WARNING: line over 80 characters
#280: FILE: board/miromico/hammerhead/hammerhead.c:71:
+	return macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bis->bi_phy_id[0]);
[manually fixed]

Applied into u-boot-atmel/next.

Thanks,

Reinhard