* [U-Boot] [U-BOOT] [PATCH] arm: fix flush cache function on arm926ejs
@ 2011-01-11 15:40 Lei Wen
2011-01-11 19:53 ` Albert ARIBAUD
0 siblings, 1 reply; 5+ messages in thread
From: Lei Wen @ 2011-01-11 15:40 UTC (permalink / raw)
To: u-boot
flush_cache function should only be called when the dcache is on.
And original flush method for arm926ejs seems don't work, replace
it with new version.
Test on Marvell Pantheon pxa920 board with usb ether function.
Signed-off-by: Lei Wen <leiwen@marvell.com>
---
arch/arm/lib/cache.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 30686fe..b8d5eee 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -27,16 +27,16 @@
void flush_cache (unsigned long dummy1, unsigned long dummy2)
{
+ if (!dcache_status())
+ return;
#if defined(CONFIG_OMAP2420) || defined(CONFIG_ARM1136)
void arm1136_cache_flush(void);
arm1136_cache_flush();
#endif
#ifdef CONFIG_ARM926EJS
- /* test and clean, page 2-23 of arm926ejs manual */
- asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
- /* disable write buffer as well (page 2-22) */
- asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
+ /* clean & invalidate all D cache */
+ asm("mcr p15, 0, %0, c7, c14, 0" : : "r" (0));
#endif
#ifdef CONFIG_OMAP34XX
void v7_flush_cache_all(void);
--
1.7.0.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [U-BOOT] [PATCH] arm: fix flush cache function on arm926ejs
2011-01-11 15:40 [U-Boot] [U-BOOT] [PATCH] arm: fix flush cache function on arm926ejs Lei Wen
@ 2011-01-11 19:53 ` Albert ARIBAUD
2011-01-12 4:27 ` Lei Wen
0 siblings, 1 reply; 5+ messages in thread
From: Albert ARIBAUD @ 2011-01-11 19:53 UTC (permalink / raw)
To: u-boot
Hi,
Le 11/01/2011 16:40, Lei Wen a ?crit :
> flush_cache function should only be called when the dcache is on.
> And original flush method for arm926ejs seems don't work, replace
> it with new version.
>
> Test on Marvell Pantheon pxa920 board with usb ether function.
>
> Signed-off-by: Lei Wen<leiwen@marvell.com>
> ---
> arch/arm/lib/cache.c | 8 ++++----
> 1 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
> index 30686fe..b8d5eee 100644
> --- a/arch/arm/lib/cache.c
> +++ b/arch/arm/lib/cache.c
> @@ -27,16 +27,16 @@
>
> void flush_cache (unsigned long dummy1, unsigned long dummy2)
> {
> + if (!dcache_status())
> + return;
> #if defined(CONFIG_OMAP2420) || defined(CONFIG_ARM1136)
> void arm1136_cache_flush(void);
>
> arm1136_cache_flush();
> #endif
> #ifdef CONFIG_ARM926EJS
> - /* test and clean, page 2-23 of arm926ejs manual */
> - asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
> - /* disable write buffer as well (page 2-22) */
> - asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
> + /* clean& invalidate all D cache */
> + asm("mcr p15, 0, %0, c7, c14, 0" : : "r" (0));
ARM's ARM926EJ-S r0p4/r0p5 TRM does not define "... c7, c14, 0". Where
did you find this exact cp15 instruction?
> #endif
> #ifdef CONFIG_OMAP34XX
> void v7_flush_cache_all(void);
Amicalement,
--
Albert.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [U-BOOT] [PATCH] arm: fix flush cache function on arm926ejs
2011-01-11 19:53 ` Albert ARIBAUD
@ 2011-01-12 4:27 ` Lei Wen
2011-01-12 4:31 ` Lei Wen
0 siblings, 1 reply; 5+ messages in thread
From: Lei Wen @ 2011-01-12 4:27 UTC (permalink / raw)
To: u-boot
Hi Albert,
On Wed, Jan 12, 2011 at 3:53 AM, Albert ARIBAUD <albert.aribaud@free.fr> wrote:
> Hi,
>
> Le 11/01/2011 16:40, Lei Wen a ?crit :
>> flush_cache function should only be called when the dcache is on.
>> And original flush method for arm926ejs seems don't work, replace
>> it with new version.
>>
>> Test on Marvell Pantheon pxa920 board with usb ether function.
>>
>> Signed-off-by: Lei Wen<leiwen@marvell.com>
>> ---
>> ? arch/arm/lib/cache.c | ? ?8 ++++----
>> ? 1 files changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
>> index 30686fe..b8d5eee 100644
>> --- a/arch/arm/lib/cache.c
>> +++ b/arch/arm/lib/cache.c
>> @@ -27,16 +27,16 @@
>>
>> ? void ?flush_cache (unsigned long dummy1, unsigned long dummy2)
>> ? {
>> + ? ? if (!dcache_status())
>> + ? ? ? ? ? ? return;
>> ? #if defined(CONFIG_OMAP2420) || defined(CONFIG_ARM1136)
>> ? ? ? void arm1136_cache_flush(void);
>>
>> ? ? ? arm1136_cache_flush();
>> ? #endif
>> ? #ifdef CONFIG_ARM926EJS
>> - ? ? /* test and clean, page 2-23 of arm926ejs manual */
>> - ? ? asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
>> - ? ? /* disable write buffer as well (page 2-22) */
>> - ? ? asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
>> + ? ? /* clean& ?invalidate all D cache */
>> + ? ? asm("mcr p15, 0, %0, c7, c14, 0" : : "r" (0));
>
> ARM's ARM926EJ-S r0p4/r0p5 TRM does not define "... c7, c14, 0". Where
> did you find this exact cp15 instruction?
>
My mistake...
Pantheon board's sheeva core modify the standard cp15 op code a bit...
With one opcode, it could invalidate and clean the dcache all.
So could I modify the original patch like below?
asm("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
This would only invalidate all dcache. Since current dcache enable is
just write-through,
I think it is safe to just do the invalidate operation.
This also could works for my board.
Best regards,
Lei
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [U-BOOT] [PATCH] arm: fix flush cache function on arm926ejs
2011-01-12 4:27 ` Lei Wen
@ 2011-01-12 4:31 ` Lei Wen
2011-01-12 18:49 ` Albert ARIBAUD
0 siblings, 1 reply; 5+ messages in thread
From: Lei Wen @ 2011-01-12 4:31 UTC (permalink / raw)
To: u-boot
On Wed, Jan 12, 2011 at 12:27 PM, Lei Wen <adrian.wenl@gmail.com> wrote:
> Hi Albert,
>
> On Wed, Jan 12, 2011 at 3:53 AM, Albert ARIBAUD <albert.aribaud@free.fr> wrote:
>> Hi,
>>
>> Le 11/01/2011 16:40, Lei Wen a ?crit :
>>> flush_cache function should only be called when the dcache is on.
>>> And original flush method for arm926ejs seems don't work, replace
>>> it with new version.
>>>
>>> Test on Marvell Pantheon pxa920 board with usb ether function.
>>>
>>> Signed-off-by: Lei Wen<leiwen@marvell.com>
>>> ---
>>> ? arch/arm/lib/cache.c | ? ?8 ++++----
>>> ? 1 files changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
>>> index 30686fe..b8d5eee 100644
>>> --- a/arch/arm/lib/cache.c
>>> +++ b/arch/arm/lib/cache.c
>>> @@ -27,16 +27,16 @@
>>>
>>> ? void ?flush_cache (unsigned long dummy1, unsigned long dummy2)
>>> ? {
>>> + ? ? if (!dcache_status())
>>> + ? ? ? ? ? ? return;
>>> ? #if defined(CONFIG_OMAP2420) || defined(CONFIG_ARM1136)
>>> ? ? ? void arm1136_cache_flush(void);
>>>
>>> ? ? ? arm1136_cache_flush();
>>> ? #endif
>>> ? #ifdef CONFIG_ARM926EJS
>>> - ? ? /* test and clean, page 2-23 of arm926ejs manual */
>>> - ? ? asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
>>> - ? ? /* disable write buffer as well (page 2-22) */
>>> - ? ? asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
>>> + ? ? /* clean& ?invalidate all D cache */
>>> + ? ? asm("mcr p15, 0, %0, c7, c14, 0" : : "r" (0));
>>
>> ARM's ARM926EJ-S r0p4/r0p5 TRM does not define "... c7, c14, 0". Where
>> did you find this exact cp15 instruction?
>>
>
> My mistake...
> Pantheon board's sheeva core modify the standard cp15 op code a bit...
> With one opcode, it could invalidate and clean the dcache all.
>
> So could I modify the original patch like below?
> asm("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
> This would only invalidate all dcache. Since current dcache enable is
> just write-through,
> I think it is safe to just do the invalidate operation.
>
> This also could works for my board.
I take my words back...
I forget to open the dcache... After dcache is on, the usb tftp still
cannot works...
Seems still do the clean cache operation...
Best regards,
Lei
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [U-BOOT] [PATCH] arm: fix flush cache function on arm926ejs
2011-01-12 4:31 ` Lei Wen
@ 2011-01-12 18:49 ` Albert ARIBAUD
0 siblings, 0 replies; 5+ messages in thread
From: Albert ARIBAUD @ 2011-01-12 18:49 UTC (permalink / raw)
To: u-boot
Le 12/01/2011 05:31, Lei Wen a ?crit :
> On Wed, Jan 12, 2011 at 12:27 PM, Lei Wen<adrian.wenl@gmail.com> wrote:
>> Hi Albert,
>>
>> On Wed, Jan 12, 2011 at 3:53 AM, Albert ARIBAUD<albert.aribaud@free.fr> wrote:
>>> Hi,
>>>
>>> Le 11/01/2011 16:40, Lei Wen a ?crit :
>>>> flush_cache function should only be called when the dcache is on.
>>>> And original flush method for arm926ejs seems don't work, replace
>>>> it with new version.
>>>>
>>>> Test on Marvell Pantheon pxa920 board with usb ether function.
>>>>
>>>> Signed-off-by: Lei Wen<leiwen@marvell.com>
>>>> ---
>>>> arch/arm/lib/cache.c | 8 ++++----
>>>> 1 files changed, 4 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
>>>> index 30686fe..b8d5eee 100644
>>>> --- a/arch/arm/lib/cache.c
>>>> +++ b/arch/arm/lib/cache.c
>>>> @@ -27,16 +27,16 @@
>>>>
>>>> void flush_cache (unsigned long dummy1, unsigned long dummy2)
>>>> {
>>>> + if (!dcache_status())
>>>> + return;
>>>> #if defined(CONFIG_OMAP2420) || defined(CONFIG_ARM1136)
>>>> void arm1136_cache_flush(void);
>>>>
>>>> arm1136_cache_flush();
>>>> #endif
>>>> #ifdef CONFIG_ARM926EJS
>>>> - /* test and clean, page 2-23 of arm926ejs manual */
>>>> - asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
>>>> - /* disable write buffer as well (page 2-22) */
>>>> - asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
>>>> + /* clean& invalidate all D cache */
>>>> + asm("mcr p15, 0, %0, c7, c14, 0" : : "r" (0));
>>>
>>> ARM's ARM926EJ-S r0p4/r0p5 TRM does not define "... c7, c14, 0". Where
>>> did you find this exact cp15 instruction?
>>>
>>
>> My mistake...
>> Pantheon board's sheeva core modify the standard cp15 op code a bit...
>> With one opcode, it could invalidate and clean the dcache all.
>>
>> So could I modify the original patch like below?
>> asm("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
>> This would only invalidate all dcache. Since current dcache enable is
>> just write-through,
>> I think it is safe to just do the invalidate operation.
>>
>> This also could works for my board.
>
> I take my words back...
> I forget to open the dcache... After dcache is on, the usb tftp still
> cannot works...
> Seems still do the clean cache operation...
Anyway, changes to ARM926E-JS common code must work with existing
ARM926E-JS SoCs, so this patch is NAK. Pantheon-specific cache ops
should only be executed for Pantheon-based boards.
> Best regards,
> Lei
Amicalement,
--
Albert.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2011-01-12 18:49 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2011-01-11 15:40 [U-Boot] [U-BOOT] [PATCH] arm: fix flush cache function on arm926ejs Lei Wen
2011-01-11 19:53 ` Albert ARIBAUD
2011-01-12 4:27 ` Lei Wen
2011-01-12 4:31 ` Lei Wen
2011-01-12 18:49 ` Albert ARIBAUD
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