Re: [PATCH 0/8] fsldma: lockup fixes

Re: [PATCH 0/8] fsldma: lockup fixes

[Felix Radensky]

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[-- Attachment #2: dmesg.txt --]
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Using P2020 RDB machine description
Memory CAM mapping: 256/256/256 Mb, residual: 256Mb
Linux version 2.6.38-rc6 (felix@felix.lan) (gcc version 4.2.2) #6 Mon Feb 28 20:40:18 IST 2011
Found legacy serial port 0 for /soc@ffe00000/serial@4500
  mem=ffe04500, taddr=ffe04500, irq=0, clk=600000000, speed=0
Found legacy serial port 1 for /soc@ffe00000/serial@4600
  mem=ffe04600, taddr=ffe04600, irq=0, clk=600000000, speed=0
bootconsole [udbg0] enabled
Found FSL PCI host bridge at 0x00000000ffe09000. Firmware bus number: 0->255
PCI host bridge /pcie@ffe09000  ranges:
 MEM 0x00000000a0000000..0x00000000bfffffff -> 0x00000000a0000000 
  IO 0x00000000ffc30000..0x00000000ffc3ffff -> 0x0000000000000000
/pcie@ffe09000: PCICSRBAR @ 0xfff00000
Found FSL PCI host bridge at 0x00000000ffe0a000. Firmware bus number: 0->0
PCI host bridge /pcie@ffe0a000  ranges:
 MEM 0x00000000c0000000..0x00000000dfffffff -> 0x00000000c0000000 
  IO 0x00000000ffc20000..0x00000000ffc2ffff -> 0x0000000000000000
/pcie@ffe0a000: PCICSRBAR @ 0xfff00000
MPC85xx RDB board from Freescale Semiconductor
Top of RAM: 0x40000000, Total RAM: 0x40000000
Memory hole size: 0MB
Zone PFN ranges:
  DMA      0x00000000 -> 0x00030000
  Normal   empty
  HighMem  0x00030000 -> 0x00040000
Movable zone start PFN for each node
early_node_map[1] active PFN ranges
    0: 0x00000000 -> 0x00040000
On node 0 totalpages: 262144
free_area_init_node: node 0, pgdat c02ecfcc, node_mem_map c030e000
  DMA zone: 1536 pages used for memmap
  DMA zone: 0 pages reserved
  DMA zone: 195072 pages, LIFO batch:31
  HighMem zone: 512 pages used for memmap
  HighMem zone: 65024 pages, LIFO batch:15
MMU: Allocated 1088 bytes of context maps for 255 contexts
pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
pcpu-alloc: [0] 0 
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 260096
Kernel command line: root=/dev/nfs rw nfsroot=10.0.0.10:/opt/eldk/4.2/ppc_85xxDP ip=10.0.0.30:10.0.0.10::255.0.0.0:P2020RDB:eth0:off console=ttyS0,115200 ramdisk_size=700000 cache-sram-size=0x10000
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
High memory: 262140k
Memory: 1036340k/1048576k available (2928k kernel code, 12236k reserved, 104k data, 83k bss, 136k init)
Kernel virtual memory layout:
  * 0xfffcf000..0xfffff000  : fixmap
  * 0xffc00000..0xffe00000  : highmem PTEs
  * 0xffbda000..0xffc00000  : early ioremap
  * 0xf1000000..0xffbda000  : vmalloc & ioremap
SLUB: Genslabs=15, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:512 nr_irqs:512 16
mpic: Setting up MPIC " OpenPIC  " version 1.2 at ffe40000, max 2 CPUs
mpic: ISU size: 256, shift: 8, mask: ff
mpic: Initializing for 256 sources
time_init: decrementer frequency = 75.000000 MHz
time_init: processor frequency   = 1200.000000 MHz
clocksource: timebase mult[3555555] shift[22] registered
clockevent: decrementer mult[13333333] shift[32] cpu[0]
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
NET: Registered protocol family 16
PCI: Probing PCI hardware
pci 0000:00:00.0: [1957:0070] type 1 class 0x000b20
pci 0000:00:00.0: ignoring class b20 (doesn't match header type 01)
pci 0000:00:00.0: supports D1 D2
pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:00.0: PME# disabled
pci 0000:00:00.0: PCI bridge to [bus 01-ff]
pci 0000:00:00.0:   bridge window [io  0x0000-0x0000] (disabled)
pci 0000:00:00.0:   bridge window [mem 0x00000000-0x000fffff] (disabled)
pci 0000:00:00.0:   bridge window [mem 0x00000000-0x000fffff pref] (disabled)
pci 0001:02:00.0: [1957:0070] type 1 class 0x000b20
pci 0001:02:00.0: ignoring class b20 (doesn't match header type 01)
pci 0001:02:00.0: supports D1 D2
pci 0001:02:00.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0001:02:00.0: PME# disabled
pci 0001:02:00.0: PCI bridge to [bus 03-ff]
pci 0001:02:00.0:   bridge window [io  0x0000-0x0000] (disabled)
pci 0001:02:00.0:   bridge window [mem 0x00000000-0x000fffff] (disabled)
pci 0001:02:00.0:   bridge window [mem 0x00000000-0x000fffff pref] (disabled)
pcibios_allocate_bus_resources: i=0 flags 0x100 start 0xef050d7c end 0x0
pcibios_allocate_bus_resources: i=1 flags 0x200 start 0x4000 end 0x0
pcibios_allocate_bus_resources: i=0 flags 0x100 start 0x4000 end 0x0
pcibios_allocate_bus_resources: i=1 flags 0x200 start 0x4000 end 0x0
pcibios_allocate_bus_resources: i=2 flags 0x0 start 0x4000 end 0x0
pcibios_allocate_bus_resources: i=3 flags 0x0 start 0x4000 end 0x0
pcibios_allocate_bus_resources: i=0 flags 0x100 start 0x4000 end 0x0
pcibios_allocate_bus_resources: i=1 flags 0x200 start 0x4000 end 0x0
pcibios_allocate_bus_resources: i=0 flags 0x100 start 0x4000 end 0x0
pcibios_allocate_bus_resources: i=1 flags 0x200 start 0x4000 end 0x0
pcibios_allocate_bus_resources: i=2 flags 0x0 start 0x4000 end 0x0
pcibios_allocate_bus_resources: i=3 flags 0x0 start 0x4000 end 0x0
PCI 0000:00 Cannot reserve Legacy IO [io  0xffbed000-0xffbedfff]
PCI 0001:02 Cannot reserve Legacy IO [io  0xffbdb000-0xffbdbfff]
pci 0000:00:00.0: PCI bridge to [bus 01-01]
pci 0000:00:00.0:   bridge window [io  0xffbed000-0xffbfcfff]
pci 0000:00:00.0:   bridge window [mem 0xa0000000-0xbfffffff]
pci 0000:00:00.0:   bridge window [mem pref disabled]
pci 0000:00:00.0: enabling device (0106 -> 0107)
pci 0001:02:00.0: PCI bridge to [bus 03-03]
pci 0001:02:00.0:   bridge window [io  0xffbdb000-0xffbeafff]
pci 0001:02:00.0:   bridge window [mem 0xc0000000-0xdfffffff]
pci 0001:02:00.0:   bridge window [mem pref disabled]
pci 0001:02:00.0: enabling device (0106 -> 0107)
pci_bus 0000:00: resource 0 [io  0xffbed000-0xffbfcfff]
pci_bus 0000:00: resource 1 [mem 0xa0000000-0xbfffffff]
pci_bus 0000:01: resource 0 [io  0xffbed000-0xffbfcfff]
pci_bus 0000:01: resource 1 [mem 0xa0000000-0xbfffffff]
pci_bus 0001:02: resource 0 [io  0xffbdb000-0xffbeafff]
pci_bus 0001:02: resource 1 [mem 0xc0000000-0xdfffffff]
pci_bus 0001:03: resource 0 [io  0xffbdb000-0xffbeafff]
pci_bus 0001:03: resource 1 [mem 0xc0000000-0xdfffffff]
vgaarb: loaded
Freescale Elo / Elo Plus DMA driver
Switching to clocksource timebase
Switched to NOHz mode on CPU #0
NET: Registered protocol family 2
IP route cache hash table entries: 32768 (order: 5, 131072 bytes)
TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
TCP bind hash table entries: 65536 (order: 6, 262144 bytes)
TCP: Hash tables configured (established 131072 bind 65536)
TCP reno registered
UDP hash table entries: 512 (order: 1, 8192 bytes)
UDP-Lite hash table entries: 512 (order: 1, 8192 bytes)
NET: Registered protocol family 1
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
PCI: CLS 0 bytes, default 32
irq: irq 42 on host /soc@ffe00000/pic@40000 mapped to virtual irq 42
irq: irq 19 on host /soc@ffe00000/pic@40000 mapped to virtual irq 19
irq: irq 17 on host /soc@ffe00000/pic@40000 mapped to virtual irq 17
irq: irq 18 on host /soc@ffe00000/pic@40000 mapped to virtual irq 18
irq: irq 43 on host /soc@ffe00000/pic@40000 mapped to virtual irq 43
irq: irq 59 on host /soc@ffe00000/pic@40000 mapped to virtual irq 59
irq: irq 76 on host /soc@ffe00000/pic@40000 mapped to virtual irq 76
of:fsl-elo-dma ffe0c300.dma: #0 (fsl,eloplus-dma-channel), irq 76
irq: irq 77 on host /soc@ffe00000/pic@40000 mapped to virtual irq 77
of:fsl-elo-dma ffe0c300.dma: #1 (fsl,eloplus-dma-channel), irq 77
irq: irq 78 on host /soc@ffe00000/pic@40000 mapped to virtual irq 78
of:fsl-elo-dma ffe0c300.dma: #2 (fsl,eloplus-dma-channel), irq 78
irq: irq 79 on host /soc@ffe00000/pic@40000 mapped to virtual irq 79
of:fsl-elo-dma ffe0c300.dma: #3 (fsl,eloplus-dma-channel), irq 79
of:fsl-elo-dma ffe0c300.dma: request channel 0 IRQ
of:fsl-elo-dma ffe0c300.dma: request channel 1 IRQ
of:fsl-elo-dma ffe0c300.dma: request channel 2 IRQ
of:fsl-elo-dma ffe0c300.dma: request channel 3 IRQ
irq: irq 47 on host /soc@ffe00000/pic@40000 mapped to virtual irq 47
irq: irq 16 on host /soc@ffe00000/pic@40000 mapped to virtual irq 16
irq: irq 20 on host /soc@ffe00000/pic@40000 mapped to virtual irq 20
of:fsl-elo-dma ffe21300.dma: #0 (fsl,eloplus-dma-channel), irq 20
irq: irq 21 on host /soc@ffe00000/pic@40000 mapped to virtual irq 21
of:fsl-elo-dma ffe21300.dma: #1 (fsl,eloplus-dma-channel), irq 21
irq: irq 22 on host /soc@ffe00000/pic@40000 mapped to virtual irq 22
of:fsl-elo-dma ffe21300.dma: #2 (fsl,eloplus-dma-channel), irq 22
irq: irq 23 on host /soc@ffe00000/pic@40000 mapped to virtual irq 23
of:fsl-elo-dma ffe21300.dma: #3 (fsl,eloplus-dma-channel), irq 23
of:fsl-elo-dma ffe21300.dma: request channel 0 IRQ
of:fsl-elo-dma ffe21300.dma: request channel 1 IRQ
of:fsl-elo-dma ffe21300.dma: request channel 2 IRQ
of:fsl-elo-dma ffe21300.dma: request channel 3 IRQ
irq: irq 28 on host /soc@ffe00000/pic@40000 mapped to virtual irq 28
irq: irq 29 on host /soc@ffe00000/pic@40000 mapped to virtual irq 29
irq: irq 30 on host /soc@ffe00000/pic@40000 mapped to virtual irq 30
irq: irq 34 on host /soc@ffe00000/pic@40000 mapped to virtual irq 34
irq: irq 35 on host /soc@ffe00000/pic@40000 mapped to virtual irq 35
irq: irq 36 on host /soc@ffe00000/pic@40000 mapped to virtual irq 36
irq: irq 40 on host /soc@ffe00000/pic@40000 mapped to virtual irq 40
irq: irq 31 on host /soc@ffe00000/pic@40000 mapped to virtual irq 31
irq: irq 32 on host /soc@ffe00000/pic@40000 mapped to virtual irq 32
irq: irq 33 on host /soc@ffe00000/pic@40000 mapped to virtual irq 33
irq: irq 72 on host /soc@ffe00000/pic@40000 mapped to virtual irq 72
irq: irq 45 on host /soc@ffe00000/pic@40000 mapped to virtual irq 45
irq: irq 58 on host /soc@ffe00000/pic@40000 mapped to virtual irq 58
irq: irq 224 on host /soc@ffe00000/pic@40000 mapped to virtual irq 224
irq: irq 225 on host /soc@ffe00000/pic@40000 mapped to virtual irq 225
irq: irq 226 on host /soc@ffe00000/pic@40000 mapped to virtual irq 226
irq: irq 227 on host /soc@ffe00000/pic@40000 mapped to virtual irq 227
irq: irq 228 on host /soc@ffe00000/pic@40000 mapped to virtual irq 228
irq: irq 229 on host /soc@ffe00000/pic@40000 mapped to virtual irq 229
irq: irq 230 on host /soc@ffe00000/pic@40000 mapped to virtual irq 230
irq: irq 231 on host /soc@ffe00000/pic@40000 mapped to virtual irq 231
Setting up Freescale MSI support
msgmni has been set to 1512
Freescale DIU driver
Serial: 8250/16550 driver, 2 ports, IRQ sharing enabled
serial8250.0: ttyS0 at MMIO 0xffe04500 (irq = 42) is a 16550A
console [ttyS0] enabled, bootconsole disabled
serial8250.0: ttyS1 at MMIO 0xffe04600 (irq = 42) is a 16550A
Fixed MDIO Bus: probed
eth0: Gianfar Ethernet Controller Version 1.2, 00:04:9f:ec:a1:02
eth0: Running with NAPI enabled
eth0: RX BD ring size for Q[0]: 256
eth0: TX BD ring size for Q[0]: 256
eth1: Gianfar Ethernet Controller Version 1.2, 00:04:9f:ec:a1:11
eth1: Running with NAPI enabled
eth1: RX BD ring size for Q[0]: 256
eth1: TX BD ring size for Q[0]: 256
eth2: Gianfar Ethernet Controller Version 1.2, 00:04:9f:ec:a1:01
eth2: Running with NAPI enabled
eth2: RX BD ring size for Q[0]: 256
eth2: TX BD ring size for Q[0]: 256
Freescale PowerQUICC MII Bus: probed
irq: irq 3 on host /soc@ffe00000/pic@40000 mapped to virtual irq 24
Freescale PowerQUICC MII Bus: probed
of:mpc-i2c ffe03000.i2c: timeout 1000000 us
of:mpc-i2c ffe03100.i2c: timeout 1000000 us
TCP cubic registered
NET: Registered protocol family 17
IP-Config: Complete:
     device=eth0, addr=10.0.0.30, mask=255.0.0.0, gw=255.255.255.255,
     host=P2020RDB, domain=, nis-domain=(none),
     bootserver=10.0.0.10, rootserver=10.0.0.10, rootpath=
PHY: 0:01 - Link is Up - 1000/Full
VFS: Mounted root (nfs filesystem) on device 0:11.
Freeing unused kernel memory: 136k init
__dma_request_channel: success (dma0chan0)
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
dmatest: Started 2 threads using dma0chan0
of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0x8
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan0: completed_cookie=1
of:fsl-elo-dma ffe0c300.dma: chan0: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet exit
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #0: No errors with src_off=0x3a2 dst_off=0xc1e len=0x2ce5
dma0chan0-copy0: terminating after 1 tests, 0 failures (status 0)
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
dma0chan0-copy1: #0: test timed out
dma0chan0-copy1: terminating after 1 tests, 1 failures (status 0)

Re: [PATCH 0/8] fsldma: lockup fixes

[Ira W. Snyder]

On Mon, Feb 28, 2011 at 08:47:42PM +0200, Felix Radensky wrote:
>     <br>
>     Hi Ira,<br>
>     <br>
>     Attached dmesg output.<br>
>     <br>
>     Felix.<br>
>     <br>
>     <pre>On Mon, Feb 28, 2011 at 01:36:38PM +0200, Felix Radensky wrote:

> &gt; Hi Ira,
> &gt; 
> &gt; I've tried your patches with linux-2.6.38-rc6 on P2020RDB.
> &gt; DMA test fails with the following errors if threads_per_chan != 1
> &gt; 
> &gt; dma0chan0-copy1: terminating after 1 tests, 1 failures (status 0)
> &gt; dma0chan0-copy2: #0: test timed out
> &gt; 
> &gt; I've run the test like this:
> &gt; 
> &gt; modprobe dmatest threads_per_chan=2 iterations=1
> &gt; 
> 
> Thanks Felix. This works fine on the 83xx DMA controller. When you have
> a chance, can you add "#define DEBUG 1" as the first line of
> drivers/dma/fsldma.c and then rerun your test with:
> 
> modprobe dmatest threads_per_chan=2 iterations=1 max_channels=1
> 
> And send me the dmesg output.
> 
> I don't quite understand the difference between links and lists in the
> 85xx controller yet. I'll work my way through the datasheet this morning
> and send out a fixed patch.
> 
> Thanks very much for running the tests!
> 
> Ira

[ snip most of dmesg output ]

> Freeing unused kernel memory: 136k init
> __dma_request_channel: success (dma0chan0)
> of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
> dmatest: Started 2 threads using dma0chan0
> of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0x8
> of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-link INT
> of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
> of:fsl-elo-dma ffe0c300.dma: chan0: tasklet entry
> of:fsl-elo-dma ffe0c300.dma: chan0: completed_cookie=1
> of:fsl-elo-dma ffe0c300.dma: chan0: no pending LDs
> of:fsl-elo-dma ffe0c300.dma: chan0: tasklet exit
> dma0chan0-copy0: verifying source buffer...
> dma0chan0-copy0: verifying dest buffer...
> dma0chan0-copy0: #0: No errors with src_off=0x3a2 dst_off=0xc1e len=0x2ce5
> dma0chan0-copy0: terminating after 1 tests, 0 failures (status 0)
> of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
> dma0chan0-copy1: #0: test timed out
> dma0chan0-copy1: terminating after 1 tests, 1 failures (status 0)

Thank you very much Felix. The dmesg output shows that the controller
never got an interrupt for the second transaction. The patch below has
extra debugging information that may help determine why this happens.
Please apply it and re-run the test.

The last section of dmesg (after "Freeing unused kernel memory") is all
I need.

Thanks again,
Ira


>From 8935444cb18c921332ebe1d055531e54f0c100e9 Mon Sep 17 00:00:00 2001
From: Ira W. Snyder <iws@ovro.caltech.edu>
Date: Mon, 28 Feb 2011 11:33:17 -0800
Subject: [PATCH] fsldma: try and debug 85xx controller

1 - reduce the maximum transfer size to 1000 bytes to force chains
2 - re-enable end-of-segment interrupts to see what the hardware does
3 - enable end-of-list interrupts to see what the hardware does
4 - debug cookies (this shouldn't be a problem, but just in case)

NOT AT ALL Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
---
 drivers/dma/fsldma.c |   16 ++++++++++++++++
 drivers/dma/fsldma.h |    3 ++-
 2 files changed, 18 insertions(+), 1 deletions(-)

diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 3dc27a9..b82b76e 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -24,6 +24,9 @@
  *
  */
 
+#define DEBUG 1
+#define FSL_DMA_LD_DEBUG 1
+
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/pci.h>
@@ -162,6 +165,7 @@ static void dma_init(struct fsldma_chan *chan)
 		 * BWC - Bandwidth sharing among channels
 		 */
 		DMA_OUT(chan, &chan->regs->mr, FSL_DMA_MR_BWC
+				| FSL_DMA_MR_EOSIE | FSL_DMA_MR_EOLSIE
 				| FSL_DMA_MR_EIE | FSL_DMA_MR_EOLNIE, 32);
 		break;
 	case FSL_DMA_IP_83XX:
@@ -389,6 +393,7 @@ static dma_cookie_t fsl_dma_tx_submit(struct dma_async_tx_descriptor *tx)
 	 * that make up this transaction
 	 */
 	cookie = chan->common.cookie;
+	dev_dbg(chan->dev, "%s: assign cookies: start=%d\n", chan->name, cookie);
 	list_for_each_entry(child, &desc->tx_list, node) {
 		cookie++;
 		if (cookie < DMA_MIN_COOKIE)
@@ -397,6 +402,7 @@ static dma_cookie_t fsl_dma_tx_submit(struct dma_async_tx_descriptor *tx)
 		child->async_tx.cookie = cookie;
 	}
 
+	dev_dbg(chan->dev, "%s: assign cookies: end=%d\n", chan->name, cookie);
 	chan->common.cookie = cookie;
 
 	/* put this transaction onto the tail of the pending queue */
@@ -1018,6 +1024,16 @@ static irqreturn_t fsldma_chan_irq(int irq, void *data)
 		stat &= ~FSL_DMA_SR_EOLNI;
 	}
 
+	if (stat & FSL_DMA_SR_EOLSI) {
+		dev_dbg(chan->dev, "%s: irq: End-of-list INT\n", name);
+		stat &= ~FSL_DMA_SR_EOLSI;
+	}
+
+	if (stat & FSL_DMA_SR_EOSI) {
+		dev_dbg(chan->dev, "%s: irq: End-of-segment INT\n", name);
+		stat &= ~FSL_DMA_SR_EOSI;
+	}
+
 	/* check that the DMA controller is really idle */
 	if (!dma_is_idle(chan))
 		dev_err(chan->dev, "%s: irq: controller not idle!\n", name);
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index 9cb5aa5..322aa0c 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -73,7 +73,8 @@
 #define FSL_DMA_EOSIE		0x8
 #define FSL_DMA_NLDA_MASK	(~(u64)0x1f)
 
-#define FSL_DMA_BCR_MAX_CNT	0x03ffffffu
+//#define FSL_DMA_BCR_MAX_CNT	0x03ffffffu
+#define FSL_DMA_BCR_MAX_CNT	1000
 
 #define FSL_DMA_DGSR_TE		0x80
 #define FSL_DMA_DGSR_CH		0x20
-- 
1.7.3.4

Re: [PATCH 0/8] fsldma: lockup fixes

[Felix Radensky]

[-- Attachment #1: Type: text/plain, Size: 395 bytes --]

Hi Ira,

> Thank you very much Felix. The dmesg output shows that the controller
> never got an interrupt for the second transaction. The patch below has
> extra debugging information that may help determine why this happens.
> Please apply it and re-run the test.
>
> The last section of dmesg (after "Freeing unused kernel memory") is all
> I need.
>

Attached relevant dmesg portion.

Felix.

[-- Attachment #2: dmesg.txt --]
[-- Type: text/plain, Size: 23041 bytes --]

Freeing unused kernel memory: 136k init
__dma_request_channel: success (dma0chan0)
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd000 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd060 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd0c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd120 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd180 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd1e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd240 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd2a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd300 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=0
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=9
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0x6
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-segment INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: controller not idle!
of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0xa
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-segment INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan0: completed_cookie=9
of:fsl-elo-dma ffe0c300.dma: chan0: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd000 callback
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd000 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd060 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd0c0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd120 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd180 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd1e0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd240 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd2a0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd300 free
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet exit
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #0: No errors with src_off=0x12b2 dst_off=0x1d7d len=0x2065
dma0chan0-copy0: terminating after 1 tests, 0 failures (status 0)
dmatest: Started 2 threads using dma0chan0
private_candidate: dma0chan0 busy
__dma_request_channel: success (dma0chan1)
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd300 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd2a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd240 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd1e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef2cd180 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=9
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=14
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca000 allocated
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca060 allocated
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca0c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca120 allocated
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca180 allocated
of:fsl-elo-dma ffe0c300.dma: chan1: assign cookies: start=0
of:fsl-elo-dma ffe0c300.dma: chan1: assign cookies: end=5
of:fsl-elo-dma ffe0c300.dma: chan1: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan1: irq: stat = 0x6
of:fsl-elo-dma ffe0c300.dma: chan1: irq: End-of-segment INT
of:fsl-elo-dma ffe0c300.dma: chan1: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan1: irq: stat = 0xa
of:fsl-elo-dma ffe0c300.dma: chan1: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan1: irq: End-of-segment INT
of:fsl-elo-dma ffe0c300.dma: chan1: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan1: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan1: completed_cookie=5
of:fsl-elo-dma ffe0c300.dma: chan1: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca000 callback
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca000 free
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca060 free
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca0c0 free
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca120 free
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca180 free
of:fsl-elo-dma ffe0c300.dma: chan1: tasklet exit
dma0chan1-copy0: verifying source buffer...
dma0chan1-copy0: verifying dest buffer...
dma0chan1-copy0: #0: No errors with src_off=0x1abf dst_off=0x240 len=0x1079
dma0chan1-copy0: terminating after 1 tests, 0 failures (status 0)
dmatest: Started 2 threads using dma0chan1
private_candidate: dma0chan0 busy
private_candidate: dma0chan1 busy
__dma_request_channel: success (dma0chan2)
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca180 allocated
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca120 allocated
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca0c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca060 allocated
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca000 allocated
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca1e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca240 allocated
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca2a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan1: LD ef2ca300 allocated
of:fsl-elo-dma ffe0c300.dma: chan1: assign cookies: start=5
of:fsl-elo-dma ffe0c300.dma: chan1: assign cookies: end=14
of:fsl-elo-dma ffe0c300.dma: chan1: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan2: LD ef34d000 allocated
of:fsl-elo-dma ffe0c300.dma: chan2: assign cookies: start=0
of:fsl-elo-dma ffe0c300.dma: chan2: assign cookies: end=1
of:fsl-elo-dma ffe0c300.dma: chan2: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan2: irq: stat = 0xa
of:fsl-elo-dma ffe0c300.dma: chan2: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan2: irq: End-of-segment INT
of:fsl-elo-dma ffe0c300.dma: chan2: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan2: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan2: completed_cookie=1
of:fsl-elo-dma ffe0c300.dma: chan2: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan2: LD ef34d000 callback
of:fsl-elo-dma ffe0c300.dma: chan2: LD ef34d000 free
of:fsl-elo-dma ffe0c300.dma: chan2: tasklet exit
dma0chan2-copy0: verifying source buffer...
dma0chan2-copy0: verifying dest buffer...
dma0chan2-copy0: #0: No errors with src_off=0x1837 dst_off=0x3bac len=0x73
dma0chan2-copy0: terminating after 1 tests, 0 failures (status 0)
dmatest: Started 2 threads using dma0chan2
private_candidate: dma0chan0 busy
private_candidate: dma0chan1 busy
private_candidate: dma0chan2 busy
__dma_request_channel: success (dma0chan3)
of:fsl-elo-dma ffe0c300.dma: chan2: LD ef34d000 allocated
of:fsl-elo-dma ffe0c300.dma: chan2: LD ef34d060 allocated
of:fsl-elo-dma ffe0c300.dma: chan2: LD ef34d0c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan2: LD ef34d120 allocated
of:fsl-elo-dma ffe0c300.dma: chan2: LD ef34d180 allocated
of:fsl-elo-dma ffe0c300.dma: chan2: LD ef34d1e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan2: LD ef34d240 allocated
of:fsl-elo-dma ffe0c300.dma: chan2: LD ef34d2a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan2: assign cookies: start=1
of:fsl-elo-dma ffe0c300.dma: chan2: assign cookies: end=9
of:fsl-elo-dma ffe0c300.dma: chan2: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef338000 allocated
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef338060 allocated
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef3380c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef338120 allocated
of:fsl-elo-dma ffe0c300.dma: chan3: assign cookies: start=0
of:fsl-elo-dma ffe0c300.dma: chan3: assign cookies: end=4
of:fsl-elo-dma ffe0c300.dma: chan3: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan3: irq: stat = 0x6
of:fsl-elo-dma ffe0c300.dma: chan3: irq: End-of-segment INT
of:fsl-elo-dma ffe0c300.dma: chan3: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan3: irq: stat = 0xa
of:fsl-elo-dma ffe0c300.dma: chan3: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan3: irq: End-of-segment INT
of:fsl-elo-dma ffe0c300.dma: chan3: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan3: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan3: completed_cookie=4
of:fsl-elo-dma ffe0c300.dma: chan3: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef338000 callback
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef338000 free
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef338060 free
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef3380c0 free
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef338120 free
of:fsl-elo-dma ffe0c300.dma: chan3: tasklet exit
dmatest: Started 2 threads using dma0chan3
private_candidate: dma0chan0 busy
private_candidate: dma0chan1 busy
private_candidate: dma0chan2 busy
private_candidate: dma0chan3 busy
__dma_request_channel: success (dma1chan0)
dma0chan3-copy0: verifying source buffer...
dma0chan3-copy0: verifying dest buffer...
dma0chan3-copy0: #0: No errors with src_off=0x13a6 dst_off=0xd9c len=0xf40
dma0chan3-copy0: terminating after 1 tests, 0 failures (status 0)
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef338120 allocated
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef3380c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef338060 allocated
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef338000 allocated
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef338180 allocated
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef3381e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef338240 allocated
of:fsl-elo-dma ffe0c300.dma: chan3: LD ef3382a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan3: assign cookies: start=4
of:fsl-elo-dma ffe0c300.dma: chan3: assign cookies: end=12
of:fsl-elo-dma ffe0c300.dma: chan3: idle, starting controller
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3000 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3060 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b30c0 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3120 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3180 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b31e0 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3240 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b32a0 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3300 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3360 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b33c0 allocated
of:fsl-elo-dma ffe21300.dma: chan0: assign cookies: start=0
of:fsl-elo-dma ffe21300.dma: chan0: assign cookies: end=11
of:fsl-elo-dma ffe21300.dma: chan0: idle, starting controller
of:fsl-elo-dma ffe21300.dma: chan0: irq: stat = 0x6
of:fsl-elo-dma ffe21300.dma: chan0: irq: End-of-segment INT
of:fsl-elo-dma ffe21300.dma: chan0: irq: controller not idle!
of:fsl-elo-dma ffe21300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe21300.dma: chan0: irq: stat = 0xa
of:fsl-elo-dma ffe21300.dma: chan0: irq: End-of-link INT
of:fsl-elo-dma ffe21300.dma: chan0: irq: End-of-segment INT
of:fsl-elo-dma ffe21300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe21300.dma: chan0: tasklet entry
of:fsl-elo-dma ffe21300.dma: chan0: completed_cookie=11
of:fsl-elo-dma ffe21300.dma: chan0: no pending LDs
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3000 callback
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3000 free
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3060 free
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b30c0 free
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3120 free
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3180 free
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b31e0 free
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3240 free
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b32a0 free
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3300 free
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3360 free
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b33c0 free
of:fsl-elo-dma ffe21300.dma: chan0: tasklet exit
dma1chan0-copy0: verifying source buffer...
dma1chan0-copy0: verifying dest buffer...
dma1chan0-copy0: #0: No errors with src_off=0x63a dst_off=0x1342 len=0x28b3
dma1chan0-copy0: terminating after 1 tests, 0 failures (status 0)
dmatest: Started 2 threads using dma1chan0
private_candidate: dma0chan0 busy
private_candidate: dma0chan1 busy
private_candidate: dma0chan2 busy
private_candidate: dma0chan3 busy
private_candidate: dma1chan0 busy
__dma_request_channel: success (dma1chan1)
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b33c0 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3360 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3300 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b32a0 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3240 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b31e0 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3180 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3120 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b30c0 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3060 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3000 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3420 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b3480 allocated
of:fsl-elo-dma ffe21300.dma: chan0: LD ef3b34e0 allocated
of:fsl-elo-dma ffe21300.dma: chan0: assign cookies: start=11
of:fsl-elo-dma ffe21300.dma: chan0: assign cookies: end=25
of:fsl-elo-dma ffe21300.dma: chan0: idle, starting controller
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae000 allocated
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae060 allocated
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae0c0 allocated
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae120 allocated
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae180 allocated
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae1e0 allocated
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae240 allocated
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae2a0 allocated
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae300 allocated
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae360 allocated
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae3c0 allocated
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae420 allocated
of:fsl-elo-dma ffe21300.dma: chan1: assign cookies: start=0
of:fsl-elo-dma ffe21300.dma: chan1: assign cookies: end=12
of:fsl-elo-dma ffe21300.dma: chan1: idle, starting controller
of:fsl-elo-dma ffe21300.dma: chan1: irq: stat = 0x6
of:fsl-elo-dma ffe21300.dma: chan1: irq: End-of-segment INT
of:fsl-elo-dma ffe21300.dma: chan1: irq: controller not idle!
of:fsl-elo-dma ffe21300.dma: chan1: irq: Exit
of:fsl-elo-dma ffe21300.dma: chan1: irq: stat = 0xa
of:fsl-elo-dma ffe21300.dma: chan1: irq: End-of-link INT
of:fsl-elo-dma ffe21300.dma: chan1: irq: End-of-segment INT
of:fsl-elo-dma ffe21300.dma: chan1: irq: Exit
of:fsl-elo-dma ffe21300.dma: chan1: tasklet entry
of:fsl-elo-dma ffe21300.dma: chan1: completed_cookie=12
of:fsl-elo-dma ffe21300.dma: chan1: no pending LDs
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae000 callback
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae000 free
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae060 free
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae0c0 free
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae120 free
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae180 free
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae1e0 free
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae240 free
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae2a0 free
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae300 free
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae360 free
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae3c0 free
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae420 free
of:fsl-elo-dma ffe21300.dma: chan1: tasklet exit
dmatest: Started 2 threads using dma1chan1
private_candidate: dma0chan0 busy
private_candidate: dma0chan1 busy
private_candidate: dma0chan2 busy
private_candidate: dma0chan3 busy
private_candidate: dma1chan0 busy
private_candidate: dma1chan1 busy
__dma_request_channel: success (dma1chan2)
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae420 allocated
of:fsl-elo-dma ffe21300.dma: chan1: LD ef3ae3c0 allocated
of:fsl-elo-dma ffe21300.dma: chan1: assign cookies: start=12
of:fsl-elo-dma ffe21300.dma: chan1: assign cookies: end=14
of:fsl-elo-dma ffe21300.dma: chan1: idle, starting controller
dma1chan1-copy0: verifying source buffer...
dma1chan1-copy0: verifying dest buffer...
dma1chan1-copy0: #0: No errors with src_off=0x6d7 dst_off=0xdd6 len=0x2bad
dma1chan1-copy0: terminating after 1 tests, 0 failures (status 0)
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b000 allocated
of:fsl-elo-dma ffe21300.dma: chan2: assign cookies: start=0
of:fsl-elo-dma ffe21300.dma: chan2: assign cookies: end=1
of:fsl-elo-dma ffe21300.dma: chan2: idle, starting controller
of:fsl-elo-dma ffe21300.dma: chan2: irq: stat = 0xa
of:fsl-elo-dma ffe21300.dma: chan2: irq: End-of-link INT
of:fsl-elo-dma ffe21300.dma: chan2: irq: End-of-segment INT
of:fsl-elo-dma ffe21300.dma: chan2: irq: Exit
of:fsl-elo-dma ffe21300.dma: chan2: tasklet entry
of:fsl-elo-dma ffe21300.dma: chan2: completed_cookie=1
of:fsl-elo-dma ffe21300.dma: chan2: no pending LDs
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b000 callback
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b000 free
of:fsl-elo-dma ffe21300.dma: chan2: tasklet exit
dmatest: Started 2 threads using dma1chan2
private_candidate: dma0chan0 busy
private_candidate: dma0chan1 busy
private_candidate: dma0chan2 busy
private_candidate: dma0chan3 busy
private_candidate: dma1chan0 busy
private_candidate: dma1chan1 busy
private_candidate: dma1chan2 busy
__dma_request_channel: success (dma1chan3)
dma1chan2-copy0: verifying source buffer...
dma1chan2-copy0: verifying dest buffer...
dma1chan2-copy0: #0: No errors with src_off=0x39c9 dst_off=0x2def len=0x5c
dma1chan2-copy0: terminating after 1 tests, 0 failures (status 0)
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b000 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b060 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b0c0 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b120 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b180 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b1e0 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b240 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b2a0 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b300 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b360 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b3c0 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b420 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b480 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b4e0 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b540 allocated
of:fsl-elo-dma ffe21300.dma: chan2: LD ef37b5a0 allocated
of:fsl-elo-dma ffe21300.dma: chan2: assign cookies: start=1
of:fsl-elo-dma ffe21300.dma: chan2: assign cookies: end=17
of:fsl-elo-dma ffe21300.dma: chan2: idle, starting controller
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af000 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af060 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af0c0 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af120 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af180 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af1e0 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af240 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af2a0 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af300 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af360 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af3c0 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af420 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af480 allocated
of:fsl-elo-dma ffe21300.dma: chan3: assign cookies: start=0
of:fsl-elo-dma ffe21300.dma: chan3: assign cookies: end=13
of:fsl-elo-dma ffe21300.dma: chan3: idle, starting controller
of:fsl-elo-dma ffe21300.dma: chan3: irq: stat = 0x6
of:fsl-elo-dma ffe21300.dma: chan3: irq: End-of-segment INT
of:fsl-elo-dma ffe21300.dma: chan3: irq: controller not idle!
of:fsl-elo-dma ffe21300.dma: chan3: irq: Exit
of:fsl-elo-dma ffe21300.dma: chan3: irq: stat = 0xa
of:fsl-elo-dma ffe21300.dma: chan3: irq: End-of-link INT
of:fsl-elo-dma ffe21300.dma: chan3: irq: End-of-segment INT
of:fsl-elo-dma ffe21300.dma: chan3: irq: Exit
of:fsl-elo-dma ffe21300.dma: chan3: tasklet entry
of:fsl-elo-dma ffe21300.dma: chan3: completed_cookie=13
of:fsl-elo-dma ffe21300.dma: chan3: no pending LDs
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af000 callback
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af000 free
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af060 free
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af0c0 free
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af120 free
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af180 free
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af1e0 free
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af240 free
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af2a0 free
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af300 free
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af360 free
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af3c0 free
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af420 free
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af480 free
of:fsl-elo-dma ffe21300.dma: chan3: tasklet exit
dmatest: Started 2 threads using dma1chan3
private_candidate: dma0chan0 busy
private_candidate: dma0chan1 busy
private_candidate: dma0chan2 busy
private_candidate: dma0chan3 busy
private_candidate: dma1chan0 busy
private_candidate: dma1chan1 busy
private_candidate: dma1chan2 busy
private_candidate: dma1chan3 busy
__dma_request_channel: fail ((null))
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af480 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af420 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af3c0 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af360 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af300 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af2a0 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af240 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af1e0 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af180 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af120 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af0c0 allocated
of:fsl-elo-dma ffe21300.dma: chan3: LD ef3af060 allocated
of:fsl-elo-dma ffe21300.dma: chan3: assign cookies: start=13
of:fsl-elo-dma ffe21300.dma: chan3: assign cookies: end=25
of:fsl-elo-dma ffe21300.dma: chan3: idle, starting controller
dma1chan3-copy0: verifying source buffer...
dma1chan3-copy0: verifying dest buffer...
dma1chan3-copy0: #0: No errors with src_off=0x751 dst_off=0x5a0 len=0x3084
dma1chan3-copy0: terminating after 1 tests, 0 failures (status 0)
dma0chan0-copy1: #0: test timed out
dma0chan0-copy1: terminating after 1 tests, 1 failures (status 0)
dma0chan1-copy1: #0: test timed out
dma0chan1-copy1: terminating after 1 tests, 1 failures (status 0)
dma0chan2-copy1: #0: test timed out
dma0chan2-copy1: terminating after 1 tests, 1 failures (status 0)
dma0chan3-copy1: #0: test timed out
dma0chan3-copy1: terminating after 1 tests, 1 failures (status 0)
dma1chan0-copy1: #0: test timed out
dma1chan0-copy1: terminating after 1 tests, 1 failures (status 0)
dma1chan1-copy1: #0: test timed out
dma1chan1-copy1: terminating after 1 tests, 1 failures (status 0)
dma1chan2-copy1: #0: test timed out
dma1chan2-copy1: terminating after 1 tests, 1 failures (status 0)
dma1chan3-copy1: #0: test timed out
dma1chan3-copy1: terminating after 1 tests, 1 failures (status 0)

Re: [PATCH 0/8] fsldma: lockup fixes

[Ira W. Snyder]

On Mon, Feb 28, 2011 at 10:15:49PM +0200, Felix Radensky wrote:
> Hi Ira,
> 
> > Thank you very much Felix. The dmesg output shows that the controller
> > never got an interrupt for the second transaction. The patch below has
> > extra debugging information that may help determine why this happens.
> > Please apply it and re-run the test.
> >
> > The last section of dmesg (after "Freeing unused kernel memory") is all
> > I need.
> >
> 
> Attached relevant dmesg portion.
> 

Ok, try this patch on top of the last one.

It looks like you used the dmatest module in multi-channel mode last
time. One channel makes it easier to debug:

modprobe dmatest max_channels=1 threads_per_chan=2 iterations=1

Thanks for your help in debugging this. Hopefully this is the last
patch to test. :)

Ira


>From 58bc23c3b68f8db0aa09434fdeb6aef641a5eadd Mon Sep 17 00:00:00 2001
From: Ira W. Snyder <iws@ovro.caltech.edu>
Date: Mon, 28 Feb 2011 12:55:55 -0800
Subject: [PATCH] fsldma: enable end-of-segments interrupt on last descriptor

This is a hack to manually set the end-of-segments interrupt on the last
descriptor in each chain. It appears that the P2020RDB controller
doesn't generate the end-of-links interrupt as explained in the
datasheet.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
---
 drivers/dma/fsldma.c |    3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index b82b76e..e4d9d17 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -141,7 +141,7 @@ static void set_ld_eol(struct fsldma_chan *chan, struct fsl_desc_sw *desc)
 	u64 snoop_bits;
 
 	snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_83XX)
-		? FSL_DMA_SNEN : 0;
+		? FSL_DMA_SNEN : (u64)(0x8);
 
 	desc->hw.next_ln_addr = CPU_TO_DMA(chan,
 		DMA_TO_CPU(chan, desc->hw.next_ln_addr, 64) | FSL_DMA_EOL
@@ -165,7 +165,6 @@ static void dma_init(struct fsldma_chan *chan)
 		 * BWC - Bandwidth sharing among channels
 		 */
 		DMA_OUT(chan, &chan->regs->mr, FSL_DMA_MR_BWC
-				| FSL_DMA_MR_EOSIE | FSL_DMA_MR_EOLSIE
 				| FSL_DMA_MR_EIE | FSL_DMA_MR_EOLNIE, 32);
 		break;
 	case FSL_DMA_IP_83XX:
-- 
1.7.3.4

Re: [PATCH 0/8] fsldma: lockup fixes

[Felix Radensky]

Hi Ira,

On 02/28/2011 11:11 PM, Ira W. Snyder wrote:
> On Mon, Feb 28, 2011 at 10:15:49PM +0200, Felix Radensky wrote:
>> Hi Ira,
>>
>>> Thank you very much Felix. The dmesg output shows that the controller
>>> never got an interrupt for the second transaction. The patch below has
>>> extra debugging information that may help determine why this happens.
>>> Please apply it and re-run the test.
>>>
>>> The last section of dmesg (after "Freeing unused kernel memory") is all
>>> I need.
>>>
>> Attached relevant dmesg portion.
>>
> Ok, try this patch on top of the last one.
>
> It looks like you used the dmatest module in multi-channel mode last
> time. One channel makes it easier to debug:
>
> modprobe dmatest max_channels=1 threads_per_chan=2 iterations=1
>
> Thanks for your help in debugging this. Hopefully this is the last
> patch to test. :)
>
> Ira
>

Looks like this was not the last one. The test still fails, see below

__dma_request_channel: success (dma0chan0)
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef380000 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef380060 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3800c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef380120 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef380180 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3801e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=0
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=6
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
dmatest: Started 2 threads using dma0chan0
of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0x8
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan0: completed_cookie=6
of:fsl-elo-dma ffe0c300.dma: chan0: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef380000 callback
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef380000 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef380060 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3800c0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef380120 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef380180 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3801e0 free
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet exit
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #0: No errors with src_off=0xf92 dst_off=0xf46 len=0x14ad
dma0chan0-copy0: terminating after 1 tests, 0 failures (status 0)
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3801e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef380180 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef380120 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=6
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=9
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
dma0chan0-copy1: #0: test timed out
dma0chan0-copy1: terminating after 1 tests, 1 failures (status 0)

Felix.

Re: [PATCH 0/8] fsldma: lockup fixes

[Ira W. Snyder]

On Mon, Feb 28, 2011 at 11:27:40PM +0200, Felix Radensky wrote:
> Hi Ira,
> 
> On 02/28/2011 11:11 PM, Ira W. Snyder wrote:
> > On Mon, Feb 28, 2011 at 10:15:49PM +0200, Felix Radensky wrote:
> >> Hi Ira,
> >>
> >>> Thank you very much Felix. The dmesg output shows that the controller
> >>> never got an interrupt for the second transaction. The patch below has
> >>> extra debugging information that may help determine why this happens.
> >>> Please apply it and re-run the test.
> >>>
> >>> The last section of dmesg (after "Freeing unused kernel memory") is all
> >>> I need.
> >>>
> >> Attached relevant dmesg portion.
> >>
> > Ok, try this patch on top of the last one.
> >
> > It looks like you used the dmatest module in multi-channel mode last
> > time. One channel makes it easier to debug:
> >
> > modprobe dmatest max_channels=1 threads_per_chan=2 iterations=1
> >
> > Thanks for your help in debugging this. Hopefully this is the last
> > patch to test. :)
> >
> > Ira
> >
> 
> Looks like this was not the last one. The test still fails, see below
> 

>From this log, it looks like the DMA controller is not generating an
interrupt after the second chain is started. The first chain is finished
before the second thread runs and starts its chain.

The end-of-segments interrupt is completely missing. The part is not
behaving as the datasheet explains it should. Are you sure you applied
the patch and rebuilt the kernel? (Just checking to be sure. I'm very
appreciative of the amount of help you've given me debugging this!)

Can you run this for me:

modprobe dmatest max_channels=1 threads_per_chan=1 iterations=4

Thanks again,
Ira

Re: [PATCH 0/8] fsldma: lockup fixes

[Felix Radensky]

Hi Ira,

On 03/01/2011 02:21 AM, Ira W. Snyder wrote:
> On Mon, Feb 28, 2011 at 11:27:40PM +0200, Felix Radensky wrote:
>> Hi Ira,
>>
>> On 02/28/2011 11:11 PM, Ira W. Snyder wrote:
>>> On Mon, Feb 28, 2011 at 10:15:49PM +0200, Felix Radensky wrote:
>>>> Hi Ira,
>>>>
>>>>> Thank you very much Felix. The dmesg output shows that the controller
>>>>> never got an interrupt for the second transaction. The patch below has
>>>>> extra debugging information that may help determine why this happens.
>>>>> Please apply it and re-run the test.
>>>>>
>>>>> The last section of dmesg (after "Freeing unused kernel memory") is all
>>>>> I need.
>>>>>
>>>> Attached relevant dmesg portion.
>>>>
>>> Ok, try this patch on top of the last one.
>>>
>>> It looks like you used the dmatest module in multi-channel mode last
>>> time. One channel makes it easier to debug:
>>>
>>> modprobe dmatest max_channels=1 threads_per_chan=2 iterations=1
>>>
>>> Thanks for your help in debugging this. Hopefully this is the last
>>> patch to test. :)
>>>
>>> Ira
>>>
>> Looks like this was not the last one. The test still fails, see below
>>
>  From this log, it looks like the DMA controller is not generating an
> interrupt after the second chain is started. The first chain is finished
> before the second thread runs and starts its chain.
>
> The end-of-segments interrupt is completely missing. The part is not
> behaving as the datasheet explains it should. Are you sure you applied
> the patch and rebuilt the kernel? (Just checking to be sure. I'm very
> appreciative of the amount of help you've given me debugging this!)

I've double checked and I'm sure I've applied your patch and rebuilt
the kernel.
> Can you run this for me:
>
> modprobe dmatest max_channels=1 threads_per_chan=1 iterations=4
>
> Thanks again,
> Ira

See below.

__dma_request_channel: success (dma0chan0)
dmatest: Started 1 threads using dma0chan0
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7000 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7060 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a70c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7120 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7180 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a71e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7240 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a72a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7300 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7360 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a73c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7420 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7480 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a74e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=0
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=14
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0x8
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan0: completed_cookie=14
of:fsl-elo-dma ffe0c300.dma: chan0: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7000 callback
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7000 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7060 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a70c0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7120 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7180 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a71e0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7240 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a72a0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7300 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7360 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a73c0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7420 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7480 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a74e0 free
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet exit
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #0: No errors with src_off=0x43e dst_off=0x3a5 len=0x3605
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a74e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7480 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=14
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=16
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
dma0chan0-copy0: #1: test timed out
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7420 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a73c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7360 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7300 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=16
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=20
of:fsl-elo-dma ffe0c300.dma: chan0: DMA controller still busy
dma0chan0-copy0: #2: test timed out
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a72a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7240 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a71e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7180 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7120 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a70c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7060 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=20
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=27
of:fsl-elo-dma ffe0c300.dma: chan0: DMA controller still busy
dma0chan0-copy0: #3: test timed out
dma0chan0-copy0: terminating after 4 tests, 3 failures (status 0)

Felix.

Re: [PATCH 0/8] fsldma: lockup fixes

[Felix Radensky]

Hi Ira,

On 03/01/2011 02:21 AM, Ira W. Snyder wrote:
> On Mon, Feb 28, 2011 at 11:27:40PM +0200, Felix Radensky wrote:
>> Hi Ira,
>>
>> On 02/28/2011 11:11 PM, Ira W. Snyder wrote:
>>> On Mon, Feb 28, 2011 at 10:15:49PM +0200, Felix Radensky wrote:
>>>> Hi Ira,
>>>>
>>>>> Thank you very much Felix. The dmesg output shows that the controller
>>>>> never got an interrupt for the second transaction. The patch below has
>>>>> extra debugging information that may help determine why this happens.
>>>>> Please apply it and re-run the test.
>>>>>
>>>>> The last section of dmesg (after "Freeing unused kernel memory") is all
>>>>> I need.
>>>>>
>>>> Attached relevant dmesg portion.
>>>>
>>> Ok, try this patch on top of the last one.
>>>
>>> It looks like you used the dmatest module in multi-channel mode last
>>> time. One channel makes it easier to debug:
>>>
>>> modprobe dmatest max_channels=1 threads_per_chan=2 iterations=1
>>>
>>> Thanks for your help in debugging this. Hopefully this is the last
>>> patch to test. :)
>>>
>>> Ira
>>>
>> Looks like this was not the last one. The test still fails, see below
>>
>  From this log, it looks like the DMA controller is not generating an
> interrupt after the second chain is started. The first chain is finished
> before the second thread runs and starts its chain.
>
> The end-of-segments interrupt is completely missing. The part is not
> behaving as the datasheet explains it should. Are you sure you applied
> the patch and rebuilt the kernel? (Just checking to be sure. I'm very
> appreciative of the amount of help you've given me debugging this!)
>
> Can you run this for me:
>
> modprobe dmatest max_channels=1 threads_per_chan=1 iterations=4
>
> Thanks again,
> Ira

Without your patches applied the output of the test above looks
like this:

__dma_request_channel: success (dma0chan0)
dmatest: Started 1 threads using dma0chan0
of:fsl-elo-dma ffe0c300.dma: irq: channel 0, stat = 0xa
of:fsl-elo-dma ffe0c300.dma: irq: End-of-segments INT
of:fsl-elo-dma ffe0c300.dma: irq: clndar 0x2f34d000, nlndar 0x100000000
of:fsl-elo-dma ffe0c300.dma: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: no pending LDs
of:fsl-elo-dma ffe0c300.dma: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 1
of:fsl-elo-dma ffe0c300.dma: LD ef34d000 callback
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 1
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #0: No errors with src_off=0xb90 dst_off=0x101c 
len=0x2aea
of:fsl-elo-dma ffe0c300.dma: irq: channel 0, stat = 0xa
of:fsl-elo-dma ffe0c300.dma: irq: End-of-segments INT
of:fsl-elo-dma ffe0c300.dma: irq: clndar 0x2f34d000, nlndar 0x100000000
of:fsl-elo-dma ffe0c300.dma: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: no pending LDs
of:fsl-elo-dma ffe0c300.dma: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 2
of:fsl-elo-dma ffe0c300.dma: LD ef34d000 callback
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 2
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #1: No errors with src_off=0x74a dst_off=0x54d len=0x35f5
of:fsl-elo-dma ffe0c300.dma: irq: channel 0, stat = 0xa
of:fsl-elo-dma ffe0c300.dma: irq: End-of-segments INT
of:fsl-elo-dma ffe0c300.dma: irq: clndar 0x2f34d000, nlndar 0x100000000
of:fsl-elo-dma ffe0c300.dma: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: no pending LDs
of:fsl-elo-dma ffe0c300.dma: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 3
of:fsl-elo-dma ffe0c300.dma: LD ef34d000 callback
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 3
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #2: No errors with src_off=0x2ad dst_off=0x557 len=0x35e1
of:fsl-elo-dma ffe0c300.dma: irq: channel 0, stat = 0xa
of:fsl-elo-dma ffe0c300.dma: irq: End-of-segments INT
of:fsl-elo-dma ffe0c300.dma: irq: clndar 0x2f34d000, nlndar 0x100000000
of:fsl-elo-dma ffe0c300.dma: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: no pending LDs
of:fsl-elo-dma ffe0c300.dma: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 4
of:fsl-elo-dma ffe0c300.dma: LD ef34d000 callback
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 4
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #3: No errors with src_off=0x0 dst_off=0x0 len=0x4000
dma0chan0-copy0: terminating after 4 tests, 0 failures (status 0)

Felix.

Re: [PATCH 0/8] fsldma: lockup fixes

[Ira W. Snyder]

On Tue, Mar 01, 2011 at 07:52:39AM +0200, Felix Radensky wrote:
> Hi Ira,
> 
> On 03/01/2011 02:21 AM, Ira W. Snyder wrote:
> > On Mon, Feb 28, 2011 at 11:27:40PM +0200, Felix Radensky wrote:
> >> Hi Ira,
> >>
> >> On 02/28/2011 11:11 PM, Ira W. Snyder wrote:
> >>> On Mon, Feb 28, 2011 at 10:15:49PM +0200, Felix Radensky wrote:
> >>>> Hi Ira,
> >>>>
> >>>>> Thank you very much Felix. The dmesg output shows that the controller
> >>>>> never got an interrupt for the second transaction. The patch below has
> >>>>> extra debugging information that may help determine why this happens.
> >>>>> Please apply it and re-run the test.
> >>>>>
> >>>>> The last section of dmesg (after "Freeing unused kernel memory") is all
> >>>>> I need.
> >>>>>
> >>>> Attached relevant dmesg portion.
> >>>>
> >>> Ok, try this patch on top of the last one.
> >>>
> >>> It looks like you used the dmatest module in multi-channel mode last
> >>> time. One channel makes it easier to debug:
> >>>
> >>> modprobe dmatest max_channels=1 threads_per_chan=2 iterations=1
> >>>
> >>> Thanks for your help in debugging this. Hopefully this is the last
> >>> patch to test. :)
> >>>
> >>> Ira
> >>>
> >> Looks like this was not the last one. The test still fails, see below
> >>
> >  From this log, it looks like the DMA controller is not generating an
> > interrupt after the second chain is started. The first chain is finished
> > before the second thread runs and starts its chain.
> >
> > The end-of-segments interrupt is completely missing. The part is not
> > behaving as the datasheet explains it should. Are you sure you applied
> > the patch and rebuilt the kernel? (Just checking to be sure. I'm very
> > appreciative of the amount of help you've given me debugging this!)
> >
> > Can you run this for me:
> >
> > modprobe dmatest max_channels=1 threads_per_chan=1 iterations=4
> >
> > Thanks again,
> > Ira
> 
> Without your patches applied the output of the test above looks
> like this:
> 

Thanks, this is exactly what I was going to ask for next. :)

I really don't understand why the P2020 DMA controller isn't behaving
nicely after my patches.

Can you run a git bisect to figure out which patch in the series causes
the problems. It should take three or four build + test cycles to narrow
down which patch breaks the driver. When it is finished, send me the
output of git bisect.

Like this (assuming you have two branches: master and
fsldma, where fsldma is master + my patches):

# setup the bisect
git bisect start
git bisect bad fsldma
git bisect good master

# build and test the kernel using the same test as before:
modprobe dmatest max_channels=1 threads_per_chan=1 iterations=4

# if the test passes:
git bisect good

# if the test fails:
git bisect bad

# now build + test again, then mark that good or bad. Repeat until
# finished.


I really appreciate your help in testing this. You've been great at
providing everything I've asked for.

Thanks,
Ira

Re: [PATCH 0/8] fsldma: lockup fixes

[Ira W. Snyder]

On Tue, Mar 01, 2011 at 08:55:15AM -0800, Ira W. Snyder wrote:

[ big snip ]

> 
> Thanks, this is exactly what I was going to ask for next. :)
> 
> I really don't understand why the P2020 DMA controller isn't behaving
> nicely after my patches.
> 
> Can you run a git bisect to figure out which patch in the series causes
> the problems. It should take three or four build + test cycles to narrow
> down which patch breaks the driver. When it is finished, send me the
> output of git bisect.
> 
> Like this (assuming you have two branches: master and
> fsldma, where fsldma is master + my patches):
> 
> # setup the bisect
> git bisect start
> git bisect bad fsldma
> git bisect good master
> 
> # build and test the kernel using the same test as before:
> modprobe dmatest max_channels=1 threads_per_chan=1 iterations=4
> 
> # if the test passes:
> git bisect good
> 
> # if the test fails:
> git bisect bad
> 
> # now build + test again, then mark that good or bad. Repeat until
> # finished.
> 
> 
> I really appreciate your help in testing this. You've been great at
> providing everything I've asked for.
> 

I'd still like the bisect if you have a chance. I've re-reviewed the
patch series, and found the places that change register writes to the
controller.

The patch below changes the register operations back to the original
order. It doesn't make any sense why this would be required, but it is
worth a quick try.

I've added an "XXX" mark where you can comment out a single line if this
patch fails. It is highly unlikely to make any difference, but I'm
really having a hard time understanding what is wrong.

Ira


>From 9e479ce27f8c1819694d7082bb4a27772b4baf52 Mon Sep 17 00:00:00 2001
From: Ira W. Snyder <iws@ovro.caltech.edu>
Date: Tue, 1 Mar 2011 11:43:00 -0800
Subject: [PATCH] fsldma: try and fix 85xx DMA controller

This is just a random guess at what might be wrong. The datasheet
doesn't say that a completed transfer must be aborted before starting a
new transfer (nor does it make much sense). However, the old code did it
anyway.

NOT AT ALL Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
---
 drivers/dma/fsldma.c |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index e4d9d17..d8eedbc 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -213,6 +213,7 @@ static void dma_halt(struct fsldma_chan *chan)
 	int i;
 
 	mode = DMA_IN(chan, &chan->regs->mr, 32);
+	dev_dbg(chan->dev, "%s: dma_halt mode=0x%.8x\n", chan->name, mode);
 	mode |= FSL_DMA_MR_CA;
 	DMA_OUT(chan, &chan->regs->mr, mode, 32);
 
@@ -921,10 +922,24 @@ static void fsl_chan_xfer_ld_queue(struct fsldma_chan *chan)
 	list_splice_tail_init(&chan->ld_pending, &chan->ld_running);
 
 	/*
+	 * XXX: Guess at problems
+	 *
+	 * The 85xx requires that you run this routine before you try to start
+	 * the next DMA for an as yet unknown reason. Maybe.
+	 */
+	if ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) {
+		dev_dbg(chan->dev, "%s: 85xx, running workaround\n", name);
+		dma_halt(chan);
+	}
+
+	/*
 	 * Program the descriptor's address into the DMA controller,
 	 * then start the DMA transaction
 	 */
 	set_cdar(chan, desc->async_tx.phys);
+
+
+	/* XXX: if that doesn't work, comment the "get_cdar()" line below */
 	get_cdar(chan);
 
 	dma_start(chan);
-- 
1.7.3.4

Re: [PATCH 0/8] fsldma: lockup fixes

[Felix Radensky]

Hi Ira,

On 03/01/2011 09:52 PM, Ira W. Snyder wrote:
> On Tue, Mar 01, 2011 at 08:55:15AM -0800, Ira W. Snyder wrote:
>
> [ big snip ]
>
>
> I'd still like the bisect if you have a chance. I've re-reviewed the
> patch series, and found the places that change register writes to the
> controller.
>
> The patch below changes the register operations back to the original
> order. It doesn't make any sense why this would be required, but it is
> worth a quick try.
>
> I've added an "XXX" mark where you can comment out a single line if this
> patch fails. It is highly unlikely to make any difference, but I'm
> really having a hard time understanding what is wrong.
>
>
This patch fixes the problem. See below

__dma_request_channel: success (dma0chan0)
dmatest: Started 1 threads using dma0chan0
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372000 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372060 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3720c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372120 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372180 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3721e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=0
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=8
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan0: 85xx, running workaround
of:fsl-elo-dma ffe0c300.dma: chan0: dma_halt mode=0x08000140
of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0x8
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan0: completed_cookie=8
of:fsl-elo-dma ffe0c300.dma: chan0: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372000 callback
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372000 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372060 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3720c0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372120 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372180 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3721e0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 free
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet exit
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #0: No errors with src_off=0x10a8 dst_off=0x1914 
len=0x1dca
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=8
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=10
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan0: 85xx, running workaround
of:fsl-elo-dma ffe0c300.dma: chan0: dma_halt mode=0x08000141
of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0x8
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan0: completed_cookie=10
of:fsl-elo-dma ffe0c300.dma: chan0: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 callback
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 free
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet exit
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #1: No errors with src_off=0xdb8 dst_off=0xc14 len=0x526
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3721e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372180 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372120 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3720c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372060 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=10
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=17
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan0: 85xx, running workaround
of:fsl-elo-dma ffe0c300.dma: chan0: dma_halt mode=0x08000141
of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0x8
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan0: completed_cookie=17
of:fsl-elo-dma ffe0c300.dma: chan0: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 callback
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3721e0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372180 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372120 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3720c0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372060 free
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet exit
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #2: No errors with src_off=0xf48 dst_off=0x85d len=0x188f
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372060 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3720c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372120 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372180 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3721e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372000 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372300 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372360 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3723c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372420 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372480 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3724e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372540 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=17
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=32
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan0: 85xx, running workaround
of:fsl-elo-dma ffe0c300.dma: chan0: dma_halt mode=0x08000141
of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0x8
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan0: completed_cookie=32
of:fsl-elo-dma ffe0c300.dma: chan0: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372060 callback
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372060 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3720c0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372120 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372180 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3721e0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372000 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372300 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372360 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3723c0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372420 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372480 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3724e0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372540 free
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet exit
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #3: No errors with src_off=0x4ff dst_off=0x453 len=0x395d
dma0chan0-copy0: terminating after 4 tests, 0 failures (status 0)

Felix.

Re: [PATCH 0/8] fsldma: lockup fixes

[Ira W. Snyder]

On Wed, Mar 02, 2011 at 07:49:57AM +0200, Felix Radensky wrote:
> Hi Ira,
> 
> On 03/01/2011 09:52 PM, Ira W. Snyder wrote:
> > On Tue, Mar 01, 2011 at 08:55:15AM -0800, Ira W. Snyder wrote:
> >
> > [ big snip ]
> >
> >
> > I'd still like the bisect if you have a chance. I've re-reviewed the
> > patch series, and found the places that change register writes to the
> > controller.
> >
> > The patch below changes the register operations back to the original
> > order. It doesn't make any sense why this would be required, but it is
> > worth a quick try.
> >
> > I've added an "XXX" mark where you can comment out a single line if this
> > patch fails. It is highly unlikely to make any difference, but I'm
> > really having a hard time understanding what is wrong.
> >
> >
> This patch fixes the problem. See below
> 

Excellent! I know what is happening now. The 85xx controller doesn't
clear the "channel start" bit at the end of a transfer. Sure enough,
buried near the end of the chapter, the datasheet implies this in a
table very far away from the register definitions. The 83xx datasheet
explicitly states that it clears this bit automatically.

I'll post an updated patch series later today. Thank you so much for
being patient and trying out all of these patches.

Ira

Re: [PATCH 0/8] fsldma: lockup fixes

[Ira W. Snyder]

On Mon, Feb 28, 2011 at 01:36:38PM +0200, Felix Radensky wrote:
> Hi Ira,
> 
> I've tried your patches with linux-2.6.38-rc6 on P2020RDB.
> DMA test fails with the following errors if threads_per_chan != 1
> 
> dma0chan0-copy1: terminating after 1 tests, 1 failures (status 0)
> dma0chan0-copy2: #0: test timed out
> 
> I've run the test like this:
> 
> modprobe dmatest threads_per_chan=2 iterations=1
> 

Thanks Felix. This works fine on the 83xx DMA controller. When you have
a chance, can you add "#define DEBUG 1" as the first line of
drivers/dma/fsldma.c and then rerun your test with:

modprobe dmatest threads_per_chan=2 iterations=1 max_channels=1

And send me the dmesg output.

I don't quite understand the difference between links and lists in the
85xx controller yet. I'll work my way through the datasheet this morning
and send out a fixed patch.

Thanks very much for running the tests!

Ira

Re: [PATCH 0/8] fsldma: lockup fixes

[Felix Radensky]

Hi Ira,

I've tried your patches with linux-2.6.38-rc6 on P2020RDB.
DMA test fails with the following errors if threads_per_chan != 1

dma0chan0-copy1: terminating after 1 tests, 1 failures (status 0)
dma0chan0-copy2: #0: test timed out

I've run the test like this:

modprobe dmatest threads_per_chan=2 iterations=1

Felix.

[PATCH 0/8] fsldma: lockup fixes

[Ira W. Snyder]

Hello everyone,

I've been chasing random infrequent controller lockups in the fsldma driver
for a long time. I finally managed to find the problem and fix it. I'm not
quite sure about the exact sequence of events which causes the race
condition, but it is related to using the hardware registers to track the
controller state. See the patch changelogs for more detail.

The problems were quickly found by turning on DMAPOOL_DEBUG inside
mm/dmapool.c. This poisons memory allocated with the dmapool API.

With dmapool poisoning turned on, the dmatest driver would start producing
failures within a few seconds. After this patchset has been applied, I have
run several iterations of the 10 threads per channel, 100000 iterations per
thread test without any problems.

I have made some changes which effect the 85xx/86xx part. I believe that
the changes only effect features which have been unused since the rewrite
in Jan 2010. It would be very good to get a test report from an 85xx/86xx
user.

While making the previous changes, I noticed that the fsldma driver does
not respect the automatic DMA unmapping of src and dst buffers. I have
added support for this feature. This also required a fix to dmatest, which
was sending incorrect flags.

The "support async_tx dependencies" patch could be split apart from the
automatic unmapping patch if it is desirable. They both touch the same
piece of code, so I thought it was ok to combine them. Let me know.

I would really like to see this go into 2.6.39. I think we can get it
reviewed before then. :)

Ira W. Snyder (8):
  fsldma: move related helper functions near each other
  fsldma: use channel name in printk output
  fsldma: improve link descriptor debugging
  fsldma: minor codingstyle and consistency fixes
  fsldma: fix controller lockups
  fsldma: support async_tx dependencies and automatic unmapping
  dmatest: fix automatic buffer unmap type
  fsldma: reduce locking during descriptor cleanup

 drivers/dma/dmatest.c |    7 +-
 drivers/dma/fsldma.c  |  485 +++++++++++++++++++++++++-----------------------
 drivers/dma/fsldma.h  |    6 +-
 3 files changed, 263 insertions(+), 235 deletions(-)

-- 
1.7.3.4

[PATCH 0/8] fsldma: lockup fixes

[Ira W. Snyder]

Hello everyone,

I've been chasing random infrequent controller lockups in the fsldma driver
for a long time. I finally managed to find the problem and fix it. I'm not
quite sure about the exact sequence of events which causes the race
condition, but it is related to using the hardware registers to track the
controller state. See the patch changelogs for more detail.

The problems were quickly found by turning on DMAPOOL_DEBUG inside
mm/dmapool.c. This poisons memory allocated with the dmapool API.

With dmapool poisoning turned on, the dmatest driver would start producing
failures within a few seconds. After this patchset has been applied, I have
run several iterations of the 10 threads per channel, 100000 iterations per
thread test without any problems.

I have made some changes which effect the 85xx/86xx part. I believe that
the changes only effect features which have been unused since the rewrite
in Jan 2010. It would be very good to get a test report from an 85xx/86xx
user.

While making the previous changes, I noticed that the fsldma driver does
not respect the automatic DMA unmapping of src and dst buffers. I have
added support for this feature. This also required a fix to dmatest, which
was sending incorrect flags.

The "support async_tx dependencies" patch could be split apart from the
automatic unmapping patch if it is desirable. They both touch the same
piece of code, so I thought it was ok to combine them. Let me know.

I would really like to see this go into 2.6.39. I think we can get it
reviewed before then. :)

Ira W. Snyder (8):
  fsldma: move related helper functions near each other
  fsldma: use channel name in printk output
  fsldma: improve link descriptor debugging
  fsldma: minor codingstyle and consistency fixes
  fsldma: fix controller lockups
  fsldma: support async_tx dependencies and automatic unmapping
  dmatest: fix automatic buffer unmap type
  fsldma: reduce locking during descriptor cleanup

 drivers/dma/dmatest.c |    7 +-
 drivers/dma/fsldma.c  |  485 +++++++++++++++++++++++++-----------------------
 drivers/dma/fsldma.h  |    6 +-
 3 files changed, 263 insertions(+), 235 deletions(-)

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1.7.3.4