Re: [Qemu-devel] [RFC] Memory API

[Anthony Liguori <anthony@codemonkey.ws>]

On 05/19/2011 08:57 AM, Jan Kiszka wrote:
> On 2011-05-19 15:52, Anthony Liguori wrote:
>> On 05/19/2011 03:30 AM, Jan Kiszka wrote:
>>> On 2011-05-19 10:26, Gleb Natapov wrote:
>>>> On Wed, May 18, 2011 at 09:27:55PM +0200, Jan Kiszka wrote:
>>>>>> if an I/O is to the APIC page,
>>>>>>      it's handled by the APIC
>>>>>
>>>>> That's not that simple. We need to tell apart:
>>>>>    - if a cpu issued the request, and which one =>   forward to APIC
>>>> And cpu mode may affect where access is forwarded to. If cpu is in SMM
>>>> mode access to frame buffer may be forwarded to a memory (depends on
>>>> chipset configuration).
>>>
>>> So we have a second use case for CPU-local I/O regions?
>>>
>>> I wonder if only a single CPU can enter SMM or if all have to.
>>
>> For the i440fx, it's a chipset register (not a per-CPU register).
>
> There are two sources: the chipset register and the mode of the first
> CPU. Both things were apparently incorrectly merged into the
> minimalistic i440fx model.

Right, the chipset register is mainly used to program the contents of SMM.

There is a single access pin that has effectively the same semantics as 
setting the chipset register.

It's not a per-CPU setting--that's the point.  You can't have one CPU 
reading SMM memory at the exactly same time as accessing VGA.

But I guess you can never have two simultaneous accesses anyway so 
perhaps it's splitting hairs :-)

Regards,

Anthony Liguori

> Jan
>