* [PATCH 0/6] Initial Calxeda Highbank support
@ 2011-08-16 20:34 Rob Herring
2011-08-16 20:34 ` [PATCH 1/6] ARM: highbank: add devicetree source Rob Herring
` (5 more replies)
0 siblings, 6 replies; 53+ messages in thread
From: Rob Herring @ 2011-08-16 20:34 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
This adds initial platform support for Calxeda's Highbank ARM SOC.
If any of the mach header clean-up series go in, then I can drop some
headers. Several are already empty. This will need some rework if/when
Marc Z's localtimers rework patches are merged:
http://article.gmane.org/gmane.linux.ports.arm.kernel/127831/
Based on 3.1-rc2 plus previously posted L2x0 and GIC devicetree
binding support. The L2x0 support is merged in rmk's for-next branch.
The GIC bindings are still being discussed.
Rob
Martin Bogomolni (1):
ARM: highbank: Add cpu hotplug support
Rob Herring (5):
ARM: highbank: add devicetree source
ARM: add Highbank core platform support
MAINTAINERS: add Calxeda Highbank ARM platform
ARM: highbank: add SMP support
ARM: highbank: add suspend support
Documentation/devicetree/bindings/arm/calxeda.txt | 8 +
MAINTAINERS | 6 +
arch/arm/Kconfig | 19 ++-
arch/arm/Makefile | 1 +
arch/arm/boot/dts/highbank.dts | 212 +++++++++++++++++++++
arch/arm/mach-highbank/Makefile | 5 +
arch/arm/mach-highbank/Makefile.boot | 1 +
arch/arm/mach-highbank/clock.c | 63 ++++++
arch/arm/mach-highbank/core.h | 3 +
arch/arm/mach-highbank/highbank.c | 164 ++++++++++++++++
arch/arm/mach-highbank/hotplug.c | 56 ++++++
arch/arm/mach-highbank/include/mach/debug-macro.S | 20 ++
arch/arm/mach-highbank/include/mach/entry-macro.S | 9 +
arch/arm/mach-highbank/include/mach/gpio.h | 1 +
arch/arm/mach-highbank/include/mach/io.h | 8 +
arch/arm/mach-highbank/include/mach/irqs.h | 6 +
arch/arm/mach-highbank/include/mach/memory.h | 1 +
arch/arm/mach-highbank/include/mach/system.h | 26 +++
arch/arm/mach-highbank/include/mach/timex.h | 6 +
arch/arm/mach-highbank/include/mach/uncompress.h | 9 +
arch/arm/mach-highbank/include/mach/vmalloc.h | 6 +
arch/arm/mach-highbank/localtimer.c | 37 ++++
arch/arm/mach-highbank/platsmp.c | 79 ++++++++
arch/arm/mach-highbank/pm.c | 55 ++++++
arch/arm/mach-highbank/sysregs.h | 30 +++
arch/arm/mach-highbank/system.c | 33 ++++
arch/arm/mm/Kconfig | 2 +-
27 files changed, 864 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/calxeda.txt
create mode 100644 arch/arm/boot/dts/highbank.dts
create mode 100644 arch/arm/mach-highbank/Makefile
create mode 100644 arch/arm/mach-highbank/Makefile.boot
create mode 100644 arch/arm/mach-highbank/clock.c
create mode 100644 arch/arm/mach-highbank/core.h
create mode 100644 arch/arm/mach-highbank/highbank.c
create mode 100644 arch/arm/mach-highbank/hotplug.c
create mode 100644 arch/arm/mach-highbank/include/mach/debug-macro.S
create mode 100644 arch/arm/mach-highbank/include/mach/entry-macro.S
create mode 100644 arch/arm/mach-highbank/include/mach/gpio.h
create mode 100644 arch/arm/mach-highbank/include/mach/io.h
create mode 100644 arch/arm/mach-highbank/include/mach/irqs.h
create mode 100644 arch/arm/mach-highbank/include/mach/memory.h
create mode 100644 arch/arm/mach-highbank/include/mach/system.h
create mode 100644 arch/arm/mach-highbank/include/mach/timex.h
create mode 100644 arch/arm/mach-highbank/include/mach/uncompress.h
create mode 100644 arch/arm/mach-highbank/include/mach/vmalloc.h
create mode 100644 arch/arm/mach-highbank/localtimer.c
create mode 100644 arch/arm/mach-highbank/platsmp.c
create mode 100644 arch/arm/mach-highbank/pm.c
create mode 100644 arch/arm/mach-highbank/sysregs.h
create mode 100644 arch/arm/mach-highbank/system.c
--
1.7.4.1
^ permalink raw reply [flat|nested] 53+ messages in thread* [PATCH 1/6] ARM: highbank: add devicetree source 2011-08-16 20:34 [PATCH 0/6] Initial Calxeda Highbank support Rob Herring @ 2011-08-16 20:34 ` Rob Herring 2011-08-17 7:27 ` Shawn Guo ` (3 more replies) 2011-08-16 20:34 ` [PATCH 2/6] ARM: add Highbank core platform support Rob Herring ` (4 subsequent siblings) 5 siblings, 4 replies; 53+ messages in thread From: Rob Herring @ 2011-08-16 20:34 UTC (permalink / raw) To: linux-arm-kernel From: Rob Herring <rob.herring@calxeda.com> This adds the devicetree source and documentation for the Calxeda highbank platform. Signed-off-by: Rob Herring <rob.herring@calxeda.com> --- Documentation/devicetree/bindings/arm/calxeda.txt | 8 + arch/arm/boot/dts/highbank.dts | 212 +++++++++++++++++++++ 2 files changed, 220 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/calxeda.txt create mode 100644 arch/arm/boot/dts/highbank.dts diff --git a/Documentation/devicetree/bindings/arm/calxeda.txt b/Documentation/devicetree/bindings/arm/calxeda.txt new file mode 100644 index 0000000..4755caa --- /dev/null +++ b/Documentation/devicetree/bindings/arm/calxeda.txt @@ -0,0 +1,8 @@ +Calxeda Highbank Platforms Device Tree Bindings +----------------------------------------------- + +Boards with Calxeda Cortex-A9 based Highbank SOC shall have the following +properties. + +Required root node properties: + - compatible = "calxeda,highbank"; diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts new file mode 100644 index 0000000..2dd3b7b --- /dev/null +++ b/arch/arm/boot/dts/highbank.dts @@ -0,0 +1,212 @@ +/* + * Copyright 2011 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +/dts-v1/; + +/* First 4KB has pen for secondary cores. */ +/memreserve/ 0x00000000 0x0001000; + +/ { + model = "Calxeda Highbank"; + compatible = "calxeda,highbank"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu at 0 { + compatible = "arm,cortex-a9"; + reg = <0>; + next-level-cache = <&L2>; + }; + + cpu at 1 { + compatible = "arm,cortex-a9"; + reg = <1>; + next-level-cache = <&L2>; + }; + + cpu at 2 { + compatible = "arm,cortex-a9"; + reg = <2>; + next-level-cache = <&L2>; + }; + + cpu at 3 { + compatible = "arm,cortex-a9"; + reg = <3>; + next-level-cache = <&L2>; + }; + }; + + memory { + name = "memory"; + device_type = "memory"; + reg = <0x00000000 0xff900000>; + }; + + chosen { + bootargs = "console=ttyAMA0"; + }; + + intc: interrupt-controller at fff11000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <1>; + #size-cells = <0>; + #address-cells = <1>; + interrupt-controller; + reg = <0xfff11000 0x1000>, + <0xfff10100 0x100>; + + gicppi0: gic-ppi at 0 { + compatible = "arm,cortex-a9-gic-ppi"; + #interrupt-cells = <1>; + interrupt-controller; + reg = <0>; + }; + gicppi1: gic-ppi at 1 { + compatible = "arm,cortex-a9-gic-ppi"; + #interrupt-cells = <1>; + interrupt-controller; + reg = <1>; + }; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + interrupt-parent = <&intc>; + ranges; + + timer at fff10600 { + compatible = "arm,smp-twd"; + reg = <0xfff10600 0x20>; + interrupt-parent = <&gicppi0>; + interrupts = <29>; + }; + + watchdog at fff10620 { + compatible = "arm,cortex-a9-wdt"; + reg = <0xfff10620 0x20>; + interrupt-parent = <&gicppi0>; + interrupts = <30>; + }; + + L2: l2-cache { + compatible = "arm,pl310-cache"; + reg = <0xfff12000 0x1000>; + interrupts = <102>; + cache-unified; + cache-level = <2>; + }; + + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = <108 107 106 105>; + }; + + sata at ffe08000 { + compatible = "calxeda,hb-ahci"; + reg = <0xffe08000 0x10000>; + interrupts = <115>; + }; + + sdhci at ffe0e000 { + compatible = "calxeda,hb-sdhci"; + reg = <0xffe0e000 0x1000>; + interrupts = <122>; + }; + + ipc at fff20000 { + compatible = "arm,pl320", "arm,primecell"; + reg = <0xfff20000 0x1000>; + interrupts = <39>; + }; + + gpioe: gpio at fff30000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff30000 0x1000>; + interrupts = <46>; + }; + + gpiof: gpio at fff31000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff31000 0x1000>; + interrupts = <47>; + }; + + gpiog: gpio at fff32000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff32000 0x1000>; + interrupts = <48>; + }; + + gpioh: gpio at fff33000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff33000 0x1000>; + interrupts = <49>; + }; + + timer { + compatible = "arm,sp804", "arm,primecell"; + reg = <0xfff34000 0x1000>; + interrupts = <50>; + }; + + rtc at fff35000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0xfff35000 0x1000>; + interrupts = <51>; + }; + + serial at fff36000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xfff36000 0x1000>; + interrupts = <52>; + }; + + smic at fff3a000 { + compatible = "ipmi-smic"; + device_type = "ipmi"; + reg = <0xfff3a000 0x1000>; + interrupts = <56>; + reg-size = <4>; + reg-spacing = <4>; + }; + + sregs at fff3c000 { + compatible = "calxeda,hb-sregs"; + reg = <0xfff3c000 0x1000>; + }; + + dma at fff3d000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0xfff3d000 0x1000>; + interrupts = <124>; + }; + }; +}; -- 1.7.4.1 ^ permalink raw reply related [flat|nested] 53+ messages in thread
* [PATCH 1/6] ARM: highbank: add devicetree source 2011-08-16 20:34 ` [PATCH 1/6] ARM: highbank: add devicetree source Rob Herring @ 2011-08-17 7:27 ` Shawn Guo 2011-08-17 13:49 ` Rob Herring 2011-08-17 9:27 ` Mark Rutland ` (2 subsequent siblings) 3 siblings, 1 reply; 53+ messages in thread From: Shawn Guo @ 2011-08-17 7:27 UTC (permalink / raw) To: linux-arm-kernel Hi Rob, On Tue, Aug 16, 2011 at 03:34:53PM -0500, Rob Herring wrote: > From: Rob Herring <rob.herring@calxeda.com> > > This adds the devicetree source and documentation for the Calxeda highbank > platform. > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > --- > Documentation/devicetree/bindings/arm/calxeda.txt | 8 + > arch/arm/boot/dts/highbank.dts | 212 +++++++++++++++++++++ > 2 files changed, 220 insertions(+), 0 deletions(-) > create mode 100644 Documentation/devicetree/bindings/arm/calxeda.txt > create mode 100644 arch/arm/boot/dts/highbank.dts > > diff --git a/Documentation/devicetree/bindings/arm/calxeda.txt b/Documentation/devicetree/bindings/arm/calxeda.txt > new file mode 100644 > index 0000000..4755caa > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/calxeda.txt > @@ -0,0 +1,8 @@ > +Calxeda Highbank Platforms Device Tree Bindings > +----------------------------------------------- > + > +Boards with Calxeda Cortex-A9 based Highbank SOC shall have the following > +properties. > + > +Required root node properties: > + - compatible = "calxeda,highbank"; > diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts > new file mode 100644 > index 0000000..2dd3b7b > --- /dev/null > +++ b/arch/arm/boot/dts/highbank.dts > @@ -0,0 +1,212 @@ > +/* > + * Copyright 2011 Calxeda, Inc. > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms and conditions of the GNU General Public License, > + * version 2, as published by the Free Software Foundation. > + * > + * This program is distributed in the hope it will be useful, but WITHOUT > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for > + * more details. > + * > + * You should have received a copy of the GNU General Public License along with > + * this program. If not, see <http://www.gnu.org/licenses/>. > + */ > + > +/dts-v1/; > + > +/* First 4KB has pen for secondary cores. */ > +/memreserve/ 0x00000000 0x0001000; > + I failed to find the "pen" handling in the whole patch series. Am I missing anything? -- Regards, Shawn ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 1/6] ARM: highbank: add devicetree source 2011-08-17 7:27 ` Shawn Guo @ 2011-08-17 13:49 ` Rob Herring 2011-08-17 14:51 ` Shawn Guo 2011-08-17 17:52 ` Will Deacon 0 siblings, 2 replies; 53+ messages in thread From: Rob Herring @ 2011-08-17 13:49 UTC (permalink / raw) To: linux-arm-kernel Shawn, On 08/17/2011 02:27 AM, Shawn Guo wrote: > Hi Rob, > > On Tue, Aug 16, 2011 at 03:34:53PM -0500, Rob Herring wrote: >> From: Rob Herring <rob.herring@calxeda.com> >> >> This adds the devicetree source and documentation for the Calxeda highbank >> platform. >> >> Signed-off-by: Rob Herring <rob.herring@calxeda.com> >> --- >> Documentation/devicetree/bindings/arm/calxeda.txt | 8 + >> arch/arm/boot/dts/highbank.dts | 212 +++++++++++++++++++++ >> 2 files changed, 220 insertions(+), 0 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/arm/calxeda.txt >> create mode 100644 arch/arm/boot/dts/highbank.dts >> >> diff --git a/Documentation/devicetree/bindings/arm/calxeda.txt b/Documentation/devicetree/bindings/arm/calxeda.txt >> new file mode 100644 >> index 0000000..4755caa >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/arm/calxeda.txt >> @@ -0,0 +1,8 @@ >> +Calxeda Highbank Platforms Device Tree Bindings >> +----------------------------------------------- >> + >> +Boards with Calxeda Cortex-A9 based Highbank SOC shall have the following >> +properties. >> + >> +Required root node properties: >> + - compatible = "calxeda,highbank"; >> diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts >> new file mode 100644 >> index 0000000..2dd3b7b >> --- /dev/null >> +++ b/arch/arm/boot/dts/highbank.dts >> @@ -0,0 +1,212 @@ >> +/* >> + * Copyright 2011 Calxeda, Inc. >> + * >> + * This program is free software; you can redistribute it and/or modify it >> + * under the terms and conditions of the GNU General Public License, >> + * version 2, as published by the Free Software Foundation. >> + * >> + * This program is distributed in the hope it will be useful, but WITHOUT >> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or >> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for >> + * more details. >> + * >> + * You should have received a copy of the GNU General Public License along with >> + * this program. If not, see <http://www.gnu.org/licenses/>. >> + */ >> + >> +/dts-v1/; >> + >> +/* First 4KB has pen for secondary cores. */ >> +/memreserve/ 0x00000000 0x0001000; >> + > I failed to find the "pen" handling in the whole patch series. Am I > missing anything? > In highbank.c: +#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu))) +#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu)) + +void highbank_set_cpu_jump(int cpu, void *jump_addr) +{ + writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu)); + __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); + outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), + HB_JUMP_TABLE_PHYS(cpu) + 15); +} Rob ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 1/6] ARM: highbank: add devicetree source 2011-08-17 13:49 ` Rob Herring @ 2011-08-17 14:51 ` Shawn Guo 2011-08-20 18:32 ` Rob Herring 2011-08-17 17:52 ` Will Deacon 1 sibling, 1 reply; 53+ messages in thread From: Shawn Guo @ 2011-08-17 14:51 UTC (permalink / raw) To: linux-arm-kernel On Wed, Aug 17, 2011 at 08:49:41AM -0500, Rob Herring wrote: > Shawn, > > On 08/17/2011 02:27 AM, Shawn Guo wrote: > > Hi Rob, > > > > On Tue, Aug 16, 2011 at 03:34:53PM -0500, Rob Herring wrote: > >> From: Rob Herring <rob.herring@calxeda.com> > >> > >> This adds the devicetree source and documentation for the Calxeda highbank > >> platform. > >> > >> Signed-off-by: Rob Herring <rob.herring@calxeda.com> > >> --- > >> Documentation/devicetree/bindings/arm/calxeda.txt | 8 + > >> arch/arm/boot/dts/highbank.dts | 212 +++++++++++++++++++++ > >> 2 files changed, 220 insertions(+), 0 deletions(-) > >> create mode 100644 Documentation/devicetree/bindings/arm/calxeda.txt > >> create mode 100644 arch/arm/boot/dts/highbank.dts > >> > >> diff --git a/Documentation/devicetree/bindings/arm/calxeda.txt b/Documentation/devicetree/bindings/arm/calxeda.txt > >> new file mode 100644 > >> index 0000000..4755caa > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/arm/calxeda.txt > >> @@ -0,0 +1,8 @@ > >> +Calxeda Highbank Platforms Device Tree Bindings > >> +----------------------------------------------- > >> + > >> +Boards with Calxeda Cortex-A9 based Highbank SOC shall have the following > >> +properties. > >> + > >> +Required root node properties: > >> + - compatible = "calxeda,highbank"; > >> diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts > >> new file mode 100644 > >> index 0000000..2dd3b7b > >> --- /dev/null > >> +++ b/arch/arm/boot/dts/highbank.dts > >> @@ -0,0 +1,212 @@ > >> +/* > >> + * Copyright 2011 Calxeda, Inc. > >> + * > >> + * This program is free software; you can redistribute it and/or modify it > >> + * under the terms and conditions of the GNU General Public License, > >> + * version 2, as published by the Free Software Foundation. > >> + * > >> + * This program is distributed in the hope it will be useful, but WITHOUT > >> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > >> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for > >> + * more details. > >> + * > >> + * You should have received a copy of the GNU General Public License along with > >> + * this program. If not, see <http://www.gnu.org/licenses/>. > >> + */ > >> + > >> +/dts-v1/; > >> + > >> +/* First 4KB has pen for secondary cores. */ > >> +/memreserve/ 0x00000000 0x0001000; > >> + > > I failed to find the "pen" handling in the whole patch series. Am I > > missing anything? > > > > In highbank.c: > > +#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu))) > +#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu)) > + > +void highbank_set_cpu_jump(int cpu, void *jump_addr) > +{ > + writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu)); > + __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); > + outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), > + HB_JUMP_TABLE_PHYS(cpu) + 15); > +} > Ah, ok, the 'pen' you meant is the entry address of secondary cores. I thought of something like 'pen_release' in plat-versatile/platsmp.c. So you do not need 'boot_lock' and 'pen_release' stuff to sync secondary cores with the primary one (like all other smp platforms do)? -- Regards, Shawn ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 1/6] ARM: highbank: add devicetree source 2011-08-17 14:51 ` Shawn Guo @ 2011-08-20 18:32 ` Rob Herring 0 siblings, 0 replies; 53+ messages in thread From: Rob Herring @ 2011-08-20 18:32 UTC (permalink / raw) To: linux-arm-kernel On 08/17/2011 09:51 AM, Shawn Guo wrote: > On Wed, Aug 17, 2011 at 08:49:41AM -0500, Rob Herring wrote: >> Shawn, >> >> On 08/17/2011 02:27 AM, Shawn Guo wrote: >>> Hi Rob, >>> >>> On Tue, Aug 16, 2011 at 03:34:53PM -0500, Rob Herring wrote: >>>> From: Rob Herring <rob.herring@calxeda.com> >>>> >>>> This adds the devicetree source and documentation for the Calxeda highbank >>>> platform. >>>> >>>> Signed-off-by: Rob Herring <rob.herring@calxeda.com> >>>> --- >>>> Documentation/devicetree/bindings/arm/calxeda.txt | 8 + >>>> arch/arm/boot/dts/highbank.dts | 212 +++++++++++++++++++++ >>>> 2 files changed, 220 insertions(+), 0 deletions(-) >>>> create mode 100644 Documentation/devicetree/bindings/arm/calxeda.txt >>>> create mode 100644 arch/arm/boot/dts/highbank.dts >>>> >>>> diff --git a/Documentation/devicetree/bindings/arm/calxeda.txt b/Documentation/devicetree/bindings/arm/calxeda.txt >>>> new file mode 100644 >>>> index 0000000..4755caa >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/arm/calxeda.txt >>>> @@ -0,0 +1,8 @@ >>>> +Calxeda Highbank Platforms Device Tree Bindings >>>> +----------------------------------------------- >>>> + >>>> +Boards with Calxeda Cortex-A9 based Highbank SOC shall have the following >>>> +properties. >>>> + >>>> +Required root node properties: >>>> + - compatible = "calxeda,highbank"; >>>> diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts >>>> new file mode 100644 >>>> index 0000000..2dd3b7b >>>> --- /dev/null >>>> +++ b/arch/arm/boot/dts/highbank.dts >>>> @@ -0,0 +1,212 @@ >>>> +/* >>>> + * Copyright 2011 Calxeda, Inc. >>>> + * >>>> + * This program is free software; you can redistribute it and/or modify it >>>> + * under the terms and conditions of the GNU General Public License, >>>> + * version 2, as published by the Free Software Foundation. >>>> + * >>>> + * This program is distributed in the hope it will be useful, but WITHOUT >>>> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or >>>> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for >>>> + * more details. >>>> + * >>>> + * You should have received a copy of the GNU General Public License along with >>>> + * this program. If not, see <http://www.gnu.org/licenses/>. >>>> + */ >>>> + >>>> +/dts-v1/; >>>> + >>>> +/* First 4KB has pen for secondary cores. */ >>>> +/memreserve/ 0x00000000 0x0001000; >>>> + >>> I failed to find the "pen" handling in the whole patch series. Am I >>> missing anything? >>> >> >> In highbank.c: >> >> +#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu))) >> +#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu)) >> + >> +void highbank_set_cpu_jump(int cpu, void *jump_addr) >> +{ >> + writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu)); >> + __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); >> + outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), >> + HB_JUMP_TABLE_PHYS(cpu) + 15); >> +} >> > Ah, ok, the 'pen' you meant is the entry address of secondary cores. > I thought of something like 'pen_release' in plat-versatile/platsmp.c. > So you do not need 'boot_lock' and 'pen_release' stuff to sync secondary > cores with the primary one (like all other smp platforms do)? > The kernel pen code is only needed for cores that don't reset on hot unplug and just go to wfi. All other smp platforms just cut and paste the same code. Rob ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 1/6] ARM: highbank: add devicetree source 2011-08-17 13:49 ` Rob Herring 2011-08-17 14:51 ` Shawn Guo @ 2011-08-17 17:52 ` Will Deacon 2011-08-20 18:29 ` Rob Herring 1 sibling, 1 reply; 53+ messages in thread From: Will Deacon @ 2011-08-17 17:52 UTC (permalink / raw) To: linux-arm-kernel Hi Rob, On Wed, Aug 17, 2011 at 02:49:41PM +0100, Rob Herring wrote: > In highbank.c: > > +#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu))) > +#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu)) > + > +void highbank_set_cpu_jump(int cpu, void *jump_addr) > +{ > + writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu)); > + __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); > + outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), > + HB_JUMP_TABLE_PHYS(cpu) + 15); > +} I don't suppose you guys can boot on a CPU other than 0 can you? That would be really handy for testing my cpu-mapping patch series :) Will ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 1/6] ARM: highbank: add devicetree source 2011-08-17 17:52 ` Will Deacon @ 2011-08-20 18:29 ` Rob Herring 0 siblings, 0 replies; 53+ messages in thread From: Rob Herring @ 2011-08-20 18:29 UTC (permalink / raw) To: linux-arm-kernel On 08/17/2011 12:52 PM, Will Deacon wrote: > Hi Rob, > > On Wed, Aug 17, 2011 at 02:49:41PM +0100, Rob Herring wrote: >> In highbank.c: >> >> +#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu))) >> +#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu)) >> + >> +void highbank_set_cpu_jump(int cpu, void *jump_addr) >> +{ >> + writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu)); >> + __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); >> + outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), >> + HB_JUMP_TABLE_PHYS(cpu) + 15); >> +} > > I don't suppose you guys can boot on a CPU other than 0 can you? That would be > really handy for testing my cpu-mapping patch series :) > We probably can with a little work to the boot code. Rob ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 1/6] ARM: highbank: add devicetree source 2011-08-16 20:34 ` [PATCH 1/6] ARM: highbank: add devicetree source Rob Herring 2011-08-17 7:27 ` Shawn Guo @ 2011-08-17 9:27 ` Mark Rutland [not found] ` <4e4b8979.533fd80a.2ff3.1626SMTPIN_ADDED@mx.google.com> 2011-08-20 9:51 ` Shawn Guo 3 siblings, 0 replies; 53+ messages in thread From: Mark Rutland @ 2011-08-17 9:27 UTC (permalink / raw) To: linux-arm-kernel Hi Rob, > -----Original Message----- > From: linux-arm-kernel-bounces at lists.infradead.org [mailto:linux-arm- > kernel-bounces at lists.infradead.org] On Behalf Of Rob Herring > Sent: 16 August 2011 21:35 > To: linux-arm-kernel at lists.infradead.org > Cc: Rob Herring > Subject: [PATCH 1/6] ARM: highbank: add devicetree source > > From: Rob Herring <rob.herring@calxeda.com> > > This adds the devicetree source and documentation for the Calxeda > highbank > platform. > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > --- > Documentation/devicetree/bindings/arm/calxeda.txt | 8 + > arch/arm/boot/dts/highbank.dts | 212 > +++++++++++++++++++++ > 2 files changed, 220 insertions(+), 0 deletions(-) > create mode 100644 Documentation/devicetree/bindings/arm/calxeda.txt > create mode 100644 arch/arm/boot/dts/highbank.dts ... > + L2: l2-cache { > + compatible = "arm,pl310-cache"; > + reg = <0xfff12000 0x1000>; > + interrupts = <102>; > + cache-unified; > + cache-level = <2>; > + }; Currently, the binding documentation sitting in Russell's for-next branch doesn't have the interrupts property we discussed previously: http://lists.ozlabs.org/pipermail/devicetree-discuss/2011-August/007301.html I posted a patch to add it to the documentation, but no-one responded: http://lists.ozlabs.org/pipermail/devicetree-discuss/2011-August/007349.html Can I take your use of the property as an ack? How do we get this merged? Thanks, Mark. ^ permalink raw reply [flat|nested] 53+ messages in thread
[parent not found: <4e4b8979.533fd80a.2ff3.1626SMTPIN_ADDED@mx.google.com>]
* [PATCH 1/6] ARM: highbank: add devicetree source [not found] ` <4e4b8979.533fd80a.2ff3.1626SMTPIN_ADDED@mx.google.com> @ 2011-08-17 14:08 ` Rob Herring 2011-08-17 14:34 ` Will Deacon 0 siblings, 1 reply; 53+ messages in thread From: Rob Herring @ 2011-08-17 14:08 UTC (permalink / raw) To: linux-arm-kernel Mark, On 08/17/2011 04:27 AM, Mark Rutland wrote: > Hi Rob, > >> -----Original Message----- >> From: linux-arm-kernel-bounces at lists.infradead.org [mailto:linux-arm- >> kernel-bounces at lists.infradead.org] On Behalf Of Rob Herring >> Sent: 16 August 2011 21:35 >> To: linux-arm-kernel at lists.infradead.org >> Cc: Rob Herring >> Subject: [PATCH 1/6] ARM: highbank: add devicetree source >> >> From: Rob Herring <rob.herring@calxeda.com> >> >> This adds the devicetree source and documentation for the Calxeda >> highbank >> platform. >> >> Signed-off-by: Rob Herring <rob.herring@calxeda.com> >> --- >> Documentation/devicetree/bindings/arm/calxeda.txt | 8 + >> arch/arm/boot/dts/highbank.dts | 212 >> +++++++++++++++++++++ >> 2 files changed, 220 insertions(+), 0 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/arm/calxeda.txt >> create mode 100644 arch/arm/boot/dts/highbank.dts > > ... > >> + L2: l2-cache { >> + compatible = "arm,pl310-cache"; >> + reg = <0xfff12000 0x1000>; >> + interrupts = <102>; >> + cache-unified; >> + cache-level = <2>; >> + }; > > Currently, the binding documentation sitting in Russell's for-next branch > doesn't have the interrupts property we discussed previously: > http://lists.ozlabs.org/pipermail/devicetree-discuss/2011-August/007301.html > > I posted a patch to add it to the documentation, but no-one responded: > http://lists.ozlabs.org/pipermail/devicetree-discuss/2011-August/007349.html > > Can I take your use of the property as an ack? > Yes, sorry forgot about it. Acked-by: Rob Herring <rob.herring@calxeda.com> > How do we get this merged? Add to Russell's patch system or perhaps in Will's tree. Rob ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 1/6] ARM: highbank: add devicetree source 2011-08-17 14:08 ` Rob Herring @ 2011-08-17 14:34 ` Will Deacon 0 siblings, 0 replies; 53+ messages in thread From: Will Deacon @ 2011-08-17 14:34 UTC (permalink / raw) To: linux-arm-kernel Hi Mark, On Wed, Aug 17, 2011 at 03:08:38PM +0100, Rob Herring wrote: > On 08/17/2011 04:27 AM, Mark Rutland wrote: > > How do we get this merged? > > Add to Russell's patch system or perhaps in Will's tree. Stick it in Russell's patch system with my Ack (since I don't have any other fixes currently queued). Thanks, Will ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 1/6] ARM: highbank: add devicetree source 2011-08-16 20:34 ` [PATCH 1/6] ARM: highbank: add devicetree source Rob Herring ` (2 preceding siblings ...) [not found] ` <4e4b8979.533fd80a.2ff3.1626SMTPIN_ADDED@mx.google.com> @ 2011-08-20 9:51 ` Shawn Guo 2011-08-20 18:19 ` Rob Herring 3 siblings, 1 reply; 53+ messages in thread From: Shawn Guo @ 2011-08-20 9:51 UTC (permalink / raw) To: linux-arm-kernel On Tue, Aug 16, 2011 at 03:34:53PM -0500, Rob Herring wrote: > From: Rob Herring <rob.herring@calxeda.com> > > This adds the devicetree source and documentation for the Calxeda highbank > platform. > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > --- > Documentation/devicetree/bindings/arm/calxeda.txt | 8 + > arch/arm/boot/dts/highbank.dts | 212 +++++++++++++++++++++ > 2 files changed, 220 insertions(+), 0 deletions(-) > create mode 100644 Documentation/devicetree/bindings/arm/calxeda.txt > create mode 100644 arch/arm/boot/dts/highbank.dts > > diff --git a/Documentation/devicetree/bindings/arm/calxeda.txt b/Documentation/devicetree/bindings/arm/calxeda.txt > new file mode 100644 > index 0000000..4755caa > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/calxeda.txt > @@ -0,0 +1,8 @@ > +Calxeda Highbank Platforms Device Tree Bindings > +----------------------------------------------- > + > +Boards with Calxeda Cortex-A9 based Highbank SOC shall have the following > +properties. > + > +Required root node properties: > + - compatible = "calxeda,highbank"; > diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts > new file mode 100644 > index 0000000..2dd3b7b > --- /dev/null > +++ b/arch/arm/boot/dts/highbank.dts > @@ -0,0 +1,212 @@ > +/* > + * Copyright 2011 Calxeda, Inc. > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms and conditions of the GNU General Public License, > + * version 2, as published by the Free Software Foundation. > + * > + * This program is distributed in the hope it will be useful, but WITHOUT > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for > + * more details. > + * > + * You should have received a copy of the GNU General Public License along with > + * this program. If not, see <http://www.gnu.org/licenses/>. > + */ > + > +/dts-v1/; > + > +/* First 4KB has pen for secondary cores. */ > +/memreserve/ 0x00000000 0x0001000; > + > +/ { > + model = "Calxeda Highbank"; > + compatible = "calxeda,highbank"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu at 0 { > + compatible = "arm,cortex-a9"; > + reg = <0>; > + next-level-cache = <&L2>; > + }; > + > + cpu at 1 { > + compatible = "arm,cortex-a9"; > + reg = <1>; > + next-level-cache = <&L2>; > + }; > + > + cpu at 2 { > + compatible = "arm,cortex-a9"; > + reg = <2>; > + next-level-cache = <&L2>; > + }; > + > + cpu at 3 { > + compatible = "arm,cortex-a9"; > + reg = <3>; > + next-level-cache = <&L2>; > + }; > + }; > + I'm not sure if this whole "cpus" stuff is needed, I do not see any code playing with it. -- Regards, Shawn ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 1/6] ARM: highbank: add devicetree source 2011-08-20 9:51 ` Shawn Guo @ 2011-08-20 18:19 ` Rob Herring 0 siblings, 0 replies; 53+ messages in thread From: Rob Herring @ 2011-08-20 18:19 UTC (permalink / raw) To: linux-arm-kernel On 08/20/2011 04:51 AM, Shawn Guo wrote: > On Tue, Aug 16, 2011 at 03:34:53PM -0500, Rob Herring wrote: >> From: Rob Herring <rob.herring@calxeda.com> >> >> This adds the devicetree source and documentation for the Calxeda highbank >> platform. >> >> Signed-off-by: Rob Herring <rob.herring@calxeda.com> >> --- >> Documentation/devicetree/bindings/arm/calxeda.txt | 8 + >> arch/arm/boot/dts/highbank.dts | 212 +++++++++++++++++++++ >> 2 files changed, 220 insertions(+), 0 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/arm/calxeda.txt >> create mode 100644 arch/arm/boot/dts/highbank.dts >> >> diff --git a/Documentation/devicetree/bindings/arm/calxeda.txt b/Documentation/devicetree/bindings/arm/calxeda.txt >> new file mode 100644 >> index 0000000..4755caa >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/arm/calxeda.txt >> @@ -0,0 +1,8 @@ >> +Calxeda Highbank Platforms Device Tree Bindings >> +----------------------------------------------- >> + >> +Boards with Calxeda Cortex-A9 based Highbank SOC shall have the following >> +properties. >> + >> +Required root node properties: >> + - compatible = "calxeda,highbank"; >> diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts >> new file mode 100644 >> index 0000000..2dd3b7b >> --- /dev/null >> +++ b/arch/arm/boot/dts/highbank.dts >> @@ -0,0 +1,212 @@ >> +/* >> + * Copyright 2011 Calxeda, Inc. >> + * >> + * This program is free software; you can redistribute it and/or modify it >> + * under the terms and conditions of the GNU General Public License, >> + * version 2, as published by the Free Software Foundation. >> + * >> + * This program is distributed in the hope it will be useful, but WITHOUT >> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or >> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for >> + * more details. >> + * >> + * You should have received a copy of the GNU General Public License along with >> + * this program. If not, see <http://www.gnu.org/licenses/>. >> + */ >> + >> +/dts-v1/; >> + >> +/* First 4KB has pen for secondary cores. */ >> +/memreserve/ 0x00000000 0x0001000; >> + >> +/ { >> + model = "Calxeda Highbank"; >> + compatible = "calxeda,highbank"; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + >> + cpus { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + cpu at 0 { >> + compatible = "arm,cortex-a9"; >> + reg = <0>; >> + next-level-cache = <&L2>; >> + }; >> + >> + cpu at 1 { >> + compatible = "arm,cortex-a9"; >> + reg = <1>; >> + next-level-cache = <&L2>; >> + }; >> + >> + cpu at 2 { >> + compatible = "arm,cortex-a9"; >> + reg = <2>; >> + next-level-cache = <&L2>; >> + }; >> + >> + cpu at 3 { >> + compatible = "arm,cortex-a9"; >> + reg = <3>; >> + next-level-cache = <&L2>; >> + }; >> + }; >> + > I'm not sure if this whole "cpus" stuff is needed, I do not see any > code playing with it. > Prior reviews of dts's by Grant and others suggested putting this in. Rob ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-16 20:34 [PATCH 0/6] Initial Calxeda Highbank support Rob Herring 2011-08-16 20:34 ` [PATCH 1/6] ARM: highbank: add devicetree source Rob Herring @ 2011-08-16 20:34 ` Rob Herring 2011-08-16 22:19 ` Jamie Iles ` (8 more replies) 2011-08-16 20:34 ` [PATCH 3/6] MAINTAINERS: add Calxeda Highbank ARM platform Rob Herring ` (3 subsequent siblings) 5 siblings, 9 replies; 53+ messages in thread From: Rob Herring @ 2011-08-16 20:34 UTC (permalink / raw) To: linux-arm-kernel From: Rob Herring <rob.herring@calxeda.com> This adds basic support for the Calxeda Highbank platform. Signed-off-by: Rob Herring <rob.herring@calxeda.com> --- arch/arm/Kconfig | 17 ++ arch/arm/Makefile | 1 + arch/arm/mach-highbank/Makefile | 1 + arch/arm/mach-highbank/Makefile.boot | 1 + arch/arm/mach-highbank/clock.c | 63 ++++++++ arch/arm/mach-highbank/core.h | 3 + arch/arm/mach-highbank/highbank.c | 164 +++++++++++++++++++++ arch/arm/mach-highbank/include/mach/debug-macro.S | 20 +++ arch/arm/mach-highbank/include/mach/entry-macro.S | 9 + arch/arm/mach-highbank/include/mach/gpio.h | 1 + arch/arm/mach-highbank/include/mach/io.h | 8 + arch/arm/mach-highbank/include/mach/irqs.h | 6 + arch/arm/mach-highbank/include/mach/memory.h | 1 + arch/arm/mach-highbank/include/mach/system.h | 26 ++++ arch/arm/mach-highbank/include/mach/timex.h | 6 + arch/arm/mach-highbank/include/mach/uncompress.h | 9 + arch/arm/mach-highbank/include/mach/vmalloc.h | 6 + arch/arm/mach-highbank/sysregs.h | 30 ++++ arch/arm/mach-highbank/system.c | 33 ++++ arch/arm/mm/Kconfig | 2 +- 20 files changed, 406 insertions(+), 1 deletions(-) create mode 100644 arch/arm/mach-highbank/Makefile create mode 100644 arch/arm/mach-highbank/Makefile.boot create mode 100644 arch/arm/mach-highbank/clock.c create mode 100644 arch/arm/mach-highbank/core.h create mode 100644 arch/arm/mach-highbank/highbank.c create mode 100644 arch/arm/mach-highbank/include/mach/debug-macro.S create mode 100644 arch/arm/mach-highbank/include/mach/entry-macro.S create mode 100644 arch/arm/mach-highbank/include/mach/gpio.h create mode 100644 arch/arm/mach-highbank/include/mach/io.h create mode 100644 arch/arm/mach-highbank/include/mach/irqs.h create mode 100644 arch/arm/mach-highbank/include/mach/memory.h create mode 100644 arch/arm/mach-highbank/include/mach/system.h create mode 100644 arch/arm/mach-highbank/include/mach/timex.h create mode 100644 arch/arm/mach-highbank/include/mach/uncompress.h create mode 100644 arch/arm/mach-highbank/include/mach/vmalloc.h create mode 100644 arch/arm/mach-highbank/sysregs.h create mode 100644 arch/arm/mach-highbank/system.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5ebc5d9..eecee3d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -318,6 +318,23 @@ config ARCH_BCMRING help Support for Broadcom's BCMRing platform. +config ARCH_HIGHBANK + bool "Calxeda Highbank-based" + select CPU_V7 + select AUTO_ZRELADDR + select ARM_PATCH_PHYS_VIRT + select ARM_GIC + select HAVE_ARM_SCU + select ARM_AMBA + select ARM_TIMER_SP804 + select PL330 + select CLKDEV_LOOKUP + select GENERIC_CLOCKEVENTS + select USE_OF + select ARCH_WANT_OPTIONAL_GPIOLIB + help + Support for the Calxeda Highbank SoC based boards. + config ARCH_CLPS711X bool "Cirrus Logic CLPS711x/EP721x-based" select CPU_ARM720T diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 70c424e..451097e 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -141,6 +141,7 @@ machine-$(CONFIG_ARCH_EBSA110) := ebsa110 machine-$(CONFIG_ARCH_EP93XX) := ep93xx machine-$(CONFIG_ARCH_GEMINI) := gemini machine-$(CONFIG_ARCH_H720X) := h720x +machine-$(CONFIG_ARCH_HIGHBANK) := highbank machine-$(CONFIG_ARCH_INTEGRATOR) := integrator machine-$(CONFIG_ARCH_IOP13XX) := iop13xx machine-$(CONFIG_ARCH_IOP32X) := iop32x diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile new file mode 100644 index 0000000..b5de3b9 --- /dev/null +++ b/arch/arm/mach-highbank/Makefile @@ -0,0 +1 @@ +obj-y := clock.o highbank.o system.o diff --git a/arch/arm/mach-highbank/Makefile.boot b/arch/arm/mach-highbank/Makefile.boot new file mode 100644 index 0000000..dae9661 --- /dev/null +++ b/arch/arm/mach-highbank/Makefile.boot @@ -0,0 +1 @@ +zreladdr-y := 0x00008000 diff --git a/arch/arm/mach-highbank/clock.c b/arch/arm/mach-highbank/clock.c new file mode 100644 index 0000000..8464e14 --- /dev/null +++ b/arch/arm/mach-highbank/clock.c @@ -0,0 +1,63 @@ +/* + * Copyright 2011 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/clk.h> +#include <linux/clkdev.h> + + +struct clk { + unsigned long rate; +}; + +int clk_enable(struct clk *clk) +{ + return 0; +} + +void clk_disable(struct clk *clk) +{} + +unsigned long clk_get_rate(struct clk *clk) +{ + return clk->rate; +} + +long clk_round_rate(struct clk *clk, unsigned long rate) +{ + return clk->rate; +} + +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + return 0; +} + +static struct clk eclk = { .rate = 200000000 }; +static struct clk pclk = { .rate = 150000000 }; + +static struct clk_lookup lookups[] = { + { .clk = &pclk, .con_id = "apb_pclk", }, + { .clk = &pclk, .dev_id = "sp804", }, + { .clk = &eclk, .dev_id = "ffe0e000.sdhci", }, + { .clk = &pclk, .dev_id = "fff36000.serial", }, +}; + +void __init highbank_clocks_init(void) +{ + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); +} diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h new file mode 100644 index 0000000..b5aa45f --- /dev/null +++ b/arch/arm/mach-highbank/core.h @@ -0,0 +1,3 @@ +extern void highbank_set_cpu_jump(int cpu, void *jump_addr); +extern void __iomem *a9_base_addr; +extern void highbank_clocks_init(void); diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c new file mode 100644 index 0000000..49bbd13 --- /dev/null +++ b/arch/arm/mach-highbank/highbank.c @@ -0,0 +1,164 @@ +/* + * Copyright 2010-2011 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ +#include <linux/clk.h> +#include <linux/clkdev.h> +#include <linux/irq.h> +#include <linux/irqdomain.h> +#include <linux/of.h> +#include <linux/of_irq.h> +#include <linux/of_platform.h> +#include <linux/of_address.h> + +#include <asm/cacheflush.h> +#include <asm/unified.h> +#include <asm/smp_scu.h> +#include <asm/hardware/arm_timer.h> +#include <asm/hardware/timer-sp.h> +#include <asm/hardware/gic.h> +#include <asm/hardware/cache-l2x0.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/time.h> +#include <mach/irqs.h> + +#include "core.h" +#include "sysregs.h" + +#define HB_DEBUG_LL_PHYS_BASE 0xfff36000 + +/* Static virtual mappings */ +#define HB_DEBUG_LL_VIRT_BASE 0xfee36000 +#define HB_MPIC_VIRT_BASE 0xfee00000 + +void __iomem *a9_base_addr = ((void __iomem *)(HB_MPIC_VIRT_BASE)); +void __iomem *sregs_base; + +static struct map_desc highbank_io_desc[] __initdata = { + { + .virtual = HB_MPIC_VIRT_BASE, + .pfn = 0, /* run-time */ + .length = SZ_4K, + .type = MT_DEVICE, + }, +#ifdef CONFIG_DEBUG_LL + { + .virtual = HB_DEBUG_LL_VIRT_BASE, + .pfn = __phys_to_pfn(HB_DEBUG_LL_PHYS_BASE), + .length = SZ_4K, + .type = MT_DEVICE, + }, +#endif +}; + +static void __init highbank_map_io(void) +{ + unsigned long base; + + /* Get SCU base */ + asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); + + highbank_io_desc[0].pfn = __phys_to_pfn(base); + iotable_init(highbank_io_desc, ARRAY_SIZE(highbank_io_desc)); +} + +#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu))) +#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu)) + +void highbank_set_cpu_jump(int cpu, void *jump_addr) +{ + writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu)); + __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); + outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), + HB_JUMP_TABLE_PHYS(cpu) + 15); +} + +void highbank_init_irq(void) +{ + struct device_node *node; + struct of_intc_desc desc; + int n = 0; + + memset(&desc, 0, sizeof(desc)); + desc.controller = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic"); + gic_of_init(&desc); + node = desc.controller; + for_each_child_of_node(node, desc.controller) { + gic_of_ppi_init(&desc); + } + + for_each_compatible_node(node, NULL, "arm,pl061") { + irq_domain_add_simple(node, 160 + (8 * n)); + n++; + } + +#ifdef CONFIG_CACHE_L2X0 + l2x0_of_init(0, ~0UL); +#endif +} + +static void __init highbank_timer_init(void) +{ + int irq; + struct device_node *np; + void __iomem *timer_base; + + /* Map system registers */ + np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); + sregs_base = of_iomap(np, 0); + + np = of_find_compatible_node(NULL, NULL, "arm,sp804"); + timer_base = of_iomap(np, 0); + irq = irq_of_parse_and_map(np, 0); + + highbank_clocks_init(); + + sp804_clocksource_init(timer_base + 0x20, "timer1"); + sp804_clockevents_init(timer_base, irq, "timer0"); +} + +static struct sys_timer highbank_timer = { + .init = highbank_timer_init, +}; + +static void highbank_power_off(void) +{ + writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ); + scu_power_mode(a9_base_addr, SCU_PM_POWEROFF); + + while (1) + cpu_do_idle(); +} + +static void __init highbank_init(void) +{ + pm_power_off = highbank_power_off; + + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); +} + +static const char *highbank_match[] __initconst = { + "calxeda,highbank", + NULL, +}; + +DT_MACHINE_START(HIGHBANK, "Highbank") + .map_io = highbank_map_io, + .init_irq = highbank_init_irq, + .nr_irqs = NR_IRQS, + .timer = &highbank_timer, + .init_machine = highbank_init, + .dt_compat = highbank_match, +MACHINE_END diff --git a/arch/arm/mach-highbank/include/mach/debug-macro.S b/arch/arm/mach-highbank/include/mach/debug-macro.S new file mode 100644 index 0000000..f56096f --- /dev/null +++ b/arch/arm/mach-highbank/include/mach/debug-macro.S @@ -0,0 +1,20 @@ +/* + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + + .macro addruart,rp,rv + movw \rv, #0x6000 + movt \rv, #0xfee3 + movw \rp, #0x6000 + movt \rp, #0xfff3 + .endm + +#include <asm/hardware/debug-pl01x.S> + diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S new file mode 100644 index 0000000..56be409 --- /dev/null +++ b/arch/arm/mach-highbank/include/mach/entry-macro.S @@ -0,0 +1,9 @@ +#include <asm/hardware/gic.h> +#include <asm/hardware/entry-macro-gic.S> + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + diff --git a/arch/arm/mach-highbank/include/mach/gpio.h b/arch/arm/mach-highbank/include/mach/gpio.h new file mode 100644 index 0000000..40a8c17 --- /dev/null +++ b/arch/arm/mach-highbank/include/mach/gpio.h @@ -0,0 +1 @@ +/* empty */ diff --git a/arch/arm/mach-highbank/include/mach/io.h b/arch/arm/mach-highbank/include/mach/io.h new file mode 100644 index 0000000..5a37da2 --- /dev/null +++ b/arch/arm/mach-highbank/include/mach/io.h @@ -0,0 +1,8 @@ +#ifndef __MACH_IO_H +#define __MACH_IO_H + +#define IO_SPACE_LIMIT 0 +#define __io(a) ((void __iomem *)0) +#define __mem_pci(a) (a) + +#endif diff --git a/arch/arm/mach-highbank/include/mach/irqs.h b/arch/arm/mach-highbank/include/mach/irqs.h new file mode 100644 index 0000000..9746aab --- /dev/null +++ b/arch/arm/mach-highbank/include/mach/irqs.h @@ -0,0 +1,6 @@ +#ifndef __MACH_IRQS_H +#define __MACH_IRQS_H + +#define NR_IRQS 192 + +#endif diff --git a/arch/arm/mach-highbank/include/mach/memory.h b/arch/arm/mach-highbank/include/mach/memory.h new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/arch/arm/mach-highbank/include/mach/memory.h @@ -0,0 +1 @@ + diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h new file mode 100644 index 0000000..7e81922 --- /dev/null +++ b/arch/arm/mach-highbank/include/mach/system.h @@ -0,0 +1,26 @@ +/* + * Copyright 2010-2011 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef __MACH_SYSTEM_H +#define __MACH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +extern void arch_reset(char mode, const char *cmd); + +#endif diff --git a/arch/arm/mach-highbank/include/mach/timex.h b/arch/arm/mach-highbank/include/mach/timex.h new file mode 100644 index 0000000..88dac7a --- /dev/null +++ b/arch/arm/mach-highbank/include/mach/timex.h @@ -0,0 +1,6 @@ +#ifndef __MACH_TIMEX_H +#define __MACH_TIMEX_H + +#define CLOCK_TICK_RATE 1000000 + +#endif diff --git a/arch/arm/mach-highbank/include/mach/uncompress.h b/arch/arm/mach-highbank/include/mach/uncompress.h new file mode 100644 index 0000000..bbe20e6 --- /dev/null +++ b/arch/arm/mach-highbank/include/mach/uncompress.h @@ -0,0 +1,9 @@ +#ifndef __MACH_UNCOMPRESS_H +#define __MACH_UNCOMPRESS_H + +#define putc(c) +#define flush() +#define arch_decomp_setup() +#define arch_decomp_wdog() + +#endif diff --git a/arch/arm/mach-highbank/include/mach/vmalloc.h b/arch/arm/mach-highbank/include/mach/vmalloc.h new file mode 100644 index 0000000..1a3e398 --- /dev/null +++ b/arch/arm/mach-highbank/include/mach/vmalloc.h @@ -0,0 +1,6 @@ +#ifndef __MACH_VMALLOC_H +#define __MACH_VMALLOC_H + +#define VMALLOC_END 0xFEE00000UL + +#endif diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h new file mode 100644 index 0000000..98ce973 --- /dev/null +++ b/arch/arm/mach-highbank/sysregs.h @@ -0,0 +1,30 @@ +/* + * Copyright 2011 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef _MACH_HIGHBANK__SYSREGS_H_ +#define _MACH_HIGHBANK__SYSREGS_H_ + +extern void __iomem *sregs_base; + +#define HB_SREG_A9_PWR_REQ 0xf00 +#define HB_SREG_A9_BOOT_STAT 0xf04 +#define HB_SREG_A9_BOOT_DATA 0xf08 + +#define HB_PWR_SUSPEND 0 +#define HB_PWR_SOFT_RESET 1 +#define HB_PWR_HARD_RESET 2 +#define HB_PWR_SHUTDOWN 3 + +#endif diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c new file mode 100644 index 0000000..f8d1419 --- /dev/null +++ b/arch/arm/mach-highbank/system.c @@ -0,0 +1,33 @@ +/* + * Copyright 2011 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ +#include <linux/io.h> +#include <asm/smp_scu.h> +#include <asm/proc-fns.h> + +#include "core.h" +#include "sysregs.h" + +void arch_reset(char mode, const char *cmd) +{ + if (mode == 'h') + writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ); + else + writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ); + + scu_power_mode(a9_base_addr, SCU_PM_POWEROFF); + cpu_do_idle(); +} + diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 88633fe..7d5fff7 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -822,7 +822,7 @@ config CACHE_L2X0 REALVIEW_EB_A9MP || SOC_IMX35 || SOC_IMX31 || MACH_REALVIEW_PBX || \ ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \ ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \ - ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX + ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_HIGHBANK default y select OUTER_CACHE select OUTER_CACHE_SYNC -- 1.7.4.1 ^ permalink raw reply related [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-16 20:34 ` [PATCH 2/6] ARM: add Highbank core platform support Rob Herring @ 2011-08-16 22:19 ` Jamie Iles 2011-08-25 2:19 ` Rob Herring 2011-08-17 7:43 ` Russell King - ARM Linux ` (7 subsequent siblings) 8 siblings, 1 reply; 53+ messages in thread From: Jamie Iles @ 2011-08-16 22:19 UTC (permalink / raw) To: linux-arm-kernel Hi Rob, On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: > From: Rob Herring <rob.herring@calxeda.com> > > This adds basic support for the Calxeda Highbank platform. > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > --- [...] > +static void __init highbank_timer_init(void) > +{ > + int irq; > + struct device_node *np; > + void __iomem *timer_base; > + > + /* Map system registers */ > + np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); > + sregs_base = of_iomap(np, 0); Should the return values be checked here? I know that all valid device trees should have these nodes and valid a reg property, but I don't know if the error handling needs to be a bit more explicit. For my platform I have put these checks and panics() if they fail, but I'm not sure if that's the right thing! Jamie ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-16 22:19 ` Jamie Iles @ 2011-08-25 2:19 ` Rob Herring 0 siblings, 0 replies; 53+ messages in thread From: Rob Herring @ 2011-08-25 2:19 UTC (permalink / raw) To: linux-arm-kernel Jamie, On 08/16/2011 05:19 PM, Jamie Iles wrote: > Hi Rob, > > On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: >> From: Rob Herring <rob.herring@calxeda.com> >> >> This adds basic support for the Calxeda Highbank platform. >> >> Signed-off-by: Rob Herring <rob.herring@calxeda.com> >> --- > [...] >> +static void __init highbank_timer_init(void) >> +{ >> + int irq; >> + struct device_node *np; >> + void __iomem *timer_base; >> + >> + /* Map system registers */ >> + np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); >> + sregs_base = of_iomap(np, 0); > > Should the return values be checked here? I know that all valid device trees > should have these nodes and valid a reg property, but I don't know if the > error handling needs to be a bit more explicit. For my platform I have put > these checks and panics() if they fail, but I'm not sure if that's the right > thing! > A panic will stop the boot at a point the console is not up unless DEBUG_LL is enabled. If you continue, you may be able to continue long enough to get a console and then fail when something that depends on this is used. For this case, it would be when the clocks are not setup correctly (once real clock setup is implemented). As it is now, these registers aren't accessed until you do suspend, hotplug, or poweroff. So probably just a WARN_ON would be better here. Rob ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-16 20:34 ` [PATCH 2/6] ARM: add Highbank core platform support Rob Herring 2011-08-16 22:19 ` Jamie Iles @ 2011-08-17 7:43 ` Russell King - ARM Linux 2011-08-18 15:34 ` Arnd Bergmann ` (6 subsequent siblings) 8 siblings, 0 replies; 53+ messages in thread From: Russell King - ARM Linux @ 2011-08-17 7:43 UTC (permalink / raw) To: linux-arm-kernel On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: > +config ARCH_HIGHBANK > + bool "Calxeda Highbank-based" > + select CPU_V7 > + select AUTO_ZRELADDR > + select ARM_PATCH_PHYS_VIRT > + select ARM_GIC > + select HAVE_ARM_SCU > + select ARM_AMBA > + select ARM_TIMER_SP804 > + select PL330 > + select CLKDEV_LOOKUP > + select GENERIC_CLOCKEVENTS > + select USE_OF > + select ARCH_WANT_OPTIONAL_GPIOLIB Please arrange these select statements in alphabetical order. > diff --git a/arch/arm/mach-highbank/include/mach/memory.h b/arch/arm/mach-highbank/include/mach/memory.h > new file mode 100644 > index 0000000..8b13789 > --- /dev/null > +++ b/arch/arm/mach-highbank/include/mach/memory.h > @@ -0,0 +1 @@ > + It's good practice to put something in a file other than a blank line. ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-16 20:34 ` [PATCH 2/6] ARM: add Highbank core platform support Rob Herring 2011-08-16 22:19 ` Jamie Iles 2011-08-17 7:43 ` Russell King - ARM Linux @ 2011-08-18 15:34 ` Arnd Bergmann 2011-08-18 15:40 ` Russell King - ARM Linux 2011-08-20 18:44 ` Rob Herring 2011-08-19 6:43 ` Shawn Guo ` (5 subsequent siblings) 8 siblings, 2 replies; 53+ messages in thread From: Arnd Bergmann @ 2011-08-18 15:34 UTC (permalink / raw) To: linux-arm-kernel On Tuesday 16 August 2011, Rob Herring wrote: > +void __iomem *a9_base_addr = ((void __iomem *)(HB_MPIC_VIRT_BASE)); > +void __iomem *sregs_base; > + > +static struct map_desc highbank_io_desc[] __initdata = { > + { > + .virtual = HB_MPIC_VIRT_BASE, > + .pfn = 0, /* run-time */ > + .length = SZ_4K, > + .type = MT_DEVICE, > + }, > +#ifdef CONFIG_DEBUG_LL > + { > + .virtual = HB_DEBUG_LL_VIRT_BASE, > + .pfn = __phys_to_pfn(HB_DEBUG_LL_PHYS_BASE), > + .length = SZ_4K, > + .type = MT_DEVICE, > + }, > +#endif > +}; > + > +static void __init highbank_map_io(void) > +{ > + unsigned long base; > + > + /* Get SCU base */ > + asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); > + > + highbank_io_desc[0].pfn = __phys_to_pfn(base); > + iotable_init(highbank_io_desc, ARRAY_SIZE(highbank_io_desc)); > +} I really liked the way that Barry moved the io_desc out to the drivers using them, e.g arch/arm/mach-prima2/lluart.c. Can you do the same thing with your lluart and with the a9_base_addr? I guess it can live locally in platsmp.c. > +void highbank_init_irq(void) > +{ > + struct device_node *node; > + struct of_intc_desc desc; > + int n = 0; > + > + memset(&desc, 0, sizeof(desc)); > + desc.controller = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic"); > + gic_of_init(&desc); > + node = desc.controller; > + for_each_child_of_node(node, desc.controller) { > + gic_of_ppi_init(&desc); > + } > + > + for_each_compatible_node(node, NULL, "arm,pl061") { > + irq_domain_add_simple(node, 160 + (8 * n)); > + n++; > + } Where does the "160 + (8 * n)" come from? Is that something that should be in a property of the gic binding? > +#ifdef CONFIG_CACHE_L2X0 > + l2x0_of_init(0, ~0UL); > +#endif > +} Hmm, I missed that during the review of the patch that adds l2x0_of_init, but I think the #ifdef should really be in the header file, not in the user, so that calling l2x0_of_init when CONFIG_CACHE_L2X0 is not set automatically turns into an empty stub. > +static void __init highbank_timer_init(void) > +{ > + int irq; > + struct device_node *np; > + void __iomem *timer_base; > + > + /* Map system registers */ > + np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); > + sregs_base = of_iomap(np, 0); > + > + np = of_find_compatible_node(NULL, NULL, "arm,sp804"); > + timer_base = of_iomap(np, 0); > + irq = irq_of_parse_and_map(np, 0); > + > + highbank_clocks_init(); > + > + sp804_clocksource_init(timer_base + 0x20, "timer1"); > + sp804_clockevents_init(timer_base, irq, "timer0"); > +} How about moving the sp804 initialization from device tree into the arch/arm/common/timer-sp.c file? Why do you initialize sregs_base from timer_init? > diff --git a/arch/arm/mach-highbank/include/mach/timex.h b/arch/arm/mach-highbank/include/mach/timex.h > new file mode 100644 > index 0000000..88dac7a > --- /dev/null > +++ b/arch/arm/mach-highbank/include/mach/timex.h > @@ -0,0 +1,6 @@ > +#ifndef __MACH_TIMEX_H > +#define __MACH_TIMEX_H > + > +#define CLOCK_TICK_RATE 1000000 > + > +#endif In 3.2, we shouldn't need this any more. We'll have to come up with a way to remember removing the new definitions that come in in parallel to the patch that removes the old ones. > +#ifndef _MACH_HIGHBANK__SYSREGS_H_ > +#define _MACH_HIGHBANK__SYSREGS_H_ > + > +extern void __iomem *sregs_base; > + > +#define HB_SREG_A9_PWR_REQ 0xf00 > +#define HB_SREG_A9_BOOT_STAT 0xf04 > +#define HB_SREG_A9_BOOT_DATA 0xf08 > + > +#define HB_PWR_SUSPEND 0 > +#define HB_PWR_SOFT_RESET 1 > +#define HB_PWR_HARD_RESET 2 > +#define HB_PWR_SHUTDOWN 3 > + > +#endif Do these really need to be global? I think it's better to put the base address and register definitions into a single file and export functions to be used from elsewhere. Arnd ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-18 15:34 ` Arnd Bergmann @ 2011-08-18 15:40 ` Russell King - ARM Linux 2011-08-19 14:11 ` Arnd Bergmann 2011-08-20 18:44 ` Rob Herring 1 sibling, 1 reply; 53+ messages in thread From: Russell King - ARM Linux @ 2011-08-18 15:40 UTC (permalink / raw) To: linux-arm-kernel On Thu, Aug 18, 2011 at 05:34:25PM +0200, Arnd Bergmann wrote: > On Tuesday 16 August 2011, Rob Herring wrote: > > +static void __init highbank_timer_init(void) > > +{ > > + int irq; > > + struct device_node *np; > > + void __iomem *timer_base; > > + > > + /* Map system registers */ > > + np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); > > + sregs_base = of_iomap(np, 0); > > + > > + np = of_find_compatible_node(NULL, NULL, "arm,sp804"); > > + timer_base = of_iomap(np, 0); > > + irq = irq_of_parse_and_map(np, 0); > > + > > + highbank_clocks_init(); > > + > > + sp804_clocksource_init(timer_base + 0x20, "timer1"); > > + sp804_clockevents_init(timer_base, irq, "timer0"); > > +} > > How about moving the sp804 initialization from device tree into the > arch/arm/common/timer-sp.c file? > > Why do you initialize sregs_base from timer_init? That'd create special cases - ARM platforms need registers twiddled to change the clock rate for the timers from 32kHz to a more sensible 1MHz. > > diff --git a/arch/arm/mach-highbank/include/mach/timex.h b/arch/arm/mach-highbank/include/mach/timex.h > > new file mode 100644 > > index 0000000..88dac7a > > --- /dev/null > > +++ b/arch/arm/mach-highbank/include/mach/timex.h > > @@ -0,0 +1,6 @@ > > +#ifndef __MACH_TIMEX_H > > +#define __MACH_TIMEX_H > > + > > +#define CLOCK_TICK_RATE 1000000 > > + > > +#endif > > In 3.2, we shouldn't need this any more. We'll have to come up with a > way to remember removing the new definitions that come in in parallel > to the patch that removes the old ones. Has anyone really properly evaluated the CLOCK_TICK_RATE issues on things like NTP etc? I have problems with kernels on OMAP4 constantly jumping forwards/back by .5sec when NTP is running which suggests that there's something not quite right _somewhere_. Given that OMAP uses an untrue value for this, and the platforms I have which _do_ behave properly when running NTP have correct values, I _still_ remain entirely unconvinced about the claims surrounding CLOCK_TICK_RATE not mattering. Has anyone managed to run NTP on OMAP4 and had it sync successfully over a few days? ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-18 15:40 ` Russell King - ARM Linux @ 2011-08-19 14:11 ` Arnd Bergmann 2011-08-20 19:24 ` Rob Herring 2011-08-20 23:05 ` Russell King - ARM Linux 0 siblings, 2 replies; 53+ messages in thread From: Arnd Bergmann @ 2011-08-19 14:11 UTC (permalink / raw) To: linux-arm-kernel On Thursday 18 August 2011, Russell King - ARM Linux wrote: > On Thu, Aug 18, 2011 at 05:34:25PM +0200, Arnd Bergmann wrote: > > On Tuesday 16 August 2011, Rob Herring wrote: > > > +static void __init highbank_timer_init(void) > > > +{ > > > + int irq; > > > + struct device_node *np; > > > + void __iomem *timer_base; > > > + > > > + /* Map system registers */ > > > + np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); > > > + sregs_base = of_iomap(np, 0); > > > + > > > + np = of_find_compatible_node(NULL, NULL, "arm,sp804"); > > > + timer_base = of_iomap(np, 0); > > > + irq = irq_of_parse_and_map(np, 0); > > > + > > > + highbank_clocks_init(); > > > + > > > + sp804_clocksource_init(timer_base + 0x20, "timer1"); > > > + sp804_clockevents_init(timer_base, irq, "timer0"); > > > +} > > > > How about moving the sp804 initialization from device tree into the > > arch/arm/common/timer-sp.c file? > > > > Why do you initialize sregs_base from timer_init? > > That'd create special cases - ARM platforms need registers twiddled to > change the clock rate for the timers from 32kHz to a more sensible 1MHz. Is that a bad thing? Platforms that don't need the special case can simply call sp804_clocksource_init_dt() which scans the device tree, while other platforms do whatever is necessary to the registers and then call the existing sp804_clockevents_init. > > > diff --git a/arch/arm/mach-highbank/include/mach/timex.h b/arch/arm/mach-highbank/include/mach/timex.h > > > new file mode 100644 > > > index 0000000..88dac7a > > > --- /dev/null > > > +++ b/arch/arm/mach-highbank/include/mach/timex.h > > > @@ -0,0 +1,6 @@ > > > +#ifndef __MACH_TIMEX_H > > > +#define __MACH_TIMEX_H > > > + > > > +#define CLOCK_TICK_RATE 1000000 > > > + > > > +#endif > > > > In 3.2, we shouldn't need this any more. We'll have to come up with a > > way to remember removing the new definitions that come in in parallel > > to the patch that removes the old ones. > > Has anyone really properly evaluated the CLOCK_TICK_RATE issues on things > like NTP etc? I have problems with kernels on OMAP4 constantly jumping > forwards/back by .5sec when NTP is running which suggests that there's > something not quite right _somewhere_. > > Given that OMAP uses an untrue value for this, and the platforms I have > which do behave properly when running NTP have correct values, I still > remain entirely unconvinced about the claims surrounding CLOCK_TICK_RATE > not mattering. (Taking John, Deepak an Thomas on Cc, they have all worked on this in the past) The argument why it is assumed to be safe is that almost all machines today use a totally bogus CLOCK_TICK_RATE. This includes most x86 machines (which don't use PIT for periodic ticks any more), all sparc, powerpc, s390, parisc and mips machines that have never used the PIT time base but define CLOCK_TICK_RATE to 1193180 or 1193182 anyway. The only explanation I have for these working correctly is that the effect of the ACTHZ macro is not what it was meant to be and that it should better be removed. > Has anyone managed to run NTP on OMAP4 and had it sync successfully over > a few days? Omap is weird in many ways here. They define CLOCK_TICK_RATE to be equal to HZ, which in turn is a power-of-two value, typically 128. I have verified that the strange CLOCK_TICK_RATE won't cause problems in the kernel (in theory), but I could well imagine that the problems of OMAP are stemming from rounding problems when converting between kernel ticks (128 Hz) to user ticks (100 Hz) in kernel/time.c, or perhaps from the omap read_persistent_clock() function not being SMP safe. Arnd ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-19 14:11 ` Arnd Bergmann @ 2011-08-20 19:24 ` Rob Herring 2011-08-20 23:05 ` Russell King - ARM Linux 1 sibling, 0 replies; 53+ messages in thread From: Rob Herring @ 2011-08-20 19:24 UTC (permalink / raw) To: linux-arm-kernel Arnd, On 08/19/2011 09:11 AM, Arnd Bergmann wrote: > On Thursday 18 August 2011, Russell King - ARM Linux wrote: >> On Thu, Aug 18, 2011 at 05:34:25PM +0200, Arnd Bergmann wrote: >>> On Tuesday 16 August 2011, Rob Herring wrote: >>>> +static void __init highbank_timer_init(void) >>>> +{ >>>> + int irq; >>>> + struct device_node *np; >>>> + void __iomem *timer_base; >>>> + >>>> + /* Map system registers */ >>>> + np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); >>>> + sregs_base = of_iomap(np, 0); >>>> + >>>> + np = of_find_compatible_node(NULL, NULL, "arm,sp804"); >>>> + timer_base = of_iomap(np, 0); >>>> + irq = irq_of_parse_and_map(np, 0); >>>> + >>>> + highbank_clocks_init(); >>>> + >>>> + sp804_clocksource_init(timer_base + 0x20, "timer1"); >>>> + sp804_clockevents_init(timer_base, irq, "timer0"); >>>> +} >>> >>> How about moving the sp804 initialization from device tree into the >>> arch/arm/common/timer-sp.c file? >>> >>> Why do you initialize sregs_base from timer_init? >> >> That'd create special cases - ARM platforms need registers twiddled to >> change the clock rate for the timers from 32kHz to a more sensible 1MHz. > > Is that a bad thing? Platforms that don't need the special case can > simply call sp804_clocksource_init_dt() which scans the device tree, > while other platforms do whatever is necessary to the registers > and then call the existing sp804_clockevents_init. > This was something I considered as I've worked on doing that in other cases like l2x0 and gic. There's also the issue that the clocksource and clockevent timers may or may not be at the same address range (base and base + 0x20), so you may need 1 or 2 mappings. You could figure all that out, but it would be a lot of work for little gain. Also, which timer is used for which function is also platform dependent. For example, we don't have the 2nd timer's interrupt hooked up so it has to be the . On top of that this really needs to wait until the DT clock binding is in place as clock setup is a major part of the init. Rob ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-19 14:11 ` Arnd Bergmann 2011-08-20 19:24 ` Rob Herring @ 2011-08-20 23:05 ` Russell King - ARM Linux 1 sibling, 0 replies; 53+ messages in thread From: Russell King - ARM Linux @ 2011-08-20 23:05 UTC (permalink / raw) To: linux-arm-kernel On Fri, Aug 19, 2011 at 04:11:35PM +0200, Arnd Bergmann wrote: > Is that a bad thing? Platforms that don't need the special case can > simply call sp804_clocksource_init_dt() which scans the device tree, > while other platforms do whatever is necessary to the registers > and then call the existing sp804_clockevents_init. It means we're not solving the problem. We end up with some platforms which do the sp804 init from DT, others which are DT but ignore the DT stuff for sp804. That's not very consistent, and in the long run is rather confusing. ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-18 15:34 ` Arnd Bergmann 2011-08-18 15:40 ` Russell King - ARM Linux @ 2011-08-20 18:44 ` Rob Herring 2011-08-25 2:45 ` Rob Herring 2011-08-25 16:02 ` Arnd Bergmann 1 sibling, 2 replies; 53+ messages in thread From: Rob Herring @ 2011-08-20 18:44 UTC (permalink / raw) To: linux-arm-kernel Arnd, On 08/18/2011 10:34 AM, Arnd Bergmann wrote: > On Tuesday 16 August 2011, Rob Herring wrote: > >> +void __iomem *a9_base_addr = ((void __iomem *)(HB_MPIC_VIRT_BASE)); >> +void __iomem *sregs_base; >> + >> +static struct map_desc highbank_io_desc[] __initdata = { >> + { >> + .virtual = HB_MPIC_VIRT_BASE, >> + .pfn = 0, /* run-time */ >> + .length = SZ_4K, >> + .type = MT_DEVICE, >> + }, >> +#ifdef CONFIG_DEBUG_LL >> + { >> + .virtual = HB_DEBUG_LL_VIRT_BASE, >> + .pfn = __phys_to_pfn(HB_DEBUG_LL_PHYS_BASE), >> + .length = SZ_4K, >> + .type = MT_DEVICE, >> + }, >> +#endif >> +}; >> + >> +static void __init highbank_map_io(void) >> +{ >> + unsigned long base; >> + >> + /* Get SCU base */ >> + asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); >> + >> + highbank_io_desc[0].pfn = __phys_to_pfn(base); >> + iotable_init(highbank_io_desc, ARRAY_SIZE(highbank_io_desc)); >> +} > > I really liked the way that Barry moved the io_desc out to the > drivers using them, e.g arch/arm/mach-prima2/lluart.c. > > Can you do the same thing with your lluart and with the a9_base_addr? > I guess it can live locally in platsmp.c. Okay. > >> +void highbank_init_irq(void) >> +{ >> + struct device_node *node; >> + struct of_intc_desc desc; >> + int n = 0; >> + >> + memset(&desc, 0, sizeof(desc)); >> + desc.controller = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic"); >> + gic_of_init(&desc); >> + node = desc.controller; >> + for_each_child_of_node(node, desc.controller) { >> + gic_of_ppi_init(&desc); >> + } >> + >> + for_each_compatible_node(node, NULL, "arm,pl061") { >> + irq_domain_add_simple(node, 160 + (8 * n)); >> + n++; >> + } > > Where does the "160 + (8 * n)" come from? Is that something that should > be in a property of the gic binding? All this should go away once we have dynamic linux irq number assignment. Actually, I should just delete this for now as the pl061 driver doesn't support interrupts yet with DT binding (without platform data). > >> +#ifdef CONFIG_CACHE_L2X0 >> + l2x0_of_init(0, ~0UL); >> +#endif >> +} > > Hmm, I missed that during the review of the patch that adds l2x0_of_init, > but I think the #ifdef should really be in the header file, not in the > user, so that calling l2x0_of_init when CONFIG_CACHE_L2X0 is not set > automatically turns into an empty stub. It's also a problem with l2x0_init. I'll add a patch to do that. > >> +static void __init highbank_timer_init(void) >> +{ >> + int irq; >> + struct device_node *np; >> + void __iomem *timer_base; >> + >> + /* Map system registers */ >> + np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); >> + sregs_base = of_iomap(np, 0); >> + >> + np = of_find_compatible_node(NULL, NULL, "arm,sp804"); >> + timer_base = of_iomap(np, 0); >> + irq = irq_of_parse_and_map(np, 0); >> + >> + highbank_clocks_init(); >> + >> + sp804_clocksource_init(timer_base + 0x20, "timer1"); >> + sp804_clockevents_init(timer_base, irq, "timer0"); >> +} > > How about moving the sp804 initialization from device tree into the > arch/arm/common/timer-sp.c file? > > Why do you initialize sregs_base from timer_init? It will be needed before the clocks are initialized. The clock code is not using it at the moment as I just did a minimal fixed clock implementation until the clock api and DT clock bindings gets sorted out. As there are multiple users, I didn't put it in highbank_clocks_init. > >> diff --git a/arch/arm/mach-highbank/include/mach/timex.h b/arch/arm/mach-highbank/include/mach/timex.h >> new file mode 100644 >> index 0000000..88dac7a >> --- /dev/null >> +++ b/arch/arm/mach-highbank/include/mach/timex.h >> @@ -0,0 +1,6 @@ >> +#ifndef __MACH_TIMEX_H >> +#define __MACH_TIMEX_H >> + >> +#define CLOCK_TICK_RATE 1000000 >> + >> +#endif > > In 3.2, we shouldn't need this any more. We'll have to come up with a > way to remember removing the new definitions that come in in parallel > to the patch that removes the old ones. I'm tracking the various clean-ups and we can coordinate the order things go in. I've already made gpio.h empty for example, so gpio will fail to compile if enabled in this series. Or I can just submit a patch deleting this file later. It will just be dead code and won't conflict. > >> +#ifndef _MACH_HIGHBANK__SYSREGS_H_ >> +#define _MACH_HIGHBANK__SYSREGS_H_ >> + >> +extern void __iomem *sregs_base; >> + >> +#define HB_SREG_A9_PWR_REQ 0xf00 >> +#define HB_SREG_A9_BOOT_STAT 0xf04 >> +#define HB_SREG_A9_BOOT_DATA 0xf08 >> + >> +#define HB_PWR_SUSPEND 0 >> +#define HB_PWR_SOFT_RESET 1 >> +#define HB_PWR_HARD_RESET 2 >> +#define HB_PWR_SHUTDOWN 3 >> + >> +#endif > > Do these really need to be global? > > I think it's better to put the base address and register definitions into a > single file and export functions to be used from elsewhere. Yes, sregs are a random collection of functions, so it's going to be a mixture of various users. Just HB_PWR_* alone are in 2 or 3 different places. Rob ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-20 18:44 ` Rob Herring @ 2011-08-25 2:45 ` Rob Herring 2011-08-25 4:03 ` Shawn Guo 2011-08-25 15:59 ` Arnd Bergmann 2011-08-25 16:02 ` Arnd Bergmann 1 sibling, 2 replies; 53+ messages in thread From: Rob Herring @ 2011-08-25 2:45 UTC (permalink / raw) To: linux-arm-kernel Arnd, On 08/20/2011 01:44 PM, Rob Herring wrote: > Arnd, > > On 08/18/2011 10:34 AM, Arnd Bergmann wrote: >> On Tuesday 16 August 2011, Rob Herring wrote: >> >>> +void __iomem *a9_base_addr = ((void __iomem *)(HB_MPIC_VIRT_BASE)); >>> +void __iomem *sregs_base; >>> + >>> +static struct map_desc highbank_io_desc[] __initdata = { >>> + { >>> + .virtual = HB_MPIC_VIRT_BASE, >>> + .pfn = 0, /* run-time */ >>> + .length = SZ_4K, >>> + .type = MT_DEVICE, >>> + }, >>> +#ifdef CONFIG_DEBUG_LL >>> + { >>> + .virtual = HB_DEBUG_LL_VIRT_BASE, >>> + .pfn = __phys_to_pfn(HB_DEBUG_LL_PHYS_BASE), >>> + .length = SZ_4K, >>> + .type = MT_DEVICE, >>> + }, >>> +#endif >>> +}; >>> + >>> +static void __init highbank_map_io(void) >>> +{ >>> + unsigned long base; >>> + >>> + /* Get SCU base */ >>> + asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); >>> + >>> + highbank_io_desc[0].pfn = __phys_to_pfn(base); >>> + iotable_init(highbank_io_desc, ARRAY_SIZE(highbank_io_desc)); >>> +} >> >> I really liked the way that Barry moved the io_desc out to the >> drivers using them, e.g arch/arm/mach-prima2/lluart.c. >> >> Can you do the same thing with your lluart and with the a9_base_addr? >> I guess it can live locally in platsmp.c. > > Okay. Looking at this some more, it doesn't work too well. platsmp.c depends on CONFIG_SMP, but the SCU mapping is always needed even for !SMP because the SCU has a power mode register for each core used by the power controller. So putting it in platsmp.c would add ifdefs. So I'll move out the lluart mapping, but keep SCU mapping in highbank.c. Rob > >> >>> +void highbank_init_irq(void) >>> +{ >>> + struct device_node *node; >>> + struct of_intc_desc desc; >>> + int n = 0; >>> + >>> + memset(&desc, 0, sizeof(desc)); >>> + desc.controller = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic"); >>> + gic_of_init(&desc); >>> + node = desc.controller; >>> + for_each_child_of_node(node, desc.controller) { >>> + gic_of_ppi_init(&desc); >>> + } >>> + >>> + for_each_compatible_node(node, NULL, "arm,pl061") { >>> + irq_domain_add_simple(node, 160 + (8 * n)); >>> + n++; >>> + } >> >> Where does the "160 + (8 * n)" come from? Is that something that should >> be in a property of the gic binding? > > All this should go away once we have dynamic linux irq number > assignment. Actually, I should just delete this for now as the pl061 > driver doesn't support interrupts yet with DT binding (without platform > data). > >> >>> +#ifdef CONFIG_CACHE_L2X0 >>> + l2x0_of_init(0, ~0UL); >>> +#endif >>> +} >> >> Hmm, I missed that during the review of the patch that adds l2x0_of_init, >> but I think the #ifdef should really be in the header file, not in the >> user, so that calling l2x0_of_init when CONFIG_CACHE_L2X0 is not set >> automatically turns into an empty stub. > > It's also a problem with l2x0_init. I'll add a patch to do that. > >> >>> +static void __init highbank_timer_init(void) >>> +{ >>> + int irq; >>> + struct device_node *np; >>> + void __iomem *timer_base; >>> + >>> + /* Map system registers */ >>> + np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); >>> + sregs_base = of_iomap(np, 0); >>> + >>> + np = of_find_compatible_node(NULL, NULL, "arm,sp804"); >>> + timer_base = of_iomap(np, 0); >>> + irq = irq_of_parse_and_map(np, 0); >>> + >>> + highbank_clocks_init(); >>> + >>> + sp804_clocksource_init(timer_base + 0x20, "timer1"); >>> + sp804_clockevents_init(timer_base, irq, "timer0"); >>> +} >> >> How about moving the sp804 initialization from device tree into the >> arch/arm/common/timer-sp.c file? >> >> Why do you initialize sregs_base from timer_init? > > It will be needed before the clocks are initialized. The clock code is > not using it at the moment as I just did a minimal fixed clock > implementation until the clock api and DT clock bindings gets sorted > out. As there are multiple users, I didn't put it in highbank_clocks_init. > >> >>> diff --git a/arch/arm/mach-highbank/include/mach/timex.h b/arch/arm/mach-highbank/include/mach/timex.h >>> new file mode 100644 >>> index 0000000..88dac7a >>> --- /dev/null >>> +++ b/arch/arm/mach-highbank/include/mach/timex.h >>> @@ -0,0 +1,6 @@ >>> +#ifndef __MACH_TIMEX_H >>> +#define __MACH_TIMEX_H >>> + >>> +#define CLOCK_TICK_RATE 1000000 >>> + >>> +#endif >> >> In 3.2, we shouldn't need this any more. We'll have to come up with a >> way to remember removing the new definitions that come in in parallel >> to the patch that removes the old ones. > > I'm tracking the various clean-ups and we can coordinate the order > things go in. I've already made gpio.h empty for example, so gpio will > fail to compile if enabled in this series. > > Or I can just submit a patch deleting this file later. It will just be > dead code and won't conflict. > >> >>> +#ifndef _MACH_HIGHBANK__SYSREGS_H_ >>> +#define _MACH_HIGHBANK__SYSREGS_H_ >>> + >>> +extern void __iomem *sregs_base; >>> + >>> +#define HB_SREG_A9_PWR_REQ 0xf00 >>> +#define HB_SREG_A9_BOOT_STAT 0xf04 >>> +#define HB_SREG_A9_BOOT_DATA 0xf08 >>> + >>> +#define HB_PWR_SUSPEND 0 >>> +#define HB_PWR_SOFT_RESET 1 >>> +#define HB_PWR_HARD_RESET 2 >>> +#define HB_PWR_SHUTDOWN 3 >>> + >>> +#endif >> >> Do these really need to be global? >> >> I think it's better to put the base address and register definitions into a >> single file and export functions to be used from elsewhere. > > Yes, sregs are a random collection of functions, so it's going to be a > mixture of various users. Just HB_PWR_* alone are in 2 or 3 different > places. > > Rob ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-25 2:45 ` Rob Herring @ 2011-08-25 4:03 ` Shawn Guo 2011-08-25 15:59 ` Arnd Bergmann 1 sibling, 0 replies; 53+ messages in thread From: Shawn Guo @ 2011-08-25 4:03 UTC (permalink / raw) To: linux-arm-kernel On Wed, Aug 24, 2011 at 09:45:28PM -0500, Rob Herring wrote: > Arnd, > > On 08/20/2011 01:44 PM, Rob Herring wrote: > > Arnd, > > > > On 08/18/2011 10:34 AM, Arnd Bergmann wrote: > >> On Tuesday 16 August 2011, Rob Herring wrote: > >> > >>> +void __iomem *a9_base_addr = ((void __iomem *)(HB_MPIC_VIRT_BASE)); > >>> +void __iomem *sregs_base; > >>> + > >>> +static struct map_desc highbank_io_desc[] __initdata = { > >>> + { > >>> + .virtual = HB_MPIC_VIRT_BASE, > >>> + .pfn = 0, /* run-time */ > >>> + .length = SZ_4K, > >>> + .type = MT_DEVICE, > >>> + }, > >>> +#ifdef CONFIG_DEBUG_LL > >>> + { > >>> + .virtual = HB_DEBUG_LL_VIRT_BASE, > >>> + .pfn = __phys_to_pfn(HB_DEBUG_LL_PHYS_BASE), > >>> + .length = SZ_4K, > >>> + .type = MT_DEVICE, > >>> + }, > >>> +#endif > >>> +}; > >>> + > >>> +static void __init highbank_map_io(void) > >>> +{ > >>> + unsigned long base; > >>> + > >>> + /* Get SCU base */ > >>> + asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); > >>> + > >>> + highbank_io_desc[0].pfn = __phys_to_pfn(base); > >>> + iotable_init(highbank_io_desc, ARRAY_SIZE(highbank_io_desc)); > >>> +} > >> > >> I really liked the way that Barry moved the io_desc out to the > >> drivers using them, e.g arch/arm/mach-prima2/lluart.c. > >> > >> Can you do the same thing with your lluart and with the a9_base_addr? > >> I guess it can live locally in platsmp.c. > > > > Okay. > > Looking at this some more, it doesn't work too well. platsmp.c depends > on CONFIG_SMP, but the SCU mapping is always needed even for !SMP > because the SCU has a power mode register for each core used by the > power controller. So putting it in platsmp.c would add ifdefs. > It sounds you have a well designed power controller which will shut down different CA-9 power domains per SCU power mode settings, e.g. it will shut off different set of CA-9 power domains for Dormant and Shutdown modes. Is that the case? i.MX6Q is different from that case, so I can actually follow Arnd's suggestion to keep scu_base locally in platsmp.c. -- Regards, Shawn ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-25 2:45 ` Rob Herring 2011-08-25 4:03 ` Shawn Guo @ 2011-08-25 15:59 ` Arnd Bergmann 1 sibling, 0 replies; 53+ messages in thread From: Arnd Bergmann @ 2011-08-25 15:59 UTC (permalink / raw) To: linux-arm-kernel On Thursday 25 August 2011, Rob Herring wrote: > Looking at this some more, it doesn't work too well. platsmp.c depends > on CONFIG_SMP, but the SCU mapping is always needed even for !SMP > because the SCU has a power mode register for each core used by the > power controller. So putting it in platsmp.c would add ifdefs. > > So I'll move out the lluart mapping, but keep SCU mapping in highbank.c. > Ok, makes sense. Another alternative would be to have multiple mappings for this: one local to the platsmp file and another one local to the power management code. However, that is ugly for other reasons. Arnd ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-20 18:44 ` Rob Herring 2011-08-25 2:45 ` Rob Herring @ 2011-08-25 16:02 ` Arnd Bergmann 2011-08-25 18:03 ` Rob Herring 1 sibling, 1 reply; 53+ messages in thread From: Arnd Bergmann @ 2011-08-25 16:02 UTC (permalink / raw) To: linux-arm-kernel On Saturday 20 August 2011, Rob Herring wrote: > >> +#ifndef _MACH_HIGHBANK__SYSREGS_H_ > >> +#define _MACH_HIGHBANK__SYSREGS_H_ > >> + > >> +extern void __iomem *sregs_base; > >> + > >> +#define HB_SREG_A9_PWR_REQ 0xf00 > >> +#define HB_SREG_A9_BOOT_STAT 0xf04 > >> +#define HB_SREG_A9_BOOT_DATA 0xf08 > >> + > >> +#define HB_PWR_SUSPEND 0 > >> +#define HB_PWR_SOFT_RESET 1 > >> +#define HB_PWR_HARD_RESET 2 > >> +#define HB_PWR_SHUTDOWN 3 > >> + > >> +#endif > > > > Do these really need to be global? > > > > I think it's better to put the base address and register definitions into a > > single file and export functions to be used from elsewhere. > > Yes, sregs are a random collection of functions, so it's going to be a > mixture of various users. Just HB_PWR_* alone are in 2 or 3 different > places. Sorry, I'm not following. Do you mean 'yes, they need to be global' or 'yes, it's better to export the functions'? Arnd ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-25 16:02 ` Arnd Bergmann @ 2011-08-25 18:03 ` Rob Herring 2011-08-25 21:44 ` Arnd Bergmann 0 siblings, 1 reply; 53+ messages in thread From: Rob Herring @ 2011-08-25 18:03 UTC (permalink / raw) To: linux-arm-kernel On 08/25/2011 11:02 AM, Arnd Bergmann wrote: > On Saturday 20 August 2011, Rob Herring wrote: >>>> +#ifndef _MACH_HIGHBANK__SYSREGS_H_ >>>> +#define _MACH_HIGHBANK__SYSREGS_H_ >>>> + >>>> +extern void __iomem *sregs_base; >>>> + >>>> +#define HB_SREG_A9_PWR_REQ 0xf00 >>>> +#define HB_SREG_A9_BOOT_STAT 0xf04 >>>> +#define HB_SREG_A9_BOOT_DATA 0xf08 >>>> + >>>> +#define HB_PWR_SUSPEND 0 >>>> +#define HB_PWR_SOFT_RESET 1 >>>> +#define HB_PWR_HARD_RESET 2 >>>> +#define HB_PWR_SHUTDOWN 3 >>>> + >>>> +#endif >>> >>> Do these really need to be global? >>> >>> I think it's better to put the base address and register definitions into a >>> single file and export functions to be used from elsewhere. >> >> Yes, sregs are a random collection of functions, so it's going to be a >> mixture of various users. Just HB_PWR_* alone are in 2 or 3 different >> places. > > Sorry, I'm not following. > > Do you mean 'yes, they need to be global' or 'yes, it's better to export > the functions'? > I meant the former and functions as in h/w functionality, not C functions. This will mainly be clock control plus a few other things. Is it really desired to add another layer here when these are all just single register writes? Rob ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-25 18:03 ` Rob Herring @ 2011-08-25 21:44 ` Arnd Bergmann 0 siblings, 0 replies; 53+ messages in thread From: Arnd Bergmann @ 2011-08-25 21:44 UTC (permalink / raw) To: linux-arm-kernel On Thursday 25 August 2011 13:03:24 Rob Herring wrote: > > > > Do you mean 'yes, they need to be global' or 'yes, it's better to export > > the functions'? > > > > I meant the former and functions as in h/w functionality, not C functions. > > This will mainly be clock control plus a few other things. Is it really > desired to add another layer here when these are all just single > register writes? It really depends on what the registers do, which I haven't seen. My feeling is still that you should have an abstract interface for drivers to use, but if the drivers need to do very little, exporting the symbol for the base address and using it in inline functions from the header could be appropriate. Arnd ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-16 20:34 ` [PATCH 2/6] ARM: add Highbank core platform support Rob Herring ` (2 preceding siblings ...) 2011-08-18 15:34 ` Arnd Bergmann @ 2011-08-19 6:43 ` Shawn Guo 2011-08-19 7:17 ` Shawn Guo 2011-08-19 8:56 ` Dave Martin 2011-08-20 14:48 ` Shawn Guo ` (4 subsequent siblings) 8 siblings, 2 replies; 53+ messages in thread From: Shawn Guo @ 2011-08-19 6:43 UTC (permalink / raw) To: linux-arm-kernel On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: > From: Rob Herring <rob.herring@calxeda.com> > > This adds basic support for the Calxeda Highbank platform. > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > --- > arch/arm/Kconfig | 17 ++ > arch/arm/Makefile | 1 + > arch/arm/mach-highbank/Makefile | 1 + > arch/arm/mach-highbank/Makefile.boot | 1 + > arch/arm/mach-highbank/clock.c | 63 ++++++++ > arch/arm/mach-highbank/core.h | 3 + > arch/arm/mach-highbank/highbank.c | 164 +++++++++++++++++++++ > arch/arm/mach-highbank/include/mach/debug-macro.S | 20 +++ > arch/arm/mach-highbank/include/mach/entry-macro.S | 9 + > arch/arm/mach-highbank/include/mach/gpio.h | 1 + > arch/arm/mach-highbank/include/mach/io.h | 8 + > arch/arm/mach-highbank/include/mach/irqs.h | 6 + > arch/arm/mach-highbank/include/mach/memory.h | 1 + > arch/arm/mach-highbank/include/mach/system.h | 26 ++++ > arch/arm/mach-highbank/include/mach/timex.h | 6 + > arch/arm/mach-highbank/include/mach/uncompress.h | 9 + > arch/arm/mach-highbank/include/mach/vmalloc.h | 6 + > arch/arm/mach-highbank/sysregs.h | 30 ++++ > arch/arm/mach-highbank/system.c | 33 ++++ > arch/arm/mm/Kconfig | 2 +- > 20 files changed, 406 insertions(+), 1 deletions(-) > create mode 100644 arch/arm/mach-highbank/Makefile > create mode 100644 arch/arm/mach-highbank/Makefile.boot > create mode 100644 arch/arm/mach-highbank/clock.c > create mode 100644 arch/arm/mach-highbank/core.h > create mode 100644 arch/arm/mach-highbank/highbank.c > create mode 100644 arch/arm/mach-highbank/include/mach/debug-macro.S > create mode 100644 arch/arm/mach-highbank/include/mach/entry-macro.S > create mode 100644 arch/arm/mach-highbank/include/mach/gpio.h > create mode 100644 arch/arm/mach-highbank/include/mach/io.h > create mode 100644 arch/arm/mach-highbank/include/mach/irqs.h > create mode 100644 arch/arm/mach-highbank/include/mach/memory.h > create mode 100644 arch/arm/mach-highbank/include/mach/system.h > create mode 100644 arch/arm/mach-highbank/include/mach/timex.h > create mode 100644 arch/arm/mach-highbank/include/mach/uncompress.h > create mode 100644 arch/arm/mach-highbank/include/mach/vmalloc.h > create mode 100644 arch/arm/mach-highbank/sysregs.h > create mode 100644 arch/arm/mach-highbank/system.c > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index 5ebc5d9..eecee3d 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -318,6 +318,23 @@ config ARCH_BCMRING > help > Support for Broadcom's BCMRing platform. > > +config ARCH_HIGHBANK > + bool "Calxeda Highbank-based" > + select CPU_V7 > + select AUTO_ZRELADDR > + select ARM_PATCH_PHYS_VIRT > + select ARM_GIC > + select HAVE_ARM_SCU > + select ARM_AMBA > + select ARM_TIMER_SP804 > + select PL330 > + select CLKDEV_LOOKUP > + select GENERIC_CLOCKEVENTS > + select USE_OF > + select ARCH_WANT_OPTIONAL_GPIOLIB > + help > + Support for the Calxeda Highbank SoC based boards. > + > config ARCH_CLPS711X > bool "Cirrus Logic CLPS711x/EP721x-based" > select CPU_ARM720T > diff --git a/arch/arm/Makefile b/arch/arm/Makefile > index 70c424e..451097e 100644 > --- a/arch/arm/Makefile > +++ b/arch/arm/Makefile > @@ -141,6 +141,7 @@ machine-$(CONFIG_ARCH_EBSA110) := ebsa110 > machine-$(CONFIG_ARCH_EP93XX) := ep93xx > machine-$(CONFIG_ARCH_GEMINI) := gemini > machine-$(CONFIG_ARCH_H720X) := h720x > +machine-$(CONFIG_ARCH_HIGHBANK) := highbank > machine-$(CONFIG_ARCH_INTEGRATOR) := integrator > machine-$(CONFIG_ARCH_IOP13XX) := iop13xx > machine-$(CONFIG_ARCH_IOP32X) := iop32x > diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile > new file mode 100644 > index 0000000..b5de3b9 > --- /dev/null > +++ b/arch/arm/mach-highbank/Makefile > @@ -0,0 +1 @@ > +obj-y := clock.o highbank.o system.o > diff --git a/arch/arm/mach-highbank/Makefile.boot b/arch/arm/mach-highbank/Makefile.boot > new file mode 100644 > index 0000000..dae9661 > --- /dev/null > +++ b/arch/arm/mach-highbank/Makefile.boot > @@ -0,0 +1 @@ > +zreladdr-y := 0x00008000 > diff --git a/arch/arm/mach-highbank/clock.c b/arch/arm/mach-highbank/clock.c > new file mode 100644 > index 0000000..8464e14 > --- /dev/null > +++ b/arch/arm/mach-highbank/clock.c > @@ -0,0 +1,63 @@ > +/* > + * Copyright 2011 Calxeda, Inc. > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms and conditions of the GNU General Public License, > + * version 2, as published by the Free Software Foundation. > + * > + * This program is distributed in the hope it will be useful, but WITHOUT > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for > + * more details. > + * > + * You should have received a copy of the GNU General Public License along with > + * this program. If not, see <http://www.gnu.org/licenses/>. > + */ > +#include <linux/module.h> > +#include <linux/kernel.h> > +#include <linux/errno.h> > +#include <linux/clk.h> > +#include <linux/clkdev.h> > + > + > +struct clk { > + unsigned long rate; > +}; > + > +int clk_enable(struct clk *clk) > +{ > + return 0; > +} > + > +void clk_disable(struct clk *clk) > +{} > + > +unsigned long clk_get_rate(struct clk *clk) > +{ > + return clk->rate; > +} > + > +long clk_round_rate(struct clk *clk, unsigned long rate) > +{ > + return clk->rate; > +} > + > +int clk_set_rate(struct clk *clk, unsigned long rate) > +{ > + return 0; > +} > + > +static struct clk eclk = { .rate = 200000000 }; > +static struct clk pclk = { .rate = 150000000 }; > + > +static struct clk_lookup lookups[] = { > + { .clk = &pclk, .con_id = "apb_pclk", }, > + { .clk = &pclk, .dev_id = "sp804", }, > + { .clk = &eclk, .dev_id = "ffe0e000.sdhci", }, > + { .clk = &pclk, .dev_id = "fff36000.serial", }, > +}; > + > +void __init highbank_clocks_init(void) > +{ > + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); > +} > diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h > new file mode 100644 > index 0000000..b5aa45f > --- /dev/null > +++ b/arch/arm/mach-highbank/core.h > @@ -0,0 +1,3 @@ > +extern void highbank_set_cpu_jump(int cpu, void *jump_addr); > +extern void __iomem *a9_base_addr; > +extern void highbank_clocks_init(void); > diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c > new file mode 100644 > index 0000000..49bbd13 > --- /dev/null > +++ b/arch/arm/mach-highbank/highbank.c > @@ -0,0 +1,164 @@ > +/* > + * Copyright 2010-2011 Calxeda, Inc. > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms and conditions of the GNU General Public License, > + * version 2, as published by the Free Software Foundation. > + * > + * This program is distributed in the hope it will be useful, but WITHOUT > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for > + * more details. > + * > + * You should have received a copy of the GNU General Public License along with > + * this program. If not, see <http://www.gnu.org/licenses/>. > + */ > +#include <linux/clk.h> > +#include <linux/clkdev.h> > +#include <linux/irq.h> > +#include <linux/irqdomain.h> > +#include <linux/of.h> > +#include <linux/of_irq.h> > +#include <linux/of_platform.h> > +#include <linux/of_address.h> > + > +#include <asm/cacheflush.h> > +#include <asm/unified.h> > +#include <asm/smp_scu.h> > +#include <asm/hardware/arm_timer.h> > +#include <asm/hardware/timer-sp.h> > +#include <asm/hardware/gic.h> > +#include <asm/hardware/cache-l2x0.h> > +#include <asm/mach/arch.h> > +#include <asm/mach/map.h> > +#include <asm/mach/time.h> > +#include <mach/irqs.h> > + > +#include "core.h" > +#include "sysregs.h" > + > +#define HB_DEBUG_LL_PHYS_BASE 0xfff36000 > + > +/* Static virtual mappings */ > +#define HB_DEBUG_LL_VIRT_BASE 0xfee36000 > +#define HB_MPIC_VIRT_BASE 0xfee00000 > + > +void __iomem *a9_base_addr = ((void __iomem *)(HB_MPIC_VIRT_BASE)); > +void __iomem *sregs_base; > + > +static struct map_desc highbank_io_desc[] __initdata = { > + { > + .virtual = HB_MPIC_VIRT_BASE, > + .pfn = 0, /* run-time */ > + .length = SZ_4K, > + .type = MT_DEVICE, > + }, > +#ifdef CONFIG_DEBUG_LL > + { > + .virtual = HB_DEBUG_LL_VIRT_BASE, > + .pfn = __phys_to_pfn(HB_DEBUG_LL_PHYS_BASE), > + .length = SZ_4K, > + .type = MT_DEVICE, > + }, > +#endif > +}; > + > +static void __init highbank_map_io(void) > +{ > + unsigned long base; > + > + /* Get SCU base */ > + asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); > + > + highbank_io_desc[0].pfn = __phys_to_pfn(base); > + iotable_init(highbank_io_desc, ARRAY_SIZE(highbank_io_desc)); > +} > + It's a great demo that we can get this base address from CA9 itself. However I'm wondering if we have to do so, since this address should be known for given SoC. Can we put this known base into device tree and map it when needed? In that case, we can save another static mapping. -- Regards, Shawn ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-19 6:43 ` Shawn Guo @ 2011-08-19 7:17 ` Shawn Guo 2011-08-20 18:16 ` Rob Herring 2011-08-19 8:56 ` Dave Martin 1 sibling, 1 reply; 53+ messages in thread From: Shawn Guo @ 2011-08-19 7:17 UTC (permalink / raw) To: linux-arm-kernel On Fri, Aug 19, 2011 at 02:43:57PM +0800, Shawn Guo wrote: > On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: > > From: Rob Herring <rob.herring@calxeda.com> > > > > This adds basic support for the Calxeda Highbank platform. > > > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> [...] > > +static void __init highbank_map_io(void) > > +{ > > + unsigned long base; > > + > > + /* Get SCU base */ > > + asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); > > + > > + highbank_io_desc[0].pfn = __phys_to_pfn(base); > > + iotable_init(highbank_io_desc, ARRAY_SIZE(highbank_io_desc)); > > +} > > + > It's a great demo that we can get this base address from CA9 itself. > However I'm wondering if we have to do so, since this address should > be known for given SoC. Can we put this known base into device tree > and map it when needed? In that case, we can save another static > mapping. > Hmm, if CA9 can figure this address out by itself, why do not we create a init hook in arch/arm/kernel/smp_scu.c to have scu code to get and map the address? Then the parameter "scu_base" in those scu helper functions can be saved. -- Regards, Shawn ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-19 7:17 ` Shawn Guo @ 2011-08-20 18:16 ` Rob Herring 0 siblings, 0 replies; 53+ messages in thread From: Rob Herring @ 2011-08-20 18:16 UTC (permalink / raw) To: linux-arm-kernel On 08/19/2011 02:17 AM, Shawn Guo wrote: > On Fri, Aug 19, 2011 at 02:43:57PM +0800, Shawn Guo wrote: >> On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: >>> From: Rob Herring <rob.herring@calxeda.com> >>> >>> This adds basic support for the Calxeda Highbank platform. >>> >>> Signed-off-by: Rob Herring <rob.herring@calxeda.com> > [...] >>> +static void __init highbank_map_io(void) >>> +{ >>> + unsigned long base; >>> + >>> + /* Get SCU base */ >>> + asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); >>> + >>> + highbank_io_desc[0].pfn = __phys_to_pfn(base); >>> + iotable_init(highbank_io_desc, ARRAY_SIZE(highbank_io_desc)); >>> +} >>> + >> It's a great demo that we can get this base address from CA9 itself. >> However I'm wondering if we have to do so, since this address should >> be known for given SoC. Can we put this known base into device tree >> and map it when needed? In that case, we can save another static >> mapping. >> > Hmm, if CA9 can figure this address out by itself, why do not we create > a init hook in arch/arm/kernel/smp_scu.c to have scu code to get and > map the address? Then the parameter "scu_base" in those scu helper > functions can be saved. > smp_scu.c is not CA9 only and this is a CA9 specific feature. Also, you have to statically map the scu to get the core count. ioremap is not up at that point in time. Don't be fooled by omap code either. They do an ioremap, but it handles their static mappings as well. Rob ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-19 6:43 ` Shawn Guo 2011-08-19 7:17 ` Shawn Guo @ 2011-08-19 8:56 ` Dave Martin 2011-08-19 13:45 ` Arnd Bergmann 1 sibling, 1 reply; 53+ messages in thread From: Dave Martin @ 2011-08-19 8:56 UTC (permalink / raw) To: linux-arm-kernel On Fri, Aug 19, 2011 at 02:43:57PM +0800, Shawn Guo wrote: > On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: > > From: Rob Herring <rob.herring@calxeda.com> > > > > This adds basic support for the Calxeda Highbank platform. > > > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > > --- > > arch/arm/Kconfig | 17 ++ > > arch/arm/Makefile | 1 + > > arch/arm/mach-highbank/Makefile | 1 + > > arch/arm/mach-highbank/Makefile.boot | 1 + > > arch/arm/mach-highbank/clock.c | 63 ++++++++ > > arch/arm/mach-highbank/core.h | 3 + > > arch/arm/mach-highbank/highbank.c | 164 +++++++++++++++++++++ > > arch/arm/mach-highbank/include/mach/debug-macro.S | 20 +++ > > arch/arm/mach-highbank/include/mach/entry-macro.S | 9 + > > arch/arm/mach-highbank/include/mach/gpio.h | 1 + > > arch/arm/mach-highbank/include/mach/io.h | 8 + > > arch/arm/mach-highbank/include/mach/irqs.h | 6 + > > arch/arm/mach-highbank/include/mach/memory.h | 1 + > > arch/arm/mach-highbank/include/mach/system.h | 26 ++++ > > arch/arm/mach-highbank/include/mach/timex.h | 6 + > > arch/arm/mach-highbank/include/mach/uncompress.h | 9 + > > arch/arm/mach-highbank/include/mach/vmalloc.h | 6 + > > arch/arm/mach-highbank/sysregs.h | 30 ++++ > > arch/arm/mach-highbank/system.c | 33 ++++ > > arch/arm/mm/Kconfig | 2 +- > > 20 files changed, 406 insertions(+), 1 deletions(-) > > create mode 100644 arch/arm/mach-highbank/Makefile > > create mode 100644 arch/arm/mach-highbank/Makefile.boot > > create mode 100644 arch/arm/mach-highbank/clock.c > > create mode 100644 arch/arm/mach-highbank/core.h > > create mode 100644 arch/arm/mach-highbank/highbank.c > > create mode 100644 arch/arm/mach-highbank/include/mach/debug-macro.S > > create mode 100644 arch/arm/mach-highbank/include/mach/entry-macro.S > > create mode 100644 arch/arm/mach-highbank/include/mach/gpio.h > > create mode 100644 arch/arm/mach-highbank/include/mach/io.h > > create mode 100644 arch/arm/mach-highbank/include/mach/irqs.h > > create mode 100644 arch/arm/mach-highbank/include/mach/memory.h > > create mode 100644 arch/arm/mach-highbank/include/mach/system.h > > create mode 100644 arch/arm/mach-highbank/include/mach/timex.h > > create mode 100644 arch/arm/mach-highbank/include/mach/uncompress.h > > create mode 100644 arch/arm/mach-highbank/include/mach/vmalloc.h > > create mode 100644 arch/arm/mach-highbank/sysregs.h > > create mode 100644 arch/arm/mach-highbank/system.c > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > > index 5ebc5d9..eecee3d 100644 > > --- a/arch/arm/Kconfig > > +++ b/arch/arm/Kconfig > > @@ -318,6 +318,23 @@ config ARCH_BCMRING > > help > > Support for Broadcom's BCMRing platform. > > > > +config ARCH_HIGHBANK > > + bool "Calxeda Highbank-based" > > + select CPU_V7 > > + select AUTO_ZRELADDR > > + select ARM_PATCH_PHYS_VIRT > > + select ARM_GIC > > + select HAVE_ARM_SCU > > + select ARM_AMBA > > + select ARM_TIMER_SP804 > > + select PL330 > > + select CLKDEV_LOOKUP > > + select GENERIC_CLOCKEVENTS > > + select USE_OF > > + select ARCH_WANT_OPTIONAL_GPIOLIB > > + help > > + Support for the Calxeda Highbank SoC based boards. > > + > > config ARCH_CLPS711X > > bool "Cirrus Logic CLPS711x/EP721x-based" > > select CPU_ARM720T > > diff --git a/arch/arm/Makefile b/arch/arm/Makefile > > index 70c424e..451097e 100644 > > --- a/arch/arm/Makefile > > +++ b/arch/arm/Makefile > > @@ -141,6 +141,7 @@ machine-$(CONFIG_ARCH_EBSA110) := ebsa110 > > machine-$(CONFIG_ARCH_EP93XX) := ep93xx > > machine-$(CONFIG_ARCH_GEMINI) := gemini > > machine-$(CONFIG_ARCH_H720X) := h720x > > +machine-$(CONFIG_ARCH_HIGHBANK) := highbank > > machine-$(CONFIG_ARCH_INTEGRATOR) := integrator > > machine-$(CONFIG_ARCH_IOP13XX) := iop13xx > > machine-$(CONFIG_ARCH_IOP32X) := iop32x > > diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile > > new file mode 100644 > > index 0000000..b5de3b9 > > --- /dev/null > > +++ b/arch/arm/mach-highbank/Makefile > > @@ -0,0 +1 @@ > > +obj-y := clock.o highbank.o system.o > > diff --git a/arch/arm/mach-highbank/Makefile.boot b/arch/arm/mach-highbank/Makefile.boot > > new file mode 100644 > > index 0000000..dae9661 > > --- /dev/null > > +++ b/arch/arm/mach-highbank/Makefile.boot > > @@ -0,0 +1 @@ > > +zreladdr-y := 0x00008000 > > diff --git a/arch/arm/mach-highbank/clock.c b/arch/arm/mach-highbank/clock.c > > new file mode 100644 > > index 0000000..8464e14 > > --- /dev/null > > +++ b/arch/arm/mach-highbank/clock.c > > @@ -0,0 +1,63 @@ > > +/* > > + * Copyright 2011 Calxeda, Inc. > > + * > > + * This program is free software; you can redistribute it and/or modify it > > + * under the terms and conditions of the GNU General Public License, > > + * version 2, as published by the Free Software Foundation. > > + * > > + * This program is distributed in the hope it will be useful, but WITHOUT > > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for > > + * more details. > > + * > > + * You should have received a copy of the GNU General Public License along with > > + * this program. If not, see <http://www.gnu.org/licenses/>. > > + */ > > +#include <linux/module.h> > > +#include <linux/kernel.h> > > +#include <linux/errno.h> > > +#include <linux/clk.h> > > +#include <linux/clkdev.h> > > + > > + > > +struct clk { > > + unsigned long rate; > > +}; > > + > > +int clk_enable(struct clk *clk) > > +{ > > + return 0; > > +} > > + > > +void clk_disable(struct clk *clk) > > +{} > > + > > +unsigned long clk_get_rate(struct clk *clk) > > +{ > > + return clk->rate; > > +} > > + > > +long clk_round_rate(struct clk *clk, unsigned long rate) > > +{ > > + return clk->rate; > > +} > > + > > +int clk_set_rate(struct clk *clk, unsigned long rate) > > +{ > > + return 0; > > +} > > + > > +static struct clk eclk = { .rate = 200000000 }; > > +static struct clk pclk = { .rate = 150000000 }; > > + > > +static struct clk_lookup lookups[] = { > > + { .clk = &pclk, .con_id = "apb_pclk", }, > > + { .clk = &pclk, .dev_id = "sp804", }, > > + { .clk = &eclk, .dev_id = "ffe0e000.sdhci", }, > > + { .clk = &pclk, .dev_id = "fff36000.serial", }, > > +}; > > + > > +void __init highbank_clocks_init(void) > > +{ > > + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); > > +} > > diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h > > new file mode 100644 > > index 0000000..b5aa45f > > --- /dev/null > > +++ b/arch/arm/mach-highbank/core.h > > @@ -0,0 +1,3 @@ > > +extern void highbank_set_cpu_jump(int cpu, void *jump_addr); > > +extern void __iomem *a9_base_addr; > > +extern void highbank_clocks_init(void); > > diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c > > new file mode 100644 > > index 0000000..49bbd13 > > --- /dev/null > > +++ b/arch/arm/mach-highbank/highbank.c > > @@ -0,0 +1,164 @@ > > +/* > > + * Copyright 2010-2011 Calxeda, Inc. > > + * > > + * This program is free software; you can redistribute it and/or modify it > > + * under the terms and conditions of the GNU General Public License, > > + * version 2, as published by the Free Software Foundation. > > + * > > + * This program is distributed in the hope it will be useful, but WITHOUT > > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for > > + * more details. > > + * > > + * You should have received a copy of the GNU General Public License along with > > + * this program. If not, see <http://www.gnu.org/licenses/>. > > + */ > > +#include <linux/clk.h> > > +#include <linux/clkdev.h> > > +#include <linux/irq.h> > > +#include <linux/irqdomain.h> > > +#include <linux/of.h> > > +#include <linux/of_irq.h> > > +#include <linux/of_platform.h> > > +#include <linux/of_address.h> > > + > > +#include <asm/cacheflush.h> > > +#include <asm/unified.h> > > +#include <asm/smp_scu.h> > > +#include <asm/hardware/arm_timer.h> > > +#include <asm/hardware/timer-sp.h> > > +#include <asm/hardware/gic.h> > > +#include <asm/hardware/cache-l2x0.h> > > +#include <asm/mach/arch.h> > > +#include <asm/mach/map.h> > > +#include <asm/mach/time.h> > > +#include <mach/irqs.h> > > + > > +#include "core.h" > > +#include "sysregs.h" > > + > > +#define HB_DEBUG_LL_PHYS_BASE 0xfff36000 > > + > > +/* Static virtual mappings */ > > +#define HB_DEBUG_LL_VIRT_BASE 0xfee36000 > > +#define HB_MPIC_VIRT_BASE 0xfee00000 > > + > > +void __iomem *a9_base_addr = ((void __iomem *)(HB_MPIC_VIRT_BASE)); > > +void __iomem *sregs_base; > > + > > +static struct map_desc highbank_io_desc[] __initdata = { > > + { > > + .virtual = HB_MPIC_VIRT_BASE, > > + .pfn = 0, /* run-time */ > > + .length = SZ_4K, > > + .type = MT_DEVICE, > > + }, > > +#ifdef CONFIG_DEBUG_LL > > + { > > + .virtual = HB_DEBUG_LL_VIRT_BASE, > > + .pfn = __phys_to_pfn(HB_DEBUG_LL_PHYS_BASE), > > + .length = SZ_4K, > > + .type = MT_DEVICE, > > + }, > > +#endif > > +}; > > + > > +static void __init highbank_map_io(void) > > +{ > > + unsigned long base; > > + > > + /* Get SCU base */ > > + asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); > > + > > + highbank_io_desc[0].pfn = __phys_to_pfn(base); > > + iotable_init(highbank_io_desc, ARRAY_SIZE(highbank_io_desc)); > > +} > > + > It's a great demo that we can get this base address from CA9 itself. > However I'm wondering if we have to do so, since this address should > be known for given SoC. Can we put this known base into device tree > and map it when needed? In that case, we can save another static > mapping. Since device tree is mainly about providing data to describe system components that are not discoverable, maybe it is better after all not to put this address in the device tree. Discovery feels like the best approach, where possible. ---Dave ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-19 8:56 ` Dave Martin @ 2011-08-19 13:45 ` Arnd Bergmann 0 siblings, 0 replies; 53+ messages in thread From: Arnd Bergmann @ 2011-08-19 13:45 UTC (permalink / raw) To: linux-arm-kernel On Friday 19 August 2011, Dave Martin wrote: > > > +static void __init highbank_map_io(void) > > > +{ > > > + unsigned long base; > > > + > > > + /* Get SCU base */ > > > + asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); > > > + > > > + highbank_io_desc[0].pfn = __phys_to_pfn(base); > > > + iotable_init(highbank_io_desc, ARRAY_SIZE(highbank_io_desc)); > > > +} > > > + > > It's a great demo that we can get this base address from CA9 itself. > > However I'm wondering if we have to do so, since this address should > > be known for given SoC. Can we put this known base into device tree > > and map it when needed? In that case, we can save another static > > mapping. > > Since device tree is mainly about providing data to describe system > components that are not discoverable, maybe it is better after all > not to put this address in the device tree. > > Discovery feels like the best approach, where possible. It's a bit silly to leave it out of the device tree when you otherwise describe all major components. However, I agree that if you can probe the value from hardware, there is no need to read it from there. Arnd ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-16 20:34 ` [PATCH 2/6] ARM: add Highbank core platform support Rob Herring ` (3 preceding siblings ...) 2011-08-19 6:43 ` Shawn Guo @ 2011-08-20 14:48 ` Shawn Guo 2011-08-20 18:21 ` Rob Herring 2011-08-20 15:54 ` Shawn Guo ` (3 subsequent siblings) 8 siblings, 1 reply; 53+ messages in thread From: Shawn Guo @ 2011-08-20 14:48 UTC (permalink / raw) To: linux-arm-kernel On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: > From: Rob Herring <rob.herring@calxeda.com> > > This adds basic support for the Calxeda Highbank platform. > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > --- [...] > +void highbank_init_irq(void) > +{ > + struct device_node *node; > + struct of_intc_desc desc; > + int n = 0; > + > + memset(&desc, 0, sizeof(desc)); > + desc.controller = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic"); > + gic_of_init(&desc); > + node = desc.controller; > + for_each_child_of_node(node, desc.controller) { > + gic_of_ppi_init(&desc); > + } > + > + for_each_compatible_node(node, NULL, "arm,pl061") { > + irq_domain_add_simple(node, 160 + (8 * n)); > + n++; > + } > + 160, magic number? I guess it's the GIC IRQ number has been discovered in gic_dist_init(). I'm not sure if we should simply define a macro for it or manage to retrieve it from GIC. > +#ifdef CONFIG_CACHE_L2X0 > + l2x0_of_init(0, ~0UL); > +#endif > +} > + -- Regards, Shawn ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-20 14:48 ` Shawn Guo @ 2011-08-20 18:21 ` Rob Herring 0 siblings, 0 replies; 53+ messages in thread From: Rob Herring @ 2011-08-20 18:21 UTC (permalink / raw) To: linux-arm-kernel On 08/20/2011 09:48 AM, Shawn Guo wrote: > On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: >> From: Rob Herring <rob.herring@calxeda.com> >> >> This adds basic support for the Calxeda Highbank platform. >> >> Signed-off-by: Rob Herring <rob.herring@calxeda.com> >> --- > [...] >> +void highbank_init_irq(void) >> +{ >> + struct device_node *node; >> + struct of_intc_desc desc; >> + int n = 0; >> + >> + memset(&desc, 0, sizeof(desc)); >> + desc.controller = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic"); >> + gic_of_init(&desc); >> + node = desc.controller; >> + for_each_child_of_node(node, desc.controller) { >> + gic_of_ppi_init(&desc); >> + } >> + >> + for_each_compatible_node(node, NULL, "arm,pl061") { >> + irq_domain_add_simple(node, 160 + (8 * n)); >> + n++; >> + } >> + > 160, magic number? I guess it's the GIC IRQ number has been > discovered in gic_dist_init(). I'm not sure if we should simply > define a macro for it or manage to retrieve it from GIC. It's the number of GIC irqs. This is temporary until we have dynamic assignment of linux irq numbers. Rob ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-16 20:34 ` [PATCH 2/6] ARM: add Highbank core platform support Rob Herring ` (4 preceding siblings ...) 2011-08-20 14:48 ` Shawn Guo @ 2011-08-20 15:54 ` Shawn Guo 2011-08-20 16:10 ` Shawn Guo ` (2 subsequent siblings) 8 siblings, 0 replies; 53+ messages in thread From: Shawn Guo @ 2011-08-20 15:54 UTC (permalink / raw) To: linux-arm-kernel On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: > From: Rob Herring <rob.herring@calxeda.com> > > This adds basic support for the Calxeda Highbank platform. > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > --- [...] > + > +void highbank_init_irq(void) > +{ > + struct device_node *node; > + struct of_intc_desc desc; > + int n = 0; > + > + memset(&desc, 0, sizeof(desc)); > + desc.controller = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic"); > + gic_of_init(&desc); > + node = desc.controller; > + for_each_child_of_node(node, desc.controller) { > + gic_of_ppi_init(&desc); > + } > + > + for_each_compatible_node(node, NULL, "arm,pl061") { > + irq_domain_add_simple(node, 160 + (8 * n)); > + n++; > + } > + > +#ifdef CONFIG_CACHE_L2X0 > + l2x0_of_init(0, ~0UL); > +#endif Would it be good to create a l2x0_of_init() in cache-l2x0.h to git rid of this #ifdef? -- Regards, Shawn ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-16 20:34 ` [PATCH 2/6] ARM: add Highbank core platform support Rob Herring ` (5 preceding siblings ...) 2011-08-20 15:54 ` Shawn Guo @ 2011-08-20 16:10 ` Shawn Guo 2011-08-20 18:22 ` Rob Herring 2011-08-22 5:55 ` Shawn Guo 2011-08-22 8:35 ` Shawn Guo 8 siblings, 1 reply; 53+ messages in thread From: Shawn Guo @ 2011-08-20 16:10 UTC (permalink / raw) To: linux-arm-kernel On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: > From: Rob Herring <rob.herring@calxeda.com> > > This adds basic support for the Calxeda Highbank platform. > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > --- [...] > +DT_MACHINE_START(HIGHBANK, "Highbank") > + .map_io = highbank_map_io, > + .init_irq = highbank_init_irq, > + .nr_irqs = NR_IRQS, Is it really needed? > + .timer = &highbank_timer, > + .init_machine = highbank_init, > + .dt_compat = highbank_match, > +MACHINE_END -- Regards, Shawn ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-20 16:10 ` Shawn Guo @ 2011-08-20 18:22 ` Rob Herring 0 siblings, 0 replies; 53+ messages in thread From: Rob Herring @ 2011-08-20 18:22 UTC (permalink / raw) To: linux-arm-kernel On 08/20/2011 11:10 AM, Shawn Guo wrote: > On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: >> From: Rob Herring <rob.herring@calxeda.com> >> >> This adds basic support for the Calxeda Highbank platform. >> >> Signed-off-by: Rob Herring <rob.herring@calxeda.com> >> --- > [...] >> +DT_MACHINE_START(HIGHBANK, "Highbank") >> + .map_io = highbank_map_io, >> + .init_irq = highbank_init_irq, >> + .nr_irqs = NR_IRQS, > > Is it really needed? For single kernel binary, yes. See Nicolas Pitre's task list for mach/irqs.h. Rob > >> + .timer = &highbank_timer, >> + .init_machine = highbank_init, >> + .dt_compat = highbank_match, >> +MACHINE_END > ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-16 20:34 ` [PATCH 2/6] ARM: add Highbank core platform support Rob Herring ` (6 preceding siblings ...) 2011-08-20 16:10 ` Shawn Guo @ 2011-08-22 5:55 ` Shawn Guo 2011-08-22 10:01 ` Jamie Iles 2011-08-22 8:35 ` Shawn Guo 8 siblings, 1 reply; 53+ messages in thread From: Shawn Guo @ 2011-08-22 5:55 UTC (permalink / raw) To: linux-arm-kernel On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: > From: Rob Herring <rob.herring@calxeda.com> > > This adds basic support for the Calxeda Highbank platform. > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > --- [...] > diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S > new file mode 100644 > index 0000000..56be409 > --- /dev/null > +++ b/arch/arm/mach-highbank/include/mach/entry-macro.S > @@ -0,0 +1,9 @@ > +#include <asm/hardware/gic.h> > +#include <asm/hardware/entry-macro-gic.S> It seems that the second file already includes the first one. > + > + .macro disable_fiq > + .endm > + > + .macro arch_ret_to_user, tmp1, tmp2 > + .endm > + -- Regards, Shawn ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-22 5:55 ` Shawn Guo @ 2011-08-22 10:01 ` Jamie Iles 2011-08-23 3:33 ` Shawn Guo 0 siblings, 1 reply; 53+ messages in thread From: Jamie Iles @ 2011-08-22 10:01 UTC (permalink / raw) To: linux-arm-kernel Hi Shawn, On Mon, Aug 22, 2011 at 01:55:36PM +0800, Shawn Guo wrote: > On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: > > From: Rob Herring <rob.herring@calxeda.com> > > > > This adds basic support for the Calxeda Highbank platform. > > > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > > --- > [...] > > diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S > > new file mode 100644 > > index 0000000..56be409 > > --- /dev/null > > +++ b/arch/arm/mach-highbank/include/mach/entry-macro.S > > @@ -0,0 +1,9 @@ > > +#include <asm/hardware/gic.h> > > +#include <asm/hardware/entry-macro-gic.S> > > It seems that the second file already includes the first one. It's preferred to use explicit includes. From Documentation/SubmitChecklist: 1: If you use a facility then #include the file that defines/declares that facility. Don't depend on other header files pulling in ones that you use. Jamie ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-22 10:01 ` Jamie Iles @ 2011-08-23 3:33 ` Shawn Guo 0 siblings, 0 replies; 53+ messages in thread From: Shawn Guo @ 2011-08-23 3:33 UTC (permalink / raw) To: linux-arm-kernel Hi Jamie, On Mon, Aug 22, 2011 at 11:01:22AM +0100, Jamie Iles wrote: > Hi Shawn, > > On Mon, Aug 22, 2011 at 01:55:36PM +0800, Shawn Guo wrote: > > On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: > > > From: Rob Herring <rob.herring@calxeda.com> > > > > > > This adds basic support for the Calxeda Highbank platform. > > > > > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > > > --- > > [...] > > > diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S > > > new file mode 100644 > > > index 0000000..56be409 > > > --- /dev/null > > > +++ b/arch/arm/mach-highbank/include/mach/entry-macro.S > > > @@ -0,0 +1,9 @@ > > > +#include <asm/hardware/gic.h> > > > +#include <asm/hardware/entry-macro-gic.S> > > > > It seems that the second file already includes the first one. > > It's preferred to use explicit includes. From > Documentation/SubmitChecklist: > > 1: If you use a facility then #include the file that > defines/declares that facility. Don't depend on other header > files pulling in ones that you use. > We should not include it even with above point, because we do not have anything in entry-macro.S requiring gic.h. -- Regards, Shawn ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-16 20:34 ` [PATCH 2/6] ARM: add Highbank core platform support Rob Herring ` (7 preceding siblings ...) 2011-08-22 5:55 ` Shawn Guo @ 2011-08-22 8:35 ` Shawn Guo 2011-08-22 9:15 ` Shawn Guo 2011-08-22 13:23 ` Rob Herring 8 siblings, 2 replies; 53+ messages in thread From: Shawn Guo @ 2011-08-22 8:35 UTC (permalink / raw) To: linux-arm-kernel On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: > From: Rob Herring <rob.herring@calxeda.com> > > This adds basic support for the Calxeda Highbank platform. > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > --- [...] > +void highbank_init_irq(void) > +{ > + struct device_node *node; > + struct of_intc_desc desc; > + int n = 0; > + > + memset(&desc, 0, sizeof(desc)); > + desc.controller = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic"); > + gic_of_init(&desc); > + node = desc.controller; > + for_each_child_of_node(node, desc.controller) { > + gic_of_ppi_init(&desc); > + } > + I failed to find the implementation of gic_of_ppi_init() in your patch series below. [RFC PATCH 0/3] Yet another GIC OF binding series Also one nit: the braces seem redundant. -- Regards, Shawn ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-22 8:35 ` Shawn Guo @ 2011-08-22 9:15 ` Shawn Guo 2011-08-22 13:23 ` Rob Herring 1 sibling, 0 replies; 53+ messages in thread From: Shawn Guo @ 2011-08-22 9:15 UTC (permalink / raw) To: linux-arm-kernel On Mon, Aug 22, 2011 at 04:35:26PM +0800, Shawn Guo wrote: > On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: > > From: Rob Herring <rob.herring@calxeda.com> > > > > This adds basic support for the Calxeda Highbank platform. > > > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > > --- > [...] > > +void highbank_init_irq(void) > > +{ > > + struct device_node *node; > > + struct of_intc_desc desc; > > + int n = 0; > > + > > + memset(&desc, 0, sizeof(desc)); > > + desc.controller = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic"); > > + gic_of_init(&desc); > > + node = desc.controller; > > + for_each_child_of_node(node, desc.controller) { > > + gic_of_ppi_init(&desc); > > + } > > + > I failed to find the implementation of gic_of_ppi_init() in your patch > series below. > > [RFC PATCH 0/3] Yet another GIC OF binding series > I just found it in another private post you made to Marc. (Marc made it public with his reply) > Also one nit: the braces seem redundant. > -- Regards, Shawn ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 2/6] ARM: add Highbank core platform support 2011-08-22 8:35 ` Shawn Guo 2011-08-22 9:15 ` Shawn Guo @ 2011-08-22 13:23 ` Rob Herring 1 sibling, 0 replies; 53+ messages in thread From: Rob Herring @ 2011-08-22 13:23 UTC (permalink / raw) To: linux-arm-kernel Shawn, On 08/22/2011 03:35 AM, Shawn Guo wrote: > On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote: >> From: Rob Herring <rob.herring@calxeda.com> >> >> This adds basic support for the Calxeda Highbank platform. >> >> Signed-off-by: Rob Herring <rob.herring@calxeda.com> >> --- > [...] >> +void highbank_init_irq(void) >> +{ >> + struct device_node *node; >> + struct of_intc_desc desc; >> + int n = 0; >> + >> + memset(&desc, 0, sizeof(desc)); >> + desc.controller = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic"); >> + gic_of_init(&desc); >> + node = desc.controller; >> + for_each_child_of_node(node, desc.controller) { >> + gic_of_ppi_init(&desc); >> + } >> + > I failed to find the implementation of gic_of_ppi_init() in your patch > series below. I sent it to the list, but it didn't seem to make it. I'll resend the series. > > [RFC PATCH 0/3] Yet another GIC OF binding series > > Also one nit: the braces seem redundant. Left over from some printks... Rob ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 3/6] MAINTAINERS: add Calxeda Highbank ARM platform 2011-08-16 20:34 [PATCH 0/6] Initial Calxeda Highbank support Rob Herring 2011-08-16 20:34 ` [PATCH 1/6] ARM: highbank: add devicetree source Rob Herring 2011-08-16 20:34 ` [PATCH 2/6] ARM: add Highbank core platform support Rob Herring @ 2011-08-16 20:34 ` Rob Herring 2011-08-16 20:34 ` [PATCH 4/6] ARM: highbank: add SMP support Rob Herring ` (2 subsequent siblings) 5 siblings, 0 replies; 53+ messages in thread From: Rob Herring @ 2011-08-16 20:34 UTC (permalink / raw) To: linux-arm-kernel From: Rob Herring <rob.herring@calxeda.com> Adding maintainer for arch/arm/mach-highbank/ Signed-off-by: Rob Herring <rob.herring@calxeda.com> --- MAINTAINERS | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 1d445f5..0d615f7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -688,6 +688,12 @@ F: drivers/mtd/nand/bcm_umi_nand.c F: drivers/mtd/nand/bcm_umi_bch.c F: drivers/mtd/nand/nand_bcm_umi.h +ARM/CALXEDA HIGHBANK ARCHITECTURE +M: Rob Herring <rob.herring@calxeda.com> +L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers) +S: Maintained +F: arch/arm/mach-highbank/ + ARM/CAVIUM NETWORKS CNS3XXX MACHINE SUPPORT M: Anton Vorontsov <avorontsov@mvista.com> S: Maintained -- 1.7.4.1 ^ permalink raw reply related [flat|nested] 53+ messages in thread
* [PATCH 4/6] ARM: highbank: add SMP support 2011-08-16 20:34 [PATCH 0/6] Initial Calxeda Highbank support Rob Herring ` (2 preceding siblings ...) 2011-08-16 20:34 ` [PATCH 3/6] MAINTAINERS: add Calxeda Highbank ARM platform Rob Herring @ 2011-08-16 20:34 ` Rob Herring 2011-08-17 7:37 ` Russell King - ARM Linux 2011-08-16 20:34 ` [PATCH 5/6] ARM: highbank: Add cpu hotplug support Rob Herring 2011-08-16 20:34 ` [PATCH 6/6] ARM: highbank: add suspend support Rob Herring 5 siblings, 1 reply; 53+ messages in thread From: Rob Herring @ 2011-08-16 20:34 UTC (permalink / raw) To: linux-arm-kernel From: Rob Herring <rob.herring@calxeda.com> This enables SMP support on highbank processor. Signed-off-by: Rob Herring <rob.herring@calxeda.com> --- arch/arm/Kconfig | 2 +- arch/arm/mach-highbank/Makefile | 2 + arch/arm/mach-highbank/localtimer.c | 37 ++++++++++++++++ arch/arm/mach-highbank/platsmp.c | 79 +++++++++++++++++++++++++++++++++++ 4 files changed, 119 insertions(+), 1 deletions(-) create mode 100644 arch/arm/mach-highbank/localtimer.c create mode 100644 arch/arm/mach-highbank/platsmp.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index eecee3d..51abd0c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1365,7 +1365,7 @@ config SMP depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ - ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE + ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK select USE_GENERIC_SMP_HELPERS select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP help diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile index b5de3b9..d443f7e 100644 --- a/arch/arm/mach-highbank/Makefile +++ b/arch/arm/mach-highbank/Makefile @@ -1 +1,3 @@ obj-y := clock.o highbank.o system.o +obj-$(CONFIG_SMP) += platsmp.o +obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o diff --git a/arch/arm/mach-highbank/localtimer.c b/arch/arm/mach-highbank/localtimer.c new file mode 100644 index 0000000..ed54821 --- /dev/null +++ b/arch/arm/mach-highbank/localtimer.c @@ -0,0 +1,37 @@ +/* + * Copyright 2010-2011 Calxeda, Inc. + * Based on localtimer.c, Copyright (C) 2002 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ +#include <linux/init.h> +#include <linux/clockchips.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> + +#include <asm/smp_twd.h> + +/* + * Setup the local clock events for a CPU. + */ +int __cpuinit local_timer_setup(struct clock_event_device *evt) +{ + struct device_node *np; + + np = of_find_compatible_node(NULL, NULL, "arm,smp-twd"); + twd_base = of_iomap(np, 0); + evt->irq = irq_of_parse_and_map(np, 0); + twd_timer_setup(evt); + return 0; +} diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c new file mode 100644 index 0000000..c582f5b --- /dev/null +++ b/arch/arm/mach-highbank/platsmp.c @@ -0,0 +1,79 @@ +/* + * Copyright 2010-2011 Calxeda, Inc. + * Based on platsmp.c, Copyright (C) 2002 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ +#include <linux/init.h> +#include <linux/smp.h> +#include <linux/io.h> + +#include <asm/smp_scu.h> +#include <asm/hardware/gic.h> + +#include "core.h" + +extern void secondary_startup(void); + +void __cpuinit platform_secondary_init(unsigned int cpu) +{ + gic_secondary_init(0); +} + +int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + gic_raise_softirq(cpumask_of(cpu), 1); + return 0; +} + +/* + * Initialise the CPU possible map early - this describes the CPUs + * which may be present or become present in the system. + */ +void __init smp_init_cpus(void) +{ + void __iomem *scu_base = a9_base_addr; + unsigned int i, ncores; + + ncores = scu_base ? scu_get_core_count(scu_base) : 1; + + /* sanity check */ + if (ncores > NR_CPUS) { + printk(KERN_WARNING + "highbank: no. of cores (%d) greater than configured " + "maximum of %d - clipping\n", + ncores, NR_CPUS); + ncores = NR_CPUS; + } + + for (i = 0; i < ncores; i++) + set_cpu_possible(i, true); + + set_smp_cross_call(gic_raise_softirq); +} + +void __init platform_smp_prepare_cpus(unsigned int max_cpus) +{ + int i; + + scu_enable(a9_base_addr); + + /* + * Write the address of secondary startup into the jump table + * The cores are in wfi and wait until they receive a soft interrupt + * and a non-zero value to jump to. Then the secondary CPU branches + * to this address. + */ + for (i = 1; i < max_cpus; i++) + highbank_set_cpu_jump(i, secondary_startup); +} -- 1.7.4.1 ^ permalink raw reply related [flat|nested] 53+ messages in thread
* [PATCH 4/6] ARM: highbank: add SMP support 2011-08-16 20:34 ` [PATCH 4/6] ARM: highbank: add SMP support Rob Herring @ 2011-08-17 7:37 ` Russell King - ARM Linux 2011-08-17 14:01 ` Rob Herring 0 siblings, 1 reply; 53+ messages in thread From: Russell King - ARM Linux @ 2011-08-17 7:37 UTC (permalink / raw) To: linux-arm-kernel On Tue, Aug 16, 2011 at 03:34:56PM -0500, Rob Herring wrote: > +int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) > +{ > + gic_raise_softirq(cpumask_of(cpu), 1); Can this raise IPI0 instead of IPI1 ? > +void __init smp_init_cpus(void) > +{ > + void __iomem *scu_base = a9_base_addr; > + unsigned int i, ncores; > + > + ncores = scu_base ? scu_get_core_count(scu_base) : 1; Is scu_base ever NULL? ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 4/6] ARM: highbank: add SMP support 2011-08-17 7:37 ` Russell King - ARM Linux @ 2011-08-17 14:01 ` Rob Herring 2011-08-17 18:52 ` Russell King - ARM Linux 0 siblings, 1 reply; 53+ messages in thread From: Rob Herring @ 2011-08-17 14:01 UTC (permalink / raw) To: linux-arm-kernel On 08/17/2011 02:37 AM, Russell King - ARM Linux wrote: > On Tue, Aug 16, 2011 at 03:34:56PM -0500, Rob Herring wrote: >> +int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) >> +{ >> + gic_raise_softirq(cpumask_of(cpu), 1); > > Can this raise IPI0 instead of IPI1 ? > >> +void __init smp_init_cpus(void) >> +{ >> + void __iomem *scu_base = a9_base_addr; >> + unsigned int i, ncores; >> + >> + ncores = scu_base ? scu_get_core_count(scu_base) : 1; > > Is scu_base ever NULL? Only if something is wrong and the mapping did not get setup. The system should still boot with 1 core without accessing the the SCU in this case. This BTW is the only reason we need a static mapping of the SCU. So I could just hard code it or use device tree to get the number of cores and eliminate the static mapping. Rob ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 4/6] ARM: highbank: add SMP support 2011-08-17 14:01 ` Rob Herring @ 2011-08-17 18:52 ` Russell King - ARM Linux 0 siblings, 0 replies; 53+ messages in thread From: Russell King - ARM Linux @ 2011-08-17 18:52 UTC (permalink / raw) To: linux-arm-kernel On Wed, Aug 17, 2011 at 09:01:54AM -0500, Rob Herring wrote: > On 08/17/2011 02:37 AM, Russell King - ARM Linux wrote: > > On Tue, Aug 16, 2011 at 03:34:56PM -0500, Rob Herring wrote: > >> +void __init smp_init_cpus(void) > >> +{ > >> + void __iomem *scu_base = a9_base_addr; > >> + unsigned int i, ncores; > >> + > >> + ncores = scu_base ? scu_get_core_count(scu_base) : 1; > > > > Is scu_base ever NULL? > > Only if something is wrong and the mapping did not get setup. The system > should still boot with 1 core without accessing the the SCU in this case. However, in a previous patch, a9_base_addr is statically initialized and never written to, so that doesn't work. Not only that but its also used for poweroff and cpu suspend... > This BTW is the only reason we need a static mapping of the SCU. So I > could just hard code it or use device tree to get the number of cores > and eliminate the static mapping. this statement isn't accurate. I can see no way for scu_base to ever be NULL here. ^ permalink raw reply [flat|nested] 53+ messages in thread
* [PATCH 5/6] ARM: highbank: Add cpu hotplug support 2011-08-16 20:34 [PATCH 0/6] Initial Calxeda Highbank support Rob Herring ` (3 preceding siblings ...) 2011-08-16 20:34 ` [PATCH 4/6] ARM: highbank: add SMP support Rob Herring @ 2011-08-16 20:34 ` Rob Herring 2011-08-16 20:34 ` [PATCH 6/6] ARM: highbank: add suspend support Rob Herring 5 siblings, 0 replies; 53+ messages in thread From: Rob Herring @ 2011-08-16 20:34 UTC (permalink / raw) To: linux-arm-kernel From: Martin Bogomolni <martin@calxeda.com> This adds cpu hotplug for highbank. On highbank, a core is always reset and boots up the same path as a cold boot. Signed-off-by: Martin Bogomolni <martin@calxeda.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com> --- arch/arm/mach-highbank/Makefile | 1 + arch/arm/mach-highbank/hotplug.c | 56 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 57 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-highbank/hotplug.c diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile index d443f7e..b8d5d40 100644 --- a/arch/arm/mach-highbank/Makefile +++ b/arch/arm/mach-highbank/Makefile @@ -1,3 +1,4 @@ obj-y := clock.o highbank.o system.o obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o +obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-highbank/hotplug.c b/arch/arm/mach-highbank/hotplug.c new file mode 100644 index 0000000..81dc4e3 --- /dev/null +++ b/arch/arm/mach-highbank/hotplug.c @@ -0,0 +1,56 @@ +/* + * Copyright 2011 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/smp.h> + +#include <asm/smp_scu.h> +#include <asm/cacheflush.h> + +#include "core.h" + +extern void secondary_startup(void); + +int platform_cpu_kill(unsigned int cpu) +{ + return 1; +} + +/* + * platform-specific code to shutdown a CPU + * + */ +void platform_cpu_die(unsigned int cpu) +{ + flush_cache_all(); + + highbank_set_cpu_jump(cpu, secondary_startup); + scu_power_mode(a9_base_addr, SCU_PM_POWEROFF); + + cpu_do_idle(); + + /* We should never return from idle */ + panic("highbank: cpu %d unexpectedly exit from shutdown\n", cpu); +} + +int platform_cpu_disable(unsigned int cpu) +{ + /* + * CPU0 should not be shut down via hotplug. cpu_idle can WFI + * or a proper shutdown or hibernate should be used. + */ + return cpu == 0 ? -EPERM : 0; +} -- 1.7.4.1 ^ permalink raw reply related [flat|nested] 53+ messages in thread
* [PATCH 6/6] ARM: highbank: add suspend support 2011-08-16 20:34 [PATCH 0/6] Initial Calxeda Highbank support Rob Herring ` (4 preceding siblings ...) 2011-08-16 20:34 ` [PATCH 5/6] ARM: highbank: Add cpu hotplug support Rob Herring @ 2011-08-16 20:34 ` Rob Herring 2011-08-25 1:17 ` Shawn Guo 5 siblings, 1 reply; 53+ messages in thread From: Rob Herring @ 2011-08-16 20:34 UTC (permalink / raw) To: linux-arm-kernel From: Rob Herring <rob.herring@calxeda.com> Add the platform suspend ops for highbank. Signed-off-by: Rob Herring <rob.herring@calxeda.com> --- arch/arm/mach-highbank/Makefile | 1 + arch/arm/mach-highbank/pm.c | 55 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 56 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-highbank/pm.c diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile index b8d5d40..2cd4a1b 100644 --- a/arch/arm/mach-highbank/Makefile +++ b/arch/arm/mach-highbank/Makefile @@ -2,3 +2,4 @@ obj-y := clock.o highbank.o system.o obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o +obj-$(CONFIG_PM_SLEEP) += pm.o diff --git a/arch/arm/mach-highbank/pm.c b/arch/arm/mach-highbank/pm.c new file mode 100644 index 0000000..36c88df --- /dev/null +++ b/arch/arm/mach-highbank/pm.c @@ -0,0 +1,55 @@ +/* + * Copyright 2011 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <linux/init.h> +#include <linux/io.h> +#include <linux/suspend.h> + +#include <asm/proc-fns.h> +#include <asm/smp_scu.h> +#include <asm/suspend.h> + +#include "core.h" +#include "sysregs.h" + +static int highbank_suspend_finish(unsigned long val) +{ + cpu_do_idle(); + return 0; +} + +static int highbank_pm_enter(suspend_state_t state) +{ + writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ); + highbank_set_cpu_jump(0, cpu_resume); + + scu_power_mode(a9_base_addr, SCU_PM_POWEROFF); + cpu_suspend(0, highbank_suspend_finish); + + return 0; +} + +static const struct platform_suspend_ops highbank_pm_ops = { + .enter = highbank_pm_enter, + .valid = suspend_valid_only_mem, +}; + +static int highbank_pm_init(void) +{ + suspend_set_ops(&highbank_pm_ops); + return 0; +} +module_init(highbank_pm_init); -- 1.7.4.1 ^ permalink raw reply related [flat|nested] 53+ messages in thread
* [PATCH 6/6] ARM: highbank: add suspend support 2011-08-16 20:34 ` [PATCH 6/6] ARM: highbank: add suspend support Rob Herring @ 2011-08-25 1:17 ` Shawn Guo 0 siblings, 0 replies; 53+ messages in thread From: Shawn Guo @ 2011-08-25 1:17 UTC (permalink / raw) To: linux-arm-kernel On Tue, Aug 16, 2011 at 03:34:58PM -0500, Rob Herring wrote: > From: Rob Herring <rob.herring@calxeda.com> > > Add the platform suspend ops for highbank. > > Signed-off-by: Rob Herring <rob.herring@calxeda.com> > --- > arch/arm/mach-highbank/Makefile | 1 + > arch/arm/mach-highbank/pm.c | 55 +++++++++++++++++++++++++++++++++++++++ > 2 files changed, 56 insertions(+), 0 deletions(-) > create mode 100644 arch/arm/mach-highbank/pm.c > > diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile > index b8d5d40..2cd4a1b 100644 > --- a/arch/arm/mach-highbank/Makefile > +++ b/arch/arm/mach-highbank/Makefile > @@ -2,3 +2,4 @@ obj-y := clock.o highbank.o system.o > obj-$(CONFIG_SMP) += platsmp.o > obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o > obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o > +obj-$(CONFIG_PM_SLEEP) += pm.o > diff --git a/arch/arm/mach-highbank/pm.c b/arch/arm/mach-highbank/pm.c > new file mode 100644 > index 0000000..36c88df > --- /dev/null > +++ b/arch/arm/mach-highbank/pm.c > @@ -0,0 +1,55 @@ > +/* > + * Copyright 2011 Calxeda, Inc. > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms and conditions of the GNU General Public License, > + * version 2, as published by the Free Software Foundation. > + * > + * This program is distributed in the hope it will be useful, but WITHOUT > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for > + * more details. > + * > + * You should have received a copy of the GNU General Public License along with > + * this program. If not, see <http://www.gnu.org/licenses/>. > + */ > + > +#include <linux/init.h> > +#include <linux/io.h> > +#include <linux/suspend.h> > + > +#include <asm/proc-fns.h> > +#include <asm/smp_scu.h> > +#include <asm/suspend.h> > + > +#include "core.h" > +#include "sysregs.h" > + > +static int highbank_suspend_finish(unsigned long val) > +{ > + cpu_do_idle(); > + return 0; > +} > + > +static int highbank_pm_enter(suspend_state_t state) > +{ > + writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ); > + highbank_set_cpu_jump(0, cpu_resume); > + > + scu_power_mode(a9_base_addr, SCU_PM_POWEROFF); > + cpu_suspend(0, highbank_suspend_finish); > + > + return 0; > +} > + > +static const struct platform_suspend_ops highbank_pm_ops = { > + .enter = highbank_pm_enter, > + .valid = suspend_valid_only_mem, > +}; > + > +static int highbank_pm_init(void) __init maybe? Regards, Shawn > +{ > + suspend_set_ops(&highbank_pm_ops); > + return 0; > +} > +module_init(highbank_pm_init); > -- > 1.7.4.1 ^ permalink raw reply [flat|nested] 53+ messages in thread
end of thread, other threads:[~2011-08-25 21:44 UTC | newest]
Thread overview: 53+ messages (download: mbox.gz / follow: Atom feed)
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2011-08-16 20:34 [PATCH 0/6] Initial Calxeda Highbank support Rob Herring
2011-08-16 20:34 ` [PATCH 1/6] ARM: highbank: add devicetree source Rob Herring
2011-08-17 7:27 ` Shawn Guo
2011-08-17 13:49 ` Rob Herring
2011-08-17 14:51 ` Shawn Guo
2011-08-20 18:32 ` Rob Herring
2011-08-17 17:52 ` Will Deacon
2011-08-20 18:29 ` Rob Herring
2011-08-17 9:27 ` Mark Rutland
[not found] ` <4e4b8979.533fd80a.2ff3.1626SMTPIN_ADDED@mx.google.com>
2011-08-17 14:08 ` Rob Herring
2011-08-17 14:34 ` Will Deacon
2011-08-20 9:51 ` Shawn Guo
2011-08-20 18:19 ` Rob Herring
2011-08-16 20:34 ` [PATCH 2/6] ARM: add Highbank core platform support Rob Herring
2011-08-16 22:19 ` Jamie Iles
2011-08-25 2:19 ` Rob Herring
2011-08-17 7:43 ` Russell King - ARM Linux
2011-08-18 15:34 ` Arnd Bergmann
2011-08-18 15:40 ` Russell King - ARM Linux
2011-08-19 14:11 ` Arnd Bergmann
2011-08-20 19:24 ` Rob Herring
2011-08-20 23:05 ` Russell King - ARM Linux
2011-08-20 18:44 ` Rob Herring
2011-08-25 2:45 ` Rob Herring
2011-08-25 4:03 ` Shawn Guo
2011-08-25 15:59 ` Arnd Bergmann
2011-08-25 16:02 ` Arnd Bergmann
2011-08-25 18:03 ` Rob Herring
2011-08-25 21:44 ` Arnd Bergmann
2011-08-19 6:43 ` Shawn Guo
2011-08-19 7:17 ` Shawn Guo
2011-08-20 18:16 ` Rob Herring
2011-08-19 8:56 ` Dave Martin
2011-08-19 13:45 ` Arnd Bergmann
2011-08-20 14:48 ` Shawn Guo
2011-08-20 18:21 ` Rob Herring
2011-08-20 15:54 ` Shawn Guo
2011-08-20 16:10 ` Shawn Guo
2011-08-20 18:22 ` Rob Herring
2011-08-22 5:55 ` Shawn Guo
2011-08-22 10:01 ` Jamie Iles
2011-08-23 3:33 ` Shawn Guo
2011-08-22 8:35 ` Shawn Guo
2011-08-22 9:15 ` Shawn Guo
2011-08-22 13:23 ` Rob Herring
2011-08-16 20:34 ` [PATCH 3/6] MAINTAINERS: add Calxeda Highbank ARM platform Rob Herring
2011-08-16 20:34 ` [PATCH 4/6] ARM: highbank: add SMP support Rob Herring
2011-08-17 7:37 ` Russell King - ARM Linux
2011-08-17 14:01 ` Rob Herring
2011-08-17 18:52 ` Russell King - ARM Linux
2011-08-16 20:34 ` [PATCH 5/6] ARM: highbank: Add cpu hotplug support Rob Herring
2011-08-16 20:34 ` [PATCH 6/6] ARM: highbank: add suspend support Rob Herring
2011-08-25 1:17 ` Shawn Guo
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