[PATCH] ARM: CACHE-L2X0: filter start address can be 0 and is often 0

[PATCH] ARM: CACHE-L2X0: filter start address can be 0 and is often 0

[Barry Song]

Cc: Rob Herring <robherring2@gmail.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
 arch/arm/mm/cache-l2x0.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index a780448..0d85d22 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -437,7 +437,7 @@ static void __init pl310_of_setup(const struct device_node *np,
 
 	of_property_read_u32_array(np, "arm,filter-ranges",
 				   filter, ARRAY_SIZE(filter));
-	if (filter[0] && filter[1]) {
+	if (filter[1]) {
 		writel_relaxed(ALIGN(filter[0] + filter[1], SZ_1M),
 			       l2x0_base + L2X0_ADDR_FILTER_END);
 		writel_relaxed((filter[0] & ~(SZ_1M - 1)) | L2X0_ADDR_FILTER_EN,
-- 
1.7.1



Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
More information can be found at www.csr.com. Follow CSR on Twitter at http://twitter.com/CSR_PLC and read our blog at www.csr.com/blog

[PATCH] ARM: CACHE-L2X0: filter start address can be 0 and is often 0

[Rob Herring]

On 09/13/2011 01:32 AM, Barry Song wrote:
> Cc: Rob Herring <robherring2@gmail.com>
> Cc: Shawn Guo <shawn.guo@linaro.org>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Signed-off-by: Barry Song <Baohua.Song@csr.com>

Acked-by: Rob Herring <rob.herring@calxeda.com>

> ---
>  arch/arm/mm/cache-l2x0.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
> index a780448..0d85d22 100644
> --- a/arch/arm/mm/cache-l2x0.c
> +++ b/arch/arm/mm/cache-l2x0.c
> @@ -437,7 +437,7 @@ static void __init pl310_of_setup(const struct device_node *np,
>  
>  	of_property_read_u32_array(np, "arm,filter-ranges",
>  				   filter, ARRAY_SIZE(filter));
> -	if (filter[0] && filter[1]) {
> +	if (filter[1]) {
>  		writel_relaxed(ALIGN(filter[0] + filter[1], SZ_1M),
>  			       l2x0_base + L2X0_ADDR_FILTER_END);
>  		writel_relaxed((filter[0] & ~(SZ_1M - 1)) | L2X0_ADDR_FILTER_EN,