* [PATCH] Qemu co-operation with kvm tsc deadline timer
@ 2011-09-22 8:57 ` Liu, Jinsong
0 siblings, 0 replies; 6+ messages in thread
From: Liu, Jinsong @ 2011-09-22 8:57 UTC (permalink / raw)
To: Avi Kivity, Marcelo Tosatti, kvm, qemu-devel; +Cc: Tian, Kevin, Liu, Jinsong
[-- Attachment #1: Type: text/plain, Size: 2712 bytes --]
>From 8c39f2ddbf7069342826a83e535c0c7b641d6501 Mon Sep 17 00:00:00 2001
From: Liu, Jinsong <jinsong.liu@intel.com>
Date: Thu, 22 Sep 2011 16:28:13 +0800
Subject: [PATCH] Qemu co-operation with kvm tsc deadline timer
KVM add emulation of lapic tsc deadline timer for guest.
This patch is co-operation work at qemu side.
Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
---
target-i386/cpu.h | 2 ++
target-i386/kvm.c | 7 +++++++
target-i386/machine.c | 1 +
3 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 935d08a..62ff73c 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -283,6 +283,7 @@
#define MSR_IA32_APICBASE_BSP (1<<8)
#define MSR_IA32_APICBASE_ENABLE (1<<11)
#define MSR_IA32_APICBASE_BASE (0xfffff<<12)
+#define MSR_IA32_TSCDEADLINE 0x6e0
#define MSR_MTRRcap 0xfe
#define MSR_MTRRcap_VCNT 8
@@ -687,6 +688,7 @@ typedef struct CPUX86State {
uint64_t async_pf_en_msr;
uint64_t tsc;
+ uint64_t tsc_deadline;
uint64_t mcg_status;
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index aa843f0..2d55070 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -942,6 +942,8 @@ static int kvm_put_msrs(CPUState *env, int level)
}
}
+ kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSCDEADLINE, env->tsc_deadline);
+
msr_data.info.nmsrs = n;
return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data);
@@ -1173,6 +1175,8 @@ static int kvm_get_msrs(CPUState *env)
}
}
+ msrs[n++].index = MSR_IA32_TSCDEADLINE;
+
msr_data.info.nmsrs = n;
ret = kvm_vcpu_ioctl(env, KVM_GET_MSRS, &msr_data);
if (ret < 0) {
@@ -1213,6 +1217,9 @@ static int kvm_get_msrs(CPUState *env)
case MSR_IA32_TSC:
env->tsc = msrs[i].data;
break;
+ case MSR_IA32_TSCDEADLINE:
+ env->tsc_deadline = msrs[i].data;
+ break;
case MSR_VM_HSAVE_PA:
env->vm_hsave = msrs[i].data;
break;
diff --git a/target-i386/machine.c b/target-i386/machine.c
index 9aca8e0..25fa97d 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -410,6 +410,7 @@ static const VMStateDescription vmstate_cpu = {
VMSTATE_UINT64_V(xcr0, CPUState, 12),
VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
+ VMSTATE_UINT64_V(tsc_deadline, CPUState, 13),
VMSTATE_END_OF_LIST()
/* The above list is not sorted /wrt version numbers, watch out! */
},
--
1.6.5.6
[-- Attachment #2: qemu-tsc-deadline-timer.patch --]
[-- Type: application/octet-stream, Size: 2631 bytes --]
From 8c39f2ddbf7069342826a83e535c0c7b641d6501 Mon Sep 17 00:00:00 2001
From: Liu, Jinsong <jinsong.liu@intel.com>
Date: Thu, 22 Sep 2011 16:28:13 +0800
Subject: [PATCH] Qemu co-operation with kvm tsc deadline timer
KVM add emulation of lapic tsc deadline timer for guest.
This patch is co-operation work at qemu side.
Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
---
target-i386/cpu.h | 2 ++
target-i386/kvm.c | 7 +++++++
target-i386/machine.c | 1 +
3 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 935d08a..62ff73c 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -283,6 +283,7 @@
#define MSR_IA32_APICBASE_BSP (1<<8)
#define MSR_IA32_APICBASE_ENABLE (1<<11)
#define MSR_IA32_APICBASE_BASE (0xfffff<<12)
+#define MSR_IA32_TSCDEADLINE 0x6e0
#define MSR_MTRRcap 0xfe
#define MSR_MTRRcap_VCNT 8
@@ -687,6 +688,7 @@ typedef struct CPUX86State {
uint64_t async_pf_en_msr;
uint64_t tsc;
+ uint64_t tsc_deadline;
uint64_t mcg_status;
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index aa843f0..2d55070 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -942,6 +942,8 @@ static int kvm_put_msrs(CPUState *env, int level)
}
}
+ kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSCDEADLINE, env->tsc_deadline);
+
msr_data.info.nmsrs = n;
return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data);
@@ -1173,6 +1175,8 @@ static int kvm_get_msrs(CPUState *env)
}
}
+ msrs[n++].index = MSR_IA32_TSCDEADLINE;
+
msr_data.info.nmsrs = n;
ret = kvm_vcpu_ioctl(env, KVM_GET_MSRS, &msr_data);
if (ret < 0) {
@@ -1213,6 +1217,9 @@ static int kvm_get_msrs(CPUState *env)
case MSR_IA32_TSC:
env->tsc = msrs[i].data;
break;
+ case MSR_IA32_TSCDEADLINE:
+ env->tsc_deadline = msrs[i].data;
+ break;
case MSR_VM_HSAVE_PA:
env->vm_hsave = msrs[i].data;
break;
diff --git a/target-i386/machine.c b/target-i386/machine.c
index 9aca8e0..25fa97d 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -410,6 +410,7 @@ static const VMStateDescription vmstate_cpu = {
VMSTATE_UINT64_V(xcr0, CPUState, 12),
VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
+ VMSTATE_UINT64_V(tsc_deadline, CPUState, 13),
VMSTATE_END_OF_LIST()
/* The above list is not sorted /wrt version numbers, watch out! */
},
--
1.6.5.6
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH] Qemu co-operation with kvm tsc deadline timer
@ 2011-09-22 8:57 ` Liu, Jinsong
0 siblings, 0 replies; 6+ messages in thread
From: Liu, Jinsong @ 2011-09-22 8:57 UTC (permalink / raw)
To: Avi Kivity, Marcelo Tosatti, kvm, qemu-devel; +Cc: Liu, Jinsong, Tian, Kevin
[-- Attachment #1: Type: text/plain, Size: 2712 bytes --]
>From 8c39f2ddbf7069342826a83e535c0c7b641d6501 Mon Sep 17 00:00:00 2001
From: Liu, Jinsong <jinsong.liu@intel.com>
Date: Thu, 22 Sep 2011 16:28:13 +0800
Subject: [PATCH] Qemu co-operation with kvm tsc deadline timer
KVM add emulation of lapic tsc deadline timer for guest.
This patch is co-operation work at qemu side.
Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
---
target-i386/cpu.h | 2 ++
target-i386/kvm.c | 7 +++++++
target-i386/machine.c | 1 +
3 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 935d08a..62ff73c 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -283,6 +283,7 @@
#define MSR_IA32_APICBASE_BSP (1<<8)
#define MSR_IA32_APICBASE_ENABLE (1<<11)
#define MSR_IA32_APICBASE_BASE (0xfffff<<12)
+#define MSR_IA32_TSCDEADLINE 0x6e0
#define MSR_MTRRcap 0xfe
#define MSR_MTRRcap_VCNT 8
@@ -687,6 +688,7 @@ typedef struct CPUX86State {
uint64_t async_pf_en_msr;
uint64_t tsc;
+ uint64_t tsc_deadline;
uint64_t mcg_status;
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index aa843f0..2d55070 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -942,6 +942,8 @@ static int kvm_put_msrs(CPUState *env, int level)
}
}
+ kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSCDEADLINE, env->tsc_deadline);
+
msr_data.info.nmsrs = n;
return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data);
@@ -1173,6 +1175,8 @@ static int kvm_get_msrs(CPUState *env)
}
}
+ msrs[n++].index = MSR_IA32_TSCDEADLINE;
+
msr_data.info.nmsrs = n;
ret = kvm_vcpu_ioctl(env, KVM_GET_MSRS, &msr_data);
if (ret < 0) {
@@ -1213,6 +1217,9 @@ static int kvm_get_msrs(CPUState *env)
case MSR_IA32_TSC:
env->tsc = msrs[i].data;
break;
+ case MSR_IA32_TSCDEADLINE:
+ env->tsc_deadline = msrs[i].data;
+ break;
case MSR_VM_HSAVE_PA:
env->vm_hsave = msrs[i].data;
break;
diff --git a/target-i386/machine.c b/target-i386/machine.c
index 9aca8e0..25fa97d 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -410,6 +410,7 @@ static const VMStateDescription vmstate_cpu = {
VMSTATE_UINT64_V(xcr0, CPUState, 12),
VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
+ VMSTATE_UINT64_V(tsc_deadline, CPUState, 13),
VMSTATE_END_OF_LIST()
/* The above list is not sorted /wrt version numbers, watch out! */
},
--
1.6.5.6
[-- Attachment #2: qemu-tsc-deadline-timer.patch --]
[-- Type: application/octet-stream, Size: 2631 bytes --]
From 8c39f2ddbf7069342826a83e535c0c7b641d6501 Mon Sep 17 00:00:00 2001
From: Liu, Jinsong <jinsong.liu@intel.com>
Date: Thu, 22 Sep 2011 16:28:13 +0800
Subject: [PATCH] Qemu co-operation with kvm tsc deadline timer
KVM add emulation of lapic tsc deadline timer for guest.
This patch is co-operation work at qemu side.
Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
---
target-i386/cpu.h | 2 ++
target-i386/kvm.c | 7 +++++++
target-i386/machine.c | 1 +
3 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 935d08a..62ff73c 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -283,6 +283,7 @@
#define MSR_IA32_APICBASE_BSP (1<<8)
#define MSR_IA32_APICBASE_ENABLE (1<<11)
#define MSR_IA32_APICBASE_BASE (0xfffff<<12)
+#define MSR_IA32_TSCDEADLINE 0x6e0
#define MSR_MTRRcap 0xfe
#define MSR_MTRRcap_VCNT 8
@@ -687,6 +688,7 @@ typedef struct CPUX86State {
uint64_t async_pf_en_msr;
uint64_t tsc;
+ uint64_t tsc_deadline;
uint64_t mcg_status;
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index aa843f0..2d55070 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -942,6 +942,8 @@ static int kvm_put_msrs(CPUState *env, int level)
}
}
+ kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSCDEADLINE, env->tsc_deadline);
+
msr_data.info.nmsrs = n;
return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data);
@@ -1173,6 +1175,8 @@ static int kvm_get_msrs(CPUState *env)
}
}
+ msrs[n++].index = MSR_IA32_TSCDEADLINE;
+
msr_data.info.nmsrs = n;
ret = kvm_vcpu_ioctl(env, KVM_GET_MSRS, &msr_data);
if (ret < 0) {
@@ -1213,6 +1217,9 @@ static int kvm_get_msrs(CPUState *env)
case MSR_IA32_TSC:
env->tsc = msrs[i].data;
break;
+ case MSR_IA32_TSCDEADLINE:
+ env->tsc_deadline = msrs[i].data;
+ break;
case MSR_VM_HSAVE_PA:
env->vm_hsave = msrs[i].data;
break;
diff --git a/target-i386/machine.c b/target-i386/machine.c
index 9aca8e0..25fa97d 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -410,6 +410,7 @@ static const VMStateDescription vmstate_cpu = {
VMSTATE_UINT64_V(xcr0, CPUState, 12),
VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
+ VMSTATE_UINT64_V(tsc_deadline, CPUState, 13),
VMSTATE_END_OF_LIST()
/* The above list is not sorted /wrt version numbers, watch out! */
},
--
1.6.5.6
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] Qemu co-operation with kvm tsc deadline timer
2011-09-22 8:57 ` [Qemu-devel] " Liu, Jinsong
@ 2011-09-23 13:05 ` Marcelo Tosatti
-1 siblings, 0 replies; 6+ messages in thread
From: Marcelo Tosatti @ 2011-09-23 13:05 UTC (permalink / raw)
To: Liu, Jinsong; +Cc: Avi Kivity, kvm, qemu-devel, Tian, Kevin
On Thu, Sep 22, 2011 at 04:57:14PM +0800, Liu, Jinsong wrote:
> >From 8c39f2ddbf7069342826a83e535c0c7b641d6501 Mon Sep 17 00:00:00 2001
> From: Liu, Jinsong <jinsong.liu@intel.com>
> Date: Thu, 22 Sep 2011 16:28:13 +0800
> Subject: [PATCH] Qemu co-operation with kvm tsc deadline timer
>
> KVM add emulation of lapic tsc deadline timer for guest.
> This patch is co-operation work at qemu side.
>
> Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
> ---
> target-i386/cpu.h | 2 ++
> target-i386/kvm.c | 7 +++++++
> target-i386/machine.c | 1 +
> 3 files changed, 10 insertions(+), 0 deletions(-)
Please add back has_msr_tsc_deadline checks, otherwise users are scared
with "unsupported MSR" messages on older kernels.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PATCH] Qemu co-operation with kvm tsc deadline timer
@ 2011-09-23 13:05 ` Marcelo Tosatti
0 siblings, 0 replies; 6+ messages in thread
From: Marcelo Tosatti @ 2011-09-23 13:05 UTC (permalink / raw)
To: Liu, Jinsong; +Cc: Tian, Kevin, Avi Kivity, kvm, qemu-devel
On Thu, Sep 22, 2011 at 04:57:14PM +0800, Liu, Jinsong wrote:
> >From 8c39f2ddbf7069342826a83e535c0c7b641d6501 Mon Sep 17 00:00:00 2001
> From: Liu, Jinsong <jinsong.liu@intel.com>
> Date: Thu, 22 Sep 2011 16:28:13 +0800
> Subject: [PATCH] Qemu co-operation with kvm tsc deadline timer
>
> KVM add emulation of lapic tsc deadline timer for guest.
> This patch is co-operation work at qemu side.
>
> Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
> ---
> target-i386/cpu.h | 2 ++
> target-i386/kvm.c | 7 +++++++
> target-i386/machine.c | 1 +
> 3 files changed, 10 insertions(+), 0 deletions(-)
Please add back has_msr_tsc_deadline checks, otherwise users are scared
with "unsupported MSR" messages on older kernels.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] Qemu co-operation with kvm tsc deadline timer
2011-09-22 8:57 ` [Qemu-devel] " Liu, Jinsong
@ 2011-09-23 13:51 ` Jan Kiszka
-1 siblings, 0 replies; 6+ messages in thread
From: Jan Kiszka @ 2011-09-23 13:51 UTC (permalink / raw)
To: Liu, Jinsong; +Cc: Tian, Kevin, Marcelo Tosatti, Avi Kivity, kvm, qemu-devel
On 2011-09-22 10:57, Liu, Jinsong wrote:
> From 8c39f2ddbf7069342826a83e535c0c7b641d6501 Mon Sep 17 00:00:00 2001
> From: Liu, Jinsong <jinsong.liu@intel.com>
> Date: Thu, 22 Sep 2011 16:28:13 +0800
> Subject: [PATCH] Qemu co-operation with kvm tsc deadline timer
>
> KVM add emulation of lapic tsc deadline timer for guest.
> This patch is co-operation work at qemu side.
>
> Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
> ---
> target-i386/cpu.h | 2 ++
> target-i386/kvm.c | 7 +++++++
> target-i386/machine.c | 1 +
> 3 files changed, 10 insertions(+), 0 deletions(-)
>
> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> index 935d08a..62ff73c 100644
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -283,6 +283,7 @@
> #define MSR_IA32_APICBASE_BSP (1<<8)
> #define MSR_IA32_APICBASE_ENABLE (1<<11)
> #define MSR_IA32_APICBASE_BASE (0xfffff<<12)
> +#define MSR_IA32_TSCDEADLINE 0x6e0
>
> #define MSR_MTRRcap 0xfe
> #define MSR_MTRRcap_VCNT 8
> @@ -687,6 +688,7 @@ typedef struct CPUX86State {
> uint64_t async_pf_en_msr;
>
> uint64_t tsc;
> + uint64_t tsc_deadline;
>
> uint64_t mcg_status;
>
> diff --git a/target-i386/kvm.c b/target-i386/kvm.c
> index aa843f0..2d55070 100644
> --- a/target-i386/kvm.c
> +++ b/target-i386/kvm.c
> @@ -942,6 +942,8 @@ static int kvm_put_msrs(CPUState *env, int level)
> }
> }
>
> + kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSCDEADLINE, env->tsc_deadline);
> +
> msr_data.info.nmsrs = n;
>
> return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data);
> @@ -1173,6 +1175,8 @@ static int kvm_get_msrs(CPUState *env)
> }
> }
>
> + msrs[n++].index = MSR_IA32_TSCDEADLINE;
> +
> msr_data.info.nmsrs = n;
> ret = kvm_vcpu_ioctl(env, KVM_GET_MSRS, &msr_data);
> if (ret < 0) {
> @@ -1213,6 +1217,9 @@ static int kvm_get_msrs(CPUState *env)
> case MSR_IA32_TSC:
> env->tsc = msrs[i].data;
> break;
> + case MSR_IA32_TSCDEADLINE:
> + env->tsc_deadline = msrs[i].data;
> + break;
> case MSR_VM_HSAVE_PA:
> env->vm_hsave = msrs[i].data;
> break;
> diff --git a/target-i386/machine.c b/target-i386/machine.c
> index 9aca8e0..25fa97d 100644
> --- a/target-i386/machine.c
> +++ b/target-i386/machine.c
> @@ -410,6 +410,7 @@ static const VMStateDescription vmstate_cpu = {
> VMSTATE_UINT64_V(xcr0, CPUState, 12),
> VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
> VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
> + VMSTATE_UINT64_V(tsc_deadline, CPUState, 13),
Don't forget to update CPU_SAVE_VERSION.
Jan
--
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PATCH] Qemu co-operation with kvm tsc deadline timer
@ 2011-09-23 13:51 ` Jan Kiszka
0 siblings, 0 replies; 6+ messages in thread
From: Jan Kiszka @ 2011-09-23 13:51 UTC (permalink / raw)
To: Liu, Jinsong; +Cc: Tian, Kevin, Marcelo Tosatti, Avi Kivity, kvm, qemu-devel
On 2011-09-22 10:57, Liu, Jinsong wrote:
> From 8c39f2ddbf7069342826a83e535c0c7b641d6501 Mon Sep 17 00:00:00 2001
> From: Liu, Jinsong <jinsong.liu@intel.com>
> Date: Thu, 22 Sep 2011 16:28:13 +0800
> Subject: [PATCH] Qemu co-operation with kvm tsc deadline timer
>
> KVM add emulation of lapic tsc deadline timer for guest.
> This patch is co-operation work at qemu side.
>
> Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
> ---
> target-i386/cpu.h | 2 ++
> target-i386/kvm.c | 7 +++++++
> target-i386/machine.c | 1 +
> 3 files changed, 10 insertions(+), 0 deletions(-)
>
> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> index 935d08a..62ff73c 100644
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -283,6 +283,7 @@
> #define MSR_IA32_APICBASE_BSP (1<<8)
> #define MSR_IA32_APICBASE_ENABLE (1<<11)
> #define MSR_IA32_APICBASE_BASE (0xfffff<<12)
> +#define MSR_IA32_TSCDEADLINE 0x6e0
>
> #define MSR_MTRRcap 0xfe
> #define MSR_MTRRcap_VCNT 8
> @@ -687,6 +688,7 @@ typedef struct CPUX86State {
> uint64_t async_pf_en_msr;
>
> uint64_t tsc;
> + uint64_t tsc_deadline;
>
> uint64_t mcg_status;
>
> diff --git a/target-i386/kvm.c b/target-i386/kvm.c
> index aa843f0..2d55070 100644
> --- a/target-i386/kvm.c
> +++ b/target-i386/kvm.c
> @@ -942,6 +942,8 @@ static int kvm_put_msrs(CPUState *env, int level)
> }
> }
>
> + kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSCDEADLINE, env->tsc_deadline);
> +
> msr_data.info.nmsrs = n;
>
> return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data);
> @@ -1173,6 +1175,8 @@ static int kvm_get_msrs(CPUState *env)
> }
> }
>
> + msrs[n++].index = MSR_IA32_TSCDEADLINE;
> +
> msr_data.info.nmsrs = n;
> ret = kvm_vcpu_ioctl(env, KVM_GET_MSRS, &msr_data);
> if (ret < 0) {
> @@ -1213,6 +1217,9 @@ static int kvm_get_msrs(CPUState *env)
> case MSR_IA32_TSC:
> env->tsc = msrs[i].data;
> break;
> + case MSR_IA32_TSCDEADLINE:
> + env->tsc_deadline = msrs[i].data;
> + break;
> case MSR_VM_HSAVE_PA:
> env->vm_hsave = msrs[i].data;
> break;
> diff --git a/target-i386/machine.c b/target-i386/machine.c
> index 9aca8e0..25fa97d 100644
> --- a/target-i386/machine.c
> +++ b/target-i386/machine.c
> @@ -410,6 +410,7 @@ static const VMStateDescription vmstate_cpu = {
> VMSTATE_UINT64_V(xcr0, CPUState, 12),
> VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
> VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
> + VMSTATE_UINT64_V(tsc_deadline, CPUState, 13),
Don't forget to update CPU_SAVE_VERSION.
Jan
--
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2011-09-23 13:52 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-09-22 8:57 [PATCH] Qemu co-operation with kvm tsc deadline timer Liu, Jinsong
2011-09-22 8:57 ` [Qemu-devel] " Liu, Jinsong
2011-09-23 13:05 ` Marcelo Tosatti
2011-09-23 13:05 ` [Qemu-devel] " Marcelo Tosatti
2011-09-23 13:51 ` Jan Kiszka
2011-09-23 13:51 ` [Qemu-devel] " Jan Kiszka
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