eMMC low write speed

eMMC low write speed

[Praveen G K]

Hello all,

I am working on the block driver module of the eMMC driver.  I am
seeing very low write speed for eMMC transfers.  On further debugging,
I observed that every 63rd and 64th transfer takes a long time.  I
have tabulated this by noting the time interval between when CMD 25
(multi block write command) is sent and when DATA_END interrupt is
received.  In normal cases, to transfer 64k (128 blocks of data), it
takes about 2.5ms.  But, under the really slow transfer speed cases,
it takes about 250-350ms to get the data_end interrupt after the multi
block write command is sent.  In some cases, it takes a longer time.
This radically reduces the throughput of the transfers.

I have also enabled the bounce buffers.  As a side question, can
somebody please tell me why the bounce buffer is restricted to 64kB?

Thanks in advance for any help that you can provide me on this issue.
Also, please include my email id in the cc field when replying to this
email since I am not subscribed to this mailing list.

Thanks,
Praveen Krishnan

Re: eMMC low write speed

[Praveen G K]

Hi Qiang,





On Thu, Sep 22, 2011 at 7:16 PM, Qiang LIU <godliuqiang@gmail.com> wrote:
> Hi,
>
> I suggest you change another eMMC card or try SDHC card. It seems like
> a card issue.

Thanks for the response.  So, do you think this has nothing to do with
the caching or any such issues, since it is only every 63rd and 64th
transfer causing this issue?

> What's your environment. Which mode is the host controller, DMA or PIO?

The host controller is in the DMA mode.

> About the bounce buffer, I think is a trade off, if you enlarge its size.
> Sometimes
> will rise timeout error (2s, other polling thread won't gain the host
> controller).
>
> 2011/9/23 Praveen G K <praveen.gk@gmail.com>
>>
>> Hello all,
>>
>> I am working on the block driver module of the eMMC driver.  I am
>> seeing very low write speed for eMMC transfers.  On further debugging,
>> I observed that every 63rd and 64th transfer takes a long time.  I
>> have tabulated this by noting the time interval between when CMD 25
>> (multi block write command) is sent and when DATA_END interrupt is
>> received.  In normal cases, to transfer 64k (128 blocks of data), it
>> takes about 2.5ms.  But, under the really slow transfer speed cases,
>> it takes about 250-350ms to get the data_end interrupt after the multi
>> block write command is sent.  In some cases, it takes a longer time.
>> This radically reduces the throughput of the transfers.
>>
>> I have also enabled the bounce buffers.  As a side question, can
>> somebody please tell me why the bounce buffer is restricted to 64kB?
>>
>> Thanks in advance for any help that you can provide me on this issue.
>> Also, please include my email id in the cc field when replying to this
>> email since I am not subscribed to this mailing list.
>>
>> Thanks,
>> Praveen Krishnan
>> --
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>
>
>
> --
> Best Regards
> Onizuka Eiji
>

Re: eMMC low write speed

[Timo Kokkonen]

On 09/23/11 06:03, Praveen G K wrote:
> Hi Qiang,
> 
> 
> On Thu, Sep 22, 2011 at 7:16 PM, Qiang LIU <godliuqiang@gmail.com> wrote:
>> Hi,
>>
>> I suggest you change another eMMC card or try SDHC card. It seems like
>> a card issue.
> 
> Thanks for the response.  So, do you think this has nothing to do with
> the caching or any such issues, since it is only every 63rd and 64th
> transfer causing this issue?

It is very much possible that the card itself does something internally
on every 63rd or 64th transfer. Such as wear leveling management on the
nand or perhaps some copy-on-write operations if the transfers are not
taking place in contiguous blocks.

As suggested above, you could try with another eMMC or SDCH card if it
makes a different (if possible).

-Timo

Re: eMMC low write speed

[Praveen G K]

On Fri, Sep 23, 2011 at 7:11 AM, Timo Kokkonen <kaapeli@itanic.dy.fi> wrote:
> On 09/23/11 06:03, Praveen G K wrote:
>> Hi Qiang,
>>
>>
>> On Thu, Sep 22, 2011 at 7:16 PM, Qiang LIU <godliuqiang@gmail.com> wrote:
>>> Hi,
>>>
>>> I suggest you change another eMMC card or try SDHC card. It seems like
>>> a card issue.
>>
>> Thanks for the response.  So, do you think this has nothing to do with
>> the caching or any such issues, since it is only every 63rd and 64th
>> transfer causing this issue?
>
> It is very much possible that the card itself does something internally
> on every 63rd or 64th transfer. Such as wear leveling management on the
> nand or perhaps some copy-on-write operations if the transfers are not
> taking place in contiguous blocks.

The way I am testing it is as follows
time -p dd if=/dev/zero of=/dev/mmcblk0 bs=512k count=10 (I have tried
different values for count)

When I especially try for count = 10, I see the request completed in
0.25 seconds or as high as 1 second.  When it is 0.25 s, the speed is
20MBps, and when it is 1s, the speed is 5MBps.  So, I am not sure
whether I am missing something here.
I am using the Sandisk SDIN5C1-4G card for testing.  Any other card of
the same family, I see only a speed of 5MBps.

> As suggested above, you could try with another eMMC or SDCH card if it
> makes a different (if possible).
>
> -Timo
>