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From: Marc Zyngier <marc.zyngier@arm.com>
To: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Cc: "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [PATCH v3 1/3] genirq: add support for per-cpu dev_id interrupts
Date: Fri, 30 Sep 2011 12:08:01 +0100	[thread overview]
Message-ID: <4E85A311.5030805@arm.com> (raw)
In-Reply-To: <4E84088C.8050101@codeaurora.org>

[-- Attachment #1: Type: text/plain, Size: 1861 bytes --]

On 29/09/11 06:56, Abhijeet Dharmapurikar wrote:
> On 09/23/2011 09:03 AM, Marc Zyngier wrote:
>> The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
>> which are usually used to connect local timers to each core.
>> Each CPU has its own private interface to the GIC,
>> and only sees the PPIs that are directly connect to it.
>>
>> While these timers are separate devices and have a separate
>> interrupt line to a core, they all use the same IRQ number.
>>
>> For these devices, request_irq() is not the right API as it
>> assumes that an IRQ number is visible by a number of CPUs
>> (through the affinity setting), but makes it very awkward to
>> express that an IRQ number can be handled by all CPUs, and
>> yet be a different interrupt line on each CPU, requiring a
>> different dev_id cookie to be passed back to the handler.
>>
>> The *_percpu_irq() functions is designed to overcome these
>> limitations, by providing a per-cpu dev_id vector:
>>
>> int request_percpu_irq(unsigned int irq, irq_handler_t handler,
>> 		   const char *devname, void __percpu *percpu_dev_id);
>> void free_percpu_irq(unsigned int, void __percpu *);
>> int setup_percpu_irq(unsigned int irq, struct irqaction *new);
>> void remove_percpu_irq(unsigned int irq, struct irqaction *act);
>> void enable_percpu_irq(unsigned int irq);
> 
> As mentioned here
> https://lkml.org/lkml/2011/9/25/121
> 
> can we add irqflags to enable_percpu_irq? This will make msm's
> usage cleaner and it wont have to rely on accessing the gic
> registers outside the driver.

I have the attached patch in my tree (and obviously hacked the
corresponding timer code).

Can you give it a whirl by removing your private GIC configuration and
passing the type to enable_percpu_irq()?

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0001-genirq-percpu-allow-interrupt-type-to-be-set-at-enab.patch --]
[-- Type: text/x-patch;  name=0001-genirq-percpu-allow-interrupt-type-to-be-set-at-enab.patch, Size: 2214 bytes --]

>From 9b1df95320aea19dce7232e8b7d66104c380aed2 Mon Sep 17 00:00:00 2001
From: Marc Zyngier <marc.zyngier@arm.com>
Date: Fri, 30 Sep 2011 10:48:47 +0100
Subject: [PATCH] genirq: percpu: allow interrupt type to be set at enable time

As request_percpu_irq() doesn't allow for a percpu interrupt
to have its type configured (it is generally impossible to
configure it on all CPUs at once), add a 'type' argument to
enable_percpu_irq().

This allows some low-level, board specific init code to
be switched to a generic API.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 include/linux/interrupt.h |    2 +-
 kernel/irq/manage.c       |   15 ++++++++++++++-
 2 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 1cdfd09..664544f 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -223,7 +223,7 @@ extern void disable_irq_nosync(unsigned int irq);
 extern void disable_irq(unsigned int irq);
 extern void disable_percpu_irq(unsigned int irq);
 extern void enable_irq(unsigned int irq);
-extern void enable_percpu_irq(unsigned int irq);
+extern void enable_percpu_irq(unsigned int irq, unsigned int type);
 
 /* The following three functions are for the core kernel use only. */
 #ifdef CONFIG_GENERIC_HARDIRQS
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index 7b4b156..e647ce1 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -1419,7 +1419,7 @@ int request_any_context_irq(unsigned int irq, irq_handler_t handler,
 }
 EXPORT_SYMBOL_GPL(request_any_context_irq);
 
-void enable_percpu_irq(unsigned int irq)
+void enable_percpu_irq(unsigned int irq, unsigned int type)
 {
 	unsigned int cpu = smp_processor_id();
 	unsigned long flags;
@@ -1428,7 +1428,20 @@ void enable_percpu_irq(unsigned int irq)
 	if (!desc)
 		return;
 
+	type &= IRQ_TYPE_SENSE_MASK;
+	if (type != IRQ_TYPE_NONE) {
+		int ret;
+
+		ret = __irq_set_trigger(desc, irq, type);
+
+		if (ret) {
+			WARN(1, "failed to set type for IRQ%d\n");
+			goto out;
+		}
+	}
+
 	irq_percpu_enable(desc, cpu);
+out:
 	irq_put_desc_unlock(desc, flags);
 }
 
-- 
1.7.0.4

WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 1/3] genirq: add support for per-cpu dev_id interrupts
Date: Fri, 30 Sep 2011 12:08:01 +0100	[thread overview]
Message-ID: <4E85A311.5030805@arm.com> (raw)
In-Reply-To: <4E84088C.8050101@codeaurora.org>

On 29/09/11 06:56, Abhijeet Dharmapurikar wrote:
> On 09/23/2011 09:03 AM, Marc Zyngier wrote:
>> The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
>> which are usually used to connect local timers to each core.
>> Each CPU has its own private interface to the GIC,
>> and only sees the PPIs that are directly connect to it.
>>
>> While these timers are separate devices and have a separate
>> interrupt line to a core, they all use the same IRQ number.
>>
>> For these devices, request_irq() is not the right API as it
>> assumes that an IRQ number is visible by a number of CPUs
>> (through the affinity setting), but makes it very awkward to
>> express that an IRQ number can be handled by all CPUs, and
>> yet be a different interrupt line on each CPU, requiring a
>> different dev_id cookie to be passed back to the handler.
>>
>> The *_percpu_irq() functions is designed to overcome these
>> limitations, by providing a per-cpu dev_id vector:
>>
>> int request_percpu_irq(unsigned int irq, irq_handler_t handler,
>> 		   const char *devname, void __percpu *percpu_dev_id);
>> void free_percpu_irq(unsigned int, void __percpu *);
>> int setup_percpu_irq(unsigned int irq, struct irqaction *new);
>> void remove_percpu_irq(unsigned int irq, struct irqaction *act);
>> void enable_percpu_irq(unsigned int irq);
> 
> As mentioned here
> https://lkml.org/lkml/2011/9/25/121
> 
> can we add irqflags to enable_percpu_irq? This will make msm's
> usage cleaner and it wont have to rely on accessing the gic
> registers outside the driver.

I have the attached patch in my tree (and obviously hacked the
corresponding timer code).

Can you give it a whirl by removing your private GIC configuration and
passing the type to enable_percpu_irq()?

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2011-09-30 11:07 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-09-23 16:03 [PATCH v3 0/3] genirq: handling GIC per-cpu interrupts Marc Zyngier
2011-09-23 16:03 ` Marc Zyngier
2011-09-23 16:03 ` [PATCH v3 1/3] genirq: add support for per-cpu dev_id interrupts Marc Zyngier
2011-09-23 16:03   ` Marc Zyngier
2011-09-29  5:56   ` Abhijeet Dharmapurikar
2011-09-29  5:56     ` Abhijeet Dharmapurikar
2011-09-30 11:08     ` Marc Zyngier [this message]
2011-09-30 11:08       ` Marc Zyngier
2011-09-23 16:03 ` [PATCH v3 2/3] ARM: gic: consolidate PPI handling Marc Zyngier
2011-09-23 16:03   ` Marc Zyngier
2011-09-28  0:59   ` Tony Lindgren
2011-09-23 16:03 ` [PATCH v3 3/3] ARM: gic, local timers: use the request_percpu_irq() interface Marc Zyngier
2011-09-23 16:03   ` Marc Zyngier
2011-09-26 20:18 ` [PATCH v3 0/3] genirq: handling GIC per-cpu interrupts David Brown
2011-09-26 20:18   ` David Brown
2011-09-27  0:11   ` David Brown
2011-09-27  0:11     ` David Brown
2011-09-27 10:21 ` Shawn Guo
2011-09-27 10:21   ` Shawn Guo

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