[U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms

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* [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms
@ 2012-02-06 11:37 Aneesh V
  2012-02-06 11:37 ` [U-Boot] [RFC PATCH 1/4] ARM: enable Thumb build Aneesh V
                   ` (26 more replies)
  0 siblings, 27 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-06 11:37 UTC (permalink / raw)
  To: u-boot

Thumb is an alternate instruction set available in many
ARM processors. Below is a detailed description from ARM
specs:

"The Thumb instruction set is a re-encoded subset of the
ARM instruction set. Thumb instructions execute in their
own processor state, with the architecture defining the
mechanisms required to transition between ARM and Thumb
states. The key difference is that Thumb instructions are
half the size of ARM instructions(16 bits compared with 32
bits). Greater code density can usually be achieved by using
the Thumb instruction set in preference to the ARM instruction
set, at a cost of some reduction in performance"

"In ARMv6T2, Thumb-2 technology is introduced. This technology
makes it possible to extend the original Thumb instruction set
with many 32-bit instructions. The range of 32-bit Thumb instructions
included in ARMv6T2 permits Thumb code to achieve performance
similar to ARM code, with code density better than that of earlier
Thumb code. From ARMv6T2, the ARM and Thumb instruction sets provide
almost identical functionality"

This series adds Thumb support in U-Boot and enables it for
OMAP4. It also fixes issues faced while booting OMAP4 with
Thumb-2 images of U-Boot and SPL.

Thumb mode is becoming increasingly relevant for U-Boot with
the advent of SPL. It's very important to keep SPL size smaller
considering the internal RAM size constraints on many platforms.
On OMAP4 the size reduction enables us to use SPL on secure devices
that have smaller internal RAM available for non-secure world. 

I would request all who are interested in this feature to test it
and give feedback. To make that easier I have pushed my patches
here (along with the timer patch from Nicolas that fixes boot on
OMAP4): 

git at github.com:aneeshv/u-boot.git
branch: thumb

To enable support for new platforms you just need to add
CONFIG_SYS_THUMB_BUILD in your config file.

Aneesh V (4):
  ARM: enable Thumb build
  OMAP3+: fix issues with Thumb build
  OMAP3+: Use -march=armv7-a and thereby enable Thumb-2
  OMAP4: enable Thumb build

 README                                         |    9 +++++++
 arch/arm/config.mk                             |   29 ++++++++++++++----------
 arch/arm/cpu/armv7/cpu.c                       |    4 ++-
 arch/arm/cpu/armv7/omap-common/config.mk       |    1 -
 arch/arm/cpu/armv7/omap-common/hwinit-common.c |   25 ++++++++++++++++++++
 arch/arm/cpu/armv7/omap-common/lowlevel_init.S |    4 +-
 arch/arm/cpu/armv7/omap3/config.mk             |    2 +
 arch/arm/cpu/armv7/omap4/config.mk             |    2 +
 include/configs/omap4_common.h                 |    2 +
 9 files changed, 62 insertions(+), 16 deletions(-)

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [RFC PATCH 1/4] ARM: enable Thumb build
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
@ 2012-02-06 11:37 ` Aneesh V
  2012-02-06 18:45   ` Tom Rini
  2012-02-06 11:37 ` [U-Boot] [RFC PATCH 2/4] OMAP3+: fix issues with " Aneesh V
                   ` (25 subsequent siblings)
  26 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-06 11:37 UTC (permalink / raw)
  To: u-boot

Enable Thumb build and ARM-Thumb interworking based on the new
config flag CONFIG_SYS_THUMB_BUILD

Signed-off-by: Aneesh V <aneesh@ti.com>
---
 README             |    9 +++++++++
 arch/arm/config.mk |   29 +++++++++++++++++------------
 2 files changed, 26 insertions(+), 12 deletions(-)

diff --git a/README b/README
index 9d713e8..dfe7fb3 100644
--- a/README
+++ b/README
@@ -420,6 +420,15 @@ The following options need to be configured:
 		XWAY SoCs for booting from NOR flash. The U-Boot image needs to
 		be swapped if a flash programmer is used.
 
+- ARM Options:
+		CONFIG_SYS_THUMB_BUILD
+
+		Use this flag to build U-Boot using the Thumb instruction
+		set for ARM architectures. Thumb instruction set provides
+		better code density. For ARM architectures that support
+		Thumb2 this flag will result in Thumb2 code generated by
+		GCC.
+
 - Linux Kernel Interface:
 		CONFIG_CLOCKS_IN_MHZ
 
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 45f9dca..9a450d7 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -33,26 +33,31 @@ endif
 
 PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
 
-# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
-PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
+# Choose between ARM/Thumb instruction sets
+ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
+PF_CPPFLAGS_ARM += $(call cc-option, -mthumb -mthumb-interwork, \
+		-marm -mno-thumb-interwork)
+else
+PF_CPPFLAGS_ARM += $(call cc-option, -marm -mno-thumb-interwork)
+endif
 
 # Try if EABI is supported, else fall back to old API,
 # i. e. for example:
 # - with ELDK 4.2 (EABI supported), use:
-#	-mabi=aapcs-linux -mno-thumb-interwork
+#	-mabi=aapcs-linux
 # - with ELDK 4.1 (gcc 4.x, no EABI), use:
-#	-mabi=apcs-gnu -mno-thumb-interwork
+#	-mabi=apcs-gnu
 # - with ELDK 3.1 (gcc 3.x), use:
-#	-mapcs-32 -mno-thumb-interwork
-PF_CPPFLAGS_ABI := $(call cc-option,\
-			-mabi=aapcs-linux -mno-thumb-interwork,\
-			$(call cc-option,\
-				-mapcs-32,\
+#	-mapcs-32
+PLATFORM_CPPFLAGS += $(call cc-option,\
+				-mabi=aapcs-linux,\
 				$(call cc-option,\
-					-mabi=apcs-gnu,\
+					-mapcs-32,\
+					$(call cc-option,\
+						-mabi=apcs-gnu,\
+					)\
 				)\
-			) $(call cc-option,-mno-thumb-interwork,)\
-		)
+			)
 PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARM) $(PF_CPPFLAGS_ABI)
 
 # For EABI, make sure to provide raise()
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [RFC PATCH 1/4] ARM: enable Thumb build
  2012-02-06 11:37 ` [U-Boot] [RFC PATCH 1/4] ARM: enable Thumb build Aneesh V
@ 2012-02-06 18:45   ` Tom Rini
  2012-02-07  7:43     ` Aneesh V
  0 siblings, 1 reply; 83+ messages in thread
From: Tom Rini @ 2012-02-06 18:45 UTC (permalink / raw)
  To: u-boot

On Mon, Feb 6, 2012 at 4:37 AM, Aneesh V <aneesh@ti.com> wrote:
> Enable Thumb build and ARM-Thumb interworking based on the new
> config flag CONFIG_SYS_THUMB_BUILD
>
> Signed-off-by: Aneesh V <aneesh@ti.com>
[snip]
> -# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
> -PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
> +# Choose between ARM/Thumb instruction sets
> +ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
> +PF_CPPFLAGS_ARM += $(call cc-option, -mthumb -mthumb-interwork, \
> + ? ? ? ? ? ? ? -marm -mno-thumb-interwork)
> +else
> +PF_CPPFLAGS_ARM += $(call cc-option, -marm -mno-thumb-interwork)
> +endif

We need the ':=' syntax to evaluate this once rather than for every
file we build.  Same with the rest of the changes here.

-- 
Tom

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [RFC PATCH 1/4] ARM: enable Thumb build
  2012-02-06 18:45   ` Tom Rini
@ 2012-02-07  7:43     ` Aneesh V
  0 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-07  7:43 UTC (permalink / raw)
  To: u-boot

On Tuesday 07 February 2012 12:15 AM, Tom Rini wrote:
> On Mon, Feb 6, 2012 at 4:37 AM, Aneesh V<aneesh@ti.com>  wrote:
>> Enable Thumb build and ARM-Thumb interworking based on the new
>> config flag CONFIG_SYS_THUMB_BUILD
>>
>> Signed-off-by: Aneesh V<aneesh@ti.com>
> [snip]
>> -# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
>> -PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
>> +# Choose between ARM/Thumb instruction sets
>> +ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
>> +PF_CPPFLAGS_ARM += $(call cc-option, -mthumb -mthumb-interwork, \
>> +               -marm -mno-thumb-interwork)
>> +else
>> +PF_CPPFLAGS_ARM += $(call cc-option, -marm -mno-thumb-interwork)
>> +endif
>
> We need the ':=' syntax to evaluate this once rather than for every
> file we build.  Same with the rest of the changes here.
>

Oops! In my initial patch it was affecting PLATFORM_CPPFLAGS. When I
rebased it I didn't notice that PF_CPPFLAGS_ARM was defined for the
first time here. I will fix it.

Thanks,
Aneesh

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [RFC PATCH 2/4] OMAP3+: fix issues with Thumb build
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
  2012-02-06 11:37 ` [U-Boot] [RFC PATCH 1/4] ARM: enable Thumb build Aneesh V
@ 2012-02-06 11:37 ` Aneesh V
  2012-02-06 21:06   ` Albert ARIBAUD
  2012-02-06 11:37 ` [U-Boot] [RFC PATCH 3/4] OMAP3+: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
                   ` (24 subsequent siblings)
  26 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-06 11:37 UTC (permalink / raw)
  To: u-boot

When U-Boot/SPL is built using the Thumb instruction set the
toolchain has a  potential issue with weakly linked symbols.
If a function has a weakly linked default implementation in C
and a real implementation in assembly GCC is confused about the
instruction set of the assembly implementation. As a result
the assembly function that is built in ARM is executed as
if it is Thumb. This results in a crash.

We need to investigate further to see if this is a toolchain
issue or an issue with our usage of it. In the meanwhile, we
can workaround the issue by having both the weakly linked alias
and the real implementation in C.

Signed-off-by: Aneesh V <aneesh@ti.com>
---
 arch/arm/cpu/armv7/cpu.c                       |    4 ++-
 arch/arm/cpu/armv7/omap-common/hwinit-common.c |   25 ++++++++++++++++++++++++
 arch/arm/cpu/armv7/omap-common/lowlevel_init.S |    4 +-
 3 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index 662c496..3844556 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -37,8 +37,10 @@
 #include <asm/cache.h>
 #include <asm/armv7.h>
 
-void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
+void __attribute__((naked)) save_boot_params_default(u32 r0, u32 r1,
+		u32 r2, u32 r3)
 {
+	asm volatile ("blx lr");
 }
 
 void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
index ab46bff..16dfbed 100644
--- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c
+++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
@@ -237,3 +237,28 @@ void enable_caches(void)
 	dcache_enable();
 }
 #endif
+
+/*
+ * This function is a wrapper to do_save_boot_params that does the
+ * real implementation of the functionality. 'do_save_boot_params()' is
+ * implemented in assembly because this is called very early in the boot
+ * when stack is not available. We had to wrap it around in this 'naked'
+ * C function because of a potential issue with the tool-chain.
+ *
+ * When U-Boot/SPL is built using the Thumb instruction set compiler
+ * potential issue with weakly linked symbols. If a function has a weakly
+ * linked default implementation in C and a real implementation in assembly
+ * GCC is confused about the instruction set of the assembly implementation
+ * As a result the assembly function that is built in ARM is executed as
+ * if it is Thumb. This results in a crash. The solution (or workaround)
+ * is to have both the weakly linked alias and the real implementation
+ * in C.
+ *
+ * This function runs without a valid stack. So, never try to use a stack
+ * or any other fancy stuff.
+ */
+void __attribute__((naked)) save_boot_params(u32 r0, u32 r1, u32 r2, u32 r4)
+{
+	asm volatile ("ldr r12, =do_save_boot_params");
+	asm volatile ("bx r12");
+}
diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
index 35f38ac..38ca054 100644
--- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
@@ -28,8 +28,8 @@
 
 #include <asm/arch/omap.h>
 
-.global save_boot_params
-save_boot_params:
+.global do_save_boot_params
+do_save_boot_params:
 	/*
 	 * See if the rom code passed pointer is valid:
 	 * It is not valid if it is not in non-secure SRAM
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [RFC PATCH 2/4] OMAP3+: fix issues with Thumb build
  2012-02-06 11:37 ` [U-Boot] [RFC PATCH 2/4] OMAP3+: fix issues with " Aneesh V
@ 2012-02-06 21:06   ` Albert ARIBAUD
  2012-02-07  7:49     ` Aneesh V
  2012-02-09  8:58     ` Aneesh V
  0 siblings, 2 replies; 83+ messages in thread
From: Albert ARIBAUD @ 2012-02-06 21:06 UTC (permalink / raw)
  To: u-boot

Le 06/02/2012 12:37, Aneesh V a ?crit :
> When U-Boot/SPL is built using the Thumb instruction set the
> toolchain has a  potential issue with weakly linked symbols.
> If a function has a weakly linked default implementation in C
> and a real implementation in assembly GCC is confused about the
> instruction set of the assembly implementation. As a result
> the assembly function that is built in ARM is executed as
> if it is Thumb. This results in a crash.
>
> We need to investigate further to see if this is a toolchain
> issue or an issue with our usage of it. In the meanwhile, we
> can workaround the issue by having both the weakly linked alias
> and the real implementation in C.

I would tend to NAK a patch submission where an issue is known and 
investigation is considered but is actually bypassed by a workaround. 
These tend to turn from 'temporary fix' to 'old crust' with time, 
because there is no incentive for a better solution when the quick fix 
"works, after all".

Amicalement,
-- 
Albert.

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [RFC PATCH 2/4] OMAP3+: fix issues with Thumb build
  2012-02-06 21:06   ` Albert ARIBAUD
@ 2012-02-07  7:49     ` Aneesh V
  2012-02-09  8:58     ` Aneesh V
  1 sibling, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-07  7:49 UTC (permalink / raw)
  To: u-boot

On Tuesday 07 February 2012 02:36 AM, Albert ARIBAUD wrote:
> Le 06/02/2012 12:37, Aneesh V a ?crit :
>> When U-Boot/SPL is built using the Thumb instruction set the
>> toolchain has a potential issue with weakly linked symbols.
>> If a function has a weakly linked default implementation in C
>> and a real implementation in assembly GCC is confused about the
>> instruction set of the assembly implementation. As a result
>> the assembly function that is built in ARM is executed as
>> if it is Thumb. This results in a crash.
>>
>> We need to investigate further to see if this is a toolchain
>> issue or an issue with our usage of it. In the meanwhile, we
>> can workaround the issue by having both the weakly linked alias
>> and the real implementation in C.
>
> I would tend to NAK a patch submission where an issue is known and
> investigation is considered but is actually bypassed by a workaround.
> These tend to turn from 'temporary fix' to 'old crust' with time,
> because there is no incentive for a better solution when the quick fix
> "works, after all".

Fair enough. I did actually report this to Linaro a long time back and
they had started looking into it. But then I couldn't support it
further due to some other activities that pre-empted it. I plan to
revive that thread now and I shall copy you on that. But in case the
issue is root-caused and the problem is indeed with the tool-chain,
then I hope you will accept this patch at least in the interest of
backward compatibility.

Also, I hope you don't object to taking the first patch, after fixing
the comments?

Thanks,
Aneesh

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [RFC PATCH 2/4] OMAP3+: fix issues with Thumb build
  2012-02-06 21:06   ` Albert ARIBAUD
  2012-02-07  7:49     ` Aneesh V
@ 2012-02-09  8:58     ` Aneesh V
  1 sibling, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-09  8:58 UTC (permalink / raw)
  To: u-boot

Hi Albert,

On Tuesday 07 February 2012 02:36 AM, Albert ARIBAUD wrote:
> Le 06/02/2012 12:37, Aneesh V a ?crit :
>> When U-Boot/SPL is built using the Thumb instruction set the
>> toolchain has a potential issue with weakly linked symbols.
>> If a function has a weakly linked default implementation in C
>> and a real implementation in assembly GCC is confused about the
>> instruction set of the assembly implementation. As a result
>> the assembly function that is built in ARM is executed as
>> if it is Thumb. This results in a crash.
>>
>> We need to investigate further to see if this is a toolchain
>> issue or an issue with our usage of it. In the meanwhile, we
>> can workaround the issue by having both the weakly linked alias
>> and the real implementation in C.
>
> I would tend to NAK a patch submission where an issue is known and
> investigation is considered but is actually bypassed by a workaround.
> These tend to turn from 'temporary fix' to 'old crust' with time,
> because there is no incentive for a better solution when the quick fix
> "works, after all".

I have a solution to this problem now. The following change solves it.

diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S 
b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
index 35f38ac..177af7a 100644
--- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
@@ -28,6 +28,7 @@

  #include <asm/arch/omap.h>

+.type   save_boot_params, %function
  .global save_boot_params
  save_boot_params:
  	/*

Apparently having the symbol marked as %function type in the symbol
table helps ld. However, not having the %function tag doesn't prevent
ld from linking correctly to this function. It affects only ARM/Thumb
resolution. Strange!

I came to this solution from the test-code provided by Ulrich Weigand
in reply to my queries in Linaro ML [1]. I couldn't reproduce the
problem with his code, but eventually could break it when I removed
the %function.

I will continue this discussion there and to understand whether this is
a limitation with GCC.

However, hope you are fine with the above solution. I shall fix up all
assembly functions in arm.

[1] http://article.gmane.org/gmane.linux.linaro.devel/3073

br,
Aneesh

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [RFC PATCH 3/4] OMAP3+: Use -march=armv7-a and thereby enable Thumb-2
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
  2012-02-06 11:37 ` [U-Boot] [RFC PATCH 1/4] ARM: enable Thumb build Aneesh V
  2012-02-06 11:37 ` [U-Boot] [RFC PATCH 2/4] OMAP3+: fix issues with " Aneesh V
@ 2012-02-06 11:37 ` Aneesh V
  2012-02-06 11:37 ` [U-Boot] [RFC PATCH 4/4] OMAP4: enable Thumb build Aneesh V
                   ` (23 subsequent siblings)
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-06 11:37 UTC (permalink / raw)
  To: u-boot

Enable -march=armv7-a for OMAP3+ platforms. This in turn
results in Thumb-2 code generated for these platforms if
CONFIG_SYS_THUMB_BUILD is enabled.

Signed-off-by: Aneesh V <aneesh@ti.com>
---
 arch/arm/cpu/armv7/omap-common/config.mk |    1 -
 arch/arm/cpu/armv7/omap3/config.mk       |    2 ++
 arch/arm/cpu/armv7/omap4/config.mk       |    2 ++
 3 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap-common/config.mk b/arch/arm/cpu/armv7/omap-common/config.mk
index c400dcc..2a1a5f3 100644
--- a/arch/arm/cpu/armv7/omap-common/config.mk
+++ b/arch/arm/cpu/armv7/omap-common/config.mk
@@ -23,7 +23,6 @@
 PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
 
 # Make ARMv5 to allow more compilers to work, even though its v7a.
-PLATFORM_CPPFLAGS += -march=armv5
 # =========================================================================
 #
 # Supply options according to compiler version
diff --git a/arch/arm/cpu/armv7/omap3/config.mk b/arch/arm/cpu/armv7/omap3/config.mk
index b34fa64..4421fe2 100644
--- a/arch/arm/cpu/armv7/omap3/config.mk
+++ b/arch/arm/cpu/armv7/omap3/config.mk
@@ -28,3 +28,5 @@ ALL-y	+= $(OBJTREE)/MLO
 else
 ALL-y	+= $(obj)u-boot.img
 endif
+
+PLATFORM_CPPFLAGS += $(call cc-option, -march=armv7-a, -march=armv5)
diff --git a/arch/arm/cpu/armv7/omap4/config.mk b/arch/arm/cpu/armv7/omap4/config.mk
index b34fa64..4421fe2 100644
--- a/arch/arm/cpu/armv7/omap4/config.mk
+++ b/arch/arm/cpu/armv7/omap4/config.mk
@@ -28,3 +28,5 @@ ALL-y	+= $(OBJTREE)/MLO
 else
 ALL-y	+= $(obj)u-boot.img
 endif
+
+PLATFORM_CPPFLAGS += $(call cc-option, -march=armv7-a, -march=armv5)
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [RFC PATCH 4/4] OMAP4: enable Thumb build
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (2 preceding siblings ...)
  2012-02-06 11:37 ` [U-Boot] [RFC PATCH 3/4] OMAP3+: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
@ 2012-02-06 11:37 ` Aneesh V
  2012-02-06 12:26 ` [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (22 subsequent siblings)
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-06 11:37 UTC (permalink / raw)
  To: u-boot

Signed-off-by: Aneesh V <aneesh@ti.com>
---
 include/configs/omap4_common.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
index a989721..01b4d6c 100644
--- a/include/configs/omap4_common.h
+++ b/include/configs/omap4_common.h
@@ -287,4 +287,6 @@
 
 #define CONFIG_SYS_ENABLE_PADS_ALL
 
+#define CONFIG_SYS_THUMB_BUILD
+
 #endif /* __CONFIG_OMAP4_COMMON_H */
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (3 preceding siblings ...)
  2012-02-06 11:37 ` [U-Boot] [RFC PATCH 4/4] OMAP4: enable Thumb build Aneesh V
@ 2012-02-06 12:26 ` Aneesh V
  2012-02-06 13:22   ` Aneesh V
  2012-02-15 13:57 ` [U-Boot] [PATCH " Aneesh V
                   ` (21 subsequent siblings)
  26 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-06 12:26 UTC (permalink / raw)
  To: u-boot

On Monday 06 February 2012 05:07 PM, Aneesh V wrote:
> Thumb is an alternate instruction set available in many
> ARM processors. Below is a detailed description from ARM
> specs:
>
> "The Thumb instruction set is a re-encoded subset of the
> ARM instruction set. Thumb instructions execute in their
> own processor state, with the architecture defining the
> mechanisms required to transition between ARM and Thumb
> states. The key difference is that Thumb instructions are
> half the size of ARM instructions(16 bits compared with 32
> bits). Greater code density can usually be achieved by using
> the Thumb instruction set in preference to the ARM instruction
> set, at a cost of some reduction in performance"
>
> "In ARMv6T2, Thumb-2 technology is introduced. This technology
> makes it possible to extend the original Thumb instruction set
> with many 32-bit instructions. The range of 32-bit Thumb instructions
> included in ARMv6T2 permits Thumb code to achieve performance
> similar to ARM code, with code density better than that of earlier
> Thumb code. From ARMv6T2, the ARM and Thumb instruction sets provide
> almost identical functionality"
>
> This series adds Thumb support in U-Boot and enables it for
> OMAP4. It also fixes issues faced while booting OMAP4 with
> Thumb-2 images of U-Boot and SPL.
>
> Thumb mode is becoming increasingly relevant for U-Boot with
> the advent of SPL. It's very important to keep SPL size smaller
> considering the internal RAM size constraints on many platforms.
> On OMAP4 the size reduction enables us to use SPL on secure devices
> that have smaller internal RAM available for non-secure world.
>
> I would request all who are interested in this feature to test it
> and give feedback. To make that easier I have pushed my patches
> here (along with the timer patch from Nicolas that fixes boot on
> OMAP4):
>
> git at github.com:aneeshv/u-boot.git
> branch: thumb
>
> To enable support for new platforms you just need to add
> CONFIG_SYS_THUMB_BUILD in your config file.

Some statistics:

Code-size reduction:
Image		ARM build	Thumb build	% Reduction
u-boot.bin	190408		144676		24.01%
u-boot-spl.bin	33200		25096		24.40%

Performance(timestamp just before the main loop):
ARM build	Thumb build	% Reduction
898510us	878247us	-2.25%

That is, performance actually improved marginally for the Thumb
build, maybe because of the reduced image sizes.

br,
Aneesh

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms
  2012-02-06 12:26 ` [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
@ 2012-02-06 13:22   ` Aneesh V
  0 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-06 13:22 UTC (permalink / raw)
  To: u-boot

On Monday 06 February 2012 05:56 PM, Aneesh V wrote:
> On Monday 06 February 2012 05:07 PM, Aneesh V wrote:
>> Thumb is an alternate instruction set available in many
>> ARM processors. Below is a detailed description from ARM
>> specs:
>>
>> "The Thumb instruction set is a re-encoded subset of the
>> ARM instruction set. Thumb instructions execute in their
>> own processor state, with the architecture defining the
>> mechanisms required to transition between ARM and Thumb
>> states. The key difference is that Thumb instructions are
>> half the size of ARM instructions(16 bits compared with 32
>> bits). Greater code density can usually be achieved by using
>> the Thumb instruction set in preference to the ARM instruction
>> set, at a cost of some reduction in performance"
>>
>> "In ARMv6T2, Thumb-2 technology is introduced. This technology
>> makes it possible to extend the original Thumb instruction set
>> with many 32-bit instructions. The range of 32-bit Thumb instructions
>> included in ARMv6T2 permits Thumb code to achieve performance
>> similar to ARM code, with code density better than that of earlier
>> Thumb code. From ARMv6T2, the ARM and Thumb instruction sets provide
>> almost identical functionality"
>>
>> This series adds Thumb support in U-Boot and enables it for
>> OMAP4. It also fixes issues faced while booting OMAP4 with
>> Thumb-2 images of U-Boot and SPL.
>>
>> Thumb mode is becoming increasingly relevant for U-Boot with
>> the advent of SPL. It's very important to keep SPL size smaller
>> considering the internal RAM size constraints on many platforms.
>> On OMAP4 the size reduction enables us to use SPL on secure devices
>> that have smaller internal RAM available for non-secure world.
>>
>> I would request all who are interested in this feature to test it
>> and give feedback. To make that easier I have pushed my patches
>> here (along with the timer patch from Nicolas that fixes boot on
>> OMAP4):
>>
>> git at github.com:aneeshv/u-boot.git
>> branch: thumb
>>
>> To enable support for new platforms you just need to add
>> CONFIG_SYS_THUMB_BUILD in your config file.
>
> Some statistics:
>
> Code-size reduction:
> Image ARM build Thumb build % Reduction
> u-boot.bin 190408 144676 24.01%
> u-boot-spl.bin 33200 25096 24.40%
>
> Performance(timestamp just before the main loop):
> ARM build Thumb build % Reduction
> 898510us 878247us -2.25%
>
> That is, performance actually improved marginally for the Thumb
> build, maybe because of the reduced image sizes.

Oops! I missed details about the tool-chains I used. I succcessfully
tried the following tool-chains for the Thumb build.

1. Sourcery G++ Lite 2010q1-202
arm-none-linux-gnueabi-gcc (Sourcery G++ Lite 2010q1-202) 4.4.1
GNU ld (Sourcery G++ Lite 2010q1-202) - binutils 2.19.51.20090709

2. Linaro 4.6-2012.01
arm-linux-gnueabi-gcc (crosstool-NG linaro-1.13.1-2012.01-20120125 - 
Linaro GCC 2012.01) 4.6.3 20120105 (prerelease)
GNU ld (crosstool-NG linaro-1.13.1-2012.01-20120125 - Linaro GCC 
2012.01) 2.22

Test reports with different tool-chains will be greatly appreciated!

best regards,
Aneesh

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 0/4] Enable Thumb build for ARM platforms
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (4 preceding siblings ...)
  2012-02-06 12:26 ` [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
@ 2012-02-15 13:57 ` Aneesh V
  2012-02-15 13:57 ` [U-Boot] [PATCH 1/4] ARM: enable Thumb build Aneesh V
                   ` (20 subsequent siblings)
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-15 13:57 UTC (permalink / raw)
  To: u-boot

Thumb is an alternate instruction set available in many
ARM processors. Below is a detailed description from ARM
specs:

"The Thumb instruction set is a re-encoded subset of the
ARM instruction set. Thumb instructions execute in their
own processor state, with the architecture defining the
mechanisms required to transition between ARM and Thumb
states. The key difference is that Thumb instructions are
half the size of ARM instructions(16 bits compared with 32
bits). Greater code density can usually be achieved by using
the Thumb instruction set in preference to the ARM instruction
set, at a cost of some reduction in performance"

"In ARMv6T2, Thumb-2 technology is introduced. This technology
makes it possible to extend the original Thumb instruction set
with many 32-bit instructions. The range of 32-bit Thumb instructions
included in ARMv6T2 permits Thumb code to achieve performance
similar to ARM code, with code density better than that of earlier
Thumb code. From ARMv6T2, the ARM and Thumb instruction sets provide
almost identical functionality"

This series adds Thumb support in U-Boot and enables it for
OMAP4. It also fixes issues faced while booting OMAP4 with
Thumb-2 images of U-Boot and SPL.

Thumb mode is becoming increasingly relevant for U-Boot with
the advent of SPL. It's very important to keep SPL size smaller
considering the internal RAM size constraints on many platforms.
On OMAP4 the size reduction enables us to use SPL on secure devices
that have smaller internal RAM available for non-secure world. 

I would request all who are interested in this feature to test it
and give feedback. To make that easier I have pushed my patches
here (along with the timer patch from Nicolas that fixes boot on
OMAP4): 

git at github.com:aneeshv/u-boot.git
branch: thumb

To enable support for new platforms you just need to add
CONFIG_SYS_THUMB_BUILD in your config file.

Tool-chains tried:
1. Sourcery G++ Lite 2010q1-202
arm-none-linux-gnueabi-gcc (Sourcery G++ Lite 2010q1-202) 4.4.1
GNU ld (Sourcery G++ Lite 2010q1-202) - binutils 2.19.51.20090709

2. Linaro 4.6-2012.01
arm-linux-gnueabi-gcc (crosstool-NG linaro-1.13.1-2012.01-20120125 -
	Linaro GCC 2012.01) 4.6.3 20120105 (prerelease)
GNU ld (crosstool-NG linaro-1.13.1-2012.01-20120125 - Linaro GCC 2012.01) 2.22

Code-size reduction:
Image		ARM build	Thumb build	% Reduction
u-boot.bin	190408		144676		24.01%
u-boot-spl.bin	33200		25096		24.40%

Performance(timestamp just before the main loop):
ARM build	Thumb build	% Reduction
898510us	878247us	-2.25%

Performance actually improved marginally for the Thumb
build, maybe because of the reduced image sizes. 

Aneesh V (4):
  ARM: enable Thumb build
  arm: add %function attribute to assembly functions
  armv7: Use -march=armv7-a and thereby enable Thumb-2
  OMAP4: enable Thumb build

 README                                         |    9 +++++
 arch/arm/config.mk                             |   20 +++++++---
 arch/arm/cpu/arm1136/omap24xx/reset.S          |    3 +-
 arch/arm/cpu/arm1136/start.S                   |    7 +++-
 arch/arm/cpu/arm1176/s3c64xx/cpu_init.S        |    3 +-
 arch/arm/cpu/arm1176/s3c64xx/reset.S           |    3 +-
 arch/arm/cpu/arm1176/start.S                   |    9 +++--
 arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S |    3 +-
 arch/arm/cpu/arm720t/lpc2292/iap_entry.S       |    3 +-
 arch/arm/cpu/arm720t/start.S                   |   12 ++++--
 arch/arm/cpu/arm920t/a320/reset.S              |    1 +
 arch/arm/cpu/arm920t/at91/lowlevel_init.S      |    3 +-
 arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S    |    3 +-
 arch/arm/cpu/arm920t/ks8695/lowlevel_init.S    |    3 +-
 arch/arm/cpu/arm920t/start.S                   |    6 ++-
 arch/arm/cpu/arm925t/start.S                   |    9 +++--
 arch/arm/cpu/arm926ejs/at91/lowlevel_init.S    |    4 +-
 arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S |    3 +-
 arch/arm/cpu/arm926ejs/davinci/reset.S         |    3 +-
 arch/arm/cpu/arm926ejs/mx28/start.S            |    3 +-
 arch/arm/cpu/arm926ejs/nomadik/reset.S         |    3 +-
 arch/arm/cpu/arm926ejs/omap/reset.S            |    3 +-
 arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S |    3 +-
 arch/arm/cpu/arm926ejs/start.S                 |    9 +++--
 arch/arm/cpu/arm926ejs/versatile/reset.S       |    3 +-
 arch/arm/cpu/arm946es/start.S                  |    9 +++--
 arch/arm/cpu/arm_intcm/start.S                 |   15 ++------
 arch/arm/cpu/armv7/config.mk                   |    5 ++-
 arch/arm/cpu/armv7/mx5/lowlevel_init.S         |    3 +-
 arch/arm/cpu/armv7/mx6/lowlevel_init.S         |    3 +-
 arch/arm/cpu/armv7/omap-common/lowlevel_init.S |    9 +++--
 arch/arm/cpu/armv7/omap-common/reset.S         |    1 +
 arch/arm/cpu/armv7/omap3/lowlevel_init.S       |   45 ++++++++++++++++--------
 arch/arm/cpu/armv7/s5pc1xx/cache.S             |    2 +
 arch/arm/cpu/armv7/s5pc1xx/reset.S             |    3 +-
 arch/arm/cpu/armv7/start.S                     |    9 +++--
 arch/arm/cpu/armv7/tegra2/lowlevel_init.S      |    1 +
 arch/arm/cpu/armv7/u8500/lowlevel.S            |    6 ++-
 arch/arm/cpu/ixp/start.S                       |    9 +++--
 arch/arm/cpu/lh7a40x/start.S                   |    9 +++--
 arch/arm/cpu/pxa/start.S                       |    6 ++-
 arch/arm/cpu/s3c44b0/start.S                   |    6 ++-
 arch/arm/cpu/sa1100/start.S                    |    9 +++--
 arch/arm/lib/_ashldi3.S                        |    6 ++-
 arch/arm/lib/_ashrdi3.S                        |    6 ++-
 arch/arm/lib/_divsi3.S                         |    6 ++-
 arch/arm/lib/_lshrdi3.S                        |    6 ++-
 arch/arm/lib/_modsi3.S                         |    3 +-
 arch/arm/lib/_udivsi3.S                        |    6 ++-
 arch/arm/lib/memcpy.S                          |    3 +-
 arch/arm/lib/memset.S                          |    3 +-
 include/configs/omap4_common.h                 |    2 +
 52 files changed, 214 insertions(+), 108 deletions(-)

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 1/4] ARM: enable Thumb build
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (5 preceding siblings ...)
  2012-02-15 13:57 ` [U-Boot] [PATCH " Aneesh V
@ 2012-02-15 13:57 ` Aneesh V
  2012-02-15 13:57 ` [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions Aneesh V
                   ` (19 subsequent siblings)
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-15 13:57 UTC (permalink / raw)
  To: u-boot

Enable Thumb build and ARM-Thumb interworking based on the new
config flag CONFIG_SYS_THUMB_BUILD

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Changes from RFC to V1:
- Fixed review comments from Tom Rini <trini@ti.com>
---
 README             |    9 +++++++++
 arch/arm/config.mk |   20 ++++++++++++++------
 2 files changed, 23 insertions(+), 6 deletions(-)

diff --git a/README b/README
index 4343057..5345ad2 100644
--- a/README
+++ b/README
@@ -420,6 +420,15 @@ The following options need to be configured:
 		XWAY SoCs for booting from NOR flash. The U-Boot image needs to
 		be swapped if a flash programmer is used.
 
+- ARM Options:
+		CONFIG_SYS_THUMB_BUILD
+
+		Use this flag to build U-Boot using the Thumb instruction
+		set for ARM architectures. Thumb instruction set provides
+		better code density. For ARM architectures that support
+		Thumb2 this flag will result in Thumb2 code generated by
+		GCC.
+
 - Linux Kernel Interface:
 		CONFIG_CLOCKS_IN_MHZ
 
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 45f9dca..de9aa53 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -33,25 +33,33 @@ endif
 
 PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
 
-# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
+# Choose between ARM/Thumb instruction sets
+ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
+PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
+			$(call cc-option,-marm,)\
+			$(call cc-option,-mno-thumb-interwork,)\
+		)
+else
 PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
+PF_CPPFLAGS_ARM += $(call cc-option,-mno-thumb-interwork,)
+endif
 
 # Try if EABI is supported, else fall back to old API,
 # i. e. for example:
 # - with ELDK 4.2 (EABI supported), use:
-#	-mabi=aapcs-linux -mno-thumb-interwork
+#	-mabi=aapcs-linux
 # - with ELDK 4.1 (gcc 4.x, no EABI), use:
-#	-mabi=apcs-gnu -mno-thumb-interwork
+#	-mabi=apcs-gnu
 # - with ELDK 3.1 (gcc 3.x), use:
-#	-mapcs-32 -mno-thumb-interwork
+#	-mapcs-32
 PF_CPPFLAGS_ABI := $(call cc-option,\
-			-mabi=aapcs-linux -mno-thumb-interwork,\
+			-mabi=aapcs-linux,\
 			$(call cc-option,\
 				-mapcs-32,\
 				$(call cc-option,\
 					-mabi=apcs-gnu,\
 				)\
-			) $(call cc-option,-mno-thumb-interwork,)\
+			)\
 		)
 PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARM) $(PF_CPPFLAGS_ABI)
 
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (6 preceding siblings ...)
  2012-02-15 13:57 ` [U-Boot] [PATCH 1/4] ARM: enable Thumb build Aneesh V
@ 2012-02-15 13:57 ` Aneesh V
  2012-02-17 11:09   ` Aneesh V
                     ` (2 more replies)
  2012-02-15 13:57 ` [U-Boot] [PATCH 3/4] armv7: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
                   ` (18 subsequent siblings)
  26 siblings, 3 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-15 13:57 UTC (permalink / raw)
  To: u-boot

This is done using the following directive preceding
each function definition:

.type <func-name>, %function

This marks the symbol as a function in the object
header which in turn helps the linker in some cases.

In particular this was found needed for resolving ARM/Thumb
calls correctly in a build with Thumb interworking enabled.

This solves the following problem I had reported earlier:

"When U-Boot/SPL is built using the Thumb instruction set the
toolchain has a  potential issue with weakly linked symbols.
If a function has a weakly linked default implementation in C
and a real implementation in assembly GCC is confused about the
instruction set of the assembly implementation. As a result
the assembly function that is built in ARM is executed as
if it is Thumb. This results in a crash"

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Changes from RFC to V1:
- This change completely replaces the previous workaround for
  the ARM/Thumb interwork problem, which was to wrap around
  the assembly function in question with a naked C function
---
 arch/arm/cpu/arm1136/omap24xx/reset.S          |    3 +-
 arch/arm/cpu/arm1136/start.S                   |    7 +++-
 arch/arm/cpu/arm1176/s3c64xx/cpu_init.S        |    3 +-
 arch/arm/cpu/arm1176/s3c64xx/reset.S           |    3 +-
 arch/arm/cpu/arm1176/start.S                   |    9 +++--
 arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S |    3 +-
 arch/arm/cpu/arm720t/lpc2292/iap_entry.S       |    3 +-
 arch/arm/cpu/arm720t/start.S                   |   12 ++++--
 arch/arm/cpu/arm920t/a320/reset.S              |    1 +
 arch/arm/cpu/arm920t/at91/lowlevel_init.S      |    3 +-
 arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S    |    3 +-
 arch/arm/cpu/arm920t/ks8695/lowlevel_init.S    |    3 +-
 arch/arm/cpu/arm920t/start.S                   |    6 ++-
 arch/arm/cpu/arm925t/start.S                   |    9 +++--
 arch/arm/cpu/arm926ejs/at91/lowlevel_init.S    |    4 +-
 arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S |    3 +-
 arch/arm/cpu/arm926ejs/davinci/reset.S         |    3 +-
 arch/arm/cpu/arm926ejs/mx28/start.S            |    3 +-
 arch/arm/cpu/arm926ejs/nomadik/reset.S         |    3 +-
 arch/arm/cpu/arm926ejs/omap/reset.S            |    3 +-
 arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S |    3 +-
 arch/arm/cpu/arm926ejs/start.S                 |    9 +++--
 arch/arm/cpu/arm926ejs/versatile/reset.S       |    3 +-
 arch/arm/cpu/arm946es/start.S                  |    9 +++--
 arch/arm/cpu/arm_intcm/start.S                 |   15 ++------
 arch/arm/cpu/armv7/mx5/lowlevel_init.S         |    3 +-
 arch/arm/cpu/armv7/mx6/lowlevel_init.S         |    3 +-
 arch/arm/cpu/armv7/omap-common/lowlevel_init.S |    9 +++--
 arch/arm/cpu/armv7/omap-common/reset.S         |    1 +
 arch/arm/cpu/armv7/omap3/lowlevel_init.S       |   45 ++++++++++++++++--------
 arch/arm/cpu/armv7/s5pc1xx/cache.S             |    2 +
 arch/arm/cpu/armv7/s5pc1xx/reset.S             |    3 +-
 arch/arm/cpu/armv7/start.S                     |    9 +++--
 arch/arm/cpu/armv7/tegra2/lowlevel_init.S      |    1 +
 arch/arm/cpu/armv7/u8500/lowlevel.S            |    6 ++-
 arch/arm/cpu/ixp/start.S                       |    9 +++--
 arch/arm/cpu/lh7a40x/start.S                   |    9 +++--
 arch/arm/cpu/pxa/start.S                       |    6 ++-
 arch/arm/cpu/s3c44b0/start.S                   |    6 ++-
 arch/arm/cpu/sa1100/start.S                    |    9 +++--
 arch/arm/lib/_ashldi3.S                        |    6 ++-
 arch/arm/lib/_ashrdi3.S                        |    6 ++-
 arch/arm/lib/_divsi3.S                         |    6 ++-
 arch/arm/lib/_lshrdi3.S                        |    6 ++-
 arch/arm/lib/_modsi3.S                         |    3 +-
 arch/arm/lib/_udivsi3.S                        |    6 ++-
 arch/arm/lib/memcpy.S                          |    3 +-
 arch/arm/lib/memset.S                          |    3 +-
 48 files changed, 186 insertions(+), 100 deletions(-)

diff --git a/arch/arm/cpu/arm1136/omap24xx/reset.S b/arch/arm/cpu/arm1136/omap24xx/reset.S
index 5f8343f..917a934 100644
--- a/arch/arm/cpu/arm1136/omap24xx/reset.S
+++ b/arch/arm/cpu/arm1136/omap24xx/reset.S
@@ -30,7 +30,8 @@
 
 #include <asm/arch/omap2420.h>
 
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 reset_cpu:
 	ldr	r1, rstctl	/* get addr for global reset reg */
 	mov	r3, #0x2	/* full reset pll+mpu */
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index c0db96c..972fc0e 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -31,7 +31,8 @@
 #include <asm-offsets.h>
 #include <config.h>
 #include <version.h>
-.globl _start
+.type	_start, %function
+.global	_start
 _start: b	reset
 #ifdef CONFIG_SPL_BUILD
 	ldr	pc, _hang
@@ -178,7 +179,8 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
+.type	relocate_code, %function
+.global	relocate_code
 relocate_code:
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
@@ -510,6 +512,7 @@ fiq:
 
 #endif
 	.align 5
+.type	arm1136_cache_flush, %function
 .global arm1136_cache_flush
 arm1136_cache_flush:
 #if !defined(CONFIG_SYS_ICACHE_OFF)
diff --git a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S b/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S
index df88cba..886a5ad 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S
+++ b/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S
@@ -26,7 +26,8 @@
 #include <config.h>
 #include <asm/arch/s3c6400.h>
 
-	.globl mem_ctrl_asm_init
+.type	mem_ctrl_asm_init, %function
+.global	mem_ctrl_asm_init
 mem_ctrl_asm_init:
 	/* DMC1 base address 0x7e001000 */
 	ldr	r0, =ELFIN_DMC1_BASE
diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.S b/arch/arm/cpu/arm1176/s3c64xx/reset.S
index eae572e..a33b063 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/reset.S
+++ b/arch/arm/cpu/arm1176/s3c64xx/reset.S
@@ -23,7 +23,8 @@
 
 #include <asm/arch/s3c6400.h>
 
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 reset_cpu:
 	ldr	r1, =ELFIN_CLOCK_POWER_BASE
 	ldr	r2, [r1, #SYS_ID_OFFSET]
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 848144a..e97a413 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -49,7 +49,8 @@
  *************************************************************************
  */
 
-.globl _start
+.type	_start, %function
+.global	_start
 _start: b	reset
 #ifndef CONFIG_NAND_SPL
 	ldr	pc, _undefined_instruction
@@ -240,7 +241,8 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
+.type	relocate_code, %function
+.global	relocate_code
 relocate_code:
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
@@ -406,7 +408,8 @@ _mmu_table_base:
  * void	theLastJump(void *kernel, int arch_num, uint boot_params);
  */
 #ifdef CONFIG_ENABLE_MMU
-	.globl theLastJump
+.type	theLastJump, %function
+.global	theLastJump
 theLastJump:
 	mov	r9, r0
 	ldr	r3, =0xfff00000
diff --git a/arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S b/arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S
index 3ee32ef..6d1e7e6 100644
--- a/arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S
+++ b/arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S
@@ -19,7 +19,8 @@
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-.globl lowlevel_init
+.type	lowlevel_init, %function
+.global	lowlevel_init
 lowlevel_init:
 	/* nothing for now, maybe needed for more exotic boot modes */
 	mov	pc, lr
diff --git a/arch/arm/cpu/arm720t/lpc2292/iap_entry.S b/arch/arm/cpu/arm720t/lpc2292/iap_entry.S
index c31d519..a944c35 100644
--- a/arch/arm/cpu/arm720t/lpc2292/iap_entry.S
+++ b/arch/arm/cpu/arm720t/lpc2292/iap_entry.S
@@ -1,6 +1,7 @@
 IAP_ADDRESS:	.word	0x7FFFFFF1
 
-.globl iap_entry
+.type	iap_entry, %function
+.global	iap_entry
 iap_entry:
 	ldr	r2, IAP_ADDRESS
 	bx	r2
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index 540e3c2..e34a8bc 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -37,7 +37,8 @@
  */
 
 
-.globl _start
+.type	_start, %function
+.global	_start
 _start: b	reset
 	ldr	pc, _undefined_instruction
 	ldr	pc, _software_interrupt
@@ -155,7 +156,8 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
+.type	relocate_code, %function
+.global	relocate_code
 relocate_code:
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
@@ -590,7 +592,8 @@ fiq:
 
 #if defined(CONFIG_NETARM)
 	.align	5
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 reset_cpu:
 	ldr	r1, =NETARM_MEM_MODULE_BASE
 	ldr	r0, [r1, #+NETARM_MEM_CS0_BASE_ADDR]
@@ -615,7 +618,8 @@ reset_cpu:
 	/* No specific reset actions for IntegratorAP/CM720T as yet */
 #elif defined(CONFIG_LPC2292)
 	.align	5
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 reset_cpu:
 	mov	pc, r0
 #else
diff --git a/arch/arm/cpu/arm920t/a320/reset.S b/arch/arm/cpu/arm920t/a320/reset.S
index 12ca527..6c83245 100644
--- a/arch/arm/cpu/arm920t/a320/reset.S
+++ b/arch/arm/cpu/arm920t/a320/reset.S
@@ -17,6 +17,7 @@
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
+.type reset_cpu, %function
 .global reset_cpu
 reset_cpu:
 	b	reset_cpu
diff --git a/arch/arm/cpu/arm920t/at91/lowlevel_init.S b/arch/arm/cpu/arm920t/at91/lowlevel_init.S
index 8b58ba9..ea7676a 100644
--- a/arch/arm/cpu/arm920t/at91/lowlevel_init.S
+++ b/arch/arm/cpu/arm920t/at91/lowlevel_init.S
@@ -44,7 +44,8 @@ _MTEXT_BASE:
 	.word	CONFIG_SYS_TEXT_BASE
 #endif
 
-.globl lowlevel_init
+.type	lowlevel_init, %function
+.global	lowlevel_init
 lowlevel_init:
 	ldr     r1, =AT91_ASM_PMC_MOR
 	/* Main oscillator Enable register */
diff --git a/arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S b/arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S
index f21e237..b038298 100644
--- a/arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S
+++ b/arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S
@@ -27,7 +27,8 @@
 #include <version.h>
 #include <asm/arch/ep93xx.h>
 
-.globl lowlevel_init
+.type	lowlevel_init, %function
+.global	lowlevel_init
 lowlevel_init:
 	/* backup return address */
 	ldr r1, =SYSCON_SCRATCH0
diff --git a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
index e9f1227..b3f6c3e 100644
--- a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
+++ b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
@@ -64,7 +64,8 @@
  *************************************************************************
  */
 
-.globl lowlevel_init
+.type	lowlevel_init, %function
+.global	lowlevel_init
 lowlevel_init:
 
 #if DEBUG
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 8c5612c..43b9e3c 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -37,7 +37,8 @@
  */
 
 
-.globl _start
+.type	_start, %function
+.global	_start
 _start:	b	start_code
 	ldr	pc, _undefined_instruction
 	ldr	pc, _software_interrupt
@@ -198,7 +199,8 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
+.type	relocate_code, %function
+.global	relocate_code
 relocate_code:
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S
index dbb93ef..de277e6 100644
--- a/arch/arm/cpu/arm925t/start.S
+++ b/arch/arm/cpu/arm925t/start.S
@@ -47,7 +47,8 @@
  */
 
 
-.globl _start
+.type	_start, %function
+.global	_start
 _start:	b       reset
 	ldr	pc, _undefined_instruction
 	ldr	pc, _software_interrupt
@@ -192,7 +193,8 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
+.type	relocate_code, %function
+.global	relocate_code
 relocate_code:
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
@@ -507,7 +509,8 @@ fiq:
 #endif
 
 	.align	5
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 reset_cpu:
 	ldr	r1, rstctl1     /* get clkm1 reset ctl */
 	mov     r3, #0x3	/* dsp_en + arm_rst = global reset */
diff --git a/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S b/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S
index d102195..f946977 100644
--- a/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S
+++ b/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S
@@ -45,8 +45,8 @@
 _TEXT_BASE:
 	.word	CONFIG_SYS_TEXT_BASE
 
-.globl lowlevel_init
-.type lowlevel_init,function
+.type	lowlevel_init, %function
+.global	lowlevel_init
 lowlevel_init:
 
 	mov	r5, pc		/* r5 = POS1 + 4 current */
diff --git a/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S b/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S
index 7a169b1..4161e93 100644
--- a/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S
+++ b/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S
@@ -47,7 +47,8 @@
 
 #define MDSTAT_STATE	0x3f
 
-.globl	lowlevel_init
+.type	lowlevel_init, %function
+.global	lowlevel_init
 lowlevel_init:
 
 	/*-------------------------------------------------------*
diff --git a/arch/arm/cpu/arm926ejs/davinci/reset.S b/arch/arm/cpu/arm926ejs/davinci/reset.S
index ba0a7c3..8dbb2fa 100644
--- a/arch/arm/cpu/arm926ejs/davinci/reset.S
+++ b/arch/arm/cpu/arm926ejs/davinci/reset.S
@@ -21,7 +21,8 @@
  * MA 02111-1307 USA
  */
 
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 reset_cpu:
 	ldr	r0, WDT_TGCR
 	mov	r1, $0x08
diff --git a/arch/arm/cpu/arm926ejs/mx28/start.S b/arch/arm/cpu/arm926ejs/mx28/start.S
index 2cd4d73..a284b4c 100644
--- a/arch/arm/cpu/arm926ejs/mx28/start.S
+++ b/arch/arm/cpu/arm926ejs/mx28/start.S
@@ -49,7 +49,8 @@
  */
 
 
-.globl _start
+.type	_start, %function
+.global	_start
 _start:
 	b	reset
 	b	undefined_instruction
diff --git a/arch/arm/cpu/arm926ejs/nomadik/reset.S b/arch/arm/cpu/arm926ejs/nomadik/reset.S
index ec95472..184c066 100644
--- a/arch/arm/cpu/arm926ejs/nomadik/reset.S
+++ b/arch/arm/cpu/arm926ejs/nomadik/reset.S
@@ -4,7 +4,8 @@
  */
 
 	.align 5
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 reset_cpu:
 	ldr	r0, =NOMADIK_SRC_BASE	/* System and Reset Controller */
 	ldr	r1, =0x1
diff --git a/arch/arm/cpu/arm926ejs/omap/reset.S b/arch/arm/cpu/arm926ejs/omap/reset.S
index 8321072..3e729a4 100644
--- a/arch/arm/cpu/arm926ejs/omap/reset.S
+++ b/arch/arm/cpu/arm926ejs/omap/reset.S
@@ -31,7 +31,8 @@
  */
 
 	.align	5
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 reset_cpu:
 	ldr	r1, rstctl1	/* get clkm1 reset ctl */
 	mov	r3, #0x0
diff --git a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S
index a2de3cf..4e17a38 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S
+++ b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S
@@ -82,7 +82,8 @@
  * up RAM for us to relocate into.
  */
 
-.globl lowlevel_init
+.type	lowlevel_init, %function
+.global	lowlevel_init
 
 lowlevel_init:
 
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 6a09c02..928c36d 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -52,14 +52,16 @@
 
 
 #ifdef CONFIG_SYS_DV_NOR_BOOT_CFG
-.globl _start
+.type	_start, %function
+.global	_start
 _start:
 .globl _NOR_BOOT_CFG
 _NOR_BOOT_CFG:
 	.word	CONFIG_SYS_DV_NOR_BOOT_CFG
 	b	reset
 #else
-.globl _start
+.type	_start, %function
+.global	_start
 _start:
 	b	reset
 #endif
@@ -220,7 +222,8 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
+.type	relocate_code, %function
+.global	relocate_code
 relocate_code:
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
diff --git a/arch/arm/cpu/arm926ejs/versatile/reset.S b/arch/arm/cpu/arm926ejs/versatile/reset.S
index 8321072..3e729a4 100644
--- a/arch/arm/cpu/arm926ejs/versatile/reset.S
+++ b/arch/arm/cpu/arm926ejs/versatile/reset.S
@@ -31,7 +31,8 @@
  */
 
 	.align	5
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 reset_cpu:
 	ldr	r1, rstctl1	/* get clkm1 reset ctl */
 	mov	r3, #0x0
diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index 89ba558..7a6f81a 100644
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -44,7 +44,8 @@
  */
 
 
-.globl _start
+.type	_start, %function
+.global	_start
 _start:
 	b	reset
 	ldr	pc, _undefined_instruction
@@ -163,7 +164,8 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
+.type	relocate_code, %function
+.global	relocate_code
 relocate_code:
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
@@ -482,7 +484,8 @@ fiq:
 #else
 
 	.align	5
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 reset_cpu:
 
 	ldr	r1, rstctl1	/* get clkm1 reset ctl */
diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S
index 2033b36..ff7f040 100644
--- a/arch/arm/cpu/arm_intcm/start.S
+++ b/arch/arm/cpu/arm_intcm/start.S
@@ -42,7 +42,8 @@
  *************************************************************************
  */
 
-.globl _start
+.type	_start, %function
+.global	_start
 _start:
 	b	reset
 	ldr	pc, _undefined_instruction
@@ -159,7 +160,8 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
+.type	relocate_code, %function
+.global	relocate_code
 relocate_code:
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
@@ -393,35 +395,30 @@ cpu_init_crit:
  * exception handlers
  */
 	.align  5
-.globl undefined_instruction
 undefined_instruction:
 	get_bad_stack
 	bad_save_user_regs
 	bl	do_undefined_instruction
 
 	.align	5
-.globl software_interrupt
 software_interrupt:
 	get_bad_stack
 	bad_save_user_regs
 	bl	do_software_interrupt
 
 	.align	5
-.globl prefetch_abort
 prefetch_abort:
 	get_bad_stack
 	bad_save_user_regs
 	bl	do_prefetch_abort
 
 	.align	5
-.globl data_abort
 data_abort:
 	get_bad_stack
 	bad_save_user_regs
 	bl	do_data_abort
 
 	.align	5
-.globl not_used
 not_used:
 	get_bad_stack
 	bad_save_user_regs
@@ -429,7 +426,6 @@ not_used:
 
 #ifdef CONFIG_USE_IRQ
 	.align	5
-.globl irq
 irq:
 	get_irq_stack
 	irq_save_user_regs
@@ -437,7 +433,6 @@ irq:
 	irq_restore_user_regs
 
 	.align	5
-.globl fiq
 fiq:
 	get_fiq_stack
 	/* someone ought to write a more effiction fiq_save_user_regs */
@@ -448,14 +443,12 @@ fiq:
 #else
 
 	.align	5
-.globl irq
 irq:
 	get_bad_stack
 	bad_save_user_regs
 	bl	do_irq
 
 	.align	5
-.globl fiq
 fiq:
 	get_bad_stack
 	bad_save_user_regs
diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
index 01f6d75..debe038 100644
--- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
@@ -312,7 +312,8 @@
 
 .section ".text.init", "x"
 
-.globl lowlevel_init
+.type	lowlevel_init, %function
+.global	lowlevel_init
 lowlevel_init:
 #if defined(CONFIG_MX51)
 	ldr r0, =GPIO1_BASE_ADDR
diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
index 1864356..b551711 100644
--- a/arch/arm/cpu/armv7/mx6/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
@@ -18,7 +18,8 @@
  */
 .section ".text.init", "x"
 
-.globl lowlevel_init
+.type	lowlevel_init, %function
+.global	lowlevel_init
 lowlevel_init:
 
 	mov pc, lr
diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
index 35f38ac..1c8edf3 100644
--- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
@@ -28,7 +28,8 @@
 
 #include <asm/arch/omap.h>
 
-.global save_boot_params
+.type	save_boot_params, %function
+.global	save_boot_params
 save_boot_params:
 	/*
 	 * See if the rom code passed pointer is valid:
@@ -78,7 +79,8 @@ save_boot_params:
 	bx	lr
 
 
-.globl lowlevel_init
+.type	lowlevel_init, %function
+.global	lowlevel_init
 lowlevel_init:
 	/*
 	 * Setup a temporary stack
@@ -96,7 +98,8 @@ lowlevel_init:
 	bl	s_init
 	pop	{ip, pc}
 
-.globl set_pl310_ctrl_reg
+.type	set_pl310_ctrl_reg, %function
+.global	set_pl310_ctrl_reg
 set_pl310_ctrl_reg:
 	PUSH	{r4-r11, lr}	@ save registers - ROM code may pollute
 				@ our registers
diff --git a/arch/arm/cpu/armv7/omap-common/reset.S b/arch/arm/cpu/armv7/omap-common/reset.S
index 838b122..3697170 100644
--- a/arch/arm/cpu/armv7/omap-common/reset.S
+++ b/arch/arm/cpu/armv7/omap-common/reset.S
@@ -23,6 +23,7 @@
 
 #include <config.h>
 
+.type reset_cpu, %function
 .global reset_cpu
 reset_cpu:
 	ldr	r1, rstctl			@ get addr for global reset
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index 2f6930b..05aac7b 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -35,7 +35,8 @@
 _TEXT_BASE:
 	.word	CONFIG_SYS_TEXT_BASE	/* sdram load addr from config.mk */
 
-.global save_boot_params
+.type	save_boot_params, %function
+.global	save_boot_params
 save_boot_params:
 #ifdef CONFIG_SPL_BUILD
 	ldr	r4, =omap3_boot_device
@@ -45,7 +46,8 @@ save_boot_params:
 #endif
 	bx	lr
 
-.global omap3_gp_romcode_call
+.type	omap3_gp_romcode_call, %function
+.global	omap3_gp_romcode_call
 omap3_gp_romcode_call:
 	PUSH {r4-r12, lr} @ Save all registers from ROM code!
 	MOV r12, r0	@ Copy the Service ID in R12
@@ -62,7 +64,8 @@ omap3_gp_romcode_call:
  *	R0 - Service ID
  *	R1 - paramer list
  */
-.global do_omap3_emu_romcode_call
+.type	do_omap3_emu_romcode_call, %function
+.global	do_omap3_emu_romcode_call
 do_omap3_emu_romcode_call:
 	PUSH {r4-r12, lr} @ Save all registers from ROM code!
 	MOV r12, r0	@ Copy the Secure Service ID in R12
@@ -82,7 +85,8 @@ do_omap3_emu_romcode_call:
  * cpy_clk_code: relocates clock code into SRAM where its safer to execute
  * R1 = SRAM destination address.
  *************************************************************************/
-.global cpy_clk_code
+.type	cpy_clk_code, %function
+.global	cpy_clk_code
  cpy_clk_code:
 	/* Copy DPLL code into SRAM */
 	adr	r0, go_to_speed		/* get addr of clock setting code */
@@ -109,7 +113,8 @@ next2:
  *        L3 when its not in self refresh seems bad for it.  Normally, this
  *	  code runs from flash before SDR is init so that should be ok.
  ****************************************************************************/
-.global go_to_speed
+.type	go_to_speed, %function
+.global	go_to_speed
  go_to_speed:
 	stmfd sp!, {r4 - r6}
 
@@ -211,7 +216,8 @@ pll_div_val5:
 
 #endif
 
-.globl lowlevel_init
+.type	lowlevel_init, %function
+.global	lowlevel_init
 lowlevel_init:
 	ldr	sp, SRAM_STACK
 	str	ip, [sp]	/* stash old link register */
@@ -289,7 +295,8 @@ mpu_dpll_param:
 .word MPU_M_38P4, MPU_N_38P4, MPU_FSEL_38P4, MPU_M2_38P4
 
 
-.globl get_mpu_dpll_param
+.type	get_mpu_dpll_param, %function
+.global	get_mpu_dpll_param
 get_mpu_dpll_param:
 	adr	r0, mpu_dpll_param
 	mov	pc, lr
@@ -336,7 +343,8 @@ iva_dpll_param:
 .word IVA_M_38P4, IVA_N_38P4, IVA_FSEL_38P4, IVA_M2_38P4
 
 
-.globl get_iva_dpll_param
+.type	get_iva_dpll_param, %function
+.global	get_iva_dpll_param
 get_iva_dpll_param:
 	adr	r0, iva_dpll_param
 	mov	pc, lr
@@ -383,7 +391,8 @@ core_dpll_param:
 /* 3410 */
 .word CORE_M_38P4, CORE_N_38P4, CORE_FSEL_38P4, CORE_M2_38P4
 
-.globl get_core_dpll_param
+.type	get_core_dpll_param, %function
+.global	get_core_dpll_param
 get_core_dpll_param:
 	adr	r0, core_dpll_param
 	mov	pc, lr
@@ -405,7 +414,8 @@ per_dpll_param:
 /* 38.4MHz */
 .word PER_M_38P4, PER_N_38P4, PER_FSEL_38P4, PER_M2_38P4
 
-.globl get_per_dpll_param
+.type	get_per_dpll_param, %function
+.global	get_per_dpll_param
 get_per_dpll_param:
 	adr	r0, per_dpll_param
 	mov	pc, lr
@@ -427,7 +437,8 @@ per2_dpll_param:
 /* 38.4MHz */
 .word PER2_M_38P4, PER2_N_38P4, PER2_FSEL_38P4, PER2_M2_38P4
 
-.globl get_per2_dpll_param
+.type	get_per2_dpll_param, %function
+.global	get_per2_dpll_param
 get_per2_dpll_param:
 	adr	r0, per2_dpll_param
 	mov	pc, lr
@@ -480,22 +491,26 @@ per_36x_dpll_param:
 .word 26000,    432,   12,     9,      16,     9,     4,      3,      1
 .word 38400,    360,   15,     9,      16,     5,     4,      3,      1
 
-.globl get_36x_mpu_dpll_param
+.type	get_36x_mpu_dpll_param, %function
+.global	get_36x_mpu_dpll_param
 get_36x_mpu_dpll_param:
 	adr	r0, mpu_36x_dpll_param
 	mov	pc, lr
 
-.globl get_36x_iva_dpll_param
+.type	get_36x_iva_dpll_param, %function
+.global	get_36x_iva_dpll_param
 get_36x_iva_dpll_param:
 	adr	r0, iva_36x_dpll_param
 	mov	pc, lr
 
-.globl get_36x_core_dpll_param
+.type	get_36x_core_dpll_param, %function
+.global	get_36x_core_dpll_param
 get_36x_core_dpll_param:
 	adr	r0, core_36x_dpll_param
 	mov	pc, lr
 
-.globl get_36x_per_dpll_param
+.type	get_36x_per_dpll_param, %function
+.global	get_36x_per_dpll_param
 get_36x_per_dpll_param:
 	adr	r0, per_36x_dpll_param
 	mov	pc, lr
diff --git a/arch/arm/cpu/armv7/s5pc1xx/cache.S b/arch/arm/cpu/armv7/s5pc1xx/cache.S
index c7d6221..1f47203 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/cache.S
+++ b/arch/arm/cpu/armv7/s5pc1xx/cache.S
@@ -26,6 +26,7 @@
 .align 5
 
 #ifndef CONFIG_SYS_L2CACHE_OFF
+.type v7_outer_cache_enable, %function
 .global v7_outer_cache_enable
 v7_outer_cache_enable:
 	push	{r0, r1, r2, lr}
@@ -34,6 +35,7 @@ v7_outer_cache_enable:
 	mcr	15, 0, r3, cr1, cr0, 1
 	pop	{r1, r2, r3, pc}
 
+.type v7_outer_cache_disable, %function
 .global v7_outer_cache_disable
 v7_outer_cache_disable:
 	push	{r0, r1, r2, lr}
diff --git a/arch/arm/cpu/armv7/s5pc1xx/reset.S b/arch/arm/cpu/armv7/s5pc1xx/reset.S
index 70fa146..65e197e 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/reset.S
+++ b/arch/arm/cpu/armv7/s5pc1xx/reset.S
@@ -26,7 +26,8 @@
 #define S5PC100_SWRESET			0xE0200000
 #define S5PC110_SWRESET			0xE0102000
 
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 reset_cpu:
 	ldr	r1, =S5PC100_PRO_ID
 	ldr	r2, [r1]
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index ef08a55..5679365 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -34,7 +34,8 @@
 #include <version.h>
 #include <asm/system.h>
 
-.globl _start
+.type	_start, %function
+.global	_start
 _start: b	reset
 	ldr	pc, _undefined_instruction
 	ldr	pc, _software_interrupt
@@ -172,7 +173,8 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
+.type	relocate_code, %function
+.global	relocate_code
 relocate_code:
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
@@ -298,7 +300,8 @@ _board_init_r_ofs:
  * CONFIG_SYS_ICACHE_OFF is defined.
  *
  *************************************************************************/
-.globl cpu_init_cp15
+.type	cpu_init_cp15, %function
+.global	cpu_init_cp15
 cpu_init_cp15:
 	/*
 	 * Invalidate L1 I/D
diff --git a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
index 6b86647..f4a8cb0 100644
--- a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
@@ -27,6 +27,7 @@
 #include <version.h>
 
 	.align	5
+.type reset_cpu, %function
 .global reset_cpu
 reset_cpu:
 	ldr	r1, rstctl			@ get addr for global reset
diff --git a/arch/arm/cpu/armv7/u8500/lowlevel.S b/arch/arm/cpu/armv7/u8500/lowlevel.S
index cffdfd1..66ecd93 100644
--- a/arch/arm/cpu/armv7/u8500/lowlevel.S
+++ b/arch/arm/cpu/armv7/u8500/lowlevel.S
@@ -21,12 +21,14 @@
 
 #include <config.h>
 
-.globl lowlevel_init
+.type	lowlevel_init, %function
+.global	lowlevel_init
 lowlevel_init:
 	mov	pc, lr
 
 	.align	5
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 reset_cpu:
 	ldr r0, =CFG_PRCMU_BASE
 	ldr r1, =0x1
diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S
index cb32121..bc35566 100644
--- a/arch/arm/cpu/ixp/start.S
+++ b/arch/arm/cpu/ixp/start.S
@@ -64,7 +64,8 @@
 	sub  pc,pc,#4
 	.endm
 
-.globl _start
+.type	_start, %function
+.global	_start
 _start:
 	ldr	pc, _reset
 	ldr	pc, _undefined_instruction
@@ -261,7 +262,8 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
+.type	relocate_code, %function
+.global	relocate_code
 relocate_code:
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
@@ -537,7 +539,8 @@ fiq:
 /****************************************************************************/
 
 	.align	5
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 
 reset_cpu:
 	ldr	r1, =0x482e
diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S
index 62de8b8..585fcaf 100644
--- a/arch/arm/cpu/lh7a40x/start.S
+++ b/arch/arm/cpu/lh7a40x/start.S
@@ -37,7 +37,8 @@
  */
 
 
-.globl _start
+.type	_start, %function
+.global	_start
 _start:	b       reset
 	ldr	pc, _undefined_instruction
 	ldr	pc, _software_interrupt
@@ -172,7 +173,8 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
+.type	relocate_code, %function
+.global	relocate_code
 relocate_code:
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
@@ -482,7 +484,8 @@ fiq:
 #endif
 
 	.align	5
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 reset_cpu:
 	bl	disable_interrupts
 
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index ba0de8f..a07ef19 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -45,7 +45,8 @@
 #endif
 #endif
 
-.globl _start
+.type	_start, %function
+.global	_start
 _start: b	reset
 #ifdef CONFIG_SPL_BUILD
 	ldr	pc, _hang
@@ -180,7 +181,8 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
+.type	relocate_code, %function
+.global	relocate_code
 relocate_code:
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S
index a29d5b4..ac1e1b1 100644
--- a/arch/arm/cpu/s3c44b0/start.S
+++ b/arch/arm/cpu/s3c44b0/start.S
@@ -36,7 +36,8 @@
  */
 
 
-.globl _start
+.type	_start, %function
+.global	_start
 _start:	b       reset
 	add	pc, pc, #0x0c000000
 	add	pc, pc, #0x0c000000
@@ -144,7 +145,8 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
+.type	relocate_code, %function
+.global	relocate_code
 relocate_code:
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index 92546d8..4e77c8e 100644
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -38,7 +38,8 @@
  */
 
 
-.globl _start
+.type	_start, %function
+.global	_start
 _start:	b       reset
 	ldr	pc, _undefined_instruction
 	ldr	pc, _software_interrupt
@@ -148,7 +149,8 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
+.type	relocate_code, %function
+.global	relocate_code
 relocate_code:
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
@@ -487,7 +489,8 @@ fiq:
 #endif
 
 	.align	5
-.globl reset_cpu
+.type	reset_cpu, %function
+.global	reset_cpu
 reset_cpu:
 	ldr	r0, RST_BASE
 	mov	r1, #0x0			@ set bit 3-0 ...
diff --git a/arch/arm/lib/_ashldi3.S b/arch/arm/lib/_ashldi3.S
index 834ddc2..248c612 100644
--- a/arch/arm/lib/_ashldi3.S
+++ b/arch/arm/lib/_ashldi3.S
@@ -34,8 +34,10 @@ Boston, MA 02110-1301, USA.  */
 #define ah r1
 #endif
 
-.globl __ashldi3
-.globl	__aeabi_llsl
+.type	__ashldi3, %function
+.global	__ashldi3
+.type	__aeabi_llsl, %function
+.global	__aeabi_llsl
 __ashldi3:
 __aeabi_llsl:
 
diff --git a/arch/arm/lib/_ashrdi3.S b/arch/arm/lib/_ashrdi3.S
index 671ac87..f070f59 100644
--- a/arch/arm/lib/_ashrdi3.S
+++ b/arch/arm/lib/_ashrdi3.S
@@ -34,8 +34,10 @@ Boston, MA 02110-1301, USA.  */
 #define ah r1
 #endif
 
-.globl __ashrdi3
-.globl __aeabi_lasr
+.type	__ashrdi3, %function
+.global	__ashrdi3
+.type	__aeabi_lasr, %function
+.global	__aeabi_lasr
 __ashrdi3:
 __aeabi_lasr:
 
diff --git a/arch/arm/lib/_divsi3.S b/arch/arm/lib/_divsi3.S
index cfbadb2..9e76909 100644
--- a/arch/arm/lib/_divsi3.S
+++ b/arch/arm/lib/_divsi3.S
@@ -95,8 +95,10 @@
 .endm
 
 	.align	5
-.globl __divsi3
-.globl __aeabi_idiv
+.type	__divsi3, %function
+.global	__divsi3
+.type	__aeabi_idiv, %function
+.global	__aeabi_idiv
 __divsi3:
 __aeabi_idiv:
 	cmp	r1, #0
diff --git a/arch/arm/lib/_lshrdi3.S b/arch/arm/lib/_lshrdi3.S
index e7fa799..0df05c2 100644
--- a/arch/arm/lib/_lshrdi3.S
+++ b/arch/arm/lib/_lshrdi3.S
@@ -34,8 +34,10 @@ Boston, MA 02110-1301, USA.  */
 #define ah r1
 #endif
 
-.globl __lshrdi3
-.globl __aeabi_llsr
+.type	__lshrdi3, %function
+.global	__lshrdi3
+.type	__aeabi_llsr, %function
+.global	__aeabi_llsr
 __lshrdi3:
 __aeabi_llsr:
 
diff --git a/arch/arm/lib/_modsi3.S b/arch/arm/lib/_modsi3.S
index 539c584..bc07f49 100644
--- a/arch/arm/lib/_modsi3.S
+++ b/arch/arm/lib/_modsi3.S
@@ -70,7 +70,8 @@
 .endm
 
 	.align	5
-.globl __modsi3
+.type	__modsi3, %function
+.global	__modsi3
 __modsi3:
 	cmp	r1, #0
 	beq	Ldiv0
diff --git a/arch/arm/lib/_udivsi3.S b/arch/arm/lib/_udivsi3.S
index 1309802..e38d1d8 100644
--- a/arch/arm/lib/_udivsi3.S
+++ b/arch/arm/lib/_udivsi3.S
@@ -72,7 +72,8 @@ Ldiv0:
 	ldmia	sp!, {pc}
 	.size  __udivsi3       , . -  __udivsi3
 
-.globl __aeabi_uidivmod
+.type	__aeabi_uidivmod, %function
+.global	__aeabi_uidivmod
 __aeabi_uidivmod:
 
 	stmfd	sp!, {r0, r1, ip, lr}
@@ -82,7 +83,8 @@ __aeabi_uidivmod:
 	sub	r1, r1, r3
 	mov	pc, lr
 
-.globl __aeabi_idivmod
+.type	__aeabi_idivmod, %function
+.global	__aeabi_idivmod
 __aeabi_idivmod:
 
 	stmfd	sp!, {r0, r1, ip, lr}
diff --git a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S
index f655256..313f82a 100644
--- a/arch/arm/lib/memcpy.S
+++ b/arch/arm/lib/memcpy.S
@@ -57,7 +57,8 @@
 
 /* Prototype: void *memcpy(void *dest, const void *src, size_t n); */
 
-.globl memcpy
+.type	memcpy, %function
+.global	memcpy
 memcpy:
 
 		cmp	r0, r1
diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
index 0cdf895..5f80539 100644
--- a/arch/arm/lib/memset.S
+++ b/arch/arm/lib/memset.S
@@ -27,7 +27,8 @@
  * memset again.
  */
 
-.globl memset
+.type	memset, %function
+.global	memset
 memset:
 	ands	r3, r0, #3		@ 1 unaligned?
 	bne	1b			@ 1
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-15 13:57 ` [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions Aneesh V
@ 2012-02-17 11:09   ` Aneesh V
  2012-02-18 10:13     ` Albert ARIBAUD
  2012-02-17 17:13   ` Mike Frysinger
  2012-02-18 22:03   ` Simon Glass
  2 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-17 11:09 UTC (permalink / raw)
  To: u-boot

Hi Albert,

On Wednesday 15 February 2012 07:27 PM, Aneesh V wrote:
> This is done using the following directive preceding
> each function definition:
>
> .type<func-name>, %function
>
> This marks the symbol as a function in the object
> header which in turn helps the linker in some cases.
>
> In particular this was found needed for resolving ARM/Thumb
> calls correctly in a build with Thumb interworking enabled.
>
> This solves the following problem I had reported earlier:
>
> "When U-Boot/SPL is built using the Thumb instruction set the
> toolchain has a  potential issue with weakly linked symbols.
> If a function has a weakly linked default implementation in C
> and a real implementation in assembly GCC is confused about the
> instruction set of the assembly implementation. As a result
> the assembly function that is built in ARM is executed as
> if it is Thumb. This results in a crash"
>
> Signed-off-by: Aneesh V<aneesh@ti.com>

Does this look good to you. I was a bit nervous about touching so many
files. Please let me know if you would prefer to change only the OMAP
function that was creating the ARM/Thumb problem. I did a "MAKEALL -a
arm" and didn't see any new errors.

Let me know if this is an acceptable solution to the problem.

regards,
Aneesh


> ---
> Changes from RFC to V1:
> - This change completely replaces the previous workaround for
>    the ARM/Thumb interwork problem, which was to wrap around
>    the assembly function in question with a naked C function
> ---
>   arch/arm/cpu/arm1136/omap24xx/reset.S          |    3 +-
>   arch/arm/cpu/arm1136/start.S                   |    7 +++-
>   arch/arm/cpu/arm1176/s3c64xx/cpu_init.S        |    3 +-
>   arch/arm/cpu/arm1176/s3c64xx/reset.S           |    3 +-
>   arch/arm/cpu/arm1176/start.S                   |    9 +++--
>   arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S |    3 +-
>   arch/arm/cpu/arm720t/lpc2292/iap_entry.S       |    3 +-
>   arch/arm/cpu/arm720t/start.S                   |   12 ++++--
>   arch/arm/cpu/arm920t/a320/reset.S              |    1 +
>   arch/arm/cpu/arm920t/at91/lowlevel_init.S      |    3 +-
>   arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S    |    3 +-
>   arch/arm/cpu/arm920t/ks8695/lowlevel_init.S    |    3 +-
>   arch/arm/cpu/arm920t/start.S                   |    6 ++-
>   arch/arm/cpu/arm925t/start.S                   |    9 +++--
>   arch/arm/cpu/arm926ejs/at91/lowlevel_init.S    |    4 +-
>   arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S |    3 +-
>   arch/arm/cpu/arm926ejs/davinci/reset.S         |    3 +-
>   arch/arm/cpu/arm926ejs/mx28/start.S            |    3 +-
>   arch/arm/cpu/arm926ejs/nomadik/reset.S         |    3 +-
>   arch/arm/cpu/arm926ejs/omap/reset.S            |    3 +-
>   arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S |    3 +-
>   arch/arm/cpu/arm926ejs/start.S                 |    9 +++--
>   arch/arm/cpu/arm926ejs/versatile/reset.S       |    3 +-
>   arch/arm/cpu/arm946es/start.S                  |    9 +++--
>   arch/arm/cpu/arm_intcm/start.S                 |   15 ++------
>   arch/arm/cpu/armv7/mx5/lowlevel_init.S         |    3 +-
>   arch/arm/cpu/armv7/mx6/lowlevel_init.S         |    3 +-
>   arch/arm/cpu/armv7/omap-common/lowlevel_init.S |    9 +++--
>   arch/arm/cpu/armv7/omap-common/reset.S         |    1 +
>   arch/arm/cpu/armv7/omap3/lowlevel_init.S       |   45 ++++++++++++++++--------
>   arch/arm/cpu/armv7/s5pc1xx/cache.S             |    2 +
>   arch/arm/cpu/armv7/s5pc1xx/reset.S             |    3 +-
>   arch/arm/cpu/armv7/start.S                     |    9 +++--
>   arch/arm/cpu/armv7/tegra2/lowlevel_init.S      |    1 +
>   arch/arm/cpu/armv7/u8500/lowlevel.S            |    6 ++-
>   arch/arm/cpu/ixp/start.S                       |    9 +++--
>   arch/arm/cpu/lh7a40x/start.S                   |    9 +++--
>   arch/arm/cpu/pxa/start.S                       |    6 ++-
>   arch/arm/cpu/s3c44b0/start.S                   |    6 ++-
>   arch/arm/cpu/sa1100/start.S                    |    9 +++--
>   arch/arm/lib/_ashldi3.S                        |    6 ++-
>   arch/arm/lib/_ashrdi3.S                        |    6 ++-
>   arch/arm/lib/_divsi3.S                         |    6 ++-
>   arch/arm/lib/_lshrdi3.S                        |    6 ++-
>   arch/arm/lib/_modsi3.S                         |    3 +-
>   arch/arm/lib/_udivsi3.S                        |    6 ++-
>   arch/arm/lib/memcpy.S                          |    3 +-
>   arch/arm/lib/memset.S                          |    3 +-
>   48 files changed, 186 insertions(+), 100 deletions(-)
>
> diff --git a/arch/arm/cpu/arm1136/omap24xx/reset.S b/arch/arm/cpu/arm1136/omap24xx/reset.S
> index 5f8343f..917a934 100644
> --- a/arch/arm/cpu/arm1136/omap24xx/reset.S
> +++ b/arch/arm/cpu/arm1136/omap24xx/reset.S
> @@ -30,7 +30,8 @@
>
>   #include<asm/arch/omap2420.h>
>
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>   reset_cpu:
>   	ldr	r1, rstctl	/* get addr for global reset reg */
>   	mov	r3, #0x2	/* full reset pll+mpu */
> diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
> index c0db96c..972fc0e 100644
> --- a/arch/arm/cpu/arm1136/start.S
> +++ b/arch/arm/cpu/arm1136/start.S
> @@ -31,7 +31,8 @@
>   #include<asm-offsets.h>
>   #include<config.h>
>   #include<version.h>
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start: b	reset
>   #ifdef CONFIG_SPL_BUILD
>   	ldr	pc, _hang
> @@ -178,7 +179,8 @@ call_board_init_f:
>    * after relocating the monitor code.
>    *
>    */
> -	.globl	relocate_code
> +.type	relocate_code, %function
> +.global	relocate_code
>   relocate_code:
>   	mov	r4, r0	/* save addr_sp */
>   	mov	r5, r1	/* save addr of gd */
> @@ -510,6 +512,7 @@ fiq:
>
>   #endif
>   	.align 5
> +.type	arm1136_cache_flush, %function
>   .global arm1136_cache_flush
>   arm1136_cache_flush:
>   #if !defined(CONFIG_SYS_ICACHE_OFF)
> diff --git a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S b/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S
> index df88cba..886a5ad 100644
> --- a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S
> +++ b/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S
> @@ -26,7 +26,8 @@
>   #include<config.h>
>   #include<asm/arch/s3c6400.h>
>
> -	.globl mem_ctrl_asm_init
> +.type	mem_ctrl_asm_init, %function
> +.global	mem_ctrl_asm_init
>   mem_ctrl_asm_init:
>   	/* DMC1 base address 0x7e001000 */
>   	ldr	r0, =ELFIN_DMC1_BASE
> diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.S b/arch/arm/cpu/arm1176/s3c64xx/reset.S
> index eae572e..a33b063 100644
> --- a/arch/arm/cpu/arm1176/s3c64xx/reset.S
> +++ b/arch/arm/cpu/arm1176/s3c64xx/reset.S
> @@ -23,7 +23,8 @@
>
>   #include<asm/arch/s3c6400.h>
>
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>   reset_cpu:
>   	ldr	r1, =ELFIN_CLOCK_POWER_BASE
>   	ldr	r2, [r1, #SYS_ID_OFFSET]
> diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
> index 848144a..e97a413 100644
> --- a/arch/arm/cpu/arm1176/start.S
> +++ b/arch/arm/cpu/arm1176/start.S
> @@ -49,7 +49,8 @@
>    *************************************************************************
>    */
>
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start: b	reset
>   #ifndef CONFIG_NAND_SPL
>   	ldr	pc, _undefined_instruction
> @@ -240,7 +241,8 @@ call_board_init_f:
>    * after relocating the monitor code.
>    *
>    */
> -	.globl	relocate_code
> +.type	relocate_code, %function
> +.global	relocate_code
>   relocate_code:
>   	mov	r4, r0	/* save addr_sp */
>   	mov	r5, r1	/* save addr of gd */
> @@ -406,7 +408,8 @@ _mmu_table_base:
>    * void	theLastJump(void *kernel, int arch_num, uint boot_params);
>    */
>   #ifdef CONFIG_ENABLE_MMU
> -	.globl theLastJump
> +.type	theLastJump, %function
> +.global	theLastJump
>   theLastJump:
>   	mov	r9, r0
>   	ldr	r3, =0xfff00000
> diff --git a/arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S b/arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S
> index 3ee32ef..6d1e7e6 100644
> --- a/arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S
> +++ b/arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S
> @@ -19,7 +19,8 @@
>    * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
>    */
>
> -.globl lowlevel_init
> +.type	lowlevel_init, %function
> +.global	lowlevel_init
>   lowlevel_init:
>   	/* nothing for now, maybe needed for more exotic boot modes */
>   	mov	pc, lr
> diff --git a/arch/arm/cpu/arm720t/lpc2292/iap_entry.S b/arch/arm/cpu/arm720t/lpc2292/iap_entry.S
> index c31d519..a944c35 100644
> --- a/arch/arm/cpu/arm720t/lpc2292/iap_entry.S
> +++ b/arch/arm/cpu/arm720t/lpc2292/iap_entry.S
> @@ -1,6 +1,7 @@
>   IAP_ADDRESS:	.word	0x7FFFFFF1
>
> -.globl iap_entry
> +.type	iap_entry, %function
> +.global	iap_entry
>   iap_entry:
>   	ldr	r2, IAP_ADDRESS
>   	bx	r2
> diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
> index 540e3c2..e34a8bc 100644
> --- a/arch/arm/cpu/arm720t/start.S
> +++ b/arch/arm/cpu/arm720t/start.S
> @@ -37,7 +37,8 @@
>    */
>
>
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start: b	reset
>   	ldr	pc, _undefined_instruction
>   	ldr	pc, _software_interrupt
> @@ -155,7 +156,8 @@ call_board_init_f:
>    * after relocating the monitor code.
>    *
>    */
> -	.globl	relocate_code
> +.type	relocate_code, %function
> +.global	relocate_code
>   relocate_code:
>   	mov	r4, r0	/* save addr_sp */
>   	mov	r5, r1	/* save addr of gd */
> @@ -590,7 +592,8 @@ fiq:
>
>   #if defined(CONFIG_NETARM)
>   	.align	5
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>   reset_cpu:
>   	ldr	r1, =NETARM_MEM_MODULE_BASE
>   	ldr	r0, [r1, #+NETARM_MEM_CS0_BASE_ADDR]
> @@ -615,7 +618,8 @@ reset_cpu:
>   	/* No specific reset actions for IntegratorAP/CM720T as yet */
>   #elif defined(CONFIG_LPC2292)
>   	.align	5
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>   reset_cpu:
>   	mov	pc, r0
>   #else
> diff --git a/arch/arm/cpu/arm920t/a320/reset.S b/arch/arm/cpu/arm920t/a320/reset.S
> index 12ca527..6c83245 100644
> --- a/arch/arm/cpu/arm920t/a320/reset.S
> +++ b/arch/arm/cpu/arm920t/a320/reset.S
> @@ -17,6 +17,7 @@
>    * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
>    */
>
> +.type reset_cpu, %function
>   .global reset_cpu
>   reset_cpu:
>   	b	reset_cpu
> diff --git a/arch/arm/cpu/arm920t/at91/lowlevel_init.S b/arch/arm/cpu/arm920t/at91/lowlevel_init.S
> index 8b58ba9..ea7676a 100644
> --- a/arch/arm/cpu/arm920t/at91/lowlevel_init.S
> +++ b/arch/arm/cpu/arm920t/at91/lowlevel_init.S
> @@ -44,7 +44,8 @@ _MTEXT_BASE:
>   	.word	CONFIG_SYS_TEXT_BASE
>   #endif
>
> -.globl lowlevel_init
> +.type	lowlevel_init, %function
> +.global	lowlevel_init
>   lowlevel_init:
>   	ldr     r1, =AT91_ASM_PMC_MOR
>   	/* Main oscillator Enable register */
> diff --git a/arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S b/arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S
> index f21e237..b038298 100644
> --- a/arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S
> +++ b/arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S
> @@ -27,7 +27,8 @@
>   #include<version.h>
>   #include<asm/arch/ep93xx.h>
>
> -.globl lowlevel_init
> +.type	lowlevel_init, %function
> +.global	lowlevel_init
>   lowlevel_init:
>   	/* backup return address */
>   	ldr r1, =SYSCON_SCRATCH0
> diff --git a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
> index e9f1227..b3f6c3e 100644
> --- a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
> +++ b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
> @@ -64,7 +64,8 @@
>    *************************************************************************
>    */
>
> -.globl lowlevel_init
> +.type	lowlevel_init, %function
> +.global	lowlevel_init
>   lowlevel_init:
>
>   #if DEBUG
> diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
> index 8c5612c..43b9e3c 100644
> --- a/arch/arm/cpu/arm920t/start.S
> +++ b/arch/arm/cpu/arm920t/start.S
> @@ -37,7 +37,8 @@
>    */
>
>
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start:	b	start_code
>   	ldr	pc, _undefined_instruction
>   	ldr	pc, _software_interrupt
> @@ -198,7 +199,8 @@ call_board_init_f:
>    * after relocating the monitor code.
>    *
>    */
> -	.globl	relocate_code
> +.type	relocate_code, %function
> +.global	relocate_code
>   relocate_code:
>   	mov	r4, r0	/* save addr_sp */
>   	mov	r5, r1	/* save addr of gd */
> diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S
> index dbb93ef..de277e6 100644
> --- a/arch/arm/cpu/arm925t/start.S
> +++ b/arch/arm/cpu/arm925t/start.S
> @@ -47,7 +47,8 @@
>    */
>
>
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start:	b       reset
>   	ldr	pc, _undefined_instruction
>   	ldr	pc, _software_interrupt
> @@ -192,7 +193,8 @@ call_board_init_f:
>    * after relocating the monitor code.
>    *
>    */
> -	.globl	relocate_code
> +.type	relocate_code, %function
> +.global	relocate_code
>   relocate_code:
>   	mov	r4, r0	/* save addr_sp */
>   	mov	r5, r1	/* save addr of gd */
> @@ -507,7 +509,8 @@ fiq:
>   #endif
>
>   	.align	5
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>   reset_cpu:
>   	ldr	r1, rstctl1     /* get clkm1 reset ctl */
>   	mov     r3, #0x3	/* dsp_en + arm_rst = global reset */
> diff --git a/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S b/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S
> index d102195..f946977 100644
> --- a/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S
> +++ b/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S
> @@ -45,8 +45,8 @@
>   _TEXT_BASE:
>   	.word	CONFIG_SYS_TEXT_BASE
>
> -.globl lowlevel_init
> -.type lowlevel_init,function
> +.type	lowlevel_init, %function
> +.global	lowlevel_init
>   lowlevel_init:
>
>   	mov	r5, pc		/* r5 = POS1 + 4 current */
> diff --git a/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S b/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S
> index 7a169b1..4161e93 100644
> --- a/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S
> +++ b/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S
> @@ -47,7 +47,8 @@
>
>   #define MDSTAT_STATE	0x3f
>
> -.globl	lowlevel_init
> +.type	lowlevel_init, %function
> +.global	lowlevel_init
>   lowlevel_init:
>
>   	/*-------------------------------------------------------*
> diff --git a/arch/arm/cpu/arm926ejs/davinci/reset.S b/arch/arm/cpu/arm926ejs/davinci/reset.S
> index ba0a7c3..8dbb2fa 100644
> --- a/arch/arm/cpu/arm926ejs/davinci/reset.S
> +++ b/arch/arm/cpu/arm926ejs/davinci/reset.S
> @@ -21,7 +21,8 @@
>    * MA 02111-1307 USA
>    */
>
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>   reset_cpu:
>   	ldr	r0, WDT_TGCR
>   	mov	r1, $0x08
> diff --git a/arch/arm/cpu/arm926ejs/mx28/start.S b/arch/arm/cpu/arm926ejs/mx28/start.S
> index 2cd4d73..a284b4c 100644
> --- a/arch/arm/cpu/arm926ejs/mx28/start.S
> +++ b/arch/arm/cpu/arm926ejs/mx28/start.S
> @@ -49,7 +49,8 @@
>    */
>
>
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start:
>   	b	reset
>   	b	undefined_instruction
> diff --git a/arch/arm/cpu/arm926ejs/nomadik/reset.S b/arch/arm/cpu/arm926ejs/nomadik/reset.S
> index ec95472..184c066 100644
> --- a/arch/arm/cpu/arm926ejs/nomadik/reset.S
> +++ b/arch/arm/cpu/arm926ejs/nomadik/reset.S
> @@ -4,7 +4,8 @@
>    */
>
>   	.align 5
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>   reset_cpu:
>   	ldr	r0, =NOMADIK_SRC_BASE	/* System and Reset Controller */
>   	ldr	r1, =0x1
> diff --git a/arch/arm/cpu/arm926ejs/omap/reset.S b/arch/arm/cpu/arm926ejs/omap/reset.S
> index 8321072..3e729a4 100644
> --- a/arch/arm/cpu/arm926ejs/omap/reset.S
> +++ b/arch/arm/cpu/arm926ejs/omap/reset.S
> @@ -31,7 +31,8 @@
>    */
>
>   	.align	5
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>   reset_cpu:
>   	ldr	r1, rstctl1	/* get clkm1 reset ctl */
>   	mov	r3, #0x0
> diff --git a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S
> index a2de3cf..4e17a38 100644
> --- a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S
> +++ b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S
> @@ -82,7 +82,8 @@
>    * up RAM for us to relocate into.
>    */
>
> -.globl lowlevel_init
> +.type	lowlevel_init, %function
> +.global	lowlevel_init
>
>   lowlevel_init:
>
> diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
> index 6a09c02..928c36d 100644
> --- a/arch/arm/cpu/arm926ejs/start.S
> +++ b/arch/arm/cpu/arm926ejs/start.S
> @@ -52,14 +52,16 @@
>
>
>   #ifdef CONFIG_SYS_DV_NOR_BOOT_CFG
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start:
>   .globl _NOR_BOOT_CFG
>   _NOR_BOOT_CFG:
>   	.word	CONFIG_SYS_DV_NOR_BOOT_CFG
>   	b	reset
>   #else
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start:
>   	b	reset
>   #endif
> @@ -220,7 +222,8 @@ call_board_init_f:
>    * after relocating the monitor code.
>    *
>    */
> -	.globl	relocate_code
> +.type	relocate_code, %function
> +.global	relocate_code
>   relocate_code:
>   	mov	r4, r0	/* save addr_sp */
>   	mov	r5, r1	/* save addr of gd */
> diff --git a/arch/arm/cpu/arm926ejs/versatile/reset.S b/arch/arm/cpu/arm926ejs/versatile/reset.S
> index 8321072..3e729a4 100644
> --- a/arch/arm/cpu/arm926ejs/versatile/reset.S
> +++ b/arch/arm/cpu/arm926ejs/versatile/reset.S
> @@ -31,7 +31,8 @@
>    */
>
>   	.align	5
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>   reset_cpu:
>   	ldr	r1, rstctl1	/* get clkm1 reset ctl */
>   	mov	r3, #0x0
> diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
> index 89ba558..7a6f81a 100644
> --- a/arch/arm/cpu/arm946es/start.S
> +++ b/arch/arm/cpu/arm946es/start.S
> @@ -44,7 +44,8 @@
>    */
>
>
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start:
>   	b	reset
>   	ldr	pc, _undefined_instruction
> @@ -163,7 +164,8 @@ call_board_init_f:
>    * after relocating the monitor code.
>    *
>    */
> -	.globl	relocate_code
> +.type	relocate_code, %function
> +.global	relocate_code
>   relocate_code:
>   	mov	r4, r0	/* save addr_sp */
>   	mov	r5, r1	/* save addr of gd */
> @@ -482,7 +484,8 @@ fiq:
>   #else
>
>   	.align	5
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>   reset_cpu:
>
>   	ldr	r1, rstctl1	/* get clkm1 reset ctl */
> diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S
> index 2033b36..ff7f040 100644
> --- a/arch/arm/cpu/arm_intcm/start.S
> +++ b/arch/arm/cpu/arm_intcm/start.S
> @@ -42,7 +42,8 @@
>    *************************************************************************
>    */
>
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start:
>   	b	reset
>   	ldr	pc, _undefined_instruction
> @@ -159,7 +160,8 @@ call_board_init_f:
>    * after relocating the monitor code.
>    *
>    */
> -	.globl	relocate_code
> +.type	relocate_code, %function
> +.global	relocate_code
>   relocate_code:
>   	mov	r4, r0	/* save addr_sp */
>   	mov	r5, r1	/* save addr of gd */
> @@ -393,35 +395,30 @@ cpu_init_crit:
>    * exception handlers
>    */
>   	.align  5
> -.globl undefined_instruction
>   undefined_instruction:
>   	get_bad_stack
>   	bad_save_user_regs
>   	bl	do_undefined_instruction
>
>   	.align	5
> -.globl software_interrupt
>   software_interrupt:
>   	get_bad_stack
>   	bad_save_user_regs
>   	bl	do_software_interrupt
>
>   	.align	5
> -.globl prefetch_abort
>   prefetch_abort:
>   	get_bad_stack
>   	bad_save_user_regs
>   	bl	do_prefetch_abort
>
>   	.align	5
> -.globl data_abort
>   data_abort:
>   	get_bad_stack
>   	bad_save_user_regs
>   	bl	do_data_abort
>
>   	.align	5
> -.globl not_used
>   not_used:
>   	get_bad_stack
>   	bad_save_user_regs
> @@ -429,7 +426,6 @@ not_used:
>
>   #ifdef CONFIG_USE_IRQ
>   	.align	5
> -.globl irq
>   irq:
>   	get_irq_stack
>   	irq_save_user_regs
> @@ -437,7 +433,6 @@ irq:
>   	irq_restore_user_regs
>
>   	.align	5
> -.globl fiq
>   fiq:
>   	get_fiq_stack
>   	/* someone ought to write a more effiction fiq_save_user_regs */
> @@ -448,14 +443,12 @@ fiq:
>   #else
>
>   	.align	5
> -.globl irq
>   irq:
>   	get_bad_stack
>   	bad_save_user_regs
>   	bl	do_irq
>
>   	.align	5
> -.globl fiq
>   fiq:
>   	get_bad_stack
>   	bad_save_user_regs
> diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
> index 01f6d75..debe038 100644
> --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S
> +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
> @@ -312,7 +312,8 @@
>
>   .section ".text.init", "x"
>
> -.globl lowlevel_init
> +.type	lowlevel_init, %function
> +.global	lowlevel_init
>   lowlevel_init:
>   #if defined(CONFIG_MX51)
>   	ldr r0, =GPIO1_BASE_ADDR
> diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
> index 1864356..b551711 100644
> --- a/arch/arm/cpu/armv7/mx6/lowlevel_init.S
> +++ b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
> @@ -18,7 +18,8 @@
>    */
>   .section ".text.init", "x"
>
> -.globl lowlevel_init
> +.type	lowlevel_init, %function
> +.global	lowlevel_init
>   lowlevel_init:
>
>   	mov pc, lr
> diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
> index 35f38ac..1c8edf3 100644
> --- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
> +++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
> @@ -28,7 +28,8 @@
>
>   #include<asm/arch/omap.h>
>
> -.global save_boot_params
> +.type	save_boot_params, %function
> +.global	save_boot_params
>   save_boot_params:
>   	/*
>   	 * See if the rom code passed pointer is valid:
> @@ -78,7 +79,8 @@ save_boot_params:
>   	bx	lr
>
>
> -.globl lowlevel_init
> +.type	lowlevel_init, %function
> +.global	lowlevel_init
>   lowlevel_init:
>   	/*
>   	 * Setup a temporary stack
> @@ -96,7 +98,8 @@ lowlevel_init:
>   	bl	s_init
>   	pop	{ip, pc}
>
> -.globl set_pl310_ctrl_reg
> +.type	set_pl310_ctrl_reg, %function
> +.global	set_pl310_ctrl_reg
>   set_pl310_ctrl_reg:
>   	PUSH	{r4-r11, lr}	@ save registers - ROM code may pollute
>   				@ our registers
> diff --git a/arch/arm/cpu/armv7/omap-common/reset.S b/arch/arm/cpu/armv7/omap-common/reset.S
> index 838b122..3697170 100644
> --- a/arch/arm/cpu/armv7/omap-common/reset.S
> +++ b/arch/arm/cpu/armv7/omap-common/reset.S
> @@ -23,6 +23,7 @@
>
>   #include<config.h>
>
> +.type reset_cpu, %function
>   .global reset_cpu
>   reset_cpu:
>   	ldr	r1, rstctl			@ get addr for global reset
> diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
> index 2f6930b..05aac7b 100644
> --- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
> +++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
> @@ -35,7 +35,8 @@
>   _TEXT_BASE:
>   	.word	CONFIG_SYS_TEXT_BASE	/* sdram load addr from config.mk */
>
> -.global save_boot_params
> +.type	save_boot_params, %function
> +.global	save_boot_params
>   save_boot_params:
>   #ifdef CONFIG_SPL_BUILD
>   	ldr	r4, =omap3_boot_device
> @@ -45,7 +46,8 @@ save_boot_params:
>   #endif
>   	bx	lr
>
> -.global omap3_gp_romcode_call
> +.type	omap3_gp_romcode_call, %function
> +.global	omap3_gp_romcode_call
>   omap3_gp_romcode_call:
>   	PUSH {r4-r12, lr} @ Save all registers from ROM code!
>   	MOV r12, r0	@ Copy the Service ID in R12
> @@ -62,7 +64,8 @@ omap3_gp_romcode_call:
>    *	R0 - Service ID
>    *	R1 - paramer list
>    */
> -.global do_omap3_emu_romcode_call
> +.type	do_omap3_emu_romcode_call, %function
> +.global	do_omap3_emu_romcode_call
>   do_omap3_emu_romcode_call:
>   	PUSH {r4-r12, lr} @ Save all registers from ROM code!
>   	MOV r12, r0	@ Copy the Secure Service ID in R12
> @@ -82,7 +85,8 @@ do_omap3_emu_romcode_call:
>    * cpy_clk_code: relocates clock code into SRAM where its safer to execute
>    * R1 = SRAM destination address.
>    *************************************************************************/
> -.global cpy_clk_code
> +.type	cpy_clk_code, %function
> +.global	cpy_clk_code
>    cpy_clk_code:
>   	/* Copy DPLL code into SRAM */
>   	adr	r0, go_to_speed		/* get addr of clock setting code */
> @@ -109,7 +113,8 @@ next2:
>    *        L3 when its not in self refresh seems bad for it.  Normally, this
>    *	  code runs from flash before SDR is init so that should be ok.
>    ****************************************************************************/
> -.global go_to_speed
> +.type	go_to_speed, %function
> +.global	go_to_speed
>    go_to_speed:
>   	stmfd sp!, {r4 - r6}
>
> @@ -211,7 +216,8 @@ pll_div_val5:
>
>   #endif
>
> -.globl lowlevel_init
> +.type	lowlevel_init, %function
> +.global	lowlevel_init
>   lowlevel_init:
>   	ldr	sp, SRAM_STACK
>   	str	ip, [sp]	/* stash old link register */
> @@ -289,7 +295,8 @@ mpu_dpll_param:
>   .word MPU_M_38P4, MPU_N_38P4, MPU_FSEL_38P4, MPU_M2_38P4
>
>
> -.globl get_mpu_dpll_param
> +.type	get_mpu_dpll_param, %function
> +.global	get_mpu_dpll_param
>   get_mpu_dpll_param:
>   	adr	r0, mpu_dpll_param
>   	mov	pc, lr
> @@ -336,7 +343,8 @@ iva_dpll_param:
>   .word IVA_M_38P4, IVA_N_38P4, IVA_FSEL_38P4, IVA_M2_38P4
>
>
> -.globl get_iva_dpll_param
> +.type	get_iva_dpll_param, %function
> +.global	get_iva_dpll_param
>   get_iva_dpll_param:
>   	adr	r0, iva_dpll_param
>   	mov	pc, lr
> @@ -383,7 +391,8 @@ core_dpll_param:
>   /* 3410 */
>   .word CORE_M_38P4, CORE_N_38P4, CORE_FSEL_38P4, CORE_M2_38P4
>
> -.globl get_core_dpll_param
> +.type	get_core_dpll_param, %function
> +.global	get_core_dpll_param
>   get_core_dpll_param:
>   	adr	r0, core_dpll_param
>   	mov	pc, lr
> @@ -405,7 +414,8 @@ per_dpll_param:
>   /* 38.4MHz */
>   .word PER_M_38P4, PER_N_38P4, PER_FSEL_38P4, PER_M2_38P4
>
> -.globl get_per_dpll_param
> +.type	get_per_dpll_param, %function
> +.global	get_per_dpll_param
>   get_per_dpll_param:
>   	adr	r0, per_dpll_param
>   	mov	pc, lr
> @@ -427,7 +437,8 @@ per2_dpll_param:
>   /* 38.4MHz */
>   .word PER2_M_38P4, PER2_N_38P4, PER2_FSEL_38P4, PER2_M2_38P4
>
> -.globl get_per2_dpll_param
> +.type	get_per2_dpll_param, %function
> +.global	get_per2_dpll_param
>   get_per2_dpll_param:
>   	adr	r0, per2_dpll_param
>   	mov	pc, lr
> @@ -480,22 +491,26 @@ per_36x_dpll_param:
>   .word 26000,    432,   12,     9,      16,     9,     4,      3,      1
>   .word 38400,    360,   15,     9,      16,     5,     4,      3,      1
>
> -.globl get_36x_mpu_dpll_param
> +.type	get_36x_mpu_dpll_param, %function
> +.global	get_36x_mpu_dpll_param
>   get_36x_mpu_dpll_param:
>   	adr	r0, mpu_36x_dpll_param
>   	mov	pc, lr
>
> -.globl get_36x_iva_dpll_param
> +.type	get_36x_iva_dpll_param, %function
> +.global	get_36x_iva_dpll_param
>   get_36x_iva_dpll_param:
>   	adr	r0, iva_36x_dpll_param
>   	mov	pc, lr
>
> -.globl get_36x_core_dpll_param
> +.type	get_36x_core_dpll_param, %function
> +.global	get_36x_core_dpll_param
>   get_36x_core_dpll_param:
>   	adr	r0, core_36x_dpll_param
>   	mov	pc, lr
>
> -.globl get_36x_per_dpll_param
> +.type	get_36x_per_dpll_param, %function
> +.global	get_36x_per_dpll_param
>   get_36x_per_dpll_param:
>   	adr	r0, per_36x_dpll_param
>   	mov	pc, lr
> diff --git a/arch/arm/cpu/armv7/s5pc1xx/cache.S b/arch/arm/cpu/armv7/s5pc1xx/cache.S
> index c7d6221..1f47203 100644
> --- a/arch/arm/cpu/armv7/s5pc1xx/cache.S
> +++ b/arch/arm/cpu/armv7/s5pc1xx/cache.S
> @@ -26,6 +26,7 @@
>   .align 5
>
>   #ifndef CONFIG_SYS_L2CACHE_OFF
> +.type v7_outer_cache_enable, %function
>   .global v7_outer_cache_enable
>   v7_outer_cache_enable:
>   	push	{r0, r1, r2, lr}
> @@ -34,6 +35,7 @@ v7_outer_cache_enable:
>   	mcr	15, 0, r3, cr1, cr0, 1
>   	pop	{r1, r2, r3, pc}
>
> +.type v7_outer_cache_disable, %function
>   .global v7_outer_cache_disable
>   v7_outer_cache_disable:
>   	push	{r0, r1, r2, lr}
> diff --git a/arch/arm/cpu/armv7/s5pc1xx/reset.S b/arch/arm/cpu/armv7/s5pc1xx/reset.S
> index 70fa146..65e197e 100644
> --- a/arch/arm/cpu/armv7/s5pc1xx/reset.S
> +++ b/arch/arm/cpu/armv7/s5pc1xx/reset.S
> @@ -26,7 +26,8 @@
>   #define S5PC100_SWRESET			0xE0200000
>   #define S5PC110_SWRESET			0xE0102000
>
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>   reset_cpu:
>   	ldr	r1, =S5PC100_PRO_ID
>   	ldr	r2, [r1]
> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
> index ef08a55..5679365 100644
> --- a/arch/arm/cpu/armv7/start.S
> +++ b/arch/arm/cpu/armv7/start.S
> @@ -34,7 +34,8 @@
>   #include<version.h>
>   #include<asm/system.h>
>
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start: b	reset
>   	ldr	pc, _undefined_instruction
>   	ldr	pc, _software_interrupt
> @@ -172,7 +173,8 @@ call_board_init_f:
>    * after relocating the monitor code.
>    *
>    */
> -	.globl	relocate_code
> +.type	relocate_code, %function
> +.global	relocate_code
>   relocate_code:
>   	mov	r4, r0	/* save addr_sp */
>   	mov	r5, r1	/* save addr of gd */
> @@ -298,7 +300,8 @@ _board_init_r_ofs:
>    * CONFIG_SYS_ICACHE_OFF is defined.
>    *
>    *************************************************************************/
> -.globl cpu_init_cp15
> +.type	cpu_init_cp15, %function
> +.global	cpu_init_cp15
>   cpu_init_cp15:
>   	/*
>   	 * Invalidate L1 I/D
> diff --git a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
> index 6b86647..f4a8cb0 100644
> --- a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
> +++ b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
> @@ -27,6 +27,7 @@
>   #include<version.h>
>
>   	.align	5
> +.type reset_cpu, %function
>   .global reset_cpu
>   reset_cpu:
>   	ldr	r1, rstctl			@ get addr for global reset
> diff --git a/arch/arm/cpu/armv7/u8500/lowlevel.S b/arch/arm/cpu/armv7/u8500/lowlevel.S
> index cffdfd1..66ecd93 100644
> --- a/arch/arm/cpu/armv7/u8500/lowlevel.S
> +++ b/arch/arm/cpu/armv7/u8500/lowlevel.S
> @@ -21,12 +21,14 @@
>
>   #include<config.h>
>
> -.globl lowlevel_init
> +.type	lowlevel_init, %function
> +.global	lowlevel_init
>   lowlevel_init:
>   	mov	pc, lr
>
>   	.align	5
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>   reset_cpu:
>   	ldr r0, =CFG_PRCMU_BASE
>   	ldr r1, =0x1
> diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S
> index cb32121..bc35566 100644
> --- a/arch/arm/cpu/ixp/start.S
> +++ b/arch/arm/cpu/ixp/start.S
> @@ -64,7 +64,8 @@
>   	sub  pc,pc,#4
>   	.endm
>
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start:
>   	ldr	pc, _reset
>   	ldr	pc, _undefined_instruction
> @@ -261,7 +262,8 @@ call_board_init_f:
>    * after relocating the monitor code.
>    *
>    */
> -	.globl	relocate_code
> +.type	relocate_code, %function
> +.global	relocate_code
>   relocate_code:
>   	mov	r4, r0	/* save addr_sp */
>   	mov	r5, r1	/* save addr of gd */
> @@ -537,7 +539,8 @@ fiq:
>   /****************************************************************************/
>
>   	.align	5
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>
>   reset_cpu:
>   	ldr	r1, =0x482e
> diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S
> index 62de8b8..585fcaf 100644
> --- a/arch/arm/cpu/lh7a40x/start.S
> +++ b/arch/arm/cpu/lh7a40x/start.S
> @@ -37,7 +37,8 @@
>    */
>
>
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start:	b       reset
>   	ldr	pc, _undefined_instruction
>   	ldr	pc, _software_interrupt
> @@ -172,7 +173,8 @@ call_board_init_f:
>    * after relocating the monitor code.
>    *
>    */
> -	.globl	relocate_code
> +.type	relocate_code, %function
> +.global	relocate_code
>   relocate_code:
>   	mov	r4, r0	/* save addr_sp */
>   	mov	r5, r1	/* save addr of gd */
> @@ -482,7 +484,8 @@ fiq:
>   #endif
>
>   	.align	5
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>   reset_cpu:
>   	bl	disable_interrupts
>
> diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
> index ba0de8f..a07ef19 100644
> --- a/arch/arm/cpu/pxa/start.S
> +++ b/arch/arm/cpu/pxa/start.S
> @@ -45,7 +45,8 @@
>   #endif
>   #endif
>
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start: b	reset
>   #ifdef CONFIG_SPL_BUILD
>   	ldr	pc, _hang
> @@ -180,7 +181,8 @@ call_board_init_f:
>    * after relocating the monitor code.
>    *
>    */
> -	.globl	relocate_code
> +.type	relocate_code, %function
> +.global	relocate_code
>   relocate_code:
>   	mov	r4, r0	/* save addr_sp */
>   	mov	r5, r1	/* save addr of gd */
> diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S
> index a29d5b4..ac1e1b1 100644
> --- a/arch/arm/cpu/s3c44b0/start.S
> +++ b/arch/arm/cpu/s3c44b0/start.S
> @@ -36,7 +36,8 @@
>    */
>
>
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start:	b       reset
>   	add	pc, pc, #0x0c000000
>   	add	pc, pc, #0x0c000000
> @@ -144,7 +145,8 @@ call_board_init_f:
>    * after relocating the monitor code.
>    *
>    */
> -	.globl	relocate_code
> +.type	relocate_code, %function
> +.global	relocate_code
>   relocate_code:
>   	mov	r4, r0	/* save addr_sp */
>   	mov	r5, r1	/* save addr of gd */
> diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
> index 92546d8..4e77c8e 100644
> --- a/arch/arm/cpu/sa1100/start.S
> +++ b/arch/arm/cpu/sa1100/start.S
> @@ -38,7 +38,8 @@
>    */
>
>
> -.globl _start
> +.type	_start, %function
> +.global	_start
>   _start:	b       reset
>   	ldr	pc, _undefined_instruction
>   	ldr	pc, _software_interrupt
> @@ -148,7 +149,8 @@ call_board_init_f:
>    * after relocating the monitor code.
>    *
>    */
> -	.globl	relocate_code
> +.type	relocate_code, %function
> +.global	relocate_code
>   relocate_code:
>   	mov	r4, r0	/* save addr_sp */
>   	mov	r5, r1	/* save addr of gd */
> @@ -487,7 +489,8 @@ fiq:
>   #endif
>
>   	.align	5
> -.globl reset_cpu
> +.type	reset_cpu, %function
> +.global	reset_cpu
>   reset_cpu:
>   	ldr	r0, RST_BASE
>   	mov	r1, #0x0			@ set bit 3-0 ...
> diff --git a/arch/arm/lib/_ashldi3.S b/arch/arm/lib/_ashldi3.S
> index 834ddc2..248c612 100644
> --- a/arch/arm/lib/_ashldi3.S
> +++ b/arch/arm/lib/_ashldi3.S
> @@ -34,8 +34,10 @@ Boston, MA 02110-1301, USA.  */
>   #define ah r1
>   #endif
>
> -.globl __ashldi3
> -.globl	__aeabi_llsl
> +.type	__ashldi3, %function
> +.global	__ashldi3
> +.type	__aeabi_llsl, %function
> +.global	__aeabi_llsl
>   __ashldi3:
>   __aeabi_llsl:
>
> diff --git a/arch/arm/lib/_ashrdi3.S b/arch/arm/lib/_ashrdi3.S
> index 671ac87..f070f59 100644
> --- a/arch/arm/lib/_ashrdi3.S
> +++ b/arch/arm/lib/_ashrdi3.S
> @@ -34,8 +34,10 @@ Boston, MA 02110-1301, USA.  */
>   #define ah r1
>   #endif
>
> -.globl __ashrdi3
> -.globl __aeabi_lasr
> +.type	__ashrdi3, %function
> +.global	__ashrdi3
> +.type	__aeabi_lasr, %function
> +.global	__aeabi_lasr
>   __ashrdi3:
>   __aeabi_lasr:
>
> diff --git a/arch/arm/lib/_divsi3.S b/arch/arm/lib/_divsi3.S
> index cfbadb2..9e76909 100644
> --- a/arch/arm/lib/_divsi3.S
> +++ b/arch/arm/lib/_divsi3.S
> @@ -95,8 +95,10 @@
>   .endm
>
>   	.align	5
> -.globl __divsi3
> -.globl __aeabi_idiv
> +.type	__divsi3, %function
> +.global	__divsi3
> +.type	__aeabi_idiv, %function
> +.global	__aeabi_idiv
>   __divsi3:
>   __aeabi_idiv:
>   	cmp	r1, #0
> diff --git a/arch/arm/lib/_lshrdi3.S b/arch/arm/lib/_lshrdi3.S
> index e7fa799..0df05c2 100644
> --- a/arch/arm/lib/_lshrdi3.S
> +++ b/arch/arm/lib/_lshrdi3.S
> @@ -34,8 +34,10 @@ Boston, MA 02110-1301, USA.  */
>   #define ah r1
>   #endif
>
> -.globl __lshrdi3
> -.globl __aeabi_llsr
> +.type	__lshrdi3, %function
> +.global	__lshrdi3
> +.type	__aeabi_llsr, %function
> +.global	__aeabi_llsr
>   __lshrdi3:
>   __aeabi_llsr:
>
> diff --git a/arch/arm/lib/_modsi3.S b/arch/arm/lib/_modsi3.S
> index 539c584..bc07f49 100644
> --- a/arch/arm/lib/_modsi3.S
> +++ b/arch/arm/lib/_modsi3.S
> @@ -70,7 +70,8 @@
>   .endm
>
>   	.align	5
> -.globl __modsi3
> +.type	__modsi3, %function
> +.global	__modsi3
>   __modsi3:
>   	cmp	r1, #0
>   	beq	Ldiv0
> diff --git a/arch/arm/lib/_udivsi3.S b/arch/arm/lib/_udivsi3.S
> index 1309802..e38d1d8 100644
> --- a/arch/arm/lib/_udivsi3.S
> +++ b/arch/arm/lib/_udivsi3.S
> @@ -72,7 +72,8 @@ Ldiv0:
>   	ldmia	sp!, {pc}
>   	.size  __udivsi3       , . -  __udivsi3
>
> -.globl __aeabi_uidivmod
> +.type	__aeabi_uidivmod, %function
> +.global	__aeabi_uidivmod
>   __aeabi_uidivmod:
>
>   	stmfd	sp!, {r0, r1, ip, lr}
> @@ -82,7 +83,8 @@ __aeabi_uidivmod:
>   	sub	r1, r1, r3
>   	mov	pc, lr
>
> -.globl __aeabi_idivmod
> +.type	__aeabi_idivmod, %function
> +.global	__aeabi_idivmod
>   __aeabi_idivmod:
>
>   	stmfd	sp!, {r0, r1, ip, lr}
> diff --git a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S
> index f655256..313f82a 100644
> --- a/arch/arm/lib/memcpy.S
> +++ b/arch/arm/lib/memcpy.S
> @@ -57,7 +57,8 @@
>
>   /* Prototype: void *memcpy(void *dest, const void *src, size_t n); */
>
> -.globl memcpy
> +.type	memcpy, %function
> +.global	memcpy
>   memcpy:
>
>   		cmp	r0, r1
> diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
> index 0cdf895..5f80539 100644
> --- a/arch/arm/lib/memset.S
> +++ b/arch/arm/lib/memset.S
> @@ -27,7 +27,8 @@
>    * memset again.
>    */
>
> -.globl memset
> +.type	memset, %function
> +.global	memset
>   memset:
>   	ands	r3, r0, #3		@ 1 unaligned?
>   	bne	1b			@ 1

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-17 11:09   ` Aneesh V
@ 2012-02-18 10:13     ` Albert ARIBAUD
  2012-02-18 13:24       ` Aneesh V
  0 siblings, 1 reply; 83+ messages in thread
From: Albert ARIBAUD @ 2012-02-18 10:13 UTC (permalink / raw)
  To: u-boot

Hi Aneesh,

Le 17/02/2012 12:09, Aneesh V a ?crit :
> Hi Albert,
>
> On Wednesday 15 February 2012 07:27 PM, Aneesh V wrote:
>> This is done using the following directive preceding
>> each function definition:
>>
>> .type<func-name>, %function
>>
>> This marks the symbol as a function in the object
>> header which in turn helps the linker in some cases.
>>
>> In particular this was found needed for resolving ARM/Thumb
>> calls correctly in a build with Thumb interworking enabled.
>>
>> This solves the following problem I had reported earlier:
>>
>> "When U-Boot/SPL is built using the Thumb instruction set the
>> toolchain has a potential issue with weakly linked symbols.
>> If a function has a weakly linked default implementation in C
>> and a real implementation in assembly GCC is confused about the
>> instruction set of the assembly implementation. As a result
>> the assembly function that is built in ARM is executed as
>> if it is Thumb. This results in a crash"
>>
>> Signed-off-by: Aneesh V<aneesh@ti.com>
>
> Does this look good to you. I was a bit nervous about touching so many
> files. Please let me know if you would prefer to change only the OMAP
> function that was creating the ARM/Thumb problem. I did a "MAKEALL -a
> arm" and didn't see any new errors.
>
> Let me know if this is an acceptable solution to the problem.

Regarding the solution: it is quite ok to me. I would just like to 
understand the exact effect of the .function directive, what its options 
are and if some of these should not be explicitly specified.

Regarding touching many files: I won't be worried as long as you check 
that the first three patches have no effect on existing boards. This can 
be verified as follows -- if you haven't done so already:

- build your OMAP target without the patch set and do a hex dump of 
u-boot.bin;

- apply the first three patches of your set, rebuild your OMAP target 
without the patch set and do a hex dump of u-boot.bin;

- compare both dumps. Normally you should only see one difference, in 
the build version and date -- if .function does not actually alter the 
assembly code, which I hope it indeed does not when building for ARM.

If there are more changes than build version and date, then they might 
be due to .function requiring some yet unknown additional option, or to 
some change in patch 1 or 3 not being completely conditioned on 
CONFIG_SYS_THUMB_BUILD.

> regards,
> Aneesh

Amicalement,
-- 
Albert.

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-18 10:13     ` Albert ARIBAUD
@ 2012-02-18 13:24       ` Aneesh V
  2012-02-18 15:04         ` Albert ARIBAUD
  2012-02-18 16:34         ` Aneesh V
  0 siblings, 2 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-18 13:24 UTC (permalink / raw)
  To: u-boot

Hi Albert,

On Saturday 18 February 2012 03:43 PM, Albert ARIBAUD wrote:
> Hi Aneesh,
>
> Le 17/02/2012 12:09, Aneesh V a ?crit :
>> Hi Albert,
>>
>> On Wednesday 15 February 2012 07:27 PM, Aneesh V wrote:
>>> This is done using the following directive preceding
>>> each function definition:
>>>
>>> .type<func-name>, %function
>>>
>>> This marks the symbol as a function in the object
>>> header which in turn helps the linker in some cases.
>>>
>>> In particular this was found needed for resolving ARM/Thumb
>>> calls correctly in a build with Thumb interworking enabled.
>>>
>>> This solves the following problem I had reported earlier:
>>>
>>> "When U-Boot/SPL is built using the Thumb instruction set the
>>> toolchain has a potential issue with weakly linked symbols.
>>> If a function has a weakly linked default implementation in C
>>> and a real implementation in assembly GCC is confused about the
>>> instruction set of the assembly implementation. As a result
>>> the assembly function that is built in ARM is executed as
>>> if it is Thumb. This results in a crash"
>>>
>>> Signed-off-by: Aneesh V<aneesh@ti.com>
>>
>> Does this look good to you. I was a bit nervous about touching so many
>> files. Please let me know if you would prefer to change only the OMAP
>> function that was creating the ARM/Thumb problem. I did a "MAKEALL -a
>> arm" and didn't see any new errors.
>>
>> Let me know if this is an acceptable solution to the problem.
>
> Regarding the solution: it is quite ok to me. I would just like to
> understand the exact effect of the .function directive, what its options
> are and if some of these should not be explicitly specified.
>
> Regarding touching many files: I won't be worried as long as you check
> that the first three patches have no effect on existing boards. This can
> be verified as follows -- if you haven't done so already:
>
> - build your OMAP target without the patch set and do a hex dump of
> u-boot.bin;
>
> - apply the first three patches of your set, rebuild your OMAP target
> without the patch set and do a hex dump of u-boot.bin;
>
> - compare both dumps. Normally you should only see one difference, in
> the build version and date -- if .function does not actually alter the
> assembly code, which I hope it indeed does not when building for ARM.
>
> If there are more changes than build version and date, then they might
> be due to .function requiring some yet unknown additional option, or to
> some change in patch 1 or 3 not being completely conditioned on
> CONFIG_SYS_THUMB_BUILD.

I can reproduce the problem with a simple test program.
Note: I can reproduce this with Sourcery G++ Lite 2010q1-202 (GCC 4.4.1
- Binutils 2.19.51.20090709)
But I *can not* reproduce reproduce this with Linaro GCC 2012.01 (GCC
4.6.3 , Binutils 2.22)
So apparently the issue has been fixed recently. Unfortunately Linaro
GCC 2012.01 creates a new Thumb problem that I am investigating now.
Somehow I missed this when I tested earlier. So, my Thumb build is
not working with Linaro GCC 2012.01. But this one is not reproduced on
Sourcery G++ Lite 2010q1-202!

Here is the program I used to reproduce the problem in Sourcery G++
Lite 2010q1-202 that this patch is addressing

a.c:
====
extern void foo (void) __attribute__ ((weak, alias ("__foo")));

void __foo (void)
{
}

extern void call_foo(void);

int main (void)
{
   call_foo ();
}

b.S:
====
.text
.align  2
.global foo
foo:
	push	{r7}
	add	r7, sp, #0
	mov	sp, r7
	pop	{r7}
	bx	lr
	.size	foo, .-foo


c.S:
====
.text
.align  2

.global call_foo
call_foo:
	bl	foo
	bx	lr

.global __aeabi_unwind_cpp_pr0
__aeabi_unwind_cpp_pr0:
	bx	lr

Now build it and take the assembly dump using the following commands:

arm-none-linux-gnueabi-gcc -mthumb -mthumb-interwork -c a.c
arm-none-linux-gnueabi-gcc -mthumb -mthumb-interwork -c b.S
arm-none-linux-gnueabi-gcc -mthumb -mthumb-interwork -c c.S
arm-none-linux-gnueabi-ld -r a.o -o alib.o
arm-none-linux-gnueabi-ld -r b.o -o blib.o
arm-none-linux-gnueabi-ld -r c.o -o clib.o
arm-none-linux-gnueabi-ld --start-group clib.o  alib.o blib.o 
--end-group -o a.out
arm-none-linux-gnueabi-objdump -S --reloc a.out

You will get something like this in the assembly dump:
00008094 <call_foo>:
     8094:	fa000006 	blx	80b4 <foo>
     8098:	e12fff1e 	bx	lr

The blx is wrong as we are jumping to an ARM function from ARM.

Now if you change b.S like this:

  .text
  .align  2
+.type foo, %function
  .global foo
  foo:
  	push	{r7}


And compile it again in the same way you will see:
00008094 <call_foo>:
     8094:	eb000006 	bl	80b4 <foo>
     8098:	e12fff1e 	bx	lr

Please note that the branch to foo is correct now.

I hope this convinces you that %function indeed has an effect.

I will get back with more details on the Linaro GCC 2012.01 later.

br,
Aneesh

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-18 13:24       ` Aneesh V
@ 2012-02-18 15:04         ` Albert ARIBAUD
  2012-02-18 16:34         ` Aneesh V
  1 sibling, 0 replies; 83+ messages in thread
From: Albert ARIBAUD @ 2012-02-18 15:04 UTC (permalink / raw)
  To: u-boot

Hi Aneesh,

Le 18/02/2012 14:24, Aneesh V a ?crit :
> Hi Albert,
>
> On Saturday 18 February 2012 03:43 PM, Albert ARIBAUD wrote:
>> Hi Aneesh,
>>
>> Le 17/02/2012 12:09, Aneesh V a ?crit :
>>> Hi Albert,
>>>
>>> On Wednesday 15 February 2012 07:27 PM, Aneesh V wrote:
>>>> This is done using the following directive preceding
>>>> each function definition:
>>>>
>>>> .type<func-name>, %function
>>>>
>>>> This marks the symbol as a function in the object
>>>> header which in turn helps the linker in some cases.
>>>>
>>>> In particular this was found needed for resolving ARM/Thumb
>>>> calls correctly in a build with Thumb interworking enabled.
>>>>
>>>> This solves the following problem I had reported earlier:
>>>>
>>>> "When U-Boot/SPL is built using the Thumb instruction set the
>>>> toolchain has a potential issue with weakly linked symbols.
>>>> If a function has a weakly linked default implementation in C
>>>> and a real implementation in assembly GCC is confused about the
>>>> instruction set of the assembly implementation. As a result
>>>> the assembly function that is built in ARM is executed as
>>>> if it is Thumb. This results in a crash"
>>>>
>>>> Signed-off-by: Aneesh V<aneesh@ti.com>
>>>
>>> Does this look good to you. I was a bit nervous about touching so many
>>> files. Please let me know if you would prefer to change only the OMAP
>>> function that was creating the ARM/Thumb problem. I did a "MAKEALL -a
>>> arm" and didn't see any new errors.
>>>
>>> Let me know if this is an acceptable solution to the problem.
>>
>> Regarding the solution: it is quite ok to me. I would just like to
>> understand the exact effect of the .function directive, what its options
>> are and if some of these should not be explicitly specified.
>>
>> Regarding touching many files: I won't be worried as long as you check
>> that the first three patches have no effect on existing boards. This can
>> be verified as follows -- if you haven't done so already:
>>
>> - build your OMAP target without the patch set and do a hex dump of
>> u-boot.bin;
>>
>> - apply the first three patches of your set, rebuild your OMAP target
>> without the patch set and do a hex dump of u-boot.bin;
>>
>> - compare both dumps. Normally you should only see one difference, in
>> the build version and date -- if .function does not actually alter the
>> assembly code, which I hope it indeed does not when building for ARM.
>>
>> If there are more changes than build version and date, then they might
>> be due to .function requiring some yet unknown additional option, or to
>> some change in patch 1 or 3 not being completely conditioned on
>> CONFIG_SYS_THUMB_BUILD.
>
> I can reproduce the problem with a simple test program.
> Note: I can reproduce this with Sourcery G++ Lite 2010q1-202 (GCC 4.4.1
> - Binutils 2.19.51.20090709)
> But I *can not* reproduce reproduce this with Linaro GCC 2012.01 (GCC
> 4.6.3 , Binutils 2.22)
> So apparently the issue has been fixed recently. Unfortunately Linaro
> GCC 2012.01 creates a new Thumb problem that I am investigating now.
> Somehow I missed this when I tested earlier. So, my Thumb build is
> not working with Linaro GCC 2012.01. But this one is not reproduced on
> Sourcery G++ Lite 2010q1-202!
>
> Here is the program I used to reproduce the problem in Sourcery G++
> Lite 2010q1-202 that this patch is addressing
>
> a.c:
> ====
> extern void foo (void) __attribute__ ((weak, alias ("__foo")));
>
> void __foo (void)
> {
> }
>
> extern void call_foo(void);
>
> int main (void)
> {
> call_foo ();
> }
>
> b.S:
> ====
> .text
> .align 2
> .global foo
> foo:
> push {r7}
> add r7, sp, #0
> mov sp, r7
> pop {r7}
> bx lr
> .size foo, .-foo
>
>
> c.S:
> ====
> .text
> .align 2
>
> .global call_foo
> call_foo:
> bl foo
> bx lr
>
> .global __aeabi_unwind_cpp_pr0
> __aeabi_unwind_cpp_pr0:
> bx lr
>
> Now build it and take the assembly dump using the following commands:
>
> arm-none-linux-gnueabi-gcc -mthumb -mthumb-interwork -c a.c
> arm-none-linux-gnueabi-gcc -mthumb -mthumb-interwork -c b.S
> arm-none-linux-gnueabi-gcc -mthumb -mthumb-interwork -c c.S
> arm-none-linux-gnueabi-ld -r a.o -o alib.o
> arm-none-linux-gnueabi-ld -r b.o -o blib.o
> arm-none-linux-gnueabi-ld -r c.o -o clib.o
> arm-none-linux-gnueabi-ld --start-group clib.o alib.o blib.o --end-group
> -o a.out
> arm-none-linux-gnueabi-objdump -S --reloc a.out
>
> You will get something like this in the assembly dump:
> 00008094 <call_foo>:
> 8094: fa000006 blx 80b4 <foo>
> 8098: e12fff1e bx lr
>
> The blx is wrong as we are jumping to an ARM function from ARM.
>
> Now if you change b.S like this:
>
> .text
> .align 2
> +.type foo, %function
> .global foo
> foo:
> push {r7}
>
>
> And compile it again in the same way you will see:
> 00008094 <call_foo>:
> 8094: eb000006 bl 80b4 <foo>
> 8098: e12fff1e bx lr
>
> Please note that the branch to foo is correct now.
>
> I hope this convinces you that %function indeed has an effect.

This convinces me that .function as you used it had the effect that you 
needed for Thumb compilation, but I had no doubts about that. What I 
want to be sure is that it also has no other, unexpected, effect, 
especially when still building ARM code only; and the test I suggest 
would demonstrate this. :)

> I will get back with more details on the Linaro GCC 2012.01 later.

Thanks. Anyway, this patch series is not going to end up in 2012.03 so 
there is no hurry and we can take our time making sure it works well.

> br,
> Aneesh

Amicalement,
-- 
Albert.

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-18 13:24       ` Aneesh V
  2012-02-18 15:04         ` Albert ARIBAUD
@ 2012-02-18 16:34         ` Aneesh V
  2012-02-18 16:48           ` Albert ARIBAUD
  1 sibling, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-18 16:34 UTC (permalink / raw)
  To: u-boot

On Saturday 18 February 2012 06:54 PM, Aneesh V wrote:
> Hi Albert,
>
> On Saturday 18 February 2012 03:43 PM, Albert ARIBAUD wrote:
>> Hi Aneesh,
>>
>> Le 17/02/2012 12:09, Aneesh V a ?crit :
>>> Hi Albert,
>>>
>>> On Wednesday 15 February 2012 07:27 PM, Aneesh V wrote:
>>>> This is done using the following directive preceding
>>>> each function definition:
>>>>
>>>> .type<func-name>, %function
>>>>
>>>> This marks the symbol as a function in the object
>>>> header which in turn helps the linker in some cases.
>>>>
>>>> In particular this was found needed for resolving ARM/Thumb
>>>> calls correctly in a build with Thumb interworking enabled.
>>>>
>>>> This solves the following problem I had reported earlier:
>>>>
>>>> "When U-Boot/SPL is built using the Thumb instruction set the
>>>> toolchain has a potential issue with weakly linked symbols.
>>>> If a function has a weakly linked default implementation in C
>>>> and a real implementation in assembly GCC is confused about the
>>>> instruction set of the assembly implementation. As a result
>>>> the assembly function that is built in ARM is executed as
>>>> if it is Thumb. This results in a crash"
>>>>
>>>> Signed-off-by: Aneesh V<aneesh@ti.com>
>>>
>>> Does this look good to you. I was a bit nervous about touching so many
>>> files. Please let me know if you would prefer to change only the OMAP
>>> function that was creating the ARM/Thumb problem. I did a "MAKEALL -a
>>> arm" and didn't see any new errors.
>>>
>>> Let me know if this is an acceptable solution to the problem.
>>
>> Regarding the solution: it is quite ok to me. I would just like to
>> understand the exact effect of the .function directive, what its options
>> are and if some of these should not be explicitly specified.
>>
>> Regarding touching many files: I won't be worried as long as you check
>> that the first three patches have no effect on existing boards. This can
>> be verified as follows -- if you haven't done so already:
>>
>> - build your OMAP target without the patch set and do a hex dump of
>> u-boot.bin;
>>
>> - apply the first three patches of your set, rebuild your OMAP target
>> without the patch set and do a hex dump of u-boot.bin;
>>
>> - compare both dumps. Normally you should only see one difference, in
>> the build version and date -- if .function does not actually alter the
>> assembly code, which I hope it indeed does not when building for ARM.
>>
>> If there are more changes than build version and date, then they might
>> be due to .function requiring some yet unknown additional option, or to
>> some change in patch 1 or 3 not being completely conditioned on
>> CONFIG_SYS_THUMB_BUILD.
>
> I can reproduce the problem with a simple test program.
> Note: I can reproduce this with Sourcery G++ Lite 2010q1-202 (GCC 4.4.1
> - Binutils 2.19.51.20090709)
> But I *can not* reproduce reproduce this with Linaro GCC 2012.01 (GCC
> 4.6.3 , Binutils 2.22)

Linaro GCC 2012.01 has the same problem when assembly function(ARM is
called from C (Thumb). I can reproduce it using this program:

a.c:
====
int main (void)
{
   foo ();
}

b.S:
====
.text
.align  2
.global foo
foo:
	push	{r7}
	add	r7, sp, #0
	mov	sp, r7
	pop	{r7}
	bx	lr
	.size	foo, .-foo

.global __aeabi_unwind_cpp_pr0
__aeabi_unwind_cpp_pr0:
	bx	lr

arm-linux-gnueabi-gcc -mthumb -mthumb-interwork -c a.c
arm-linux-gnueabi-gcc -mthumb -mthumb-interwork -c b.S
arm-linux-gnueabi-ld -r a.o -o alib.o
arm-linux-gnueabi-ld -r b.o -o blib.o
arm-linux-gnueabi-ld --start-group alib.o blib.o --end-group -o a.out
arm-linux-gnueabi-objdump -S --reloc a.out

gives:
     8076:	af00      	add	r7, sp, #0
     8078:	f000 f802 	bl	8080 <foo>
     807c:	4618      	mov	r0, r3

It should have been "blx foo"

Again, %function solves it. Conclusion: %function is necessary with
both old and new tool-chains when building for Thumb.


It should have been "blx	8080 <foo>", isn't it? Again, %function
solves it.

Conclusion: %function is necessary with both old and new tool-chains
when building for Thumb.

> So apparently the issue has been fixed recently. Unfortunately Linaro
> GCC 2012.01 creates a new Thumb problem that I am investigating now.
> Somehow I missed this when I tested earlier. So, my Thumb build is
> not working with Linaro GCC 2012.01. But this one is not reproduced on
> Sourcery G++ Lite 2010q1-202!
>
> Here is the program I used to reproduce the problem in Sourcery G++
> Lite 2010q1-202 that this patch is addressing
>
> a.c:
> ====
> extern void foo (void) __attribute__ ((weak, alias ("__foo")));
>
> void __foo (void)
> {
> }
>
> extern void call_foo(void);
>
> int main (void)
> {
> call_foo ();
> }
>
> b.S:
> ====
> .text
> .align 2
> .global foo
> foo:
> push {r7}
> add r7, sp, #0
> mov sp, r7
> pop {r7}
> bx lr
> .size foo, .-foo
>
>
> c.S:
> ====
> .text
> .align 2
>
> .global call_foo
> call_foo:
> bl foo
> bx lr
>
> .global __aeabi_unwind_cpp_pr0
> __aeabi_unwind_cpp_pr0:
> bx lr
>
> Now build it and take the assembly dump using the following commands:
>
> arm-none-linux-gnueabi-gcc -mthumb -mthumb-interwork -c a.c
> arm-none-linux-gnueabi-gcc -mthumb -mthumb-interwork -c b.S
> arm-none-linux-gnueabi-gcc -mthumb -mthumb-interwork -c c.S
> arm-none-linux-gnueabi-ld -r a.o -o alib.o
> arm-none-linux-gnueabi-ld -r b.o -o blib.o
> arm-none-linux-gnueabi-ld -r c.o -o clib.o
> arm-none-linux-gnueabi-ld --start-group clib.o alib.o blib.o --end-group
> -o a.out
> arm-none-linux-gnueabi-objdump -S --reloc a.out
>
> You will get something like this in the assembly dump:
> 00008094 <call_foo>:
> 8094: fa000006 blx 80b4 <foo>
> 8098: e12fff1e bx lr
>
> The blx is wrong as we are jumping to an ARM function from ARM.
>
> Now if you change b.S like this:
>
> .text
> .align 2
> +.type foo, %function
> .global foo
> foo:
> push {r7}
>
>
> And compile it again in the same way you will see:
> 00008094 <call_foo>:
> 8094: eb000006 bl 80b4 <foo>
> 8098: e12fff1e bx lr
>
> Please note that the branch to foo is correct now.
>
> I hope this convinces you that %function indeed has an effect.
>
> I will get back with more details on the Linaro GCC 2012.01 later.

I meant "the Linaro GCC 2012.01 tool-chain problem"

This is a different problem. Some of the .rodata symbols are given an 
odd address although they should be aligned to at least 2-byte boundary 
). In fact the data is actually put at the even address but the symbol's 
value is +1 of the actual address. This is the ARM convention for Thumb 
functions, but they have applied it here for data too. That's the 
problem. I see that this doesn't happen to all the .rodata in SPL. 
Neither could I reproduce it with a small program. But the workaround 
for this problem is to avoid -fdata-sections. The following patch works
around it.

diff --git a/config.mk b/config.mk
index ddaa477..723286a 100644
--- a/config.mk
+++ b/config.mk
@@ -190,7 +190,7 @@ CPPFLAGS := $(DBGFLAGS) $(OPTFLAGS) $(RELFLAGS)		\

  # Enable garbage collection of un-used sections for SPL
  ifeq ($(CONFIG_SPL_BUILD),y)
-CPPFLAGS += -ffunction-sections -fdata-sections
+CPPFLAGS += -ffunction-sections
  LDFLAGS_FINAL += --gc-sections
  endif

Will you take a patch to make -fdata-sections optional, that is, having
it under something like CONFIG_SYS_SPL_NO_FDATA_SECTIONS?

br,
Aneesh

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-18 16:34         ` Aneesh V
@ 2012-02-18 16:48           ` Albert ARIBAUD
  2012-02-20 16:08             ` Aneesh V
  0 siblings, 1 reply; 83+ messages in thread
From: Albert ARIBAUD @ 2012-02-18 16:48 UTC (permalink / raw)
  To: u-boot

Hi Aneesh,

Le 18/02/2012 17:34, Aneesh V a ?crit :
> On Saturday 18 February 2012 06:54 PM, Aneesh V wrote:
>> Hi Albert,
>>
>> On Saturday 18 February 2012 03:43 PM, Albert ARIBAUD wrote:
>>> Hi Aneesh,
>>>
>>> Le 17/02/2012 12:09, Aneesh V a ?crit :
>>>> Hi Albert,
>>>>
>>>> On Wednesday 15 February 2012 07:27 PM, Aneesh V wrote:
>>>>> This is done using the following directive preceding
>>>>> each function definition:
>>>>>
>>>>> .type<func-name>, %function
>>>>>
>>>>> This marks the symbol as a function in the object
>>>>> header which in turn helps the linker in some cases.
>>>>>
>>>>> In particular this was found needed for resolving ARM/Thumb
>>>>> calls correctly in a build with Thumb interworking enabled.
>>>>>
>>>>> This solves the following problem I had reported earlier:
>>>>>
>>>>> "When U-Boot/SPL is built using the Thumb instruction set the
>>>>> toolchain has a potential issue with weakly linked symbols.
>>>>> If a function has a weakly linked default implementation in C
>>>>> and a real implementation in assembly GCC is confused about the
>>>>> instruction set of the assembly implementation. As a result
>>>>> the assembly function that is built in ARM is executed as
>>>>> if it is Thumb. This results in a crash"
>>>>>
>>>>> Signed-off-by: Aneesh V<aneesh@ti.com>
>>>>
>>>> Does this look good to you. I was a bit nervous about touching so many
>>>> files. Please let me know if you would prefer to change only the OMAP
>>>> function that was creating the ARM/Thumb problem. I did a "MAKEALL -a
>>>> arm" and didn't see any new errors.
>>>>
>>>> Let me know if this is an acceptable solution to the problem.
>>>
>>> Regarding the solution: it is quite ok to me. I would just like to
>>> understand the exact effect of the .function directive, what its options
>>> are and if some of these should not be explicitly specified.
>>>
>>> Regarding touching many files: I won't be worried as long as you check
>>> that the first three patches have no effect on existing boards. This can
>>> be verified as follows -- if you haven't done so already:
>>>
>>> - build your OMAP target without the patch set and do a hex dump of
>>> u-boot.bin;
>>>
>>> - apply the first three patches of your set, rebuild your OMAP target
>>> without the patch set and do a hex dump of u-boot.bin;
>>>
>>> - compare both dumps. Normally you should only see one difference, in
>>> the build version and date -- if .function does not actually alter the
>>> assembly code, which I hope it indeed does not when building for ARM.
>>>
>>> If there are more changes than build version and date, then they might
>>> be due to .function requiring some yet unknown additional option, or to
>>> some change in patch 1 or 3 not being completely conditioned on
>>> CONFIG_SYS_THUMB_BUILD.
>>
>> I can reproduce the problem with a simple test program.
>> Note: I can reproduce this with Sourcery G++ Lite 2010q1-202 (GCC 4.4.1
>> - Binutils 2.19.51.20090709)
>> But I *can not* reproduce reproduce this with Linaro GCC 2012.01 (GCC
>> 4.6.3 , Binutils 2.22)
>
> Linaro GCC 2012.01 has the same problem when assembly function(ARM is
> called from C (Thumb). I can reproduce it using this program:
>
> a.c:
> ====
> int main (void)
> {
> foo ();
> }
>
> b.S:
> ====
> .text
> .align 2
> .global foo
> foo:
> push {r7}
> add r7, sp, #0
> mov sp, r7
> pop {r7}
> bx lr
> .size foo, .-foo
>
> .global __aeabi_unwind_cpp_pr0
> __aeabi_unwind_cpp_pr0:
> bx lr
>
> arm-linux-gnueabi-gcc -mthumb -mthumb-interwork -c a.c
> arm-linux-gnueabi-gcc -mthumb -mthumb-interwork -c b.S
> arm-linux-gnueabi-ld -r a.o -o alib.o
> arm-linux-gnueabi-ld -r b.o -o blib.o
> arm-linux-gnueabi-ld --start-group alib.o blib.o --end-group -o a.out
> arm-linux-gnueabi-objdump -S --reloc a.out
>
> gives:
> 8076: af00 add r7, sp, #0
> 8078: f000 f802 bl 8080 <foo>
> 807c: 4618 mov r0, r3
>
> It should have been "blx foo"
>
> Again, %function solves it. Conclusion: %function is necessary with
> both old and new tool-chains when building for Thumb.
>
>
> It should have been "blx 8080 <foo>", isn't it? Again, %function
> solves it.
>
> Conclusion: %function is necessary with both old and new tool-chains
> when building for Thumb.
>
>> So apparently the issue has been fixed recently. Unfortunately Linaro
>> GCC 2012.01 creates a new Thumb problem that I am investigating now.
>> Somehow I missed this when I tested earlier. So, my Thumb build is
>> not working with Linaro GCC 2012.01. But this one is not reproduced on
>> Sourcery G++ Lite 2010q1-202!
>>
>> Here is the program I used to reproduce the problem in Sourcery G++
>> Lite 2010q1-202 that this patch is addressing
>>
>> a.c:
>> ====
>> extern void foo (void) __attribute__ ((weak, alias ("__foo")));
>>
>> void __foo (void)
>> {
>> }
>>
>> extern void call_foo(void);
>>
>> int main (void)
>> {
>> call_foo ();
>> }
>>
>> b.S:
>> ====
>> .text
>> .align 2
>> .global foo
>> foo:
>> push {r7}
>> add r7, sp, #0
>> mov sp, r7
>> pop {r7}
>> bx lr
>> .size foo, .-foo
>>
>>
>> c.S:
>> ====
>> .text
>> .align 2
>>
>> .global call_foo
>> call_foo:
>> bl foo
>> bx lr
>>
>> .global __aeabi_unwind_cpp_pr0
>> __aeabi_unwind_cpp_pr0:
>> bx lr
>>
>> Now build it and take the assembly dump using the following commands:
>>
>> arm-none-linux-gnueabi-gcc -mthumb -mthumb-interwork -c a.c
>> arm-none-linux-gnueabi-gcc -mthumb -mthumb-interwork -c b.S
>> arm-none-linux-gnueabi-gcc -mthumb -mthumb-interwork -c c.S
>> arm-none-linux-gnueabi-ld -r a.o -o alib.o
>> arm-none-linux-gnueabi-ld -r b.o -o blib.o
>> arm-none-linux-gnueabi-ld -r c.o -o clib.o
>> arm-none-linux-gnueabi-ld --start-group clib.o alib.o blib.o --end-group
>> -o a.out
>> arm-none-linux-gnueabi-objdump -S --reloc a.out
>>
>> You will get something like this in the assembly dump:
>> 00008094 <call_foo>:
>> 8094: fa000006 blx 80b4 <foo>
>> 8098: e12fff1e bx lr
>>
>> The blx is wrong as we are jumping to an ARM function from ARM.
>>
>> Now if you change b.S like this:
>>
>> .text
>> .align 2
>> +.type foo, %function
>> .global foo
>> foo:
>> push {r7}
>>
>>
>> And compile it again in the same way you will see:
>> 00008094 <call_foo>:
>> 8094: eb000006 bl 80b4 <foo>
>> 8098: e12fff1e bx lr
>>
>> Please note that the branch to foo is correct now.
>>
>> I hope this convinces you that %function indeed has an effect.
>>
>> I will get back with more details on the Linaro GCC 2012.01 later.
>
> I meant "the Linaro GCC 2012.01 tool-chain problem"
>
> This is a different problem. Some of the .rodata symbols are given an
> odd address although they should be aligned to at least 2-byte boundary
> ). In fact the data is actually put at the even address but the symbol's
> value is +1 of the actual address. This is the ARM convention for Thumb
> functions, but they have applied it here for data too. That's the
> problem. I see that this doesn't happen to all the .rodata in SPL.
> Neither could I reproduce it with a small program. But the workaround
> for this problem is to avoid -fdata-sections. The following patch works
> around it.
>
> diff --git a/config.mk b/config.mk
> index ddaa477..723286a 100644
> --- a/config.mk
> +++ b/config.mk
> @@ -190,7 +190,7 @@ CPPFLAGS := $(DBGFLAGS) $(OPTFLAGS) $(RELFLAGS) \
>
> # Enable garbage collection of un-used sections for SPL
> ifeq ($(CONFIG_SPL_BUILD),y)
> -CPPFLAGS += -ffunction-sections -fdata-sections
> +CPPFLAGS += -ffunction-sections
> LDFLAGS_FINAL += --gc-sections
> endif
>
> Will you take a patch to make -fdata-sections optional, that is, having
> it under something like CONFIG_SYS_SPL_NO_FDATA_SECTIONS?

Hmm... considering you're seeing the issue in a fairly new toolchain 
release, I prefer notifying the toolchain makers, rather than removing 
the -fdata-sections from SPL even for specific boards. Can you go and 
see why the Linaro toolchain generated odd "thumb data" at all and get 
this fixed?

> br,
> Aneesh

Amicalement,
-- 
Albert.

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-18 16:48           ` Albert ARIBAUD
@ 2012-02-20 16:08             ` Aneesh V
  2012-02-23 11:06               ` Aneesh V
  0 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-20 16:08 UTC (permalink / raw)
  To: u-boot

On Saturday 18 February 2012 10:18 PM, Albert ARIBAUD wrote:
> Hi Aneesh,
>

[...]

>>> I will get back with more details on the Linaro GCC 2012.01 later.
>>
>> I meant "the Linaro GCC 2012.01 tool-chain problem"
>>
>> This is a different problem. Some of the .rodata symbols are given an
>> odd address although they should be aligned to at least 2-byte boundary
>> ). In fact the data is actually put at the even address but the symbol's
>> value is +1 of the actual address. This is the ARM convention for Thumb
>> functions, but they have applied it here for data too. That's the
>> problem. I see that this doesn't happen to all the .rodata in SPL.
>> Neither could I reproduce it with a small program. But the workaround
>> for this problem is to avoid -fdata-sections. The following patch works
>> around it.
>>
>> diff --git a/config.mk b/config.mk
>> index ddaa477..723286a 100644
>> --- a/config.mk
>> +++ b/config.mk
>> @@ -190,7 +190,7 @@ CPPFLAGS := $(DBGFLAGS) $(OPTFLAGS) $(RELFLAGS) \
>>
>> # Enable garbage collection of un-used sections for SPL
>> ifeq ($(CONFIG_SPL_BUILD),y)
>> -CPPFLAGS += -ffunction-sections -fdata-sections
>> +CPPFLAGS += -ffunction-sections
>> LDFLAGS_FINAL += --gc-sections
>> endif
>>
>> Will you take a patch to make -fdata-sections optional, that is, having
>> it under something like CONFIG_SYS_SPL_NO_FDATA_SECTIONS?
>
> Hmm... considering you're seeing the issue in a fairly new toolchain
> release, I prefer notifying the toolchain makers, rather than removing
> the -fdata-sections from SPL even for specific boards. Can you go and
> see why the Linaro toolchain generated odd "thumb data" at all and get
> this fixed?

I tried investigating a bit. As I mentioned earlier it doesn't happen
with some other files that use the same compiler and linker commands.
So, I don't know what's going on. Also, I couldn't reproduce it with a
simple program unlike in the other cases. Anyway, I have notified
tool-chain folks at Linaro:

http://article.gmane.org/gmane.linux.linaro.toolchain/2096

br,
Aneesh

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-20 16:08             ` Aneesh V
@ 2012-02-23 11:06               ` Aneesh V
  0 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-23 11:06 UTC (permalink / raw)
  To: u-boot

On Monday 20 February 2012 09:38 PM, Aneesh V wrote:
> On Saturday 18 February 2012 10:18 PM, Albert ARIBAUD wrote:
>> Hi Aneesh,
>>
>
> [...]
>
>>>> I will get back with more details on the Linaro GCC 2012.01 later.
>>>
>>> I meant "the Linaro GCC 2012.01 tool-chain problem"
>>>
>>> This is a different problem. Some of the .rodata symbols are given an
>>> odd address although they should be aligned to at least 2-byte boundary
>>> ). In fact the data is actually put at the even address but the symbol's
>>> value is +1 of the actual address. This is the ARM convention for Thumb
>>> functions, but they have applied it here for data too. That's the
>>> problem. I see that this doesn't happen to all the .rodata in SPL.
>>> Neither could I reproduce it with a small program. But the workaround
>>> for this problem is to avoid -fdata-sections. The following patch works
>>> around it.
>>>
>>> diff --git a/config.mk b/config.mk
>>> index ddaa477..723286a 100644
>>> --- a/config.mk
>>> +++ b/config.mk
>>> @@ -190,7 +190,7 @@ CPPFLAGS := $(DBGFLAGS) $(OPTFLAGS) $(RELFLAGS) \
>>>
>>> # Enable garbage collection of un-used sections for SPL
>>> ifeq ($(CONFIG_SPL_BUILD),y)
>>> -CPPFLAGS += -ffunction-sections -fdata-sections
>>> +CPPFLAGS += -ffunction-sections
>>> LDFLAGS_FINAL += --gc-sections
>>> endif
>>>
>>> Will you take a patch to make -fdata-sections optional, that is, having
>>> it under something like CONFIG_SYS_SPL_NO_FDATA_SECTIONS?
>>
>> Hmm... considering you're seeing the issue in a fairly new toolchain
>> release, I prefer notifying the toolchain makers, rather than removing
>> the -fdata-sections from SPL even for specific boards. Can you go and
>> see why the Linaro toolchain generated odd "thumb data" at all and get
>> this fixed?
>
> I tried investigating a bit. As I mentioned earlier it doesn't happen
> with some other files that use the same compiler and linker commands.
> So, I don't know what's going on. Also, I couldn't reproduce it with a
> simple program unlike in the other cases. Anyway, I have notified
> tool-chain folks at Linaro:
>
> http://article.gmane.org/gmane.linux.linaro.toolchain/2096

Ulrich Weigand has identified the root-cause [1]. The problem was due
to __attribute__ ((packed)) used in a structure. Let me quote him:

**********************************************************************
"I can reproduce the odd addresses of .rodata symbols.  However, this
occurs simply because the linker put *no* alignment requirement whatsoever
on those sections:

Section Headers:
   [Nr] Name              Type            Addr     Off    Size   ES Flg Lk
Inf Al
[snip]
   [11] .rodata.wkup_padc PROGBITS        00000000 000100 000004 00   A  0
0  1
   [12] .rodata.wkup_padc PROGBITS        00000000 000104 000048 00   A  0
0  1
   [13] .rodata.wkup_padc PROGBITS        00000000 00014c 00000c 00   A  0
0  1
   [14] .rodata.wkup_padc PROGBITS        00000000 000158 000004 00   A  0
0  1

Note the "Al" column values of 1.  In the final executable, those sections
happen to end up immediately following a .rodata.str string section with
odd
lenght, and since they don't have any alignment requirement, they start out
at an odd address.

The reason for the lack of alignment requirement is actually in the source:

const struct pad_conf_entry core_padconf_array_essential[] = {

where

struct pad_conf_entry {

         u16 offset;

         u16 val;

} __attribute__ ((packed));

The "packed" attribute specifies that all struct elements ought to be
considered to have alignment requirement 1 instead of their default
alignment.  Thus the whole struct ends up having alignment requirement 1;
and since the section contains only a single variable of such struct
type, this is then also the alignment requirement of the section."
**********************************************************************


I tried removing "packed" and it works. I will send an updated series
with this fix.

br,
Aneesh


[1] http://article.gmane.org/gmane.linux.linaro.toolchain/2099

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-15 13:57 ` [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions Aneesh V
  2012-02-17 11:09   ` Aneesh V
@ 2012-02-17 17:13   ` Mike Frysinger
  2012-02-18 11:12     ` Aneesh V
  2012-02-18 22:03   ` Simon Glass
  2 siblings, 1 reply; 83+ messages in thread
From: Mike Frysinger @ 2012-02-17 17:13 UTC (permalink / raw)
  To: u-boot

On Wednesday 15 February 2012 08:57:31 Aneesh V wrote:
> This is done using the following directive preceding
> each function definition:
> 
> .type <func-name>, %function
> 
> This marks the symbol as a function in the object
> header which in turn helps the linker in some cases.
> 
> In particular this was found needed for resolving ARM/Thumb
> calls correctly in a build with Thumb interworking enabled.

ideally arm would use the new linkage.h header and then these would change to 
doing what Linux does:
ENTRY(foo)
	<asm>
ENDPROC(foo)
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-17 17:13   ` Mike Frysinger
@ 2012-02-18 11:12     ` Aneesh V
  2012-02-18 11:34       ` Albert ARIBAUD
  0 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-18 11:12 UTC (permalink / raw)
  To: u-boot

On Friday 17 February 2012 10:43 PM, Mike Frysinger wrote:
> On Wednesday 15 February 2012 08:57:31 Aneesh V wrote:
>> This is done using the following directive preceding
>> each function definition:
>>
>> .type<func-name>, %function
>>
>> This marks the symbol as a function in the object
>> header which in turn helps the linker in some cases.
>>
>> In particular this was found needed for resolving ARM/Thumb
>> calls correctly in a build with Thumb interworking enabled.
>
> ideally arm would use the new linkage.h header and then these would change to
> doing what Linux does:
> ENTRY(foo)
> 	<asm>
> ENDPROC(foo)

Thanks for the info. So, what do you suggest? Fix only the problematic
function and leave the rest to be converted to the above form later?

br,
Aneesh

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-18 11:12     ` Aneesh V
@ 2012-02-18 11:34       ` Albert ARIBAUD
  0 siblings, 0 replies; 83+ messages in thread
From: Albert ARIBAUD @ 2012-02-18 11:34 UTC (permalink / raw)
  To: u-boot

Hi Aneesh,

Le 18/02/2012 12:12, Aneesh V a ?crit :
> On Friday 17 February 2012 10:43 PM, Mike Frysinger wrote:
>> On Wednesday 15 February 2012 08:57:31 Aneesh V wrote:
>>> This is done using the following directive preceding
>>> each function definition:
>>>
>>> .type<func-name>, %function
>>>
>>> This marks the symbol as a function in the object
>>> header which in turn helps the linker in some cases.
>>>
>>> In particular this was found needed for resolving ARM/Thumb
>>> calls correctly in a build with Thumb interworking enabled.
>>
>> ideally arm would use the new linkage.h header and then these would
>> change to
>> doing what Linux does:
>> ENTRY(foo)
>> <asm>
>> ENDPROC(foo)
>
> Thanks for the info. So, what do you suggest? Fix only the problematic
> function and leave the rest to be converted to the above form later?

Please at the very least do not leave any file half-baked, with some 
symbols fixed and other not. Any file you start fixing should be 
entirely fixed.

Regarding fixing other ASM files unrelated to your patch set, then no, 
you don't need to fix them. Others will have to do any outstanding fixes 
them when they add Thumb support for their own target.

Amicalement,
-- 
Albert.

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-15 13:57 ` [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions Aneesh V
  2012-02-17 11:09   ` Aneesh V
  2012-02-17 17:13   ` Mike Frysinger
@ 2012-02-18 22:03   ` Simon Glass
  2012-02-19  7:15     ` Mike Frysinger
  2 siblings, 1 reply; 83+ messages in thread
From: Simon Glass @ 2012-02-18 22:03 UTC (permalink / raw)
  To: u-boot

Hi Anesh,

On Wed, Feb 15, 2012 at 5:57 AM, Aneesh V <aneesh@ti.com> wrote:
> This is done using the following directive preceding
> each function definition:
>
> .type <func-name>, %function
>
> This marks the symbol as a function in the object
> header which in turn helps the linker in some cases.
>
> In particular this was found needed for resolving ARM/Thumb
> calls correctly in a build with Thumb interworking enabled.
>
> This solves the following problem I had reported earlier:
>
> "When U-Boot/SPL is built using the Thumb instruction set the
> toolchain has a ?potential issue with weakly linked symbols.
> If a function has a weakly linked default implementation in C
> and a real implementation in assembly GCC is confused about the
> instruction set of the assembly implementation. As a result
> the assembly function that is built in ARM is executed as
> if it is Thumb. This results in a crash"
>
> Signed-off-by: Aneesh V <aneesh@ti.com>
> ---
> Changes from RFC to V1:
> - This change completely replaces the previous workaround for
> ?the ARM/Thumb interwork problem, which was to wrap around
> ?the assembly function in question with a naked C function
> ---
> ?arch/arm/cpu/arm1136/omap24xx/reset.S ? ? ? ? ?| ? ?3 +-
> ?arch/arm/cpu/arm1136/start.S ? ? ? ? ? ? ? ? ? | ? ?7 +++-
> ?arch/arm/cpu/arm1176/s3c64xx/cpu_init.S ? ? ? ?| ? ?3 +-
> ?arch/arm/cpu/arm1176/s3c64xx/reset.S ? ? ? ? ? | ? ?3 +-
> ?arch/arm/cpu/arm1176/start.S ? ? ? ? ? ? ? ? ? | ? ?9 +++--
> ?arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S | ? ?3 +-
> ?arch/arm/cpu/arm720t/lpc2292/iap_entry.S ? ? ? | ? ?3 +-
> ?arch/arm/cpu/arm720t/start.S ? ? ? ? ? ? ? ? ? | ? 12 ++++--
> ?arch/arm/cpu/arm920t/a320/reset.S ? ? ? ? ? ? ?| ? ?1 +
> ?arch/arm/cpu/arm920t/at91/lowlevel_init.S ? ? ?| ? ?3 +-
> ?arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S ? ?| ? ?3 +-
> ?arch/arm/cpu/arm920t/ks8695/lowlevel_init.S ? ?| ? ?3 +-
> ?arch/arm/cpu/arm920t/start.S ? ? ? ? ? ? ? ? ? | ? ?6 ++-
> ?arch/arm/cpu/arm925t/start.S ? ? ? ? ? ? ? ? ? | ? ?9 +++--
> ?arch/arm/cpu/arm926ejs/at91/lowlevel_init.S ? ?| ? ?4 +-
> ?arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S | ? ?3 +-
> ?arch/arm/cpu/arm926ejs/davinci/reset.S ? ? ? ? | ? ?3 +-
> ?arch/arm/cpu/arm926ejs/mx28/start.S ? ? ? ? ? ?| ? ?3 +-
> ?arch/arm/cpu/arm926ejs/nomadik/reset.S ? ? ? ? | ? ?3 +-
> ?arch/arm/cpu/arm926ejs/omap/reset.S ? ? ? ? ? ?| ? ?3 +-
> ?arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S | ? ?3 +-
> ?arch/arm/cpu/arm926ejs/start.S ? ? ? ? ? ? ? ? | ? ?9 +++--
> ?arch/arm/cpu/arm926ejs/versatile/reset.S ? ? ? | ? ?3 +-
> ?arch/arm/cpu/arm946es/start.S ? ? ? ? ? ? ? ? ?| ? ?9 +++--
> ?arch/arm/cpu/arm_intcm/start.S ? ? ? ? ? ? ? ? | ? 15 ++------
> ?arch/arm/cpu/armv7/mx5/lowlevel_init.S ? ? ? ? | ? ?3 +-
> ?arch/arm/cpu/armv7/mx6/lowlevel_init.S ? ? ? ? | ? ?3 +-
> ?arch/arm/cpu/armv7/omap-common/lowlevel_init.S | ? ?9 +++--
> ?arch/arm/cpu/armv7/omap-common/reset.S ? ? ? ? | ? ?1 +
> ?arch/arm/cpu/armv7/omap3/lowlevel_init.S ? ? ? | ? 45 ++++++++++++++++--------
> ?arch/arm/cpu/armv7/s5pc1xx/cache.S ? ? ? ? ? ? | ? ?2 +
> ?arch/arm/cpu/armv7/s5pc1xx/reset.S ? ? ? ? ? ? | ? ?3 +-
> ?arch/arm/cpu/armv7/start.S ? ? ? ? ? ? ? ? ? ? | ? ?9 +++--
> ?arch/arm/cpu/armv7/tegra2/lowlevel_init.S ? ? ?| ? ?1 +
> ?arch/arm/cpu/armv7/u8500/lowlevel.S ? ? ? ? ? ?| ? ?6 ++-
> ?arch/arm/cpu/ixp/start.S ? ? ? ? ? ? ? ? ? ? ? | ? ?9 +++--
> ?arch/arm/cpu/lh7a40x/start.S ? ? ? ? ? ? ? ? ? | ? ?9 +++--
> ?arch/arm/cpu/pxa/start.S ? ? ? ? ? ? ? ? ? ? ? | ? ?6 ++-
> ?arch/arm/cpu/s3c44b0/start.S ? ? ? ? ? ? ? ? ? | ? ?6 ++-
> ?arch/arm/cpu/sa1100/start.S ? ? ? ? ? ? ? ? ? ?| ? ?9 +++--
> ?arch/arm/lib/_ashldi3.S ? ? ? ? ? ? ? ? ? ? ? ?| ? ?6 ++-
> ?arch/arm/lib/_ashrdi3.S ? ? ? ? ? ? ? ? ? ? ? ?| ? ?6 ++-
> ?arch/arm/lib/_divsi3.S ? ? ? ? ? ? ? ? ? ? ? ? | ? ?6 ++-
> ?arch/arm/lib/_lshrdi3.S ? ? ? ? ? ? ? ? ? ? ? ?| ? ?6 ++-
> ?arch/arm/lib/_modsi3.S ? ? ? ? ? ? ? ? ? ? ? ? | ? ?3 +-
> ?arch/arm/lib/_udivsi3.S ? ? ? ? ? ? ? ? ? ? ? ?| ? ?6 ++-
> ?arch/arm/lib/memcpy.S ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?3 +-
> ?arch/arm/lib/memset.S ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?3 +-
> ?48 files changed, 186 insertions(+), 100 deletions(-)
>
> diff --git a/arch/arm/cpu/arm1136/omap24xx/reset.S b/arch/arm/cpu/arm1136/omap24xx/reset.S
> index 5f8343f..917a934 100644
> --- a/arch/arm/cpu/arm1136/omap24xx/reset.S
> +++ b/arch/arm/cpu/arm1136/omap24xx/reset.S
> @@ -30,7 +30,8 @@
>
> ?#include <asm/arch/omap2420.h>
>
> -.globl reset_cpu
> +.type ?reset_cpu, %function
> +.global ? ? ? ?reset_cpu

Should we introduce a macro to deal with this rather than writing it
out each time? EXPORT()?

[snip]

Regards,
Simon

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-18 22:03   ` Simon Glass
@ 2012-02-19  7:15     ` Mike Frysinger
  2012-02-20 20:07       ` Tom Rini
  0 siblings, 1 reply; 83+ messages in thread
From: Mike Frysinger @ 2012-02-19  7:15 UTC (permalink / raw)
  To: u-boot

On Saturday 18 February 2012 17:03:59 Simon Glass wrote:
> On Wed, Feb 15, 2012 at 5:57 AM, Aneesh V wrote:
> > -.globl reset_cpu
> > +.type  reset_cpu, %function
> > +.global        reset_cpu
> 
> Should we introduce a macro to deal with this rather than writing it
> out each time? EXPORT()?

we have it already with the linux/linkage.h header :)
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-19  7:15     ` Mike Frysinger
@ 2012-02-20 20:07       ` Tom Rini
  2012-02-20 21:53         ` Simon Glass
  2012-02-21  4:18         ` Mike Frysinger
  0 siblings, 2 replies; 83+ messages in thread
From: Tom Rini @ 2012-02-20 20:07 UTC (permalink / raw)
  To: u-boot

On Sun, Feb 19, 2012 at 02:15:30AM -0500, Mike Frysinger wrote:
> On Saturday 18 February 2012 17:03:59 Simon Glass wrote:
> > On Wed, Feb 15, 2012 at 5:57 AM, Aneesh V wrote:
> > > -.globl reset_cpu
> > > +.type  reset_cpu, %function
> > > +.global        reset_cpu
> > 
> > Should we introduce a macro to deal with this rather than writing it
> > out each time? EXPORT()?
> 
> we have it already with the linux/linkage.h header :)

Well, unless my tree is out of date (or stuff is in-flight) we don't
have the full compliment here.  We have <linux/linkage.h> for all and
<asm/linkage.h> for bfin.  That said, yes, we should grab at least the
ARM version and make use of ENTRY/END_FUNC ala the kernel.  I'm behind
on my "convert __attribute__((...)) to __attr" series already or I'd say
more :)

-- 
Tom

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-20 20:07       ` Tom Rini
@ 2012-02-20 21:53         ` Simon Glass
  2012-02-21  4:19           ` Mike Frysinger
  2012-02-21  4:18         ` Mike Frysinger
  1 sibling, 1 reply; 83+ messages in thread
From: Simon Glass @ 2012-02-20 21:53 UTC (permalink / raw)
  To: u-boot

Hi Tom, Aneesh,

On Mon, Feb 20, 2012 at 12:07 PM, Tom Rini <trini@ti.com> wrote:
> On Sun, Feb 19, 2012 at 02:15:30AM -0500, Mike Frysinger wrote:
>> On Saturday 18 February 2012 17:03:59 Simon Glass wrote:
>> > On Wed, Feb 15, 2012 at 5:57 AM, Aneesh V wrote:
>> > > -.globl reset_cpu
>> > > +.type ?reset_cpu, %function
>> > > +.global ? ? ? ?reset_cpu
>> >
>> > Should we introduce a macro to deal with this rather than writing it
>> > out each time? EXPORT()?
>>
>> we have it already with the linux/linkage.h header :)
>
> Well, unless my tree is out of date (or stuff is in-flight) we don't
> have the full compliment here. ?We have <linux/linkage.h> for all and
> <asm/linkage.h> for bfin. ?That said, yes, we should grab at least the
> ARM version and make use of ENTRY/END_FUNC ala the kernel. ?I'm behind
> on my "convert __attribute__((...)) to __attr" series already or I'd say
> more :)

In case one of you is going to look at this, can we try to use
asm-generic as much as possible?

>
> --
> Tom
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot

Regards,
Simon

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-20 21:53         ` Simon Glass
@ 2012-02-21  4:19           ` Mike Frysinger
  2012-02-21  4:44             ` Simon Glass
  2012-02-21 14:33             ` Tom Rini
  0 siblings, 2 replies; 83+ messages in thread
From: Mike Frysinger @ 2012-02-21  4:19 UTC (permalink / raw)
  To: u-boot

On Monday 20 February 2012 16:53:40 Simon Glass wrote:
> On Mon, Feb 20, 2012 at 12:07 PM, Tom Rini wrote:
> > On Sun, Feb 19, 2012 at 02:15:30AM -0500, Mike Frysinger wrote:
> >> On Saturday 18 February 2012 17:03:59 Simon Glass wrote:
> >> > On Wed, Feb 15, 2012 at 5:57 AM, Aneesh V wrote:
> >> > > -.globl reset_cpu
> >> > > +.type  reset_cpu, %function
> >> > > +.global        reset_cpu
> >> > 
> >> > Should we introduce a macro to deal with this rather than writing it
> >> > out each time? EXPORT()?
> >> 
> >> we have it already with the linux/linkage.h header :)
> > 
> > Well, unless my tree is out of date (or stuff is in-flight) we don't
> > have the full compliment here.  We have <linux/linkage.h> for all and
> > <asm/linkage.h> for bfin.  That said, yes, we should grab at least the
> > ARM version and make use of ENTRY/END_FUNC ala the kernel.  I'm behind
> > on my "convert __attribute__((...)) to __attr" series already or I'd say
> > more :)
> 
> In case one of you is going to look at this, can we try to use
> asm-generic as much as possible?

i don't know what you mean ... we already have linux/linkage.h with sane 
defaults for pretty much everyone.  the Blackfin asm/linkage.h is an empty file 
to satisfy building.
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-21  4:19           ` Mike Frysinger
@ 2012-02-21  4:44             ` Simon Glass
  2012-02-21 14:33             ` Tom Rini
  1 sibling, 0 replies; 83+ messages in thread
From: Simon Glass @ 2012-02-21  4:44 UTC (permalink / raw)
  To: u-boot

Hi Mike,

On Mon, Feb 20, 2012 at 8:19 PM, Mike Frysinger <vapier@gentoo.org> wrote:
> On Monday 20 February 2012 16:53:40 Simon Glass wrote:
>> On Mon, Feb 20, 2012 at 12:07 PM, Tom Rini wrote:
>> > On Sun, Feb 19, 2012 at 02:15:30AM -0500, Mike Frysinger wrote:
>> >> On Saturday 18 February 2012 17:03:59 Simon Glass wrote:
>> >> > On Wed, Feb 15, 2012 at 5:57 AM, Aneesh V wrote:
>> >> > > -.globl reset_cpu
>> >> > > +.type ?reset_cpu, %function
>> >> > > +.global ? ? ? ?reset_cpu
>> >> >
>> >> > Should we introduce a macro to deal with this rather than writing it
>> >> > out each time? EXPORT()?
>> >>
>> >> we have it already with the linux/linkage.h header :)
>> >
>> > Well, unless my tree is out of date (or stuff is in-flight) we don't
>> > have the full compliment here. ?We have <linux/linkage.h> for all and
>> > <asm/linkage.h> for bfin. ?That said, yes, we should grab at least the
>> > ARM version and make use of ENTRY/END_FUNC ala the kernel. ?I'm behind
>> > on my "convert __attribute__((...)) to __attr" series already or I'd say
>> > more :)
>>
>> In case one of you is going to look at this, can we try to use
>> asm-generic as much as possible?
>
> i don't know what you mean ... we already have linux/linkage.h with sane
> defaults for pretty much everyone. ?the Blackfin asm/linkage.h is an empty file
> to satisfy building.

That's fine then, thanks.

> -mike

Regards
Simon

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-21  4:19           ` Mike Frysinger
  2012-02-21  4:44             ` Simon Glass
@ 2012-02-21 14:33             ` Tom Rini
  2012-02-21 15:42               ` Mike Frysinger
  1 sibling, 1 reply; 83+ messages in thread
From: Tom Rini @ 2012-02-21 14:33 UTC (permalink / raw)
  To: u-boot

On Mon, Feb 20, 2012 at 11:19:14PM -0500, Mike Frysinger wrote:
> On Monday 20 February 2012 16:53:40 Simon Glass wrote:
> > On Mon, Feb 20, 2012 at 12:07 PM, Tom Rini wrote:
> > > On Sun, Feb 19, 2012 at 02:15:30AM -0500, Mike Frysinger wrote:
> > >> On Saturday 18 February 2012 17:03:59 Simon Glass wrote:
> > >> > On Wed, Feb 15, 2012 at 5:57 AM, Aneesh V wrote:
> > >> > > -.globl reset_cpu
> > >> > > +.type  reset_cpu, %function
> > >> > > +.global        reset_cpu
> > >> > 
> > >> > Should we introduce a macro to deal with this rather than writing it
> > >> > out each time? EXPORT()?
> > >> 
> > >> we have it already with the linux/linkage.h header :)
> > > 
> > > Well, unless my tree is out of date (or stuff is in-flight) we don't
> > > have the full compliment here.  We have <linux/linkage.h> for all and
> > > <asm/linkage.h> for bfin.  That said, yes, we should grab at least the
> > > ARM version and make use of ENTRY/END_FUNC ala the kernel.  I'm behind
> > > on my "convert __attribute__((...)) to __attr" series already or I'd say
> > > more :)
> > 
> > In case one of you is going to look at this, can we try to use
> > asm-generic as much as possible?
> 
> i don't know what you mean ... we already have linux/linkage.h with
> sane defaults for pretty much everyone.  the Blackfin asm/linkage.h is
> an empty file to satisfy building.

Well, the kernel version for blackfin sets ALIGN/ALIGN_STR, so are they
out of sync?

-- 
Tom

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-21 14:33             ` Tom Rini
@ 2012-02-21 15:42               ` Mike Frysinger
  2012-02-21 18:03                 ` Aneesh V
  0 siblings, 1 reply; 83+ messages in thread
From: Mike Frysinger @ 2012-02-21 15:42 UTC (permalink / raw)
  To: u-boot

On Tuesday 21 February 2012 09:33:31 Tom Rini wrote:
> On Mon, Feb 20, 2012 at 11:19:14PM -0500, Mike Frysinger wrote:
> > On Monday 20 February 2012 16:53:40 Simon Glass wrote:
> > > On Mon, Feb 20, 2012 at 12:07 PM, Tom Rini wrote:
> > > > On Sun, Feb 19, 2012 at 02:15:30AM -0500, Mike Frysinger wrote:
> > > >> On Saturday 18 February 2012 17:03:59 Simon Glass wrote:
> > > >> > On Wed, Feb 15, 2012 at 5:57 AM, Aneesh V wrote:
> > > >> > > -.globl reset_cpu
> > > >> > > +.type  reset_cpu, %function
> > > >> > > +.global        reset_cpu
> > > >> > 
> > > >> > Should we introduce a macro to deal with this rather than writing
> > > >> > it out each time? EXPORT()?
> > > >> 
> > > >> we have it already with the linux/linkage.h header :)
> > > > 
> > > > Well, unless my tree is out of date (or stuff is in-flight) we don't
> > > > have the full compliment here.  We have <linux/linkage.h> for all and
> > > > <asm/linkage.h> for bfin.  That said, yes, we should grab at least
> > > > the ARM version and make use of ENTRY/END_FUNC ala the kernel.  I'm
> > > > behind on my "convert __attribute__((...)) to __attr" series already
> > > > or I'd say more :)
> > > 
> > > In case one of you is going to look at this, can we try to use
> > > asm-generic as much as possible?
> > 
> > i don't know what you mean ... we already have linux/linkage.h with
> > sane defaults for pretty much everyone.  the Blackfin asm/linkage.h is
> > an empty file to satisfy building.
> 
> Well, the kernel version for blackfin sets ALIGN/ALIGN_STR, so are they
> out of sync?

the overall linkage.h concept is the same, but we've unified things better in 
the u-boot code.  Linux's common linkage.h has x86-centric defaults which we 
specifically avoided in the u-boot version.

we might want to tweak the ENDPROC() in u-boot's linkage.h to use % rather 
than @ since the latter is a comment char in arm asm and the former should 
work for all the arches i know of just the same as @.  i expect the arm guys 
to submit a patch though at the same time they add a stub asm/linkage.h ;).
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-21 15:42               ` Mike Frysinger
@ 2012-02-21 18:03                 ` Aneesh V
  2012-02-21 19:28                   ` Mike Frysinger
  0 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-21 18:03 UTC (permalink / raw)
  To: u-boot

On Tuesday 21 February 2012 09:12 PM, Mike Frysinger wrote:
> On Tuesday 21 February 2012 09:33:31 Tom Rini wrote:
>> On Mon, Feb 20, 2012 at 11:19:14PM -0500, Mike Frysinger wrote:
>>> On Monday 20 February 2012 16:53:40 Simon Glass wrote:
>>>> On Mon, Feb 20, 2012 at 12:07 PM, Tom Rini wrote:
>>>>> On Sun, Feb 19, 2012 at 02:15:30AM -0500, Mike Frysinger wrote:
>>>>>> On Saturday 18 February 2012 17:03:59 Simon Glass wrote:
>>>>>>> On Wed, Feb 15, 2012 at 5:57 AM, Aneesh V wrote:
>>>>>>>> -.globl reset_cpu
>>>>>>>> +.type  reset_cpu, %function
>>>>>>>> +.global        reset_cpu
>>>>>>>
>>>>>>> Should we introduce a macro to deal with this rather than writing
>>>>>>> it out each time? EXPORT()?
>>>>>>
>>>>>> we have it already with the linux/linkage.h header :)
>>>>>
>>>>> Well, unless my tree is out of date (or stuff is in-flight) we don't
>>>>> have the full compliment here.  We have<linux/linkage.h>  for all and
>>>>> <asm/linkage.h>  for bfin.  That said, yes, we should grab at least
>>>>> the ARM version and make use of ENTRY/END_FUNC ala the kernel.  I'm
>>>>> behind on my "convert __attribute__((...)) to __attr" series already
>>>>> or I'd say more :)
>>>>
>>>> In case one of you is going to look at this, can we try to use
>>>> asm-generic as much as possible?
>>>
>>> i don't know what you mean ... we already have linux/linkage.h with
>>> sane defaults for pretty much everyone.  the Blackfin asm/linkage.h is
>>> an empty file to satisfy building.
>>
>> Well, the kernel version for blackfin sets ALIGN/ALIGN_STR, so are they
>> out of sync?
>
> the overall linkage.h concept is the same, but we've unified things better in
> the u-boot code.  Linux's common linkage.h has x86-centric defaults which we
> specifically avoided in the u-boot version.
>
> we might want to tweak the ENDPROC() in u-boot's linkage.h to use % rather
> than @ since the latter is a comment char in arm asm and the former should
> work for all the arches i know of just the same as @.  i expect the arm guys
> to submit a patch though at the same time they add a stub asm/linkage.h ;).

I was planning to do that in the next revision of this series. BTW, I
guess the following in the arm linkage.h of kernel is useful too. Any
thoughts?

#define __ALIGN .align 0
#define __ALIGN_STR ".align 0"

BTW, I am not volunteering to convert all the assembly functions in ARM
to the new format:) I shall do it for armv7.

br,
Aneesh

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-21 18:03                 ` Aneesh V
@ 2012-02-21 19:28                   ` Mike Frysinger
  2012-02-21 20:01                     ` Aneesh V
  0 siblings, 1 reply; 83+ messages in thread
From: Mike Frysinger @ 2012-02-21 19:28 UTC (permalink / raw)
  To: u-boot

On Tuesday 21 February 2012 13:03:55 Aneesh V wrote:
> I was planning to do that in the next revision of this series. BTW, I
> guess the following in the arm linkage.h of kernel is useful too. Any
> thoughts?
> 
> #define __ALIGN .align 0
> #define __ALIGN_STR ".align 0"

arm allows unaligned instruction execution ?  i would have thought it'd 
require higher alignment than that.  i don't think that'd be a good default 
for everyone ...
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-21 19:28                   ` Mike Frysinger
@ 2012-02-21 20:01                     ` Aneesh V
  0 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-21 20:01 UTC (permalink / raw)
  To: u-boot

On Wednesday 22 February 2012 12:58 AM, Mike Frysinger wrote:
> On Tuesday 21 February 2012 13:03:55 Aneesh V wrote:
>> I was planning to do that in the next revision of this series. BTW, I
>> guess the following in the arm linkage.h of kernel is useful too. Any
>> thoughts?
>>
>> #define __ALIGN .align 0
>> #define __ALIGN_STR ".align 0"
>
> arm allows unaligned instruction execution ?  i would have thought it'd
> require higher alignment than that.  i don't think that'd be a good default
> for everyone ...

Unaligned instruction execution - No. ARM instruction should be 4 byte
aligned and Thumb instruction should be 2 byte aligned.

Unaligned data access - to a certain extent yes and is programmable.
IIRC, access to 32 bit integer is possible at 2 byte boundary but not
at an odd address.

Yes, I was also a little puzzled by that one.

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions
  2012-02-20 20:07       ` Tom Rini
  2012-02-20 21:53         ` Simon Glass
@ 2012-02-21  4:18         ` Mike Frysinger
  1 sibling, 0 replies; 83+ messages in thread
From: Mike Frysinger @ 2012-02-21  4:18 UTC (permalink / raw)
  To: u-boot

On Monday 20 February 2012 15:07:46 Tom Rini wrote:
> On Sun, Feb 19, 2012 at 02:15:30AM -0500, Mike Frysinger wrote:
> > On Saturday 18 February 2012 17:03:59 Simon Glass wrote:
> > > On Wed, Feb 15, 2012 at 5:57 AM, Aneesh V wrote:
> > > > -.globl reset_cpu
> > > > +.type  reset_cpu, %function
> > > > +.global        reset_cpu
> > > 
> > > Should we introduce a macro to deal with this rather than writing it
> > > out each time? EXPORT()?
> > 
> > we have it already with the linux/linkage.h header :)
> 
> Well, unless my tree is out of date (or stuff is in-flight) we don't
> have the full compliment here.  We have <linux/linkage.h> for all and
> <asm/linkage.h> for bfin.  That said, yes, we should grab at least the
> ARM version and make use of ENTRY/END_FUNC ala the kernel.  I'm behind
> on my "convert __attribute__((...)) to __attr" series already or I'd say
> more :)

yes, each arch is responsible for bringing in their asm/linkage.h needs into 
u-boot.  makes more sense to me to do that in arm than trying to hand modify a 
bunch of random funcs that people happen to notice issues with.
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 3/4] armv7: Use -march=armv7-a and thereby enable Thumb-2
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (7 preceding siblings ...)
  2012-02-15 13:57 ` [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions Aneesh V
@ 2012-02-15 13:57 ` Aneesh V
  2012-02-15 13:57 ` [U-Boot] [PATCH 4/4] OMAP4: enable Thumb build Aneesh V
                   ` (17 subsequent siblings)
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-15 13:57 UTC (permalink / raw)
  To: u-boot

Enable -march=armv7-a for armv7 platforms if the tool-chain
supports it. This in turn results in Thumb-2 code generated
for these platforms if CONFIG_SYS_THUMB_BUILD is enabled.

Signed-off-by: Aneesh V <aneesh@ti.com>
---
I believe armv7-a is fine for all the SoCs except Tegra2
and I see that Tegra2 is already making the necessary
exception in .../armv7/tegra2/config.mk

Let me know if any other SoC has a problem with armv7-a

Changes from RFC to V1:
- Enabled armv7-a from armv7/config.mk instead of from
  omap config.mk files
---
 arch/arm/cpu/armv7/config.mk |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk
index 83ddf10..b66fb6f 100644
--- a/arch/arm/cpu/armv7/config.mk
+++ b/arch/arm/cpu/armv7/config.mk
@@ -22,8 +22,9 @@
 #
 PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
 
-# Make ARMv5 to allow more compilers to work, even though its v7a.
-PLATFORM_CPPFLAGS += -march=armv5
+# If armv7-a is not supported by GCC fall-back to armv5, which is
+# supported by more tool-chains
+PLATFORM_CPPFLAGS += $(call cc-option, -march=armv7-a, -march=armv5)
 # =========================================================================
 #
 # Supply options according to compiler version
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 4/4] OMAP4: enable Thumb build
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (8 preceding siblings ...)
  2012-02-15 13:57 ` [U-Boot] [PATCH 3/4] armv7: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
@ 2012-02-15 13:57 ` Aneesh V
  2012-02-23 13:39 ` [U-Boot] [PATCH v2 1/5] arm: adapt asm/linkage.h from Linux Aneesh V
                   ` (16 subsequent siblings)
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-15 13:57 UTC (permalink / raw)
  To: u-boot

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Changes from RFC to V1:
- None
---
 include/configs/omap4_common.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
index a989721..01b4d6c 100644
--- a/include/configs/omap4_common.h
+++ b/include/configs/omap4_common.h
@@ -287,4 +287,6 @@
 
 #define CONFIG_SYS_ENABLE_PADS_ALL
 
+#define CONFIG_SYS_THUMB_BUILD
+
 #endif /* __CONFIG_OMAP4_COMMON_H */
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 1/5] arm: adapt asm/linkage.h from Linux
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (9 preceding siblings ...)
  2012-02-15 13:57 ` [U-Boot] [PATCH 4/4] OMAP4: enable Thumb build Aneesh V
@ 2012-02-23 13:39 ` Aneesh V
  2012-02-23 14:01   ` Aneesh V
  2012-02-23 13:39 ` [U-Boot] [PATCH v2 2/5] armv7: add appropriate headers for assembly functions Aneesh V
                   ` (15 subsequent siblings)
  26 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-23 13:39 UTC (permalink / raw)
  To: u-boot

This will add ARM specific over-rides for the defines
from linux/linkage.h

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Not adding the defines for __ALIGN and __ALIGN_STR
because it's not clear why alignment is set to 0
(single byte alignment).

Creates a checkpatch error that can not be avoided

Changes in V2:
 - Newly added
---
 arch/arm/include/asm/linkage.h |   11 +++++++++++
 include/linux/linkage.h        |    5 +++++
 2 files changed, 16 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/include/asm/linkage.h

diff --git a/arch/arm/include/asm/linkage.h b/arch/arm/include/asm/linkage.h
new file mode 100644
index 0000000..bb2f937
--- /dev/null
+++ b/arch/arm/include/asm/linkage.h
@@ -0,0 +1,11 @@
+#ifndef __ASM_LINKAGE_H
+#define __ASM_LINKAGE_H
+
+#define __ALIGN .align 0
+#define __ALIGN_STR ".align 0"
+
+#define ENDPROC(name) \
+.type name, %function; \
+END(name)
+
+#endif
diff --git a/include/linux/linkage.h b/include/linux/linkage.h
index ed4cf6c..adf3762 100644
--- a/include/linux/linkage.h
+++ b/include/linux/linkage.h
@@ -44,8 +44,13 @@
 #define SYMBOL_NAME_LABEL(X)	X:
 #endif
 
+#ifndef __ALIGN
 #define __ALIGN .align		4
+#endif
+
+#ifndef __ALIGN_STR
 #define __ALIGN_STR		".align 4"
+#endif
 
 #ifdef __ASSEMBLY__
 
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 1/5] arm: adapt asm/linkage.h from Linux
  2012-02-23 13:39 ` [U-Boot] [PATCH v2 1/5] arm: adapt asm/linkage.h from Linux Aneesh V
@ 2012-02-23 14:01   ` Aneesh V
  0 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-23 14:01 UTC (permalink / raw)
  To: u-boot

Please ignore this series. I missed sending one patch. I will send v3
shortly.

On Thursday 23 February 2012 07:09 PM, Aneesh V wrote:
> This will add ARM specific over-rides for the defines
> from linux/linkage.h
>
> Signed-off-by: Aneesh V<aneesh@ti.com>
> ---
> Not adding the defines for __ALIGN and __ALIGN_STR
> because it's not clear why alignment is set to 0
> (single byte alignment).
>
> Creates a checkpatch error that can not be avoided
>
> Changes in V2:
>   - Newly added
> ---
>   arch/arm/include/asm/linkage.h |   11 +++++++++++
>   include/linux/linkage.h        |    5 +++++
>   2 files changed, 16 insertions(+), 0 deletions(-)
>   create mode 100644 arch/arm/include/asm/linkage.h
>
> diff --git a/arch/arm/include/asm/linkage.h b/arch/arm/include/asm/linkage.h
> new file mode 100644
> index 0000000..bb2f937
> --- /dev/null
> +++ b/arch/arm/include/asm/linkage.h
> @@ -0,0 +1,11 @@
> +#ifndef __ASM_LINKAGE_H
> +#define __ASM_LINKAGE_H
> +
> +#define __ALIGN .align 0
> +#define __ALIGN_STR ".align 0"
> +
> +#define ENDPROC(name) \
> +.type name, %function; \
> +END(name)
> +
> +#endif
> diff --git a/include/linux/linkage.h b/include/linux/linkage.h
> index ed4cf6c..adf3762 100644
> --- a/include/linux/linkage.h
> +++ b/include/linux/linkage.h
> @@ -44,8 +44,13 @@
>   #define SYMBOL_NAME_LABEL(X)	X:
>   #endif
>
> +#ifndef __ALIGN
>   #define __ALIGN .align		4
> +#endif
> +
> +#ifndef __ALIGN_STR
>   #define __ALIGN_STR		".align 4"
> +#endif
>
>   #ifdef __ASSEMBLY__
>

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 2/5] armv7: add appropriate headers for assembly functions
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (10 preceding siblings ...)
  2012-02-23 13:39 ` [U-Boot] [PATCH v2 1/5] arm: adapt asm/linkage.h from Linux Aneesh V
@ 2012-02-23 13:39 ` Aneesh V
  2012-02-23 13:39 ` [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build Aneesh V
                   ` (14 subsequent siblings)
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-23 13:39 UTC (permalink / raw)
  To: u-boot

Use ENTRY and ENDPROC with assembly functions to ensure
necessary assembler directives for all functions.

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Changes in V2:
- Newly added
---
 arch/arm/cpu/armv7/mx5/lowlevel_init.S         |    5 ++-
 arch/arm/cpu/armv7/mx6/lowlevel_init.S         |    5 ++-
 arch/arm/cpu/armv7/omap-common/lowlevel_init.S |   14 ++++----
 arch/arm/cpu/armv7/omap-common/reset.S         |    5 ++-
 arch/arm/cpu/armv7/omap3/lowlevel_init.S       |   41 ++++++++++++-----------
 arch/arm/cpu/armv7/s5pc1xx/cache.S             |   10 +++--
 arch/arm/cpu/armv7/s5pc1xx/reset.S             |    5 ++-
 arch/arm/cpu/armv7/start.S                     |   13 ++++---
 arch/arm/cpu/armv7/tegra2/lowlevel_init.S      |    5 ++-
 arch/arm/cpu/armv7/u8500/lowlevel.S            |    9 +++--
 10 files changed, 61 insertions(+), 51 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
index 01f6d75..5344410 100644
--- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
@@ -22,6 +22,7 @@
 #include <config.h>
 #include <asm/arch/imx-regs.h>
 #include <generated/asm-offsets.h>
+#include <linux/linkage.h>
 
 /*
  * L2CC Cache setup/invalidation/disable
@@ -312,8 +313,7 @@
 
 .section ".text.init", "x"
 
-.globl lowlevel_init
-lowlevel_init:
+ENTRY(lowlevel_init)
 #if defined(CONFIG_MX51)
 	ldr r0, =GPIO1_BASE_ADDR
 	ldr r1, [r0, #0x0]
@@ -334,6 +334,7 @@ lowlevel_init:
 
 	/* r12 saved upper lr*/
 	mov pc,lr
+ENDPROC(lowlevel_init)
 
 /* Board level setting value */
 W_DP_OP_864:              .word DP_OP_864
diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
index 1864356..acadef2 100644
--- a/arch/arm/cpu/armv7/mx6/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
@@ -18,7 +18,8 @@
  */
 .section ".text.init", "x"
 
-.globl lowlevel_init
-lowlevel_init:
+#include <linux/linkage.h>
 
+ENTRY(lowlevel_init)
 	mov pc, lr
+ENDPROC(lowlevel_init)
diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
index 35f38ac..ccc6bb6 100644
--- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
@@ -27,9 +27,9 @@
  */
 
 #include <asm/arch/omap.h>
+#include <linux/linkage.h>
 
-.global save_boot_params
-save_boot_params:
+ENTRY(save_boot_params)
 	/*
 	 * See if the rom code passed pointer is valid:
 	 * It is not valid if it is not in non-secure SRAM
@@ -76,10 +76,9 @@ save_boot_params:
 	strb	r2, [r3, #CH_FLAGS_OFFSET]
 1:
 	bx	lr
+ENDPROC(save_boot_params)
 
-
-.globl lowlevel_init
-lowlevel_init:
+ENTRY(lowlevel_init)
 	/*
 	 * Setup a temporary stack
 	 */
@@ -95,12 +94,13 @@ lowlevel_init:
 	 */
 	bl	s_init
 	pop	{ip, pc}
+ENDPROC(lowlevel_init)
 
-.globl set_pl310_ctrl_reg
-set_pl310_ctrl_reg:
+ENTRY(set_pl310_ctrl_reg)
 	PUSH	{r4-r11, lr}	@ save registers - ROM code may pollute
 				@ our registers
 	LDR	r12, =0x102	@ Set PL310 control register - value in R0
 	.word	0xe1600070	@ SMC #0 - hand assembled because -march=armv5
 				@ call ROM Code API to set control register
 	POP	{r4-r11, pc}
+ENDPROC(set_pl310_ctrl_reg)
diff --git a/arch/arm/cpu/armv7/omap-common/reset.S b/arch/arm/cpu/armv7/omap-common/reset.S
index 838b122..179a476 100644
--- a/arch/arm/cpu/armv7/omap-common/reset.S
+++ b/arch/arm/cpu/armv7/omap-common/reset.S
@@ -22,9 +22,9 @@
  */
 
 #include <config.h>
+#include <linux/linkage.h>
 
-.global reset_cpu
-reset_cpu:
+ENTRY(reset_cpu)
 	ldr	r1, rstctl			@ get addr for global reset
 						@ reg
 	ldr	r3, rstbit			@ sw reset bit
@@ -36,3 +36,4 @@ rstctl:
 	.word	PRM_RSTCTRL
 rstbit:
 	.word	PRM_RSTCTRL_RESET
+ENDPROC(reset_cpu)
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index c42c5dd..ebf69fa 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -31,22 +31,22 @@
 #include <version.h>
 #include <asm/arch/mem.h>
 #include <asm/arch/clocks_omap3.h>
+#include <linux/linkage.h>
 
 _TEXT_BASE:
 	.word	CONFIG_SYS_TEXT_BASE	/* sdram load addr from config.mk */
 
 #ifdef CONFIG_SPL_BUILD
-.global save_boot_params
-save_boot_params:
+ENTRY(save_boot_params)
 	ldr	r4, =omap3_boot_device
 	ldr	r5, [r0, #0x4]
 	and	r5, r5, #0xff
 	str	r5, [r4]
 	bx	lr
+ENDPROC(save_boot_params)
 #endif
 
-.global omap3_gp_romcode_call
-omap3_gp_romcode_call:
+ENTRY(omap3_gp_romcode_call)
 	PUSH {r4-r12, lr} @ Save all registers from ROM code!
 	MOV r12, r0	@ Copy the Service ID in R12
 	MOV r0, r1	@ Copy parameter to R0
@@ -55,6 +55,7 @@ omap3_gp_romcode_call:
 	.word	0xe1600070	@ SMC #0 to enter monitor - hand assembled
 				@ because we use -march=armv5
 	POP {r4-r12, pc}
+ENDPROC(omap3_gp_romcode_call)
 
 /*
  * Funtion for making PPA HAL API calls in secure devices
@@ -62,8 +63,7 @@ omap3_gp_romcode_call:
  *	R0 - Service ID
  *	R1 - paramer list
  */
-.global do_omap3_emu_romcode_call
-do_omap3_emu_romcode_call:
+ENTRY(do_omap3_emu_romcode_call)
 	PUSH {r4-r12, lr} @ Save all registers from ROM code!
 	MOV r12, r0	@ Copy the Secure Service ID in R12
 	MOV r3, r1	@ Copy the pointer to va_list in R3
@@ -76,14 +76,14 @@ do_omap3_emu_romcode_call:
 	.word	0xe1600071	@ SMC #1 to call PPA service - hand assembled
 				@ because we use -march=armv5
 	POP {r4-r12, pc}
+ENDPROC(do_omap3_emu_romcode_call)
 
 #if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_NAND_BOOT)
 /**************************************************************************
  * cpy_clk_code: relocates clock code into SRAM where its safer to execute
  * R1 = SRAM destination address.
  *************************************************************************/
-.global cpy_clk_code
- cpy_clk_code:
+ENTRY(cpy_clk_code)
 	/* Copy DPLL code into SRAM */
 	adr	r0, go_to_speed		/* get addr of clock setting code */
 	mov	r2, #384		/* r2 size to copy (div by 32 bytes) */
@@ -95,6 +95,7 @@ next2:
 	cmp	r0, r2			/* until source end address [r2] */
 	bne	next2
 	mov	pc, lr			/* back to caller */
+ENDPROC(cpy_clk_code)
 
 /* ***************************************************************************
  *  go_to_speed: -Moves to bypass, -Commits clock dividers, -puts dpll at speed
@@ -109,8 +110,7 @@ next2:
  *        L3 when its not in self refresh seems bad for it.  Normally, this
  *	  code runs from flash before SDR is init so that should be ok.
  ****************************************************************************/
-.global go_to_speed
- go_to_speed:
+ENTRY(go_to_speed)
 	stmfd sp!, {r4 - r6}
 
 	/* move into fast relock bypass */
@@ -171,6 +171,7 @@ wait2:
 	nop
 	ldmfd	sp!, {r4 - r6}
 	mov	pc, lr		/* back to caller, locked */
+ENDPROC(go_to_speed)
 
 _go_to_speed: .word go_to_speed
 
@@ -211,8 +212,7 @@ pll_div_val5:
 
 #endif
 
-.globl lowlevel_init
-lowlevel_init:
+ENTRY(lowlevel_init)
 	ldr	sp, SRAM_STACK
 	str	ip, [sp]	/* stash old link register */
 	mov	ip, lr		/* save link reg across call */
@@ -230,6 +230,7 @@ lowlevel_init:
 
 	/* back to arch calling code */
 	mov	pc, lr
+ENDPROC(lowlevel_init)
 
 	/* the literal pools origin */
 	.ltorg
@@ -480,22 +481,22 @@ per_36x_dpll_param:
 .word 26000,    432,   12,     9,      16,     9,     4,      3,      1
 .word 38400,    360,   15,     9,      16,     5,     4,      3,      1
 
-.globl get_36x_mpu_dpll_param
-get_36x_mpu_dpll_param:
+ENTRY(get_36x_mpu_dpll_param)
 	adr	r0, mpu_36x_dpll_param
 	mov	pc, lr
+ENDPROC(get_36x_mpu_dpll_param)
 
-.globl get_36x_iva_dpll_param
-get_36x_iva_dpll_param:
+ENTRY(get_36x_iva_dpll_param)
 	adr	r0, iva_36x_dpll_param
 	mov	pc, lr
+ENDPROC(get_36x_iva_dpll_param)
 
-.globl get_36x_core_dpll_param
-get_36x_core_dpll_param:
+ENTRY(get_36x_core_dpll_param)
 	adr	r0, core_36x_dpll_param
 	mov	pc, lr
+ENDPROC(get_36x_core_dpll_param)
 
-.globl get_36x_per_dpll_param
-get_36x_per_dpll_param:
+ENTRY(get_36x_per_dpll_param)
 	adr	r0, per_36x_dpll_param
 	mov	pc, lr
+ENDPROC(get_36x_per_dpll_param)
diff --git a/arch/arm/cpu/armv7/s5pc1xx/cache.S b/arch/arm/cpu/armv7/s5pc1xx/cache.S
index c7d6221..000192c 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/cache.S
+++ b/arch/arm/cpu/armv7/s5pc1xx/cache.S
@@ -25,20 +25,22 @@
 
 .align 5
 
+#include <linux/linkage.h>
+
 #ifndef CONFIG_SYS_L2CACHE_OFF
-.global v7_outer_cache_enable
-v7_outer_cache_enable:
+ENTRY(v7_outer_cache_enable)
 	push	{r0, r1, r2, lr}
 	mrc	15, 0, r3, cr1, cr0, 1
 	orr	r3, r3, #2
 	mcr	15, 0, r3, cr1, cr0, 1
 	pop	{r1, r2, r3, pc}
+ENDPROC(v7_outer_cache_enable)
 
-.global v7_outer_cache_disable
-v7_outer_cache_disable:
+ENTRY(v7_outer_cache_disable)
 	push	{r0, r1, r2, lr}
 	mrc	15, 0, r3, cr1, cr0, 1
 	bic	r3, r3, #2
 	mcr	15, 0, r3, cr1, cr0, 1
 	pop	{r1, r2, r3, pc}
+ENDPROC(v7_outer_cache_disable)
 #endif
diff --git a/arch/arm/cpu/armv7/s5pc1xx/reset.S b/arch/arm/cpu/armv7/s5pc1xx/reset.S
index 70fa146..c7a41d0 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/reset.S
+++ b/arch/arm/cpu/armv7/s5pc1xx/reset.S
@@ -22,12 +22,12 @@
  */
 
 #include <asm/arch/cpu.h>
+#include <linux/linkage.h>
 
 #define S5PC100_SWRESET			0xE0200000
 #define S5PC110_SWRESET			0xE0102000
 
-.globl reset_cpu
-reset_cpu:
+ENTRY(reset_cpu)
 	ldr	r1, =S5PC100_PRO_ID
 	ldr	r2, [r1]
 	ldr	r4, =0x00010000
@@ -45,3 +45,4 @@ reset_cpu:
 	str	r2, [r1]
 _loop_forever:
 	b	_loop_forever
+ENDPROC(reset_cpu)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index ef08a55..261835b 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -33,6 +33,7 @@
 #include <config.h>
 #include <version.h>
 #include <asm/system.h>
+#include <linux/linkage.h>
 
 .globl _start
 _start: b	reset
@@ -172,8 +173,7 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
-relocate_code:
+ENTRY(relocate_code)
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
 	mov	r6, r2	/* save addr of destination */
@@ -289,6 +289,7 @@ jump_2_ram:
 
 _board_init_r_ofs:
 	.word board_init_r - _start
+ENDPROC(relocate_code)
 
 /*************************************************************************
  *
@@ -298,8 +299,7 @@ _board_init_r_ofs:
  * CONFIG_SYS_ICACHE_OFF is defined.
  *
  *************************************************************************/
-.globl cpu_init_cp15
-cpu_init_cp15:
+ENTRY(cpu_init_cp15)
 	/*
 	 * Invalidate L1 I/D
 	 */
@@ -325,7 +325,7 @@ cpu_init_cp15:
 #endif
 	mcr	p15, 0, r0, c1, c0, 0
 	mov	pc, lr			@ back to my caller
-
+ENDPROC(cpu_init_cp15)
 
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 /*************************************************************************
@@ -336,7 +336,7 @@ cpu_init_cp15:
  * setup memory timing
  *
  *************************************************************************/
-cpu_init_crit:
+ENTRY(cpu_init_crit)
 	/*
 	 * Jump to board specific initialization...
 	 * The Mask ROM will have already initialized
@@ -347,6 +347,7 @@ cpu_init_crit:
 	bl	lowlevel_init		@ go setup pll,mux,memory
 	mov	lr, ip			@ restore link
 	mov	pc, lr			@ back to my caller
+ENDPROC(cpu_init_crit)
 #endif
 
 #ifndef CONFIG_SPL_BUILD
diff --git a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
index 6b86647..d117f23 100644
--- a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
@@ -25,10 +25,10 @@
 
 #include <config.h>
 #include <version.h>
+#include <linux/linkage.h>
 
 	.align	5
-.global reset_cpu
-reset_cpu:
+ENTRY(reset_cpu)
 	ldr	r1, rstctl			@ get addr for global reset
 						@ reg
 	ldr	r3, [r1]
@@ -39,3 +39,4 @@ _loop_forever:
 	b	_loop_forever
 rstctl:
 	.word	PRM_RSTCTRL
+ENDPROC(reset_cpu)
diff --git a/arch/arm/cpu/armv7/u8500/lowlevel.S b/arch/arm/cpu/armv7/u8500/lowlevel.S
index cffdfd1..289cfb0 100644
--- a/arch/arm/cpu/armv7/u8500/lowlevel.S
+++ b/arch/arm/cpu/armv7/u8500/lowlevel.S
@@ -20,16 +20,17 @@
  */
 
 #include <config.h>
+#include <linux/linkage.h>
 
-.globl lowlevel_init
-lowlevel_init:
+ENTRY(lowlevel_init)
 	mov	pc, lr
+ENDPROC(lowlevel_init)
 
 	.align	5
-.globl reset_cpu
-reset_cpu:
+ENTRY(reset_cpu)
 	ldr r0, =CFG_PRCMU_BASE
 	ldr r1, =0x1
 	str r1, [r0, #0x228]
 _loop_forever:
 	b	_loop_forever
+ENDPROC(reset_cpu)
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (11 preceding siblings ...)
  2012-02-23 13:39 ` [U-Boot] [PATCH v2 2/5] armv7: add appropriate headers for assembly functions Aneesh V
@ 2012-02-23 13:39 ` Aneesh V
  2012-02-23 14:57   ` Mike Frysinger
  2012-02-23 13:39 ` [U-Boot] [PATCH v2 4/5] armv7: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
                   ` (13 subsequent siblings)
  26 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-23 13:39 UTC (permalink / raw)
  To: u-boot

Enable Thumb build and ARM-Thumb interworking based on the new
config flag CONFIG_SYS_THUMB_BUILD

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Changes from RFC to V1:
- Fixed review comments from Tom Rini <trini@ti.com>

Changes from V1 to V2:
- None
---
 README             |    8 ++++++++
 arch/arm/config.mk |   20 ++++++++++++++------
 2 files changed, 22 insertions(+), 6 deletions(-)

diff --git a/README b/README
index eba6378..1f4e2e8 100644
--- a/README
+++ b/README
@@ -426,6 +426,14 @@ The following options need to be configured:
 		Select high exception vectors of the ARM core, e.g., do not
 		clear the V bit of the c1 register of CP15.
 
+		CONFIG_SYS_THUMB_BUILD
+
+		Use this flag to build U-Boot using the Thumb instruction
+		set for ARM architectures. Thumb instruction set provides
+		better code density. For ARM architectures that support
+		Thumb2 this flag will result in Thumb2 code generated by
+		GCC.
+
 - Linux Kernel Interface:
 		CONFIG_CLOCKS_IN_MHZ
 
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 45f9dca..de9aa53 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -33,25 +33,33 @@ endif
 
 PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
 
-# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
+# Choose between ARM/Thumb instruction sets
+ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
+PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
+			$(call cc-option,-marm,)\
+			$(call cc-option,-mno-thumb-interwork,)\
+		)
+else
 PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
+PF_CPPFLAGS_ARM += $(call cc-option,-mno-thumb-interwork,)
+endif
 
 # Try if EABI is supported, else fall back to old API,
 # i. e. for example:
 # - with ELDK 4.2 (EABI supported), use:
-#	-mabi=aapcs-linux -mno-thumb-interwork
+#	-mabi=aapcs-linux
 # - with ELDK 4.1 (gcc 4.x, no EABI), use:
-#	-mabi=apcs-gnu -mno-thumb-interwork
+#	-mabi=apcs-gnu
 # - with ELDK 3.1 (gcc 3.x), use:
-#	-mapcs-32 -mno-thumb-interwork
+#	-mapcs-32
 PF_CPPFLAGS_ABI := $(call cc-option,\
-			-mabi=aapcs-linux -mno-thumb-interwork,\
+			-mabi=aapcs-linux,\
 			$(call cc-option,\
 				-mapcs-32,\
 				$(call cc-option,\
 					-mabi=apcs-gnu,\
 				)\
-			) $(call cc-option,-mno-thumb-interwork,)\
+			)\
 		)
 PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARM) $(PF_CPPFLAGS_ABI)
 
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build
  2012-02-23 13:39 ` [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build Aneesh V
@ 2012-02-23 14:57   ` Mike Frysinger
  2012-02-23 17:28     ` Aneesh V
  0 siblings, 1 reply; 83+ messages in thread
From: Mike Frysinger @ 2012-02-23 14:57 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 08:39:43 Aneesh V wrote:
> --- a/arch/arm/config.mk
> +++ b/arch/arm/config.mk
> 
> -# Explicitly specifiy 32-bit ARM ISA since toolchain default can be
> -mthumb: +# Choose between ARM/Thumb instruction sets
> +ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
> +PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
> +			$(call cc-option,-marm,)\
> +			$(call cc-option,-mno-thumb-interwork,)\
> +		)
> +else
>  PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
> +PF_CPPFLAGS_ARM += $(call cc-option,-mno-thumb-interwork,)

this 2nd part is no good.  "+=" is not the same thing as ":=".

might be simpler to do:
PF_CPPFLAGS_MARM := $(call cc-option,-marm)
PF_CPPFLAGS_THUMB := $(call cc-option,-mthumb -mthumb-interwork)
PF_CPPFLAGS_NO_THUMB := $(call cc-option,-mno-thumb-interwork)

ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
PF_CPPFLAGS_ARM = $(PF_CPPFLAGS_THUMB)
else
PF_CPPFLAGS_ARM = $(PF_CPPFLAGS_MARM) $(PF_CPPFLAGS_NO_THUMB)
endif
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build
  2012-02-23 14:57   ` Mike Frysinger
@ 2012-02-23 17:28     ` Aneesh V
  2012-02-23 17:34       ` Tom Rini
  2012-02-23 18:04       ` Mike Frysinger
  0 siblings, 2 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-23 17:28 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 08:27 PM, Mike Frysinger wrote:
> On Thursday 23 February 2012 08:39:43 Aneesh V wrote:
>> --- a/arch/arm/config.mk
>> +++ b/arch/arm/config.mk
>>
>> -# Explicitly specifiy 32-bit ARM ISA since toolchain default can be
>> -mthumb: +# Choose between ARM/Thumb instruction sets
>> +ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
>> +PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
>> +			$(call cc-option,-marm,)\
>> +			$(call cc-option,-mno-thumb-interwork,)\
>> +		)
>> +else
>>   PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
>> +PF_CPPFLAGS_ARM += $(call cc-option,-mno-thumb-interwork,)
>
> this 2nd part is no good.  "+=" is not the same thing as ":=".

I don't understand the difference. '+=' is done after ':=' right?

>
> might be simpler to do:
> PF_CPPFLAGS_MARM := $(call cc-option,-marm)
> PF_CPPFLAGS_THUMB := $(call cc-option,-mthumb -mthumb-interwork)
> PF_CPPFLAGS_NO_THUMB := $(call cc-option,-mno-thumb-interwork)
>
> ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
> PF_CPPFLAGS_ARM = $(PF_CPPFLAGS_THUMB)
> else
> PF_CPPFLAGS_ARM = $(PF_CPPFLAGS_MARM) $(PF_CPPFLAGS_NO_THUMB)
> endif
> -mike

Are you trying to avoid all '+='. If so, why?

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build
  2012-02-23 17:28     ` Aneesh V
@ 2012-02-23 17:34       ` Tom Rini
  2012-02-23 17:49         ` Aneesh V
  2012-02-23 18:04       ` Mike Frysinger
  1 sibling, 1 reply; 83+ messages in thread
From: Tom Rini @ 2012-02-23 17:34 UTC (permalink / raw)
  To: u-boot

On Thu, Feb 23, 2012 at 10:58:36PM +0530, Aneesh V wrote:
> On Thursday 23 February 2012 08:27 PM, Mike Frysinger wrote:
> >On Thursday 23 February 2012 08:39:43 Aneesh V wrote:
> >>--- a/arch/arm/config.mk
> >>+++ b/arch/arm/config.mk
> >>
> >>-# Explicitly specifiy 32-bit ARM ISA since toolchain default can be
> >>-mthumb: +# Choose between ARM/Thumb instruction sets
> >>+ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
> >>+PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
> >>+			$(call cc-option,-marm,)\
> >>+			$(call cc-option,-mno-thumb-interwork,)\
> >>+		)
> >>+else
> >>  PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
> >>+PF_CPPFLAGS_ARM += $(call cc-option,-mno-thumb-interwork,)
> >
> >this 2nd part is no good.  "+=" is not the same thing as ":=".
> 
> I don't understand the difference. '+=' is done after ':=' right?

'+=' is evaluated every file we build, ':=' is evaluated once.  We use
the latter to keep build times down.

-- 
Tom

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build
  2012-02-23 17:34       ` Tom Rini
@ 2012-02-23 17:49         ` Aneesh V
  2012-02-23 17:51           ` Tom Rini
  2012-02-23 18:05           ` Mike Frysinger
  0 siblings, 2 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-23 17:49 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 11:04 PM, Tom Rini wrote:
> On Thu, Feb 23, 2012 at 10:58:36PM +0530, Aneesh V wrote:
>> On Thursday 23 February 2012 08:27 PM, Mike Frysinger wrote:
>>> On Thursday 23 February 2012 08:39:43 Aneesh V wrote:
>>>> --- a/arch/arm/config.mk
>>>> +++ b/arch/arm/config.mk
>>>>
>>>> -# Explicitly specifiy 32-bit ARM ISA since toolchain default can be
>>>> -mthumb: +# Choose between ARM/Thumb instruction sets
>>>> +ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
>>>> +PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
>>>> +			$(call cc-option,-marm,)\
>>>> +			$(call cc-option,-mno-thumb-interwork,)\
>>>> +		)
>>>> +else
>>>>   PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
>>>> +PF_CPPFLAGS_ARM += $(call cc-option,-mno-thumb-interwork,)
>>>
>>> this 2nd part is no good.  "+=" is not the same thing as ":=".
>>
>> I don't understand the difference. '+=' is done after ':=' right?
>
> '+=' is evaluated every file we build, ':=' is evaluated once.  We use
> the latter to keep build times down.
>

Ok. so, are we trying to reduce the number of "+=", right?

Thanks for clarifying.

br,
Aneesh

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build
  2012-02-23 17:49         ` Aneesh V
@ 2012-02-23 17:51           ` Tom Rini
  2012-02-23 18:09             ` Aneesh V
  2012-02-23 18:05           ` Mike Frysinger
  1 sibling, 1 reply; 83+ messages in thread
From: Tom Rini @ 2012-02-23 17:51 UTC (permalink / raw)
  To: u-boot

On Thu, Feb 23, 2012 at 11:19:59PM +0530, Aneesh V wrote:
> On Thursday 23 February 2012 11:04 PM, Tom Rini wrote:
> >On Thu, Feb 23, 2012 at 10:58:36PM +0530, Aneesh V wrote:
> >>On Thursday 23 February 2012 08:27 PM, Mike Frysinger wrote:
> >>>On Thursday 23 February 2012 08:39:43 Aneesh V wrote:
> >>>>--- a/arch/arm/config.mk
> >>>>+++ b/arch/arm/config.mk
> >>>>
> >>>>-# Explicitly specifiy 32-bit ARM ISA since toolchain default can be
> >>>>-mthumb: +# Choose between ARM/Thumb instruction sets
> >>>>+ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
> >>>>+PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
> >>>>+			$(call cc-option,-marm,)\
> >>>>+			$(call cc-option,-mno-thumb-interwork,)\
> >>>>+		)
> >>>>+else
> >>>>  PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
> >>>>+PF_CPPFLAGS_ARM += $(call cc-option,-mno-thumb-interwork,)
> >>>
> >>>this 2nd part is no good.  "+=" is not the same thing as ":=".
> >>
> >>I don't understand the difference. '+=' is done after ':=' right?
> >
> >'+=' is evaluated every file we build, ':=' is evaluated once.  We use
> >the latter to keep build times down.
> >
> 
> Ok. so, are we trying to reduce the number of "+=", right?

Yes, it should already be at or near 0 uses.

-- 
Tom

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build
  2012-02-23 17:51           ` Tom Rini
@ 2012-02-23 18:09             ` Aneesh V
  2012-02-23 18:13               ` Aneesh V
  0 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-23 18:09 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 11:21 PM, Tom Rini wrote:
> On Thu, Feb 23, 2012 at 11:19:59PM +0530, Aneesh V wrote:
>> On Thursday 23 February 2012 11:04 PM, Tom Rini wrote:
>>> On Thu, Feb 23, 2012 at 10:58:36PM +0530, Aneesh V wrote:
>>>> On Thursday 23 February 2012 08:27 PM, Mike Frysinger wrote:
>>>>> On Thursday 23 February 2012 08:39:43 Aneesh V wrote:
>>>>>> --- a/arch/arm/config.mk
>>>>>> +++ b/arch/arm/config.mk
>>>>>>
>>>>>> -# Explicitly specifiy 32-bit ARM ISA since toolchain default can be
>>>>>> -mthumb: +# Choose between ARM/Thumb instruction sets
>>>>>> +ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
>>>>>> +PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
>>>>>> +			$(call cc-option,-marm,)\
>>>>>> +			$(call cc-option,-mno-thumb-interwork,)\
>>>>>> +		)
>>>>>> +else
>>>>>>   PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
>>>>>> +PF_CPPFLAGS_ARM += $(call cc-option,-mno-thumb-interwork,)
>>>>>
>>>>> this 2nd part is no good.  "+=" is not the same thing as ":=".
>>>>
>>>> I don't understand the difference. '+=' is done after ':=' right?
>>>
>>> '+=' is evaluated every file we build, ':=' is evaluated once.  We use
>>> the latter to keep build times down.
>>>
>>
>> Ok. so, are we trying to reduce the number of "+=", right?
>
> Yes, it should already be at or near 0 uses.

We need at least one for finally appending to the exported variable,
right. So, looks like one += for adding '-mthumb -mthumb-interwork'
together is better than having one each for the two options? Is that
the logic?

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build
  2012-02-23 18:09             ` Aneesh V
@ 2012-02-23 18:13               ` Aneesh V
  0 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-23 18:13 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 11:39 PM, Aneesh V wrote:
> On Thursday 23 February 2012 11:21 PM, Tom Rini wrote:
>> On Thu, Feb 23, 2012 at 11:19:59PM +0530, Aneesh V wrote:
>>> On Thursday 23 February 2012 11:04 PM, Tom Rini wrote:
>>>> On Thu, Feb 23, 2012 at 10:58:36PM +0530, Aneesh V wrote:
>>>>> On Thursday 23 February 2012 08:27 PM, Mike Frysinger wrote:
>>>>>> On Thursday 23 February 2012 08:39:43 Aneesh V wrote:
>>>>>>> --- a/arch/arm/config.mk
>>>>>>> +++ b/arch/arm/config.mk
>>>>>>>
>>>>>>> -# Explicitly specifiy 32-bit ARM ISA since toolchain default can be
>>>>>>> -mthumb: +# Choose between ARM/Thumb instruction sets
>>>>>>> +ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
>>>>>>> +PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
>>>>>>> + $(call cc-option,-marm,)\
>>>>>>> + $(call cc-option,-mno-thumb-interwork,)\
>>>>>>> + )
>>>>>>> +else
>>>>>>> PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
>>>>>>> +PF_CPPFLAGS_ARM += $(call cc-option,-mno-thumb-interwork,)
>>>>>>
>>>>>> this 2nd part is no good. "+=" is not the same thing as ":=".
>>>>>
>>>>> I don't understand the difference. '+=' is done after ':=' right?
>>>>
>>>> '+=' is evaluated every file we build, ':=' is evaluated once. We use
>>>> the latter to keep build times down.
>>>>
>>>
>>> Ok. so, are we trying to reduce the number of "+=", right?
>>
>> Yes, it should already be at or near 0 uses.
>
> We need at least one for finally appending to the exported variable,
> right. So, looks like one += for adding '-mthumb -mthumb-interwork'
> together is better than having one each for the two options? Is that
> the logic?
>

Please ignore this question. It's clear to me now with Mike's latest 
explanation. Thanks.

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build
  2012-02-23 17:49         ` Aneesh V
  2012-02-23 17:51           ` Tom Rini
@ 2012-02-23 18:05           ` Mike Frysinger
  1 sibling, 0 replies; 83+ messages in thread
From: Mike Frysinger @ 2012-02-23 18:05 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 12:49:59 Aneesh V wrote:
> On Thursday 23 February 2012 11:04 PM, Tom Rini wrote:
> > On Thu, Feb 23, 2012 at 10:58:36PM +0530, Aneesh V wrote:
> >> On Thursday 23 February 2012 08:27 PM, Mike Frysinger wrote:
> >>> On Thursday 23 February 2012 08:39:43 Aneesh V wrote:
> >>>> --- a/arch/arm/config.mk
> >>>> +++ b/arch/arm/config.mk
> >>>> 
> >>>> -# Explicitly specifiy 32-bit ARM ISA since toolchain default can be
> >>>> -mthumb: +# Choose between ARM/Thumb instruction sets
> >>>> +ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
> >>>> +PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
> >>>> +			$(call cc-option,-marm,)\
> >>>> +			$(call cc-option,-mno-thumb-interwork,)\
> >>>> +		)
> >>>> +else
> >>>> 
> >>>>   PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
> >>>> 
> >>>> +PF_CPPFLAGS_ARM += $(call cc-option,-mno-thumb-interwork,)
> >>> 
> >>> this 2nd part is no good.  "+=" is not the same thing as ":=".
> >> 
> >> I don't understand the difference. '+=' is done after ':=' right?
> > 
> > '+=' is evaluated every file we build, ':=' is evaluated once.  We use
> > the latter to keep build times down.
> 
> Ok. so, are we trying to reduce the number of "+=", right?

for things that require computation, yes.  if it's just string values or other 
variables, then it doesn't matter and avoiding ":=" is preferred.
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build
  2012-02-23 17:28     ` Aneesh V
  2012-02-23 17:34       ` Tom Rini
@ 2012-02-23 18:04       ` Mike Frysinger
  2012-02-23 18:12         ` Aneesh V
  1 sibling, 1 reply; 83+ messages in thread
From: Mike Frysinger @ 2012-02-23 18:04 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 12:28:36 Aneesh V wrote:
> On Thursday 23 February 2012 08:27 PM, Mike Frysinger wrote:
> > On Thursday 23 February 2012 08:39:43 Aneesh V wrote:
> >> --- a/arch/arm/config.mk
> >> +++ b/arch/arm/config.mk
> >> 
> >> -# Explicitly specifiy 32-bit ARM ISA since toolchain default can be
> >> -mthumb: +# Choose between ARM/Thumb instruction sets
> >> +ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
> >> +PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
> >> +			$(call cc-option,-marm,)\
> >> +			$(call cc-option,-mno-thumb-interwork,)\
> >> +		)
> >> +else
> >> 
> >>   PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
> >> 
> >> +PF_CPPFLAGS_ARM += $(call cc-option,-mno-thumb-interwork,)
> > 
> > this 2nd part is no good.  "+=" is not the same thing as ":=".
> 
> I don't understand the difference. '+=' is done after ':=' right?
> 
> > might be simpler to do:
> > PF_CPPFLAGS_MARM := $(call cc-option,-marm)
> > PF_CPPFLAGS_THUMB := $(call cc-option,-mthumb -mthumb-interwork)
> > PF_CPPFLAGS_NO_THUMB := $(call cc-option,-mno-thumb-interwork)
> > 
> > ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
> > PF_CPPFLAGS_ARM = $(PF_CPPFLAGS_THUMB)
> > else
> > PF_CPPFLAGS_ARM = $(PF_CPPFLAGS_MARM) $(PF_CPPFLAGS_NO_THUMB)
> > endif
> 
> Are you trying to avoid all '+='. If so, why?

"+=" does delayed evaluation and is the whole reason we started using ":=" in 
makefiles for *computed* values

when you do:
	FOO := $(call cc-option,-marm)
you're storing the result of the computation in $(FOO)

if you do:
	FOO += $(call cc-option,-marm)
you're appending "$(call cc-option,-marm)" to $(FOO) and that won't actually 
get computed until $(FOO) gets used

so if you append $(call ...) to $(CPPFLAGS), then you end up doing the cc-
option computation every time you compile a file that uses $(CPPFLAGS)
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build
  2012-02-23 18:04       ` Mike Frysinger
@ 2012-02-23 18:12         ` Aneesh V
  0 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-23 18:12 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 11:34 PM, Mike Frysinger wrote:
> On Thursday 23 February 2012 12:28:36 Aneesh V wrote:
>> On Thursday 23 February 2012 08:27 PM, Mike Frysinger wrote:
>>> On Thursday 23 February 2012 08:39:43 Aneesh V wrote:
>>>> --- a/arch/arm/config.mk
>>>> +++ b/arch/arm/config.mk
>>>>
>>>> -# Explicitly specifiy 32-bit ARM ISA since toolchain default can be
>>>> -mthumb: +# Choose between ARM/Thumb instruction sets
>>>> +ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
>>>> +PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
>>>> +			$(call cc-option,-marm,)\
>>>> +			$(call cc-option,-mno-thumb-interwork,)\
>>>> +		)
>>>> +else
>>>>
>>>>    PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
>>>>
>>>> +PF_CPPFLAGS_ARM += $(call cc-option,-mno-thumb-interwork,)
>>>
>>> this 2nd part is no good.  "+=" is not the same thing as ":=".
>>
>> I don't understand the difference. '+=' is done after ':=' right?
>>
>>> might be simpler to do:
>>> PF_CPPFLAGS_MARM := $(call cc-option,-marm)
>>> PF_CPPFLAGS_THUMB := $(call cc-option,-mthumb -mthumb-interwork)
>>> PF_CPPFLAGS_NO_THUMB := $(call cc-option,-mno-thumb-interwork)
>>>
>>> ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
>>> PF_CPPFLAGS_ARM = $(PF_CPPFLAGS_THUMB)
>>> else
>>> PF_CPPFLAGS_ARM = $(PF_CPPFLAGS_MARM) $(PF_CPPFLAGS_NO_THUMB)
>>> endif
>>
>> Are you trying to avoid all '+='. If so, why?
>
> "+=" does delayed evaluation and is the whole reason we started using ":=" in
> makefiles for *computed* values
>
> when you do:
> 	FOO := $(call cc-option,-marm)
> you're storing the result of the computation in $(FOO)
>
> if you do:
> 	FOO += $(call cc-option,-marm)
> you're appending "$(call cc-option,-marm)" to $(FOO) and that won't actually
> get computed until $(FOO) gets used
>
> so if you append $(call ...) to $(CPPFLAGS), then you end up doing the cc-
> option computation every time you compile a file that uses $(CPPFLAGS)

Get it. Thanks for explaining. I missed the computation part.

br,
Aneesh


> -mike

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 4/5] armv7: Use -march=armv7-a and thereby enable Thumb-2
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (12 preceding siblings ...)
  2012-02-23 13:39 ` [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build Aneesh V
@ 2012-02-23 13:39 ` Aneesh V
  2012-02-23 13:39 ` [U-Boot] [PATCH v2 5/5] OMAP4: enable Thumb build Aneesh V
                   ` (12 subsequent siblings)
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-23 13:39 UTC (permalink / raw)
  To: u-boot

Enable -march=armv7-a for armv7 platforms if the tool-chain
supports it. This in turn results in Thumb-2 code generated
for these platforms if CONFIG_SYS_THUMB_BUILD is enabled.

Signed-off-by: Aneesh V <aneesh@ti.com>
---
I believe armv7-a is fine for all the SoCs except Tegra2
and I see that Tegra2 is already making the necessary
exception in .../armv7/tegra2/config.mk

Let me know if any other SoC has a problem with armv7-a

Changes from RFC to V1:
- Enabled armv7-a from armv7/config.mk instead of from
  omap config.mk files

Changes from V1 to V2:
- None
---
 arch/arm/cpu/armv7/config.mk |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk
index 83ddf10..b66fb6f 100644
--- a/arch/arm/cpu/armv7/config.mk
+++ b/arch/arm/cpu/armv7/config.mk
@@ -22,8 +22,9 @@
 #
 PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
 
-# Make ARMv5 to allow more compilers to work, even though its v7a.
-PLATFORM_CPPFLAGS += -march=armv5
+# If armv7-a is not supported by GCC fall-back to armv5, which is
+# supported by more tool-chains
+PLATFORM_CPPFLAGS += $(call cc-option, -march=armv7-a, -march=armv5)
 # =========================================================================
 #
 # Supply options according to compiler version
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v2 5/5] OMAP4: enable Thumb build
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (13 preceding siblings ...)
  2012-02-23 13:39 ` [U-Boot] [PATCH v2 4/5] armv7: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
@ 2012-02-23 13:39 ` Aneesh V
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 1/6] arm: adapt asm/linkage.h from Linux Aneesh V
                   ` (11 subsequent siblings)
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-23 13:39 UTC (permalink / raw)
  To: u-boot

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Changes from RFC to V1:
- None

Changes from V1 to V2:
- None
---
 include/configs/omap4_common.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
index a989721..01b4d6c 100644
--- a/include/configs/omap4_common.h
+++ b/include/configs/omap4_common.h
@@ -287,4 +287,6 @@
 
 #define CONFIG_SYS_ENABLE_PADS_ALL
 
+#define CONFIG_SYS_THUMB_BUILD
+
 #endif /* __CONFIG_OMAP4_COMMON_H */
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 1/6] arm: adapt asm/linkage.h from Linux
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (14 preceding siblings ...)
  2012-02-23 13:39 ` [U-Boot] [PATCH v2 5/5] OMAP4: enable Thumb build Aneesh V
@ 2012-02-23 14:06 ` Aneesh V
  2012-02-23 14:59   ` Mike Frysinger
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 2/6] armv7: add appropriate headers for assembly functions Aneesh V
                   ` (10 subsequent siblings)
  26 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-23 14:06 UTC (permalink / raw)
  To: u-boot

This will add ARM specific over-rides for the defines
from linux/linkage.h

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Not adding the defines for __ALIGN and __ALIGN_STR
because it's not clear why alignment is set to 0
(single byte alignment).

Creates a checkpatch error that can not be avoided

Changes in V2:
 - Newly added
---
 arch/arm/include/asm/linkage.h |   11 +++++++++++
 include/linux/linkage.h        |    5 +++++
 2 files changed, 16 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/include/asm/linkage.h

diff --git a/arch/arm/include/asm/linkage.h b/arch/arm/include/asm/linkage.h
new file mode 100644
index 0000000..bb2f937
--- /dev/null
+++ b/arch/arm/include/asm/linkage.h
@@ -0,0 +1,11 @@
+#ifndef __ASM_LINKAGE_H
+#define __ASM_LINKAGE_H
+
+#define __ALIGN .align 0
+#define __ALIGN_STR ".align 0"
+
+#define ENDPROC(name) \
+.type name, %function; \
+END(name)
+
+#endif
diff --git a/include/linux/linkage.h b/include/linux/linkage.h
index ed4cf6c..adf3762 100644
--- a/include/linux/linkage.h
+++ b/include/linux/linkage.h
@@ -44,8 +44,13 @@
 #define SYMBOL_NAME_LABEL(X)	X:
 #endif
 
+#ifndef __ALIGN
 #define __ALIGN .align		4
+#endif
+
+#ifndef __ALIGN_STR
 #define __ALIGN_STR		".align 4"
+#endif
 
 #ifdef __ASSEMBLY__
 
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 1/6] arm: adapt asm/linkage.h from Linux
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 1/6] arm: adapt asm/linkage.h from Linux Aneesh V
@ 2012-02-23 14:59   ` Mike Frysinger
  2012-02-23 15:24     ` Tom Rini
  2012-02-23 17:40     ` Aneesh V
  0 siblings, 2 replies; 83+ messages in thread
From: Mike Frysinger @ 2012-02-23 14:59 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 09:06:01 Aneesh V wrote:
> --- /dev/null
> +++ b/arch/arm/include/asm/linkage.h
> @@ -0,0 +1,11 @@
> +#ifndef __ASM_LINKAGE_H
> +#define __ASM_LINKAGE_H

needs copyright/license comment header

> +#define ENDPROC(name) \
> +.type name, %function; \
> +END(name)

please change linux/linkage.h instead.  % should be safe for everyone.
-mike
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* [U-Boot] [PATCH v3 1/6] arm: adapt asm/linkage.h from Linux
  2012-02-23 14:59   ` Mike Frysinger
@ 2012-02-23 15:24     ` Tom Rini
  2012-02-23 16:57       ` Mike Frysinger
  2012-02-23 17:40     ` Aneesh V
  1 sibling, 1 reply; 83+ messages in thread
From: Tom Rini @ 2012-02-23 15:24 UTC (permalink / raw)
  To: u-boot

On Thu, Feb 23, 2012 at 09:59:00AM -0500, Mike Frysinger wrote:
> On Thursday 23 February 2012 09:06:01 Aneesh V wrote:
> > --- /dev/null
> > +++ b/arch/arm/include/asm/linkage.h
> > @@ -0,0 +1,11 @@
> > +#ifndef __ASM_LINKAGE_H
> > +#define __ASM_LINKAGE_H
> 
> needs copyright/license comment header

This is a copy/paste from the kernel version.  I think we just need to
say what commit this is pulled from for future re-syncs.

> > +#define ENDPROC(name) \
> > +.type name, %function; \
> > +END(name)
> 
> please change linux/linkage.h instead.  % should be safe for everyone.

Do we really want to diverge from the kernel here?

-- 
Tom

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 1/6] arm: adapt asm/linkage.h from Linux
  2012-02-23 15:24     ` Tom Rini
@ 2012-02-23 16:57       ` Mike Frysinger
  0 siblings, 0 replies; 83+ messages in thread
From: Mike Frysinger @ 2012-02-23 16:57 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 10:24:36 Tom Rini wrote:
> On Thu, Feb 23, 2012 at 09:59:00AM -0500, Mike Frysinger wrote:
> > On Thursday 23 February 2012 09:06:01 Aneesh V wrote:
> > > --- /dev/null
> > > +++ b/arch/arm/include/asm/linkage.h
> > > @@ -0,0 +1,11 @@
> > > +#ifndef __ASM_LINKAGE_H
> > > +#define __ASM_LINKAGE_H
> > 
> > needs copyright/license comment header
> 
> This is a copy/paste from the kernel version.  I think we just need to
> say what commit this is pulled from for future re-syncs.
> 
> > > +#define ENDPROC(name) \
> > > +.type name, %function; \
> > > +END(name)
> > 
> > please change linux/linkage.h instead.  % should be safe for everyone.
> 
> Do we really want to diverge from the kernel here?

u-boot's linux/linkage.h already has.  prob could push this particular fix back 
to Linux ...
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 1/6] arm: adapt asm/linkage.h from Linux
  2012-02-23 14:59   ` Mike Frysinger
  2012-02-23 15:24     ` Tom Rini
@ 2012-02-23 17:40     ` Aneesh V
  2012-02-23 23:52       ` Mike Frysinger
  1 sibling, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-23 17:40 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 08:29 PM, Mike Frysinger wrote:
> On Thursday 23 February 2012 09:06:01 Aneesh V wrote:
>> --- /dev/null
>> +++ b/arch/arm/include/asm/linkage.h
>> @@ -0,0 +1,11 @@
>> +#ifndef __ASM_LINKAGE_H
>> +#define __ASM_LINKAGE_H
>
> needs copyright/license comment header

As Tom mentioned, I don't know whose copyright it is.

>
>> +#define ENDPROC(name) \
>> +.type name, %function; \
>> +END(name)
>
> please change linux/linkage.h instead.  % should be safe for everyone.

The spec says that STT_FUNC will work for all archs. How about using
that?

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 1/6] arm: adapt asm/linkage.h from Linux
  2012-02-23 17:40     ` Aneesh V
@ 2012-02-23 23:52       ` Mike Frysinger
  2012-02-24 10:30         ` Aneesh V
  0 siblings, 1 reply; 83+ messages in thread
From: Mike Frysinger @ 2012-02-23 23:52 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 12:40:54 Aneesh V wrote:
> On Thursday 23 February 2012 08:29 PM, Mike Frysinger wrote:
> > On Thursday 23 February 2012 09:06:01 Aneesh V wrote:
> >> --- /dev/null
> >> +++ b/arch/arm/include/asm/linkage.h
> >> @@ -0,0 +1,11 @@
> >> +#ifndef __ASM_LINKAGE_H
> >> +#define __ASM_LINKAGE_H
> > 
> > needs copyright/license comment header
> 
> As Tom mentioned, I don't know whose copyright it is.

sorry, i assumed you were creating it from scratch

> >> +#define ENDPROC(name) \
> >> +.type name, %function; \
> >> +END(name)
> > 
> > please change linux/linkage.h instead.  % should be safe for everyone.
> 
> The spec says that STT_FUNC will work for all archs. How about using
> that?

i'd prefer to use %function in the common code, but i won't fight too hard.  
reading gas/config/obj-elf.c seems to back up your STT_FUNC claims; it's just 
that i've found @function/%function to be much more common in practice than 
using STT_FUNC.  i've only see the latter in more esoteric code ...
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 1/6] arm: adapt asm/linkage.h from Linux
  2012-02-23 23:52       ` Mike Frysinger
@ 2012-02-24 10:30         ` Aneesh V
  0 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-24 10:30 UTC (permalink / raw)
  To: u-boot

On Friday 24 February 2012 05:22 AM, Mike Frysinger wrote:
> On Thursday 23 February 2012 12:40:54 Aneesh V wrote:
>> On Thursday 23 February 2012 08:29 PM, Mike Frysinger wrote:
>>> On Thursday 23 February 2012 09:06:01 Aneesh V wrote:
>>>> --- /dev/null
>>>> +++ b/arch/arm/include/asm/linkage.h
>>>> @@ -0,0 +1,11 @@
>>>> +#ifndef __ASM_LINKAGE_H
>>>> +#define __ASM_LINKAGE_H
>>>
>>> needs copyright/license comment header
>>
>> As Tom mentioned, I don't know whose copyright it is.
>
> sorry, i assumed you were creating it from scratch
>
>>>> +#define ENDPROC(name) \
>>>> +.type name, %function; \
>>>> +END(name)
>>>
>>> please change linux/linkage.h instead.  % should be safe for everyone.
>>
>> The spec says that STT_FUNC will work for all archs. How about using
>> that?
>
> i'd prefer to use %function in the common code, but i won't fight too hard.
> reading gas/config/obj-elf.c seems to back up your STT_FUNC claims; it's just
> that i've found @function/%function to be much more common in practice than
> using STT_FUNC.  i've only see the latter in more esoteric code ...

I don't have any strong preference either. I was just trying to see if
it's documented in gcc manuals that %function works for all and I
stumbled upon STT_FUNC. I agree that %function looks more natural, but
since we are hiding it in a macro, I think it doesn't matter much
anyway. I will do it with STT_FUNC.

br,
Aneesh

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 2/6] armv7: add appropriate headers for assembly functions
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (15 preceding siblings ...)
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 1/6] arm: adapt asm/linkage.h from Linux Aneesh V
@ 2012-02-23 14:06 ` Aneesh V
  2012-02-23 14:59   ` Mike Frysinger
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 3/6] ARM: enable Thumb build Aneesh V
                   ` (9 subsequent siblings)
  26 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-23 14:06 UTC (permalink / raw)
  To: u-boot

Use ENTRY and ENDPROC with assembly functions to ensure
necessary assembler directives for all functions.

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Changes in V2:
- Newly added
---
 arch/arm/cpu/armv7/mx5/lowlevel_init.S         |    5 ++-
 arch/arm/cpu/armv7/mx6/lowlevel_init.S         |    5 ++-
 arch/arm/cpu/armv7/omap-common/lowlevel_init.S |   14 ++++----
 arch/arm/cpu/armv7/omap-common/reset.S         |    5 ++-
 arch/arm/cpu/armv7/omap3/lowlevel_init.S       |   41 ++++++++++++-----------
 arch/arm/cpu/armv7/s5pc1xx/cache.S             |   10 +++--
 arch/arm/cpu/armv7/s5pc1xx/reset.S             |    5 ++-
 arch/arm/cpu/armv7/start.S                     |   13 ++++---
 arch/arm/cpu/armv7/tegra2/lowlevel_init.S      |    5 ++-
 arch/arm/cpu/armv7/u8500/lowlevel.S            |    9 +++--
 10 files changed, 61 insertions(+), 51 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
index 01f6d75..5344410 100644
--- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
@@ -22,6 +22,7 @@
 #include <config.h>
 #include <asm/arch/imx-regs.h>
 #include <generated/asm-offsets.h>
+#include <linux/linkage.h>
 
 /*
  * L2CC Cache setup/invalidation/disable
@@ -312,8 +313,7 @@
 
 .section ".text.init", "x"
 
-.globl lowlevel_init
-lowlevel_init:
+ENTRY(lowlevel_init)
 #if defined(CONFIG_MX51)
 	ldr r0, =GPIO1_BASE_ADDR
 	ldr r1, [r0, #0x0]
@@ -334,6 +334,7 @@ lowlevel_init:
 
 	/* r12 saved upper lr*/
 	mov pc,lr
+ENDPROC(lowlevel_init)
 
 /* Board level setting value */
 W_DP_OP_864:              .word DP_OP_864
diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
index 1864356..acadef2 100644
--- a/arch/arm/cpu/armv7/mx6/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
@@ -18,7 +18,8 @@
  */
 .section ".text.init", "x"
 
-.globl lowlevel_init
-lowlevel_init:
+#include <linux/linkage.h>
 
+ENTRY(lowlevel_init)
 	mov pc, lr
+ENDPROC(lowlevel_init)
diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
index 35f38ac..ccc6bb6 100644
--- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
@@ -27,9 +27,9 @@
  */
 
 #include <asm/arch/omap.h>
+#include <linux/linkage.h>
 
-.global save_boot_params
-save_boot_params:
+ENTRY(save_boot_params)
 	/*
 	 * See if the rom code passed pointer is valid:
 	 * It is not valid if it is not in non-secure SRAM
@@ -76,10 +76,9 @@ save_boot_params:
 	strb	r2, [r3, #CH_FLAGS_OFFSET]
 1:
 	bx	lr
+ENDPROC(save_boot_params)
 
-
-.globl lowlevel_init
-lowlevel_init:
+ENTRY(lowlevel_init)
 	/*
 	 * Setup a temporary stack
 	 */
@@ -95,12 +94,13 @@ lowlevel_init:
 	 */
 	bl	s_init
 	pop	{ip, pc}
+ENDPROC(lowlevel_init)
 
-.globl set_pl310_ctrl_reg
-set_pl310_ctrl_reg:
+ENTRY(set_pl310_ctrl_reg)
 	PUSH	{r4-r11, lr}	@ save registers - ROM code may pollute
 				@ our registers
 	LDR	r12, =0x102	@ Set PL310 control register - value in R0
 	.word	0xe1600070	@ SMC #0 - hand assembled because -march=armv5
 				@ call ROM Code API to set control register
 	POP	{r4-r11, pc}
+ENDPROC(set_pl310_ctrl_reg)
diff --git a/arch/arm/cpu/armv7/omap-common/reset.S b/arch/arm/cpu/armv7/omap-common/reset.S
index 838b122..179a476 100644
--- a/arch/arm/cpu/armv7/omap-common/reset.S
+++ b/arch/arm/cpu/armv7/omap-common/reset.S
@@ -22,9 +22,9 @@
  */
 
 #include <config.h>
+#include <linux/linkage.h>
 
-.global reset_cpu
-reset_cpu:
+ENTRY(reset_cpu)
 	ldr	r1, rstctl			@ get addr for global reset
 						@ reg
 	ldr	r3, rstbit			@ sw reset bit
@@ -36,3 +36,4 @@ rstctl:
 	.word	PRM_RSTCTRL
 rstbit:
 	.word	PRM_RSTCTRL_RESET
+ENDPROC(reset_cpu)
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index c42c5dd..ebf69fa 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -31,22 +31,22 @@
 #include <version.h>
 #include <asm/arch/mem.h>
 #include <asm/arch/clocks_omap3.h>
+#include <linux/linkage.h>
 
 _TEXT_BASE:
 	.word	CONFIG_SYS_TEXT_BASE	/* sdram load addr from config.mk */
 
 #ifdef CONFIG_SPL_BUILD
-.global save_boot_params
-save_boot_params:
+ENTRY(save_boot_params)
 	ldr	r4, =omap3_boot_device
 	ldr	r5, [r0, #0x4]
 	and	r5, r5, #0xff
 	str	r5, [r4]
 	bx	lr
+ENDPROC(save_boot_params)
 #endif
 
-.global omap3_gp_romcode_call
-omap3_gp_romcode_call:
+ENTRY(omap3_gp_romcode_call)
 	PUSH {r4-r12, lr} @ Save all registers from ROM code!
 	MOV r12, r0	@ Copy the Service ID in R12
 	MOV r0, r1	@ Copy parameter to R0
@@ -55,6 +55,7 @@ omap3_gp_romcode_call:
 	.word	0xe1600070	@ SMC #0 to enter monitor - hand assembled
 				@ because we use -march=armv5
 	POP {r4-r12, pc}
+ENDPROC(omap3_gp_romcode_call)
 
 /*
  * Funtion for making PPA HAL API calls in secure devices
@@ -62,8 +63,7 @@ omap3_gp_romcode_call:
  *	R0 - Service ID
  *	R1 - paramer list
  */
-.global do_omap3_emu_romcode_call
-do_omap3_emu_romcode_call:
+ENTRY(do_omap3_emu_romcode_call)
 	PUSH {r4-r12, lr} @ Save all registers from ROM code!
 	MOV r12, r0	@ Copy the Secure Service ID in R12
 	MOV r3, r1	@ Copy the pointer to va_list in R3
@@ -76,14 +76,14 @@ do_omap3_emu_romcode_call:
 	.word	0xe1600071	@ SMC #1 to call PPA service - hand assembled
 				@ because we use -march=armv5
 	POP {r4-r12, pc}
+ENDPROC(do_omap3_emu_romcode_call)
 
 #if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_NAND_BOOT)
 /**************************************************************************
  * cpy_clk_code: relocates clock code into SRAM where its safer to execute
  * R1 = SRAM destination address.
  *************************************************************************/
-.global cpy_clk_code
- cpy_clk_code:
+ENTRY(cpy_clk_code)
 	/* Copy DPLL code into SRAM */
 	adr	r0, go_to_speed		/* get addr of clock setting code */
 	mov	r2, #384		/* r2 size to copy (div by 32 bytes) */
@@ -95,6 +95,7 @@ next2:
 	cmp	r0, r2			/* until source end address [r2] */
 	bne	next2
 	mov	pc, lr			/* back to caller */
+ENDPROC(cpy_clk_code)
 
 /* ***************************************************************************
  *  go_to_speed: -Moves to bypass, -Commits clock dividers, -puts dpll at speed
@@ -109,8 +110,7 @@ next2:
  *        L3 when its not in self refresh seems bad for it.  Normally, this
  *	  code runs from flash before SDR is init so that should be ok.
  ****************************************************************************/
-.global go_to_speed
- go_to_speed:
+ENTRY(go_to_speed)
 	stmfd sp!, {r4 - r6}
 
 	/* move into fast relock bypass */
@@ -171,6 +171,7 @@ wait2:
 	nop
 	ldmfd	sp!, {r4 - r6}
 	mov	pc, lr		/* back to caller, locked */
+ENDPROC(go_to_speed)
 
 _go_to_speed: .word go_to_speed
 
@@ -211,8 +212,7 @@ pll_div_val5:
 
 #endif
 
-.globl lowlevel_init
-lowlevel_init:
+ENTRY(lowlevel_init)
 	ldr	sp, SRAM_STACK
 	str	ip, [sp]	/* stash old link register */
 	mov	ip, lr		/* save link reg across call */
@@ -230,6 +230,7 @@ lowlevel_init:
 
 	/* back to arch calling code */
 	mov	pc, lr
+ENDPROC(lowlevel_init)
 
 	/* the literal pools origin */
 	.ltorg
@@ -480,22 +481,22 @@ per_36x_dpll_param:
 .word 26000,    432,   12,     9,      16,     9,     4,      3,      1
 .word 38400,    360,   15,     9,      16,     5,     4,      3,      1
 
-.globl get_36x_mpu_dpll_param
-get_36x_mpu_dpll_param:
+ENTRY(get_36x_mpu_dpll_param)
 	adr	r0, mpu_36x_dpll_param
 	mov	pc, lr
+ENDPROC(get_36x_mpu_dpll_param)
 
-.globl get_36x_iva_dpll_param
-get_36x_iva_dpll_param:
+ENTRY(get_36x_iva_dpll_param)
 	adr	r0, iva_36x_dpll_param
 	mov	pc, lr
+ENDPROC(get_36x_iva_dpll_param)
 
-.globl get_36x_core_dpll_param
-get_36x_core_dpll_param:
+ENTRY(get_36x_core_dpll_param)
 	adr	r0, core_36x_dpll_param
 	mov	pc, lr
+ENDPROC(get_36x_core_dpll_param)
 
-.globl get_36x_per_dpll_param
-get_36x_per_dpll_param:
+ENTRY(get_36x_per_dpll_param)
 	adr	r0, per_36x_dpll_param
 	mov	pc, lr
+ENDPROC(get_36x_per_dpll_param)
diff --git a/arch/arm/cpu/armv7/s5pc1xx/cache.S b/arch/arm/cpu/armv7/s5pc1xx/cache.S
index c7d6221..000192c 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/cache.S
+++ b/arch/arm/cpu/armv7/s5pc1xx/cache.S
@@ -25,20 +25,22 @@
 
 .align 5
 
+#include <linux/linkage.h>
+
 #ifndef CONFIG_SYS_L2CACHE_OFF
-.global v7_outer_cache_enable
-v7_outer_cache_enable:
+ENTRY(v7_outer_cache_enable)
 	push	{r0, r1, r2, lr}
 	mrc	15, 0, r3, cr1, cr0, 1
 	orr	r3, r3, #2
 	mcr	15, 0, r3, cr1, cr0, 1
 	pop	{r1, r2, r3, pc}
+ENDPROC(v7_outer_cache_enable)
 
-.global v7_outer_cache_disable
-v7_outer_cache_disable:
+ENTRY(v7_outer_cache_disable)
 	push	{r0, r1, r2, lr}
 	mrc	15, 0, r3, cr1, cr0, 1
 	bic	r3, r3, #2
 	mcr	15, 0, r3, cr1, cr0, 1
 	pop	{r1, r2, r3, pc}
+ENDPROC(v7_outer_cache_disable)
 #endif
diff --git a/arch/arm/cpu/armv7/s5pc1xx/reset.S b/arch/arm/cpu/armv7/s5pc1xx/reset.S
index 70fa146..c7a41d0 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/reset.S
+++ b/arch/arm/cpu/armv7/s5pc1xx/reset.S
@@ -22,12 +22,12 @@
  */
 
 #include <asm/arch/cpu.h>
+#include <linux/linkage.h>
 
 #define S5PC100_SWRESET			0xE0200000
 #define S5PC110_SWRESET			0xE0102000
 
-.globl reset_cpu
-reset_cpu:
+ENTRY(reset_cpu)
 	ldr	r1, =S5PC100_PRO_ID
 	ldr	r2, [r1]
 	ldr	r4, =0x00010000
@@ -45,3 +45,4 @@ reset_cpu:
 	str	r2, [r1]
 _loop_forever:
 	b	_loop_forever
+ENDPROC(reset_cpu)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index ef08a55..261835b 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -33,6 +33,7 @@
 #include <config.h>
 #include <version.h>
 #include <asm/system.h>
+#include <linux/linkage.h>
 
 .globl _start
 _start: b	reset
@@ -172,8 +173,7 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
-relocate_code:
+ENTRY(relocate_code)
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
 	mov	r6, r2	/* save addr of destination */
@@ -289,6 +289,7 @@ jump_2_ram:
 
 _board_init_r_ofs:
 	.word board_init_r - _start
+ENDPROC(relocate_code)
 
 /*************************************************************************
  *
@@ -298,8 +299,7 @@ _board_init_r_ofs:
  * CONFIG_SYS_ICACHE_OFF is defined.
  *
  *************************************************************************/
-.globl cpu_init_cp15
-cpu_init_cp15:
+ENTRY(cpu_init_cp15)
 	/*
 	 * Invalidate L1 I/D
 	 */
@@ -325,7 +325,7 @@ cpu_init_cp15:
 #endif
 	mcr	p15, 0, r0, c1, c0, 0
 	mov	pc, lr			@ back to my caller
-
+ENDPROC(cpu_init_cp15)
 
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 /*************************************************************************
@@ -336,7 +336,7 @@ cpu_init_cp15:
  * setup memory timing
  *
  *************************************************************************/
-cpu_init_crit:
+ENTRY(cpu_init_crit)
 	/*
 	 * Jump to board specific initialization...
 	 * The Mask ROM will have already initialized
@@ -347,6 +347,7 @@ cpu_init_crit:
 	bl	lowlevel_init		@ go setup pll,mux,memory
 	mov	lr, ip			@ restore link
 	mov	pc, lr			@ back to my caller
+ENDPROC(cpu_init_crit)
 #endif
 
 #ifndef CONFIG_SPL_BUILD
diff --git a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
index 6b86647..d117f23 100644
--- a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
@@ -25,10 +25,10 @@
 
 #include <config.h>
 #include <version.h>
+#include <linux/linkage.h>
 
 	.align	5
-.global reset_cpu
-reset_cpu:
+ENTRY(reset_cpu)
 	ldr	r1, rstctl			@ get addr for global reset
 						@ reg
 	ldr	r3, [r1]
@@ -39,3 +39,4 @@ _loop_forever:
 	b	_loop_forever
 rstctl:
 	.word	PRM_RSTCTRL
+ENDPROC(reset_cpu)
diff --git a/arch/arm/cpu/armv7/u8500/lowlevel.S b/arch/arm/cpu/armv7/u8500/lowlevel.S
index cffdfd1..289cfb0 100644
--- a/arch/arm/cpu/armv7/u8500/lowlevel.S
+++ b/arch/arm/cpu/armv7/u8500/lowlevel.S
@@ -20,16 +20,17 @@
  */
 
 #include <config.h>
+#include <linux/linkage.h>
 
-.globl lowlevel_init
-lowlevel_init:
+ENTRY(lowlevel_init)
 	mov	pc, lr
+ENDPROC(lowlevel_init)
 
 	.align	5
-.globl reset_cpu
-reset_cpu:
+ENTRY(reset_cpu)
 	ldr r0, =CFG_PRCMU_BASE
 	ldr r1, =0x1
 	str r1, [r0, #0x228]
 _loop_forever:
 	b	_loop_forever
+ENDPROC(reset_cpu)
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 2/6] armv7: add appropriate headers for assembly functions
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 2/6] armv7: add appropriate headers for assembly functions Aneesh V
@ 2012-02-23 14:59   ` Mike Frysinger
  0 siblings, 0 replies; 83+ messages in thread
From: Mike Frysinger @ 2012-02-23 14:59 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 09:06:02 Aneesh V wrote:
> Use ENTRY and ENDPROC with assembly functions to ensure
> necessary assembler directives for all functions.

Acked-by: Mike Frysinger <vapier@gentoo.org>
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 3/6] ARM: enable Thumb build
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (16 preceding siblings ...)
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 2/6] armv7: add appropriate headers for assembly functions Aneesh V
@ 2012-02-23 14:06 ` Aneesh V
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 4/6] armv7: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
                   ` (8 subsequent siblings)
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-23 14:06 UTC (permalink / raw)
  To: u-boot

Enable Thumb build and ARM-Thumb interworking based on the new
config flag CONFIG_SYS_THUMB_BUILD

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Changes from RFC to V1:
- Fixed review comments from Tom Rini <trini@ti.com>

Changes from V1 to V2:
- None
---
 README             |    8 ++++++++
 arch/arm/config.mk |   20 ++++++++++++++------
 2 files changed, 22 insertions(+), 6 deletions(-)

diff --git a/README b/README
index eba6378..1f4e2e8 100644
--- a/README
+++ b/README
@@ -426,6 +426,14 @@ The following options need to be configured:
 		Select high exception vectors of the ARM core, e.g., do not
 		clear the V bit of the c1 register of CP15.
 
+		CONFIG_SYS_THUMB_BUILD
+
+		Use this flag to build U-Boot using the Thumb instruction
+		set for ARM architectures. Thumb instruction set provides
+		better code density. For ARM architectures that support
+		Thumb2 this flag will result in Thumb2 code generated by
+		GCC.
+
 - Linux Kernel Interface:
 		CONFIG_CLOCKS_IN_MHZ
 
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 45f9dca..de9aa53 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -33,25 +33,33 @@ endif
 
 PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
 
-# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
+# Choose between ARM/Thumb instruction sets
+ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
+PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
+			$(call cc-option,-marm,)\
+			$(call cc-option,-mno-thumb-interwork,)\
+		)
+else
 PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
+PF_CPPFLAGS_ARM += $(call cc-option,-mno-thumb-interwork,)
+endif
 
 # Try if EABI is supported, else fall back to old API,
 # i. e. for example:
 # - with ELDK 4.2 (EABI supported), use:
-#	-mabi=aapcs-linux -mno-thumb-interwork
+#	-mabi=aapcs-linux
 # - with ELDK 4.1 (gcc 4.x, no EABI), use:
-#	-mabi=apcs-gnu -mno-thumb-interwork
+#	-mabi=apcs-gnu
 # - with ELDK 3.1 (gcc 3.x), use:
-#	-mapcs-32 -mno-thumb-interwork
+#	-mapcs-32
 PF_CPPFLAGS_ABI := $(call cc-option,\
-			-mabi=aapcs-linux -mno-thumb-interwork,\
+			-mabi=aapcs-linux,\
 			$(call cc-option,\
 				-mapcs-32,\
 				$(call cc-option,\
 					-mabi=apcs-gnu,\
 				)\
-			) $(call cc-option,-mno-thumb-interwork,)\
+			)\
 		)
 PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARM) $(PF_CPPFLAGS_ABI)
 
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 4/6] armv7: Use -march=armv7-a and thereby enable Thumb-2
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (17 preceding siblings ...)
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 3/6] ARM: enable Thumb build Aneesh V
@ 2012-02-23 14:06 ` Aneesh V
  2012-02-23 15:05   ` Mike Frysinger
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 5/6] omap4+: Avoid using __attribute__ ((__packed__)) Aneesh V
                   ` (7 subsequent siblings)
  26 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-23 14:06 UTC (permalink / raw)
  To: u-boot

Enable -march=armv7-a for armv7 platforms if the tool-chain
supports it. This in turn results in Thumb-2 code generated
for these platforms if CONFIG_SYS_THUMB_BUILD is enabled.

Signed-off-by: Aneesh V <aneesh@ti.com>
---
I believe armv7-a is fine for all the SoCs except Tegra2
and I see that Tegra2 is already making the necessary
exception in .../armv7/tegra2/config.mk

Let me know if any other SoC has a problem with armv7-a

Changes from RFC to V1:
- Enabled armv7-a from armv7/config.mk instead of from
  omap config.mk files

Changes from V1 to V2:
- None
---
 arch/arm/cpu/armv7/config.mk |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk
index 83ddf10..b66fb6f 100644
--- a/arch/arm/cpu/armv7/config.mk
+++ b/arch/arm/cpu/armv7/config.mk
@@ -22,8 +22,9 @@
 #
 PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
 
-# Make ARMv5 to allow more compilers to work, even though its v7a.
-PLATFORM_CPPFLAGS += -march=armv5
+# If armv7-a is not supported by GCC fall-back to armv5, which is
+# supported by more tool-chains
+PLATFORM_CPPFLAGS += $(call cc-option, -march=armv7-a, -march=armv5)
 # =========================================================================
 #
 # Supply options according to compiler version
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 4/6] armv7: Use -march=armv7-a and thereby enable Thumb-2
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 4/6] armv7: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
@ 2012-02-23 15:05   ` Mike Frysinger
  2012-02-23 17:50     ` Aneesh V
  0 siblings, 1 reply; 83+ messages in thread
From: Mike Frysinger @ 2012-02-23 15:05 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 09:06:04 Aneesh V wrote:
> --- a/arch/arm/cpu/armv7/config.mk
> +++ b/arch/arm/cpu/armv7/config.mk
> 
> -# Make ARMv5 to allow more compilers to work, even though its v7a.
> -PLATFORM_CPPFLAGS += -march=armv5
> +# If armv7-a is not supported by GCC fall-back to armv5, which is
> +# supported by more tool-chains
> +PLATFORM_CPPFLAGS += $(call cc-option, -march=armv7-a, -march=armv5)

NAK: you need to use ":=" before "+=":
	PF_CPPFLAGS_MARCH := $(call cc-option, -march=armv7-a, -march=armv5)
	PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_MARCH)
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 4/6] armv7: Use -march=armv7-a and thereby enable Thumb-2
  2012-02-23 15:05   ` Mike Frysinger
@ 2012-02-23 17:50     ` Aneesh V
  0 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-23 17:50 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 08:35 PM, Mike Frysinger wrote:
> On Thursday 23 February 2012 09:06:04 Aneesh V wrote:
>> --- a/arch/arm/cpu/armv7/config.mk
>> +++ b/arch/arm/cpu/armv7/config.mk
>>
>> -# Make ARMv5 to allow more compilers to work, even though its v7a.
>> -PLATFORM_CPPFLAGS += -march=armv5
>> +# If armv7-a is not supported by GCC fall-back to armv5, which is
>> +# supported by more tool-chains
>> +PLATFORM_CPPFLAGS += $(call cc-option, -march=armv7-a, -march=armv5)
>
> NAK: you need to use ":=" before "+=":
> 	PF_CPPFLAGS_MARCH := $(call cc-option, -march=armv7-a, -march=armv5)
> 	PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_MARCH)

Will do.

br,
Aneesh

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 5/6] omap4+: Avoid using __attribute__ ((__packed__))
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (18 preceding siblings ...)
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 4/6] armv7: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
@ 2012-02-23 14:06 ` Aneesh V
  2012-02-23 14:21   ` Tom Rini
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 6/6] OMAP4: enable Thumb build Aneesh V
                   ` (6 subsequent siblings)
  26 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-23 14:06 UTC (permalink / raw)
  To: u-boot

Avoid using __attribute__ ((__packed__)) unless it's
absolutely necessary. "packed" will remove alignment
requirements for the respective objects and may cause
alignment issues unless alignment is also enforced
using a pragma.

Here, these packed attributes were causing alignment
faults in Thumb build.

Signed-off-by: Aneesh V <aneesh@ti.com>
---
 arch/arm/include/asm/arch-omap4/mux_omap4.h |    2 +-
 arch/arm/include/asm/arch-omap5/mux_omap5.h |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-omap4/mux_omap4.h b/arch/arm/include/asm/arch-omap4/mux_omap4.h
index 30bfad7..4de7c70 100644
--- a/arch/arm/include/asm/arch-omap4/mux_omap4.h
+++ b/arch/arm/include/asm/arch-omap4/mux_omap4.h
@@ -34,7 +34,7 @@ struct pad_conf_entry {
 
 	u16 val;
 
-} __attribute__ ((packed));
+};
 
 #ifdef CONFIG_OFF_PADCONF
 #define OFF_PD          (1 << 12)
diff --git a/arch/arm/include/asm/arch-omap5/mux_omap5.h b/arch/arm/include/asm/arch-omap5/mux_omap5.h
index b8c2185..af6874f 100644
--- a/arch/arm/include/asm/arch-omap5/mux_omap5.h
+++ b/arch/arm/include/asm/arch-omap5/mux_omap5.h
@@ -34,7 +34,7 @@ struct pad_conf_entry {
 
 	u16 val;
 
-} __attribute__ ((__packed__));
+};
 
 #ifdef CONFIG_OFF_PADCONF
 #define OFF_PD          (1 << 12)
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 5/6] omap4+: Avoid using __attribute__ ((__packed__))
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 5/6] omap4+: Avoid using __attribute__ ((__packed__)) Aneesh V
@ 2012-02-23 14:21   ` Tom Rini
  2012-02-23 14:56     ` Aneesh V
  2012-02-23 15:03     ` Mike Frysinger
  0 siblings, 2 replies; 83+ messages in thread
From: Tom Rini @ 2012-02-23 14:21 UTC (permalink / raw)
  To: u-boot

On Thu, Feb 23, 2012 at 7:06 AM, Aneesh V <aneesh@ti.com> wrote:
> Avoid using __attribute__ ((__packed__)) unless it's
> absolutely necessary. "packed" will remove alignment
> requirements for the respective objects and may cause
> alignment issues unless alignment is also enforced
> using a pragma.
>
> Here, these packed attributes were causing alignment
> faults in Thumb build.
>
> Signed-off-by: Aneesh V <aneesh@ti.com>

Why did we pack these to start with?  Otherwise seems fine (and I see
the rest of the TI parts don't have this particular packing).

-- 
Tom

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 5/6] omap4+: Avoid using __attribute__ ((__packed__))
  2012-02-23 14:21   ` Tom Rini
@ 2012-02-23 14:56     ` Aneesh V
  2012-02-23 15:03       ` Mike Frysinger
  2012-02-23 15:03     ` Mike Frysinger
  1 sibling, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-02-23 14:56 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 07:51 PM, Tom Rini wrote:
> On Thu, Feb 23, 2012 at 7:06 AM, Aneesh V<aneesh@ti.com>  wrote:
>> Avoid using __attribute__ ((__packed__)) unless it's
>> absolutely necessary. "packed" will remove alignment
>> requirements for the respective objects and may cause
>> alignment issues unless alignment is also enforced
>> using a pragma.
>>
>> Here, these packed attributes were causing alignment
>> faults in Thumb build.
>>
>> Signed-off-by: Aneesh V<aneesh@ti.com>
>
> Why did we pack these to start with?  Otherwise seems fine (and I see
> the rest of the TI parts don't have this particular packing).
>

I think that was to save some space - to make sure that the compiler
didn't pad the structure to have the u16 fields at word boundary. But
even without "packed" the complier is not padding it. I checked that
today, the size of the mux arrays remain the same even after removing
the "packed". So, I guess the "packed" didn't have any impact.

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 5/6] omap4+: Avoid using __attribute__ ((__packed__))
  2012-02-23 14:56     ` Aneesh V
@ 2012-02-23 15:03       ` Mike Frysinger
  0 siblings, 0 replies; 83+ messages in thread
From: Mike Frysinger @ 2012-02-23 15:03 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 09:56:24 Aneesh V wrote:
> On Thursday 23 February 2012 07:51 PM, Tom Rini wrote:
> > On Thu, Feb 23, 2012 at 7:06 AM, Aneesh V<aneesh@ti.com>  wrote:
> >> Avoid using __attribute__ ((__packed__)) unless it's
> >> absolutely necessary. "packed" will remove alignment
> >> requirements for the respective objects and may cause
> >> alignment issues unless alignment is also enforced
> >> using a pragma.
> >> 
> >> Here, these packed attributes were causing alignment
> >> faults in Thumb build.
> > 
> > Why did we pack these to start with?  Otherwise seems fine (and I see
> > the rest of the TI parts don't have this particular packing).
> 
> I think that was to save some space - to make sure that the compiler
> didn't pad the structure to have the u16 fields at word boundary. But
> even without "packed" the complier is not padding it. I checked that
> today, the size of the mux arrays remain the same even after removing
> the "packed". So, I guess the "packed" didn't have any impact.

i don't think so.  see my other reply.
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 5/6] omap4+: Avoid using __attribute__ ((__packed__))
  2012-02-23 14:21   ` Tom Rini
  2012-02-23 14:56     ` Aneesh V
@ 2012-02-23 15:03     ` Mike Frysinger
  2012-02-23 15:42       ` Aneesh V
  1 sibling, 1 reply; 83+ messages in thread
From: Mike Frysinger @ 2012-02-23 15:03 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 09:21:00 Tom Rini wrote:
> On Thu, Feb 23, 2012 at 7:06 AM, Aneesh V <aneesh@ti.com> wrote:
> > Avoid using __attribute__ ((__packed__)) unless it's
> > absolutely necessary. "packed" will remove alignment
> > requirements for the respective objects and may cause
> > alignment issues unless alignment is also enforced
> > using a pragma.
> > 
> > Here, these packed attributes were causing alignment
> > faults in Thumb build.
> 
> Why did we pack these to start with?  Otherwise seems fine (and I see
> the rest of the TI parts don't have this particular packing).

because these represent hardware register blocks which get used with writew() 
and typically those blocks get marked packed.

if the arch won't introduce padding with the members, then this change should 
be ok, and looking at the structs which are just 2 16bit members, that should 
be the case here.

if you really want to be pedantic, i think the alternative would be:
	struct pad_conf_entry {} __packed __aligned(2);
-mike
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^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 5/6] omap4+: Avoid using __attribute__ ((__packed__))
  2012-02-23 15:03     ` Mike Frysinger
@ 2012-02-23 15:42       ` Aneesh V
  0 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-23 15:42 UTC (permalink / raw)
  To: u-boot

On Thursday 23 February 2012 08:33 PM, Mike Frysinger wrote:
> On Thursday 23 February 2012 09:21:00 Tom Rini wrote:
>> On Thu, Feb 23, 2012 at 7:06 AM, Aneesh V<aneesh@ti.com>  wrote:
>>> Avoid using __attribute__ ((__packed__)) unless it's
>>> absolutely necessary. "packed" will remove alignment
>>> requirements for the respective objects and may cause
>>> alignment issues unless alignment is also enforced
>>> using a pragma.
>>>
>>> Here, these packed attributes were causing alignment
>>> faults in Thumb build.
>>
>> Why did we pack these to start with?  Otherwise seems fine (and I see
>> the rest of the TI parts don't have this particular packing).
>
> because these represent hardware register blocks which get used with writew()
> and typically those blocks get marked packed.

No. That's not the case. This is just a table that has the mux data for
the board. It's not directly mapped to hardware. The hardware register
offset is part of this table.

>
> if the arch won't introduce padding with the members, then this change should
> be ok, and looking at the structs which are just 2 16bit members, that should
> be the case here.
>
> if you really want to be pedantic, i think the alternative would be:
> 	struct pad_conf_entry {} __packed __aligned(2);

I had tried that and it had solved the problem too, but the "packed" is
not needed at all. That's purely a software table.

regards,
Aneesh

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH v3 6/6] OMAP4: enable Thumb build
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (19 preceding siblings ...)
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 5/6] omap4+: Avoid using __attribute__ ((__packed__)) Aneesh V
@ 2012-02-23 14:06 ` Aneesh V
  2012-03-08 17:10 ` [U-Boot] [PATCH 1/6] arm: adapt asm/linkage.h from Linux Aneesh V
                   ` (5 subsequent siblings)
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-02-23 14:06 UTC (permalink / raw)
  To: u-boot

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Changes from RFC to V1:
- None

Changes from V1 to V2:
- None
---
 include/configs/omap4_common.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
index a989721..01b4d6c 100644
--- a/include/configs/omap4_common.h
+++ b/include/configs/omap4_common.h
@@ -287,4 +287,6 @@
 
 #define CONFIG_SYS_ENABLE_PADS_ALL
 
+#define CONFIG_SYS_THUMB_BUILD
+
 #endif /* __CONFIG_OMAP4_COMMON_H */
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 1/6] arm: adapt asm/linkage.h from Linux
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (20 preceding siblings ...)
  2012-02-23 14:06 ` [U-Boot] [PATCH v3 6/6] OMAP4: enable Thumb build Aneesh V
@ 2012-03-08 17:10 ` Aneesh V
  2012-03-08 17:14   ` Aneesh V
  2012-03-08 17:10 ` [U-Boot] [PATCH 2/6] armv7: add appropriate headers for assembly functions Aneesh V
                   ` (4 subsequent siblings)
  26 siblings, 1 reply; 83+ messages in thread
From: Aneesh V @ 2012-03-08 17:10 UTC (permalink / raw)
  To: u-boot

This will add ARM specific over-rides for the defines
from linux/linkage.h

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Not adding the defines for __ALIGN and __ALIGN_STR
because it's not clear why alignment is set to 0
(single byte alignment).

Creates a checkpatch error that can not be avoided

Changes in v4:
- Use STT_FUNC in the definition of ENDPROC in
  include/linux/linkage.h that is more portable
  than the '*function' versions. Now, remove the
  definition of ENDPROC from the arm linkage.h

Changes in v3:
- None

Changes in v2:
 - Newly added
---
 arch/arm/include/asm/linkage.h |    7 +++++++
 include/linux/linkage.h        |    7 ++++++-
 2 files changed, 13 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/include/asm/linkage.h

diff --git a/arch/arm/include/asm/linkage.h b/arch/arm/include/asm/linkage.h
new file mode 100644
index 0000000..dbe4b4e
--- /dev/null
+++ b/arch/arm/include/asm/linkage.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_LINKAGE_H
+#define __ASM_LINKAGE_H
+
+#define __ALIGN .align 0
+#define __ALIGN_STR ".align 0"
+
+#endif
diff --git a/include/linux/linkage.h b/include/linux/linkage.h
index ed4cf6c..7b749bb 100644
--- a/include/linux/linkage.h
+++ b/include/linux/linkage.h
@@ -44,8 +44,13 @@
 #define SYMBOL_NAME_LABEL(X)	X:
 #endif
 
+#ifndef __ALIGN
 #define __ALIGN .align		4
+#endif
+
+#ifndef __ALIGN_STR
 #define __ALIGN_STR		".align 4"
+#endif
 
 #ifdef __ASSEMBLY__
 
@@ -67,7 +72,7 @@
 
 #ifndef ENDPROC
 #define ENDPROC(name) \
-	.type name, @function; \
+	.type name STT_FUNC; \
 	END(name)
 #endif
 
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 1/6] arm: adapt asm/linkage.h from Linux
  2012-03-08 17:10 ` [U-Boot] [PATCH 1/6] arm: adapt asm/linkage.h from Linux Aneesh V
@ 2012-03-08 17:14   ` Aneesh V
  0 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-03-08 17:14 UTC (permalink / raw)
  To: u-boot

Missed adding 'v4' in the subject. Please ignore this series. Will
re-send correcting the subject.

On Thursday 08 March 2012 10:40 PM, Aneesh V wrote:
> This will add ARM specific over-rides for the defines
> from linux/linkage.h
>
> Signed-off-by: Aneesh V<aneesh@ti.com>
> ---
> Not adding the defines for __ALIGN and __ALIGN_STR
> because it's not clear why alignment is set to 0
> (single byte alignment).
>
> Creates a checkpatch error that can not be avoided
>
> Changes in v4:
> - Use STT_FUNC in the definition of ENDPROC in
>    include/linux/linkage.h that is more portable
>    than the '*function' versions. Now, remove the
>    definition of ENDPROC from the arm linkage.h
>
> Changes in v3:
> - None
>
> Changes in v2:
>   - Newly added
> ---
>   arch/arm/include/asm/linkage.h |    7 +++++++
>   include/linux/linkage.h        |    7 ++++++-
>   2 files changed, 13 insertions(+), 1 deletions(-)
>   create mode 100644 arch/arm/include/asm/linkage.h
>
> diff --git a/arch/arm/include/asm/linkage.h b/arch/arm/include/asm/linkage.h
> new file mode 100644
> index 0000000..dbe4b4e
> --- /dev/null
> +++ b/arch/arm/include/asm/linkage.h
> @@ -0,0 +1,7 @@
> +#ifndef __ASM_LINKAGE_H
> +#define __ASM_LINKAGE_H
> +
> +#define __ALIGN .align 0
> +#define __ALIGN_STR ".align 0"
> +
> +#endif
> diff --git a/include/linux/linkage.h b/include/linux/linkage.h
> index ed4cf6c..7b749bb 100644
> --- a/include/linux/linkage.h
> +++ b/include/linux/linkage.h
> @@ -44,8 +44,13 @@
>   #define SYMBOL_NAME_LABEL(X)	X:
>   #endif
>
> +#ifndef __ALIGN
>   #define __ALIGN .align		4
> +#endif
> +
> +#ifndef __ALIGN_STR
>   #define __ALIGN_STR		".align 4"
> +#endif
>
>   #ifdef __ASSEMBLY__
>
> @@ -67,7 +72,7 @@
>
>   #ifndef ENDPROC
>   #define ENDPROC(name) \
> -	.type name, @function; \
> +	.type name STT_FUNC; \
>   	END(name)
>   #endif
>

^ permalink raw reply	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 2/6] armv7: add appropriate headers for assembly functions
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (21 preceding siblings ...)
  2012-03-08 17:10 ` [U-Boot] [PATCH 1/6] arm: adapt asm/linkage.h from Linux Aneesh V
@ 2012-03-08 17:10 ` Aneesh V
  2012-03-08 17:10 ` [U-Boot] [PATCH 3/6] ARM: enable Thumb build Aneesh V
                   ` (3 subsequent siblings)
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-03-08 17:10 UTC (permalink / raw)
  To: u-boot

Use ENTRY and ENDPROC with assembly functions to ensure
necessary assembler directives for all functions.

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Changes in v4:
- None

Changes in v3:
- None

Changes in V2:
- Newly added
---
 arch/arm/cpu/armv7/mx5/lowlevel_init.S         |    5 ++-
 arch/arm/cpu/armv7/mx6/lowlevel_init.S         |    5 ++-
 arch/arm/cpu/armv7/omap-common/lowlevel_init.S |   14 ++++----
 arch/arm/cpu/armv7/omap-common/reset.S         |    5 ++-
 arch/arm/cpu/armv7/omap3/lowlevel_init.S       |   41 ++++++++++++-----------
 arch/arm/cpu/armv7/s5pc1xx/cache.S             |   10 +++--
 arch/arm/cpu/armv7/s5pc1xx/reset.S             |    5 ++-
 arch/arm/cpu/armv7/start.S                     |   13 ++++---
 arch/arm/cpu/armv7/tegra2/lowlevel_init.S      |    5 ++-
 arch/arm/cpu/armv7/u8500/lowlevel.S            |    9 +++--
 10 files changed, 61 insertions(+), 51 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
index 01f6d75..5344410 100644
--- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
@@ -22,6 +22,7 @@
 #include <config.h>
 #include <asm/arch/imx-regs.h>
 #include <generated/asm-offsets.h>
+#include <linux/linkage.h>
 
 /*
  * L2CC Cache setup/invalidation/disable
@@ -312,8 +313,7 @@
 
 .section ".text.init", "x"
 
-.globl lowlevel_init
-lowlevel_init:
+ENTRY(lowlevel_init)
 #if defined(CONFIG_MX51)
 	ldr r0, =GPIO1_BASE_ADDR
 	ldr r1, [r0, #0x0]
@@ -334,6 +334,7 @@ lowlevel_init:
 
 	/* r12 saved upper lr*/
 	mov pc,lr
+ENDPROC(lowlevel_init)
 
 /* Board level setting value */
 W_DP_OP_864:              .word DP_OP_864
diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
index 1864356..acadef2 100644
--- a/arch/arm/cpu/armv7/mx6/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
@@ -18,7 +18,8 @@
  */
 .section ".text.init", "x"
 
-.globl lowlevel_init
-lowlevel_init:
+#include <linux/linkage.h>
 
+ENTRY(lowlevel_init)
 	mov pc, lr
+ENDPROC(lowlevel_init)
diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
index 35f38ac..ccc6bb6 100644
--- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
@@ -27,9 +27,9 @@
  */
 
 #include <asm/arch/omap.h>
+#include <linux/linkage.h>
 
-.global save_boot_params
-save_boot_params:
+ENTRY(save_boot_params)
 	/*
 	 * See if the rom code passed pointer is valid:
 	 * It is not valid if it is not in non-secure SRAM
@@ -76,10 +76,9 @@ save_boot_params:
 	strb	r2, [r3, #CH_FLAGS_OFFSET]
 1:
 	bx	lr
+ENDPROC(save_boot_params)
 
-
-.globl lowlevel_init
-lowlevel_init:
+ENTRY(lowlevel_init)
 	/*
 	 * Setup a temporary stack
 	 */
@@ -95,12 +94,13 @@ lowlevel_init:
 	 */
 	bl	s_init
 	pop	{ip, pc}
+ENDPROC(lowlevel_init)
 
-.globl set_pl310_ctrl_reg
-set_pl310_ctrl_reg:
+ENTRY(set_pl310_ctrl_reg)
 	PUSH	{r4-r11, lr}	@ save registers - ROM code may pollute
 				@ our registers
 	LDR	r12, =0x102	@ Set PL310 control register - value in R0
 	.word	0xe1600070	@ SMC #0 - hand assembled because -march=armv5
 				@ call ROM Code API to set control register
 	POP	{r4-r11, pc}
+ENDPROC(set_pl310_ctrl_reg)
diff --git a/arch/arm/cpu/armv7/omap-common/reset.S b/arch/arm/cpu/armv7/omap-common/reset.S
index 838b122..179a476 100644
--- a/arch/arm/cpu/armv7/omap-common/reset.S
+++ b/arch/arm/cpu/armv7/omap-common/reset.S
@@ -22,9 +22,9 @@
  */
 
 #include <config.h>
+#include <linux/linkage.h>
 
-.global reset_cpu
-reset_cpu:
+ENTRY(reset_cpu)
 	ldr	r1, rstctl			@ get addr for global reset
 						@ reg
 	ldr	r3, rstbit			@ sw reset bit
@@ -36,3 +36,4 @@ rstctl:
 	.word	PRM_RSTCTRL
 rstbit:
 	.word	PRM_RSTCTRL_RESET
+ENDPROC(reset_cpu)
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index c42c5dd..ebf69fa 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -31,22 +31,22 @@
 #include <version.h>
 #include <asm/arch/mem.h>
 #include <asm/arch/clocks_omap3.h>
+#include <linux/linkage.h>
 
 _TEXT_BASE:
 	.word	CONFIG_SYS_TEXT_BASE	/* sdram load addr from config.mk */
 
 #ifdef CONFIG_SPL_BUILD
-.global save_boot_params
-save_boot_params:
+ENTRY(save_boot_params)
 	ldr	r4, =omap3_boot_device
 	ldr	r5, [r0, #0x4]
 	and	r5, r5, #0xff
 	str	r5, [r4]
 	bx	lr
+ENDPROC(save_boot_params)
 #endif
 
-.global omap3_gp_romcode_call
-omap3_gp_romcode_call:
+ENTRY(omap3_gp_romcode_call)
 	PUSH {r4-r12, lr} @ Save all registers from ROM code!
 	MOV r12, r0	@ Copy the Service ID in R12
 	MOV r0, r1	@ Copy parameter to R0
@@ -55,6 +55,7 @@ omap3_gp_romcode_call:
 	.word	0xe1600070	@ SMC #0 to enter monitor - hand assembled
 				@ because we use -march=armv5
 	POP {r4-r12, pc}
+ENDPROC(omap3_gp_romcode_call)
 
 /*
  * Funtion for making PPA HAL API calls in secure devices
@@ -62,8 +63,7 @@ omap3_gp_romcode_call:
  *	R0 - Service ID
  *	R1 - paramer list
  */
-.global do_omap3_emu_romcode_call
-do_omap3_emu_romcode_call:
+ENTRY(do_omap3_emu_romcode_call)
 	PUSH {r4-r12, lr} @ Save all registers from ROM code!
 	MOV r12, r0	@ Copy the Secure Service ID in R12
 	MOV r3, r1	@ Copy the pointer to va_list in R3
@@ -76,14 +76,14 @@ do_omap3_emu_romcode_call:
 	.word	0xe1600071	@ SMC #1 to call PPA service - hand assembled
 				@ because we use -march=armv5
 	POP {r4-r12, pc}
+ENDPROC(do_omap3_emu_romcode_call)
 
 #if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_NAND_BOOT)
 /**************************************************************************
  * cpy_clk_code: relocates clock code into SRAM where its safer to execute
  * R1 = SRAM destination address.
  *************************************************************************/
-.global cpy_clk_code
- cpy_clk_code:
+ENTRY(cpy_clk_code)
 	/* Copy DPLL code into SRAM */
 	adr	r0, go_to_speed		/* get addr of clock setting code */
 	mov	r2, #384		/* r2 size to copy (div by 32 bytes) */
@@ -95,6 +95,7 @@ next2:
 	cmp	r0, r2			/* until source end address [r2] */
 	bne	next2
 	mov	pc, lr			/* back to caller */
+ENDPROC(cpy_clk_code)
 
 /* ***************************************************************************
  *  go_to_speed: -Moves to bypass, -Commits clock dividers, -puts dpll at speed
@@ -109,8 +110,7 @@ next2:
  *        L3 when its not in self refresh seems bad for it.  Normally, this
  *	  code runs from flash before SDR is init so that should be ok.
  ****************************************************************************/
-.global go_to_speed
- go_to_speed:
+ENTRY(go_to_speed)
 	stmfd sp!, {r4 - r6}
 
 	/* move into fast relock bypass */
@@ -171,6 +171,7 @@ wait2:
 	nop
 	ldmfd	sp!, {r4 - r6}
 	mov	pc, lr		/* back to caller, locked */
+ENDPROC(go_to_speed)
 
 _go_to_speed: .word go_to_speed
 
@@ -211,8 +212,7 @@ pll_div_val5:
 
 #endif
 
-.globl lowlevel_init
-lowlevel_init:
+ENTRY(lowlevel_init)
 	ldr	sp, SRAM_STACK
 	str	ip, [sp]	/* stash old link register */
 	mov	ip, lr		/* save link reg across call */
@@ -230,6 +230,7 @@ lowlevel_init:
 
 	/* back to arch calling code */
 	mov	pc, lr
+ENDPROC(lowlevel_init)
 
 	/* the literal pools origin */
 	.ltorg
@@ -480,22 +481,22 @@ per_36x_dpll_param:
 .word 26000,    432,   12,     9,      16,     9,     4,      3,      1
 .word 38400,    360,   15,     9,      16,     5,     4,      3,      1
 
-.globl get_36x_mpu_dpll_param
-get_36x_mpu_dpll_param:
+ENTRY(get_36x_mpu_dpll_param)
 	adr	r0, mpu_36x_dpll_param
 	mov	pc, lr
+ENDPROC(get_36x_mpu_dpll_param)
 
-.globl get_36x_iva_dpll_param
-get_36x_iva_dpll_param:
+ENTRY(get_36x_iva_dpll_param)
 	adr	r0, iva_36x_dpll_param
 	mov	pc, lr
+ENDPROC(get_36x_iva_dpll_param)
 
-.globl get_36x_core_dpll_param
-get_36x_core_dpll_param:
+ENTRY(get_36x_core_dpll_param)
 	adr	r0, core_36x_dpll_param
 	mov	pc, lr
+ENDPROC(get_36x_core_dpll_param)
 
-.globl get_36x_per_dpll_param
-get_36x_per_dpll_param:
+ENTRY(get_36x_per_dpll_param)
 	adr	r0, per_36x_dpll_param
 	mov	pc, lr
+ENDPROC(get_36x_per_dpll_param)
diff --git a/arch/arm/cpu/armv7/s5pc1xx/cache.S b/arch/arm/cpu/armv7/s5pc1xx/cache.S
index c7d6221..000192c 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/cache.S
+++ b/arch/arm/cpu/armv7/s5pc1xx/cache.S
@@ -25,20 +25,22 @@
 
 .align 5
 
+#include <linux/linkage.h>
+
 #ifndef CONFIG_SYS_L2CACHE_OFF
-.global v7_outer_cache_enable
-v7_outer_cache_enable:
+ENTRY(v7_outer_cache_enable)
 	push	{r0, r1, r2, lr}
 	mrc	15, 0, r3, cr1, cr0, 1
 	orr	r3, r3, #2
 	mcr	15, 0, r3, cr1, cr0, 1
 	pop	{r1, r2, r3, pc}
+ENDPROC(v7_outer_cache_enable)
 
-.global v7_outer_cache_disable
-v7_outer_cache_disable:
+ENTRY(v7_outer_cache_disable)
 	push	{r0, r1, r2, lr}
 	mrc	15, 0, r3, cr1, cr0, 1
 	bic	r3, r3, #2
 	mcr	15, 0, r3, cr1, cr0, 1
 	pop	{r1, r2, r3, pc}
+ENDPROC(v7_outer_cache_disable)
 #endif
diff --git a/arch/arm/cpu/armv7/s5pc1xx/reset.S b/arch/arm/cpu/armv7/s5pc1xx/reset.S
index 70fa146..c7a41d0 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/reset.S
+++ b/arch/arm/cpu/armv7/s5pc1xx/reset.S
@@ -22,12 +22,12 @@
  */
 
 #include <asm/arch/cpu.h>
+#include <linux/linkage.h>
 
 #define S5PC100_SWRESET			0xE0200000
 #define S5PC110_SWRESET			0xE0102000
 
-.globl reset_cpu
-reset_cpu:
+ENTRY(reset_cpu)
 	ldr	r1, =S5PC100_PRO_ID
 	ldr	r2, [r1]
 	ldr	r4, =0x00010000
@@ -45,3 +45,4 @@ reset_cpu:
 	str	r2, [r1]
 _loop_forever:
 	b	_loop_forever
+ENDPROC(reset_cpu)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index ef08a55..261835b 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -33,6 +33,7 @@
 #include <config.h>
 #include <version.h>
 #include <asm/system.h>
+#include <linux/linkage.h>
 
 .globl _start
 _start: b	reset
@@ -172,8 +173,7 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-	.globl	relocate_code
-relocate_code:
+ENTRY(relocate_code)
 	mov	r4, r0	/* save addr_sp */
 	mov	r5, r1	/* save addr of gd */
 	mov	r6, r2	/* save addr of destination */
@@ -289,6 +289,7 @@ jump_2_ram:
 
 _board_init_r_ofs:
 	.word board_init_r - _start
+ENDPROC(relocate_code)
 
 /*************************************************************************
  *
@@ -298,8 +299,7 @@ _board_init_r_ofs:
  * CONFIG_SYS_ICACHE_OFF is defined.
  *
  *************************************************************************/
-.globl cpu_init_cp15
-cpu_init_cp15:
+ENTRY(cpu_init_cp15)
 	/*
 	 * Invalidate L1 I/D
 	 */
@@ -325,7 +325,7 @@ cpu_init_cp15:
 #endif
 	mcr	p15, 0, r0, c1, c0, 0
 	mov	pc, lr			@ back to my caller
-
+ENDPROC(cpu_init_cp15)
 
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 /*************************************************************************
@@ -336,7 +336,7 @@ cpu_init_cp15:
  * setup memory timing
  *
  *************************************************************************/
-cpu_init_crit:
+ENTRY(cpu_init_crit)
 	/*
 	 * Jump to board specific initialization...
 	 * The Mask ROM will have already initialized
@@ -347,6 +347,7 @@ cpu_init_crit:
 	bl	lowlevel_init		@ go setup pll,mux,memory
 	mov	lr, ip			@ restore link
 	mov	pc, lr			@ back to my caller
+ENDPROC(cpu_init_crit)
 #endif
 
 #ifndef CONFIG_SPL_BUILD
diff --git a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
index 6b86647..d117f23 100644
--- a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
@@ -25,10 +25,10 @@
 
 #include <config.h>
 #include <version.h>
+#include <linux/linkage.h>
 
 	.align	5
-.global reset_cpu
-reset_cpu:
+ENTRY(reset_cpu)
 	ldr	r1, rstctl			@ get addr for global reset
 						@ reg
 	ldr	r3, [r1]
@@ -39,3 +39,4 @@ _loop_forever:
 	b	_loop_forever
 rstctl:
 	.word	PRM_RSTCTRL
+ENDPROC(reset_cpu)
diff --git a/arch/arm/cpu/armv7/u8500/lowlevel.S b/arch/arm/cpu/armv7/u8500/lowlevel.S
index cffdfd1..289cfb0 100644
--- a/arch/arm/cpu/armv7/u8500/lowlevel.S
+++ b/arch/arm/cpu/armv7/u8500/lowlevel.S
@@ -20,16 +20,17 @@
  */
 
 #include <config.h>
+#include <linux/linkage.h>
 
-.globl lowlevel_init
-lowlevel_init:
+ENTRY(lowlevel_init)
 	mov	pc, lr
+ENDPROC(lowlevel_init)
 
 	.align	5
-.globl reset_cpu
-reset_cpu:
+ENTRY(reset_cpu)
 	ldr r0, =CFG_PRCMU_BASE
 	ldr r1, =0x1
 	str r1, [r0, #0x228]
 _loop_forever:
 	b	_loop_forever
+ENDPROC(reset_cpu)
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 3/6] ARM: enable Thumb build
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (22 preceding siblings ...)
  2012-03-08 17:10 ` [U-Boot] [PATCH 2/6] armv7: add appropriate headers for assembly functions Aneesh V
@ 2012-03-08 17:10 ` Aneesh V
  2012-03-08 17:10 ` [U-Boot] [PATCH 4/6] armv7: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
                   ` (2 subsequent siblings)
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-03-08 17:10 UTC (permalink / raw)
  To: u-boot

Enable Thumb build and ARM-Thumb interworking based on the new
config flag CONFIG_SYS_THUMB_BUILD

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Changes in v4:
- Use ':=' instead of '+=' when computed make variables
  are involved

Changes in v3:
- None

Changes from V1 to V2:
- None

Changes from RFC to V1:
- Fixed review comments from Tom Rini <trini@ti.com>
---
 README             |    8 ++++++++
 arch/arm/config.mk |   22 +++++++++++++++-------
 2 files changed, 23 insertions(+), 7 deletions(-)

diff --git a/README b/README
index 8964672..bdb428e 100644
--- a/README
+++ b/README
@@ -426,6 +426,14 @@ The following options need to be configured:
 		Select high exception vectors of the ARM core, e.g., do not
 		clear the V bit of the c1 register of CP15.
 
+		CONFIG_SYS_THUMB_BUILD
+
+		Use this flag to build U-Boot using the Thumb instruction
+		set for ARM architectures. Thumb instruction set provides
+		better code density. For ARM architectures that support
+		Thumb2 this flag will result in Thumb2 code generated by
+		GCC.
+
 - Linux Kernel Interface:
 		CONFIG_CLOCKS_IN_MHZ
 
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 45f9dca..d4fa1f8 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -33,25 +33,33 @@ endif
 
 PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
 
-# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
-PF_CPPFLAGS_ARM := $(call cc-option,-marm,)
+# Choose between ARM/Thumb instruction sets
+ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
+PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
+			$(call cc-option,-marm,)\
+			$(call cc-option,-mno-thumb-interwork,)\
+		)
+else
+PF_CPPFLAGS_ARM := $(call cc-option,-marm,) \
+		$(call cc-option,-mno-thumb-interwork,)
+endif
 
 # Try if EABI is supported, else fall back to old API,
 # i. e. for example:
 # - with ELDK 4.2 (EABI supported), use:
-#	-mabi=aapcs-linux -mno-thumb-interwork
+#	-mabi=aapcs-linux
 # - with ELDK 4.1 (gcc 4.x, no EABI), use:
-#	-mabi=apcs-gnu -mno-thumb-interwork
+#	-mabi=apcs-gnu
 # - with ELDK 3.1 (gcc 3.x), use:
-#	-mapcs-32 -mno-thumb-interwork
+#	-mapcs-32
 PF_CPPFLAGS_ABI := $(call cc-option,\
-			-mabi=aapcs-linux -mno-thumb-interwork,\
+			-mabi=aapcs-linux,\
 			$(call cc-option,\
 				-mapcs-32,\
 				$(call cc-option,\
 					-mabi=apcs-gnu,\
 				)\
-			) $(call cc-option,-mno-thumb-interwork,)\
+			)\
 		)
 PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARM) $(PF_CPPFLAGS_ABI)
 
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 4/6] armv7: Use -march=armv7-a and thereby enable Thumb-2
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (23 preceding siblings ...)
  2012-03-08 17:10 ` [U-Boot] [PATCH 3/6] ARM: enable Thumb build Aneesh V
@ 2012-03-08 17:10 ` Aneesh V
  2012-03-08 17:10 ` [U-Boot] [PATCH 5/6] omap4+: Avoid using __attribute__ ((__packed__)) Aneesh V
  2012-03-08 17:10 ` [U-Boot] [PATCH 6/6] OMAP4: enable Thumb build Aneesh V
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-03-08 17:10 UTC (permalink / raw)
  To: u-boot

Enable -march=armv7-a for armv7 platforms if the tool-chain
supports it. This in turn results in Thumb-2 code generated
for these platforms if CONFIG_SYS_THUMB_BUILD is enabled.

Signed-off-by: Aneesh V <aneesh@ti.com>
---
I believe armv7-a is fine for all the SoCs except Tegra2
and I see that Tegra2 is already making the necessary
exception in .../armv7/tegra2/config.mk

Let me know if any other SoC has a problem with armv7-a

Changes in V4:
- Replaced "+=" with ":=" for make variable that involves
  computation

Changes in V3:
- None

Changes from V1 to V2:
- None

Changes from RFC to V1:
- Enabled armv7-a from armv7/config.mk instead of from
  omap config.mk files
---
 arch/arm/cpu/armv7/config.mk |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk
index 83ddf10..6d4b13c 100644
--- a/arch/arm/cpu/armv7/config.mk
+++ b/arch/arm/cpu/armv7/config.mk
@@ -22,8 +22,11 @@
 #
 PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
 
-# Make ARMv5 to allow more compilers to work, even though its v7a.
-PLATFORM_CPPFLAGS += -march=armv5
+# If armv7-a is not supported by GCC fall-back to armv5, which is
+# supported by more tool-chains
+PF_CPPFLAGS_ARMV7 := $(call cc-option, -march=armv7-a, -march=armv5)
+PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV7)
+
 # =========================================================================
 #
 # Supply options according to compiler version
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 5/6] omap4+: Avoid using __attribute__ ((__packed__))
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (24 preceding siblings ...)
  2012-03-08 17:10 ` [U-Boot] [PATCH 4/6] armv7: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
@ 2012-03-08 17:10 ` Aneesh V
  2012-03-08 17:10 ` [U-Boot] [PATCH 6/6] OMAP4: enable Thumb build Aneesh V
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-03-08 17:10 UTC (permalink / raw)
  To: u-boot

Avoid using __attribute__ ((__packed__)) unless it's
absolutely necessary. "packed" will remove alignment
requirements for the respective objects and may cause
alignment issues unless alignment is also enforced
using a pragma.

Here, these packed attributes were causing alignment
faults in Thumb build.

Signed-off-by: Aneesh V <aneesh@ti.com>
---

Changes in v4:
- None

Changes in v3:
- Newly added
---
 arch/arm/include/asm/arch-omap4/mux_omap4.h |    2 +-
 arch/arm/include/asm/arch-omap5/mux_omap5.h |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-omap4/mux_omap4.h b/arch/arm/include/asm/arch-omap4/mux_omap4.h
index 30bfad7..4de7c70 100644
--- a/arch/arm/include/asm/arch-omap4/mux_omap4.h
+++ b/arch/arm/include/asm/arch-omap4/mux_omap4.h
@@ -34,7 +34,7 @@ struct pad_conf_entry {
 
 	u16 val;
 
-} __attribute__ ((packed));
+};
 
 #ifdef CONFIG_OFF_PADCONF
 #define OFF_PD          (1 << 12)
diff --git a/arch/arm/include/asm/arch-omap5/mux_omap5.h b/arch/arm/include/asm/arch-omap5/mux_omap5.h
index b8c2185..af6874f 100644
--- a/arch/arm/include/asm/arch-omap5/mux_omap5.h
+++ b/arch/arm/include/asm/arch-omap5/mux_omap5.h
@@ -34,7 +34,7 @@ struct pad_conf_entry {
 
 	u16 val;
 
-} __attribute__ ((__packed__));
+};
 
 #ifdef CONFIG_OFF_PADCONF
 #define OFF_PD          (1 << 12)
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

* [U-Boot] [PATCH 6/6] OMAP4: enable Thumb build
  2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
                   ` (25 preceding siblings ...)
  2012-03-08 17:10 ` [U-Boot] [PATCH 5/6] omap4+: Avoid using __attribute__ ((__packed__)) Aneesh V
@ 2012-03-08 17:10 ` Aneesh V
  26 siblings, 0 replies; 83+ messages in thread
From: Aneesh V @ 2012-03-08 17:10 UTC (permalink / raw)
  To: u-boot

Signed-off-by: Aneesh V <aneesh@ti.com>
---
Changes in v4:
- None

Changes in v3:
- None

Changes from V1 to V2:
- None

Changes from RFC to V1:
- None
---
 include/configs/omap4_common.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
index a989721..01b4d6c 100644
--- a/include/configs/omap4_common.h
+++ b/include/configs/omap4_common.h
@@ -287,4 +287,6 @@
 
 #define CONFIG_SYS_ENABLE_PADS_ALL
 
+#define CONFIG_SYS_THUMB_BUILD
+
 #endif /* __CONFIG_OMAP4_COMMON_H */
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 83+ messages in thread

end of thread, other threads:[~2012-03-08 17:14 UTC | newest]

Thread overview: 83+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-02-06 11:37 [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
2012-02-06 11:37 ` [U-Boot] [RFC PATCH 1/4] ARM: enable Thumb build Aneesh V
2012-02-06 18:45   ` Tom Rini
2012-02-07  7:43     ` Aneesh V
2012-02-06 11:37 ` [U-Boot] [RFC PATCH 2/4] OMAP3+: fix issues with " Aneesh V
2012-02-06 21:06   ` Albert ARIBAUD
2012-02-07  7:49     ` Aneesh V
2012-02-09  8:58     ` Aneesh V
2012-02-06 11:37 ` [U-Boot] [RFC PATCH 3/4] OMAP3+: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
2012-02-06 11:37 ` [U-Boot] [RFC PATCH 4/4] OMAP4: enable Thumb build Aneesh V
2012-02-06 12:26 ` [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms Aneesh V
2012-02-06 13:22   ` Aneesh V
2012-02-15 13:57 ` [U-Boot] [PATCH " Aneesh V
2012-02-15 13:57 ` [U-Boot] [PATCH 1/4] ARM: enable Thumb build Aneesh V
2012-02-15 13:57 ` [U-Boot] [PATCH 2/4] arm: add %function attribute to assembly functions Aneesh V
2012-02-17 11:09   ` Aneesh V
2012-02-18 10:13     ` Albert ARIBAUD
2012-02-18 13:24       ` Aneesh V
2012-02-18 15:04         ` Albert ARIBAUD
2012-02-18 16:34         ` Aneesh V
2012-02-18 16:48           ` Albert ARIBAUD
2012-02-20 16:08             ` Aneesh V
2012-02-23 11:06               ` Aneesh V
2012-02-17 17:13   ` Mike Frysinger
2012-02-18 11:12     ` Aneesh V
2012-02-18 11:34       ` Albert ARIBAUD
2012-02-18 22:03   ` Simon Glass
2012-02-19  7:15     ` Mike Frysinger
2012-02-20 20:07       ` Tom Rini
2012-02-20 21:53         ` Simon Glass
2012-02-21  4:19           ` Mike Frysinger
2012-02-21  4:44             ` Simon Glass
2012-02-21 14:33             ` Tom Rini
2012-02-21 15:42               ` Mike Frysinger
2012-02-21 18:03                 ` Aneesh V
2012-02-21 19:28                   ` Mike Frysinger
2012-02-21 20:01                     ` Aneesh V
2012-02-21  4:18         ` Mike Frysinger
2012-02-15 13:57 ` [U-Boot] [PATCH 3/4] armv7: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
2012-02-15 13:57 ` [U-Boot] [PATCH 4/4] OMAP4: enable Thumb build Aneesh V
2012-02-23 13:39 ` [U-Boot] [PATCH v2 1/5] arm: adapt asm/linkage.h from Linux Aneesh V
2012-02-23 14:01   ` Aneesh V
2012-02-23 13:39 ` [U-Boot] [PATCH v2 2/5] armv7: add appropriate headers for assembly functions Aneesh V
2012-02-23 13:39 ` [U-Boot] [PATCH v2 3/5] ARM: enable Thumb build Aneesh V
2012-02-23 14:57   ` Mike Frysinger
2012-02-23 17:28     ` Aneesh V
2012-02-23 17:34       ` Tom Rini
2012-02-23 17:49         ` Aneesh V
2012-02-23 17:51           ` Tom Rini
2012-02-23 18:09             ` Aneesh V
2012-02-23 18:13               ` Aneesh V
2012-02-23 18:05           ` Mike Frysinger
2012-02-23 18:04       ` Mike Frysinger
2012-02-23 18:12         ` Aneesh V
2012-02-23 13:39 ` [U-Boot] [PATCH v2 4/5] armv7: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
2012-02-23 13:39 ` [U-Boot] [PATCH v2 5/5] OMAP4: enable Thumb build Aneesh V
2012-02-23 14:06 ` [U-Boot] [PATCH v3 1/6] arm: adapt asm/linkage.h from Linux Aneesh V
2012-02-23 14:59   ` Mike Frysinger
2012-02-23 15:24     ` Tom Rini
2012-02-23 16:57       ` Mike Frysinger
2012-02-23 17:40     ` Aneesh V
2012-02-23 23:52       ` Mike Frysinger
2012-02-24 10:30         ` Aneesh V
2012-02-23 14:06 ` [U-Boot] [PATCH v3 2/6] armv7: add appropriate headers for assembly functions Aneesh V
2012-02-23 14:59   ` Mike Frysinger
2012-02-23 14:06 ` [U-Boot] [PATCH v3 3/6] ARM: enable Thumb build Aneesh V
2012-02-23 14:06 ` [U-Boot] [PATCH v3 4/6] armv7: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
2012-02-23 15:05   ` Mike Frysinger
2012-02-23 17:50     ` Aneesh V
2012-02-23 14:06 ` [U-Boot] [PATCH v3 5/6] omap4+: Avoid using __attribute__ ((__packed__)) Aneesh V
2012-02-23 14:21   ` Tom Rini
2012-02-23 14:56     ` Aneesh V
2012-02-23 15:03       ` Mike Frysinger
2012-02-23 15:03     ` Mike Frysinger
2012-02-23 15:42       ` Aneesh V
2012-02-23 14:06 ` [U-Boot] [PATCH v3 6/6] OMAP4: enable Thumb build Aneesh V
2012-03-08 17:10 ` [U-Boot] [PATCH 1/6] arm: adapt asm/linkage.h from Linux Aneesh V
2012-03-08 17:14   ` Aneesh V
2012-03-08 17:10 ` [U-Boot] [PATCH 2/6] armv7: add appropriate headers for assembly functions Aneesh V
2012-03-08 17:10 ` [U-Boot] [PATCH 3/6] ARM: enable Thumb build Aneesh V
2012-03-08 17:10 ` [U-Boot] [PATCH 4/6] armv7: Use -march=armv7-a and thereby enable Thumb-2 Aneesh V
2012-03-08 17:10 ` [U-Boot] [PATCH 5/6] omap4+: Avoid using __attribute__ ((__packed__)) Aneesh V
2012-03-08 17:10 ` [U-Boot] [PATCH 6/6] OMAP4: enable Thumb build Aneesh V

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