[PATCH 0/3] Framebuffer related fixes for Exynos / Origen

[PATCH 0/3] Framebuffer related fixes for Exynos / Origen

[Tushar Behera]

Following patchset is required to add framebuffer support on Origen.

The patches are based on following commit on Kukjin's for-next branch.

a188e1e "Merge branch 'next-samsung-devel' into for-next"

Tushar Behera (3):
  ARM: EXYNOS: Increase DMA pool allocator size for framebuffer
	- Required to allocate the framebuffer successfully

  ARM: EXYNOS: Add clkdev lookup entry for lcd clock
	- Required for framebuffer operation

  ARM: EXYNOS: Invert VCLK polarity for framebuffer on Origen board
	- Required to remove glitch in LCD display

 arch/arm/mach-exynos/clock.c       |   14 +++++++++-----
 arch/arm/mach-exynos/cpu.c         |    7 +++++++
 arch/arm/mach-exynos/mach-origen.c |    3 ++-
 3 files changed, 18 insertions(+), 6 deletions(-)

-- 
1.7.4.1

[PATCH 1/3] ARM: EXYNOS: Increase DMA pool allocator size for framebuffer

[Tushar Behera]

Some of the boards under mach-exynos initialize frame-buffers
for which the memory requirement is more than 2MB, hence the
default dma pool allocation size of 2MB is not sufficient.

The consistent dma size is hence increased to successfully
allocate memory for those boards.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
---
 arch/arm/mach-exynos/cpu.c |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c
index 8e09f34..d02ed16 100644
--- a/arch/arm/mach-exynos/cpu.c
+++ b/arch/arm/mach-exynos/cpu.c
@@ -12,6 +12,7 @@
 #include <linux/sysdev.h>
 #include <linux/of.h>
 #include <linux/of_irq.h>
+#include <linux/dma-mapping.h>
 
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
@@ -188,6 +189,12 @@ void __init exynos4_map_io(void)
 	iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
 	iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
 
+	/*
+	 * Default allocation size for ARM = 2MB
+	 * Memory required for FB = (~ 2.4 MB) 4MB
+	 */
+	init_consistent_dma_size(SZ_2M + SZ_4M);
+
 	if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
 		iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
 	else
-- 
1.7.4.1

[PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock

[Tushar Behera]

The framebuffer driver needs the clock named 'lcd' as its bus
clock but the equivalent clock on Exynos4 is named as 'fimd'.
Hence, create a clkdev lookup entry with the name 'lcd' that
references the 'fimd' clock.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
---
 arch/arm/mach-exynos/clock.c |   14 +++++++++-----
 1 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index 5d8d483..607ec28 100644
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -489,11 +489,6 @@ static struct clk init_clocks_off[] = {
 		.enable		= exynos4_clk_ip_cam_ctrl,
 		.ctrlbit	= (1 << 3),
 	}, {
-		.name		= "fimd",
-		.devname	= "exynos4-fb.0",
-		.enable		= exynos4_clk_ip_lcd0_ctrl,
-		.ctrlbit	= (1 << 0),
-	}, {
 		.name		= "hsmmc",
 		.devname	= "s3c-sdhci.0",
 		.parent		= &clk_aclk_133.clk,
@@ -782,6 +777,13 @@ static struct clk clk_pdma1 = {
 	.ctrlbit	= (1 << 1),
 };
 
+static struct clk clk_fimd0 = {
+	.name		= "fimd",
+	.devname	= "exynos4-fb.0",
+	.enable		= exynos4_clk_ip_lcd0_ctrl,
+	.ctrlbit	= (1 << 0),
+};
+
 struct clk *clkset_group_list[] = {
 	[0] = &clk_ext_xtal_mux,
 	[1] = &clk_xusbxti,
@@ -1294,6 +1296,7 @@ static struct clksrc_clk *sysclks[] = {
 static struct clk *clk_cdev[] = {
 	&clk_pdma0,
 	&clk_pdma1,
+	&clk_fimd0,
 };
 
 static struct clksrc_clk *clksrc_cdev[] = {
@@ -1318,6 +1321,7 @@ static struct clk_lookup exynos4_clk_lookup[] = {
 	CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
 	CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
 	CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
+	CLKDEV_INIT("exynos4-fb.0", "lcd", &clk_fimd0),
 };
 
 static int xtal_rate;
-- 
1.7.4.1

[PATCH 3/3] ARM: EXYNOS: Invert VCLK polarity for framebuffer on Origen board

[Tushar Behera]

Framebuffer driver needs to fetch the video data during the rising
edge of the VCLK. Otherwise, there are some glitches in the LCD
display.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
---
 arch/arm/mach-exynos/mach-origen.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index f56d027..38f0556 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -588,7 +588,8 @@ static struct s3c_fb_pd_win origen_fb_win0 = {
 static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
 	.win[0]		= &origen_fb_win0,
 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
-	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
+				VIDCON1_INV_VCLK,
 	.setup_gpio	= exynos4_fimd0_gpio_setup_24bpp,
 };
 
-- 
1.7.4.1

RE: [PATCH 3/3] ARM: EXYNOS: Invert VCLK polarity for framebuffer on Origen board

[Kukjin Kim]

Tushar Behera wrote:
> 
> Framebuffer driver needs to fetch the video data during the rising
> edge of the VCLK. Otherwise, there are some glitches in the LCD
> display.
> 
> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
> ---
>  arch/arm/mach-exynos/mach-origen.c |    3 ++-
>  1 files changed, 2 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-
> exynos/mach-origen.c
> index f56d027..38f0556 100644
> --- a/arch/arm/mach-exynos/mach-origen.c
> +++ b/arch/arm/mach-exynos/mach-origen.c
> @@ -588,7 +588,8 @@ static struct s3c_fb_pd_win origen_fb_win0 = {
>  static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
>  	.win[0]		= &origen_fb_win0,
>  	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
> -	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
> +	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
> +				VIDCON1_INV_VCLK,
>  	.setup_gpio	= exynos4_fimd0_gpio_setup_24bpp,
>  };
> 
> --
> 1.7.4.1

OK, will apply this.

And I will review 1/3 and 2/3 patches soon.
Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

Re: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock

[Tushar Behera]

Hi Kukjin,

On 12/01/2011 11:20 AM, Tushar Behera wrote:
> The framebuffer driver needs the clock named 'lcd' as its bus
> clock but the equivalent clock on Exynos4 is named as 'fimd'.
> Hence, create a clkdev lookup entry with the name 'lcd' that
> references the 'fimd' clock.
> 
> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
> ---
>  arch/arm/mach-exynos/clock.c |   14 +++++++++-----
>  1 files changed, 9 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
> index 5d8d483..607ec28 100644
> --- a/arch/arm/mach-exynos/clock.c
> +++ b/arch/arm/mach-exynos/clock.c
> @@ -489,11 +489,6 @@ static struct clk init_clocks_off[] = {
>  		.enable		= exynos4_clk_ip_cam_ctrl,
>  		.ctrlbit	= (1 << 3),
>  	}, {
> -		.name		= "fimd",
> -		.devname	= "exynos4-fb.0",
> -		.enable		= exynos4_clk_ip_lcd0_ctrl,
> -		.ctrlbit	= (1 << 0),
> -	}, {
>  		.name		= "hsmmc",
>  		.devname	= "s3c-sdhci.0",
>  		.parent		= &clk_aclk_133.clk,
> @@ -782,6 +777,13 @@ static struct clk clk_pdma1 = {
>  	.ctrlbit	= (1 << 1),
>  };
>  
> +static struct clk clk_fimd0 = {
> +	.name		= "fimd",
> +	.devname	= "exynos4-fb.0",
> +	.enable		= exynos4_clk_ip_lcd0_ctrl,
> +	.ctrlbit	= (1 << 0),
> +};
> +
>  struct clk *clkset_group_list[] = {
>  	[0] = &clk_ext_xtal_mux,
>  	[1] = &clk_xusbxti,
> @@ -1294,6 +1296,7 @@ static struct clksrc_clk *sysclks[] = {
>  static struct clk *clk_cdev[] = {
>  	&clk_pdma0,
>  	&clk_pdma1,
> +	&clk_fimd0,
>  };
>  
>  static struct clksrc_clk *clksrc_cdev[] = {
> @@ -1318,6 +1321,7 @@ static struct clk_lookup exynos4_clk_lookup[] = {
>  	CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
>  	CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
>  	CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
> +	CLKDEV_INIT("exynos4-fb.0", "lcd", &clk_fimd0),
>  };
>  
>  static int xtal_rate;

Would you please review this patch and let me know your opinion? Without
this patch, frame-buffer support on EXYNOS4 is broken.

-- 
Tushar Behera

Re: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock

[Sylwester Nawrocki]

Hi Tushar,

On 12/01/2011 06:50 AM, Tushar Behera wrote:
> The framebuffer driver needs the clock named 'lcd' as its bus
> clock but the equivalent clock on Exynos4 is named as 'fimd'.
> Hence, create a clkdev lookup entry with the name 'lcd' that
> references the 'fimd' clock.
> 
> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>

Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

> ---
>  arch/arm/mach-exynos/clock.c |   14 +++++++++-----
>  1 files changed, 9 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
> index 5d8d483..607ec28 100644
> --- a/arch/arm/mach-exynos/clock.c
> +++ b/arch/arm/mach-exynos/clock.c
> @@ -489,11 +489,6 @@ static struct clk init_clocks_off[] = {
>  		.enable		= exynos4_clk_ip_cam_ctrl,
>  		.ctrlbit	= (1 << 3),
>  	}, {
> -		.name		= "fimd",
> -		.devname	= "exynos4-fb.0",
> -		.enable		= exynos4_clk_ip_lcd0_ctrl,
> -		.ctrlbit	= (1 << 0),
> -	}, {
>  		.name		= "hsmmc",
>  		.devname	= "s3c-sdhci.0",
>  		.parent		= &clk_aclk_133.clk,
> @@ -782,6 +777,13 @@ static struct clk clk_pdma1 = {
>  	.ctrlbit	= (1 << 1),
>  };
>  
> +static struct clk clk_fimd0 = {
> +	.name		= "fimd",
> +	.devname	= "exynos4-fb.0",
> +	.enable		= exynos4_clk_ip_lcd0_ctrl,
> +	.ctrlbit	= (1 << 0),
> +};
> +
>  struct clk *clkset_group_list[] = {
>  	[0] = &clk_ext_xtal_mux,
>  	[1] = &clk_xusbxti,
> @@ -1294,6 +1296,7 @@ static struct clksrc_clk *sysclks[] = {
>  static struct clk *clk_cdev[] = {
>  	&clk_pdma0,
>  	&clk_pdma1,
> +	&clk_fimd0,
>  };
>  
>  static struct clksrc_clk *clksrc_cdev[] = {
> @@ -1318,6 +1321,7 @@ static struct clk_lookup exynos4_clk_lookup[] = {
>  	CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
>  	CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
>  	CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
> +	CLKDEV_INIT("exynos4-fb.0", "lcd", &clk_fimd0),
>  };
>  
>  static int xtal_rate;

Thanks,
-- 
Sylwester Nawrocki
Samsung Poland R&D Center

RE: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock

[Jingoo Han]

Hi Tushar,

> -----Original Message-----
> From: linux-samsung-soc-owner@vger.kernel.org [mailto:linux-samsung-soc-owner@vger.kernel.org] On Behalf
> Of Tushar Behera
> Sent: Thursday, December 01, 2011 2:50 PM
> To: linux-samsung-soc@vger.kernel.org
> Cc: kgene.kim@samsung.com; linaro-dev@lists.linaro.org; patches@linaro.org
> Subject: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock
> 
> The framebuffer driver needs the clock named 'lcd' as its bus
> clock but the equivalent clock on Exynos4 is named as 'fimd'.
> Hence, create a clkdev lookup entry with the name 'lcd' that
> references the 'fimd' clock.
> 
> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>

Acked-by: Jingoo Han <jg1.han@samsung.com>

I also tested this patch with SMDKV310 board.
It works properly.

Thank you.

> ---
>  arch/arm/mach-exynos/clock.c |   14 +++++++++-----
>  1 files changed, 9 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
> index 5d8d483..607ec28 100644
> --- a/arch/arm/mach-exynos/clock.c
> +++ b/arch/arm/mach-exynos/clock.c
> @@ -489,11 +489,6 @@ static struct clk init_clocks_off[] = {
>  		.enable		= exynos4_clk_ip_cam_ctrl,
>  		.ctrlbit	= (1 << 3),
>  	}, {
> -		.name		= "fimd",
> -		.devname	= "exynos4-fb.0",
> -		.enable		= exynos4_clk_ip_lcd0_ctrl,
> -		.ctrlbit	= (1 << 0),
> -	}, {
>  		.name		= "hsmmc",
>  		.devname	= "s3c-sdhci.0",
>  		.parent		= &clk_aclk_133.clk,
> @@ -782,6 +777,13 @@ static struct clk clk_pdma1 = {
>  	.ctrlbit	= (1 << 1),
>  };
> 
> +static struct clk clk_fimd0 = {
> +	.name		= "fimd",
> +	.devname	= "exynos4-fb.0",
> +	.enable		= exynos4_clk_ip_lcd0_ctrl,
> +	.ctrlbit	= (1 << 0),
> +};
> +
>  struct clk *clkset_group_list[] = {
>  	[0] = &clk_ext_xtal_mux,
>  	[1] = &clk_xusbxti,
> @@ -1294,6 +1296,7 @@ static struct clksrc_clk *sysclks[] = {
>  static struct clk *clk_cdev[] = {
>  	&clk_pdma0,
>  	&clk_pdma1,
> +	&clk_fimd0,
>  };
> 
>  static struct clksrc_clk *clksrc_cdev[] = {
> @@ -1318,6 +1321,7 @@ static struct clk_lookup exynos4_clk_lookup[] = {
>  	CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
>  	CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
>  	CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
> +	CLKDEV_INIT("exynos4-fb.0", "lcd", &clk_fimd0),
>  };
> 
>  static int xtal_rate;
> --
> 1.7.4.1
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

RE: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock

[Kukjin Kim]

Jingoo Han wrote:
> 
> Hi Tushar,
> 

(please don't top-post)

> > -----Original Message-----
> > From: linux-samsung-soc-owner@vger.kernel.org [mailto:linux-samsung-soc-
> owner@vger.kernel.org] On Behalf
> > Of Tushar Behera
> > Sent: Thursday, December 01, 2011 2:50 PM
> > To: linux-samsung-soc@vger.kernel.org
> > Cc: kgene.kim@samsung.com; linaro-dev@lists.linaro.org;
> patches@linaro.org
> > Subject: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock
> >
> > The framebuffer driver needs the clock named 'lcd' as its bus
> > clock but the equivalent clock on Exynos4 is named as 'fimd'.
> > Hence, create a clkdev lookup entry with the name 'lcd' that
> > references the 'fimd' clock.
> >
> > Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
> 
> Acked-by: Jingoo Han <jg1.han@samsung.com>
> 

OK, I will apply this with Sylwester's 'reviewed-by' I looked at  before.

BTW, Tushar, what's the [1/3] and [3/3] in this series? If they are still
needed now, could you please re-send? Maybe I missed.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

Re: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock

[Tushar Behera]

Hi Kukjin,

On 03/01/2012 09:36 AM, Kukjin Kim wrote:
> Jingoo Han wrote:
>>
>> Hi Tushar,
>>
> 
> (please don't top-post)
> 
>>> -----Original Message-----
>>> From: linux-samsung-soc-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org [mailto:linux-samsung-soc-
>> owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org] On Behalf
>>> Of Tushar Behera
>>> Sent: Thursday, December 01, 2011 2:50 PM
>>> To: linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
>>> Cc: kgene.kim-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org; linaro-dev-cunTk1MwBs8s++Sfvej+rw@public.gmane.org;
>> patches-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
>>> Subject: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock
>>>
>>> The framebuffer driver needs the clock named 'lcd' as its bus
>>> clock but the equivalent clock on Exynos4 is named as 'fimd'.
>>> Hence, create a clkdev lookup entry with the name 'lcd' that
>>> references the 'fimd' clock.
>>>
>>> Signed-off-by: Tushar Behera <tushar.behera-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>>
>> Acked-by: Jingoo Han <jg1.han-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
>>
> 
> OK, I will apply this with Sylwester's 'reviewed-by' I looked at  before.
> 
Thanks. Do you want me rebase this patch on your latest for-next and resend?

> BTW, Tushar, what's the [1/3] and [3/3] in this series? If they are still
> needed now, could you please re-send? Maybe I missed.
> 
"[PATCH 1/3] ARM: EXYNOS: Increase DMA pool allocator size for framebuffer"
	- It should be dropped.

"[PATCH 3/3] ARM: EXYNOS: Invert VCLK polarity for framebuffer on Origen
board"
	- It has already been applied.


> Thanks.
> 
> Best regards,
> Kgene.
> --
> Kukjin Kim <kgene.kim-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>, Senior Engineer,
> SW Solution Development Team, Samsung Electronics Co., Ltd.
> 


-- 
Tushar Behera

RE: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock

[Kukjin Kim]

Tushar Behera wrote:
> 
> Hi Kukjin,
> 
Tushar, please don't top-post.

> On 03/01/2012 09:36 AM, Kukjin Kim wrote:
> > Jingoo Han wrote:
> >>
> >> Hi Tushar,
> >>
> >
> > (please don't top-post)
> >
> >>> -----Original Message-----
> >>> From: linux-samsung-soc-owner@vger.kernel.org [mailto:linux-samsung-
> soc-
> >> owner@vger.kernel.org] On Behalf
> >>> Of Tushar Behera
> >>> Sent: Thursday, December 01, 2011 2:50 PM
> >>> To: linux-samsung-soc@vger.kernel.org
> >>> Cc: kgene.kim@samsung.com; linaro-dev@lists.linaro.org;
> >> patches@linaro.org
> >>> Subject: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd
> clock
> >>>
> >>> The framebuffer driver needs the clock named 'lcd' as its bus
> >>> clock but the equivalent clock on Exynos4 is named as 'fimd'.
> >>> Hence, create a clkdev lookup entry with the name 'lcd' that
> >>> references the 'fimd' clock.
> >>>
> >>> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
> >>
> >> Acked-by: Jingoo Han <jg1.han@samsung.com>
> >>
> >
> > OK, I will apply this with Sylwester's 'reviewed-by' I looked at
before.
> >
> Thanks. Do you want me rebase this patch on your latest for-next and
> resend?
> 
Thanks but I can do it.

> > BTW, Tushar, what's the [1/3] and [3/3] in this series? If they are
> still
> > needed now, could you please re-send? Maybe I missed.
> >
> "[PATCH 1/3] ARM: EXYNOS: Increase DMA pool allocator size for
> framebuffer"
> 	- It should be dropped.
> 
> "[PATCH 3/3] ARM: EXYNOS: Invert VCLK polarity for framebuffer on Origen
> board"
> 	- It has already been applied.

OK, thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

Re: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock

[Kukjin Kim]

On 02/29/12 21:15, Kukjin Kim wrote:
> Tushar Behera wrote:

[...]

>>>> Acked-by: Jingoo Han<jg1.han@samsung.com>
>>>>
>>>
>>> OK, I will apply this with Sylwester's 'reviewed-by' I looked at
> before.
>>>
>> Thanks. Do you want me rebase this patch on your latest for-next and
>> resend?
>>
> Thanks but I can do it.
>
>>> BTW, Tushar, what's the [1/3] and [3/3] in this series? If they are
>> still
>>> needed now, could you please re-send? Maybe I missed.
>>>
>> "[PATCH 1/3] ARM: EXYNOS: Increase DMA pool allocator size for
>> framebuffer"
>> 	- It should be dropped.
>>
>> "[PATCH 3/3] ARM: EXYNOS: Invert VCLK polarity for framebuffer on Origen
>> board"
>> 	- It has already been applied.
>
> OK, thanks.

Tushar,

As a note, this will be applied on top of new cleanup-exynos-clock.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

Re: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock

[Chenglie He]

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I am doing the suspend and resume of s3cfb on exynos. the clk_on and
clk_off just failed. I think this is a related issue.

On 29 February 2012 13:45, Tushar Behera <tushar.behera-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:

> Hi Kukjin,
>
> On 12/01/2011 11:20 AM, Tushar Behera wrote:
> > The framebuffer driver needs the clock named 'lcd' as its bus
> > clock but the equivalent clock on Exynos4 is named as 'fimd'.
> > Hence, create a clkdev lookup entry with the name 'lcd' that
> > references the 'fimd' clock.
> >
> > Signed-off-by: Tushar Behera <tushar.behera-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> > ---
> >  arch/arm/mach-exynos/clock.c |   14 +++++++++-----
> >  1 files changed, 9 insertions(+), 5 deletions(-)
> >
> > diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
> > index 5d8d483..607ec28 100644
> > --- a/arch/arm/mach-exynos/clock.c
> > +++ b/arch/arm/mach-exynos/clock.c
> > @@ -489,11 +489,6 @@ static struct clk init_clocks_off[] = {
> >               .enable         = exynos4_clk_ip_cam_ctrl,
> >               .ctrlbit        = (1 << 3),
> >       }, {
> > -             .name           = "fimd",
> > -             .devname        = "exynos4-fb.0",
> > -             .enable         = exynos4_clk_ip_lcd0_ctrl,
> > -             .ctrlbit        = (1 << 0),
> > -     }, {
> >               .name           = "hsmmc",
> >               .devname        = "s3c-sdhci.0",
> >               .parent         = &clk_aclk_133.clk,
> > @@ -782,6 +777,13 @@ static struct clk clk_pdma1 = {
> >       .ctrlbit        = (1 << 1),
> >  };
> >
> > +static struct clk clk_fimd0 = {
> > +     .name           = "fimd",
> > +     .devname        = "exynos4-fb.0",
> > +     .enable         = exynos4_clk_ip_lcd0_ctrl,
> > +     .ctrlbit        = (1 << 0),
> > +};
> > +
> >  struct clk *clkset_group_list[] = {
> >       [0] = &clk_ext_xtal_mux,
> >       [1] = &clk_xusbxti,
> > @@ -1294,6 +1296,7 @@ static struct clksrc_clk *sysclks[] = {
> >  static struct clk *clk_cdev[] = {
> >       &clk_pdma0,
> >       &clk_pdma1,
> > +     &clk_fimd0,
> >  };
> >
> >  static struct clksrc_clk *clksrc_cdev[] = {
> > @@ -1318,6 +1321,7 @@ static struct clk_lookup exynos4_clk_lookup[] = {
> >       CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
> >       CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
> >       CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
> > +     CLKDEV_INIT("exynos4-fb.0", "lcd", &clk_fimd0),
> >  };
> >
> >  static int xtal_rate;
>
> Would you please review this patch and let me know your opinion? Without
> this patch, frame-buffer support on EXYNOS4 is broken.
>
> --
> Tushar Behera
>
> _______________________________________________
> linaro-dev mailing list
> linaro-dev-cunTk1MwBs8s++Sfvej+rw@public.gmane.org
> http://lists.linaro.org/mailman/listinfo/linaro-dev
>

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Re: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock

[Tushar Behera]

On 03/10/2012 07:52 PM, Chenglie He wrote:
> I am doing the suspend and resume of s3cfb on exynos. the clk_on and
> clk_off just failed. I think this is a related issue.
> 
Without this patch, the probe for s3cfb driver itself fails - hence what
you are seeing must be different.

> On 29 February 2012 13:45, Tushar Behera <tushar.behera@linaro.org> wrote:
> 
>> Hi Kukjin,
>>
>> On 12/01/2011 11:20 AM, Tushar Behera wrote:
>>> The framebuffer driver needs the clock named 'lcd' as its bus
>>> clock but the equivalent clock on Exynos4 is named as 'fimd'.
>>> Hence, create a clkdev lookup entry with the name 'lcd' that
>>> references the 'fimd' clock.
>>>
>>> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
>>> ---
>>>  arch/arm/mach-exynos/clock.c |   14 +++++++++-----
>>>  1 files changed, 9 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
>>> index 5d8d483..607ec28 100644
>>> --- a/arch/arm/mach-exynos/clock.c
>>> +++ b/arch/arm/mach-exynos/clock.c
>>> @@ -489,11 +489,6 @@ static struct clk init_clocks_off[] = {
>>>               .enable         = exynos4_clk_ip_cam_ctrl,
>>>               .ctrlbit        = (1 << 3),
>>>       }, {
>>> -             .name           = "fimd",
>>> -             .devname        = "exynos4-fb.0",
>>> -             .enable         = exynos4_clk_ip_lcd0_ctrl,
>>> -             .ctrlbit        = (1 << 0),
>>> -     }, {
>>>               .name           = "hsmmc",
>>>               .devname        = "s3c-sdhci.0",
>>>               .parent         = &clk_aclk_133.clk,
>>> @@ -782,6 +777,13 @@ static struct clk clk_pdma1 = {
>>>       .ctrlbit        = (1 << 1),
>>>  };
>>>
>>> +static struct clk clk_fimd0 = {
>>> +     .name           = "fimd",
>>> +     .devname        = "exynos4-fb.0",
>>> +     .enable         = exynos4_clk_ip_lcd0_ctrl,
>>> +     .ctrlbit        = (1 << 0),
>>> +};
>>> +
>>>  struct clk *clkset_group_list[] = {
>>>       [0] = &clk_ext_xtal_mux,
>>>       [1] = &clk_xusbxti,
>>> @@ -1294,6 +1296,7 @@ static struct clksrc_clk *sysclks[] = {
>>>  static struct clk *clk_cdev[] = {
>>>       &clk_pdma0,
>>>       &clk_pdma1,
>>> +     &clk_fimd0,
>>>  };
>>>
>>>  static struct clksrc_clk *clksrc_cdev[] = {
>>> @@ -1318,6 +1321,7 @@ static struct clk_lookup exynos4_clk_lookup[] = {
>>>       CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
>>>       CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
>>>       CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
>>> +     CLKDEV_INIT("exynos4-fb.0", "lcd", &clk_fimd0),
>>>  };
>>>
>>>  static int xtal_rate;
>>
>> Would you please review this patch and let me know your opinion? Without
>> this patch, frame-buffer support on EXYNOS4 is broken.
>>
>> --
>> Tushar Behera
>>
>> _______________________________________________
>> linaro-dev mailing list
>> linaro-dev@lists.linaro.org
>> http://lists.linaro.org/mailman/listinfo/linaro-dev
>>
> 


-- 
Tushar Behera