[U-Boot] [PATCH V2 0/3] i.MX6: Add preliminary cache support

[U-Boot] [PATCH V2 0/3] i.MX6: Add preliminary cache support

[Eric Nelson]

This series of patches defines the prerequisites for cache support on i.MX6
to allow further driver development to occur.

It does not enable the use of the data cache by default. To enable
data cache, comment out this line in mx6qsabrelite.h or mx6qarm2.h:

#define CONFIG_SYS_DCACHE_OFF

V2 of this patch set removes the ethernet driver (fec_mxc) from the
patch set because the changes in that driver require additional 
attention.

Eric Nelson (3):
  i.MX6: define CACHELINE_SIZE
  i.MX6: implement enable_caches()
  i.MX6: mx6qsabrelite: add cache commands if cache is enabled

 arch/arm/cpu/armv7/mx6/soc.c             |    8 ++++++++
 arch/arm/include/asm/arch-mx6/imx-regs.h |    2 ++
 include/configs/mx6qarm2.h               |    2 ++
 include/configs/mx6qsabrelite.h          |    6 ++++++
 4 files changed, 18 insertions(+), 0 deletions(-)

-- 
1.7.9

[U-Boot] [PATCH V2 1/3] i.MX6: define CACHELINE_SIZE

[Eric Nelson]

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>

---
 arch/arm/include/asm/arch-mx6/imx-regs.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 6a200bb..3e5c4c2 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -19,6 +19,8 @@
 #ifndef __ASM_ARCH_MX6_IMX_REGS_H__
 #define __ASM_ARCH_MX6_IMX_REGS_H__
 
+#define CONFIG_SYS_CACHELINE_SIZE	32
+
 #define ROMCP_ARB_BASE_ADDR             0x00000000
 #define ROMCP_ARB_END_ADDR              0x000FFFFF
 #define CAAM_ARB_BASE_ADDR              0x00100000
-- 
1.7.9

[U-Boot] [PATCH V2 2/3] i.MX6: implement enable_caches()

[Eric Nelson]

	disabled by default until drivers are fixed

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
---
 arch/arm/cpu/armv7/mx6/soc.c    |    8 ++++++++
 include/configs/mx6qarm2.h      |    2 ++
 include/configs/mx6qsabrelite.h |    2 ++
 3 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 2ac74b5..eb418eb 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -79,6 +79,14 @@ int arch_cpu_init(void)
 }
 #endif
 
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+	/* Enable D-cache. I-cache is already enabled in start.S */
+	dcache_enable();
+}
+#endif
+
 #if defined(CONFIG_FEC_MXC)
 void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
 {
diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h
index 0962d3c..e83aec6 100644
--- a/include/configs/mx6qarm2.h
+++ b/include/configs/mx6qarm2.h
@@ -169,4 +169,6 @@
 
 #define CONFIG_OF_LIBFDT
 
+#define CONFIG_SYS_DCACHE_OFF
+
 #endif				/* __CONFIG_H */
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
index 8bc8a83..d3b31fe 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -212,4 +212,6 @@
 
 #define CONFIG_OF_LIBFDT
 
+#define CONFIG_SYS_DCACHE_OFF
+
 #endif                         /* __CONFIG_H */
-- 
1.7.9

[U-Boot] [PATCH V2 3/3] i.MX6: mx6qsabrelite: add cache commands if cache is enabled

[Eric Nelson]

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
---
 include/configs/mx6qsabrelite.h |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
index d3b31fe..c851559 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -214,4 +214,8 @@
 
 #define CONFIG_SYS_DCACHE_OFF
 
+#ifndef CONFIG_SYS_DCACHE_OFF
+#define CONFIG_CMD_CACHE
+#endif
+
 #endif                         /* __CONFIG_H */
-- 
1.7.9

[U-Boot] [PATCH V2 1/3] i.MX6: define CACHELINE_SIZE

[Eric Nelson]

On 03/04/2012 02:47 PM, Eric Nelson wrote:
> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
> Acked-by: Marek Vasut<marex@denx.de>
>
> ---
>   arch/arm/include/asm/arch-mx6/imx-regs.h |    2 ++
>   1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
> index 6a200bb..3e5c4c2 100644
> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
> @@ -19,6 +19,8 @@
>   #ifndef __ASM_ARCH_MX6_IMX_REGS_H__
>   #define __ASM_ARCH_MX6_IMX_REGS_H__
>
> +#define CONFIG_SYS_CACHELINE_SIZE	32
> +
>   #define ROMCP_ARB_BASE_ADDR             0x00000000
>   #define ROMCP_ARB_END_ADDR              0x000FFFFF
>   #define CAAM_ARB_BASE_ADDR              0x00100000

Hi Stefano,

Any word on this patch?

Please advise,


Eric

[U-Boot] [PATCH V2 2/3] i.MX6: implement enable_caches()

[Eric Nelson]

On 03/04/2012 02:47 PM, Eric Nelson wrote:
> 	disabled by default until drivers are fixed
>
> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
> Acked-by: Marek Vasut<marex@denx.de>
> ---
>   arch/arm/cpu/armv7/mx6/soc.c    |    8 ++++++++
>   include/configs/mx6qarm2.h      |    2 ++
>   include/configs/mx6qsabrelite.h |    2 ++
>   3 files changed, 12 insertions(+), 0 deletions(-)
>
Hi Stefano,

Can you tell that I'm doing some house-cleaning?

Let me know if there's something you'd like changed in this patch.

Regards,


Eric

[U-Boot] [PATCH V2 3/3] i.MX6: mx6qsabrelite: add cache commands if cache is enabled

[Eric Nelson]

On 03/04/2012 02:47 PM, Eric Nelson wrote:
> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
> Acked-by: Marek Vasut<marex@denx.de>
> ---
>   include/configs/mx6qsabrelite.h |    4 ++++
>   1 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
> index d3b31fe..c851559 100644
> --- a/include/configs/mx6qsabrelite.h
> +++ b/include/configs/mx6qsabrelite.h
> @@ -214,4 +214,8 @@
>
>   #define CONFIG_SYS_DCACHE_OFF
>
> +#ifndef CONFIG_SYS_DCACHE_OFF
> +#define CONFIG_CMD_CACHE
> +#endif
> +
>   #endif                         /* __CONFIG_H */

Hi Stefano,

Okay, this is the last outstanding patch in the cache series.

I'm rebasing to your latest tree in preparation for V3 of the fec_mxc patch.

Regards,


Eric

[U-Boot] [PATCH V2 1/3] i.MX6: define CACHELINE_SIZE

[Stefano Babic]

On 13/03/2012 02:08, Eric Nelson wrote:
> On 03/04/2012 02:47 PM, Eric Nelson wrote:
>> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
>> Acked-by: Marek Vasut<marex@denx.de>
>>
>> ---
>>   arch/arm/include/asm/arch-mx6/imx-regs.h |    2 ++
>>   1 files changed, 2 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
>> b/arch/arm/include/asm/arch-mx6/imx-regs.h
>> index 6a200bb..3e5c4c2 100644
>> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
>> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
>> @@ -19,6 +19,8 @@
>>   #ifndef __ASM_ARCH_MX6_IMX_REGS_H__
>>   #define __ASM_ARCH_MX6_IMX_REGS_H__
>>
>> +#define CONFIG_SYS_CACHELINE_SIZE    32
>> +
>>   #define ROMCP_ARB_BASE_ADDR             0x00000000
>>   #define ROMCP_ARB_END_ADDR              0x000FFFFF
>>   #define CAAM_ARB_BASE_ADDR              0x00100000
> 
> Hi Stefano,
> 
> Any word on this patch?

No, but the patch is at the moment not useful until the FEC driver works
with enabled cache.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

[U-Boot] [PATCH V2 1/3] i.MX6: define CACHELINE_SIZE

[Eric Nelson]

On 03/13/2012 01:20 AM, Stefano Babic wrote:
> On 13/03/2012 02:08, Eric Nelson wrote:
>> On 03/04/2012 02:47 PM, Eric Nelson wrote:
>>> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
>>> Acked-by: Marek Vasut<marex@denx.de>
>>>
>>> ---
>>>    arch/arm/include/asm/arch-mx6/imx-regs.h |    2 ++
>>>    1 files changed, 2 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
>>> b/arch/arm/include/asm/arch-mx6/imx-regs.h
>>> index 6a200bb..3e5c4c2 100644
>>> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
>>> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
>>> @@ -19,6 +19,8 @@
>>>    #ifndef __ASM_ARCH_MX6_IMX_REGS_H__
>>>    #define __ASM_ARCH_MX6_IMX_REGS_H__
>>>
>>> +#define CONFIG_SYS_CACHELINE_SIZE    32
>>> +
>>>    #define ROMCP_ARB_BASE_ADDR             0x00000000
>>>    #define ROMCP_ARB_END_ADDR              0x000FFFFF
>>>    #define CAAM_ARB_BASE_ADDR              0x00100000
>>
>> Hi Stefano,
>>
>> Any word on this patch?
>
> No, but the patch is at the moment not useful until the FEC driver works
> with enabled cache.
>
> Best regards,
> Stefano Babic
>
Hi Stefano,

This is used by arch/arm/include/asm/cache.h to set ARCH_DMA_MINALIGN
so any driver or subsystem that uses ALLOC_CACHE_ALIGN_BUFFER will
be affected.

On that topic, it appears that this patch to support cache in the
SD card driver was overlooked:

	http://lists.denx.de/pipermail/u-boot/2012-March/119312.html

Regards,


Eric

[U-Boot] [PATCH V2 1/3] i.MX6: define CACHELINE_SIZE

[Stefano Babic]

On 13/03/2012 02:08, Eric Nelson wrote:
> On 03/04/2012 02:47 PM, Eric Nelson wrote:
>> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
>> Acked-by: Marek Vasut<marex@denx.de>
>>
>> ---
>>   arch/arm/include/asm/arch-mx6/imx-regs.h |    2 ++
>>   1 files changed, 2 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
>> b/arch/arm/include/asm/arch-mx6/imx-regs.h
>> index 6a200bb..3e5c4c2 100644
>> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
>> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
>> @@ -19,6 +19,8 @@
>>   #ifndef __ASM_ARCH_MX6_IMX_REGS_H__
>>   #define __ASM_ARCH_MX6_IMX_REGS_H__
>>
>> +#define CONFIG_SYS_CACHELINE_SIZE    32
>> +
>>   #define ROMCP_ARB_BASE_ADDR             0x00000000
>>   #define ROMCP_ARB_END_ADDR              0x000FFFFF
>>   #define CAAM_ARB_BASE_ADDR              0x00100000
> 

Applied to u-boot-imx, next branch.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

[U-Boot] [PATCH V2 2/3] i.MX6: implement enable_caches()

[Stefano Babic]

On 13/03/2012 02:11, Eric Nelson wrote:
> On 03/04/2012 02:47 PM, Eric Nelson wrote:
>>     disabled by default until drivers are fixed
>>
>> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
>> Acked-by: Marek Vasut<marex@denx.de>
>> ---
>>   arch/arm/cpu/armv7/mx6/soc.c    |    8 ++++++++
>>   include/configs/mx6qarm2.h      |    2 ++
>>   include/configs/mx6qsabrelite.h |    2 ++
>>   3 files changed, 12 insertions(+), 0 deletions(-)
>>

Applied to u-boot-imx, next branch.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

[U-Boot] [PATCH V2 3/3] i.MX6: mx6qsabrelite: add cache commands if cache is enabled

[Stefano Babic]

On 13/03/2012 02:14, Eric Nelson wrote:
> On 03/04/2012 02:47 PM, Eric Nelson wrote:
>> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
>> Acked-by: Marek Vasut<marex@denx.de>
>> ---
>>   include/configs/mx6qsabrelite.h |    4 ++++
>>   1 files changed, 4 insertions(+), 0 deletions(-)
>>
>> diff --git a/include/configs/mx6qsabrelite.h
>> b/include/configs/mx6qsabrelite.h
>> index d3b31fe..c851559 100644
>> --- a/include/configs/mx6qsabrelite.h
>> +++ b/include/configs/mx6qsabrelite.h
>> @@ -214,4 +214,8 @@
>>
>>   #define CONFIG_SYS_DCACHE_OFF
>>
>> +#ifndef CONFIG_SYS_DCACHE_OFF
>> +#define CONFIG_CMD_CACHE
>> +#endif
>> +
>>   #endif                         /* __CONFIG_H */
> 

Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

[U-Boot] [PATCH V2 1/3] i.MX6: define CACHELINE_SIZE

[Stefano Babic]

On 13/03/2012 02:08, Eric Nelson wrote:
> On 03/04/2012 02:47 PM, Eric Nelson wrote:
>> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
>> Acked-by: Marek Vasut<marex@denx.de>
>>
>> ---


Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH V2 2/3] i.MX6: implement enable_caches()

[Stefano Babic]

On 19/03/2012 16:39, Stefano Babic wrote:
> On 13/03/2012 02:11, Eric Nelson wrote:
>> On 03/04/2012 02:47 PM, Eric Nelson wrote:
>>>     disabled by default until drivers are fixed
>>>
>>> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
>>> Acked-by: Marek Vasut<marex@denx.de>
>>> ---
>>>   arch/arm/cpu/armv7/mx6/soc.c    |    8 ++++++++
>>>   include/configs/mx6qarm2.h      |    2 ++
>>>   include/configs/mx6qsabrelite.h |    2 ++
>>>   3 files changed, 12 insertions(+), 0 deletions(-)
>>>
> 
> Applied to u-boot-imx, next branch.

Wrong - merge into u-boot-imx, master. It goes in this release.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================