* [PATCH v3 0/7] ARM: davinci: add support for the am1808 based enbw_cmc board
@ 2012-03-05 11:09 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:09 UTC (permalink / raw)
To: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/
Cc: Heiko Schocher,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, netdev-u79uwXL29TY76Z2rM5mHXA,
David Woodhouse, Ben Dooks, Wolfram Sang, Sekhar Nori,
Kevin Hilman, Wolfgang Denk, Sergei Shtylyov
This patchserie add support for the davinci am1808 based
enbw_cmc board.
Important: I rebased this patchserie against the irqdomain/next
branch from grant likely, as he suggested to rework the OF
intcontroller changes to the irqdomain work, branch found here:
http://git.secretlab.ca/?p=linux-2.6.git;a=shortlog;h=refs/heads/irqdomain/next
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
Author: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Date: Fri Feb 24 14:58:54 2012 -0700
mfd: twl-core: Add IRQ_DOMAIN dependency
changes for v2:
Post this patchserie now as v2, as reworked in the
comments I got for the RFC serie.
changes for v3:
- Interrupt Controller:
- comment from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"
- cp_intc_init() is now also for the of case
the name of the init function (it calls the
"new" __cp_intc_init() function, which was
the "old" cp_intc_init()). Through this
rework the changes for OF is better visible.
As the OF case uses the irq_domain rework from
Grant Likely, maybe the none OF case can use
this also, but this should be tested on a hw ...
Got no comments to the following points, I noted in the
RFC series, so posting this patchseries with them:
- ARM: davinci: configure davinci aemif chipselects through OF
not moved to mfd, as mentioned in this discussion:
http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
instead use a phandle in the DTS, so drivers which
uses the davinci aemif, can call davinci_aemif_setup_timing_of()
This is just thought as an RFC ... The enbw_cmc board
support not really need to setup this bus timings, as
they are setup in U-Boot ... but I want to post this,
as I think, it is a nice to have, and I am not really
sure, if this has to be a MFD device (If so, all bus
interfaces for other SoCs should be converted also to
MFD devices) ... as an example how this can be used
I add this to the davinci nand controller OF support
patch, in this patchserie.
- ARM: davinci: mux: add OF support
I want to get rid of the pin setup code in board code ...
This patch introduces a davinci_cfg_reg_of() function,
which davinci drivers can call, if they found a
"pinmux-handle", so used in the following drivers in
this patchserie:
drivers/net/ethernet/ti/davinci_emac
drivers/i2c/busses/i2c-davinci.c
drivers/mtd/nand/davinci_nand.c
- post this board support with USB support, even though
USB is only working with the 10 ms "workaround", posted here:
http://comments.gmane.org/gmane.linux.usb.general/54505
I see this issue also on the AM1808 TMDXEXP1808L evalboard.
- MMC and USB are not using OF support yet, ideas how to port
this are welcome. I need for USB and MMC board specific
callbacks, how to solve this with OF support?
Signed-off-by: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
Cc: linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
Cc: Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>
Cc: Wolfram Sang <w.sang-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Cc: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
Cc: Kevin Hilman <khilman-l0cyMroinI0@public.gmane.org>
Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
Cc: Sergei Shtylyov <sshtylyov-Igf4POYTYCDQT0dZR+AlfA@public.gmane.org>
Heiko Schocher (7):
ARM: davinci, intc: Add OF support for TI interrupt controller
ARM: davinci: configure davinci aemif chipselects through OF
ARM: davinci: mux: add OF support
ARM: davinci: net: davinci_emac: add OF support
ARM: davinci: i2c: add OF support
ARM: mtd: nand: davinci: add OF support for davinci nand controller
ARM: davinci: add support for the am1808 based enbw_cmc board
.../devicetree/bindings/arm/davinci/aemif.txt | 119 ++++++
.../bindings/arm/davinci/davinci_emac.txt | 43 +++
.../devicetree/bindings/arm/davinci/i2c.txt | 33 ++
.../devicetree/bindings/arm/davinci/intc.txt | 27 ++
.../devicetree/bindings/arm/davinci/mux.txt | 40 ++
.../devicetree/bindings/arm/davinci/nand.txt | 74 ++++
arch/arm/boot/dts/enbw_cmc.dts | 268 ++++++++++++++
arch/arm/configs/enbw_cmc_defconfig | 123 +++++++
arch/arm/mach-davinci/Kconfig | 9 +
arch/arm/mach-davinci/Makefile | 1 +
arch/arm/mach-davinci/aemif.c | 86 +++++-
arch/arm/mach-davinci/board-enbw-cmc.c | 380 ++++++++++++++++++++
arch/arm/mach-davinci/cp_intc.c | 87 ++++-
arch/arm/mach-davinci/include/mach/aemif.h | 1 +
arch/arm/mach-davinci/include/mach/mux.h | 2 +
arch/arm/mach-davinci/include/mach/uncompress.h | 1 +
arch/arm/mach-davinci/mux.c | 73 ++++-
drivers/i2c/busses/i2c-davinci.c | 37 ++
drivers/mtd/nand/davinci_nand.c | 85 +++++-
drivers/net/ethernet/ti/davinci_emac.c | 94 +++++-
20 files changed, 1569 insertions(+), 14 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
create mode 100644 arch/arm/configs/enbw_cmc_defconfig
create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
--
1.7.7.6
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 0/7] ARM: davinci: add support for the am1808 based enbw_cmc board
@ 2012-03-05 11:09 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:09 UTC (permalink / raw)
To: davinci-linux-open-source
Cc: Kevin Hilman, Sergei Shtylyov, netdev, devicetree-discuss,
Sekhar Nori, Wolfram Sang, linux-mtd, linux-i2c, Ben Dooks,
Heiko Schocher, David Woodhouse, linux-arm-kernel
This patchserie add support for the davinci am1808 based
enbw_cmc board.
Important: I rebased this patchserie against the irqdomain/next
branch from grant likely, as he suggested to rework the OF
intcontroller changes to the irqdomain work, branch found here:
http://git.secretlab.ca/?p=linux-2.6.git;a=shortlog;h=refs/heads/irqdomain/next
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
Author: Grant Likely <grant.likely@secretlab.ca>
Date: Fri Feb 24 14:58:54 2012 -0700
mfd: twl-core: Add IRQ_DOMAIN dependency
changes for v2:
Post this patchserie now as v2, as reworked in the
comments I got for the RFC serie.
changes for v3:
- Interrupt Controller:
- comment from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"
- cp_intc_init() is now also for the of case
the name of the init function (it calls the
"new" __cp_intc_init() function, which was
the "old" cp_intc_init()). Through this
rework the changes for OF is better visible.
As the OF case uses the irq_domain rework from
Grant Likely, maybe the none OF case can use
this also, but this should be tested on a hw ...
Got no comments to the following points, I noted in the
RFC series, so posting this patchseries with them:
- ARM: davinci: configure davinci aemif chipselects through OF
not moved to mfd, as mentioned in this discussion:
http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
instead use a phandle in the DTS, so drivers which
uses the davinci aemif, can call davinci_aemif_setup_timing_of()
This is just thought as an RFC ... The enbw_cmc board
support not really need to setup this bus timings, as
they are setup in U-Boot ... but I want to post this,
as I think, it is a nice to have, and I am not really
sure, if this has to be a MFD device (If so, all bus
interfaces for other SoCs should be converted also to
MFD devices) ... as an example how this can be used
I add this to the davinci nand controller OF support
patch, in this patchserie.
- ARM: davinci: mux: add OF support
I want to get rid of the pin setup code in board code ...
This patch introduces a davinci_cfg_reg_of() function,
which davinci drivers can call, if they found a
"pinmux-handle", so used in the following drivers in
this patchserie:
drivers/net/ethernet/ti/davinci_emac
drivers/i2c/busses/i2c-davinci.c
drivers/mtd/nand/davinci_nand.c
- post this board support with USB support, even though
USB is only working with the 10 ms "workaround", posted here:
http://comments.gmane.org/gmane.linux.usb.general/54505
I see this issue also on the AM1808 TMDXEXP1808L evalboard.
- MMC and USB are not using OF support yet, ideas how to port
this are welcome. I need for USB and MMC board specific
callbacks, how to solve this with OF support?
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: linux-mtd@lists.infradead.org
Cc: linux-i2c@vger.kernel.org
Cc: netdev@vger.kernel.org
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Heiko Schocher (7):
ARM: davinci, intc: Add OF support for TI interrupt controller
ARM: davinci: configure davinci aemif chipselects through OF
ARM: davinci: mux: add OF support
ARM: davinci: net: davinci_emac: add OF support
ARM: davinci: i2c: add OF support
ARM: mtd: nand: davinci: add OF support for davinci nand controller
ARM: davinci: add support for the am1808 based enbw_cmc board
.../devicetree/bindings/arm/davinci/aemif.txt | 119 ++++++
.../bindings/arm/davinci/davinci_emac.txt | 43 +++
.../devicetree/bindings/arm/davinci/i2c.txt | 33 ++
.../devicetree/bindings/arm/davinci/intc.txt | 27 ++
.../devicetree/bindings/arm/davinci/mux.txt | 40 ++
.../devicetree/bindings/arm/davinci/nand.txt | 74 ++++
arch/arm/boot/dts/enbw_cmc.dts | 268 ++++++++++++++
arch/arm/configs/enbw_cmc_defconfig | 123 +++++++
arch/arm/mach-davinci/Kconfig | 9 +
arch/arm/mach-davinci/Makefile | 1 +
arch/arm/mach-davinci/aemif.c | 86 +++++-
arch/arm/mach-davinci/board-enbw-cmc.c | 380 ++++++++++++++++++++
arch/arm/mach-davinci/cp_intc.c | 87 ++++-
arch/arm/mach-davinci/include/mach/aemif.h | 1 +
arch/arm/mach-davinci/include/mach/mux.h | 2 +
arch/arm/mach-davinci/include/mach/uncompress.h | 1 +
arch/arm/mach-davinci/mux.c | 73 ++++-
drivers/i2c/busses/i2c-davinci.c | 37 ++
drivers/mtd/nand/davinci_nand.c | 85 +++++-
drivers/net/ethernet/ti/davinci_emac.c | 94 +++++-
20 files changed, 1569 insertions(+), 14 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
create mode 100644 arch/arm/configs/enbw_cmc_defconfig
create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
--
1.7.7.6
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 0/7] ARM: davinci: add support for the am1808 based enbw_cmc board
@ 2012-03-05 11:09 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:09 UTC (permalink / raw)
To: linux-arm-kernel
This patchserie add support for the davinci am1808 based
enbw_cmc board.
Important: I rebased this patchserie against the irqdomain/next
branch from grant likely, as he suggested to rework the OF
intcontroller changes to the irqdomain work, branch found here:
http://git.secretlab.ca/?p=linux-2.6.git;a=shortlog;h=refs/heads/irqdomain/next
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
Author: Grant Likely <grant.likely@secretlab.ca>
Date: Fri Feb 24 14:58:54 2012 -0700
mfd: twl-core: Add IRQ_DOMAIN dependency
changes for v2:
Post this patchserie now as v2, as reworked in the
comments I got for the RFC serie.
changes for v3:
- Interrupt Controller:
- comment from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"
- cp_intc_init() is now also for the of case
the name of the init function (it calls the
"new" __cp_intc_init() function, which was
the "old" cp_intc_init()). Through this
rework the changes for OF is better visible.
As the OF case uses the irq_domain rework from
Grant Likely, maybe the none OF case can use
this also, but this should be tested on a hw ...
Got no comments to the following points, I noted in the
RFC series, so posting this patchseries with them:
- ARM: davinci: configure davinci aemif chipselects through OF
not moved to mfd, as mentioned in this discussion:
http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
instead use a phandle in the DTS, so drivers which
uses the davinci aemif, can call davinci_aemif_setup_timing_of()
This is just thought as an RFC ... The enbw_cmc board
support not really need to setup this bus timings, as
they are setup in U-Boot ... but I want to post this,
as I think, it is a nice to have, and I am not really
sure, if this has to be a MFD device (If so, all bus
interfaces for other SoCs should be converted also to
MFD devices) ... as an example how this can be used
I add this to the davinci nand controller OF support
patch, in this patchserie.
- ARM: davinci: mux: add OF support
I want to get rid of the pin setup code in board code ...
This patch introduces a davinci_cfg_reg_of() function,
which davinci drivers can call, if they found a
"pinmux-handle", so used in the following drivers in
this patchserie:
drivers/net/ethernet/ti/davinci_emac
drivers/i2c/busses/i2c-davinci.c
drivers/mtd/nand/davinci_nand.c
- post this board support with USB support, even though
USB is only working with the 10 ms "workaround", posted here:
http://comments.gmane.org/gmane.linux.usb.general/54505
I see this issue also on the AM1808 TMDXEXP1808L evalboard.
- MMC and USB are not using OF support yet, ideas how to port
this are welcome. I need for USB and MMC board specific
callbacks, how to solve this with OF support?
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: linux-arm-kernel at lists.infradead.org
Cc: devicetree-discuss at lists.ozlabs.org
Cc: davinci-linux-open-source at linux.davincidsp.com
Cc: linux-mtd at lists.infradead.org
Cc: linux-i2c at vger.kernel.org
Cc: netdev at vger.kernel.org
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Heiko Schocher (7):
ARM: davinci, intc: Add OF support for TI interrupt controller
ARM: davinci: configure davinci aemif chipselects through OF
ARM: davinci: mux: add OF support
ARM: davinci: net: davinci_emac: add OF support
ARM: davinci: i2c: add OF support
ARM: mtd: nand: davinci: add OF support for davinci nand controller
ARM: davinci: add support for the am1808 based enbw_cmc board
.../devicetree/bindings/arm/davinci/aemif.txt | 119 ++++++
.../bindings/arm/davinci/davinci_emac.txt | 43 +++
.../devicetree/bindings/arm/davinci/i2c.txt | 33 ++
.../devicetree/bindings/arm/davinci/intc.txt | 27 ++
.../devicetree/bindings/arm/davinci/mux.txt | 40 ++
.../devicetree/bindings/arm/davinci/nand.txt | 74 ++++
arch/arm/boot/dts/enbw_cmc.dts | 268 ++++++++++++++
arch/arm/configs/enbw_cmc_defconfig | 123 +++++++
arch/arm/mach-davinci/Kconfig | 9 +
arch/arm/mach-davinci/Makefile | 1 +
arch/arm/mach-davinci/aemif.c | 86 +++++-
arch/arm/mach-davinci/board-enbw-cmc.c | 380 ++++++++++++++++++++
arch/arm/mach-davinci/cp_intc.c | 87 ++++-
arch/arm/mach-davinci/include/mach/aemif.h | 1 +
arch/arm/mach-davinci/include/mach/mux.h | 2 +
arch/arm/mach-davinci/include/mach/uncompress.h | 1 +
arch/arm/mach-davinci/mux.c | 73 ++++-
drivers/i2c/busses/i2c-davinci.c | 37 ++
drivers/mtd/nand/davinci_nand.c | 85 +++++-
drivers/net/ethernet/ti/davinci_emac.c | 94 +++++-
20 files changed, 1569 insertions(+), 14 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
create mode 100644 arch/arm/configs/enbw_cmc_defconfig
create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
--
1.7.7.6
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 1/7] ARM: davinci, intc: Add OF support for TI interrupt controller
2012-03-05 11:09 ` Heiko Schocher
@ 2012-03-05 11:09 ` Heiko Schocher
-1 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:09 UTC (permalink / raw)
To: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/
Cc: Wolfgang Denk, Sergei Shtylyov,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ, Grant Likely,
Heiko Schocher,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Add a function to initialize the Common Platform Interrupt Controller
(cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.
Signed-off-by: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Cc: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Cc: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
Cc: Sergei Shtylyov <sshtylyov-Igf4POYTYCDQT0dZR+AlfA@public.gmane.org>
---
- changes for v2:
- add comment from Grant Likely:
- migrate the whole interrupt controller to natively use an
irq_domain. Rebased complete patchserie to:
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
commit 3a806bfcde2cc3e4853f2807b2e3c94e7ccaf450
Author: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Date: Fri Jan 27 06:44:34 2012 -0700
irq_domain: mostly eliminate slow-path revmap lookups
- changes for v3:
- add comments from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"
- cp_intc_init() is now also for the of case
the name of the init function (it calls the
"new" __cp_intc_init() function, which was
the "old" cp_intc_init()). Through this
rework the changes for OF is better visible.
As the OF case uses the irq_domain rework from
Grant Likely, maybe the none OF case can use
this also, but this should be tested on a hw ...
- rebased to:
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
Author: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Date: Fri Feb 24 14:58:54 2012 -0700
mfd: twl-core: Add IRQ_DOMAIN dependency
.../devicetree/bindings/arm/davinci/intc.txt | 27 ++++++
arch/arm/mach-davinci/cp_intc.c | 87 +++++++++++++++++--
2 files changed, 104 insertions(+), 10 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
diff --git a/Documentation/devicetree/bindings/arm/davinci/intc.txt b/Documentation/devicetree/bindings/arm/davinci/intc.txt
new file mode 100644
index 0000000..dfd6a560
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/davinci/intc.txt
@@ -0,0 +1,27 @@
+* TI Common Platform Interrupt Controller
+
+Common Platform Interrupt Controller (cp_intc) is used on
+OMAP-L1x SoCs and can support several configurable number
+of interrupts.
+
+Main node required properties:
+
+- compatible : should be:
+ "ti,cp_intc"
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt source. The type shall be a <u32> and the value shall be 1.
+
+ The cell contains the interrupt number in the range [0-128].
+- ti,intc-size: Number of interrupts handled by the interrupt controller.
+- reg: physical base address and size of the intc registers map.
+
+Example:
+
+ intc: interrupt-controller@1 {
+ compatible = "ti,cp_intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ ti,intc-size = <101>;
+ reg = <0xfffee000 0x2000>;
+ };
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index f83152d..585114a 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -9,9 +9,14 @@
* kind, whether express or implied.
*/
+#include <linux/export.h>
#include <linux/init.h>
#include <linux/irq.h>
+#include <linux/irqdomain.h>
#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
#include <mach/common.h>
#include <mach/cp_intc.h>
@@ -99,18 +104,45 @@ static struct irq_chip cp_intc_irq_chip = {
.irq_set_wake = cp_intc_set_wake,
};
-void __init cp_intc_init(void)
+static struct irq_domain *cp_intc_domain;
+
+static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
+ irq_hw_number_t hw)
{
- unsigned long num_irq = davinci_soc_info.intc_irq_num;
+ pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
+
+ irq_set_chip(virq, &cp_intc_irq_chip);
+ set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
+ irq_set_handler(virq, handle_edge_irq);
+ return 0;
+}
+
+static const struct irq_domain_ops cp_intc_host_ops = {
+ .map = cp_intc_host_map,
+ .xlate = irq_domain_xlate_onetwocell,
+};
+
+int __init __cp_intc_init(struct device_node *node,
+ struct device_node *parent)
+{
+ u32 num_irq = davinci_soc_info.intc_irq_num;
u8 *irq_prio = davinci_soc_info.intc_irq_prios;
u32 *host_map = davinci_soc_info.intc_host_map;
unsigned num_reg = BITS_TO_LONGS(num_irq);
- int i;
+ int i, irq_base;
davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
- davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
+ if (node) {
+ davinci_intc_base = of_iomap(node, 0);
+ if (of_property_read_u32(node, "ti,intc-size", &num_irq))
+ pr_warn("unable to get intc-size, default to %d\n",
+ num_irq);
+ } else {
+ davinci_intc_base = ioremap(davinci_soc_info.intc_base,
+ SZ_8K);
+ }
if (WARN_ON(!davinci_intc_base))
- return;
+ return -EINVAL;
cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);
@@ -165,13 +197,48 @@ void __init cp_intc_init(void)
for (i = 0; host_map[i] != -1; i++)
cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
- /* Set up genirq dispatching for cp_intc */
- for (i = 0; i < num_irq; i++) {
- irq_set_chip(i, &cp_intc_irq_chip);
- set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
- irq_set_handler(i, handle_edge_irq);
+ if (node) {
+ irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
+ if (irq_base < 0) {
+ pr_warn("Couldn't allocate IRQ numbers\n");
+ irq_base = 0;
+ }
+
+ /* create a legacy host */
+ cp_intc_domain = irq_domain_add_legacy(node, num_irq,
+ irq_base, 0, &cp_intc_host_ops, NULL);
+ if (cp_intc_domain == NULL) {
+ pr_err("CP INTC: failed to allocate irq host!\n");
+ return -EINVAL;
+ }
+ } else {
+ /* Set up genirq dispatching for cp_intc */
+ for (i = 0; i < num_irq; i++) {
+ irq_set_chip(i, &cp_intc_irq_chip);
+ set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
+ irq_set_handler(i, handle_edge_irq);
+ }
}
/* Enable global interrupt */
cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
+
+ return 0;
+}
+
+#ifdef CONFIG_OF
+static struct of_device_id irq_match[] __initdata = {
+ { .compatible = "ti,cp_intc", .data = __cp_intc_init, },
+ { }
+};
+
+void __init cp_intc_init(void)
+{
+ of_irq_init(irq_match);
+}
+#else
+void __init cp_intc_init(void)
+{
+ __cp_intc_init(NULL, NULL);
}
+#endif
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 1/7] ARM: davinci, intc: Add OF support for TI interrupt controller
@ 2012-03-05 11:09 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:09 UTC (permalink / raw)
To: linux-arm-kernel
Add a function to initialize the Common Platform Interrupt Controller
(cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: davinci-linux-open-source at linux.davincidsp.com
Cc: linux-arm-kernel at lists.infradead.org
Cc: devicetree-discuss at lists.ozlabs.org
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
---
- changes for v2:
- add comment from Grant Likely:
- migrate the whole interrupt controller to natively use an
irq_domain. Rebased complete patchserie to:
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
commit 3a806bfcde2cc3e4853f2807b2e3c94e7ccaf450
Author: Grant Likely <grant.likely@secretlab.ca>
Date: Fri Jan 27 06:44:34 2012 -0700
irq_domain: mostly eliminate slow-path revmap lookups
- changes for v3:
- add comments from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"
- cp_intc_init() is now also for the of case
the name of the init function (it calls the
"new" __cp_intc_init() function, which was
the "old" cp_intc_init()). Through this
rework the changes for OF is better visible.
As the OF case uses the irq_domain rework from
Grant Likely, maybe the none OF case can use
this also, but this should be tested on a hw ...
- rebased to:
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
Author: Grant Likely <grant.likely@secretlab.ca>
Date: Fri Feb 24 14:58:54 2012 -0700
mfd: twl-core: Add IRQ_DOMAIN dependency
.../devicetree/bindings/arm/davinci/intc.txt | 27 ++++++
arch/arm/mach-davinci/cp_intc.c | 87 +++++++++++++++++--
2 files changed, 104 insertions(+), 10 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
diff --git a/Documentation/devicetree/bindings/arm/davinci/intc.txt b/Documentation/devicetree/bindings/arm/davinci/intc.txt
new file mode 100644
index 0000000..dfd6a560
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/davinci/intc.txt
@@ -0,0 +1,27 @@
+* TI Common Platform Interrupt Controller
+
+Common Platform Interrupt Controller (cp_intc) is used on
+OMAP-L1x SoCs and can support several configurable number
+of interrupts.
+
+Main node required properties:
+
+- compatible : should be:
+ "ti,cp_intc"
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt source. The type shall be a <u32> and the value shall be 1.
+
+ The cell contains the interrupt number in the range [0-128].
+- ti,intc-size: Number of interrupts handled by the interrupt controller.
+- reg: physical base address and size of the intc registers map.
+
+Example:
+
+ intc: interrupt-controller at 1 {
+ compatible = "ti,cp_intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ ti,intc-size = <101>;
+ reg = <0xfffee000 0x2000>;
+ };
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index f83152d..585114a 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -9,9 +9,14 @@
* kind, whether express or implied.
*/
+#include <linux/export.h>
#include <linux/init.h>
#include <linux/irq.h>
+#include <linux/irqdomain.h>
#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
#include <mach/common.h>
#include <mach/cp_intc.h>
@@ -99,18 +104,45 @@ static struct irq_chip cp_intc_irq_chip = {
.irq_set_wake = cp_intc_set_wake,
};
-void __init cp_intc_init(void)
+static struct irq_domain *cp_intc_domain;
+
+static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
+ irq_hw_number_t hw)
{
- unsigned long num_irq = davinci_soc_info.intc_irq_num;
+ pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
+
+ irq_set_chip(virq, &cp_intc_irq_chip);
+ set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
+ irq_set_handler(virq, handle_edge_irq);
+ return 0;
+}
+
+static const struct irq_domain_ops cp_intc_host_ops = {
+ .map = cp_intc_host_map,
+ .xlate = irq_domain_xlate_onetwocell,
+};
+
+int __init __cp_intc_init(struct device_node *node,
+ struct device_node *parent)
+{
+ u32 num_irq = davinci_soc_info.intc_irq_num;
u8 *irq_prio = davinci_soc_info.intc_irq_prios;
u32 *host_map = davinci_soc_info.intc_host_map;
unsigned num_reg = BITS_TO_LONGS(num_irq);
- int i;
+ int i, irq_base;
davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
- davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
+ if (node) {
+ davinci_intc_base = of_iomap(node, 0);
+ if (of_property_read_u32(node, "ti,intc-size", &num_irq))
+ pr_warn("unable to get intc-size, default to %d\n",
+ num_irq);
+ } else {
+ davinci_intc_base = ioremap(davinci_soc_info.intc_base,
+ SZ_8K);
+ }
if (WARN_ON(!davinci_intc_base))
- return;
+ return -EINVAL;
cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);
@@ -165,13 +197,48 @@ void __init cp_intc_init(void)
for (i = 0; host_map[i] != -1; i++)
cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
- /* Set up genirq dispatching for cp_intc */
- for (i = 0; i < num_irq; i++) {
- irq_set_chip(i, &cp_intc_irq_chip);
- set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
- irq_set_handler(i, handle_edge_irq);
+ if (node) {
+ irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
+ if (irq_base < 0) {
+ pr_warn("Couldn't allocate IRQ numbers\n");
+ irq_base = 0;
+ }
+
+ /* create a legacy host */
+ cp_intc_domain = irq_domain_add_legacy(node, num_irq,
+ irq_base, 0, &cp_intc_host_ops, NULL);
+ if (cp_intc_domain == NULL) {
+ pr_err("CP INTC: failed to allocate irq host!\n");
+ return -EINVAL;
+ }
+ } else {
+ /* Set up genirq dispatching for cp_intc */
+ for (i = 0; i < num_irq; i++) {
+ irq_set_chip(i, &cp_intc_irq_chip);
+ set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
+ irq_set_handler(i, handle_edge_irq);
+ }
}
/* Enable global interrupt */
cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
+
+ return 0;
+}
+
+#ifdef CONFIG_OF
+static struct of_device_id irq_match[] __initdata = {
+ { .compatible = "ti,cp_intc", .data = __cp_intc_init, },
+ { }
+};
+
+void __init cp_intc_init(void)
+{
+ of_irq_init(irq_match);
+}
+#else
+void __init cp_intc_init(void)
+{
+ __cp_intc_init(NULL, NULL);
}
+#endif
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 2/7] ARM: davinci: configure davinci aemif chipselects through OF
2012-03-05 11:09 ` Heiko Schocher
@ 2012-03-05 11:09 ` Heiko Schocher
-1 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:09 UTC (permalink / raw)
To: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/
Cc: Kevin Hilman, Wolfgang Denk, Sergei Shtylyov,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ, Sekhar Nori,
Heiko Schocher,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Add support for configuring the aemif timing registers
through device tree. Introduce new compatible property
"ti,davinci-cs", see full description in
Documentation/devicetree/bindings/arm/davinci/aemif.txt
Signed-off-by: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Cc: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
Cc: Kevin Hilman <khilman-l0cyMroinI0@public.gmane.org>
Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
Cc: Sergei Shtylyov <sshtylyov-Igf4POYTYCDQT0dZR+AlfA@public.gmane.org>
---
- changes for v2
- add comment from Sergei Shtylyov:
- use of_property_read_u32()
- Conding Style changes
- add comment from Sekhar Nori:
- add patch description
- use davinci_aemif_setup_timing
- change compatible node to "ti,davinci-aemif"
- not moved to mfd, as mentioned in this discussion:
http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
instead use a phandle in the DTS, so drivers which
uses the davinci aemif, can call davinci_aemif_setup_timing_of()
This is just thought as an RFC ... The enbw_cmc board
support not really need to setup this bus timings, as
they are setup in U-Boot ... but I want to post this,
as I think, it is a nice to have ... as an example used
in the davinci nand controller OF support patch, in this
patchserie.
- no changes for v3
.../devicetree/bindings/arm/davinci/aemif.txt | 119 ++++++++++++++++++++
arch/arm/mach-davinci/aemif.c | 86 ++++++++++++++-
arch/arm/mach-davinci/include/mach/aemif.h | 1 +
3 files changed, 205 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
diff --git a/Documentation/devicetree/bindings/arm/davinci/aemif.txt b/Documentation/devicetree/bindings/arm/davinci/aemif.txt
new file mode 100644
index 0000000..0dbb842
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/davinci/aemif.txt
@@ -0,0 +1,119 @@
+* Texas Instruments Davinci AEMIF
+
+This file provides information, what the device node for the
+davinci aemif interface contain.
+
+Required properties:
+- compatible: "ti,davinci-aemif";
+- #address-cells : Should be either two or three. The first cell is the
+ chipselect number, and the remaining cells are the
+ offset into the chipselect.
+- #size-cells : Either one or two, depending on how large each chipselect
+ can be.
+- ranges : Each range corresponds to a single chipselect, and cover
+ the entire access window as configured.
+
+Optional properties:
+- none
+
+Optional subnodes:
+- Chipselect setup:
+ - compatible: "ti,davinci-cs";
+ - #address-cells = <1>;
+ - #size-cells = <1>;
+
+ Timing setup, all timings in nanoseconds
+ - cs: chipselect (value 2,3,4 or 5)
+ - asize: Asynchronous Data Bus Width.
+ value:
+ 0: 8 bit
+ 1: 16 bit
+ - ta: Minimum Turn-Around time.
+ - rhold: Read hold width
+ - rstrobe: Read strobe width
+ - rsetup: Read setup width
+ - whold: Write hold width
+ - wstrobe: Write strobe width
+ - wsetup: Write setup width
+ - ew: Extend Wait bit
+ value:
+ 0: Extended wait cycles disabled.
+ 1: Extended wait cycles enabled.
+ - ss: Select Strobe bit.
+ value:
+ 0: Normal Mode enabled.
+ 1: Select Strobe Mode enabled.
+- CFI driver:
+ see: Documentation/devicetree/bindings/mtd/mtd-physmap.txt
+
+Example (enbw_cmc board):
+ aemif@60000000 {
+ compatible = "ti,davinci-aemif";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <0x68000000 0x80000>;
+ ranges = <2 0 0x60000000 0x02000000
+ 3 0 0x62000000 0x02000000
+ 4 0 0x64000000 0x02000000
+ 5 0 0x66000000 0x02000000
+ 6 0 0x68000000 0x02000000>;
+ cs2@68000000 {
+ compatible = "ti,davinci-cs";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* all timings in nanoseconds */
+ cs = <2>;
+ asize = <1>;
+ ta = <0>;
+ rhold = <7>;
+ rstrobe = <42>;
+ rsetup = <14>;
+ whold = <7>;
+ wstrobe = <42>;
+ wsetup = <14>;
+ ew = <0>;
+ ss = <0>;
+ };
+ flash@2,0 {
+ compatible = "cfi-flash";
+ reg = <2 0x0 0x400000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bank-width = <2>;
+ device-width = <2>;
+ };
+ nand_cs: cs3@68000000 {
+ compatible = "ti,davinci-cs";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* all timings in nanoseconds */
+ cs = <3>;
+ asize = <0>;
+ ta = <0>;
+ rhold = <7>;
+ rstrobe = <42>;
+ rsetup = <7>;
+ whold = <7>;
+ wstrobe = <14>;
+ wsetup = <7>;
+ ew = <0>;
+ ss = <0>;
+ };
+ nandflash@3,0 {
+ compatible = "ti,davinci-nand";
+ reg = <3 0x0 0x807ff
+ 6 0x0 0x8000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ mask_ale = <0>;
+ mask_cle = <0>;
+ mask_chipsel = <0>;
+ ecc_mode = <2>;
+ ecc_bits = <4>;
+ options = <0>;
+ bbt_options = <0x20000>;
+ pinmux-handle = <&nand_pins>;
+ timing-handle = <&nand_cs>;
+ };
+
+ };
diff --git a/arch/arm/mach-davinci/aemif.c b/arch/arm/mach-davinci/aemif.c
index 1ce70a9..e3d94a5 100644
--- a/arch/arm/mach-davinci/aemif.c
+++ b/arch/arm/mach-davinci/aemif.c
@@ -13,12 +13,14 @@
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include <linux/time.h>
#include <mach/aemif.h>
/* Timing value configuration */
-
+#define ASIZE(x) (x)
#define TA(x) ((x) << 2)
#define RHOLD(x) ((x) << 4)
#define RSTROBE(x) ((x) << 7)
@@ -26,7 +28,10 @@
#define WHOLD(x) ((x) << 17)
#define WSTROBE(x) ((x) << 20)
#define WSETUP(x) ((x) << 26)
+#define EW(x) ((x) << 30)
+#define SS(x) ((x) << 31)
+#define ASIZE_MAX 0x1
#define TA_MAX 0x3
#define RHOLD_MAX 0x7
#define RSTROBE_MAX 0x3f
@@ -34,6 +39,8 @@
#define WHOLD_MAX 0x7
#define WSTROBE_MAX 0x3f
#define WSETUP_MAX 0xf
+#define EW_MAX 0x1
+#define SS_MAX 0x1
#define TIMING_MASK (TA(TA_MAX) | \
RHOLD(RHOLD_MAX) | \
@@ -131,3 +138,80 @@ int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
return 0;
}
EXPORT_SYMBOL(davinci_aemif_setup_timing);
+
+#if defined(CONFIG_OF)
+static int dv_get_value(struct device_node *np, const char *name)
+{
+ u32 data;
+ int ret;
+
+ ret = of_property_read_u32(np, name, &data);
+ if (ret != 0)
+ return ret;
+
+ return data;
+}
+
+int davinci_aemif_setup_timing_of(struct device_node *np)
+{
+ struct device_node *parent;
+ struct davinci_aemif_timing t;
+ void __iomem *base;
+ unsigned val;
+ int asize, ew, ss;
+ int cs;
+ unsigned offset;
+ int ret;
+
+ if (!np)
+ return -ENODEV;
+
+ parent = np->parent;
+ if (!np)
+ return -ENODEV;
+
+ base = of_iomap(parent, 0);
+ if (!base)
+ return -EINVAL;
+
+ cs = dv_get_value(np, "cs");
+ if (cs < 2)
+ return -EINVAL;
+
+ t.ta = dv_get_value(np, "ta");
+ t.rhold = dv_get_value(np, "rhold");
+ t.rstrobe = dv_get_value(np, "rstrobe");
+ t.rsetup = dv_get_value(np, "rsetup");
+ t.whold = dv_get_value(np, "whold");
+ t.wstrobe = dv_get_value(np, "wstrobe");
+ t.wsetup = dv_get_value(np, "wsetup");
+
+ ret = davinci_aemif_setup_timing(&t, base, cs);
+ if (ret != 0)
+ return ret;
+
+ /* setup none timing paramters */
+ offset = A1CR_OFFSET + cs * 4;
+ asize = dv_get_value(np, "asize");
+ ew = dv_get_value(np, "ew");
+ ss = dv_get_value(np, "ss");
+ val = __raw_readl(base + offset);
+ val &= TIMING_MASK;
+ val |= (asize & ACR_ASIZE_MASK);
+ if (ew)
+ val |= ACR_EW_MASK;
+ if (ss)
+ val |= ACR_SS_MASK;
+
+ __raw_writel(val, base + offset);
+
+ iounmap(base);
+ return 0;
+}
+#else
+int davinci_aemif_setup_timing_of(struct device_node *np)
+{
+ return 0;
+}
+#endif
+EXPORT_SYMBOL(davinci_aemif_setup_timing_of);
diff --git a/arch/arm/mach-davinci/include/mach/aemif.h b/arch/arm/mach-davinci/include/mach/aemif.h
index 05b2934..f3bbec6 100644
--- a/arch/arm/mach-davinci/include/mach/aemif.h
+++ b/arch/arm/mach-davinci/include/mach/aemif.h
@@ -33,4 +33,5 @@ struct davinci_aemif_timing {
int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
void __iomem *base, unsigned cs);
+int davinci_aemif_setup_timing_of(struct device_node *np);
#endif
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 2/7] ARM: davinci: configure davinci aemif chipselects through OF
@ 2012-03-05 11:09 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:09 UTC (permalink / raw)
To: linux-arm-kernel
Add support for configuring the aemif timing registers
through device tree. Introduce new compatible property
"ti,davinci-cs", see full description in
Documentation/devicetree/bindings/arm/davinci/aemif.txt
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: davinci-linux-open-source at linux.davincidsp.com
Cc: devicetree-discuss at lists.ozlabs.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
---
- changes for v2
- add comment from Sergei Shtylyov:
- use of_property_read_u32()
- Conding Style changes
- add comment from Sekhar Nori:
- add patch description
- use davinci_aemif_setup_timing
- change compatible node to "ti,davinci-aemif"
- not moved to mfd, as mentioned in this discussion:
http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
instead use a phandle in the DTS, so drivers which
uses the davinci aemif, can call davinci_aemif_setup_timing_of()
This is just thought as an RFC ... The enbw_cmc board
support not really need to setup this bus timings, as
they are setup in U-Boot ... but I want to post this,
as I think, it is a nice to have ... as an example used
in the davinci nand controller OF support patch, in this
patchserie.
- no changes for v3
.../devicetree/bindings/arm/davinci/aemif.txt | 119 ++++++++++++++++++++
arch/arm/mach-davinci/aemif.c | 86 ++++++++++++++-
arch/arm/mach-davinci/include/mach/aemif.h | 1 +
3 files changed, 205 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
diff --git a/Documentation/devicetree/bindings/arm/davinci/aemif.txt b/Documentation/devicetree/bindings/arm/davinci/aemif.txt
new file mode 100644
index 0000000..0dbb842
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/davinci/aemif.txt
@@ -0,0 +1,119 @@
+* Texas Instruments Davinci AEMIF
+
+This file provides information, what the device node for the
+davinci aemif interface contain.
+
+Required properties:
+- compatible: "ti,davinci-aemif";
+- #address-cells : Should be either two or three. The first cell is the
+ chipselect number, and the remaining cells are the
+ offset into the chipselect.
+- #size-cells : Either one or two, depending on how large each chipselect
+ can be.
+- ranges : Each range corresponds to a single chipselect, and cover
+ the entire access window as configured.
+
+Optional properties:
+- none
+
+Optional subnodes:
+- Chipselect setup:
+ - compatible: "ti,davinci-cs";
+ - #address-cells = <1>;
+ - #size-cells = <1>;
+
+ Timing setup, all timings in nanoseconds
+ - cs: chipselect (value 2,3,4 or 5)
+ - asize: Asynchronous Data Bus Width.
+ value:
+ 0: 8 bit
+ 1: 16 bit
+ - ta: Minimum Turn-Around time.
+ - rhold: Read hold width
+ - rstrobe: Read strobe width
+ - rsetup: Read setup width
+ - whold: Write hold width
+ - wstrobe: Write strobe width
+ - wsetup: Write setup width
+ - ew: Extend Wait bit
+ value:
+ 0: Extended wait cycles disabled.
+ 1: Extended wait cycles enabled.
+ - ss: Select Strobe bit.
+ value:
+ 0: Normal Mode enabled.
+ 1: Select Strobe Mode enabled.
+- CFI driver:
+ see: Documentation/devicetree/bindings/mtd/mtd-physmap.txt
+
+Example (enbw_cmc board):
+ aemif at 60000000 {
+ compatible = "ti,davinci-aemif";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <0x68000000 0x80000>;
+ ranges = <2 0 0x60000000 0x02000000
+ 3 0 0x62000000 0x02000000
+ 4 0 0x64000000 0x02000000
+ 5 0 0x66000000 0x02000000
+ 6 0 0x68000000 0x02000000>;
+ cs2 at 68000000 {
+ compatible = "ti,davinci-cs";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* all timings in nanoseconds */
+ cs = <2>;
+ asize = <1>;
+ ta = <0>;
+ rhold = <7>;
+ rstrobe = <42>;
+ rsetup = <14>;
+ whold = <7>;
+ wstrobe = <42>;
+ wsetup = <14>;
+ ew = <0>;
+ ss = <0>;
+ };
+ flash at 2,0 {
+ compatible = "cfi-flash";
+ reg = <2 0x0 0x400000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bank-width = <2>;
+ device-width = <2>;
+ };
+ nand_cs: cs3 at 68000000 {
+ compatible = "ti,davinci-cs";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* all timings in nanoseconds */
+ cs = <3>;
+ asize = <0>;
+ ta = <0>;
+ rhold = <7>;
+ rstrobe = <42>;
+ rsetup = <7>;
+ whold = <7>;
+ wstrobe = <14>;
+ wsetup = <7>;
+ ew = <0>;
+ ss = <0>;
+ };
+ nandflash at 3,0 {
+ compatible = "ti,davinci-nand";
+ reg = <3 0x0 0x807ff
+ 6 0x0 0x8000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ mask_ale = <0>;
+ mask_cle = <0>;
+ mask_chipsel = <0>;
+ ecc_mode = <2>;
+ ecc_bits = <4>;
+ options = <0>;
+ bbt_options = <0x20000>;
+ pinmux-handle = <&nand_pins>;
+ timing-handle = <&nand_cs>;
+ };
+
+ };
diff --git a/arch/arm/mach-davinci/aemif.c b/arch/arm/mach-davinci/aemif.c
index 1ce70a9..e3d94a5 100644
--- a/arch/arm/mach-davinci/aemif.c
+++ b/arch/arm/mach-davinci/aemif.c
@@ -13,12 +13,14 @@
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include <linux/time.h>
#include <mach/aemif.h>
/* Timing value configuration */
-
+#define ASIZE(x) (x)
#define TA(x) ((x) << 2)
#define RHOLD(x) ((x) << 4)
#define RSTROBE(x) ((x) << 7)
@@ -26,7 +28,10 @@
#define WHOLD(x) ((x) << 17)
#define WSTROBE(x) ((x) << 20)
#define WSETUP(x) ((x) << 26)
+#define EW(x) ((x) << 30)
+#define SS(x) ((x) << 31)
+#define ASIZE_MAX 0x1
#define TA_MAX 0x3
#define RHOLD_MAX 0x7
#define RSTROBE_MAX 0x3f
@@ -34,6 +39,8 @@
#define WHOLD_MAX 0x7
#define WSTROBE_MAX 0x3f
#define WSETUP_MAX 0xf
+#define EW_MAX 0x1
+#define SS_MAX 0x1
#define TIMING_MASK (TA(TA_MAX) | \
RHOLD(RHOLD_MAX) | \
@@ -131,3 +138,80 @@ int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
return 0;
}
EXPORT_SYMBOL(davinci_aemif_setup_timing);
+
+#if defined(CONFIG_OF)
+static int dv_get_value(struct device_node *np, const char *name)
+{
+ u32 data;
+ int ret;
+
+ ret = of_property_read_u32(np, name, &data);
+ if (ret != 0)
+ return ret;
+
+ return data;
+}
+
+int davinci_aemif_setup_timing_of(struct device_node *np)
+{
+ struct device_node *parent;
+ struct davinci_aemif_timing t;
+ void __iomem *base;
+ unsigned val;
+ int asize, ew, ss;
+ int cs;
+ unsigned offset;
+ int ret;
+
+ if (!np)
+ return -ENODEV;
+
+ parent = np->parent;
+ if (!np)
+ return -ENODEV;
+
+ base = of_iomap(parent, 0);
+ if (!base)
+ return -EINVAL;
+
+ cs = dv_get_value(np, "cs");
+ if (cs < 2)
+ return -EINVAL;
+
+ t.ta = dv_get_value(np, "ta");
+ t.rhold = dv_get_value(np, "rhold");
+ t.rstrobe = dv_get_value(np, "rstrobe");
+ t.rsetup = dv_get_value(np, "rsetup");
+ t.whold = dv_get_value(np, "whold");
+ t.wstrobe = dv_get_value(np, "wstrobe");
+ t.wsetup = dv_get_value(np, "wsetup");
+
+ ret = davinci_aemif_setup_timing(&t, base, cs);
+ if (ret != 0)
+ return ret;
+
+ /* setup none timing paramters */
+ offset = A1CR_OFFSET + cs * 4;
+ asize = dv_get_value(np, "asize");
+ ew = dv_get_value(np, "ew");
+ ss = dv_get_value(np, "ss");
+ val = __raw_readl(base + offset);
+ val &= TIMING_MASK;
+ val |= (asize & ACR_ASIZE_MASK);
+ if (ew)
+ val |= ACR_EW_MASK;
+ if (ss)
+ val |= ACR_SS_MASK;
+
+ __raw_writel(val, base + offset);
+
+ iounmap(base);
+ return 0;
+}
+#else
+int davinci_aemif_setup_timing_of(struct device_node *np)
+{
+ return 0;
+}
+#endif
+EXPORT_SYMBOL(davinci_aemif_setup_timing_of);
diff --git a/arch/arm/mach-davinci/include/mach/aemif.h b/arch/arm/mach-davinci/include/mach/aemif.h
index 05b2934..f3bbec6 100644
--- a/arch/arm/mach-davinci/include/mach/aemif.h
+++ b/arch/arm/mach-davinci/include/mach/aemif.h
@@ -33,4 +33,5 @@ struct davinci_aemif_timing {
int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
void __iomem *base, unsigned cs);
+int davinci_aemif_setup_timing_of(struct device_node *np);
#endif
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 3/7] ARM: davinci: mux: add OF support
2012-03-05 11:09 ` Heiko Schocher
@ 2012-03-05 11:10 ` Heiko Schocher
-1 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:10 UTC (permalink / raw)
To: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/
Cc: Wolfgang Denk, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
Grant Likely, Heiko Schocher,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
add support for configuring the pinmux on davinci SoC
through OF.
Signed-off-by: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Cc: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Cc: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
---
This patch is just a RFC, as I want to get rid of the pin
setup code in board code ... This patch introduces a
davinci_cfg_reg_of() function, which davinci drivers can call,
if they found a pinmux-handle, so used in the following
drivers in this patchserie:
drivers/net/ethernet/ti/davinci_emac
drivers/i2c/busses/i2c-davinci.c
drivers/mtd/nand/davinci_nand.c
Comments are welcome.
- no changes for v2
- no changes for v3
.../devicetree/bindings/arm/davinci/mux.txt | 40 +++++++++++
arch/arm/mach-davinci/include/mach/mux.h | 2 +
arch/arm/mach-davinci/mux.c | 73 +++++++++++++++++++-
3 files changed, 114 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
diff --git a/Documentation/devicetree/bindings/arm/davinci/mux.txt b/Documentation/devicetree/bindings/arm/davinci/mux.txt
new file mode 100644
index 0000000..ecb026a
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/davinci/mux.txt
@@ -0,0 +1,40 @@
+* Texas Instruments Davinci pinmux
+
+This file provides information, what the device node for the
+davinci pinmux interface contain.
+
+Required properties:
+- compatible: "ti,davinci-pinmux";
+- pins : contains a table with the following colums:
+ mux register: pinmux register
+ register offset: offset in register, which to change
+ mode mask: mode mask
+ mode value: mode value
+
+Optional properties:
+- none
+
+Example (enbw_cmc board):
+ emac_pins: pinmux@1c14120 {
+ compatible = "ti,davinci-pinmux";
+ reg = <0x14120 0x1000>;
+ pins = < /* muxreg maskoff modemsk muxmode */
+ 2 4 15 8 /* MII TXEN */
+ 2 8 15 8 /* MII TXCLK */
+ 2 12 15 8 /* MII COL */
+ 2 16 15 8 /* MII TXD_3 */
+ 2 20 15 8 /* MII TXD_2 */
+ 2 24 15 8 /* MII TXD_1 */
+ 2 28 15 8 /* MII TXD_0 */
+ 3 8 15 8 /* MII RXER */
+ 3 12 15 8 /* MII CRS */
+ 3 0 15 8 /* MII RXCLK */
+ 3 4 15 8 /* MII RXDV */
+ 3 16 15 8 /* MII RXD_3 */
+ 3 20 15 8 /* MII RXD_2 */
+ 3 24 15 8 /* MII RXD_1 */
+ 3 28 15 8 /* MII RXD_0 */
+ 4 0 15 8 /* MDIO CLK */
+ 4 4 15 8 /* MDIO D */
+ >;
+ };
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index a7e92fc..3a62857 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -1205,6 +1205,7 @@ enum davinci_tnetv107x_index {
/* setup pin muxing */
extern int davinci_cfg_reg(unsigned long reg_cfg);
extern int davinci_cfg_reg_list(const short pins[]);
+extern int davinci_cfg_reg_of(struct device_node *);
#else
/* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */
static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; }
@@ -1212,6 +1213,7 @@ static inline int davinci_cfg_reg_list(const short pins[])
{
return 0;
}
+static int davinci_cfg_reg_of(struct device_node *) { return 0; };
#endif
#endif /* __INC_MACH_MUX_H */
diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c
index f34a8dc..6b38072 100644
--- a/arch/arm/mach-davinci/mux.c
+++ b/arch/arm/mach-davinci/mux.c
@@ -18,18 +18,21 @@
#include <linux/io.h>
#include <linux/module.h>
#include <linux/spinlock.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
#include <mach/mux.h>
#include <mach/common.h>
static void __iomem *pinmux_base;
+static DEFINE_SPINLOCK(mux_spin_lock);
/*
* Sets the DAVINCI MUX register based on the table
*/
int __init_or_module davinci_cfg_reg(const unsigned long index)
{
- static DEFINE_SPINLOCK(mux_spin_lock);
struct davinci_soc_info *soc_info = &davinci_soc_info;
unsigned long flags;
const struct mux_config *cfg;
@@ -98,6 +101,74 @@ int __init_or_module davinci_cfg_reg(const unsigned long index)
}
EXPORT_SYMBOL(davinci_cfg_reg);
+#ifdef CONFIG_OF
+int davinci_cfg_reg_of(struct device_node *np)
+{
+ unsigned long flags;
+ int pinmux_map_len;
+ const unsigned int *pinmux_map;
+ u32 muxreg, maskoff, modemsk, muxmode;
+ unsigned int reg_orig = 0, reg = 0;
+ unsigned int mask, warn = 0;
+
+ pinmux_map = of_get_property(np, "pins", &pinmux_map_len);
+ if (pinmux_map == NULL) {
+ printk(KERN_ERR "pins is not set!\n");
+ return -EINVAL;
+ }
+
+ pinmux_map_len /= sizeof(unsigned int);
+ if ((pinmux_map_len % 4) != 0) {
+ printk(KERN_ERR "pins format wrong!\n");
+ return -EINVAL;
+ }
+
+ if (!pinmux_base) {
+ pinmux_base = of_iomap(np, 0);
+ if (WARN_ON(!pinmux_base))
+ return -ENOMEM;
+ }
+
+ while (pinmux_map_len > 0) {
+ muxreg = be32_to_cpu(pinmux_map[0]);
+ maskoff = be32_to_cpu(pinmux_map[1]);
+ modemsk = be32_to_cpu(pinmux_map[2]);
+ muxmode = be32_to_cpu(pinmux_map[3]);
+
+ /* Update the mux register in question */
+ if (modemsk) {
+ unsigned tmp1, tmp2;
+
+ spin_lock_irqsave(&mux_spin_lock, flags);
+ reg_orig = __raw_readl(pinmux_base + muxreg);
+
+ mask = (modemsk << maskoff);
+ tmp1 = reg_orig & mask;
+ reg = reg_orig & ~mask;
+
+ tmp2 = (muxmode << maskoff);
+ reg |= tmp2;
+
+ if (tmp1 != tmp2)
+ warn = 1;
+
+ __raw_writel(reg, pinmux_base + muxreg);
+ spin_unlock_irqrestore(&mux_spin_lock, flags);
+ }
+ pinmux_map += 4;
+ pinmux_map_len -= 4;
+ }
+
+ return 0;
+}
+#else
+int davinci_cfg_reg_of(struct device_node *np)
+{
+ return 0;
+}
+#endif
+EXPORT_SYMBOL(davinci_cfg_reg_of);
+
int __init_or_module davinci_cfg_reg_list(const short pins[])
{
int i, error = -EINVAL;
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 3/7] ARM: davinci: mux: add OF support
@ 2012-03-05 11:10 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:10 UTC (permalink / raw)
To: linux-arm-kernel
add support for configuring the pinmux on davinci SoC
through OF.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: davinci-linux-open-source at linux.davincidsp.com
Cc: linux-arm-kernel at lists.infradead.org
Cc: devicetree-discuss at lists.ozlabs.org
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
---
This patch is just a RFC, as I want to get rid of the pin
setup code in board code ... This patch introduces a
davinci_cfg_reg_of() function, which davinci drivers can call,
if they found a pinmux-handle, so used in the following
drivers in this patchserie:
drivers/net/ethernet/ti/davinci_emac
drivers/i2c/busses/i2c-davinci.c
drivers/mtd/nand/davinci_nand.c
Comments are welcome.
- no changes for v2
- no changes for v3
.../devicetree/bindings/arm/davinci/mux.txt | 40 +++++++++++
arch/arm/mach-davinci/include/mach/mux.h | 2 +
arch/arm/mach-davinci/mux.c | 73 +++++++++++++++++++-
3 files changed, 114 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
diff --git a/Documentation/devicetree/bindings/arm/davinci/mux.txt b/Documentation/devicetree/bindings/arm/davinci/mux.txt
new file mode 100644
index 0000000..ecb026a
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/davinci/mux.txt
@@ -0,0 +1,40 @@
+* Texas Instruments Davinci pinmux
+
+This file provides information, what the device node for the
+davinci pinmux interface contain.
+
+Required properties:
+- compatible: "ti,davinci-pinmux";
+- pins : contains a table with the following colums:
+ mux register: pinmux register
+ register offset: offset in register, which to change
+ mode mask: mode mask
+ mode value: mode value
+
+Optional properties:
+- none
+
+Example (enbw_cmc board):
+ emac_pins: pinmux at 1c14120 {
+ compatible = "ti,davinci-pinmux";
+ reg = <0x14120 0x1000>;
+ pins = < /* muxreg maskoff modemsk muxmode */
+ 2 4 15 8 /* MII TXEN */
+ 2 8 15 8 /* MII TXCLK */
+ 2 12 15 8 /* MII COL */
+ 2 16 15 8 /* MII TXD_3 */
+ 2 20 15 8 /* MII TXD_2 */
+ 2 24 15 8 /* MII TXD_1 */
+ 2 28 15 8 /* MII TXD_0 */
+ 3 8 15 8 /* MII RXER */
+ 3 12 15 8 /* MII CRS */
+ 3 0 15 8 /* MII RXCLK */
+ 3 4 15 8 /* MII RXDV */
+ 3 16 15 8 /* MII RXD_3 */
+ 3 20 15 8 /* MII RXD_2 */
+ 3 24 15 8 /* MII RXD_1 */
+ 3 28 15 8 /* MII RXD_0 */
+ 4 0 15 8 /* MDIO CLK */
+ 4 4 15 8 /* MDIO D */
+ >;
+ };
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index a7e92fc..3a62857 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -1205,6 +1205,7 @@ enum davinci_tnetv107x_index {
/* setup pin muxing */
extern int davinci_cfg_reg(unsigned long reg_cfg);
extern int davinci_cfg_reg_list(const short pins[]);
+extern int davinci_cfg_reg_of(struct device_node *);
#else
/* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */
static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; }
@@ -1212,6 +1213,7 @@ static inline int davinci_cfg_reg_list(const short pins[])
{
return 0;
}
+static int davinci_cfg_reg_of(struct device_node *) { return 0; };
#endif
#endif /* __INC_MACH_MUX_H */
diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c
index f34a8dc..6b38072 100644
--- a/arch/arm/mach-davinci/mux.c
+++ b/arch/arm/mach-davinci/mux.c
@@ -18,18 +18,21 @@
#include <linux/io.h>
#include <linux/module.h>
#include <linux/spinlock.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
#include <mach/mux.h>
#include <mach/common.h>
static void __iomem *pinmux_base;
+static DEFINE_SPINLOCK(mux_spin_lock);
/*
* Sets the DAVINCI MUX register based on the table
*/
int __init_or_module davinci_cfg_reg(const unsigned long index)
{
- static DEFINE_SPINLOCK(mux_spin_lock);
struct davinci_soc_info *soc_info = &davinci_soc_info;
unsigned long flags;
const struct mux_config *cfg;
@@ -98,6 +101,74 @@ int __init_or_module davinci_cfg_reg(const unsigned long index)
}
EXPORT_SYMBOL(davinci_cfg_reg);
+#ifdef CONFIG_OF
+int davinci_cfg_reg_of(struct device_node *np)
+{
+ unsigned long flags;
+ int pinmux_map_len;
+ const unsigned int *pinmux_map;
+ u32 muxreg, maskoff, modemsk, muxmode;
+ unsigned int reg_orig = 0, reg = 0;
+ unsigned int mask, warn = 0;
+
+ pinmux_map = of_get_property(np, "pins", &pinmux_map_len);
+ if (pinmux_map == NULL) {
+ printk(KERN_ERR "pins is not set!\n");
+ return -EINVAL;
+ }
+
+ pinmux_map_len /= sizeof(unsigned int);
+ if ((pinmux_map_len % 4) != 0) {
+ printk(KERN_ERR "pins format wrong!\n");
+ return -EINVAL;
+ }
+
+ if (!pinmux_base) {
+ pinmux_base = of_iomap(np, 0);
+ if (WARN_ON(!pinmux_base))
+ return -ENOMEM;
+ }
+
+ while (pinmux_map_len > 0) {
+ muxreg = be32_to_cpu(pinmux_map[0]);
+ maskoff = be32_to_cpu(pinmux_map[1]);
+ modemsk = be32_to_cpu(pinmux_map[2]);
+ muxmode = be32_to_cpu(pinmux_map[3]);
+
+ /* Update the mux register in question */
+ if (modemsk) {
+ unsigned tmp1, tmp2;
+
+ spin_lock_irqsave(&mux_spin_lock, flags);
+ reg_orig = __raw_readl(pinmux_base + muxreg);
+
+ mask = (modemsk << maskoff);
+ tmp1 = reg_orig & mask;
+ reg = reg_orig & ~mask;
+
+ tmp2 = (muxmode << maskoff);
+ reg |= tmp2;
+
+ if (tmp1 != tmp2)
+ warn = 1;
+
+ __raw_writel(reg, pinmux_base + muxreg);
+ spin_unlock_irqrestore(&mux_spin_lock, flags);
+ }
+ pinmux_map += 4;
+ pinmux_map_len -= 4;
+ }
+
+ return 0;
+}
+#else
+int davinci_cfg_reg_of(struct device_node *np)
+{
+ return 0;
+}
+#endif
+EXPORT_SYMBOL(davinci_cfg_reg_of);
+
int __init_or_module davinci_cfg_reg_list(const short pins[])
{
int i, error = -EINVAL;
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 4/7] ARM: davinci: net: davinci_emac: add OF support
2012-03-05 11:09 ` Heiko Schocher
@ 2012-03-05 11:10 ` Heiko Schocher
-1 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:10 UTC (permalink / raw)
To: davinci-linux-open-source
Cc: Heiko Schocher, linux-arm-kernel, devicetree-discuss, netdev,
Grant Likely, Sekhar Nori, Wolfgang Denk, Anatoly Sivov
add of support for the davinci_emac driver.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: netdev@vger.kernel.org
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Anatoly Sivov <mm05@mail.ru>
---
- changes for v2:
- add comment from Anatoly Sivov
- fix typo in davinci_emac.txt
- add comment from Grant Likely:
- add prefix "ti,davinci-" to davinci specific property names
- remove version property
- use compatible name "ti,davinci-dm6460-emac"
- use devm_kzalloc()
- use of_match_ptr()
- document all new properties
- remove of_address_to_resource() and do not overwrite
resource table
- whitespace fixes
- remove hw_ram_addr as it is not used in current
board code
- no changes for v3
.../bindings/arm/davinci/davinci_emac.txt | 43 +++++++++
drivers/net/ethernet/ti/davinci_emac.c | 94 +++++++++++++++++++-
2 files changed, 136 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
diff --git a/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt b/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
new file mode 100644
index 0000000..a7b0911
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
@@ -0,0 +1,43 @@
+* Texas Instruments Davinci EMAC
+
+This file provides information, what the device node
+for the davinci_emac interface contain.
+
+Required properties:
+- compatible: "ti,davinci-dm6460-emac";
+- reg: Offset and length of the register set for the device
+- ti,davinci-ctrl-reg-offset: offset to control register
+- ti,davinci-ctrl-mod-reg-offset: offset to control module register
+- ti,davinci-ctrl-ram-offset: offset to control module ram
+- ti,davinci-ctrl-ram-size: size of control module ram
+- ti,davinci-rmii-en: use RMII
+- ti,davinci-no-bd-ram: has the emac controller BD RAM
+- phy-handle: Contains a phandle to an Ethernet PHY.
+ if not, davinci_emac driver defaults to 100/FULL
+- interrupts: interrupt mapping for the davinci emac interrupts sources:
+ 4 sources: <Receive Threshold Interrupt
+ Receive Interrupt
+ Transmit Interrupt
+ Miscellaneous Interrupt>
+- pinmux-handle: Contains a handle to configure the pinmux settings.
+
+Optional properties:
+- local-mac-address : 6 bytes, mac address
+
+Example (enbw_cmc board):
+ eth0: emac@1e20000 {
+ compatible = "ti,davinci-dm6460-emac";
+ reg = <0x220000 0x4000>;
+ ti,davinci-ctrl-reg-offset = <0x3000>;
+ ti,davinci-ctrl-mod-reg-offset = <0x2000>;
+ ti,davinci-ctrl-ram-offset = <0>;
+ ti,davinci-ctrl-ram-size = <0x2000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <33
+ 34
+ 35
+ 36
+ >;
+ interrupt-parent = <&intc>;
+ pinmux-handle = <&emac_pins>;
+ };
diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c
index 4fa0bcb..56e1c35 100644
--- a/drivers/net/ethernet/ti/davinci_emac.c
+++ b/drivers/net/ethernet/ti/davinci_emac.c
@@ -58,6 +58,12 @@
#include <linux/io.h>
#include <linux/uaccess.h>
#include <linux/davinci_emac.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_net.h>
+
+#include <mach/mux.h>
#include <asm/irq.h>
#include <asm/page.h>
@@ -339,6 +345,9 @@ struct emac_priv {
u32 rx_addr_type;
atomic_t cur_tx;
const char *phy_id;
+#ifdef CONFIG_OF
+ struct device_node *phy_node;
+#endif
struct phy_device *phydev;
spinlock_t lock;
/*platform specific members*/
@@ -1760,6 +1769,82 @@ static const struct net_device_ops emac_netdev_ops = {
#endif
};
+#ifdef CONFIG_OF
+static struct emac_platform_data
+ *davinci_emac_of_get_pdata(struct platform_device *pdev,
+ struct emac_priv *priv)
+{
+ struct device_node *np;
+ struct device_node *pinmux_np;
+ struct emac_platform_data *pdata = NULL;
+ const u8 *mac_addr;
+ u32 data;
+ int ret;
+ int version;
+
+ np = pdev->dev.of_node;
+ if (!np)
+ goto nodata;
+ else
+ version = EMAC_VERSION_2;
+
+ pdata = pdev->dev.platform_data;
+ if (!pdata) {
+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ goto nodata;
+ }
+ pdata->version = version;
+
+ mac_addr = of_get_mac_address(np);
+ if (mac_addr)
+ memcpy(pdata->mac_addr, mac_addr, ETH_ALEN);
+
+ ret = of_property_read_u32(np, "ti,davinci-ctrl-reg-offset", &data);
+ if (!ret)
+ pdata->ctrl_reg_offset = data;
+
+ ret = of_property_read_u32(np, "ti,davinci-ctrl-mod-reg-offset",
+ &data);
+ if (!ret)
+ pdata->ctrl_mod_reg_offset = data;
+
+ ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-offset", &data);
+ if (!ret)
+ pdata->ctrl_ram_offset = data;
+
+ ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-size", &data);
+ if (!ret)
+ pdata->ctrl_ram_size = data;
+
+ ret = of_property_read_u32(np, "ti,davinci-rmii-en", &data);
+ if (!ret)
+ pdata->rmii_en = data;
+
+ ret = of_property_read_u32(np, "ti,davinci-no-bd-ram", &data);
+ if (!ret)
+ pdata->no_bd_ram = data;
+
+ priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
+ if (!priv->phy_node)
+ pdata->phy_id = "";
+
+ pinmux_np = of_parse_phandle(np, "pinmux-handle", 0);
+ if (pinmux_np)
+ davinci_cfg_reg_of(pinmux_np);
+
+ pdev->dev.platform_data = pdata;
+nodata:
+ return pdata;
+}
+#else
+static struct emac_platform_data
+ *davinci_emac_of_get_pdata(struct platform_device *pdev,
+ struct emac_priv *priv)
+{
+ return pdev->dev.platform_data;
+}
+#endif
/**
* davinci_emac_probe: EMAC device probe
* @pdev: The DaVinci EMAC device that we are removing
@@ -1803,7 +1888,7 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
spin_lock_init(&priv->lock);
- pdata = pdev->dev.platform_data;
+ pdata = davinci_emac_of_get_pdata(pdev, priv);
if (!pdata) {
dev_err(&pdev->dev, "no platform data\n");
rc = -ENODEV;
@@ -2013,6 +2098,12 @@ static const struct dev_pm_ops davinci_emac_pm_ops = {
.resume = davinci_emac_resume,
};
+static const struct of_device_id davinci_emac_of_match[] = {
+ {.compatible = "ti,davinci-dm6460-emac", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, davinci_emac_of_match);
+
/**
* davinci_emac_driver: EMAC platform driver structure
*/
@@ -2021,6 +2112,7 @@ static struct platform_driver davinci_emac_driver = {
.name = "davinci_emac",
.owner = THIS_MODULE,
.pm = &davinci_emac_pm_ops,
+ .of_match_table = of_match_ptr(davinci_emac_of_match),
},
.probe = davinci_emac_probe,
.remove = __devexit_p(davinci_emac_remove),
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 4/7] ARM: davinci: net: davinci_emac: add OF support
@ 2012-03-05 11:10 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:10 UTC (permalink / raw)
To: linux-arm-kernel
add of support for the davinci_emac driver.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: davinci-linux-open-source at linux.davincidsp.com
Cc: linux-arm-kernel at lists.infradead.org
Cc: devicetree-discuss at lists.ozlabs.org
Cc: netdev at vger.kernel.org
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Anatoly Sivov <mm05@mail.ru>
---
- changes for v2:
- add comment from Anatoly Sivov
- fix typo in davinci_emac.txt
- add comment from Grant Likely:
- add prefix "ti,davinci-" to davinci specific property names
- remove version property
- use compatible name "ti,davinci-dm6460-emac"
- use devm_kzalloc()
- use of_match_ptr()
- document all new properties
- remove of_address_to_resource() and do not overwrite
resource table
- whitespace fixes
- remove hw_ram_addr as it is not used in current
board code
- no changes for v3
.../bindings/arm/davinci/davinci_emac.txt | 43 +++++++++
drivers/net/ethernet/ti/davinci_emac.c | 94 +++++++++++++++++++-
2 files changed, 136 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
diff --git a/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt b/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
new file mode 100644
index 0000000..a7b0911
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
@@ -0,0 +1,43 @@
+* Texas Instruments Davinci EMAC
+
+This file provides information, what the device node
+for the davinci_emac interface contain.
+
+Required properties:
+- compatible: "ti,davinci-dm6460-emac";
+- reg: Offset and length of the register set for the device
+- ti,davinci-ctrl-reg-offset: offset to control register
+- ti,davinci-ctrl-mod-reg-offset: offset to control module register
+- ti,davinci-ctrl-ram-offset: offset to control module ram
+- ti,davinci-ctrl-ram-size: size of control module ram
+- ti,davinci-rmii-en: use RMII
+- ti,davinci-no-bd-ram: has the emac controller BD RAM
+- phy-handle: Contains a phandle to an Ethernet PHY.
+ if not, davinci_emac driver defaults to 100/FULL
+- interrupts: interrupt mapping for the davinci emac interrupts sources:
+ 4 sources: <Receive Threshold Interrupt
+ Receive Interrupt
+ Transmit Interrupt
+ Miscellaneous Interrupt>
+- pinmux-handle: Contains a handle to configure the pinmux settings.
+
+Optional properties:
+- local-mac-address : 6 bytes, mac address
+
+Example (enbw_cmc board):
+ eth0: emac at 1e20000 {
+ compatible = "ti,davinci-dm6460-emac";
+ reg = <0x220000 0x4000>;
+ ti,davinci-ctrl-reg-offset = <0x3000>;
+ ti,davinci-ctrl-mod-reg-offset = <0x2000>;
+ ti,davinci-ctrl-ram-offset = <0>;
+ ti,davinci-ctrl-ram-size = <0x2000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <33
+ 34
+ 35
+ 36
+ >;
+ interrupt-parent = <&intc>;
+ pinmux-handle = <&emac_pins>;
+ };
diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c
index 4fa0bcb..56e1c35 100644
--- a/drivers/net/ethernet/ti/davinci_emac.c
+++ b/drivers/net/ethernet/ti/davinci_emac.c
@@ -58,6 +58,12 @@
#include <linux/io.h>
#include <linux/uaccess.h>
#include <linux/davinci_emac.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_net.h>
+
+#include <mach/mux.h>
#include <asm/irq.h>
#include <asm/page.h>
@@ -339,6 +345,9 @@ struct emac_priv {
u32 rx_addr_type;
atomic_t cur_tx;
const char *phy_id;
+#ifdef CONFIG_OF
+ struct device_node *phy_node;
+#endif
struct phy_device *phydev;
spinlock_t lock;
/*platform specific members*/
@@ -1760,6 +1769,82 @@ static const struct net_device_ops emac_netdev_ops = {
#endif
};
+#ifdef CONFIG_OF
+static struct emac_platform_data
+ *davinci_emac_of_get_pdata(struct platform_device *pdev,
+ struct emac_priv *priv)
+{
+ struct device_node *np;
+ struct device_node *pinmux_np;
+ struct emac_platform_data *pdata = NULL;
+ const u8 *mac_addr;
+ u32 data;
+ int ret;
+ int version;
+
+ np = pdev->dev.of_node;
+ if (!np)
+ goto nodata;
+ else
+ version = EMAC_VERSION_2;
+
+ pdata = pdev->dev.platform_data;
+ if (!pdata) {
+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ goto nodata;
+ }
+ pdata->version = version;
+
+ mac_addr = of_get_mac_address(np);
+ if (mac_addr)
+ memcpy(pdata->mac_addr, mac_addr, ETH_ALEN);
+
+ ret = of_property_read_u32(np, "ti,davinci-ctrl-reg-offset", &data);
+ if (!ret)
+ pdata->ctrl_reg_offset = data;
+
+ ret = of_property_read_u32(np, "ti,davinci-ctrl-mod-reg-offset",
+ &data);
+ if (!ret)
+ pdata->ctrl_mod_reg_offset = data;
+
+ ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-offset", &data);
+ if (!ret)
+ pdata->ctrl_ram_offset = data;
+
+ ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-size", &data);
+ if (!ret)
+ pdata->ctrl_ram_size = data;
+
+ ret = of_property_read_u32(np, "ti,davinci-rmii-en", &data);
+ if (!ret)
+ pdata->rmii_en = data;
+
+ ret = of_property_read_u32(np, "ti,davinci-no-bd-ram", &data);
+ if (!ret)
+ pdata->no_bd_ram = data;
+
+ priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
+ if (!priv->phy_node)
+ pdata->phy_id = "";
+
+ pinmux_np = of_parse_phandle(np, "pinmux-handle", 0);
+ if (pinmux_np)
+ davinci_cfg_reg_of(pinmux_np);
+
+ pdev->dev.platform_data = pdata;
+nodata:
+ return pdata;
+}
+#else
+static struct emac_platform_data
+ *davinci_emac_of_get_pdata(struct platform_device *pdev,
+ struct emac_priv *priv)
+{
+ return pdev->dev.platform_data;
+}
+#endif
/**
* davinci_emac_probe: EMAC device probe
* @pdev: The DaVinci EMAC device that we are removing
@@ -1803,7 +1888,7 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
spin_lock_init(&priv->lock);
- pdata = pdev->dev.platform_data;
+ pdata = davinci_emac_of_get_pdata(pdev, priv);
if (!pdata) {
dev_err(&pdev->dev, "no platform data\n");
rc = -ENODEV;
@@ -2013,6 +2098,12 @@ static const struct dev_pm_ops davinci_emac_pm_ops = {
.resume = davinci_emac_resume,
};
+static const struct of_device_id davinci_emac_of_match[] = {
+ {.compatible = "ti,davinci-dm6460-emac", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, davinci_emac_of_match);
+
/**
* davinci_emac_driver: EMAC platform driver structure
*/
@@ -2021,6 +2112,7 @@ static struct platform_driver davinci_emac_driver = {
.name = "davinci_emac",
.owner = THIS_MODULE,
.pm = &davinci_emac_pm_ops,
+ .of_match_table = of_match_ptr(davinci_emac_of_match),
},
.probe = davinci_emac_probe,
.remove = __devexit_p(davinci_emac_remove),
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 5/7] ARM: davinci: i2c: add OF support
2012-03-05 11:09 ` Heiko Schocher
@ 2012-03-05 11:10 ` Heiko Schocher
-1 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:10 UTC (permalink / raw)
To: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/
Cc: Heiko Schocher,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, Ben Dooks, Wolfram Sang,
Grant Likely, Sekhar Nori, Wolfgang Denk, Sylwester Nawrocki
add of support for the davinci i2c driver.
Signed-off-by: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Cc: linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>
Cc: Wolfram Sang <w.sang-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Cc: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Cc: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
Cc: Sylwester Nawrocki <s.nawrocki-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
- changes for v2:
- add comments from Sylwester Nawrocki <s.nawrocki-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>:
- use "cell-index" instead "id"
- OF_DEV_AUXDATA in the machine code, instead pre-define platform
device name
- add comment from Grant Likely:
- removed "id" resp. "cell-index" completely
- fixed documentation
- use of_match_ptr()
- use devm_kzalloc() for allocating plattform data mem
- fixed a whitespace issue
- no changes for v3
.../devicetree/bindings/arm/davinci/i2c.txt | 33 +++++++++++++++++
drivers/i2c/busses/i2c-davinci.c | 37 ++++++++++++++++++++
2 files changed, 70 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
diff --git a/Documentation/devicetree/bindings/arm/davinci/i2c.txt b/Documentation/devicetree/bindings/arm/davinci/i2c.txt
new file mode 100644
index 0000000..ba00d7b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/davinci/i2c.txt
@@ -0,0 +1,33 @@
+* Texas Instruments Davinci I2C
+
+This file provides information, what the device node for the
+davinci i2c interface contain.
+
+Required properties:
+- compatible: "ti,davinci-i2c";
+- reg : Offset and length of the register set for the device
+
+Recommended properties :
+- interrupts : <a> standard interrupt property.
+- clock-frequency : desired I2C bus clock frequency in Hz.
+
+Optional properties:
+- bus-delay: bus delay in usec
+- pinmux-handle: Contains a handle to configure the pinmux settings.
+
+Example (enbw_cmc board):
+ i2c@1c22000 {
+ compatible = "ti,davinci-i2c";
+ reg = <0x22000 0x1000>;
+ clock-frequency = <100000>;
+ interrupts = <15>;
+ interrupt-parent = <&intc>;
+ pinmux-handle = <&i2c1_pins>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dtt@48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ };
+ };
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index a76d85f..0d07d02 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -38,9 +38,12 @@
#include <linux/slab.h>
#include <linux/cpufreq.h>
#include <linux/gpio.h>
+#include <linux/of_i2c.h>
+#include <linux/of_device.h>
#include <mach/hardware.h>
#include <mach/i2c.h>
+#include <mach/mux.h>
/* ----- global defines ----------------------------------------------- */
@@ -635,6 +638,12 @@ static struct i2c_algorithm i2c_davinci_algo = {
.functionality = i2c_davinci_func,
};
+static const struct of_device_id davinci_i2c_of_match[] = {
+ {.compatible = "ti,davinci-i2c", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, davinci_i2c_of_match);
+
static int davinci_i2c_probe(struct platform_device *pdev)
{
struct davinci_i2c_dev *dev;
@@ -676,6 +685,31 @@ static int davinci_i2c_probe(struct platform_device *pdev)
dev->irq = irq->start;
platform_set_drvdata(pdev, dev);
+ if ((dev->dev->platform_data == NULL) &&
+ (pdev->dev.of_node)) {
+ struct device_node *pinmux_np;
+ struct davinci_i2c_platform_data *pdata;
+ u32 prop;
+
+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata) {
+ r = -ENOMEM;
+ goto err_free_mem;
+ }
+ memcpy(pdata, &davinci_i2c_platform_data_default,
+ sizeof(*pdata));
+ dev->dev->platform_data = pdata;
+ if (!of_property_read_u32(pdev->dev.of_node, "clock-frequency",
+ &prop))
+ pdata->bus_freq = prop / 1000;
+ if (!of_property_read_u32(pdev->dev.of_node, "bus-delay",
+ &prop))
+ pdata->bus_delay = prop;
+ pinmux_np = of_parse_phandle(pdev->dev.of_node,
+ "pinmux-handle", 0);
+ if (pinmux_np)
+ davinci_cfg_reg_of(pinmux_np);
+ }
dev->clk = clk_get(&pdev->dev, NULL);
if (IS_ERR(dev->clk)) {
r = -ENODEV;
@@ -711,6 +745,7 @@ static int davinci_i2c_probe(struct platform_device *pdev)
adap->algo = &i2c_davinci_algo;
adap->dev.parent = &pdev->dev;
adap->timeout = DAVINCI_I2C_TIMEOUT;
+ adap->dev.of_node = pdev->dev.of_node;
adap->nr = pdev->id;
r = i2c_add_numbered_adapter(adap);
@@ -718,6 +753,7 @@ static int davinci_i2c_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "failure adding adapter\n");
goto err_free_irq;
}
+ of_i2c_register_devices(adap);
return 0;
@@ -809,6 +845,7 @@ static struct platform_driver davinci_i2c_driver = {
.name = "i2c_davinci",
.owner = THIS_MODULE,
.pm = davinci_i2c_pm_ops,
+ .of_match_table = of_match_ptr(davinci_i2c_of_match),
},
};
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 5/7] ARM: davinci: i2c: add OF support
@ 2012-03-05 11:10 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:10 UTC (permalink / raw)
To: linux-arm-kernel
add of support for the davinci i2c driver.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: davinci-linux-open-source at linux.davincidsp.com
Cc: linux-arm-kernel at lists.infradead.org
Cc: devicetree-discuss at lists.ozlabs.org
Cc: linux-i2c at vger.kernel.org
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
---
- changes for v2:
- add comments from Sylwester Nawrocki <s.nawrocki@samsung.com>:
- use "cell-index" instead "id"
- OF_DEV_AUXDATA in the machine code, instead pre-define platform
device name
- add comment from Grant Likely:
- removed "id" resp. "cell-index" completely
- fixed documentation
- use of_match_ptr()
- use devm_kzalloc() for allocating plattform data mem
- fixed a whitespace issue
- no changes for v3
.../devicetree/bindings/arm/davinci/i2c.txt | 33 +++++++++++++++++
drivers/i2c/busses/i2c-davinci.c | 37 ++++++++++++++++++++
2 files changed, 70 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
diff --git a/Documentation/devicetree/bindings/arm/davinci/i2c.txt b/Documentation/devicetree/bindings/arm/davinci/i2c.txt
new file mode 100644
index 0000000..ba00d7b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/davinci/i2c.txt
@@ -0,0 +1,33 @@
+* Texas Instruments Davinci I2C
+
+This file provides information, what the device node for the
+davinci i2c interface contain.
+
+Required properties:
+- compatible: "ti,davinci-i2c";
+- reg : Offset and length of the register set for the device
+
+Recommended properties :
+- interrupts : <a> standard interrupt property.
+- clock-frequency : desired I2C bus clock frequency in Hz.
+
+Optional properties:
+- bus-delay: bus delay in usec
+- pinmux-handle: Contains a handle to configure the pinmux settings.
+
+Example (enbw_cmc board):
+ i2c at 1c22000 {
+ compatible = "ti,davinci-i2c";
+ reg = <0x22000 0x1000>;
+ clock-frequency = <100000>;
+ interrupts = <15>;
+ interrupt-parent = <&intc>;
+ pinmux-handle = <&i2c1_pins>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dtt at 48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ };
+ };
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index a76d85f..0d07d02 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -38,9 +38,12 @@
#include <linux/slab.h>
#include <linux/cpufreq.h>
#include <linux/gpio.h>
+#include <linux/of_i2c.h>
+#include <linux/of_device.h>
#include <mach/hardware.h>
#include <mach/i2c.h>
+#include <mach/mux.h>
/* ----- global defines ----------------------------------------------- */
@@ -635,6 +638,12 @@ static struct i2c_algorithm i2c_davinci_algo = {
.functionality = i2c_davinci_func,
};
+static const struct of_device_id davinci_i2c_of_match[] = {
+ {.compatible = "ti,davinci-i2c", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, davinci_i2c_of_match);
+
static int davinci_i2c_probe(struct platform_device *pdev)
{
struct davinci_i2c_dev *dev;
@@ -676,6 +685,31 @@ static int davinci_i2c_probe(struct platform_device *pdev)
dev->irq = irq->start;
platform_set_drvdata(pdev, dev);
+ if ((dev->dev->platform_data == NULL) &&
+ (pdev->dev.of_node)) {
+ struct device_node *pinmux_np;
+ struct davinci_i2c_platform_data *pdata;
+ u32 prop;
+
+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata) {
+ r = -ENOMEM;
+ goto err_free_mem;
+ }
+ memcpy(pdata, &davinci_i2c_platform_data_default,
+ sizeof(*pdata));
+ dev->dev->platform_data = pdata;
+ if (!of_property_read_u32(pdev->dev.of_node, "clock-frequency",
+ &prop))
+ pdata->bus_freq = prop / 1000;
+ if (!of_property_read_u32(pdev->dev.of_node, "bus-delay",
+ &prop))
+ pdata->bus_delay = prop;
+ pinmux_np = of_parse_phandle(pdev->dev.of_node,
+ "pinmux-handle", 0);
+ if (pinmux_np)
+ davinci_cfg_reg_of(pinmux_np);
+ }
dev->clk = clk_get(&pdev->dev, NULL);
if (IS_ERR(dev->clk)) {
r = -ENODEV;
@@ -711,6 +745,7 @@ static int davinci_i2c_probe(struct platform_device *pdev)
adap->algo = &i2c_davinci_algo;
adap->dev.parent = &pdev->dev;
adap->timeout = DAVINCI_I2C_TIMEOUT;
+ adap->dev.of_node = pdev->dev.of_node;
adap->nr = pdev->id;
r = i2c_add_numbered_adapter(adap);
@@ -718,6 +753,7 @@ static int davinci_i2c_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "failure adding adapter\n");
goto err_free_irq;
}
+ of_i2c_register_devices(adap);
return 0;
@@ -809,6 +845,7 @@ static struct platform_driver davinci_i2c_driver = {
.name = "i2c_davinci",
.owner = THIS_MODULE,
.pm = davinci_i2c_pm_ops,
+ .of_match_table = of_match_ptr(davinci_i2c_of_match),
},
};
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 6/7] ARM: mtd: nand: davinci: add OF support for davinci nand controller
2012-03-05 11:09 ` Heiko Schocher
(?)
@ 2012-03-05 11:10 ` Heiko Schocher
-1 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:10 UTC (permalink / raw)
To: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/
Cc: Wolfgang Denk, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
Sekhar Nori, linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Scott Wood, Heiko Schocher, David Woodhouse,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
add OF support for the davinci nand controller.
Signed-off-by: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Cc: linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
Cc: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Cc: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
Cc: Scott Wood <scottwood-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
- changes for v2:
- add comments from Scott Wood:
- add "ti,davinci-" prefix
- Dashes are preferred to underscores
- rename "nandflash" to "nand"
- introduce new "ti,davinci" specific properties for setting
up ecc_mode, ecc_bits, options and bbt options, instead
using linux defines
- readme fixes
- no changes for v3
.../devicetree/bindings/arm/davinci/nand.txt | 74 +++++++++++++++++
drivers/mtd/nand/davinci_nand.c | 85 +++++++++++++++++++-
2 files changed, 158 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
diff --git a/Documentation/devicetree/bindings/arm/davinci/nand.txt b/Documentation/devicetree/bindings/arm/davinci/nand.txt
new file mode 100644
index 0000000..e02874a
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/davinci/nand.txt
@@ -0,0 +1,74 @@
+* Texas Instruments Davinci NAND
+
+This file provides information, what the device node for the
+davinci nand interface contain.
+
+Required properties:
+- compatible: "ti,davinci-nand";
+- reg : contain 2 offset/length values:
+ - offset and length for the access window
+ - offset and length for accessing the aemif control registers
+- ti,davinci-chipselect: Indicates on the davinci_nand driver which
+ chipselect is used for accessing the nand.
+
+Recommended properties :
+- ti,davinci-mask-ale: mask for ale
+- ti,davinci-mask-cle: mask for cle
+- ti,davinci-mask-chipsel: mask for chipselect
+- ti,davinci-ecc-mode: ECC mode valid values for davinci driver:
+ - "none"
+ - "soft"
+ - "hw"
+- ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4.
+- ti,davinci-nand-buswidth: buswidth 8 or 16
+- ti,davinci-nand-use-bbt: use flash based bad block table support.
+
+Optional properties:
+- pinmux-handle: contains a handle to configure the pinmux settings.
+- timing-handle: contains a handle to setup aemif timing.
+
+Example (enbw_cmc board):
+aemif@60000000 {
+ compatible = "ti,davinci-aemif";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <0x68000000 0x80000>;
+ ranges = <2 0 0x60000000 0x02000000
+ 3 0 0x62000000 0x02000000
+ 4 0 0x64000000 0x02000000
+ 5 0 0x66000000 0x02000000
+ 6 0 0x68000000 0x02000000>;
+ nand_cs: cs3@68000000 {
+ compatible = "ti,davinci-cs";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* all timings in nanoseconds */
+ cs = <3>;
+ asize = <0>;
+ ta = <0>;
+ rhold = <7>;
+ rstrobe = <42>;
+ rsetup = <7>;
+ whold = <7>;
+ wstrobe = <14>;
+ wsetup = <7>;
+ ew = <0>;
+ ss = <0>;
+ };
+ nand@3,0 {
+ compatible = "ti,davinci-nand";
+ reg = <3 0x0 0x807ff
+ 6 0x0 0x8000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ti,davinci-chipselect = <1>;
+ ti,davinci-mask-ale = <0>;
+ ti,davinci-mask-cle = <0>;
+ ti,davinci-mask-chipsel = <0>;
+ ti,davinci-ecc-mode = "hw";
+ ti,davinci-ecc-bits = <4>;
+ ti,davinci-nand-use-bbt;
+ pinmux-handle = <&nand_pins>;
+ timing-handle = <&nand_cs>;
+ };
+};
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 6e56615..bdd6edc 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -33,9 +33,12 @@
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/slab.h>
+#include <linux/of_i2c.h>
+#include <linux/of_device.h>
#include <mach/nand.h>
#include <mach/aemif.h>
+#include <mach/mux.h>
/*
* This is a device driver for the NAND flash controller found on the
@@ -518,9 +521,86 @@ static struct nand_ecclayout hwecc4_2048 __initconst = {
},
};
+#if defined(CONFIG_OF)
+static const struct of_device_id davinci_nand_of_match[] = {
+ {.compatible = "ti,davinci-nand", },
+ {},
+}
+MODULE_DEVICE_TABLE(of, davinci_nand_of_match);
+
+static struct davinci_nand_pdata
+ *nand_davinci_get_pdata(struct platform_device *pdev)
+{
+ if ((pdev->dev.platform_data == NULL) &&
+ (pdev->dev.of_node)) {
+ struct device_node *tmp_np;
+ struct davinci_nand_pdata *pdata;
+ const char *mode;
+ u32 prop;
+ int len;
+
+ pdata = kzalloc(sizeof(struct davinci_nand_pdata),
+ GFP_KERNEL);
+ pdev->dev.platform_data = pdata;
+ if (!pdata)
+ return NULL;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-chipselect", &prop))
+ pdev->id = prop;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-mask-ale", &prop))
+ pdata->mask_ale = prop;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-mask-cle", &prop))
+ pdata->mask_cle = prop;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-mask-chipsel", &prop))
+ pdata->mask_chipsel = prop;
+ if (!of_property_read_string(pdev->dev.of_node,
+ "ti,davinci-ecc-mode", &mode)) {
+ if (!strncmp("none", mode, 4))
+ pdata->ecc_mode = NAND_ECC_NONE;
+ if (!strncmp("soft", mode, 4))
+ pdata->ecc_mode = NAND_ECC_SOFT;
+ if (!strncmp("hw", mode, 2))
+ pdata->ecc_mode = NAND_ECC_HW;
+ }
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-ecc-bits", &prop))
+ pdata->ecc_bits = prop;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-nand-buswidth", &prop))
+ if (prop == 16)
+ pdata->options |= NAND_BUSWIDTH_16;
+ if (of_find_property(pdev->dev.of_node,
+ "ti,davinci-nand-use-bbt", &len))
+ pdata->bbt_options = NAND_BBT_USE_FLASH;
+
+ tmp_np = of_parse_phandle(pdev->dev.of_node,
+ "pinmux-handle", 0);
+ if (tmp_np)
+ davinci_cfg_reg_of(tmp_np);
+
+ tmp_np = of_parse_phandle(pdev->dev.of_node,
+ "timing-handle", 0);
+ if (tmp_np)
+ davinci_aemif_setup_timing_of(tmp_np);
+ }
+
+ return pdev->dev.platform_data;
+}
+#else
+#define davinci_nand_of_match NULL
+static struct davinci_nand_pdata
+ *nand_davinci_get_pdata(struct platform_device *pdev)
+{
+ return pdev->dev.platform_data;
+}
+#endif
+
static int __init nand_davinci_probe(struct platform_device *pdev)
{
- struct davinci_nand_pdata *pdata = pdev->dev.platform_data;
+ struct davinci_nand_pdata *pdata;
struct davinci_nand_info *info;
struct resource *res1;
struct resource *res2;
@@ -530,6 +610,7 @@ static int __init nand_davinci_probe(struct platform_device *pdev)
uint32_t val;
nand_ecc_modes_t ecc_mode;
+ pdata = nand_davinci_get_pdata(pdev);
/* insist on board-specific configuration */
if (!pdata)
return -ENODEV;
@@ -815,6 +896,8 @@ static struct platform_driver nand_davinci_driver = {
.remove = __exit_p(nand_davinci_remove),
.driver = {
.name = "davinci_nand",
+ .owner = THIS_MODULE,
+ .of_match_table = davinci_nand_of_match,
},
};
MODULE_ALIAS("platform:davinci_nand");
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 6/7] ARM: mtd: nand: davinci: add OF support for davinci nand controller
@ 2012-03-05 11:10 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:10 UTC (permalink / raw)
To: davinci-linux-open-source
Cc: devicetree-discuss, Sekhar Nori, Grant Likely, linux-mtd,
Scott Wood, Heiko Schocher, David Woodhouse, linux-arm-kernel
add OF support for the davinci nand controller.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-mtd@lists.infradead.org
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
---
- changes for v2:
- add comments from Scott Wood:
- add "ti,davinci-" prefix
- Dashes are preferred to underscores
- rename "nandflash" to "nand"
- introduce new "ti,davinci" specific properties for setting
up ecc_mode, ecc_bits, options and bbt options, instead
using linux defines
- readme fixes
- no changes for v3
.../devicetree/bindings/arm/davinci/nand.txt | 74 +++++++++++++++++
drivers/mtd/nand/davinci_nand.c | 85 +++++++++++++++++++-
2 files changed, 158 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
diff --git a/Documentation/devicetree/bindings/arm/davinci/nand.txt b/Documentation/devicetree/bindings/arm/davinci/nand.txt
new file mode 100644
index 0000000..e02874a
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/davinci/nand.txt
@@ -0,0 +1,74 @@
+* Texas Instruments Davinci NAND
+
+This file provides information, what the device node for the
+davinci nand interface contain.
+
+Required properties:
+- compatible: "ti,davinci-nand";
+- reg : contain 2 offset/length values:
+ - offset and length for the access window
+ - offset and length for accessing the aemif control registers
+- ti,davinci-chipselect: Indicates on the davinci_nand driver which
+ chipselect is used for accessing the nand.
+
+Recommended properties :
+- ti,davinci-mask-ale: mask for ale
+- ti,davinci-mask-cle: mask for cle
+- ti,davinci-mask-chipsel: mask for chipselect
+- ti,davinci-ecc-mode: ECC mode valid values for davinci driver:
+ - "none"
+ - "soft"
+ - "hw"
+- ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4.
+- ti,davinci-nand-buswidth: buswidth 8 or 16
+- ti,davinci-nand-use-bbt: use flash based bad block table support.
+
+Optional properties:
+- pinmux-handle: contains a handle to configure the pinmux settings.
+- timing-handle: contains a handle to setup aemif timing.
+
+Example (enbw_cmc board):
+aemif@60000000 {
+ compatible = "ti,davinci-aemif";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <0x68000000 0x80000>;
+ ranges = <2 0 0x60000000 0x02000000
+ 3 0 0x62000000 0x02000000
+ 4 0 0x64000000 0x02000000
+ 5 0 0x66000000 0x02000000
+ 6 0 0x68000000 0x02000000>;
+ nand_cs: cs3@68000000 {
+ compatible = "ti,davinci-cs";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* all timings in nanoseconds */
+ cs = <3>;
+ asize = <0>;
+ ta = <0>;
+ rhold = <7>;
+ rstrobe = <42>;
+ rsetup = <7>;
+ whold = <7>;
+ wstrobe = <14>;
+ wsetup = <7>;
+ ew = <0>;
+ ss = <0>;
+ };
+ nand@3,0 {
+ compatible = "ti,davinci-nand";
+ reg = <3 0x0 0x807ff
+ 6 0x0 0x8000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ti,davinci-chipselect = <1>;
+ ti,davinci-mask-ale = <0>;
+ ti,davinci-mask-cle = <0>;
+ ti,davinci-mask-chipsel = <0>;
+ ti,davinci-ecc-mode = "hw";
+ ti,davinci-ecc-bits = <4>;
+ ti,davinci-nand-use-bbt;
+ pinmux-handle = <&nand_pins>;
+ timing-handle = <&nand_cs>;
+ };
+};
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 6e56615..bdd6edc 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -33,9 +33,12 @@
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/slab.h>
+#include <linux/of_i2c.h>
+#include <linux/of_device.h>
#include <mach/nand.h>
#include <mach/aemif.h>
+#include <mach/mux.h>
/*
* This is a device driver for the NAND flash controller found on the
@@ -518,9 +521,86 @@ static struct nand_ecclayout hwecc4_2048 __initconst = {
},
};
+#if defined(CONFIG_OF)
+static const struct of_device_id davinci_nand_of_match[] = {
+ {.compatible = "ti,davinci-nand", },
+ {},
+}
+MODULE_DEVICE_TABLE(of, davinci_nand_of_match);
+
+static struct davinci_nand_pdata
+ *nand_davinci_get_pdata(struct platform_device *pdev)
+{
+ if ((pdev->dev.platform_data == NULL) &&
+ (pdev->dev.of_node)) {
+ struct device_node *tmp_np;
+ struct davinci_nand_pdata *pdata;
+ const char *mode;
+ u32 prop;
+ int len;
+
+ pdata = kzalloc(sizeof(struct davinci_nand_pdata),
+ GFP_KERNEL);
+ pdev->dev.platform_data = pdata;
+ if (!pdata)
+ return NULL;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-chipselect", &prop))
+ pdev->id = prop;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-mask-ale", &prop))
+ pdata->mask_ale = prop;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-mask-cle", &prop))
+ pdata->mask_cle = prop;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-mask-chipsel", &prop))
+ pdata->mask_chipsel = prop;
+ if (!of_property_read_string(pdev->dev.of_node,
+ "ti,davinci-ecc-mode", &mode)) {
+ if (!strncmp("none", mode, 4))
+ pdata->ecc_mode = NAND_ECC_NONE;
+ if (!strncmp("soft", mode, 4))
+ pdata->ecc_mode = NAND_ECC_SOFT;
+ if (!strncmp("hw", mode, 2))
+ pdata->ecc_mode = NAND_ECC_HW;
+ }
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-ecc-bits", &prop))
+ pdata->ecc_bits = prop;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-nand-buswidth", &prop))
+ if (prop == 16)
+ pdata->options |= NAND_BUSWIDTH_16;
+ if (of_find_property(pdev->dev.of_node,
+ "ti,davinci-nand-use-bbt", &len))
+ pdata->bbt_options = NAND_BBT_USE_FLASH;
+
+ tmp_np = of_parse_phandle(pdev->dev.of_node,
+ "pinmux-handle", 0);
+ if (tmp_np)
+ davinci_cfg_reg_of(tmp_np);
+
+ tmp_np = of_parse_phandle(pdev->dev.of_node,
+ "timing-handle", 0);
+ if (tmp_np)
+ davinci_aemif_setup_timing_of(tmp_np);
+ }
+
+ return pdev->dev.platform_data;
+}
+#else
+#define davinci_nand_of_match NULL
+static struct davinci_nand_pdata
+ *nand_davinci_get_pdata(struct platform_device *pdev)
+{
+ return pdev->dev.platform_data;
+}
+#endif
+
static int __init nand_davinci_probe(struct platform_device *pdev)
{
- struct davinci_nand_pdata *pdata = pdev->dev.platform_data;
+ struct davinci_nand_pdata *pdata;
struct davinci_nand_info *info;
struct resource *res1;
struct resource *res2;
@@ -530,6 +610,7 @@ static int __init nand_davinci_probe(struct platform_device *pdev)
uint32_t val;
nand_ecc_modes_t ecc_mode;
+ pdata = nand_davinci_get_pdata(pdev);
/* insist on board-specific configuration */
if (!pdata)
return -ENODEV;
@@ -815,6 +896,8 @@ static struct platform_driver nand_davinci_driver = {
.remove = __exit_p(nand_davinci_remove),
.driver = {
.name = "davinci_nand",
+ .owner = THIS_MODULE,
+ .of_match_table = davinci_nand_of_match,
},
};
MODULE_ALIAS("platform:davinci_nand");
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 6/7] ARM: mtd: nand: davinci: add OF support for davinci nand controller
@ 2012-03-05 11:10 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:10 UTC (permalink / raw)
To: linux-arm-kernel
add OF support for the davinci nand controller.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: davinci-linux-open-source at linux.davincidsp.com
Cc: linux-arm-kernel at lists.infradead.org
Cc: devicetree-discuss at lists.ozlabs.org
Cc: linux-mtd at lists.infradead.org
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
---
- changes for v2:
- add comments from Scott Wood:
- add "ti,davinci-" prefix
- Dashes are preferred to underscores
- rename "nandflash" to "nand"
- introduce new "ti,davinci" specific properties for setting
up ecc_mode, ecc_bits, options and bbt options, instead
using linux defines
- readme fixes
- no changes for v3
.../devicetree/bindings/arm/davinci/nand.txt | 74 +++++++++++++++++
drivers/mtd/nand/davinci_nand.c | 85 +++++++++++++++++++-
2 files changed, 158 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
diff --git a/Documentation/devicetree/bindings/arm/davinci/nand.txt b/Documentation/devicetree/bindings/arm/davinci/nand.txt
new file mode 100644
index 0000000..e02874a
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/davinci/nand.txt
@@ -0,0 +1,74 @@
+* Texas Instruments Davinci NAND
+
+This file provides information, what the device node for the
+davinci nand interface contain.
+
+Required properties:
+- compatible: "ti,davinci-nand";
+- reg : contain 2 offset/length values:
+ - offset and length for the access window
+ - offset and length for accessing the aemif control registers
+- ti,davinci-chipselect: Indicates on the davinci_nand driver which
+ chipselect is used for accessing the nand.
+
+Recommended properties :
+- ti,davinci-mask-ale: mask for ale
+- ti,davinci-mask-cle: mask for cle
+- ti,davinci-mask-chipsel: mask for chipselect
+- ti,davinci-ecc-mode: ECC mode valid values for davinci driver:
+ - "none"
+ - "soft"
+ - "hw"
+- ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4.
+- ti,davinci-nand-buswidth: buswidth 8 or 16
+- ti,davinci-nand-use-bbt: use flash based bad block table support.
+
+Optional properties:
+- pinmux-handle: contains a handle to configure the pinmux settings.
+- timing-handle: contains a handle to setup aemif timing.
+
+Example (enbw_cmc board):
+aemif at 60000000 {
+ compatible = "ti,davinci-aemif";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <0x68000000 0x80000>;
+ ranges = <2 0 0x60000000 0x02000000
+ 3 0 0x62000000 0x02000000
+ 4 0 0x64000000 0x02000000
+ 5 0 0x66000000 0x02000000
+ 6 0 0x68000000 0x02000000>;
+ nand_cs: cs3 at 68000000 {
+ compatible = "ti,davinci-cs";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* all timings in nanoseconds */
+ cs = <3>;
+ asize = <0>;
+ ta = <0>;
+ rhold = <7>;
+ rstrobe = <42>;
+ rsetup = <7>;
+ whold = <7>;
+ wstrobe = <14>;
+ wsetup = <7>;
+ ew = <0>;
+ ss = <0>;
+ };
+ nand at 3,0 {
+ compatible = "ti,davinci-nand";
+ reg = <3 0x0 0x807ff
+ 6 0x0 0x8000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ti,davinci-chipselect = <1>;
+ ti,davinci-mask-ale = <0>;
+ ti,davinci-mask-cle = <0>;
+ ti,davinci-mask-chipsel = <0>;
+ ti,davinci-ecc-mode = "hw";
+ ti,davinci-ecc-bits = <4>;
+ ti,davinci-nand-use-bbt;
+ pinmux-handle = <&nand_pins>;
+ timing-handle = <&nand_cs>;
+ };
+};
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 6e56615..bdd6edc 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -33,9 +33,12 @@
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/slab.h>
+#include <linux/of_i2c.h>
+#include <linux/of_device.h>
#include <mach/nand.h>
#include <mach/aemif.h>
+#include <mach/mux.h>
/*
* This is a device driver for the NAND flash controller found on the
@@ -518,9 +521,86 @@ static struct nand_ecclayout hwecc4_2048 __initconst = {
},
};
+#if defined(CONFIG_OF)
+static const struct of_device_id davinci_nand_of_match[] = {
+ {.compatible = "ti,davinci-nand", },
+ {},
+}
+MODULE_DEVICE_TABLE(of, davinci_nand_of_match);
+
+static struct davinci_nand_pdata
+ *nand_davinci_get_pdata(struct platform_device *pdev)
+{
+ if ((pdev->dev.platform_data == NULL) &&
+ (pdev->dev.of_node)) {
+ struct device_node *tmp_np;
+ struct davinci_nand_pdata *pdata;
+ const char *mode;
+ u32 prop;
+ int len;
+
+ pdata = kzalloc(sizeof(struct davinci_nand_pdata),
+ GFP_KERNEL);
+ pdev->dev.platform_data = pdata;
+ if (!pdata)
+ return NULL;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-chipselect", &prop))
+ pdev->id = prop;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-mask-ale", &prop))
+ pdata->mask_ale = prop;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-mask-cle", &prop))
+ pdata->mask_cle = prop;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-mask-chipsel", &prop))
+ pdata->mask_chipsel = prop;
+ if (!of_property_read_string(pdev->dev.of_node,
+ "ti,davinci-ecc-mode", &mode)) {
+ if (!strncmp("none", mode, 4))
+ pdata->ecc_mode = NAND_ECC_NONE;
+ if (!strncmp("soft", mode, 4))
+ pdata->ecc_mode = NAND_ECC_SOFT;
+ if (!strncmp("hw", mode, 2))
+ pdata->ecc_mode = NAND_ECC_HW;
+ }
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-ecc-bits", &prop))
+ pdata->ecc_bits = prop;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "ti,davinci-nand-buswidth", &prop))
+ if (prop == 16)
+ pdata->options |= NAND_BUSWIDTH_16;
+ if (of_find_property(pdev->dev.of_node,
+ "ti,davinci-nand-use-bbt", &len))
+ pdata->bbt_options = NAND_BBT_USE_FLASH;
+
+ tmp_np = of_parse_phandle(pdev->dev.of_node,
+ "pinmux-handle", 0);
+ if (tmp_np)
+ davinci_cfg_reg_of(tmp_np);
+
+ tmp_np = of_parse_phandle(pdev->dev.of_node,
+ "timing-handle", 0);
+ if (tmp_np)
+ davinci_aemif_setup_timing_of(tmp_np);
+ }
+
+ return pdev->dev.platform_data;
+}
+#else
+#define davinci_nand_of_match NULL
+static struct davinci_nand_pdata
+ *nand_davinci_get_pdata(struct platform_device *pdev)
+{
+ return pdev->dev.platform_data;
+}
+#endif
+
static int __init nand_davinci_probe(struct platform_device *pdev)
{
- struct davinci_nand_pdata *pdata = pdev->dev.platform_data;
+ struct davinci_nand_pdata *pdata;
struct davinci_nand_info *info;
struct resource *res1;
struct resource *res2;
@@ -530,6 +610,7 @@ static int __init nand_davinci_probe(struct platform_device *pdev)
uint32_t val;
nand_ecc_modes_t ecc_mode;
+ pdata = nand_davinci_get_pdata(pdev);
/* insist on board-specific configuration */
if (!pdata)
return -ENODEV;
@@ -815,6 +896,8 @@ static struct platform_driver nand_davinci_driver = {
.remove = __exit_p(nand_davinci_remove),
.driver = {
.name = "davinci_nand",
+ .owner = THIS_MODULE,
+ .of_match_table = davinci_nand_of_match,
},
};
MODULE_ALIAS("platform:davinci_nand");
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 7/7] ARM: davinci: add support for the am1808 based enbw_cmc board
2012-03-05 11:09 ` Heiko Schocher
(?)
@ 2012-03-05 11:10 ` Heiko Schocher
-1 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:10 UTC (permalink / raw)
To: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/
Cc: Heiko Schocher,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, netdev-u79uwXL29TY76Z2rM5mHXA,
David Woodhouse, Ben Dooks, Wolfram Sang, Sekhar Nori,
Kevin Hilman, Wolfgang Denk, Scott Wood, Sylwester Nawrocki
- AM1808 based board
- 64 MiB DDR ram
- 2 MiB Nor flash
- 128 MiB NAND flash
- use internal RTC
- I2C support
- hwmon lm75 support
- UBI/UBIFS support
- MMC support
- USB OTG support
Signed-off-by: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
Cc: linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
Cc: Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>
Cc: Wolfram Sang <w.sang-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Cc: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
Cc: Kevin Hilman <khilman-l0cyMroinI0@public.gmane.org>
Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
Cc: Scott Wood <scottwood-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Cc: Sylwester Nawrocki <s.nawrocki-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
- post this board support with USB support, even though
USB is only working with the 10 ms "workaround", posted here:
http://comments.gmane.org/gmane.linux.usb.general/54505
I see this issue also on the AM1808 TMDXEXP1808L evalboard.
- MMC and USB are not using OF support yet, ideas how to port
this are welcome. I need for USB and MMC boards board
specific callbacks, how to solve this with OF support?
- changes for v2:
- changes in the nand node due to comments from Scott Wood:
- add "ti,davinci-" prefix
- Dashes are preferred to underscores
- rename "nandflash" to "nand"
- introduce new "ti,davinci" specific properties for setting
up ecc_mode, ecc_bits, options and bbt options, instead
using linux defines
- changes for i2c due to comments from Sylwester Nawrocki:
- use "cell-index" instead "id"
- OF_DEV_AUXDATA in the machine code, instead pre-define
platform device name
- add comment from Grant Likely for i2c:
- removed "id" resp. "cell-index" completely
- fixed documentation
- use of_match_ptr()
- use devm_kzalloc() for allocating plattform data mem
- fixed a whitespace issue
- add net comments from Grant Likely:
- add prefix "ti,davinci-" to davinci specific property names
- remove version property
- use compatible name "ti,davinci-dm6460-emac"
- add comment from Grant Likely:
- rename compatible node
- do not use cell-index
- CONFIG_OF required for this board
TODO:
- create a generic board support file, as I got no
answer to my ping to grant, maybe this could be done
in a second step?
- changes for v3:
- add comments from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"
- cp_intc_init now used for Interrupt controller init
arch/arm/boot/dts/enbw_cmc.dts | 268 ++++++++++++++++
arch/arm/configs/enbw_cmc_defconfig | 123 ++++++++
arch/arm/mach-davinci/Kconfig | 9 +
arch/arm/mach-davinci/Makefile | 1 +
arch/arm/mach-davinci/board-enbw-cmc.c | 380 +++++++++++++++++++++++
arch/arm/mach-davinci/include/mach/uncompress.h | 1 +
6 files changed, 782 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
create mode 100644 arch/arm/configs/enbw_cmc_defconfig
create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
diff --git a/arch/arm/boot/dts/enbw_cmc.dts b/arch/arm/boot/dts/enbw_cmc.dts
new file mode 100644
index 0000000..143b2e2
--- /dev/null
+++ b/arch/arm/boot/dts/enbw_cmc.dts
@@ -0,0 +1,268 @@
+/*
+ * Device Tree for the EnBW CMC plattform
+ *
+ * Copyright 2011 DENX Software Engineering GmbH
+ * Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+/dts-v1/;
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "EnBW CMC";
+ compatible = "enbw,cmc";
+
+ aliases {
+ ethernet0 = ð0;
+ };
+
+ arm {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xfffee000 0x00020000>;
+ intc: interrupt-controller@1 {
+ compatible = "ti,cp_intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ ti,intc-size = <101>;
+ reg = <0x0 0x2000>;
+ };
+ };
+ soc@1c00000 {
+ compatible = "ti,da850";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x01c00000 0x400000>;
+
+ serial0: serial@1c42000 {
+ compatible = "ti,da850", "ns16550a";
+ reg = <0x42000 0x100>;
+ clock-frequency = <150000000>;
+ reg-shift = <2>;
+ interrupts = <25>;
+ interrupt-parent = <&intc>;
+ };
+ serial1: serial@1d0c000 {
+ compatible = "ti,da850", "ns16550a";
+ reg = <0x10c000 0x100>;
+ clock-frequency = <150000000>;
+ reg-shift = <2>;
+ interrupts = <53>;
+ interrupt-parent = <&intc>;
+ };
+ serial2: serial@1d0d000 {
+ compatible = "ti,da850", "ns16550a";
+ reg = <0x10d000 0x100>;
+ clock-frequency = <150000000>;
+ reg-shift = <2>;
+ interrupts = <61>;
+ interrupt-parent = <&intc>;
+ };
+
+ nor_pins: nor_pinmux@1c14120 {
+ compatible = "ti,davinci-pinmux";
+ reg = <0x14120 0x1000>;
+ pins = < /* muxreg maskoff modemsk muxmode */
+ 5 24 15 1 /* EMA_BA_1 */
+ 6 0 15 1 /* EMA CLK */
+ 6 24 15 1 /* EMA_WAIT_1 */
+ 7 0 15 1 /* NEMA_CS_2 */
+ 7 16 15 1 /* NEMA_WE */
+ 7 20 15 1 /* NEMA_OE */
+ 9 28 15 1 /* EMA_D_0 */
+ 9 24 15 1 /* EMA_D_1 */
+ 9 20 15 1 /* EMA_D_2 */
+ 9 16 15 1 /* EMA_D_3 */
+ 9 12 15 1 /* EMA_D_4 */
+ 9 8 15 1 /* EMA_D_5 */
+ 9 4 15 1 /* EMA_D_6 */
+ 9 0 15 1 /* EMA_D_7 */
+ 8 28 15 1 /* EMA_D_8 */
+ 8 24 15 1 /* EMA_D_9 */
+ 8 20 15 1 /* EMA_D_10 */
+ 8 16 15 1 /* EMA_D_11 */
+ 8 12 15 1 /* EMA_D_12 */
+ 8 8 15 1 /* EMA_D_13 */
+ 8 4 15 1 /* EMA_D_14 */
+ 8 0 15 1 /* EMA_D_15 */
+ 12 28 15 1 /* EMA_A_0 */
+ 12 24 15 1 /* EMA_A_1 */
+ 12 20 15 1 /* EMA_A_2 */
+ 12 16 15 1 /* EMA_A_3 */
+ 12 12 15 1 /* EMA_A_4 */
+ 12 8 15 1 /* EMA_A_5 */
+ 12 4 15 1 /* EMA_A_6 */
+ 12 0 15 1 /* EMA_A_7 */
+ 11 28 15 1 /* EMA_A_8 */
+ 11 24 15 1 /* EMA_A_9 */
+ 11 20 15 1 /* EMA_A_10 */
+ 11 16 15 1 /* EMA_A_11 */
+ 11 12 15 1 /* EMA_A_12 */
+ 11 8 15 1 /* EMA_A_13 */
+ 11 4 15 1 /* EMA_A_14 */
+ 11 0 15 1 /* EMA_A_15 */
+ 10 28 15 1 /* EMA_A_16 */
+ 10 24 15 1 /* EMA_A_17 */
+ 10 20 15 1 /* EMA_A_18 */
+ 10 16 15 1 /* EMA_A_19 */
+ 10 12 15 1 /* EMA_A_20 */
+ 10 8 15 1 /* EMA_A_21 */
+ 10 4 15 1 /* EMA_A_22 */
+ 10 0 15 1 /* EMA_A_23 */
+ >;
+ };
+ nand_pins: nand_pinmux@1c14120 {
+ compatible = "ti,davinci-pinmux";
+ reg = <0x14120 0x1000>;
+ pins = < /* muxreg maskoff modemsk muxmode */
+ 7 4 15 1 /* NEMA_CS_3 */
+ >;
+ };
+
+ emac_pins: pinmux@1c14120 {
+ compatible = "ti,davinci-pinmux";
+ reg = <0x14120 0x1000>;
+ pins = < /* muxreg maskoff modemsk muxmode */
+ 2 4 15 8 /* MII TXEN */
+ 2 8 15 8 /* MII TXCLK */
+ 2 12 15 8 /* MII COL */
+ 2 16 15 8 /* MII TXD_3 */
+ 2 20 15 8 /* MII TXD_2 */
+ 2 24 15 8 /* MII TXD_1 */
+ 2 28 15 8 /* MII TXD_0 */
+ 3 8 15 8 /* MII RXER */
+ 3 12 15 8 /* MII CRS */
+ 3 0 15 8 /* MII RXCLK */
+ 3 4 15 8 /* MII RXDV */
+ 3 16 15 8 /* MII RXD_3 */
+ 3 20 15 8 /* MII RXD_2 */
+ 3 24 15 8 /* MII RXD_1 */
+ 3 28 15 8 /* MII RXD_0 */
+ 4 0 15 8 /* MDIO CLK */
+ 4 4 15 8 /* MDIO D */
+ >;
+ };
+
+ i2c1_pins: i2c_pinmux@1c14120 {
+ compatible = "ti,davinci-pinmux";
+ reg = <0x14120 0x1000>;
+ pins = < /* muxreg maskoff modemsk muxmode */
+ 4 12 15 2 /* I2C0 SDA */
+ 4 8 15 2 /* I2C0 SCL */
+ >;
+ };
+
+ eth0: emac@1e20000 {
+ compatible = "ti,davinci-dm6460-emac";
+ reg = <0x220000 0x4000>;
+ ti,davinci-ctrl-reg-offset = <0x3000>;
+ ti,davinci-ctrl-mod-reg-offset = <0x2000>;
+ ti,davinci-ctrl-ram-offset = <0>;
+ ti,davinci-ctrl-ram-size = <0x2000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <33
+ 34
+ 35
+ 36
+ >;
+ interrupt-parent = <&intc>;
+ pinmux-handle = <&emac_pins>;
+ };
+
+ i2c@1c22000 {
+ compatible = "ti,davinci-i2c";
+ reg = <0x22000 0x1000>;
+ clock-frequency = <100000>;
+ interrupts = <15>;
+ interrupt-parent = <&intc>;
+ pinmux-handle = <&i2c1_pins>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dtt@48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ };
+ };
+ };
+ onchipram@8000000 {
+ compatible = "ti,davinci-onchipram";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x80000000 0x20000>;
+ };
+ aemif@60000000 {
+ compatible = "ti,davinci-aemif";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <0x68000000 0x80000>;
+ ranges = <2 0 0x60000000 0x02000000
+ 3 0 0x62000000 0x02000000
+ 4 0 0x64000000 0x02000000
+ 5 0 0x66000000 0x02000000
+ 6 0 0x68000000 0x02000000>;
+ cs2@68000000 {
+ compatible = "ti,davinci-cs";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* all timings in nanoseconds */
+ cs = <2>;
+ asize = <1>;
+ ta = <0>;
+ rhold = <7>;
+ rstrobe = <42>;
+ rsetup = <14>;
+ whold = <7>;
+ wstrobe = <42>;
+ wsetup = <14>;
+ ew = <0>;
+ ss = <0>;
+ };
+ flash@2,0 {
+ compatible = "cfi-flash";
+ reg = <2 0x0 0x400000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bank-width = <2>;
+ device-width = <2>;
+ };
+ nand_cs: cs3@68000000 {
+ compatible = "ti,davinci-cs";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* all timings in nanoseconds */
+ cs = <3>;
+ asize = <0>;
+ ta = <0>;
+ rhold = <7>;
+ rstrobe = <42>;
+ rsetup = <7>;
+ whold = <7>;
+ wstrobe = <14>;
+ wsetup = <7>;
+ ew = <0>;
+ ss = <0>;
+ };
+ nand@3,0 {
+ compatible = "ti,davinci-nand";
+ reg = <3 0x0 0x807ff
+ 6 0x0 0x8000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ti,davinci-chipselect = <1>;
+ ti,davinci-mask-ale = <0>;
+ ti,davinci-mask-cle = <0>;
+ ti,davinci-mask-chipsel = <0>;
+ ti,davinci-ecc-mode = "hw";
+ ti,davinci-ecc-bits = <4>;
+ ti,davinci-nand-use-bbt;
+ pinmux-handle = <&nand_pins>;
+ timing-handle = <&nand_cs>;
+ };
+
+ };
+};
diff --git a/arch/arm/configs/enbw_cmc_defconfig b/arch/arm/configs/enbw_cmc_defconfig
new file mode 100644
index 0000000..9d98e7f
--- /dev/null
+++ b/arch/arm/configs/enbw_cmc_defconfig
@@ -0,0 +1,123 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EXPERT=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_DAVINCI=y
+CONFIG_ARCH_DAVINCI_DA850=y
+# CONFIG_MACH_DAVINCI_DA850_EVM is not set
+CONFIG_GPIO_PCA953X=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_USE_OF=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_LRO is not set
+CONFIG_IPV6=y
+CONFIG_NETFILTER=y
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_FW_LOADER is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_DAVINCI=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=32768
+CONFIG_EEPROM_AT24=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_TI_DAVINCI_EMAC=y
+# CONFIG_WLAN is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=y
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=3
+CONFIG_SERIAL_8250_RUNTIME_UARTS=3
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_DAVINCI=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_PCF857X=y
+CONFIG_SENSORS_LM75=y
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CORE=y
+CONFIG_DAVINCI_WATCHDOG=y
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_MUSB_DA8XX=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_UAS=y
+CONFIG_USB_LIBUSUAL=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_FUSB300=y
+CONFIG_USB_ETH=y
+CONFIG_MMC=y
+CONFIG_MMC_DAVINCI=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_OMAP=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_UBIFS_FS=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_UTF8=y
+CONFIG_DEBUG_FS=y
+CONFIG_TIMER_STATS=y
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+CONFIG_CRC_CCITT=m
+CONFIG_CRC_T10DIF=m
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 32d837d..4cb0469 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -202,6 +202,15 @@ config DA850_WL12XX
Say Y if you want to use a wl1271 expansion card connected to the
AM18x EVM.
+config MACH_ENBW_CMC
+ bool "EnBW Communication Module Compact"
+ default ARCH_DAVINCI_DA850
+ depends on ARCH_DAVINCI_DA850
+ select OF
+ help
+ Say Y here to select the EnBW Communication Module Compact
+ board.
+
config GPIO_PCA953X
default MACH_DAVINCI_DA850_EVM
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 2db78bd..12f3166 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o
obj-$(CONFIG_MACH_TNETV107X) += board-tnetv107x-evm.o
obj-$(CONFIG_MACH_MITYOMAPL138) += board-mityomapl138.o
obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-omapl138-hawk.o
+obj-$(CONFIG_MACH_ENBW_CMC) += board-enbw-cmc.o
# Power Management
obj-$(CONFIG_CPU_FREQ) += cpufreq.o
diff --git a/arch/arm/mach-davinci/board-enbw-cmc.c b/arch/arm/mach-davinci/board-enbw-cmc.c
new file mode 100644
index 0000000..8cb60fb
--- /dev/null
+++ b/arch/arm/mach-davinci/board-enbw-cmc.c
@@ -0,0 +1,380 @@
+/*
+ * EnBW Communication Module Compact board
+ * Copyright 2011 DENX Software Engineering GmbH
+ * Author: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
+ *
+ * based on:
+ * TI DA850/OMAP-L138 EVM board
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Derived from: arch/arm/mach-davinci/board-da850-evm.c
+ * Original Copyrights follow:
+ *
+ * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/console.h>
+#include <linux/gpio.h>
+#include <linux/gpio_keys.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/of.h>
+#include <linux/of_net.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/phy.h>
+#include <linux/phy_fixed.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/aemif.h>
+#include <mach/cp_intc.h>
+#include <mach/da8xx.h>
+#include <mach/mux.h>
+#include <mach/nand.h>
+#include <mach/spi.h>
+
+#define ENBW_CMC_MMCSD_CD_PIN GPIO_TO_PIN(3, 13)
+
+/*
+ * USB1 VBUS is controlled by GPIO7[12], over-current is reported on GPIO7[8].
+ */
+#define DA850_USB_VBUS_PIN GPIO_TO_PIN(7, 12)
+#define ON_BD_USB_OVC GPIO_TO_PIN(7, 8)
+
+#if defined(CONFIG_USB_OHCI_HCD)
+static irqreturn_t enbw_cmc_usb_ocic_irq(int irq, void *dev_id);
+static da8xx_ocic_handler_t enbw_cmc_usb_ocic_handler;
+
+static int enbw_cmc_usb_set_power(unsigned port, int on)
+{
+ gpio_set_value(DA850_USB_VBUS_PIN, on);
+ return 0;
+}
+
+static int enbw_cmc_usb_get_power(unsigned port)
+{
+ return gpio_get_value(DA850_USB_VBUS_PIN);
+}
+
+static int enbw_cmc_usb_get_oci(unsigned port)
+{
+ return !gpio_get_value(ON_BD_USB_OVC);
+}
+
+static irqreturn_t enbw_cmc_usb_ocic_irq(int, void *);
+
+static int enbw_cmc_usb_ocic_notify(da8xx_ocic_handler_t handler)
+{
+ int irq = gpio_to_irq(ON_BD_USB_OVC);
+ int error = 0;
+
+ if (handler != NULL) {
+ enbw_cmc_usb_ocic_handler = handler;
+
+ error = request_irq(irq, enbw_cmc_usb_ocic_irq,
+ IRQF_DISABLED | IRQF_TRIGGER_RISING |
+ IRQF_TRIGGER_FALLING,
+ "OHCI over-current indicator", NULL);
+ if (error)
+ pr_err("%s: could not request IRQ to watch "
+ "over-current indicator changes\n", __func__);
+ } else {
+ free_irq(irq, NULL);
+ }
+ return error;
+}
+
+static struct da8xx_ohci_root_hub enbw_cmc_usb11_pdata = {
+ .set_power = enbw_cmc_usb_set_power,
+ .get_power = enbw_cmc_usb_get_power,
+ .get_oci = enbw_cmc_usb_get_oci,
+ .ocic_notify = enbw_cmc_usb_ocic_notify,
+ .potpgt = (10 + 1) / 2, /* 10 ms max */
+};
+
+static irqreturn_t enbw_cmc_usb_ocic_irq(int irq, void *dev_id)
+{
+ enbw_cmc_usb_ocic_handler(&enbw_cmc_usb11_pdata, 1);
+ return IRQ_HANDLED;
+}
+#endif
+
+static __init void enbw_cmc_usb_init(void)
+{
+ int ret;
+ u32 cfgchip2;
+
+ /* Set up USB clock/mode in the CFGCHIP2 register. */
+ cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+ /* USB2.0 PHY reference clock is AUXCLK with 24MHz */
+ cfgchip2 &= ~CFGCHIP2_REFFREQ;
+ cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
+
+ /*
+ * Select internal reference clock for USB 2.0 PHY
+ * and use it as a clock source for USB 1.1 PHY
+ * (this is the default setting anyway).
+ */
+ cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
+ cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
+
+ cfgchip2 &= ~CFGCHIP2_OTGMODE;
+ cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
+
+ __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+ ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
+ if (ret)
+ pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
+ __func__, ret);
+ else {
+ /*
+ * SP2525A @ 5V supplies 500mA,
+ * with the power on to power good time of 10 ms.
+ */
+ ret = da8xx_register_usb20(500, 10);
+ if (ret)
+ pr_warning("%s: USB 2.0 registration failed: %d\n",
+ __func__, ret);
+ }
+
+#if defined(CONFIG_USB_OHCI_HCD)
+ ret = gpio_request_one(DA850_USB_VBUS_PIN,
+ GPIOF_DIR_OUT, "USB 1.1 VBUS");
+ if (ret < 0) {
+ pr_err("%s: failed to request GPIO for USB 1.1 port "
+ "power control: %d\n", __func__, ret);
+ return;
+ }
+ gpio_direction_input(DA850_USB_VBUS_PIN);
+
+ ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
+ if (ret) {
+ printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
+ "over-current indicator: %d\n", __func__, ret);
+ gpio_free(DA850_USB_VBUS_PIN);
+ return;
+ }
+ gpio_direction_input(ON_BD_USB_OVC);
+
+ ret = da8xx_register_usb11(&enbw_cmc_usb11_pdata);
+ if (ret) {
+ pr_warning("%s: USB 1.1 registration failed: %d\n",
+ __func__, ret);
+ gpio_free(ON_BD_USB_OVC);
+ gpio_free(DA850_USB_VBUS_PIN);
+ }
+#endif
+
+ return;
+}
+
+static int enbw_cmc_mmc_get_ro(int index)
+{
+ return 0;
+}
+
+static int enbw_cmc_mmc_get_cd(int index)
+{
+ return gpio_get_value(ENBW_CMC_MMCSD_CD_PIN) ? 1 : 0;
+}
+
+static struct davinci_mmc_config enbw_cmc_mmc_config = {
+ .get_ro = enbw_cmc_mmc_get_ro,
+ .get_cd = enbw_cmc_mmc_get_cd,
+ .wires = 4,
+ .max_freq = 50000000,
+ .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
+ .version = MMC_CTLR_VERSION_2,
+};
+
+static int __init enbw_cmc_config_emac(void)
+{
+ void __iomem *cfg_chip3_base;
+ u32 val;
+ struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+ if (!machine_is_enbw_cmc())
+ return 0;
+
+ cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
+ val = __raw_readl(cfg_chip3_base);
+ val &= ~BIT(8);
+ pr_info("EMAC: MII PHY configured, RMII PHY will not be"
+ " functional\n");
+
+ /* configure the CFGCHIP3 register for MII */
+ __raw_writel(val, cfg_chip3_base);
+
+ /* use complete info from OF */
+ soc_info->emac_pdata = NULL;
+
+ return 0;
+}
+device_initcall(enbw_cmc_config_emac);
+
+static const s16 da850_dma0_rsv_chans[][2] = {
+ /* (offset, number) */
+ {-1, -1}
+};
+
+static const s16 da850_dma0_rsv_slots[][2] = {
+ /* (offset, number) */
+ {-1, -1}
+};
+
+static const s16 da850_dma1_rsv_chans[][2] = {
+ /* (offset, number) */
+ {-1, -1}
+};
+
+static const s16 da850_dma1_rsv_slots[][2] = {
+ /* (offset, number) */
+ {-1, -1}
+};
+
+static struct edma_rsv_info da850_edma_cc0_rsv = {
+ .rsv_chans = da850_dma0_rsv_chans,
+ .rsv_slots = da850_dma0_rsv_slots,
+};
+
+static struct edma_rsv_info da850_edma_cc1_rsv = {
+ .rsv_chans = da850_dma1_rsv_chans,
+ .rsv_slots = da850_dma1_rsv_slots,
+};
+
+static struct edma_rsv_info *da850_edma_rsv[2] = {
+ &da850_edma_cc0_rsv,
+ &da850_edma_cc1_rsv,
+};
+
+#ifdef CONFIG_CPU_FREQ
+static __init int da850_evm_init_cpufreq(void)
+{
+ switch (system_rev & 0xF) {
+ case 3:
+ da850_max_speed = 456000;
+ break;
+ case 2:
+ da850_max_speed = 408000;
+ break;
+ case 1:
+ da850_max_speed = 372000;
+ break;
+ }
+
+ return da850_register_cpufreq("pll0_sysclk3");
+}
+#else
+static __init int da850_evm_init_cpufreq(void) { return 0; }
+#endif
+
+struct of_dev_auxdata enbw_cmc_auxdata_lookup[] __initdata = {
+ OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "ti,davinci-wdt", NULL),
+ OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL),
+ OF_DEV_AUXDATA("ti,davinci-i2c", 0x01e28000, "i2c_davinci.2", NULL),
+ OF_DEV_AUXDATA("ti,davinci-dm6460-emac", 0x01e20000, "davinci_emac.1",
+ NULL),
+ {}
+};
+
+const struct of_device_id enbw_cmc_bus_match_table[] = {
+ { .compatible = "simple-bus", },
+ { .compatible = "ti,da850", },
+ { .compatible = "ti,davinci-onchipram", },
+ { .compatible = "ti,davinci-aemif", },
+ {} /* Empty terminated list */
+};
+
+static __init void enbw_cmc_init(void)
+{
+ int ret;
+
+ of_platform_populate(NULL, enbw_cmc_bus_match_table,
+ enbw_cmc_auxdata_lookup, NULL);
+
+ ret = da8xx_register_watchdog();
+ if (ret)
+ pr_warning("enbw_cmc_init: watchdog registration failed: %d\n",
+ ret);
+
+ ret = da850_register_edma(da850_edma_rsv);
+ if (ret)
+ pr_warning("enbw_cmc_init: edma registration failed: %d\n",
+ ret);
+
+ /*
+ * shut down uart 0 this port is not used on the board
+ */
+ __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
+
+ ret = da8xx_register_rtc();
+ if (ret)
+ pr_warning("enbw_cmc_init: rtc setup failed: %d\n", ret);
+
+ ret = da850_evm_init_cpufreq();
+ if (ret)
+ pr_warning("enbw_cmc_init: cpufreq registration failed: %d\n",
+ ret);
+
+ ret = da8xx_register_cpuidle();
+ if (ret)
+ pr_warning("enbw_cmc_init: cpuidle registration failed: %d\n",
+ ret);
+
+ ret = gpio_request(ENBW_CMC_MMCSD_CD_PIN, "MMC CD\n");
+ if (ret)
+ pr_warning("enbw_cmc_init: can not open GPIO %d\n",
+ ENBW_CMC_MMCSD_CD_PIN);
+ gpio_direction_input(ENBW_CMC_MMCSD_CD_PIN);
+
+ ret = da850_register_mmcsd1(&enbw_cmc_mmc_config);
+ if (ret)
+ pr_warning("enbw_cmc_init: mmcsd1 registration failed:"
+ " %d\n", ret);
+
+ enbw_cmc_usb_init();
+}
+
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+static int __init enbw_cmc_console_init(void)
+{
+ if (!machine_is_enbw_cmc())
+ return 0;
+
+ return add_preferred_console("ttyS", 2, "115200");
+}
+console_initcall(enbw_cmc_console_init);
+#endif
+
+static void __init enbw_cmc_map_io(void)
+{
+ da850_init();
+}
+
+static const char *enbw_cmc_board_compat[] __initconst = {
+ "enbw,cmc",
+ NULL
+};
+
+MACHINE_START(ENBW_CMC, "EnBW CMC")
+ .map_io = enbw_cmc_map_io,
+ .init_irq = cp_intc_init,
+ .timer = &davinci_timer,
+ .init_machine = enbw_cmc_init,
+ .dt_compat = enbw_cmc_board_compat,
+ .dma_zone_size = SZ_128M,
+ .restart = da8xx_restart,
+MACHINE_END
diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h
index 9dc7cf9..2f21384 100644
--- a/arch/arm/mach-davinci/include/mach/uncompress.h
+++ b/arch/arm/mach-davinci/include/mach/uncompress.h
@@ -96,6 +96,7 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
DEBUG_LL_DA8XX(davinci_da850_evm, 2);
DEBUG_LL_DA8XX(mityomapl138, 1);
DEBUG_LL_DA8XX(omapl138_hawkboard, 2);
+ DEBUG_LL_DA8XX(enbw_cmc, 2);
/* TNETV107x boards */
DEBUG_LL_TNETV107X(tnetv107x, 1);
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 7/7] ARM: davinci: add support for the am1808 based enbw_cmc board
@ 2012-03-05 11:10 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:10 UTC (permalink / raw)
To: davinci-linux-open-source
Cc: Kevin Hilman, netdev, devicetree-discuss, Sekhar Nori,
Wolfram Sang, linux-mtd, linux-i2c, Ben Dooks, Scott Wood,
Sylwester Nawrocki, Heiko Schocher, David Woodhouse,
linux-arm-kernel
- AM1808 based board
- 64 MiB DDR ram
- 2 MiB Nor flash
- 128 MiB NAND flash
- use internal RTC
- I2C support
- hwmon lm75 support
- UBI/UBIFS support
- MMC support
- USB OTG support
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: linux-mtd@lists.infradead.org
Cc: linux-i2c@vger.kernel.org
Cc: netdev@vger.kernel.org
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
---
- post this board support with USB support, even though
USB is only working with the 10 ms "workaround", posted here:
http://comments.gmane.org/gmane.linux.usb.general/54505
I see this issue also on the AM1808 TMDXEXP1808L evalboard.
- MMC and USB are not using OF support yet, ideas how to port
this are welcome. I need for USB and MMC boards board
specific callbacks, how to solve this with OF support?
- changes for v2:
- changes in the nand node due to comments from Scott Wood:
- add "ti,davinci-" prefix
- Dashes are preferred to underscores
- rename "nandflash" to "nand"
- introduce new "ti,davinci" specific properties for setting
up ecc_mode, ecc_bits, options and bbt options, instead
using linux defines
- changes for i2c due to comments from Sylwester Nawrocki:
- use "cell-index" instead "id"
- OF_DEV_AUXDATA in the machine code, instead pre-define
platform device name
- add comment from Grant Likely for i2c:
- removed "id" resp. "cell-index" completely
- fixed documentation
- use of_match_ptr()
- use devm_kzalloc() for allocating plattform data mem
- fixed a whitespace issue
- add net comments from Grant Likely:
- add prefix "ti,davinci-" to davinci specific property names
- remove version property
- use compatible name "ti,davinci-dm6460-emac"
- add comment from Grant Likely:
- rename compatible node
- do not use cell-index
- CONFIG_OF required for this board
TODO:
- create a generic board support file, as I got no
answer to my ping to grant, maybe this could be done
in a second step?
- changes for v3:
- add comments from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"
- cp_intc_init now used for Interrupt controller init
arch/arm/boot/dts/enbw_cmc.dts | 268 ++++++++++++++++
arch/arm/configs/enbw_cmc_defconfig | 123 ++++++++
arch/arm/mach-davinci/Kconfig | 9 +
arch/arm/mach-davinci/Makefile | 1 +
arch/arm/mach-davinci/board-enbw-cmc.c | 380 +++++++++++++++++++++++
arch/arm/mach-davinci/include/mach/uncompress.h | 1 +
6 files changed, 782 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
create mode 100644 arch/arm/configs/enbw_cmc_defconfig
create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
diff --git a/arch/arm/boot/dts/enbw_cmc.dts b/arch/arm/boot/dts/enbw_cmc.dts
new file mode 100644
index 0000000..143b2e2
--- /dev/null
+++ b/arch/arm/boot/dts/enbw_cmc.dts
@@ -0,0 +1,268 @@
+/*
+ * Device Tree for the EnBW CMC plattform
+ *
+ * Copyright 2011 DENX Software Engineering GmbH
+ * Heiko Schocher <hs@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+/dts-v1/;
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "EnBW CMC";
+ compatible = "enbw,cmc";
+
+ aliases {
+ ethernet0 = ð0;
+ };
+
+ arm {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xfffee000 0x00020000>;
+ intc: interrupt-controller@1 {
+ compatible = "ti,cp_intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ ti,intc-size = <101>;
+ reg = <0x0 0x2000>;
+ };
+ };
+ soc@1c00000 {
+ compatible = "ti,da850";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x01c00000 0x400000>;
+
+ serial0: serial@1c42000 {
+ compatible = "ti,da850", "ns16550a";
+ reg = <0x42000 0x100>;
+ clock-frequency = <150000000>;
+ reg-shift = <2>;
+ interrupts = <25>;
+ interrupt-parent = <&intc>;
+ };
+ serial1: serial@1d0c000 {
+ compatible = "ti,da850", "ns16550a";
+ reg = <0x10c000 0x100>;
+ clock-frequency = <150000000>;
+ reg-shift = <2>;
+ interrupts = <53>;
+ interrupt-parent = <&intc>;
+ };
+ serial2: serial@1d0d000 {
+ compatible = "ti,da850", "ns16550a";
+ reg = <0x10d000 0x100>;
+ clock-frequency = <150000000>;
+ reg-shift = <2>;
+ interrupts = <61>;
+ interrupt-parent = <&intc>;
+ };
+
+ nor_pins: nor_pinmux@1c14120 {
+ compatible = "ti,davinci-pinmux";
+ reg = <0x14120 0x1000>;
+ pins = < /* muxreg maskoff modemsk muxmode */
+ 5 24 15 1 /* EMA_BA_1 */
+ 6 0 15 1 /* EMA CLK */
+ 6 24 15 1 /* EMA_WAIT_1 */
+ 7 0 15 1 /* NEMA_CS_2 */
+ 7 16 15 1 /* NEMA_WE */
+ 7 20 15 1 /* NEMA_OE */
+ 9 28 15 1 /* EMA_D_0 */
+ 9 24 15 1 /* EMA_D_1 */
+ 9 20 15 1 /* EMA_D_2 */
+ 9 16 15 1 /* EMA_D_3 */
+ 9 12 15 1 /* EMA_D_4 */
+ 9 8 15 1 /* EMA_D_5 */
+ 9 4 15 1 /* EMA_D_6 */
+ 9 0 15 1 /* EMA_D_7 */
+ 8 28 15 1 /* EMA_D_8 */
+ 8 24 15 1 /* EMA_D_9 */
+ 8 20 15 1 /* EMA_D_10 */
+ 8 16 15 1 /* EMA_D_11 */
+ 8 12 15 1 /* EMA_D_12 */
+ 8 8 15 1 /* EMA_D_13 */
+ 8 4 15 1 /* EMA_D_14 */
+ 8 0 15 1 /* EMA_D_15 */
+ 12 28 15 1 /* EMA_A_0 */
+ 12 24 15 1 /* EMA_A_1 */
+ 12 20 15 1 /* EMA_A_2 */
+ 12 16 15 1 /* EMA_A_3 */
+ 12 12 15 1 /* EMA_A_4 */
+ 12 8 15 1 /* EMA_A_5 */
+ 12 4 15 1 /* EMA_A_6 */
+ 12 0 15 1 /* EMA_A_7 */
+ 11 28 15 1 /* EMA_A_8 */
+ 11 24 15 1 /* EMA_A_9 */
+ 11 20 15 1 /* EMA_A_10 */
+ 11 16 15 1 /* EMA_A_11 */
+ 11 12 15 1 /* EMA_A_12 */
+ 11 8 15 1 /* EMA_A_13 */
+ 11 4 15 1 /* EMA_A_14 */
+ 11 0 15 1 /* EMA_A_15 */
+ 10 28 15 1 /* EMA_A_16 */
+ 10 24 15 1 /* EMA_A_17 */
+ 10 20 15 1 /* EMA_A_18 */
+ 10 16 15 1 /* EMA_A_19 */
+ 10 12 15 1 /* EMA_A_20 */
+ 10 8 15 1 /* EMA_A_21 */
+ 10 4 15 1 /* EMA_A_22 */
+ 10 0 15 1 /* EMA_A_23 */
+ >;
+ };
+ nand_pins: nand_pinmux@1c14120 {
+ compatible = "ti,davinci-pinmux";
+ reg = <0x14120 0x1000>;
+ pins = < /* muxreg maskoff modemsk muxmode */
+ 7 4 15 1 /* NEMA_CS_3 */
+ >;
+ };
+
+ emac_pins: pinmux@1c14120 {
+ compatible = "ti,davinci-pinmux";
+ reg = <0x14120 0x1000>;
+ pins = < /* muxreg maskoff modemsk muxmode */
+ 2 4 15 8 /* MII TXEN */
+ 2 8 15 8 /* MII TXCLK */
+ 2 12 15 8 /* MII COL */
+ 2 16 15 8 /* MII TXD_3 */
+ 2 20 15 8 /* MII TXD_2 */
+ 2 24 15 8 /* MII TXD_1 */
+ 2 28 15 8 /* MII TXD_0 */
+ 3 8 15 8 /* MII RXER */
+ 3 12 15 8 /* MII CRS */
+ 3 0 15 8 /* MII RXCLK */
+ 3 4 15 8 /* MII RXDV */
+ 3 16 15 8 /* MII RXD_3 */
+ 3 20 15 8 /* MII RXD_2 */
+ 3 24 15 8 /* MII RXD_1 */
+ 3 28 15 8 /* MII RXD_0 */
+ 4 0 15 8 /* MDIO CLK */
+ 4 4 15 8 /* MDIO D */
+ >;
+ };
+
+ i2c1_pins: i2c_pinmux@1c14120 {
+ compatible = "ti,davinci-pinmux";
+ reg = <0x14120 0x1000>;
+ pins = < /* muxreg maskoff modemsk muxmode */
+ 4 12 15 2 /* I2C0 SDA */
+ 4 8 15 2 /* I2C0 SCL */
+ >;
+ };
+
+ eth0: emac@1e20000 {
+ compatible = "ti,davinci-dm6460-emac";
+ reg = <0x220000 0x4000>;
+ ti,davinci-ctrl-reg-offset = <0x3000>;
+ ti,davinci-ctrl-mod-reg-offset = <0x2000>;
+ ti,davinci-ctrl-ram-offset = <0>;
+ ti,davinci-ctrl-ram-size = <0x2000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <33
+ 34
+ 35
+ 36
+ >;
+ interrupt-parent = <&intc>;
+ pinmux-handle = <&emac_pins>;
+ };
+
+ i2c@1c22000 {
+ compatible = "ti,davinci-i2c";
+ reg = <0x22000 0x1000>;
+ clock-frequency = <100000>;
+ interrupts = <15>;
+ interrupt-parent = <&intc>;
+ pinmux-handle = <&i2c1_pins>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dtt@48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ };
+ };
+ };
+ onchipram@8000000 {
+ compatible = "ti,davinci-onchipram";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x80000000 0x20000>;
+ };
+ aemif@60000000 {
+ compatible = "ti,davinci-aemif";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <0x68000000 0x80000>;
+ ranges = <2 0 0x60000000 0x02000000
+ 3 0 0x62000000 0x02000000
+ 4 0 0x64000000 0x02000000
+ 5 0 0x66000000 0x02000000
+ 6 0 0x68000000 0x02000000>;
+ cs2@68000000 {
+ compatible = "ti,davinci-cs";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* all timings in nanoseconds */
+ cs = <2>;
+ asize = <1>;
+ ta = <0>;
+ rhold = <7>;
+ rstrobe = <42>;
+ rsetup = <14>;
+ whold = <7>;
+ wstrobe = <42>;
+ wsetup = <14>;
+ ew = <0>;
+ ss = <0>;
+ };
+ flash@2,0 {
+ compatible = "cfi-flash";
+ reg = <2 0x0 0x400000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bank-width = <2>;
+ device-width = <2>;
+ };
+ nand_cs: cs3@68000000 {
+ compatible = "ti,davinci-cs";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* all timings in nanoseconds */
+ cs = <3>;
+ asize = <0>;
+ ta = <0>;
+ rhold = <7>;
+ rstrobe = <42>;
+ rsetup = <7>;
+ whold = <7>;
+ wstrobe = <14>;
+ wsetup = <7>;
+ ew = <0>;
+ ss = <0>;
+ };
+ nand@3,0 {
+ compatible = "ti,davinci-nand";
+ reg = <3 0x0 0x807ff
+ 6 0x0 0x8000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ti,davinci-chipselect = <1>;
+ ti,davinci-mask-ale = <0>;
+ ti,davinci-mask-cle = <0>;
+ ti,davinci-mask-chipsel = <0>;
+ ti,davinci-ecc-mode = "hw";
+ ti,davinci-ecc-bits = <4>;
+ ti,davinci-nand-use-bbt;
+ pinmux-handle = <&nand_pins>;
+ timing-handle = <&nand_cs>;
+ };
+
+ };
+};
diff --git a/arch/arm/configs/enbw_cmc_defconfig b/arch/arm/configs/enbw_cmc_defconfig
new file mode 100644
index 0000000..9d98e7f
--- /dev/null
+++ b/arch/arm/configs/enbw_cmc_defconfig
@@ -0,0 +1,123 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EXPERT=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_DAVINCI=y
+CONFIG_ARCH_DAVINCI_DA850=y
+# CONFIG_MACH_DAVINCI_DA850_EVM is not set
+CONFIG_GPIO_PCA953X=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_USE_OF=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_LRO is not set
+CONFIG_IPV6=y
+CONFIG_NETFILTER=y
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_FW_LOADER is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_DAVINCI=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=32768
+CONFIG_EEPROM_AT24=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_TI_DAVINCI_EMAC=y
+# CONFIG_WLAN is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=y
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=3
+CONFIG_SERIAL_8250_RUNTIME_UARTS=3
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_DAVINCI=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_PCF857X=y
+CONFIG_SENSORS_LM75=y
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CORE=y
+CONFIG_DAVINCI_WATCHDOG=y
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_MUSB_DA8XX=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_UAS=y
+CONFIG_USB_LIBUSUAL=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_FUSB300=y
+CONFIG_USB_ETH=y
+CONFIG_MMC=y
+CONFIG_MMC_DAVINCI=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_OMAP=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_UBIFS_FS=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_UTF8=y
+CONFIG_DEBUG_FS=y
+CONFIG_TIMER_STATS=y
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+CONFIG_CRC_CCITT=m
+CONFIG_CRC_T10DIF=m
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 32d837d..4cb0469 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -202,6 +202,15 @@ config DA850_WL12XX
Say Y if you want to use a wl1271 expansion card connected to the
AM18x EVM.
+config MACH_ENBW_CMC
+ bool "EnBW Communication Module Compact"
+ default ARCH_DAVINCI_DA850
+ depends on ARCH_DAVINCI_DA850
+ select OF
+ help
+ Say Y here to select the EnBW Communication Module Compact
+ board.
+
config GPIO_PCA953X
default MACH_DAVINCI_DA850_EVM
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 2db78bd..12f3166 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o
obj-$(CONFIG_MACH_TNETV107X) += board-tnetv107x-evm.o
obj-$(CONFIG_MACH_MITYOMAPL138) += board-mityomapl138.o
obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-omapl138-hawk.o
+obj-$(CONFIG_MACH_ENBW_CMC) += board-enbw-cmc.o
# Power Management
obj-$(CONFIG_CPU_FREQ) += cpufreq.o
diff --git a/arch/arm/mach-davinci/board-enbw-cmc.c b/arch/arm/mach-davinci/board-enbw-cmc.c
new file mode 100644
index 0000000..8cb60fb
--- /dev/null
+++ b/arch/arm/mach-davinci/board-enbw-cmc.c
@@ -0,0 +1,380 @@
+/*
+ * EnBW Communication Module Compact board
+ * Copyright 2011 DENX Software Engineering GmbH
+ * Author: Heiko Schocher <hs@denx.de>
+ *
+ * based on:
+ * TI DA850/OMAP-L138 EVM board
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Derived from: arch/arm/mach-davinci/board-da850-evm.c
+ * Original Copyrights follow:
+ *
+ * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/console.h>
+#include <linux/gpio.h>
+#include <linux/gpio_keys.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/of.h>
+#include <linux/of_net.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/phy.h>
+#include <linux/phy_fixed.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/aemif.h>
+#include <mach/cp_intc.h>
+#include <mach/da8xx.h>
+#include <mach/mux.h>
+#include <mach/nand.h>
+#include <mach/spi.h>
+
+#define ENBW_CMC_MMCSD_CD_PIN GPIO_TO_PIN(3, 13)
+
+/*
+ * USB1 VBUS is controlled by GPIO7[12], over-current is reported on GPIO7[8].
+ */
+#define DA850_USB_VBUS_PIN GPIO_TO_PIN(7, 12)
+#define ON_BD_USB_OVC GPIO_TO_PIN(7, 8)
+
+#if defined(CONFIG_USB_OHCI_HCD)
+static irqreturn_t enbw_cmc_usb_ocic_irq(int irq, void *dev_id);
+static da8xx_ocic_handler_t enbw_cmc_usb_ocic_handler;
+
+static int enbw_cmc_usb_set_power(unsigned port, int on)
+{
+ gpio_set_value(DA850_USB_VBUS_PIN, on);
+ return 0;
+}
+
+static int enbw_cmc_usb_get_power(unsigned port)
+{
+ return gpio_get_value(DA850_USB_VBUS_PIN);
+}
+
+static int enbw_cmc_usb_get_oci(unsigned port)
+{
+ return !gpio_get_value(ON_BD_USB_OVC);
+}
+
+static irqreturn_t enbw_cmc_usb_ocic_irq(int, void *);
+
+static int enbw_cmc_usb_ocic_notify(da8xx_ocic_handler_t handler)
+{
+ int irq = gpio_to_irq(ON_BD_USB_OVC);
+ int error = 0;
+
+ if (handler != NULL) {
+ enbw_cmc_usb_ocic_handler = handler;
+
+ error = request_irq(irq, enbw_cmc_usb_ocic_irq,
+ IRQF_DISABLED | IRQF_TRIGGER_RISING |
+ IRQF_TRIGGER_FALLING,
+ "OHCI over-current indicator", NULL);
+ if (error)
+ pr_err("%s: could not request IRQ to watch "
+ "over-current indicator changes\n", __func__);
+ } else {
+ free_irq(irq, NULL);
+ }
+ return error;
+}
+
+static struct da8xx_ohci_root_hub enbw_cmc_usb11_pdata = {
+ .set_power = enbw_cmc_usb_set_power,
+ .get_power = enbw_cmc_usb_get_power,
+ .get_oci = enbw_cmc_usb_get_oci,
+ .ocic_notify = enbw_cmc_usb_ocic_notify,
+ .potpgt = (10 + 1) / 2, /* 10 ms max */
+};
+
+static irqreturn_t enbw_cmc_usb_ocic_irq(int irq, void *dev_id)
+{
+ enbw_cmc_usb_ocic_handler(&enbw_cmc_usb11_pdata, 1);
+ return IRQ_HANDLED;
+}
+#endif
+
+static __init void enbw_cmc_usb_init(void)
+{
+ int ret;
+ u32 cfgchip2;
+
+ /* Set up USB clock/mode in the CFGCHIP2 register. */
+ cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+ /* USB2.0 PHY reference clock is AUXCLK with 24MHz */
+ cfgchip2 &= ~CFGCHIP2_REFFREQ;
+ cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
+
+ /*
+ * Select internal reference clock for USB 2.0 PHY
+ * and use it as a clock source for USB 1.1 PHY
+ * (this is the default setting anyway).
+ */
+ cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
+ cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
+
+ cfgchip2 &= ~CFGCHIP2_OTGMODE;
+ cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
+
+ __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+ ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
+ if (ret)
+ pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
+ __func__, ret);
+ else {
+ /*
+ * SP2525A @ 5V supplies 500mA,
+ * with the power on to power good time of 10 ms.
+ */
+ ret = da8xx_register_usb20(500, 10);
+ if (ret)
+ pr_warning("%s: USB 2.0 registration failed: %d\n",
+ __func__, ret);
+ }
+
+#if defined(CONFIG_USB_OHCI_HCD)
+ ret = gpio_request_one(DA850_USB_VBUS_PIN,
+ GPIOF_DIR_OUT, "USB 1.1 VBUS");
+ if (ret < 0) {
+ pr_err("%s: failed to request GPIO for USB 1.1 port "
+ "power control: %d\n", __func__, ret);
+ return;
+ }
+ gpio_direction_input(DA850_USB_VBUS_PIN);
+
+ ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
+ if (ret) {
+ printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
+ "over-current indicator: %d\n", __func__, ret);
+ gpio_free(DA850_USB_VBUS_PIN);
+ return;
+ }
+ gpio_direction_input(ON_BD_USB_OVC);
+
+ ret = da8xx_register_usb11(&enbw_cmc_usb11_pdata);
+ if (ret) {
+ pr_warning("%s: USB 1.1 registration failed: %d\n",
+ __func__, ret);
+ gpio_free(ON_BD_USB_OVC);
+ gpio_free(DA850_USB_VBUS_PIN);
+ }
+#endif
+
+ return;
+}
+
+static int enbw_cmc_mmc_get_ro(int index)
+{
+ return 0;
+}
+
+static int enbw_cmc_mmc_get_cd(int index)
+{
+ return gpio_get_value(ENBW_CMC_MMCSD_CD_PIN) ? 1 : 0;
+}
+
+static struct davinci_mmc_config enbw_cmc_mmc_config = {
+ .get_ro = enbw_cmc_mmc_get_ro,
+ .get_cd = enbw_cmc_mmc_get_cd,
+ .wires = 4,
+ .max_freq = 50000000,
+ .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
+ .version = MMC_CTLR_VERSION_2,
+};
+
+static int __init enbw_cmc_config_emac(void)
+{
+ void __iomem *cfg_chip3_base;
+ u32 val;
+ struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+ if (!machine_is_enbw_cmc())
+ return 0;
+
+ cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
+ val = __raw_readl(cfg_chip3_base);
+ val &= ~BIT(8);
+ pr_info("EMAC: MII PHY configured, RMII PHY will not be"
+ " functional\n");
+
+ /* configure the CFGCHIP3 register for MII */
+ __raw_writel(val, cfg_chip3_base);
+
+ /* use complete info from OF */
+ soc_info->emac_pdata = NULL;
+
+ return 0;
+}
+device_initcall(enbw_cmc_config_emac);
+
+static const s16 da850_dma0_rsv_chans[][2] = {
+ /* (offset, number) */
+ {-1, -1}
+};
+
+static const s16 da850_dma0_rsv_slots[][2] = {
+ /* (offset, number) */
+ {-1, -1}
+};
+
+static const s16 da850_dma1_rsv_chans[][2] = {
+ /* (offset, number) */
+ {-1, -1}
+};
+
+static const s16 da850_dma1_rsv_slots[][2] = {
+ /* (offset, number) */
+ {-1, -1}
+};
+
+static struct edma_rsv_info da850_edma_cc0_rsv = {
+ .rsv_chans = da850_dma0_rsv_chans,
+ .rsv_slots = da850_dma0_rsv_slots,
+};
+
+static struct edma_rsv_info da850_edma_cc1_rsv = {
+ .rsv_chans = da850_dma1_rsv_chans,
+ .rsv_slots = da850_dma1_rsv_slots,
+};
+
+static struct edma_rsv_info *da850_edma_rsv[2] = {
+ &da850_edma_cc0_rsv,
+ &da850_edma_cc1_rsv,
+};
+
+#ifdef CONFIG_CPU_FREQ
+static __init int da850_evm_init_cpufreq(void)
+{
+ switch (system_rev & 0xF) {
+ case 3:
+ da850_max_speed = 456000;
+ break;
+ case 2:
+ da850_max_speed = 408000;
+ break;
+ case 1:
+ da850_max_speed = 372000;
+ break;
+ }
+
+ return da850_register_cpufreq("pll0_sysclk3");
+}
+#else
+static __init int da850_evm_init_cpufreq(void) { return 0; }
+#endif
+
+struct of_dev_auxdata enbw_cmc_auxdata_lookup[] __initdata = {
+ OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "ti,davinci-wdt", NULL),
+ OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL),
+ OF_DEV_AUXDATA("ti,davinci-i2c", 0x01e28000, "i2c_davinci.2", NULL),
+ OF_DEV_AUXDATA("ti,davinci-dm6460-emac", 0x01e20000, "davinci_emac.1",
+ NULL),
+ {}
+};
+
+const struct of_device_id enbw_cmc_bus_match_table[] = {
+ { .compatible = "simple-bus", },
+ { .compatible = "ti,da850", },
+ { .compatible = "ti,davinci-onchipram", },
+ { .compatible = "ti,davinci-aemif", },
+ {} /* Empty terminated list */
+};
+
+static __init void enbw_cmc_init(void)
+{
+ int ret;
+
+ of_platform_populate(NULL, enbw_cmc_bus_match_table,
+ enbw_cmc_auxdata_lookup, NULL);
+
+ ret = da8xx_register_watchdog();
+ if (ret)
+ pr_warning("enbw_cmc_init: watchdog registration failed: %d\n",
+ ret);
+
+ ret = da850_register_edma(da850_edma_rsv);
+ if (ret)
+ pr_warning("enbw_cmc_init: edma registration failed: %d\n",
+ ret);
+
+ /*
+ * shut down uart 0 this port is not used on the board
+ */
+ __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
+
+ ret = da8xx_register_rtc();
+ if (ret)
+ pr_warning("enbw_cmc_init: rtc setup failed: %d\n", ret);
+
+ ret = da850_evm_init_cpufreq();
+ if (ret)
+ pr_warning("enbw_cmc_init: cpufreq registration failed: %d\n",
+ ret);
+
+ ret = da8xx_register_cpuidle();
+ if (ret)
+ pr_warning("enbw_cmc_init: cpuidle registration failed: %d\n",
+ ret);
+
+ ret = gpio_request(ENBW_CMC_MMCSD_CD_PIN, "MMC CD\n");
+ if (ret)
+ pr_warning("enbw_cmc_init: can not open GPIO %d\n",
+ ENBW_CMC_MMCSD_CD_PIN);
+ gpio_direction_input(ENBW_CMC_MMCSD_CD_PIN);
+
+ ret = da850_register_mmcsd1(&enbw_cmc_mmc_config);
+ if (ret)
+ pr_warning("enbw_cmc_init: mmcsd1 registration failed:"
+ " %d\n", ret);
+
+ enbw_cmc_usb_init();
+}
+
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+static int __init enbw_cmc_console_init(void)
+{
+ if (!machine_is_enbw_cmc())
+ return 0;
+
+ return add_preferred_console("ttyS", 2, "115200");
+}
+console_initcall(enbw_cmc_console_init);
+#endif
+
+static void __init enbw_cmc_map_io(void)
+{
+ da850_init();
+}
+
+static const char *enbw_cmc_board_compat[] __initconst = {
+ "enbw,cmc",
+ NULL
+};
+
+MACHINE_START(ENBW_CMC, "EnBW CMC")
+ .map_io = enbw_cmc_map_io,
+ .init_irq = cp_intc_init,
+ .timer = &davinci_timer,
+ .init_machine = enbw_cmc_init,
+ .dt_compat = enbw_cmc_board_compat,
+ .dma_zone_size = SZ_128M,
+ .restart = da8xx_restart,
+MACHINE_END
diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h
index 9dc7cf9..2f21384 100644
--- a/arch/arm/mach-davinci/include/mach/uncompress.h
+++ b/arch/arm/mach-davinci/include/mach/uncompress.h
@@ -96,6 +96,7 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
DEBUG_LL_DA8XX(davinci_da850_evm, 2);
DEBUG_LL_DA8XX(mityomapl138, 1);
DEBUG_LL_DA8XX(omapl138_hawkboard, 2);
+ DEBUG_LL_DA8XX(enbw_cmc, 2);
/* TNETV107x boards */
DEBUG_LL_TNETV107X(tnetv107x, 1);
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v3 7/7] ARM: davinci: add support for the am1808 based enbw_cmc board
@ 2012-03-05 11:10 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-03-05 11:10 UTC (permalink / raw)
To: linux-arm-kernel
- AM1808 based board
- 64 MiB DDR ram
- 2 MiB Nor flash
- 128 MiB NAND flash
- use internal RTC
- I2C support
- hwmon lm75 support
- UBI/UBIFS support
- MMC support
- USB OTG support
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: linux-arm-kernel at lists.infradead.org
Cc: devicetree-discuss at lists.ozlabs.org
Cc: davinci-linux-open-source at linux.davincidsp.com
Cc: linux-mtd at lists.infradead.org
Cc: linux-i2c at vger.kernel.org
Cc: netdev at vger.kernel.org
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
---
- post this board support with USB support, even though
USB is only working with the 10 ms "workaround", posted here:
http://comments.gmane.org/gmane.linux.usb.general/54505
I see this issue also on the AM1808 TMDXEXP1808L evalboard.
- MMC and USB are not using OF support yet, ideas how to port
this are welcome. I need for USB and MMC boards board
specific callbacks, how to solve this with OF support?
- changes for v2:
- changes in the nand node due to comments from Scott Wood:
- add "ti,davinci-" prefix
- Dashes are preferred to underscores
- rename "nandflash" to "nand"
- introduce new "ti,davinci" specific properties for setting
up ecc_mode, ecc_bits, options and bbt options, instead
using linux defines
- changes for i2c due to comments from Sylwester Nawrocki:
- use "cell-index" instead "id"
- OF_DEV_AUXDATA in the machine code, instead pre-define
platform device name
- add comment from Grant Likely for i2c:
- removed "id" resp. "cell-index" completely
- fixed documentation
- use of_match_ptr()
- use devm_kzalloc() for allocating plattform data mem
- fixed a whitespace issue
- add net comments from Grant Likely:
- add prefix "ti,davinci-" to davinci specific property names
- remove version property
- use compatible name "ti,davinci-dm6460-emac"
- add comment from Grant Likely:
- rename compatible node
- do not use cell-index
- CONFIG_OF required for this board
TODO:
- create a generic board support file, as I got no
answer to my ping to grant, maybe this could be done
in a second step?
- changes for v3:
- add comments from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"
- cp_intc_init now used for Interrupt controller init
arch/arm/boot/dts/enbw_cmc.dts | 268 ++++++++++++++++
arch/arm/configs/enbw_cmc_defconfig | 123 ++++++++
arch/arm/mach-davinci/Kconfig | 9 +
arch/arm/mach-davinci/Makefile | 1 +
arch/arm/mach-davinci/board-enbw-cmc.c | 380 +++++++++++++++++++++++
arch/arm/mach-davinci/include/mach/uncompress.h | 1 +
6 files changed, 782 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
create mode 100644 arch/arm/configs/enbw_cmc_defconfig
create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
diff --git a/arch/arm/boot/dts/enbw_cmc.dts b/arch/arm/boot/dts/enbw_cmc.dts
new file mode 100644
index 0000000..143b2e2
--- /dev/null
+++ b/arch/arm/boot/dts/enbw_cmc.dts
@@ -0,0 +1,268 @@
+/*
+ * Device Tree for the EnBW CMC plattform
+ *
+ * Copyright 2011 DENX Software Engineering GmbH
+ * Heiko Schocher <hs@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+/dts-v1/;
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "EnBW CMC";
+ compatible = "enbw,cmc";
+
+ aliases {
+ ethernet0 = ð0;
+ };
+
+ arm {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xfffee000 0x00020000>;
+ intc: interrupt-controller at 1 {
+ compatible = "ti,cp_intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ ti,intc-size = <101>;
+ reg = <0x0 0x2000>;
+ };
+ };
+ soc at 1c00000 {
+ compatible = "ti,da850";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x01c00000 0x400000>;
+
+ serial0: serial at 1c42000 {
+ compatible = "ti,da850", "ns16550a";
+ reg = <0x42000 0x100>;
+ clock-frequency = <150000000>;
+ reg-shift = <2>;
+ interrupts = <25>;
+ interrupt-parent = <&intc>;
+ };
+ serial1: serial at 1d0c000 {
+ compatible = "ti,da850", "ns16550a";
+ reg = <0x10c000 0x100>;
+ clock-frequency = <150000000>;
+ reg-shift = <2>;
+ interrupts = <53>;
+ interrupt-parent = <&intc>;
+ };
+ serial2: serial at 1d0d000 {
+ compatible = "ti,da850", "ns16550a";
+ reg = <0x10d000 0x100>;
+ clock-frequency = <150000000>;
+ reg-shift = <2>;
+ interrupts = <61>;
+ interrupt-parent = <&intc>;
+ };
+
+ nor_pins: nor_pinmux at 1c14120 {
+ compatible = "ti,davinci-pinmux";
+ reg = <0x14120 0x1000>;
+ pins = < /* muxreg maskoff modemsk muxmode */
+ 5 24 15 1 /* EMA_BA_1 */
+ 6 0 15 1 /* EMA CLK */
+ 6 24 15 1 /* EMA_WAIT_1 */
+ 7 0 15 1 /* NEMA_CS_2 */
+ 7 16 15 1 /* NEMA_WE */
+ 7 20 15 1 /* NEMA_OE */
+ 9 28 15 1 /* EMA_D_0 */
+ 9 24 15 1 /* EMA_D_1 */
+ 9 20 15 1 /* EMA_D_2 */
+ 9 16 15 1 /* EMA_D_3 */
+ 9 12 15 1 /* EMA_D_4 */
+ 9 8 15 1 /* EMA_D_5 */
+ 9 4 15 1 /* EMA_D_6 */
+ 9 0 15 1 /* EMA_D_7 */
+ 8 28 15 1 /* EMA_D_8 */
+ 8 24 15 1 /* EMA_D_9 */
+ 8 20 15 1 /* EMA_D_10 */
+ 8 16 15 1 /* EMA_D_11 */
+ 8 12 15 1 /* EMA_D_12 */
+ 8 8 15 1 /* EMA_D_13 */
+ 8 4 15 1 /* EMA_D_14 */
+ 8 0 15 1 /* EMA_D_15 */
+ 12 28 15 1 /* EMA_A_0 */
+ 12 24 15 1 /* EMA_A_1 */
+ 12 20 15 1 /* EMA_A_2 */
+ 12 16 15 1 /* EMA_A_3 */
+ 12 12 15 1 /* EMA_A_4 */
+ 12 8 15 1 /* EMA_A_5 */
+ 12 4 15 1 /* EMA_A_6 */
+ 12 0 15 1 /* EMA_A_7 */
+ 11 28 15 1 /* EMA_A_8 */
+ 11 24 15 1 /* EMA_A_9 */
+ 11 20 15 1 /* EMA_A_10 */
+ 11 16 15 1 /* EMA_A_11 */
+ 11 12 15 1 /* EMA_A_12 */
+ 11 8 15 1 /* EMA_A_13 */
+ 11 4 15 1 /* EMA_A_14 */
+ 11 0 15 1 /* EMA_A_15 */
+ 10 28 15 1 /* EMA_A_16 */
+ 10 24 15 1 /* EMA_A_17 */
+ 10 20 15 1 /* EMA_A_18 */
+ 10 16 15 1 /* EMA_A_19 */
+ 10 12 15 1 /* EMA_A_20 */
+ 10 8 15 1 /* EMA_A_21 */
+ 10 4 15 1 /* EMA_A_22 */
+ 10 0 15 1 /* EMA_A_23 */
+ >;
+ };
+ nand_pins: nand_pinmux at 1c14120 {
+ compatible = "ti,davinci-pinmux";
+ reg = <0x14120 0x1000>;
+ pins = < /* muxreg maskoff modemsk muxmode */
+ 7 4 15 1 /* NEMA_CS_3 */
+ >;
+ };
+
+ emac_pins: pinmux at 1c14120 {
+ compatible = "ti,davinci-pinmux";
+ reg = <0x14120 0x1000>;
+ pins = < /* muxreg maskoff modemsk muxmode */
+ 2 4 15 8 /* MII TXEN */
+ 2 8 15 8 /* MII TXCLK */
+ 2 12 15 8 /* MII COL */
+ 2 16 15 8 /* MII TXD_3 */
+ 2 20 15 8 /* MII TXD_2 */
+ 2 24 15 8 /* MII TXD_1 */
+ 2 28 15 8 /* MII TXD_0 */
+ 3 8 15 8 /* MII RXER */
+ 3 12 15 8 /* MII CRS */
+ 3 0 15 8 /* MII RXCLK */
+ 3 4 15 8 /* MII RXDV */
+ 3 16 15 8 /* MII RXD_3 */
+ 3 20 15 8 /* MII RXD_2 */
+ 3 24 15 8 /* MII RXD_1 */
+ 3 28 15 8 /* MII RXD_0 */
+ 4 0 15 8 /* MDIO CLK */
+ 4 4 15 8 /* MDIO D */
+ >;
+ };
+
+ i2c1_pins: i2c_pinmux at 1c14120 {
+ compatible = "ti,davinci-pinmux";
+ reg = <0x14120 0x1000>;
+ pins = < /* muxreg maskoff modemsk muxmode */
+ 4 12 15 2 /* I2C0 SDA */
+ 4 8 15 2 /* I2C0 SCL */
+ >;
+ };
+
+ eth0: emac at 1e20000 {
+ compatible = "ti,davinci-dm6460-emac";
+ reg = <0x220000 0x4000>;
+ ti,davinci-ctrl-reg-offset = <0x3000>;
+ ti,davinci-ctrl-mod-reg-offset = <0x2000>;
+ ti,davinci-ctrl-ram-offset = <0>;
+ ti,davinci-ctrl-ram-size = <0x2000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <33
+ 34
+ 35
+ 36
+ >;
+ interrupt-parent = <&intc>;
+ pinmux-handle = <&emac_pins>;
+ };
+
+ i2c at 1c22000 {
+ compatible = "ti,davinci-i2c";
+ reg = <0x22000 0x1000>;
+ clock-frequency = <100000>;
+ interrupts = <15>;
+ interrupt-parent = <&intc>;
+ pinmux-handle = <&i2c1_pins>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dtt at 48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ };
+ };
+ };
+ onchipram at 8000000 {
+ compatible = "ti,davinci-onchipram";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x80000000 0x20000>;
+ };
+ aemif at 60000000 {
+ compatible = "ti,davinci-aemif";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <0x68000000 0x80000>;
+ ranges = <2 0 0x60000000 0x02000000
+ 3 0 0x62000000 0x02000000
+ 4 0 0x64000000 0x02000000
+ 5 0 0x66000000 0x02000000
+ 6 0 0x68000000 0x02000000>;
+ cs2 at 68000000 {
+ compatible = "ti,davinci-cs";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* all timings in nanoseconds */
+ cs = <2>;
+ asize = <1>;
+ ta = <0>;
+ rhold = <7>;
+ rstrobe = <42>;
+ rsetup = <14>;
+ whold = <7>;
+ wstrobe = <42>;
+ wsetup = <14>;
+ ew = <0>;
+ ss = <0>;
+ };
+ flash at 2,0 {
+ compatible = "cfi-flash";
+ reg = <2 0x0 0x400000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bank-width = <2>;
+ device-width = <2>;
+ };
+ nand_cs: cs3 at 68000000 {
+ compatible = "ti,davinci-cs";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* all timings in nanoseconds */
+ cs = <3>;
+ asize = <0>;
+ ta = <0>;
+ rhold = <7>;
+ rstrobe = <42>;
+ rsetup = <7>;
+ whold = <7>;
+ wstrobe = <14>;
+ wsetup = <7>;
+ ew = <0>;
+ ss = <0>;
+ };
+ nand at 3,0 {
+ compatible = "ti,davinci-nand";
+ reg = <3 0x0 0x807ff
+ 6 0x0 0x8000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ti,davinci-chipselect = <1>;
+ ti,davinci-mask-ale = <0>;
+ ti,davinci-mask-cle = <0>;
+ ti,davinci-mask-chipsel = <0>;
+ ti,davinci-ecc-mode = "hw";
+ ti,davinci-ecc-bits = <4>;
+ ti,davinci-nand-use-bbt;
+ pinmux-handle = <&nand_pins>;
+ timing-handle = <&nand_cs>;
+ };
+
+ };
+};
diff --git a/arch/arm/configs/enbw_cmc_defconfig b/arch/arm/configs/enbw_cmc_defconfig
new file mode 100644
index 0000000..9d98e7f
--- /dev/null
+++ b/arch/arm/configs/enbw_cmc_defconfig
@@ -0,0 +1,123 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EXPERT=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_DAVINCI=y
+CONFIG_ARCH_DAVINCI_DA850=y
+# CONFIG_MACH_DAVINCI_DA850_EVM is not set
+CONFIG_GPIO_PCA953X=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_USE_OF=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_LRO is not set
+CONFIG_IPV6=y
+CONFIG_NETFILTER=y
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_FW_LOADER is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_DAVINCI=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=32768
+CONFIG_EEPROM_AT24=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_TI_DAVINCI_EMAC=y
+# CONFIG_WLAN is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=y
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=3
+CONFIG_SERIAL_8250_RUNTIME_UARTS=3
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_DAVINCI=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_PCF857X=y
+CONFIG_SENSORS_LM75=y
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CORE=y
+CONFIG_DAVINCI_WATCHDOG=y
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_MUSB_DA8XX=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_UAS=y
+CONFIG_USB_LIBUSUAL=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_FUSB300=y
+CONFIG_USB_ETH=y
+CONFIG_MMC=y
+CONFIG_MMC_DAVINCI=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_OMAP=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_UBIFS_FS=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_UTF8=y
+CONFIG_DEBUG_FS=y
+CONFIG_TIMER_STATS=y
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+CONFIG_CRC_CCITT=m
+CONFIG_CRC_T10DIF=m
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 32d837d..4cb0469 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -202,6 +202,15 @@ config DA850_WL12XX
Say Y if you want to use a wl1271 expansion card connected to the
AM18x EVM.
+config MACH_ENBW_CMC
+ bool "EnBW Communication Module Compact"
+ default ARCH_DAVINCI_DA850
+ depends on ARCH_DAVINCI_DA850
+ select OF
+ help
+ Say Y here to select the EnBW Communication Module Compact
+ board.
+
config GPIO_PCA953X
default MACH_DAVINCI_DA850_EVM
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 2db78bd..12f3166 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o
obj-$(CONFIG_MACH_TNETV107X) += board-tnetv107x-evm.o
obj-$(CONFIG_MACH_MITYOMAPL138) += board-mityomapl138.o
obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-omapl138-hawk.o
+obj-$(CONFIG_MACH_ENBW_CMC) += board-enbw-cmc.o
# Power Management
obj-$(CONFIG_CPU_FREQ) += cpufreq.o
diff --git a/arch/arm/mach-davinci/board-enbw-cmc.c b/arch/arm/mach-davinci/board-enbw-cmc.c
new file mode 100644
index 0000000..8cb60fb
--- /dev/null
+++ b/arch/arm/mach-davinci/board-enbw-cmc.c
@@ -0,0 +1,380 @@
+/*
+ * EnBW Communication Module Compact board
+ * Copyright 2011 DENX Software Engineering GmbH
+ * Author: Heiko Schocher <hs@denx.de>
+ *
+ * based on:
+ * TI DA850/OMAP-L138 EVM board
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Derived from: arch/arm/mach-davinci/board-da850-evm.c
+ * Original Copyrights follow:
+ *
+ * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/console.h>
+#include <linux/gpio.h>
+#include <linux/gpio_keys.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/of.h>
+#include <linux/of_net.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/phy.h>
+#include <linux/phy_fixed.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/aemif.h>
+#include <mach/cp_intc.h>
+#include <mach/da8xx.h>
+#include <mach/mux.h>
+#include <mach/nand.h>
+#include <mach/spi.h>
+
+#define ENBW_CMC_MMCSD_CD_PIN GPIO_TO_PIN(3, 13)
+
+/*
+ * USB1 VBUS is controlled by GPIO7[12], over-current is reported on GPIO7[8].
+ */
+#define DA850_USB_VBUS_PIN GPIO_TO_PIN(7, 12)
+#define ON_BD_USB_OVC GPIO_TO_PIN(7, 8)
+
+#if defined(CONFIG_USB_OHCI_HCD)
+static irqreturn_t enbw_cmc_usb_ocic_irq(int irq, void *dev_id);
+static da8xx_ocic_handler_t enbw_cmc_usb_ocic_handler;
+
+static int enbw_cmc_usb_set_power(unsigned port, int on)
+{
+ gpio_set_value(DA850_USB_VBUS_PIN, on);
+ return 0;
+}
+
+static int enbw_cmc_usb_get_power(unsigned port)
+{
+ return gpio_get_value(DA850_USB_VBUS_PIN);
+}
+
+static int enbw_cmc_usb_get_oci(unsigned port)
+{
+ return !gpio_get_value(ON_BD_USB_OVC);
+}
+
+static irqreturn_t enbw_cmc_usb_ocic_irq(int, void *);
+
+static int enbw_cmc_usb_ocic_notify(da8xx_ocic_handler_t handler)
+{
+ int irq = gpio_to_irq(ON_BD_USB_OVC);
+ int error = 0;
+
+ if (handler != NULL) {
+ enbw_cmc_usb_ocic_handler = handler;
+
+ error = request_irq(irq, enbw_cmc_usb_ocic_irq,
+ IRQF_DISABLED | IRQF_TRIGGER_RISING |
+ IRQF_TRIGGER_FALLING,
+ "OHCI over-current indicator", NULL);
+ if (error)
+ pr_err("%s: could not request IRQ to watch "
+ "over-current indicator changes\n", __func__);
+ } else {
+ free_irq(irq, NULL);
+ }
+ return error;
+}
+
+static struct da8xx_ohci_root_hub enbw_cmc_usb11_pdata = {
+ .set_power = enbw_cmc_usb_set_power,
+ .get_power = enbw_cmc_usb_get_power,
+ .get_oci = enbw_cmc_usb_get_oci,
+ .ocic_notify = enbw_cmc_usb_ocic_notify,
+ .potpgt = (10 + 1) / 2, /* 10 ms max */
+};
+
+static irqreturn_t enbw_cmc_usb_ocic_irq(int irq, void *dev_id)
+{
+ enbw_cmc_usb_ocic_handler(&enbw_cmc_usb11_pdata, 1);
+ return IRQ_HANDLED;
+}
+#endif
+
+static __init void enbw_cmc_usb_init(void)
+{
+ int ret;
+ u32 cfgchip2;
+
+ /* Set up USB clock/mode in the CFGCHIP2 register. */
+ cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+ /* USB2.0 PHY reference clock is AUXCLK with 24MHz */
+ cfgchip2 &= ~CFGCHIP2_REFFREQ;
+ cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
+
+ /*
+ * Select internal reference clock for USB 2.0 PHY
+ * and use it as a clock source for USB 1.1 PHY
+ * (this is the default setting anyway).
+ */
+ cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
+ cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
+
+ cfgchip2 &= ~CFGCHIP2_OTGMODE;
+ cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
+
+ __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+ ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
+ if (ret)
+ pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
+ __func__, ret);
+ else {
+ /*
+ * SP2525A @ 5V supplies 500mA,
+ * with the power on to power good time of 10 ms.
+ */
+ ret = da8xx_register_usb20(500, 10);
+ if (ret)
+ pr_warning("%s: USB 2.0 registration failed: %d\n",
+ __func__, ret);
+ }
+
+#if defined(CONFIG_USB_OHCI_HCD)
+ ret = gpio_request_one(DA850_USB_VBUS_PIN,
+ GPIOF_DIR_OUT, "USB 1.1 VBUS");
+ if (ret < 0) {
+ pr_err("%s: failed to request GPIO for USB 1.1 port "
+ "power control: %d\n", __func__, ret);
+ return;
+ }
+ gpio_direction_input(DA850_USB_VBUS_PIN);
+
+ ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
+ if (ret) {
+ printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
+ "over-current indicator: %d\n", __func__, ret);
+ gpio_free(DA850_USB_VBUS_PIN);
+ return;
+ }
+ gpio_direction_input(ON_BD_USB_OVC);
+
+ ret = da8xx_register_usb11(&enbw_cmc_usb11_pdata);
+ if (ret) {
+ pr_warning("%s: USB 1.1 registration failed: %d\n",
+ __func__, ret);
+ gpio_free(ON_BD_USB_OVC);
+ gpio_free(DA850_USB_VBUS_PIN);
+ }
+#endif
+
+ return;
+}
+
+static int enbw_cmc_mmc_get_ro(int index)
+{
+ return 0;
+}
+
+static int enbw_cmc_mmc_get_cd(int index)
+{
+ return gpio_get_value(ENBW_CMC_MMCSD_CD_PIN) ? 1 : 0;
+}
+
+static struct davinci_mmc_config enbw_cmc_mmc_config = {
+ .get_ro = enbw_cmc_mmc_get_ro,
+ .get_cd = enbw_cmc_mmc_get_cd,
+ .wires = 4,
+ .max_freq = 50000000,
+ .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
+ .version = MMC_CTLR_VERSION_2,
+};
+
+static int __init enbw_cmc_config_emac(void)
+{
+ void __iomem *cfg_chip3_base;
+ u32 val;
+ struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+ if (!machine_is_enbw_cmc())
+ return 0;
+
+ cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
+ val = __raw_readl(cfg_chip3_base);
+ val &= ~BIT(8);
+ pr_info("EMAC: MII PHY configured, RMII PHY will not be"
+ " functional\n");
+
+ /* configure the CFGCHIP3 register for MII */
+ __raw_writel(val, cfg_chip3_base);
+
+ /* use complete info from OF */
+ soc_info->emac_pdata = NULL;
+
+ return 0;
+}
+device_initcall(enbw_cmc_config_emac);
+
+static const s16 da850_dma0_rsv_chans[][2] = {
+ /* (offset, number) */
+ {-1, -1}
+};
+
+static const s16 da850_dma0_rsv_slots[][2] = {
+ /* (offset, number) */
+ {-1, -1}
+};
+
+static const s16 da850_dma1_rsv_chans[][2] = {
+ /* (offset, number) */
+ {-1, -1}
+};
+
+static const s16 da850_dma1_rsv_slots[][2] = {
+ /* (offset, number) */
+ {-1, -1}
+};
+
+static struct edma_rsv_info da850_edma_cc0_rsv = {
+ .rsv_chans = da850_dma0_rsv_chans,
+ .rsv_slots = da850_dma0_rsv_slots,
+};
+
+static struct edma_rsv_info da850_edma_cc1_rsv = {
+ .rsv_chans = da850_dma1_rsv_chans,
+ .rsv_slots = da850_dma1_rsv_slots,
+};
+
+static struct edma_rsv_info *da850_edma_rsv[2] = {
+ &da850_edma_cc0_rsv,
+ &da850_edma_cc1_rsv,
+};
+
+#ifdef CONFIG_CPU_FREQ
+static __init int da850_evm_init_cpufreq(void)
+{
+ switch (system_rev & 0xF) {
+ case 3:
+ da850_max_speed = 456000;
+ break;
+ case 2:
+ da850_max_speed = 408000;
+ break;
+ case 1:
+ da850_max_speed = 372000;
+ break;
+ }
+
+ return da850_register_cpufreq("pll0_sysclk3");
+}
+#else
+static __init int da850_evm_init_cpufreq(void) { return 0; }
+#endif
+
+struct of_dev_auxdata enbw_cmc_auxdata_lookup[] __initdata = {
+ OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "ti,davinci-wdt", NULL),
+ OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL),
+ OF_DEV_AUXDATA("ti,davinci-i2c", 0x01e28000, "i2c_davinci.2", NULL),
+ OF_DEV_AUXDATA("ti,davinci-dm6460-emac", 0x01e20000, "davinci_emac.1",
+ NULL),
+ {}
+};
+
+const struct of_device_id enbw_cmc_bus_match_table[] = {
+ { .compatible = "simple-bus", },
+ { .compatible = "ti,da850", },
+ { .compatible = "ti,davinci-onchipram", },
+ { .compatible = "ti,davinci-aemif", },
+ {} /* Empty terminated list */
+};
+
+static __init void enbw_cmc_init(void)
+{
+ int ret;
+
+ of_platform_populate(NULL, enbw_cmc_bus_match_table,
+ enbw_cmc_auxdata_lookup, NULL);
+
+ ret = da8xx_register_watchdog();
+ if (ret)
+ pr_warning("enbw_cmc_init: watchdog registration failed: %d\n",
+ ret);
+
+ ret = da850_register_edma(da850_edma_rsv);
+ if (ret)
+ pr_warning("enbw_cmc_init: edma registration failed: %d\n",
+ ret);
+
+ /*
+ * shut down uart 0 this port is not used on the board
+ */
+ __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
+
+ ret = da8xx_register_rtc();
+ if (ret)
+ pr_warning("enbw_cmc_init: rtc setup failed: %d\n", ret);
+
+ ret = da850_evm_init_cpufreq();
+ if (ret)
+ pr_warning("enbw_cmc_init: cpufreq registration failed: %d\n",
+ ret);
+
+ ret = da8xx_register_cpuidle();
+ if (ret)
+ pr_warning("enbw_cmc_init: cpuidle registration failed: %d\n",
+ ret);
+
+ ret = gpio_request(ENBW_CMC_MMCSD_CD_PIN, "MMC CD\n");
+ if (ret)
+ pr_warning("enbw_cmc_init: can not open GPIO %d\n",
+ ENBW_CMC_MMCSD_CD_PIN);
+ gpio_direction_input(ENBW_CMC_MMCSD_CD_PIN);
+
+ ret = da850_register_mmcsd1(&enbw_cmc_mmc_config);
+ if (ret)
+ pr_warning("enbw_cmc_init: mmcsd1 registration failed:"
+ " %d\n", ret);
+
+ enbw_cmc_usb_init();
+}
+
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+static int __init enbw_cmc_console_init(void)
+{
+ if (!machine_is_enbw_cmc())
+ return 0;
+
+ return add_preferred_console("ttyS", 2, "115200");
+}
+console_initcall(enbw_cmc_console_init);
+#endif
+
+static void __init enbw_cmc_map_io(void)
+{
+ da850_init();
+}
+
+static const char *enbw_cmc_board_compat[] __initconst = {
+ "enbw,cmc",
+ NULL
+};
+
+MACHINE_START(ENBW_CMC, "EnBW CMC")
+ .map_io = enbw_cmc_map_io,
+ .init_irq = cp_intc_init,
+ .timer = &davinci_timer,
+ .init_machine = enbw_cmc_init,
+ .dt_compat = enbw_cmc_board_compat,
+ .dma_zone_size = SZ_128M,
+ .restart = da8xx_restart,
+MACHINE_END
diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h
index 9dc7cf9..2f21384 100644
--- a/arch/arm/mach-davinci/include/mach/uncompress.h
+++ b/arch/arm/mach-davinci/include/mach/uncompress.h
@@ -96,6 +96,7 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
DEBUG_LL_DA8XX(davinci_da850_evm, 2);
DEBUG_LL_DA8XX(mityomapl138, 1);
DEBUG_LL_DA8XX(omapl138_hawkboard, 2);
+ DEBUG_LL_DA8XX(enbw_cmc, 2);
/* TNETV107x boards */
DEBUG_LL_TNETV107X(tnetv107x, 1);
--
1.7.7.6
^ permalink raw reply related [flat|nested] 42+ messages in thread
* Re: [PATCH v3 0/7] ARM: davinci: add support for the am1808 based enbw_cmc board
[not found] ` <1330945804-3379-1-git-send-email-hs-ynQEQJNshbs@public.gmane.org>
2012-03-05 11:09 ` Heiko Schocher
2012-03-05 11:09 ` Heiko Schocher
@ 2012-05-04 15:33 ` Heiko Schocher
2012-03-05 11:10 ` Heiko Schocher
` (3 subsequent siblings)
6 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-05-04 15:33 UTC (permalink / raw)
To: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/
Cc: Kevin Hilman, Wolfgang Denk, Sergei Shtylyov,
netdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ, Wolfram Sang,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, Ben Dooks, David Woodhouse,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Hello,
this v3 patchset is now pending for more than 1 month without
seeing comments for it. Are there no more issues?
Should I rebase it (if no further comments occur), as it is
pending so long? (If so, against which tree?)
Thanks.
bye,
Heiko
Heiko Schocher wrote:
> This patchserie add support for the davinci am1808 based
> enbw_cmc board.
>
> Important: I rebased this patchserie against the irqdomain/next
> branch from grant likely, as he suggested to rework the OF
> intcontroller changes to the irqdomain work, branch found here:
>
> http://git.secretlab.ca/?p=linux-2.6.git;a=shortlog;h=refs/heads/irqdomain/next
>
> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>
> commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
> Author: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
> Date: Fri Feb 24 14:58:54 2012 -0700
>
> mfd: twl-core: Add IRQ_DOMAIN dependency
>
> changes for v2:
> Post this patchserie now as v2, as reworked in the
> comments I got for the RFC serie.
>
> changes for v3:
> - Interrupt Controller:
> - comment from Sergei Shtylyov:
> - rename compatible" prop to "ti,cp_intc"
> - cp_intc_init() is now also for the of case
> the name of the init function (it calls the
> "new" __cp_intc_init() function, which was
> the "old" cp_intc_init()). Through this
> rework the changes for OF is better visible.
> As the OF case uses the irq_domain rework from
> Grant Likely, maybe the none OF case can use
> this also, but this should be tested on a hw ...
>
> Got no comments to the following points, I noted in the
> RFC series, so posting this patchseries with them:
>
> - ARM: davinci: configure davinci aemif chipselects through OF
> not moved to mfd, as mentioned in this discussion:
> http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
> instead use a phandle in the DTS, so drivers which
> uses the davinci aemif, can call davinci_aemif_setup_timing_of()
>
> This is just thought as an RFC ... The enbw_cmc board
> support not really need to setup this bus timings, as
> they are setup in U-Boot ... but I want to post this,
> as I think, it is a nice to have, and I am not really
> sure, if this has to be a MFD device (If so, all bus
> interfaces for other SoCs should be converted also to
> MFD devices) ... as an example how this can be used
> I add this to the davinci nand controller OF support
> patch, in this patchserie.
>
> - ARM: davinci: mux: add OF support
> I want to get rid of the pin setup code in board code ...
> This patch introduces a davinci_cfg_reg_of() function,
> which davinci drivers can call, if they found a
> "pinmux-handle", so used in the following drivers in
> this patchserie:
>
> drivers/net/ethernet/ti/davinci_emac
> drivers/i2c/busses/i2c-davinci.c
> drivers/mtd/nand/davinci_nand.c
>
> - post this board support with USB support, even though
> USB is only working with the 10 ms "workaround", posted here:
> http://comments.gmane.org/gmane.linux.usb.general/54505
> I see this issue also on the AM1808 TMDXEXP1808L evalboard.
>
> - MMC and USB are not using OF support yet, ideas how to port
> this are welcome. I need for USB and MMC board specific
> callbacks, how to solve this with OF support?
>
> Signed-off-by: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
> Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
> Cc: linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> Cc: linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Cc: David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
> Cc: Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>
> Cc: Wolfram Sang <w.sang-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> Cc: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
> Cc: Kevin Hilman <khilman-l0cyMroinI0@public.gmane.org>
> Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
> Cc: Sergei Shtylyov <sshtylyov-Igf4POYTYCDQT0dZR+AlfA@public.gmane.org>
>
> Heiko Schocher (7):
> ARM: davinci, intc: Add OF support for TI interrupt controller
> ARM: davinci: configure davinci aemif chipselects through OF
> ARM: davinci: mux: add OF support
> ARM: davinci: net: davinci_emac: add OF support
> ARM: davinci: i2c: add OF support
> ARM: mtd: nand: davinci: add OF support for davinci nand controller
> ARM: davinci: add support for the am1808 based enbw_cmc board
>
> .../devicetree/bindings/arm/davinci/aemif.txt | 119 ++++++
> .../bindings/arm/davinci/davinci_emac.txt | 43 +++
> .../devicetree/bindings/arm/davinci/i2c.txt | 33 ++
> .../devicetree/bindings/arm/davinci/intc.txt | 27 ++
> .../devicetree/bindings/arm/davinci/mux.txt | 40 ++
> .../devicetree/bindings/arm/davinci/nand.txt | 74 ++++
> arch/arm/boot/dts/enbw_cmc.dts | 268 ++++++++++++++
> arch/arm/configs/enbw_cmc_defconfig | 123 +++++++
> arch/arm/mach-davinci/Kconfig | 9 +
> arch/arm/mach-davinci/Makefile | 1 +
> arch/arm/mach-davinci/aemif.c | 86 +++++-
> arch/arm/mach-davinci/board-enbw-cmc.c | 380 ++++++++++++++++++++
> arch/arm/mach-davinci/cp_intc.c | 87 ++++-
> arch/arm/mach-davinci/include/mach/aemif.h | 1 +
> arch/arm/mach-davinci/include/mach/mux.h | 2 +
> arch/arm/mach-davinci/include/mach/uncompress.h | 1 +
> arch/arm/mach-davinci/mux.c | 73 ++++-
> drivers/i2c/busses/i2c-davinci.c | 37 ++
> drivers/mtd/nand/davinci_nand.c | 85 +++++-
> drivers/net/ethernet/ti/davinci_emac.c | 94 +++++-
> 20 files changed, 1569 insertions(+), 14 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
> create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
> create mode 100644 arch/arm/configs/enbw_cmc_defconfig
> create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
>
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd-ynQEQJNshbs@public.gmane.org
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 0/7] ARM: davinci: add support for the am1808 based enbw_cmc board
@ 2012-05-04 15:33 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-05-04 15:33 UTC (permalink / raw)
To: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/
Cc: Kevin Hilman, Wolfgang Denk, Sergei Shtylyov,
netdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ, Wolfram Sang,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, Ben Dooks, David Woodhouse,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Hello,
this v3 patchset is now pending for more than 1 month without
seeing comments for it. Are there no more issues?
Should I rebase it (if no further comments occur), as it is
pending so long? (If so, against which tree?)
Thanks.
bye,
Heiko
Heiko Schocher wrote:
> This patchserie add support for the davinci am1808 based
> enbw_cmc board.
>
> Important: I rebased this patchserie against the irqdomain/next
> branch from grant likely, as he suggested to rework the OF
> intcontroller changes to the irqdomain work, branch found here:
>
> http://git.secretlab.ca/?p=linux-2.6.git;a=shortlog;h=refs/heads/irqdomain/next
>
> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>
> commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
> Author: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
> Date: Fri Feb 24 14:58:54 2012 -0700
>
> mfd: twl-core: Add IRQ_DOMAIN dependency
>
> changes for v2:
> Post this patchserie now as v2, as reworked in the
> comments I got for the RFC serie.
>
> changes for v3:
> - Interrupt Controller:
> - comment from Sergei Shtylyov:
> - rename compatible" prop to "ti,cp_intc"
> - cp_intc_init() is now also for the of case
> the name of the init function (it calls the
> "new" __cp_intc_init() function, which was
> the "old" cp_intc_init()). Through this
> rework the changes for OF is better visible.
> As the OF case uses the irq_domain rework from
> Grant Likely, maybe the none OF case can use
> this also, but this should be tested on a hw ...
>
> Got no comments to the following points, I noted in the
> RFC series, so posting this patchseries with them:
>
> - ARM: davinci: configure davinci aemif chipselects through OF
> not moved to mfd, as mentioned in this discussion:
> http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
> instead use a phandle in the DTS, so drivers which
> uses the davinci aemif, can call davinci_aemif_setup_timing_of()
>
> This is just thought as an RFC ... The enbw_cmc board
> support not really need to setup this bus timings, as
> they are setup in U-Boot ... but I want to post this,
> as I think, it is a nice to have, and I am not really
> sure, if this has to be a MFD device (If so, all bus
> interfaces for other SoCs should be converted also to
> MFD devices) ... as an example how this can be used
> I add this to the davinci nand controller OF support
> patch, in this patchserie.
>
> - ARM: davinci: mux: add OF support
> I want to get rid of the pin setup code in board code ...
> This patch introduces a davinci_cfg_reg_of() function,
> which davinci drivers can call, if they found a
> "pinmux-handle", so used in the following drivers in
> this patchserie:
>
> drivers/net/ethernet/ti/davinci_emac
> drivers/i2c/busses/i2c-davinci.c
> drivers/mtd/nand/davinci_nand.c
>
> - post this board support with USB support, even though
> USB is only working with the 10 ms "workaround", posted here:
> http://comments.gmane.org/gmane.linux.usb.general/54505
> I see this issue also on the AM1808 TMDXEXP1808L evalboard.
>
> - MMC and USB are not using OF support yet, ideas how to port
> this are welcome. I need for USB and MMC board specific
> callbacks, how to solve this with OF support?
>
> Signed-off-by: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
> Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
> Cc: linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> Cc: linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Cc: David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
> Cc: Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>
> Cc: Wolfram Sang <w.sang-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> Cc: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
> Cc: Kevin Hilman <khilman-l0cyMroinI0@public.gmane.org>
> Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
> Cc: Sergei Shtylyov <sshtylyov-Igf4POYTYCDQT0dZR+AlfA@public.gmane.org>
>
> Heiko Schocher (7):
> ARM: davinci, intc: Add OF support for TI interrupt controller
> ARM: davinci: configure davinci aemif chipselects through OF
> ARM: davinci: mux: add OF support
> ARM: davinci: net: davinci_emac: add OF support
> ARM: davinci: i2c: add OF support
> ARM: mtd: nand: davinci: add OF support for davinci nand controller
> ARM: davinci: add support for the am1808 based enbw_cmc board
>
> .../devicetree/bindings/arm/davinci/aemif.txt | 119 ++++++
> .../bindings/arm/davinci/davinci_emac.txt | 43 +++
> .../devicetree/bindings/arm/davinci/i2c.txt | 33 ++
> .../devicetree/bindings/arm/davinci/intc.txt | 27 ++
> .../devicetree/bindings/arm/davinci/mux.txt | 40 ++
> .../devicetree/bindings/arm/davinci/nand.txt | 74 ++++
> arch/arm/boot/dts/enbw_cmc.dts | 268 ++++++++++++++
> arch/arm/configs/enbw_cmc_defconfig | 123 +++++++
> arch/arm/mach-davinci/Kconfig | 9 +
> arch/arm/mach-davinci/Makefile | 1 +
> arch/arm/mach-davinci/aemif.c | 86 +++++-
> arch/arm/mach-davinci/board-enbw-cmc.c | 380 ++++++++++++++++++++
> arch/arm/mach-davinci/cp_intc.c | 87 ++++-
> arch/arm/mach-davinci/include/mach/aemif.h | 1 +
> arch/arm/mach-davinci/include/mach/mux.h | 2 +
> arch/arm/mach-davinci/include/mach/uncompress.h | 1 +
> arch/arm/mach-davinci/mux.c | 73 ++++-
> drivers/i2c/busses/i2c-davinci.c | 37 ++
> drivers/mtd/nand/davinci_nand.c | 85 +++++-
> drivers/net/ethernet/ti/davinci_emac.c | 94 +++++-
> 20 files changed, 1569 insertions(+), 14 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
> create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
> create mode 100644 arch/arm/configs/enbw_cmc_defconfig
> create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
>
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd-ynQEQJNshbs@public.gmane.org
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 0/7] ARM: davinci: add support for the am1808 based enbw_cmc board
@ 2012-05-04 15:33 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-05-04 15:33 UTC (permalink / raw)
To: davinci-linux-open-source
Cc: Kevin Hilman, Sergei Shtylyov, netdev, devicetree-discuss,
Sekhar Nori, Wolfram Sang, linux-mtd, linux-i2c, Ben Dooks,
David Woodhouse, linux-arm-kernel
Hello,
this v3 patchset is now pending for more than 1 month without
seeing comments for it. Are there no more issues?
Should I rebase it (if no further comments occur), as it is
pending so long? (If so, against which tree?)
Thanks.
bye,
Heiko
Heiko Schocher wrote:
> This patchserie add support for the davinci am1808 based
> enbw_cmc board.
>
> Important: I rebased this patchserie against the irqdomain/next
> branch from grant likely, as he suggested to rework the OF
> intcontroller changes to the irqdomain work, branch found here:
>
> http://git.secretlab.ca/?p=linux-2.6.git;a=shortlog;h=refs/heads/irqdomain/next
>
> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>
> commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
> Author: Grant Likely <grant.likely@secretlab.ca>
> Date: Fri Feb 24 14:58:54 2012 -0700
>
> mfd: twl-core: Add IRQ_DOMAIN dependency
>
> changes for v2:
> Post this patchserie now as v2, as reworked in the
> comments I got for the RFC serie.
>
> changes for v3:
> - Interrupt Controller:
> - comment from Sergei Shtylyov:
> - rename compatible" prop to "ti,cp_intc"
> - cp_intc_init() is now also for the of case
> the name of the init function (it calls the
> "new" __cp_intc_init() function, which was
> the "old" cp_intc_init()). Through this
> rework the changes for OF is better visible.
> As the OF case uses the irq_domain rework from
> Grant Likely, maybe the none OF case can use
> this also, but this should be tested on a hw ...
>
> Got no comments to the following points, I noted in the
> RFC series, so posting this patchseries with them:
>
> - ARM: davinci: configure davinci aemif chipselects through OF
> not moved to mfd, as mentioned in this discussion:
> http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
> instead use a phandle in the DTS, so drivers which
> uses the davinci aemif, can call davinci_aemif_setup_timing_of()
>
> This is just thought as an RFC ... The enbw_cmc board
> support not really need to setup this bus timings, as
> they are setup in U-Boot ... but I want to post this,
> as I think, it is a nice to have, and I am not really
> sure, if this has to be a MFD device (If so, all bus
> interfaces for other SoCs should be converted also to
> MFD devices) ... as an example how this can be used
> I add this to the davinci nand controller OF support
> patch, in this patchserie.
>
> - ARM: davinci: mux: add OF support
> I want to get rid of the pin setup code in board code ...
> This patch introduces a davinci_cfg_reg_of() function,
> which davinci drivers can call, if they found a
> "pinmux-handle", so used in the following drivers in
> this patchserie:
>
> drivers/net/ethernet/ti/davinci_emac
> drivers/i2c/busses/i2c-davinci.c
> drivers/mtd/nand/davinci_nand.c
>
> - post this board support with USB support, even though
> USB is only working with the 10 ms "workaround", posted here:
> http://comments.gmane.org/gmane.linux.usb.general/54505
> I see this issue also on the AM1808 TMDXEXP1808L evalboard.
>
> - MMC and USB are not using OF support yet, ideas how to port
> this are welcome. I need for USB and MMC board specific
> callbacks, how to solve this with OF support?
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: devicetree-discuss@lists.ozlabs.org
> Cc: davinci-linux-open-source@linux.davincidsp.com
> Cc: linux-mtd@lists.infradead.org
> Cc: linux-i2c@vger.kernel.org
> Cc: netdev@vger.kernel.org
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Ben Dooks <ben-linux@fluff.org>
> Cc: Wolfram Sang <w.sang@pengutronix.de>
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: Kevin Hilman <khilman@ti.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Sergei Shtylyov <sshtylyov@mvista.com>
>
> Heiko Schocher (7):
> ARM: davinci, intc: Add OF support for TI interrupt controller
> ARM: davinci: configure davinci aemif chipselects through OF
> ARM: davinci: mux: add OF support
> ARM: davinci: net: davinci_emac: add OF support
> ARM: davinci: i2c: add OF support
> ARM: mtd: nand: davinci: add OF support for davinci nand controller
> ARM: davinci: add support for the am1808 based enbw_cmc board
>
> .../devicetree/bindings/arm/davinci/aemif.txt | 119 ++++++
> .../bindings/arm/davinci/davinci_emac.txt | 43 +++
> .../devicetree/bindings/arm/davinci/i2c.txt | 33 ++
> .../devicetree/bindings/arm/davinci/intc.txt | 27 ++
> .../devicetree/bindings/arm/davinci/mux.txt | 40 ++
> .../devicetree/bindings/arm/davinci/nand.txt | 74 ++++
> arch/arm/boot/dts/enbw_cmc.dts | 268 ++++++++++++++
> arch/arm/configs/enbw_cmc_defconfig | 123 +++++++
> arch/arm/mach-davinci/Kconfig | 9 +
> arch/arm/mach-davinci/Makefile | 1 +
> arch/arm/mach-davinci/aemif.c | 86 +++++-
> arch/arm/mach-davinci/board-enbw-cmc.c | 380 ++++++++++++++++++++
> arch/arm/mach-davinci/cp_intc.c | 87 ++++-
> arch/arm/mach-davinci/include/mach/aemif.h | 1 +
> arch/arm/mach-davinci/include/mach/mux.h | 2 +
> arch/arm/mach-davinci/include/mach/uncompress.h | 1 +
> arch/arm/mach-davinci/mux.c | 73 ++++-
> drivers/i2c/busses/i2c-davinci.c | 37 ++
> drivers/mtd/nand/davinci_nand.c | 85 +++++-
> drivers/net/ethernet/ti/davinci_emac.c | 94 +++++-
> 20 files changed, 1569 insertions(+), 14 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
> create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
> create mode 100644 arch/arm/configs/enbw_cmc_defconfig
> create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
>
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 0/7] ARM: davinci: add support for the am1808 based enbw_cmc board
@ 2012-05-04 15:33 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-05-04 15:33 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
this v3 patchset is now pending for more than 1 month without
seeing comments for it. Are there no more issues?
Should I rebase it (if no further comments occur), as it is
pending so long? (If so, against which tree?)
Thanks.
bye,
Heiko
Heiko Schocher wrote:
> This patchserie add support for the davinci am1808 based
> enbw_cmc board.
>
> Important: I rebased this patchserie against the irqdomain/next
> branch from grant likely, as he suggested to rework the OF
> intcontroller changes to the irqdomain work, branch found here:
>
> http://git.secretlab.ca/?p=linux-2.6.git;a=shortlog;h=refs/heads/irqdomain/next
>
> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>
> commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
> Author: Grant Likely <grant.likely@secretlab.ca>
> Date: Fri Feb 24 14:58:54 2012 -0700
>
> mfd: twl-core: Add IRQ_DOMAIN dependency
>
> changes for v2:
> Post this patchserie now as v2, as reworked in the
> comments I got for the RFC serie.
>
> changes for v3:
> - Interrupt Controller:
> - comment from Sergei Shtylyov:
> - rename compatible" prop to "ti,cp_intc"
> - cp_intc_init() is now also for the of case
> the name of the init function (it calls the
> "new" __cp_intc_init() function, which was
> the "old" cp_intc_init()). Through this
> rework the changes for OF is better visible.
> As the OF case uses the irq_domain rework from
> Grant Likely, maybe the none OF case can use
> this also, but this should be tested on a hw ...
>
> Got no comments to the following points, I noted in the
> RFC series, so posting this patchseries with them:
>
> - ARM: davinci: configure davinci aemif chipselects through OF
> not moved to mfd, as mentioned in this discussion:
> http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
> instead use a phandle in the DTS, so drivers which
> uses the davinci aemif, can call davinci_aemif_setup_timing_of()
>
> This is just thought as an RFC ... The enbw_cmc board
> support not really need to setup this bus timings, as
> they are setup in U-Boot ... but I want to post this,
> as I think, it is a nice to have, and I am not really
> sure, if this has to be a MFD device (If so, all bus
> interfaces for other SoCs should be converted also to
> MFD devices) ... as an example how this can be used
> I add this to the davinci nand controller OF support
> patch, in this patchserie.
>
> - ARM: davinci: mux: add OF support
> I want to get rid of the pin setup code in board code ...
> This patch introduces a davinci_cfg_reg_of() function,
> which davinci drivers can call, if they found a
> "pinmux-handle", so used in the following drivers in
> this patchserie:
>
> drivers/net/ethernet/ti/davinci_emac
> drivers/i2c/busses/i2c-davinci.c
> drivers/mtd/nand/davinci_nand.c
>
> - post this board support with USB support, even though
> USB is only working with the 10 ms "workaround", posted here:
> http://comments.gmane.org/gmane.linux.usb.general/54505
> I see this issue also on the AM1808 TMDXEXP1808L evalboard.
>
> - MMC and USB are not using OF support yet, ideas how to port
> this are welcome. I need for USB and MMC board specific
> callbacks, how to solve this with OF support?
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: devicetree-discuss at lists.ozlabs.org
> Cc: davinci-linux-open-source at linux.davincidsp.com
> Cc: linux-mtd at lists.infradead.org
> Cc: linux-i2c at vger.kernel.org
> Cc: netdev at vger.kernel.org
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Ben Dooks <ben-linux@fluff.org>
> Cc: Wolfram Sang <w.sang@pengutronix.de>
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: Kevin Hilman <khilman@ti.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Sergei Shtylyov <sshtylyov@mvista.com>
>
> Heiko Schocher (7):
> ARM: davinci, intc: Add OF support for TI interrupt controller
> ARM: davinci: configure davinci aemif chipselects through OF
> ARM: davinci: mux: add OF support
> ARM: davinci: net: davinci_emac: add OF support
> ARM: davinci: i2c: add OF support
> ARM: mtd: nand: davinci: add OF support for davinci nand controller
> ARM: davinci: add support for the am1808 based enbw_cmc board
>
> .../devicetree/bindings/arm/davinci/aemif.txt | 119 ++++++
> .../bindings/arm/davinci/davinci_emac.txt | 43 +++
> .../devicetree/bindings/arm/davinci/i2c.txt | 33 ++
> .../devicetree/bindings/arm/davinci/intc.txt | 27 ++
> .../devicetree/bindings/arm/davinci/mux.txt | 40 ++
> .../devicetree/bindings/arm/davinci/nand.txt | 74 ++++
> arch/arm/boot/dts/enbw_cmc.dts | 268 ++++++++++++++
> arch/arm/configs/enbw_cmc_defconfig | 123 +++++++
> arch/arm/mach-davinci/Kconfig | 9 +
> arch/arm/mach-davinci/Makefile | 1 +
> arch/arm/mach-davinci/aemif.c | 86 +++++-
> arch/arm/mach-davinci/board-enbw-cmc.c | 380 ++++++++++++++++++++
> arch/arm/mach-davinci/cp_intc.c | 87 ++++-
> arch/arm/mach-davinci/include/mach/aemif.h | 1 +
> arch/arm/mach-davinci/include/mach/mux.h | 2 +
> arch/arm/mach-davinci/include/mach/uncompress.h | 1 +
> arch/arm/mach-davinci/mux.c | 73 ++++-
> drivers/i2c/busses/i2c-davinci.c | 37 ++
> drivers/mtd/nand/davinci_nand.c | 85 +++++-
> drivers/net/ethernet/ti/davinci_emac.c | 94 +++++-
> 20 files changed, 1569 insertions(+), 14 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
> create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
> create mode 100644 arch/arm/configs/enbw_cmc_defconfig
> create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
>
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 0/7] ARM: davinci: add support for the am1808 based enbw_cmc board
[not found] ` <4FA3F6C2.9010602-ynQEQJNshbs@public.gmane.org>
2012-05-04 18:36 ` Sekhar Nori
(?)
@ 2012-05-04 18:36 ` Sekhar Nori
0 siblings, 0 replies; 42+ messages in thread
From: Sekhar Nori @ 2012-05-04 18:36 UTC (permalink / raw)
To: hs-ynQEQJNshbs
Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, netdev-u79uwXL29TY76Z2rM5mHXA,
David Woodhouse, Ben Dooks, Wolfram Sang, Kevin Hilman,
Wolfgang Denk, Sergei Shtylyov, Grant Likely, Rob Herring
Hi Heiko,
On 5/4/2012 9:03 PM, Heiko Schocher wrote:
> Hello,
>
> this v3 patchset is now pending for more than 1 month without
> seeing comments for it. Are there no more issues?
I am yet to get to them. I have mostly cleared my backlog and will be
looking into these next. Sorry about the delay.
> Should I rebase it (if no further comments occur), as it is
> pending so long? (If so, against which tree?)
The series touches multiple subsystems, so may be each patch will go
through individual subsystem maintainer.
Also copying Grant and Rob as device tree maintainers.
Thanks,
Sekhar
>
> Thanks.
>
> bye,
> Heiko
>
> Heiko Schocher wrote:
>> This patchserie add support for the davinci am1808 based
>> enbw_cmc board.
>>
>> Important: I rebased this patchserie against the irqdomain/next
>> branch from grant likely, as he suggested to rework the OF
>> intcontroller changes to the irqdomain work, branch found here:
>>
>> http://git.secretlab.ca/?p=linux-2.6.git;a=shortlog;h=refs/heads/irqdomain/next
>>
>> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>>
>> commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
>> Author: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
>> Date: Fri Feb 24 14:58:54 2012 -0700
>>
>> mfd: twl-core: Add IRQ_DOMAIN dependency
>>
>> changes for v2:
>> Post this patchserie now as v2, as reworked in the
>> comments I got for the RFC serie.
>>
>> changes for v3:
>> - Interrupt Controller:
>> - comment from Sergei Shtylyov:
>> - rename compatible" prop to "ti,cp_intc"
>> - cp_intc_init() is now also for the of case
>> the name of the init function (it calls the
>> "new" __cp_intc_init() function, which was
>> the "old" cp_intc_init()). Through this
>> rework the changes for OF is better visible.
>> As the OF case uses the irq_domain rework from
>> Grant Likely, maybe the none OF case can use
>> this also, but this should be tested on a hw ...
>>
>> Got no comments to the following points, I noted in the
>> RFC series, so posting this patchseries with them:
>>
>> - ARM: davinci: configure davinci aemif chipselects through OF
>> not moved to mfd, as mentioned in this discussion:
>> http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
>> instead use a phandle in the DTS, so drivers which
>> uses the davinci aemif, can call davinci_aemif_setup_timing_of()
>>
>> This is just thought as an RFC ... The enbw_cmc board
>> support not really need to setup this bus timings, as
>> they are setup in U-Boot ... but I want to post this,
>> as I think, it is a nice to have, and I am not really
>> sure, if this has to be a MFD device (If so, all bus
>> interfaces for other SoCs should be converted also to
>> MFD devices) ... as an example how this can be used
>> I add this to the davinci nand controller OF support
>> patch, in this patchserie.
>>
>> - ARM: davinci: mux: add OF support
>> I want to get rid of the pin setup code in board code ...
>> This patch introduces a davinci_cfg_reg_of() function,
>> which davinci drivers can call, if they found a
>> "pinmux-handle", so used in the following drivers in
>> this patchserie:
>>
>> drivers/net/ethernet/ti/davinci_emac
>> drivers/i2c/busses/i2c-davinci.c
>> drivers/mtd/nand/davinci_nand.c
>>
>> - post this board support with USB support, even though
>> USB is only working with the 10 ms "workaround", posted here:
>> http://comments.gmane.org/gmane.linux.usb.general/54505
>> I see this issue also on the AM1808 TMDXEXP1808L evalboard.
>>
>> - MMC and USB are not using OF support yet, ideas how to port
>> this are welcome. I need for USB and MMC board specific
>> callbacks, how to solve this with OF support?
>>
>> Signed-off-by: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
>> Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
>> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
>> Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
>> Cc: linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
>> Cc: linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
>> Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
>> Cc: David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
>> Cc: Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>
>> Cc: Wolfram Sang <w.sang-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
>> Cc: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
>> Cc: Kevin Hilman <khilman-l0cyMroinI0@public.gmane.org>
>> Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
>> Cc: Sergei Shtylyov <sshtylyov-Igf4POYTYCDQT0dZR+AlfA@public.gmane.org>
>>
>> Heiko Schocher (7):
>> ARM: davinci, intc: Add OF support for TI interrupt controller
>> ARM: davinci: configure davinci aemif chipselects through OF
>> ARM: davinci: mux: add OF support
>> ARM: davinci: net: davinci_emac: add OF support
>> ARM: davinci: i2c: add OF support
>> ARM: mtd: nand: davinci: add OF support for davinci nand controller
>> ARM: davinci: add support for the am1808 based enbw_cmc board
>>
>> .../devicetree/bindings/arm/davinci/aemif.txt | 119 ++++++
>> .../bindings/arm/davinci/davinci_emac.txt | 43 +++
>> .../devicetree/bindings/arm/davinci/i2c.txt | 33 ++
>> .../devicetree/bindings/arm/davinci/intc.txt | 27 ++
>> .../devicetree/bindings/arm/davinci/mux.txt | 40 ++
>> .../devicetree/bindings/arm/davinci/nand.txt | 74 ++++
>> arch/arm/boot/dts/enbw_cmc.dts | 268 ++++++++++++++
>> arch/arm/configs/enbw_cmc_defconfig | 123 +++++++
>> arch/arm/mach-davinci/Kconfig | 9 +
>> arch/arm/mach-davinci/Makefile | 1 +
>> arch/arm/mach-davinci/aemif.c | 86 +++++-
>> arch/arm/mach-davinci/board-enbw-cmc.c | 380 ++++++++++++++++++++
>> arch/arm/mach-davinci/cp_intc.c | 87 ++++-
>> arch/arm/mach-davinci/include/mach/aemif.h | 1 +
>> arch/arm/mach-davinci/include/mach/mux.h | 2 +
>> arch/arm/mach-davinci/include/mach/uncompress.h | 1 +
>> arch/arm/mach-davinci/mux.c | 73 ++++-
>> drivers/i2c/busses/i2c-davinci.c | 37 ++
>> drivers/mtd/nand/davinci_nand.c | 85 +++++-
>> drivers/net/ethernet/ti/davinci_emac.c | 94 +++++-
>> 20 files changed, 1569 insertions(+), 14 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
>> create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
>> create mode 100644 arch/arm/configs/enbw_cmc_defconfig
>> create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
>>
>
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 0/7] ARM: davinci: add support for the am1808 based enbw_cmc board
@ 2012-05-04 18:36 ` Sekhar Nori
0 siblings, 0 replies; 42+ messages in thread
From: Sekhar Nori @ 2012-05-04 18:36 UTC (permalink / raw)
To: hs-ynQEQJNshbs
Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, netdev-u79uwXL29TY76Z2rM5mHXA,
David Woodhouse, Ben Dooks, Wolfram Sang, Kevin Hilman,
Wolfgang Denk, Sergei Shtylyov, Grant Likely, Rob Herring
Hi Heiko,
On 5/4/2012 9:03 PM, Heiko Schocher wrote:
> Hello,
>
> this v3 patchset is now pending for more than 1 month without
> seeing comments for it. Are there no more issues?
I am yet to get to them. I have mostly cleared my backlog and will be
looking into these next. Sorry about the delay.
> Should I rebase it (if no further comments occur), as it is
> pending so long? (If so, against which tree?)
The series touches multiple subsystems, so may be each patch will go
through individual subsystem maintainer.
Also copying Grant and Rob as device tree maintainers.
Thanks,
Sekhar
>
> Thanks.
>
> bye,
> Heiko
>
> Heiko Schocher wrote:
>> This patchserie add support for the davinci am1808 based
>> enbw_cmc board.
>>
>> Important: I rebased this patchserie against the irqdomain/next
>> branch from grant likely, as he suggested to rework the OF
>> intcontroller changes to the irqdomain work, branch found here:
>>
>> http://git.secretlab.ca/?p=linux-2.6.git;a=shortlog;h=refs/heads/irqdomain/next
>>
>> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>>
>> commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
>> Author: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
>> Date: Fri Feb 24 14:58:54 2012 -0700
>>
>> mfd: twl-core: Add IRQ_DOMAIN dependency
>>
>> changes for v2:
>> Post this patchserie now as v2, as reworked in the
>> comments I got for the RFC serie.
>>
>> changes for v3:
>> - Interrupt Controller:
>> - comment from Sergei Shtylyov:
>> - rename compatible" prop to "ti,cp_intc"
>> - cp_intc_init() is now also for the of case
>> the name of the init function (it calls the
>> "new" __cp_intc_init() function, which was
>> the "old" cp_intc_init()). Through this
>> rework the changes for OF is better visible.
>> As the OF case uses the irq_domain rework from
>> Grant Likely, maybe the none OF case can use
>> this also, but this should be tested on a hw ...
>>
>> Got no comments to the following points, I noted in the
>> RFC series, so posting this patchseries with them:
>>
>> - ARM: davinci: configure davinci aemif chipselects through OF
>> not moved to mfd, as mentioned in this discussion:
>> http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
>> instead use a phandle in the DTS, so drivers which
>> uses the davinci aemif, can call davinci_aemif_setup_timing_of()
>>
>> This is just thought as an RFC ... The enbw_cmc board
>> support not really need to setup this bus timings, as
>> they are setup in U-Boot ... but I want to post this,
>> as I think, it is a nice to have, and I am not really
>> sure, if this has to be a MFD device (If so, all bus
>> interfaces for other SoCs should be converted also to
>> MFD devices) ... as an example how this can be used
>> I add this to the davinci nand controller OF support
>> patch, in this patchserie.
>>
>> - ARM: davinci: mux: add OF support
>> I want to get rid of the pin setup code in board code ...
>> This patch introduces a davinci_cfg_reg_of() function,
>> which davinci drivers can call, if they found a
>> "pinmux-handle", so used in the following drivers in
>> this patchserie:
>>
>> drivers/net/ethernet/ti/davinci_emac
>> drivers/i2c/busses/i2c-davinci.c
>> drivers/mtd/nand/davinci_nand.c
>>
>> - post this board support with USB support, even though
>> USB is only working with the 10 ms "workaround", posted here:
>> http://comments.gmane.org/gmane.linux.usb.general/54505
>> I see this issue also on the AM1808 TMDXEXP1808L evalboard.
>>
>> - MMC and USB are not using OF support yet, ideas how to port
>> this are welcome. I need for USB and MMC board specific
>> callbacks, how to solve this with OF support?
>>
>> Signed-off-by: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
>> Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
>> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
>> Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
>> Cc: linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
>> Cc: linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
>> Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
>> Cc: David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
>> Cc: Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>
>> Cc: Wolfram Sang <w.sang-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
>> Cc: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
>> Cc: Kevin Hilman <khilman-l0cyMroinI0@public.gmane.org>
>> Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
>> Cc: Sergei Shtylyov <sshtylyov-Igf4POYTYCDQT0dZR+AlfA@public.gmane.org>
>>
>> Heiko Schocher (7):
>> ARM: davinci, intc: Add OF support for TI interrupt controller
>> ARM: davinci: configure davinci aemif chipselects through OF
>> ARM: davinci: mux: add OF support
>> ARM: davinci: net: davinci_emac: add OF support
>> ARM: davinci: i2c: add OF support
>> ARM: mtd: nand: davinci: add OF support for davinci nand controller
>> ARM: davinci: add support for the am1808 based enbw_cmc board
>>
>> .../devicetree/bindings/arm/davinci/aemif.txt | 119 ++++++
>> .../bindings/arm/davinci/davinci_emac.txt | 43 +++
>> .../devicetree/bindings/arm/davinci/i2c.txt | 33 ++
>> .../devicetree/bindings/arm/davinci/intc.txt | 27 ++
>> .../devicetree/bindings/arm/davinci/mux.txt | 40 ++
>> .../devicetree/bindings/arm/davinci/nand.txt | 74 ++++
>> arch/arm/boot/dts/enbw_cmc.dts | 268 ++++++++++++++
>> arch/arm/configs/enbw_cmc_defconfig | 123 +++++++
>> arch/arm/mach-davinci/Kconfig | 9 +
>> arch/arm/mach-davinci/Makefile | 1 +
>> arch/arm/mach-davinci/aemif.c | 86 +++++-
>> arch/arm/mach-davinci/board-enbw-cmc.c | 380 ++++++++++++++++++++
>> arch/arm/mach-davinci/cp_intc.c | 87 ++++-
>> arch/arm/mach-davinci/include/mach/aemif.h | 1 +
>> arch/arm/mach-davinci/include/mach/mux.h | 2 +
>> arch/arm/mach-davinci/include/mach/uncompress.h | 1 +
>> arch/arm/mach-davinci/mux.c | 73 ++++-
>> drivers/i2c/busses/i2c-davinci.c | 37 ++
>> drivers/mtd/nand/davinci_nand.c | 85 +++++-
>> drivers/net/ethernet/ti/davinci_emac.c | 94 +++++-
>> 20 files changed, 1569 insertions(+), 14 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
>> create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
>> create mode 100644 arch/arm/configs/enbw_cmc_defconfig
>> create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
>>
>
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 0/7] ARM: davinci: add support for the am1808 based enbw_cmc board
@ 2012-05-04 18:36 ` Sekhar Nori
0 siblings, 0 replies; 42+ messages in thread
From: Sekhar Nori @ 2012-05-04 18:36 UTC (permalink / raw)
To: hs
Cc: Kevin Hilman, davinci-linux-open-source, Sergei Shtylyov, netdev,
devicetree-discuss, Wolfram Sang, Rob Herring, Grant Likely,
linux-mtd, linux-i2c, Ben Dooks, David Woodhouse,
linux-arm-kernel
Hi Heiko,
On 5/4/2012 9:03 PM, Heiko Schocher wrote:
> Hello,
>
> this v3 patchset is now pending for more than 1 month without
> seeing comments for it. Are there no more issues?
I am yet to get to them. I have mostly cleared my backlog and will be
looking into these next. Sorry about the delay.
> Should I rebase it (if no further comments occur), as it is
> pending so long? (If so, against which tree?)
The series touches multiple subsystems, so may be each patch will go
through individual subsystem maintainer.
Also copying Grant and Rob as device tree maintainers.
Thanks,
Sekhar
>
> Thanks.
>
> bye,
> Heiko
>
> Heiko Schocher wrote:
>> This patchserie add support for the davinci am1808 based
>> enbw_cmc board.
>>
>> Important: I rebased this patchserie against the irqdomain/next
>> branch from grant likely, as he suggested to rework the OF
>> intcontroller changes to the irqdomain work, branch found here:
>>
>> http://git.secretlab.ca/?p=linux-2.6.git;a=shortlog;h=refs/heads/irqdomain/next
>>
>> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>>
>> commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
>> Author: Grant Likely <grant.likely@secretlab.ca>
>> Date: Fri Feb 24 14:58:54 2012 -0700
>>
>> mfd: twl-core: Add IRQ_DOMAIN dependency
>>
>> changes for v2:
>> Post this patchserie now as v2, as reworked in the
>> comments I got for the RFC serie.
>>
>> changes for v3:
>> - Interrupt Controller:
>> - comment from Sergei Shtylyov:
>> - rename compatible" prop to "ti,cp_intc"
>> - cp_intc_init() is now also for the of case
>> the name of the init function (it calls the
>> "new" __cp_intc_init() function, which was
>> the "old" cp_intc_init()). Through this
>> rework the changes for OF is better visible.
>> As the OF case uses the irq_domain rework from
>> Grant Likely, maybe the none OF case can use
>> this also, but this should be tested on a hw ...
>>
>> Got no comments to the following points, I noted in the
>> RFC series, so posting this patchseries with them:
>>
>> - ARM: davinci: configure davinci aemif chipselects through OF
>> not moved to mfd, as mentioned in this discussion:
>> http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
>> instead use a phandle in the DTS, so drivers which
>> uses the davinci aemif, can call davinci_aemif_setup_timing_of()
>>
>> This is just thought as an RFC ... The enbw_cmc board
>> support not really need to setup this bus timings, as
>> they are setup in U-Boot ... but I want to post this,
>> as I think, it is a nice to have, and I am not really
>> sure, if this has to be a MFD device (If so, all bus
>> interfaces for other SoCs should be converted also to
>> MFD devices) ... as an example how this can be used
>> I add this to the davinci nand controller OF support
>> patch, in this patchserie.
>>
>> - ARM: davinci: mux: add OF support
>> I want to get rid of the pin setup code in board code ...
>> This patch introduces a davinci_cfg_reg_of() function,
>> which davinci drivers can call, if they found a
>> "pinmux-handle", so used in the following drivers in
>> this patchserie:
>>
>> drivers/net/ethernet/ti/davinci_emac
>> drivers/i2c/busses/i2c-davinci.c
>> drivers/mtd/nand/davinci_nand.c
>>
>> - post this board support with USB support, even though
>> USB is only working with the 10 ms "workaround", posted here:
>> http://comments.gmane.org/gmane.linux.usb.general/54505
>> I see this issue also on the AM1808 TMDXEXP1808L evalboard.
>>
>> - MMC and USB are not using OF support yet, ideas how to port
>> this are welcome. I need for USB and MMC board specific
>> callbacks, how to solve this with OF support?
>>
>> Signed-off-by: Heiko Schocher <hs@denx.de>
>> Cc: linux-arm-kernel@lists.infradead.org
>> Cc: devicetree-discuss@lists.ozlabs.org
>> Cc: davinci-linux-open-source@linux.davincidsp.com
>> Cc: linux-mtd@lists.infradead.org
>> Cc: linux-i2c@vger.kernel.org
>> Cc: netdev@vger.kernel.org
>> Cc: David Woodhouse <dwmw2@infradead.org>
>> Cc: Ben Dooks <ben-linux@fluff.org>
>> Cc: Wolfram Sang <w.sang@pengutronix.de>
>> Cc: Sekhar Nori <nsekhar@ti.com>
>> Cc: Kevin Hilman <khilman@ti.com>
>> Cc: Wolfgang Denk <wd@denx.de>
>> Cc: Sergei Shtylyov <sshtylyov@mvista.com>
>>
>> Heiko Schocher (7):
>> ARM: davinci, intc: Add OF support for TI interrupt controller
>> ARM: davinci: configure davinci aemif chipselects through OF
>> ARM: davinci: mux: add OF support
>> ARM: davinci: net: davinci_emac: add OF support
>> ARM: davinci: i2c: add OF support
>> ARM: mtd: nand: davinci: add OF support for davinci nand controller
>> ARM: davinci: add support for the am1808 based enbw_cmc board
>>
>> .../devicetree/bindings/arm/davinci/aemif.txt | 119 ++++++
>> .../bindings/arm/davinci/davinci_emac.txt | 43 +++
>> .../devicetree/bindings/arm/davinci/i2c.txt | 33 ++
>> .../devicetree/bindings/arm/davinci/intc.txt | 27 ++
>> .../devicetree/bindings/arm/davinci/mux.txt | 40 ++
>> .../devicetree/bindings/arm/davinci/nand.txt | 74 ++++
>> arch/arm/boot/dts/enbw_cmc.dts | 268 ++++++++++++++
>> arch/arm/configs/enbw_cmc_defconfig | 123 +++++++
>> arch/arm/mach-davinci/Kconfig | 9 +
>> arch/arm/mach-davinci/Makefile | 1 +
>> arch/arm/mach-davinci/aemif.c | 86 +++++-
>> arch/arm/mach-davinci/board-enbw-cmc.c | 380 ++++++++++++++++++++
>> arch/arm/mach-davinci/cp_intc.c | 87 ++++-
>> arch/arm/mach-davinci/include/mach/aemif.h | 1 +
>> arch/arm/mach-davinci/include/mach/mux.h | 2 +
>> arch/arm/mach-davinci/include/mach/uncompress.h | 1 +
>> arch/arm/mach-davinci/mux.c | 73 ++++-
>> drivers/i2c/busses/i2c-davinci.c | 37 ++
>> drivers/mtd/nand/davinci_nand.c | 85 +++++-
>> drivers/net/ethernet/ti/davinci_emac.c | 94 +++++-
>> 20 files changed, 1569 insertions(+), 14 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
>> create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
>> create mode 100644 arch/arm/configs/enbw_cmc_defconfig
>> create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
>>
>
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 0/7] ARM: davinci: add support for the am1808 based enbw_cmc board
@ 2012-05-04 18:36 ` Sekhar Nori
0 siblings, 0 replies; 42+ messages in thread
From: Sekhar Nori @ 2012-05-04 18:36 UTC (permalink / raw)
To: linux-arm-kernel
Hi Heiko,
On 5/4/2012 9:03 PM, Heiko Schocher wrote:
> Hello,
>
> this v3 patchset is now pending for more than 1 month without
> seeing comments for it. Are there no more issues?
I am yet to get to them. I have mostly cleared my backlog and will be
looking into these next. Sorry about the delay.
> Should I rebase it (if no further comments occur), as it is
> pending so long? (If so, against which tree?)
The series touches multiple subsystems, so may be each patch will go
through individual subsystem maintainer.
Also copying Grant and Rob as device tree maintainers.
Thanks,
Sekhar
>
> Thanks.
>
> bye,
> Heiko
>
> Heiko Schocher wrote:
>> This patchserie add support for the davinci am1808 based
>> enbw_cmc board.
>>
>> Important: I rebased this patchserie against the irqdomain/next
>> branch from grant likely, as he suggested to rework the OF
>> intcontroller changes to the irqdomain work, branch found here:
>>
>> http://git.secretlab.ca/?p=linux-2.6.git;a=shortlog;h=refs/heads/irqdomain/next
>>
>> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>>
>> commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
>> Author: Grant Likely <grant.likely@secretlab.ca>
>> Date: Fri Feb 24 14:58:54 2012 -0700
>>
>> mfd: twl-core: Add IRQ_DOMAIN dependency
>>
>> changes for v2:
>> Post this patchserie now as v2, as reworked in the
>> comments I got for the RFC serie.
>>
>> changes for v3:
>> - Interrupt Controller:
>> - comment from Sergei Shtylyov:
>> - rename compatible" prop to "ti,cp_intc"
>> - cp_intc_init() is now also for the of case
>> the name of the init function (it calls the
>> "new" __cp_intc_init() function, which was
>> the "old" cp_intc_init()). Through this
>> rework the changes for OF is better visible.
>> As the OF case uses the irq_domain rework from
>> Grant Likely, maybe the none OF case can use
>> this also, but this should be tested on a hw ...
>>
>> Got no comments to the following points, I noted in the
>> RFC series, so posting this patchseries with them:
>>
>> - ARM: davinci: configure davinci aemif chipselects through OF
>> not moved to mfd, as mentioned in this discussion:
>> http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
>> instead use a phandle in the DTS, so drivers which
>> uses the davinci aemif, can call davinci_aemif_setup_timing_of()
>>
>> This is just thought as an RFC ... The enbw_cmc board
>> support not really need to setup this bus timings, as
>> they are setup in U-Boot ... but I want to post this,
>> as I think, it is a nice to have, and I am not really
>> sure, if this has to be a MFD device (If so, all bus
>> interfaces for other SoCs should be converted also to
>> MFD devices) ... as an example how this can be used
>> I add this to the davinci nand controller OF support
>> patch, in this patchserie.
>>
>> - ARM: davinci: mux: add OF support
>> I want to get rid of the pin setup code in board code ...
>> This patch introduces a davinci_cfg_reg_of() function,
>> which davinci drivers can call, if they found a
>> "pinmux-handle", so used in the following drivers in
>> this patchserie:
>>
>> drivers/net/ethernet/ti/davinci_emac
>> drivers/i2c/busses/i2c-davinci.c
>> drivers/mtd/nand/davinci_nand.c
>>
>> - post this board support with USB support, even though
>> USB is only working with the 10 ms "workaround", posted here:
>> http://comments.gmane.org/gmane.linux.usb.general/54505
>> I see this issue also on the AM1808 TMDXEXP1808L evalboard.
>>
>> - MMC and USB are not using OF support yet, ideas how to port
>> this are welcome. I need for USB and MMC board specific
>> callbacks, how to solve this with OF support?
>>
>> Signed-off-by: Heiko Schocher <hs@denx.de>
>> Cc: linux-arm-kernel at lists.infradead.org
>> Cc: devicetree-discuss at lists.ozlabs.org
>> Cc: davinci-linux-open-source at linux.davincidsp.com
>> Cc: linux-mtd at lists.infradead.org
>> Cc: linux-i2c at vger.kernel.org
>> Cc: netdev at vger.kernel.org
>> Cc: David Woodhouse <dwmw2@infradead.org>
>> Cc: Ben Dooks <ben-linux@fluff.org>
>> Cc: Wolfram Sang <w.sang@pengutronix.de>
>> Cc: Sekhar Nori <nsekhar@ti.com>
>> Cc: Kevin Hilman <khilman@ti.com>
>> Cc: Wolfgang Denk <wd@denx.de>
>> Cc: Sergei Shtylyov <sshtylyov@mvista.com>
>>
>> Heiko Schocher (7):
>> ARM: davinci, intc: Add OF support for TI interrupt controller
>> ARM: davinci: configure davinci aemif chipselects through OF
>> ARM: davinci: mux: add OF support
>> ARM: davinci: net: davinci_emac: add OF support
>> ARM: davinci: i2c: add OF support
>> ARM: mtd: nand: davinci: add OF support for davinci nand controller
>> ARM: davinci: add support for the am1808 based enbw_cmc board
>>
>> .../devicetree/bindings/arm/davinci/aemif.txt | 119 ++++++
>> .../bindings/arm/davinci/davinci_emac.txt | 43 +++
>> .../devicetree/bindings/arm/davinci/i2c.txt | 33 ++
>> .../devicetree/bindings/arm/davinci/intc.txt | 27 ++
>> .../devicetree/bindings/arm/davinci/mux.txt | 40 ++
>> .../devicetree/bindings/arm/davinci/nand.txt | 74 ++++
>> arch/arm/boot/dts/enbw_cmc.dts | 268 ++++++++++++++
>> arch/arm/configs/enbw_cmc_defconfig | 123 +++++++
>> arch/arm/mach-davinci/Kconfig | 9 +
>> arch/arm/mach-davinci/Makefile | 1 +
>> arch/arm/mach-davinci/aemif.c | 86 +++++-
>> arch/arm/mach-davinci/board-enbw-cmc.c | 380 ++++++++++++++++++++
>> arch/arm/mach-davinci/cp_intc.c | 87 ++++-
>> arch/arm/mach-davinci/include/mach/aemif.h | 1 +
>> arch/arm/mach-davinci/include/mach/mux.h | 2 +
>> arch/arm/mach-davinci/include/mach/uncompress.h | 1 +
>> arch/arm/mach-davinci/mux.c | 73 ++++-
>> drivers/i2c/busses/i2c-davinci.c | 37 ++
>> drivers/mtd/nand/davinci_nand.c | 85 +++++-
>> drivers/net/ethernet/ti/davinci_emac.c | 94 +++++-
>> 20 files changed, 1569 insertions(+), 14 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
>> create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
>> create mode 100644 arch/arm/configs/enbw_cmc_defconfig
>> create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
>>
>
^ permalink raw reply [flat|nested] 42+ messages in thread
* RE: [PATCH v3 4/7] ARM: davinci: net: davinci_emac: add OF support
2012-03-05 11:10 ` Heiko Schocher
@ 2012-05-15 18:08 ` Nori, Sekhar
-1 siblings, 0 replies; 42+ messages in thread
From: Nori, Sekhar @ 2012-05-15 18:08 UTC (permalink / raw)
To: Heiko Schocher, davinci-linux-open-source
Cc: linux-arm-kernel, devicetree-discuss, netdev, Grant Likely,
Wolfgang Denk, Anatoly Sivov
Hi Heiko,
On Mon, Mar 05, 2012 at 16:40:01, Heiko Schocher wrote:
> add of support for the davinci_emac driver.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: davinci-linux-open-source@linux.davincidsp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: devicetree-discuss@lists.ozlabs.org
> Cc: netdev@vger.kernel.org
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Anatoly Sivov <mm05@mail.ru>
>
> ---
> - changes for v2:
> - add comment from Anatoly Sivov
> - fix typo in davinci_emac.txt
> - add comment from Grant Likely:
> - add prefix "ti,davinci-" to davinci specific property names
> - remove version property
> - use compatible name "ti,davinci-dm6460-emac"
> - use devm_kzalloc()
> - use of_match_ptr()
> - document all new properties
> - remove of_address_to_resource() and do not overwrite
> resource table
> - whitespace fixes
> - remove hw_ram_addr as it is not used in current
> board code
> - no changes for v3
>
> .../bindings/arm/davinci/davinci_emac.txt | 43 +++++++++
> drivers/net/ethernet/ti/davinci_emac.c | 94 +++++++++++++++++++-
> 2 files changed, 136 insertions(+), 1 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt b/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
> new file mode 100644
> index 0000000..a7b0911
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
Since DaVinci EMAC driver may be used on platforms other than DaVinci (c6x,
OMAP), can we place the bindings documentation in bindings/net/?
> @@ -0,0 +1,43 @@
> +* Texas Instruments Davinci EMAC
> +
> +This file provides information, what the device node
> +for the davinci_emac interface contain.
s/contain/contains
> +
> +Required properties:
> +- compatible: "ti,davinci-dm6460-emac";
There is no device called dm6460. If you intend to only support
"version 2" of the EMAC IP at this time, you can use dm6467
(http://www.ti.com/product/tms320dm6467)
> +- reg: Offset and length of the register set for the device
> +- ti,davinci-ctrl-reg-offset: offset to control register
> +- ti,davinci-ctrl-mod-reg-offset: offset to control module register
> +- ti,davinci-ctrl-ram-offset: offset to control module ram
> +- ti,davinci-ctrl-ram-size: size of control module ram
> +- ti,davinci-rmii-en: use RMII
> +- ti,davinci-no-bd-ram: has the emac controller BD RAM
> +- phy-handle: Contains a phandle to an Ethernet PHY.
> + if not, davinci_emac driver defaults to 100/FULL
> +- interrupts: interrupt mapping for the davinci emac interrupts sources:
> + 4 sources: <Receive Threshold Interrupt
> + Receive Interrupt
> + Transmit Interrupt
> + Miscellaneous Interrupt>
> +- pinmux-handle: Contains a handle to configure the pinmux settings.
> +
> +Optional properties:
> +- local-mac-address : 6 bytes, mac address
> +
> +Example (enbw_cmc board):
> + eth0: emac@1e20000 {
> + compatible = "ti,davinci-dm6460-emac";
> + reg = <0x220000 0x4000>;
> + ti,davinci-ctrl-reg-offset = <0x3000>;
> + ti,davinci-ctrl-mod-reg-offset = <0x2000>;
> + ti,davinci-ctrl-ram-offset = <0>;
> + ti,davinci-ctrl-ram-size = <0x2000>;
> + local-mac-address = [ 00 00 00 00 00 00 ];
> + interrupts = <33
> + 34
> + 35
> + 36
> + >;
> + interrupt-parent = <&intc>;
> + pinmux-handle = <&emac_pins>;
> + };
> diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c
> index 4fa0bcb..56e1c35 100644
> --- a/drivers/net/ethernet/ti/davinci_emac.c
> +++ b/drivers/net/ethernet/ti/davinci_emac.c
> @@ -58,6 +58,12 @@
> #include <linux/io.h>
> #include <linux/uaccess.h>
> #include <linux/davinci_emac.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/of_net.h>
> +
> +#include <mach/mux.h>
>
> #include <asm/irq.h>
> #include <asm/page.h>
> @@ -339,6 +345,9 @@ struct emac_priv {
> u32 rx_addr_type;
> atomic_t cur_tx;
> const char *phy_id;
> +#ifdef CONFIG_OF
> + struct device_node *phy_node;
> +#endif
> struct phy_device *phydev;
> spinlock_t lock;
> /*platform specific members*/
> @@ -1760,6 +1769,82 @@ static const struct net_device_ops emac_netdev_ops = {
> #endif
> };
>
> +#ifdef CONFIG_OF
> +static struct emac_platform_data
> + *davinci_emac_of_get_pdata(struct platform_device *pdev,
> + struct emac_priv *priv)
> +{
> + struct device_node *np;
> + struct device_node *pinmux_np;
> + struct emac_platform_data *pdata = NULL;
> + const u8 *mac_addr;
> + u32 data;
> + int ret;
> + int version;
> +
> + np = pdev->dev.of_node;
> + if (!np)
> + goto nodata;
> + else
> + version = EMAC_VERSION_2;
You could set pdata->version directly here.
> +
> + pdata = pdev->dev.platform_data;
> + if (!pdata) {
> + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
> + if (!pdata)
> + goto nodata;
> + }
> + pdata->version = version;
> +
> + mac_addr = of_get_mac_address(np);
> + if (mac_addr)
> + memcpy(pdata->mac_addr, mac_addr, ETH_ALEN);
> +
> + ret = of_property_read_u32(np, "ti,davinci-ctrl-reg-offset", &data);
> + if (!ret)
> + pdata->ctrl_reg_offset = data;
> +
> + ret = of_property_read_u32(np, "ti,davinci-ctrl-mod-reg-offset",
> + &data);
> + if (!ret)
> + pdata->ctrl_mod_reg_offset = data;
> +
> + ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-offset", &data);
> + if (!ret)
> + pdata->ctrl_ram_offset = data;
> +
> + ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-size", &data);
> + if (!ret)
> + pdata->ctrl_ram_size = data;
> +
> + ret = of_property_read_u32(np, "ti,davinci-rmii-en", &data);
> + if (!ret)
> + pdata->rmii_en = data;
> +
> + ret = of_property_read_u32(np, "ti,davinci-no-bd-ram", &data);
> + if (!ret)
> + pdata->no_bd_ram = data;
> +
> + priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
> + if (!priv->phy_node)
> + pdata->phy_id = "";
> +
> + pinmux_np = of_parse_phandle(np, "pinmux-handle", 0);
> + if (pinmux_np)
> + davinci_cfg_reg_of(pinmux_np);
This is a DaVinci specific pinmux function and this
driver can be used in non-DaVinci platforms like C6x
and OMAP. So, it will not be correct to call a DaVinci
specific function here.
Can you drop the pinmux from this patch for now? On DaVinci,
for pinmux, we need to migrate to drivers/pinctrl/ as well.
Doing this will also make this patch independent of the rest
of this series can even be merged separately. Can you please
make these changes and resend just this patch?
> +
> + pdev->dev.platform_data = pdata;
> +nodata:
> + return pdata;
> +}
> +#else
> +static struct emac_platform_data
> + *davinci_emac_of_get_pdata(struct platform_device *pdev,
> + struct emac_priv *priv)
> +{
> + return pdev->dev.platform_data;
> +}
> +#endif
> /**
> * davinci_emac_probe: EMAC device probe
> * @pdev: The DaVinci EMAC device that we are removing
> @@ -1803,7 +1888,7 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
>
> spin_lock_init(&priv->lock);
>
> - pdata = pdev->dev.platform_data;
> + pdata = davinci_emac_of_get_pdata(pdev, priv);
> if (!pdata) {
> dev_err(&pdev->dev, "no platform data\n");
> rc = -ENODEV;
> @@ -2013,6 +2098,12 @@ static const struct dev_pm_ops davinci_emac_pm_ops = {
> .resume = davinci_emac_resume,
> };
>
> +static const struct of_device_id davinci_emac_of_match[] = {
> + {.compatible = "ti,davinci-dm6460-emac", },
This needs to be ti,davinci-dm6467-emac as well.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 4/7] ARM: davinci: net: davinci_emac: add OF support
@ 2012-05-15 18:08 ` Nori, Sekhar
0 siblings, 0 replies; 42+ messages in thread
From: Nori, Sekhar @ 2012-05-15 18:08 UTC (permalink / raw)
To: linux-arm-kernel
Hi Heiko,
On Mon, Mar 05, 2012 at 16:40:01, Heiko Schocher wrote:
> add of support for the davinci_emac driver.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: davinci-linux-open-source at linux.davincidsp.com
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: devicetree-discuss at lists.ozlabs.org
> Cc: netdev at vger.kernel.org
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Anatoly Sivov <mm05@mail.ru>
>
> ---
> - changes for v2:
> - add comment from Anatoly Sivov
> - fix typo in davinci_emac.txt
> - add comment from Grant Likely:
> - add prefix "ti,davinci-" to davinci specific property names
> - remove version property
> - use compatible name "ti,davinci-dm6460-emac"
> - use devm_kzalloc()
> - use of_match_ptr()
> - document all new properties
> - remove of_address_to_resource() and do not overwrite
> resource table
> - whitespace fixes
> - remove hw_ram_addr as it is not used in current
> board code
> - no changes for v3
>
> .../bindings/arm/davinci/davinci_emac.txt | 43 +++++++++
> drivers/net/ethernet/ti/davinci_emac.c | 94 +++++++++++++++++++-
> 2 files changed, 136 insertions(+), 1 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt b/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
> new file mode 100644
> index 0000000..a7b0911
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
Since DaVinci EMAC driver may be used on platforms other than DaVinci (c6x,
OMAP), can we place the bindings documentation in bindings/net/?
> @@ -0,0 +1,43 @@
> +* Texas Instruments Davinci EMAC
> +
> +This file provides information, what the device node
> +for the davinci_emac interface contain.
s/contain/contains
> +
> +Required properties:
> +- compatible: "ti,davinci-dm6460-emac";
There is no device called dm6460. If you intend to only support
"version 2" of the EMAC IP at this time, you can use dm6467
(http://www.ti.com/product/tms320dm6467)
> +- reg: Offset and length of the register set for the device
> +- ti,davinci-ctrl-reg-offset: offset to control register
> +- ti,davinci-ctrl-mod-reg-offset: offset to control module register
> +- ti,davinci-ctrl-ram-offset: offset to control module ram
> +- ti,davinci-ctrl-ram-size: size of control module ram
> +- ti,davinci-rmii-en: use RMII
> +- ti,davinci-no-bd-ram: has the emac controller BD RAM
> +- phy-handle: Contains a phandle to an Ethernet PHY.
> + if not, davinci_emac driver defaults to 100/FULL
> +- interrupts: interrupt mapping for the davinci emac interrupts sources:
> + 4 sources: <Receive Threshold Interrupt
> + Receive Interrupt
> + Transmit Interrupt
> + Miscellaneous Interrupt>
> +- pinmux-handle: Contains a handle to configure the pinmux settings.
> +
> +Optional properties:
> +- local-mac-address : 6 bytes, mac address
> +
> +Example (enbw_cmc board):
> + eth0: emac at 1e20000 {
> + compatible = "ti,davinci-dm6460-emac";
> + reg = <0x220000 0x4000>;
> + ti,davinci-ctrl-reg-offset = <0x3000>;
> + ti,davinci-ctrl-mod-reg-offset = <0x2000>;
> + ti,davinci-ctrl-ram-offset = <0>;
> + ti,davinci-ctrl-ram-size = <0x2000>;
> + local-mac-address = [ 00 00 00 00 00 00 ];
> + interrupts = <33
> + 34
> + 35
> + 36
> + >;
> + interrupt-parent = <&intc>;
> + pinmux-handle = <&emac_pins>;
> + };
> diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c
> index 4fa0bcb..56e1c35 100644
> --- a/drivers/net/ethernet/ti/davinci_emac.c
> +++ b/drivers/net/ethernet/ti/davinci_emac.c
> @@ -58,6 +58,12 @@
> #include <linux/io.h>
> #include <linux/uaccess.h>
> #include <linux/davinci_emac.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/of_net.h>
> +
> +#include <mach/mux.h>
>
> #include <asm/irq.h>
> #include <asm/page.h>
> @@ -339,6 +345,9 @@ struct emac_priv {
> u32 rx_addr_type;
> atomic_t cur_tx;
> const char *phy_id;
> +#ifdef CONFIG_OF
> + struct device_node *phy_node;
> +#endif
> struct phy_device *phydev;
> spinlock_t lock;
> /*platform specific members*/
> @@ -1760,6 +1769,82 @@ static const struct net_device_ops emac_netdev_ops = {
> #endif
> };
>
> +#ifdef CONFIG_OF
> +static struct emac_platform_data
> + *davinci_emac_of_get_pdata(struct platform_device *pdev,
> + struct emac_priv *priv)
> +{
> + struct device_node *np;
> + struct device_node *pinmux_np;
> + struct emac_platform_data *pdata = NULL;
> + const u8 *mac_addr;
> + u32 data;
> + int ret;
> + int version;
> +
> + np = pdev->dev.of_node;
> + if (!np)
> + goto nodata;
> + else
> + version = EMAC_VERSION_2;
You could set pdata->version directly here.
> +
> + pdata = pdev->dev.platform_data;
> + if (!pdata) {
> + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
> + if (!pdata)
> + goto nodata;
> + }
> + pdata->version = version;
> +
> + mac_addr = of_get_mac_address(np);
> + if (mac_addr)
> + memcpy(pdata->mac_addr, mac_addr, ETH_ALEN);
> +
> + ret = of_property_read_u32(np, "ti,davinci-ctrl-reg-offset", &data);
> + if (!ret)
> + pdata->ctrl_reg_offset = data;
> +
> + ret = of_property_read_u32(np, "ti,davinci-ctrl-mod-reg-offset",
> + &data);
> + if (!ret)
> + pdata->ctrl_mod_reg_offset = data;
> +
> + ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-offset", &data);
> + if (!ret)
> + pdata->ctrl_ram_offset = data;
> +
> + ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-size", &data);
> + if (!ret)
> + pdata->ctrl_ram_size = data;
> +
> + ret = of_property_read_u32(np, "ti,davinci-rmii-en", &data);
> + if (!ret)
> + pdata->rmii_en = data;
> +
> + ret = of_property_read_u32(np, "ti,davinci-no-bd-ram", &data);
> + if (!ret)
> + pdata->no_bd_ram = data;
> +
> + priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
> + if (!priv->phy_node)
> + pdata->phy_id = "";
> +
> + pinmux_np = of_parse_phandle(np, "pinmux-handle", 0);
> + if (pinmux_np)
> + davinci_cfg_reg_of(pinmux_np);
This is a DaVinci specific pinmux function and this
driver can be used in non-DaVinci platforms like C6x
and OMAP. So, it will not be correct to call a DaVinci
specific function here.
Can you drop the pinmux from this patch for now? On DaVinci,
for pinmux, we need to migrate to drivers/pinctrl/ as well.
Doing this will also make this patch independent of the rest
of this series can even be merged separately. Can you please
make these changes and resend just this patch?
> +
> + pdev->dev.platform_data = pdata;
> +nodata:
> + return pdata;
> +}
> +#else
> +static struct emac_platform_data
> + *davinci_emac_of_get_pdata(struct platform_device *pdev,
> + struct emac_priv *priv)
> +{
> + return pdev->dev.platform_data;
> +}
> +#endif
> /**
> * davinci_emac_probe: EMAC device probe
> * @pdev: The DaVinci EMAC device that we are removing
> @@ -1803,7 +1888,7 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
>
> spin_lock_init(&priv->lock);
>
> - pdata = pdev->dev.platform_data;
> + pdata = davinci_emac_of_get_pdata(pdev, priv);
> if (!pdata) {
> dev_err(&pdev->dev, "no platform data\n");
> rc = -ENODEV;
> @@ -2013,6 +2098,12 @@ static const struct dev_pm_ops davinci_emac_pm_ops = {
> .resume = davinci_emac_resume,
> };
>
> +static const struct of_device_id davinci_emac_of_match[] = {
> + {.compatible = "ti,davinci-dm6460-emac", },
This needs to be ti,davinci-dm6467-emac as well.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 4/7] ARM: davinci: net: davinci_emac: add OF support
2012-05-15 18:08 ` Nori, Sekhar
@ 2012-05-17 6:32 ` Heiko Schocher
-1 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-05-17 6:32 UTC (permalink / raw)
To: Nori, Sekhar
Cc: davinci-linux-open-source, linux-arm-kernel, devicetree-discuss,
netdev, Grant Likely, Wolfgang Denk, Anatoly Sivov
Hello Nori,
thanks for the review!
Nori, Sekhar wrote:
> Hi Heiko,
>
> On Mon, Mar 05, 2012 at 16:40:01, Heiko Schocher wrote:
>> add of support for the davinci_emac driver.
>>
>> Signed-off-by: Heiko Schocher <hs@denx.de>
>> Cc: davinci-linux-open-source@linux.davincidsp.com
>> Cc: linux-arm-kernel@lists.infradead.org
>> Cc: devicetree-discuss@lists.ozlabs.org
>> Cc: netdev@vger.kernel.org
>> Cc: Grant Likely <grant.likely@secretlab.ca>
>> Cc: Sekhar Nori <nsekhar@ti.com>
>> Cc: Wolfgang Denk <wd@denx.de>
>> Cc: Anatoly Sivov <mm05@mail.ru>
>>
>> ---
>> - changes for v2:
>> - add comment from Anatoly Sivov
>> - fix typo in davinci_emac.txt
>> - add comment from Grant Likely:
>> - add prefix "ti,davinci-" to davinci specific property names
>> - remove version property
>> - use compatible name "ti,davinci-dm6460-emac"
>> - use devm_kzalloc()
>> - use of_match_ptr()
>> - document all new properties
>> - remove of_address_to_resource() and do not overwrite
>> resource table
>> - whitespace fixes
>> - remove hw_ram_addr as it is not used in current
>> board code
>> - no changes for v3
>>
>> .../bindings/arm/davinci/davinci_emac.txt | 43 +++++++++
>> drivers/net/ethernet/ti/davinci_emac.c | 94 +++++++++++++++++++-
>> 2 files changed, 136 insertions(+), 1 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
>>
>> diff --git a/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt b/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
>> new file mode 100644
>> index 0000000..a7b0911
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
>
> Since DaVinci EMAC driver may be used on platforms other than DaVinci (c6x,
> OMAP), can we place the bindings documentation in bindings/net/?
Done.
>> @@ -0,0 +1,43 @@
>> +* Texas Instruments Davinci EMAC
>> +
>> +This file provides information, what the device node
>> +for the davinci_emac interface contain.
>
> s/contain/contains
fixed.
>> +
>> +Required properties:
>> +- compatible: "ti,davinci-dm6460-emac";
>
> There is no device called dm6460. If you intend to only support
> "version 2" of the EMAC IP at this time, you can use dm6467
> (http://www.ti.com/product/tms320dm6467)
renamed to "ti,davinci-dm6467-emac"
>> +- reg: Offset and length of the register set for the device
>> +- ti,davinci-ctrl-reg-offset: offset to control register
>> +- ti,davinci-ctrl-mod-reg-offset: offset to control module register
>> +- ti,davinci-ctrl-ram-offset: offset to control module ram
>> +- ti,davinci-ctrl-ram-size: size of control module ram
>> +- ti,davinci-rmii-en: use RMII
>> +- ti,davinci-no-bd-ram: has the emac controller BD RAM
>> +- phy-handle: Contains a phandle to an Ethernet PHY.
>> + if not, davinci_emac driver defaults to 100/FULL
>> +- interrupts: interrupt mapping for the davinci emac interrupts sources:
>> + 4 sources: <Receive Threshold Interrupt
>> + Receive Interrupt
>> + Transmit Interrupt
>> + Miscellaneous Interrupt>
>> +- pinmux-handle: Contains a handle to configure the pinmux settings.
removed.
>> +
>> +Optional properties:
>> +- local-mac-address : 6 bytes, mac address
>> +
>> +Example (enbw_cmc board):
>> + eth0: emac@1e20000 {
>> + compatible = "ti,davinci-dm6460-emac";
>> + reg = <0x220000 0x4000>;
>> + ti,davinci-ctrl-reg-offset = <0x3000>;
>> + ti,davinci-ctrl-mod-reg-offset = <0x2000>;
>> + ti,davinci-ctrl-ram-offset = <0>;
>> + ti,davinci-ctrl-ram-size = <0x2000>;
>> + local-mac-address = [ 00 00 00 00 00 00 ];
>> + interrupts = <33
>> + 34
>> + 35
>> + 36
>> + >;
>> + interrupt-parent = <&intc>;
>> + pinmux-handle = <&emac_pins>;
removed.
>> + };
>> diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c
>> index 4fa0bcb..56e1c35 100644
>> --- a/drivers/net/ethernet/ti/davinci_emac.c
>> +++ b/drivers/net/ethernet/ti/davinci_emac.c
>> @@ -58,6 +58,12 @@
>> #include <linux/io.h>
>> #include <linux/uaccess.h>
>> #include <linux/davinci_emac.h>
>> +#include <linux/of.h>
>> +#include <linux/of_address.h>
>> +#include <linux/of_irq.h>
>> +#include <linux/of_net.h>
>> +
>> +#include <mach/mux.h>
>>
>> #include <asm/irq.h>
>> #include <asm/page.h>
>> @@ -339,6 +345,9 @@ struct emac_priv {
>> u32 rx_addr_type;
>> atomic_t cur_tx;
>> const char *phy_id;
>> +#ifdef CONFIG_OF
>> + struct device_node *phy_node;
>> +#endif
>> struct phy_device *phydev;
>> spinlock_t lock;
>> /*platform specific members*/
>> @@ -1760,6 +1769,82 @@ static const struct net_device_ops emac_netdev_ops = {
>> #endif
>> };
>>
>> +#ifdef CONFIG_OF
>> +static struct emac_platform_data
>> + *davinci_emac_of_get_pdata(struct platform_device *pdev,
>> + struct emac_priv *priv)
>> +{
>> + struct device_node *np;
>> + struct device_node *pinmux_np;
>> + struct emac_platform_data *pdata = NULL;
>> + const u8 *mac_addr;
>> + u32 data;
>> + int ret;
>> + int version;
>> +
>> + np = pdev->dev.of_node;
>> + if (!np)
>> + goto nodata;
>> + else
>> + version = EMAC_VERSION_2;
>
> You could set pdata->version directly here.
done.
>> +
>> + pdata = pdev->dev.platform_data;
>> + if (!pdata) {
>> + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
>> + if (!pdata)
>> + goto nodata;
>> + }
>> + pdata->version = version;
>> +
>> + mac_addr = of_get_mac_address(np);
>> + if (mac_addr)
>> + memcpy(pdata->mac_addr, mac_addr, ETH_ALEN);
>> +
>> + ret = of_property_read_u32(np, "ti,davinci-ctrl-reg-offset", &data);
>> + if (!ret)
>> + pdata->ctrl_reg_offset = data;
>> +
>> + ret = of_property_read_u32(np, "ti,davinci-ctrl-mod-reg-offset",
>> + &data);
>> + if (!ret)
>> + pdata->ctrl_mod_reg_offset = data;
>> +
>> + ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-offset", &data);
>> + if (!ret)
>> + pdata->ctrl_ram_offset = data;
>> +
>> + ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-size", &data);
>> + if (!ret)
>> + pdata->ctrl_ram_size = data;
>> +
>> + ret = of_property_read_u32(np, "ti,davinci-rmii-en", &data);
>> + if (!ret)
>> + pdata->rmii_en = data;
>> +
>> + ret = of_property_read_u32(np, "ti,davinci-no-bd-ram", &data);
>> + if (!ret)
>> + pdata->no_bd_ram = data;
>> +
>> + priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
>> + if (!priv->phy_node)
>> + pdata->phy_id = "";
>> +
>> + pinmux_np = of_parse_phandle(np, "pinmux-handle", 0);
>> + if (pinmux_np)
>> + davinci_cfg_reg_of(pinmux_np);
>
> This is a DaVinci specific pinmux function and this
> driver can be used in non-DaVinci platforms like C6x
> and OMAP. So, it will not be correct to call a DaVinci
> specific function here.
Ah, right!
> Can you drop the pinmux from this patch for now? On DaVinci,
Done ... Hmm.. so I think, I should drop this for all patches
from my patchset, right?
> for pinmux, we need to migrate to drivers/pinctrl/ as well.
Ah, I see ... take a look at it, maybe I find time to do here
something ... or do you know about work in progress here?
> Doing this will also make this patch independent of the rest
> of this series can even be merged separately. Can you please
> make these changes and resend just this patch?
Yep, I do some test with the changes you requested and resend
this patch ... do you prefer some tree, which I should use as
base?
>> +
>> + pdev->dev.platform_data = pdata;
>> +nodata:
>> + return pdata;
>> +}
>> +#else
>> +static struct emac_platform_data
>> + *davinci_emac_of_get_pdata(struct platform_device *pdev,
>> + struct emac_priv *priv)
>> +{
>> + return pdev->dev.platform_data;
>> +}
>> +#endif
>> /**
>> * davinci_emac_probe: EMAC device probe
>> * @pdev: The DaVinci EMAC device that we are removing
>> @@ -1803,7 +1888,7 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
>>
>> spin_lock_init(&priv->lock);
>>
>> - pdata = pdev->dev.platform_data;
>> + pdata = davinci_emac_of_get_pdata(pdev, priv);
>> if (!pdata) {
>> dev_err(&pdev->dev, "no platform data\n");
>> rc = -ENODEV;
>> @@ -2013,6 +2098,12 @@ static const struct dev_pm_ops davinci_emac_pm_ops = {
>> .resume = davinci_emac_resume,
>> };
>>
>> +static const struct of_device_id davinci_emac_of_match[] = {
>> + {.compatible = "ti,davinci-dm6460-emac", },
>
> This needs to be ti,davinci-dm6467-emac as well.
Yep, fixed.
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 4/7] ARM: davinci: net: davinci_emac: add OF support
@ 2012-05-17 6:32 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-05-17 6:32 UTC (permalink / raw)
To: linux-arm-kernel
Hello Nori,
thanks for the review!
Nori, Sekhar wrote:
> Hi Heiko,
>
> On Mon, Mar 05, 2012 at 16:40:01, Heiko Schocher wrote:
>> add of support for the davinci_emac driver.
>>
>> Signed-off-by: Heiko Schocher <hs@denx.de>
>> Cc: davinci-linux-open-source at linux.davincidsp.com
>> Cc: linux-arm-kernel at lists.infradead.org
>> Cc: devicetree-discuss at lists.ozlabs.org
>> Cc: netdev at vger.kernel.org
>> Cc: Grant Likely <grant.likely@secretlab.ca>
>> Cc: Sekhar Nori <nsekhar@ti.com>
>> Cc: Wolfgang Denk <wd@denx.de>
>> Cc: Anatoly Sivov <mm05@mail.ru>
>>
>> ---
>> - changes for v2:
>> - add comment from Anatoly Sivov
>> - fix typo in davinci_emac.txt
>> - add comment from Grant Likely:
>> - add prefix "ti,davinci-" to davinci specific property names
>> - remove version property
>> - use compatible name "ti,davinci-dm6460-emac"
>> - use devm_kzalloc()
>> - use of_match_ptr()
>> - document all new properties
>> - remove of_address_to_resource() and do not overwrite
>> resource table
>> - whitespace fixes
>> - remove hw_ram_addr as it is not used in current
>> board code
>> - no changes for v3
>>
>> .../bindings/arm/davinci/davinci_emac.txt | 43 +++++++++
>> drivers/net/ethernet/ti/davinci_emac.c | 94 +++++++++++++++++++-
>> 2 files changed, 136 insertions(+), 1 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
>>
>> diff --git a/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt b/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
>> new file mode 100644
>> index 0000000..a7b0911
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
>
> Since DaVinci EMAC driver may be used on platforms other than DaVinci (c6x,
> OMAP), can we place the bindings documentation in bindings/net/?
Done.
>> @@ -0,0 +1,43 @@
>> +* Texas Instruments Davinci EMAC
>> +
>> +This file provides information, what the device node
>> +for the davinci_emac interface contain.
>
> s/contain/contains
fixed.
>> +
>> +Required properties:
>> +- compatible: "ti,davinci-dm6460-emac";
>
> There is no device called dm6460. If you intend to only support
> "version 2" of the EMAC IP at this time, you can use dm6467
> (http://www.ti.com/product/tms320dm6467)
renamed to "ti,davinci-dm6467-emac"
>> +- reg: Offset and length of the register set for the device
>> +- ti,davinci-ctrl-reg-offset: offset to control register
>> +- ti,davinci-ctrl-mod-reg-offset: offset to control module register
>> +- ti,davinci-ctrl-ram-offset: offset to control module ram
>> +- ti,davinci-ctrl-ram-size: size of control module ram
>> +- ti,davinci-rmii-en: use RMII
>> +- ti,davinci-no-bd-ram: has the emac controller BD RAM
>> +- phy-handle: Contains a phandle to an Ethernet PHY.
>> + if not, davinci_emac driver defaults to 100/FULL
>> +- interrupts: interrupt mapping for the davinci emac interrupts sources:
>> + 4 sources: <Receive Threshold Interrupt
>> + Receive Interrupt
>> + Transmit Interrupt
>> + Miscellaneous Interrupt>
>> +- pinmux-handle: Contains a handle to configure the pinmux settings.
removed.
>> +
>> +Optional properties:
>> +- local-mac-address : 6 bytes, mac address
>> +
>> +Example (enbw_cmc board):
>> + eth0: emac at 1e20000 {
>> + compatible = "ti,davinci-dm6460-emac";
>> + reg = <0x220000 0x4000>;
>> + ti,davinci-ctrl-reg-offset = <0x3000>;
>> + ti,davinci-ctrl-mod-reg-offset = <0x2000>;
>> + ti,davinci-ctrl-ram-offset = <0>;
>> + ti,davinci-ctrl-ram-size = <0x2000>;
>> + local-mac-address = [ 00 00 00 00 00 00 ];
>> + interrupts = <33
>> + 34
>> + 35
>> + 36
>> + >;
>> + interrupt-parent = <&intc>;
>> + pinmux-handle = <&emac_pins>;
removed.
>> + };
>> diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c
>> index 4fa0bcb..56e1c35 100644
>> --- a/drivers/net/ethernet/ti/davinci_emac.c
>> +++ b/drivers/net/ethernet/ti/davinci_emac.c
>> @@ -58,6 +58,12 @@
>> #include <linux/io.h>
>> #include <linux/uaccess.h>
>> #include <linux/davinci_emac.h>
>> +#include <linux/of.h>
>> +#include <linux/of_address.h>
>> +#include <linux/of_irq.h>
>> +#include <linux/of_net.h>
>> +
>> +#include <mach/mux.h>
>>
>> #include <asm/irq.h>
>> #include <asm/page.h>
>> @@ -339,6 +345,9 @@ struct emac_priv {
>> u32 rx_addr_type;
>> atomic_t cur_tx;
>> const char *phy_id;
>> +#ifdef CONFIG_OF
>> + struct device_node *phy_node;
>> +#endif
>> struct phy_device *phydev;
>> spinlock_t lock;
>> /*platform specific members*/
>> @@ -1760,6 +1769,82 @@ static const struct net_device_ops emac_netdev_ops = {
>> #endif
>> };
>>
>> +#ifdef CONFIG_OF
>> +static struct emac_platform_data
>> + *davinci_emac_of_get_pdata(struct platform_device *pdev,
>> + struct emac_priv *priv)
>> +{
>> + struct device_node *np;
>> + struct device_node *pinmux_np;
>> + struct emac_platform_data *pdata = NULL;
>> + const u8 *mac_addr;
>> + u32 data;
>> + int ret;
>> + int version;
>> +
>> + np = pdev->dev.of_node;
>> + if (!np)
>> + goto nodata;
>> + else
>> + version = EMAC_VERSION_2;
>
> You could set pdata->version directly here.
done.
>> +
>> + pdata = pdev->dev.platform_data;
>> + if (!pdata) {
>> + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
>> + if (!pdata)
>> + goto nodata;
>> + }
>> + pdata->version = version;
>> +
>> + mac_addr = of_get_mac_address(np);
>> + if (mac_addr)
>> + memcpy(pdata->mac_addr, mac_addr, ETH_ALEN);
>> +
>> + ret = of_property_read_u32(np, "ti,davinci-ctrl-reg-offset", &data);
>> + if (!ret)
>> + pdata->ctrl_reg_offset = data;
>> +
>> + ret = of_property_read_u32(np, "ti,davinci-ctrl-mod-reg-offset",
>> + &data);
>> + if (!ret)
>> + pdata->ctrl_mod_reg_offset = data;
>> +
>> + ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-offset", &data);
>> + if (!ret)
>> + pdata->ctrl_ram_offset = data;
>> +
>> + ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-size", &data);
>> + if (!ret)
>> + pdata->ctrl_ram_size = data;
>> +
>> + ret = of_property_read_u32(np, "ti,davinci-rmii-en", &data);
>> + if (!ret)
>> + pdata->rmii_en = data;
>> +
>> + ret = of_property_read_u32(np, "ti,davinci-no-bd-ram", &data);
>> + if (!ret)
>> + pdata->no_bd_ram = data;
>> +
>> + priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
>> + if (!priv->phy_node)
>> + pdata->phy_id = "";
>> +
>> + pinmux_np = of_parse_phandle(np, "pinmux-handle", 0);
>> + if (pinmux_np)
>> + davinci_cfg_reg_of(pinmux_np);
>
> This is a DaVinci specific pinmux function and this
> driver can be used in non-DaVinci platforms like C6x
> and OMAP. So, it will not be correct to call a DaVinci
> specific function here.
Ah, right!
> Can you drop the pinmux from this patch for now? On DaVinci,
Done ... Hmm.. so I think, I should drop this for all patches
from my patchset, right?
> for pinmux, we need to migrate to drivers/pinctrl/ as well.
Ah, I see ... take a look at it, maybe I find time to do here
something ... or do you know about work in progress here?
> Doing this will also make this patch independent of the rest
> of this series can even be merged separately. Can you please
> make these changes and resend just this patch?
Yep, I do some test with the changes you requested and resend
this patch ... do you prefer some tree, which I should use as
base?
>> +
>> + pdev->dev.platform_data = pdata;
>> +nodata:
>> + return pdata;
>> +}
>> +#else
>> +static struct emac_platform_data
>> + *davinci_emac_of_get_pdata(struct platform_device *pdev,
>> + struct emac_priv *priv)
>> +{
>> + return pdev->dev.platform_data;
>> +}
>> +#endif
>> /**
>> * davinci_emac_probe: EMAC device probe
>> * @pdev: The DaVinci EMAC device that we are removing
>> @@ -1803,7 +1888,7 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
>>
>> spin_lock_init(&priv->lock);
>>
>> - pdata = pdev->dev.platform_data;
>> + pdata = davinci_emac_of_get_pdata(pdev, priv);
>> if (!pdata) {
>> dev_err(&pdev->dev, "no platform data\n");
>> rc = -ENODEV;
>> @@ -2013,6 +2098,12 @@ static const struct dev_pm_ops davinci_emac_pm_ops = {
>> .resume = davinci_emac_resume,
>> };
>>
>> +static const struct of_device_id davinci_emac_of_match[] = {
>> + {.compatible = "ti,davinci-dm6460-emac", },
>
> This needs to be ti,davinci-dm6467-emac as well.
Yep, fixed.
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 4/7] ARM: davinci: net: davinci_emac: add OF support
2012-05-17 6:32 ` Heiko Schocher
(?)
@ 2012-05-17 7:21 ` Sekhar Nori
-1 siblings, 0 replies; 42+ messages in thread
From: Sekhar Nori @ 2012-05-17 7:21 UTC (permalink / raw)
To: hs
Cc: davinci-linux-open-source, linux-arm-kernel, devicetree-discuss,
netdev, Grant Likely, Wolfgang Denk, Anatoly Sivov
On 5/17/2012 12:02 PM, Heiko Schocher wrote:
> Nori, Sekhar wrote:
>> On Mon, Mar 05, 2012 at 16:40:01, Heiko Schocher wrote:
>>> +#ifdef CONFIG_OF
>>> +static struct emac_platform_data
>>> + *davinci_emac_of_get_pdata(struct platform_device *pdev,
>>> + struct emac_priv *priv)
>>> +{
>>> + struct device_node *np;
>>> + struct device_node *pinmux_np;
>>> + struct emac_platform_data *pdata = NULL;
>>> + const u8 *mac_addr;
>>> + u32 data;
>>> + int ret;
>>> + int version;
>>> +
>>> + np = pdev->dev.of_node;
>>> + if (!np)
>>> + goto nodata;
>>> + else
>>> + version = EMAC_VERSION_2;
>>
>> You could set pdata->version directly here.
>
> done.
Just noticed that pdata is not setup at this time. I guess you will be
moving around some code to do this.
>>> +
>>> + pinmux_np = of_parse_phandle(np, "pinmux-handle", 0);
>>> + if (pinmux_np)
>>> + davinci_cfg_reg_of(pinmux_np);
>>
>> This is a DaVinci specific pinmux function and this
>> driver can be used in non-DaVinci platforms like C6x
>> and OMAP. So, it will not be correct to call a DaVinci
>> specific function here.
>
> Ah, right!
>
>> Can you drop the pinmux from this patch for now? On DaVinci,
>
> Done ... Hmm.. so I think, I should drop this for all patches
> from my patchset, right?
Yes.
>
>> for pinmux, we need to migrate to drivers/pinctrl/ as well.
>
> Ah, I see ... take a look at it, maybe I find time to do here
> something ... or do you know about work in progress here?
There is no work in progress within TI. So, if you are interested in
taking a stab it it, it will be great.
>
>> Doing this will also make this patch independent of the rest
>> of this series can even be merged separately. Can you please
>> make these changes and resend just this patch?
>
> Yep, I do some test with the changes you requested and resend
> this patch ... do you prefer some tree, which I should use as
> base?
This one should ideally merge through the network subsystem so may be
base it on the net-next tree?
http://git.kernel.org/?p=linux/kernel/git/davem/net-next.git;a=summary
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 4/7] ARM: davinci: net: davinci_emac: add OF support
@ 2012-05-17 7:21 ` Sekhar Nori
0 siblings, 0 replies; 42+ messages in thread
From: Sekhar Nori @ 2012-05-17 7:21 UTC (permalink / raw)
To: hs
Cc: davinci-linux-open-source, linux-arm-kernel, devicetree-discuss,
netdev, Grant Likely, Wolfgang Denk, Anatoly Sivov
On 5/17/2012 12:02 PM, Heiko Schocher wrote:
> Nori, Sekhar wrote:
>> On Mon, Mar 05, 2012 at 16:40:01, Heiko Schocher wrote:
>>> +#ifdef CONFIG_OF
>>> +static struct emac_platform_data
>>> + *davinci_emac_of_get_pdata(struct platform_device *pdev,
>>> + struct emac_priv *priv)
>>> +{
>>> + struct device_node *np;
>>> + struct device_node *pinmux_np;
>>> + struct emac_platform_data *pdata = NULL;
>>> + const u8 *mac_addr;
>>> + u32 data;
>>> + int ret;
>>> + int version;
>>> +
>>> + np = pdev->dev.of_node;
>>> + if (!np)
>>> + goto nodata;
>>> + else
>>> + version = EMAC_VERSION_2;
>>
>> You could set pdata->version directly here.
>
> done.
Just noticed that pdata is not setup at this time. I guess you will be
moving around some code to do this.
>>> +
>>> + pinmux_np = of_parse_phandle(np, "pinmux-handle", 0);
>>> + if (pinmux_np)
>>> + davinci_cfg_reg_of(pinmux_np);
>>
>> This is a DaVinci specific pinmux function and this
>> driver can be used in non-DaVinci platforms like C6x
>> and OMAP. So, it will not be correct to call a DaVinci
>> specific function here.
>
> Ah, right!
>
>> Can you drop the pinmux from this patch for now? On DaVinci,
>
> Done ... Hmm.. so I think, I should drop this for all patches
> from my patchset, right?
Yes.
>
>> for pinmux, we need to migrate to drivers/pinctrl/ as well.
>
> Ah, I see ... take a look at it, maybe I find time to do here
> something ... or do you know about work in progress here?
There is no work in progress within TI. So, if you are interested in
taking a stab it it, it will be great.
>
>> Doing this will also make this patch independent of the rest
>> of this series can even be merged separately. Can you please
>> make these changes and resend just this patch?
>
> Yep, I do some test with the changes you requested and resend
> this patch ... do you prefer some tree, which I should use as
> base?
This one should ideally merge through the network subsystem so may be
base it on the net-next tree?
http://git.kernel.org/?p=linux/kernel/git/davem/net-next.git;a=summary
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 4/7] ARM: davinci: net: davinci_emac: add OF support
@ 2012-05-17 7:21 ` Sekhar Nori
0 siblings, 0 replies; 42+ messages in thread
From: Sekhar Nori @ 2012-05-17 7:21 UTC (permalink / raw)
To: linux-arm-kernel
On 5/17/2012 12:02 PM, Heiko Schocher wrote:
> Nori, Sekhar wrote:
>> On Mon, Mar 05, 2012 at 16:40:01, Heiko Schocher wrote:
>>> +#ifdef CONFIG_OF
>>> +static struct emac_platform_data
>>> + *davinci_emac_of_get_pdata(struct platform_device *pdev,
>>> + struct emac_priv *priv)
>>> +{
>>> + struct device_node *np;
>>> + struct device_node *pinmux_np;
>>> + struct emac_platform_data *pdata = NULL;
>>> + const u8 *mac_addr;
>>> + u32 data;
>>> + int ret;
>>> + int version;
>>> +
>>> + np = pdev->dev.of_node;
>>> + if (!np)
>>> + goto nodata;
>>> + else
>>> + version = EMAC_VERSION_2;
>>
>> You could set pdata->version directly here.
>
> done.
Just noticed that pdata is not setup at this time. I guess you will be
moving around some code to do this.
>>> +
>>> + pinmux_np = of_parse_phandle(np, "pinmux-handle", 0);
>>> + if (pinmux_np)
>>> + davinci_cfg_reg_of(pinmux_np);
>>
>> This is a DaVinci specific pinmux function and this
>> driver can be used in non-DaVinci platforms like C6x
>> and OMAP. So, it will not be correct to call a DaVinci
>> specific function here.
>
> Ah, right!
>
>> Can you drop the pinmux from this patch for now? On DaVinci,
>
> Done ... Hmm.. so I think, I should drop this for all patches
> from my patchset, right?
Yes.
>
>> for pinmux, we need to migrate to drivers/pinctrl/ as well.
>
> Ah, I see ... take a look at it, maybe I find time to do here
> something ... or do you know about work in progress here?
There is no work in progress within TI. So, if you are interested in
taking a stab it it, it will be great.
>
>> Doing this will also make this patch independent of the rest
>> of this series can even be merged separately. Can you please
>> make these changes and resend just this patch?
>
> Yep, I do some test with the changes you requested and resend
> this patch ... do you prefer some tree, which I should use as
> base?
This one should ideally merge through the network subsystem so may be
base it on the net-next tree?
http://git.kernel.org/?p=linux/kernel/git/davem/net-next.git;a=summary
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 1/7] ARM: davinci, intc: Add OF support for TI interrupt controller
2012-03-05 11:09 ` Heiko Schocher
@ 2012-05-19 6:16 ` Grant Likely
-1 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2012-05-19 6:16 UTC (permalink / raw)
To: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/
Cc: Wolfgang Denk, Sergei Shtylyov,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ, Sekhar Nori,
Heiko Schocher,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Mon, 5 Mar 2012 12:09:58 +0100, Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org> wrote:
> Add a function to initialize the Common Platform Interrupt Controller
> (cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.
>
> Signed-off-by: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
> Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
> Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Cc: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
> Cc: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
> Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
> Cc: Sergei Shtylyov <sshtylyov-Igf4POYTYCDQT0dZR+AlfA@public.gmane.org>
>
> ---
> - changes for v2:
> - add comment from Grant Likely:
> - migrate the whole interrupt controller to natively use an
> irq_domain. Rebased complete patchserie to:
> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>
> commit 3a806bfcde2cc3e4853f2807b2e3c94e7ccaf450
> Author: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
> Date: Fri Jan 27 06:44:34 2012 -0700
>
> irq_domain: mostly eliminate slow-path revmap lookups
> - changes for v3:
> - add comments from Sergei Shtylyov:
> - rename compatible" prop to "ti,cp_intc"
> - cp_intc_init() is now also for the of case
> the name of the init function (it calls the
> "new" __cp_intc_init() function, which was
> the "old" cp_intc_init()). Through this
> rework the changes for OF is better visible.
> As the OF case uses the irq_domain rework from
> Grant Likely, maybe the none OF case can use
> this also, but this should be tested on a hw ...
> - rebased to:
> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>
> commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
> Author: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
> Date: Fri Feb 24 14:58:54 2012 -0700
>
> mfd: twl-core: Add IRQ_DOMAIN dependency
>
> .../devicetree/bindings/arm/davinci/intc.txt | 27 ++++++
> arch/arm/mach-davinci/cp_intc.c | 87 +++++++++++++++++--
> 2 files changed, 104 insertions(+), 10 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/davinci/intc.txt b/Documentation/devicetree/bindings/arm/davinci/intc.txt
> new file mode 100644
> index 0000000..dfd6a560
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/davinci/intc.txt
> @@ -0,0 +1,27 @@
> +* TI Common Platform Interrupt Controller
> +
> +Common Platform Interrupt Controller (cp_intc) is used on
> +OMAP-L1x SoCs and can support several configurable number
> +of interrupts.
> +
> +Main node required properties:
> +
> +- compatible : should be:
> + "ti,cp_intc"
> +- interrupt-controller : Identifies the node as an interrupt controller
> +- #interrupt-cells : Specifies the number of cells needed to encode an
> + interrupt source. The type shall be a <u32> and the value shall be 1.
> +
> + The cell contains the interrupt number in the range [0-128].
> +- ti,intc-size: Number of interrupts handled by the interrupt controller.
> +- reg: physical base address and size of the intc registers map.
> +
> +Example:
> +
> + intc: interrupt-controller@1 {
> + compatible = "ti,cp_intc";
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + ti,intc-size = <101>;
> + reg = <0xfffee000 0x2000>;
> + };
> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> index f83152d..585114a 100644
> --- a/arch/arm/mach-davinci/cp_intc.c
> +++ b/arch/arm/mach-davinci/cp_intc.c
> @@ -9,9 +9,14 @@
> * kind, whether express or implied.
> */
>
> +#include <linux/export.h>
> #include <linux/init.h>
> #include <linux/irq.h>
> +#include <linux/irqdomain.h>
> #include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
>
> #include <mach/common.h>
> #include <mach/cp_intc.h>
> @@ -99,18 +104,45 @@ static struct irq_chip cp_intc_irq_chip = {
> .irq_set_wake = cp_intc_set_wake,
> };
>
> -void __init cp_intc_init(void)
> +static struct irq_domain *cp_intc_domain;
> +
> +static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
> + irq_hw_number_t hw)
> {
> - unsigned long num_irq = davinci_soc_info.intc_irq_num;
> + pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
> +
> + irq_set_chip(virq, &cp_intc_irq_chip);
> + set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
> + irq_set_handler(virq, handle_edge_irq);
> + return 0;
> +}
> +
> +static const struct irq_domain_ops cp_intc_host_ops = {
> + .map = cp_intc_host_map,
> + .xlate = irq_domain_xlate_onetwocell,
> +};
> +
> +int __init __cp_intc_init(struct device_node *node,
> + struct device_node *parent)
> +{
> + u32 num_irq = davinci_soc_info.intc_irq_num;
> u8 *irq_prio = davinci_soc_info.intc_irq_prios;
> u32 *host_map = davinci_soc_info.intc_host_map;
> unsigned num_reg = BITS_TO_LONGS(num_irq);
> - int i;
> + int i, irq_base;
>
> davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
> - davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
> + if (node) {
> + davinci_intc_base = of_iomap(node, 0);
> + if (of_property_read_u32(node, "ti,intc-size", &num_irq))
> + pr_warn("unable to get intc-size, default to %d\n",
> + num_irq);
> + } else {
> + davinci_intc_base = ioremap(davinci_soc_info.intc_base,
> + SZ_8K);
> + }
> if (WARN_ON(!davinci_intc_base))
> - return;
> + return -EINVAL;
>
> cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);
>
> @@ -165,13 +197,48 @@ void __init cp_intc_init(void)
> for (i = 0; host_map[i] != -1; i++)
> cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
>
> - /* Set up genirq dispatching for cp_intc */
> - for (i = 0; i < num_irq; i++) {
> - irq_set_chip(i, &cp_intc_irq_chip);
> - set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
> - irq_set_handler(i, handle_edge_irq);
> + if (node) {
> + irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
> + if (irq_base < 0) {
> + pr_warn("Couldn't allocate IRQ numbers\n");
> + irq_base = 0;
> + }
> +
> + /* create a legacy host */
> + cp_intc_domain = irq_domain_add_legacy(node, num_irq,
> + irq_base, 0, &cp_intc_host_ops, NULL);
> + if (cp_intc_domain == NULL) {
> + pr_err("CP INTC: failed to allocate irq host!\n");
> + return -EINVAL;
> + }
> + } else {
> + /* Set up genirq dispatching for cp_intc */
> + for (i = 0; i < num_irq; i++) {
> + irq_set_chip(i, &cp_intc_irq_chip);
> + set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
> + irq_set_handler(i, handle_edge_irq);
> + }
No need for the if/else clause here. irq_domain should be used for
both DT and non-DT. It makes the code a lot simpler that way. The
only difference I would suggest is to call irq_domain_add_linear() in
the DT case instead of irq_domain_add_legacy()... and this is
temporary too until I fix up the irq_domain code to better handle both
static and dynamic mapping.
> }
>
> /* Enable global interrupt */
> cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_OF
> +static struct of_device_id irq_match[] __initdata = {
> + { .compatible = "ti,cp_intc", .data = __cp_intc_init, },
> + { }
> +};
> +
> +void __init cp_intc_init(void)
> +{
> + of_irq_init(irq_match);
> +}
> +#else
> +void __init cp_intc_init(void)
> +{
> + __cp_intc_init(NULL, NULL);
> }
> +#endif
This is broken. Turning on CONFIG_OF must not disable non-DT users.
It needs to be reworked to be conditional at runtime.
g.
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 1/7] ARM: davinci, intc: Add OF support for TI interrupt controller
@ 2012-05-19 6:16 ` Grant Likely
0 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2012-05-19 6:16 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, 5 Mar 2012 12:09:58 +0100, Heiko Schocher <hs@denx.de> wrote:
> Add a function to initialize the Common Platform Interrupt Controller
> (cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: davinci-linux-open-source at linux.davincidsp.com
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: devicetree-discuss at lists.ozlabs.org
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Sergei Shtylyov <sshtylyov@mvista.com>
>
> ---
> - changes for v2:
> - add comment from Grant Likely:
> - migrate the whole interrupt controller to natively use an
> irq_domain. Rebased complete patchserie to:
> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>
> commit 3a806bfcde2cc3e4853f2807b2e3c94e7ccaf450
> Author: Grant Likely <grant.likely@secretlab.ca>
> Date: Fri Jan 27 06:44:34 2012 -0700
>
> irq_domain: mostly eliminate slow-path revmap lookups
> - changes for v3:
> - add comments from Sergei Shtylyov:
> - rename compatible" prop to "ti,cp_intc"
> - cp_intc_init() is now also for the of case
> the name of the init function (it calls the
> "new" __cp_intc_init() function, which was
> the "old" cp_intc_init()). Through this
> rework the changes for OF is better visible.
> As the OF case uses the irq_domain rework from
> Grant Likely, maybe the none OF case can use
> this also, but this should be tested on a hw ...
> - rebased to:
> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>
> commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
> Author: Grant Likely <grant.likely@secretlab.ca>
> Date: Fri Feb 24 14:58:54 2012 -0700
>
> mfd: twl-core: Add IRQ_DOMAIN dependency
>
> .../devicetree/bindings/arm/davinci/intc.txt | 27 ++++++
> arch/arm/mach-davinci/cp_intc.c | 87 +++++++++++++++++--
> 2 files changed, 104 insertions(+), 10 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/davinci/intc.txt b/Documentation/devicetree/bindings/arm/davinci/intc.txt
> new file mode 100644
> index 0000000..dfd6a560
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/davinci/intc.txt
> @@ -0,0 +1,27 @@
> +* TI Common Platform Interrupt Controller
> +
> +Common Platform Interrupt Controller (cp_intc) is used on
> +OMAP-L1x SoCs and can support several configurable number
> +of interrupts.
> +
> +Main node required properties:
> +
> +- compatible : should be:
> + "ti,cp_intc"
> +- interrupt-controller : Identifies the node as an interrupt controller
> +- #interrupt-cells : Specifies the number of cells needed to encode an
> + interrupt source. The type shall be a <u32> and the value shall be 1.
> +
> + The cell contains the interrupt number in the range [0-128].
> +- ti,intc-size: Number of interrupts handled by the interrupt controller.
> +- reg: physical base address and size of the intc registers map.
> +
> +Example:
> +
> + intc: interrupt-controller at 1 {
> + compatible = "ti,cp_intc";
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + ti,intc-size = <101>;
> + reg = <0xfffee000 0x2000>;
> + };
> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> index f83152d..585114a 100644
> --- a/arch/arm/mach-davinci/cp_intc.c
> +++ b/arch/arm/mach-davinci/cp_intc.c
> @@ -9,9 +9,14 @@
> * kind, whether express or implied.
> */
>
> +#include <linux/export.h>
> #include <linux/init.h>
> #include <linux/irq.h>
> +#include <linux/irqdomain.h>
> #include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
>
> #include <mach/common.h>
> #include <mach/cp_intc.h>
> @@ -99,18 +104,45 @@ static struct irq_chip cp_intc_irq_chip = {
> .irq_set_wake = cp_intc_set_wake,
> };
>
> -void __init cp_intc_init(void)
> +static struct irq_domain *cp_intc_domain;
> +
> +static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
> + irq_hw_number_t hw)
> {
> - unsigned long num_irq = davinci_soc_info.intc_irq_num;
> + pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
> +
> + irq_set_chip(virq, &cp_intc_irq_chip);
> + set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
> + irq_set_handler(virq, handle_edge_irq);
> + return 0;
> +}
> +
> +static const struct irq_domain_ops cp_intc_host_ops = {
> + .map = cp_intc_host_map,
> + .xlate = irq_domain_xlate_onetwocell,
> +};
> +
> +int __init __cp_intc_init(struct device_node *node,
> + struct device_node *parent)
> +{
> + u32 num_irq = davinci_soc_info.intc_irq_num;
> u8 *irq_prio = davinci_soc_info.intc_irq_prios;
> u32 *host_map = davinci_soc_info.intc_host_map;
> unsigned num_reg = BITS_TO_LONGS(num_irq);
> - int i;
> + int i, irq_base;
>
> davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
> - davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
> + if (node) {
> + davinci_intc_base = of_iomap(node, 0);
> + if (of_property_read_u32(node, "ti,intc-size", &num_irq))
> + pr_warn("unable to get intc-size, default to %d\n",
> + num_irq);
> + } else {
> + davinci_intc_base = ioremap(davinci_soc_info.intc_base,
> + SZ_8K);
> + }
> if (WARN_ON(!davinci_intc_base))
> - return;
> + return -EINVAL;
>
> cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);
>
> @@ -165,13 +197,48 @@ void __init cp_intc_init(void)
> for (i = 0; host_map[i] != -1; i++)
> cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
>
> - /* Set up genirq dispatching for cp_intc */
> - for (i = 0; i < num_irq; i++) {
> - irq_set_chip(i, &cp_intc_irq_chip);
> - set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
> - irq_set_handler(i, handle_edge_irq);
> + if (node) {
> + irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
> + if (irq_base < 0) {
> + pr_warn("Couldn't allocate IRQ numbers\n");
> + irq_base = 0;
> + }
> +
> + /* create a legacy host */
> + cp_intc_domain = irq_domain_add_legacy(node, num_irq,
> + irq_base, 0, &cp_intc_host_ops, NULL);
> + if (cp_intc_domain == NULL) {
> + pr_err("CP INTC: failed to allocate irq host!\n");
> + return -EINVAL;
> + }
> + } else {
> + /* Set up genirq dispatching for cp_intc */
> + for (i = 0; i < num_irq; i++) {
> + irq_set_chip(i, &cp_intc_irq_chip);
> + set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
> + irq_set_handler(i, handle_edge_irq);
> + }
No need for the if/else clause here. irq_domain should be used for
both DT and non-DT. It makes the code a lot simpler that way. The
only difference I would suggest is to call irq_domain_add_linear() in
the DT case instead of irq_domain_add_legacy()... and this is
temporary too until I fix up the irq_domain code to better handle both
static and dynamic mapping.
> }
>
> /* Enable global interrupt */
> cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_OF
> +static struct of_device_id irq_match[] __initdata = {
> + { .compatible = "ti,cp_intc", .data = __cp_intc_init, },
> + { }
> +};
> +
> +void __init cp_intc_init(void)
> +{
> + of_irq_init(irq_match);
> +}
> +#else
> +void __init cp_intc_init(void)
> +{
> + __cp_intc_init(NULL, NULL);
> }
> +#endif
This is broken. Turning on CONFIG_OF must not disable non-DT users.
It needs to be reworked to be conditional at runtime.
g.
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 1/7] ARM: davinci, intc: Add OF support for TI interrupt controller
2012-05-19 6:16 ` Grant Likely
@ 2012-05-20 10:58 ` Sekhar Nori
-1 siblings, 0 replies; 42+ messages in thread
From: Sekhar Nori @ 2012-05-20 10:58 UTC (permalink / raw)
To: Heiko Schocher
Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/,
Wolfgang Denk, Sergei Shtylyov,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 5/19/2012 11:46 AM, Grant Likely wrote:
> On Mon, 5 Mar 2012 12:09:58 +0100, Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org> wrote:
>> Add a function to initialize the Common Platform Interrupt Controller
>> (cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.
>>
>> Signed-off-by: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
>> Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
>> Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
>> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
>> Cc: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
>> Cc: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
>> Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
>> Cc: Sergei Shtylyov <sshtylyov-Igf4POYTYCDQT0dZR+AlfA@public.gmane.org>
>>
>> ---
>> @@ -165,13 +197,48 @@ void __init cp_intc_init(void)
>> for (i = 0; host_map[i] != -1; i++)
>> cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
>>
>> - /* Set up genirq dispatching for cp_intc */
>> - for (i = 0; i < num_irq; i++) {
>> - irq_set_chip(i, &cp_intc_irq_chip);
>> - set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
>> - irq_set_handler(i, handle_edge_irq);
>> + if (node) {
>> + irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
>> + if (irq_base < 0) {
>> + pr_warn("Couldn't allocate IRQ numbers\n");
>> + irq_base = 0;
>> + }
>> +
>> + /* create a legacy host */
>> + cp_intc_domain = irq_domain_add_legacy(node, num_irq,
>> + irq_base, 0, &cp_intc_host_ops, NULL);
>> + if (cp_intc_domain == NULL) {
>> + pr_err("CP INTC: failed to allocate irq host!\n");
>> + return -EINVAL;
>> + }
>> + } else {
>> + /* Set up genirq dispatching for cp_intc */
>> + for (i = 0; i < num_irq; i++) {
>> + irq_set_chip(i, &cp_intc_irq_chip);
>> + set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
>> + irq_set_handler(i, handle_edge_irq);
>> + }
>
> No need for the if/else clause here. irq_domain should be used for
> both DT and non-DT. It makes the code a lot simpler that way. The
> only difference I would suggest is to call irq_domain_add_linear() in
> the DT case instead of irq_domain_add_legacy()... and this is
> temporary too until I fix up the irq_domain code to better handle both
> static and dynamic mapping.
It will also help to do the irq_domain conversion in a separate patch.
That way irq_domain conversion can be reviewed separately from DT
conversion.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 1/7] ARM: davinci, intc: Add OF support for TI interrupt controller
@ 2012-05-20 10:58 ` Sekhar Nori
0 siblings, 0 replies; 42+ messages in thread
From: Sekhar Nori @ 2012-05-20 10:58 UTC (permalink / raw)
To: linux-arm-kernel
On 5/19/2012 11:46 AM, Grant Likely wrote:
> On Mon, 5 Mar 2012 12:09:58 +0100, Heiko Schocher <hs@denx.de> wrote:
>> Add a function to initialize the Common Platform Interrupt Controller
>> (cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.
>>
>> Signed-off-by: Heiko Schocher <hs@denx.de>
>> Cc: davinci-linux-open-source at linux.davincidsp.com
>> Cc: linux-arm-kernel at lists.infradead.org
>> Cc: devicetree-discuss at lists.ozlabs.org
>> Cc: Grant Likely <grant.likely@secretlab.ca>
>> Cc: Sekhar Nori <nsekhar@ti.com>
>> Cc: Wolfgang Denk <wd@denx.de>
>> Cc: Sergei Shtylyov <sshtylyov@mvista.com>
>>
>> ---
>> @@ -165,13 +197,48 @@ void __init cp_intc_init(void)
>> for (i = 0; host_map[i] != -1; i++)
>> cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
>>
>> - /* Set up genirq dispatching for cp_intc */
>> - for (i = 0; i < num_irq; i++) {
>> - irq_set_chip(i, &cp_intc_irq_chip);
>> - set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
>> - irq_set_handler(i, handle_edge_irq);
>> + if (node) {
>> + irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
>> + if (irq_base < 0) {
>> + pr_warn("Couldn't allocate IRQ numbers\n");
>> + irq_base = 0;
>> + }
>> +
>> + /* create a legacy host */
>> + cp_intc_domain = irq_domain_add_legacy(node, num_irq,
>> + irq_base, 0, &cp_intc_host_ops, NULL);
>> + if (cp_intc_domain == NULL) {
>> + pr_err("CP INTC: failed to allocate irq host!\n");
>> + return -EINVAL;
>> + }
>> + } else {
>> + /* Set up genirq dispatching for cp_intc */
>> + for (i = 0; i < num_irq; i++) {
>> + irq_set_chip(i, &cp_intc_irq_chip);
>> + set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
>> + irq_set_handler(i, handle_edge_irq);
>> + }
>
> No need for the if/else clause here. irq_domain should be used for
> both DT and non-DT. It makes the code a lot simpler that way. The
> only difference I would suggest is to call irq_domain_add_linear() in
> the DT case instead of irq_domain_add_legacy()... and this is
> temporary too until I fix up the irq_domain code to better handle both
> static and dynamic mapping.
It will also help to do the irq_domain conversion in a separate patch.
That way irq_domain conversion can be reviewed separately from DT
conversion.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 1/7] ARM: davinci, intc: Add OF support for TI interrupt controller
2012-03-05 11:09 ` Heiko Schocher
@ 2012-05-26 1:05 ` Grant Likely
-1 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2012-05-26 1:05 UTC (permalink / raw)
To: davinci-linux-open-source
Cc: Wolfgang Denk, Sergei Shtylyov, devicetree-discuss, Sekhar Nori,
Heiko Schocher, linux-arm-kernel
On Mon, 5 Mar 2012 12:09:58 +0100, Heiko Schocher <hs@denx.de> wrote:
> Add a function to initialize the Common Platform Interrupt Controller
> (cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: davinci-linux-open-source@linux.davincidsp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: devicetree-discuss@lists.ozlabs.org
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Sergei Shtylyov <sshtylyov@mvista.com>
>
> ---
> - changes for v2:
> - add comment from Grant Likely:
> - migrate the whole interrupt controller to natively use an
> irq_domain. Rebased complete patchserie to:
> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>
> commit 3a806bfcde2cc3e4853f2807b2e3c94e7ccaf450
> Author: Grant Likely <grant.likely@secretlab.ca>
> Date: Fri Jan 27 06:44:34 2012 -0700
>
> irq_domain: mostly eliminate slow-path revmap lookups
> - changes for v3:
> - add comments from Sergei Shtylyov:
> - rename compatible" prop to "ti,cp_intc"
Nit: DT preference is to use '-' instead of '_'
> - cp_intc_init() is now also for the of case
> the name of the init function (it calls the
> "new" __cp_intc_init() function, which was
> the "old" cp_intc_init()). Through this
> rework the changes for OF is better visible.
> As the OF case uses the irq_domain rework from
> Grant Likely, maybe the none OF case can use
> this also, but this should be tested on a hw ...
> - rebased to:
> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>
> commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
> Author: Grant Likely <grant.likely@secretlab.ca>
> Date: Fri Feb 24 14:58:54 2012 -0700
>
> mfd: twl-core: Add IRQ_DOMAIN dependency
>
> .../devicetree/bindings/arm/davinci/intc.txt | 27 ++++++
> arch/arm/mach-davinci/cp_intc.c | 87 +++++++++++++++++--
> 2 files changed, 104 insertions(+), 10 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/davinci/intc.txt b/Documentation/devicetree/bindings/arm/davinci/intc.txt
> new file mode 100644
> index 0000000..dfd6a560
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/davinci/intc.txt
> @@ -0,0 +1,27 @@
> +* TI Common Platform Interrupt Controller
> +
> +Common Platform Interrupt Controller (cp_intc) is used on
> +OMAP-L1x SoCs and can support several configurable number
> +of interrupts.
> +
> +Main node required properties:
> +
> +- compatible : should be:
> + "ti,cp_intc"
> +- interrupt-controller : Identifies the node as an interrupt controller
> +- #interrupt-cells : Specifies the number of cells needed to encode an
> + interrupt source. The type shall be a <u32> and the value shall be 1.
Is there any configuration for irq inputs (edge/level) or are they
fixed mode? If configurable, then you'll want another cell for flags.
> +
> + The cell contains the interrupt number in the range [0-128].
> +- ti,intc-size: Number of interrupts handled by the interrupt controller.
> +- reg: physical base address and size of the intc registers map.
> +
> +Example:
> +
> + intc: interrupt-controller@1 {
> + compatible = "ti,cp_intc";
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + ti,intc-size = <101>;
> + reg = <0xfffee000 0x2000>;
> + };
> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> index f83152d..585114a 100644
> --- a/arch/arm/mach-davinci/cp_intc.c
> +++ b/arch/arm/mach-davinci/cp_intc.c
> @@ -9,9 +9,14 @@
> * kind, whether express or implied.
> */
>
> +#include <linux/export.h>
> #include <linux/init.h>
> #include <linux/irq.h>
> +#include <linux/irqdomain.h>
> #include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
>
> #include <mach/common.h>
> #include <mach/cp_intc.h>
> @@ -99,18 +104,45 @@ static struct irq_chip cp_intc_irq_chip = {
> .irq_set_wake = cp_intc_set_wake,
> };
>
> -void __init cp_intc_init(void)
> +static struct irq_domain *cp_intc_domain;
> +
> +static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
> + irq_hw_number_t hw)
> {
> - unsigned long num_irq = davinci_soc_info.intc_irq_num;
> + pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
> +
> + irq_set_chip(virq, &cp_intc_irq_chip);
> + set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
> + irq_set_handler(virq, handle_edge_irq);
> + return 0;
> +}
> +
> +static const struct irq_domain_ops cp_intc_host_ops = {
> + .map = cp_intc_host_map,
> + .xlate = irq_domain_xlate_onetwocell,
> +};
> +
> +int __init __cp_intc_init(struct device_node *node,
> + struct device_node *parent)
> +{
> + u32 num_irq = davinci_soc_info.intc_irq_num;
> u8 *irq_prio = davinci_soc_info.intc_irq_prios;
> u32 *host_map = davinci_soc_info.intc_host_map;
> unsigned num_reg = BITS_TO_LONGS(num_irq);
> - int i;
> + int i, irq_base;
>
> davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
> - davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
> + if (node) {
> + davinci_intc_base = of_iomap(node, 0);
> + if (of_property_read_u32(node, "ti,intc-size", &num_irq))
> + pr_warn("unable to get intc-size, default to %d\n",
> + num_irq);
> + } else {
> + davinci_intc_base = ioremap(davinci_soc_info.intc_base,
> + SZ_8K);
> + }
> if (WARN_ON(!davinci_intc_base))
> - return;
> + return -EINVAL;
>
> cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);
>
> @@ -165,13 +197,48 @@ void __init cp_intc_init(void)
> for (i = 0; host_map[i] != -1; i++)
> cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
>
> - /* Set up genirq dispatching for cp_intc */
> - for (i = 0; i < num_irq; i++) {
> - irq_set_chip(i, &cp_intc_irq_chip);
> - set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
> - irq_set_handler(i, handle_edge_irq);
> + if (node) {
> + irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
> + if (irq_base < 0) {
> + pr_warn("Couldn't allocate IRQ numbers\n");
> + irq_base = 0;
> + }
> +
> + /* create a legacy host */
> + cp_intc_domain = irq_domain_add_legacy(node, num_irq,
> + irq_base, 0, &cp_intc_host_ops, NULL);
> + if (cp_intc_domain == NULL) {
> + pr_err("CP INTC: failed to allocate irq host!\n");
> + return -EINVAL;
> + }
> + } else {
> + /* Set up genirq dispatching for cp_intc */
> + for (i = 0; i < num_irq; i++) {
> + irq_set_chip(i, &cp_intc_irq_chip);
> + set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
> + irq_set_handler(i, handle_edge_irq);
> + }
Instead of the else clause here, even the non-DT mode should still
call irq_domain_add. irq_domain is not just for DT. It gets the
driver away from manually managing its irq mappings.
> }
>
> /* Enable global interrupt */
> cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_OF
> +static struct of_device_id irq_match[] __initdata = {
> + { .compatible = "ti,cp_intc", .data = __cp_intc_init, },
> + { }
> +};
> +
> +void __init cp_intc_init(void)
> +{
> + of_irq_init(irq_match);
> +}
> +#else
> +void __init cp_intc_init(void)
> +{
> + __cp_intc_init(NULL, NULL);
> }
> +#endif
Nack on this hunk because it means you have either a DT kernel or a
non-DT kernel. Turning on CONFIG_OF must not break booting on a
non-DT platform. This is a policy decision to improve test coverage.
Instead the init hook should check at runtime if a DT is available,
and if it is call of_irq_init. Otherwise call __cp_initc_init()
directly.
g.
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 1/7] ARM: davinci, intc: Add OF support for TI interrupt controller
@ 2012-05-26 1:05 ` Grant Likely
0 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2012-05-26 1:05 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, 5 Mar 2012 12:09:58 +0100, Heiko Schocher <hs@denx.de> wrote:
> Add a function to initialize the Common Platform Interrupt Controller
> (cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: davinci-linux-open-source at linux.davincidsp.com
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: devicetree-discuss at lists.ozlabs.org
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Sergei Shtylyov <sshtylyov@mvista.com>
>
> ---
> - changes for v2:
> - add comment from Grant Likely:
> - migrate the whole interrupt controller to natively use an
> irq_domain. Rebased complete patchserie to:
> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>
> commit 3a806bfcde2cc3e4853f2807b2e3c94e7ccaf450
> Author: Grant Likely <grant.likely@secretlab.ca>
> Date: Fri Jan 27 06:44:34 2012 -0700
>
> irq_domain: mostly eliminate slow-path revmap lookups
> - changes for v3:
> - add comments from Sergei Shtylyov:
> - rename compatible" prop to "ti,cp_intc"
Nit: DT preference is to use '-' instead of '_'
> - cp_intc_init() is now also for the of case
> the name of the init function (it calls the
> "new" __cp_intc_init() function, which was
> the "old" cp_intc_init()). Through this
> rework the changes for OF is better visible.
> As the OF case uses the irq_domain rework from
> Grant Likely, maybe the none OF case can use
> this also, but this should be tested on a hw ...
> - rebased to:
> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>
> commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
> Author: Grant Likely <grant.likely@secretlab.ca>
> Date: Fri Feb 24 14:58:54 2012 -0700
>
> mfd: twl-core: Add IRQ_DOMAIN dependency
>
> .../devicetree/bindings/arm/davinci/intc.txt | 27 ++++++
> arch/arm/mach-davinci/cp_intc.c | 87 +++++++++++++++++--
> 2 files changed, 104 insertions(+), 10 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/davinci/intc.txt b/Documentation/devicetree/bindings/arm/davinci/intc.txt
> new file mode 100644
> index 0000000..dfd6a560
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/davinci/intc.txt
> @@ -0,0 +1,27 @@
> +* TI Common Platform Interrupt Controller
> +
> +Common Platform Interrupt Controller (cp_intc) is used on
> +OMAP-L1x SoCs and can support several configurable number
> +of interrupts.
> +
> +Main node required properties:
> +
> +- compatible : should be:
> + "ti,cp_intc"
> +- interrupt-controller : Identifies the node as an interrupt controller
> +- #interrupt-cells : Specifies the number of cells needed to encode an
> + interrupt source. The type shall be a <u32> and the value shall be 1.
Is there any configuration for irq inputs (edge/level) or are they
fixed mode? If configurable, then you'll want another cell for flags.
> +
> + The cell contains the interrupt number in the range [0-128].
> +- ti,intc-size: Number of interrupts handled by the interrupt controller.
> +- reg: physical base address and size of the intc registers map.
> +
> +Example:
> +
> + intc: interrupt-controller at 1 {
> + compatible = "ti,cp_intc";
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + ti,intc-size = <101>;
> + reg = <0xfffee000 0x2000>;
> + };
> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> index f83152d..585114a 100644
> --- a/arch/arm/mach-davinci/cp_intc.c
> +++ b/arch/arm/mach-davinci/cp_intc.c
> @@ -9,9 +9,14 @@
> * kind, whether express or implied.
> */
>
> +#include <linux/export.h>
> #include <linux/init.h>
> #include <linux/irq.h>
> +#include <linux/irqdomain.h>
> #include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
>
> #include <mach/common.h>
> #include <mach/cp_intc.h>
> @@ -99,18 +104,45 @@ static struct irq_chip cp_intc_irq_chip = {
> .irq_set_wake = cp_intc_set_wake,
> };
>
> -void __init cp_intc_init(void)
> +static struct irq_domain *cp_intc_domain;
> +
> +static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
> + irq_hw_number_t hw)
> {
> - unsigned long num_irq = davinci_soc_info.intc_irq_num;
> + pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
> +
> + irq_set_chip(virq, &cp_intc_irq_chip);
> + set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
> + irq_set_handler(virq, handle_edge_irq);
> + return 0;
> +}
> +
> +static const struct irq_domain_ops cp_intc_host_ops = {
> + .map = cp_intc_host_map,
> + .xlate = irq_domain_xlate_onetwocell,
> +};
> +
> +int __init __cp_intc_init(struct device_node *node,
> + struct device_node *parent)
> +{
> + u32 num_irq = davinci_soc_info.intc_irq_num;
> u8 *irq_prio = davinci_soc_info.intc_irq_prios;
> u32 *host_map = davinci_soc_info.intc_host_map;
> unsigned num_reg = BITS_TO_LONGS(num_irq);
> - int i;
> + int i, irq_base;
>
> davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
> - davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
> + if (node) {
> + davinci_intc_base = of_iomap(node, 0);
> + if (of_property_read_u32(node, "ti,intc-size", &num_irq))
> + pr_warn("unable to get intc-size, default to %d\n",
> + num_irq);
> + } else {
> + davinci_intc_base = ioremap(davinci_soc_info.intc_base,
> + SZ_8K);
> + }
> if (WARN_ON(!davinci_intc_base))
> - return;
> + return -EINVAL;
>
> cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);
>
> @@ -165,13 +197,48 @@ void __init cp_intc_init(void)
> for (i = 0; host_map[i] != -1; i++)
> cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
>
> - /* Set up genirq dispatching for cp_intc */
> - for (i = 0; i < num_irq; i++) {
> - irq_set_chip(i, &cp_intc_irq_chip);
> - set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
> - irq_set_handler(i, handle_edge_irq);
> + if (node) {
> + irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
> + if (irq_base < 0) {
> + pr_warn("Couldn't allocate IRQ numbers\n");
> + irq_base = 0;
> + }
> +
> + /* create a legacy host */
> + cp_intc_domain = irq_domain_add_legacy(node, num_irq,
> + irq_base, 0, &cp_intc_host_ops, NULL);
> + if (cp_intc_domain == NULL) {
> + pr_err("CP INTC: failed to allocate irq host!\n");
> + return -EINVAL;
> + }
> + } else {
> + /* Set up genirq dispatching for cp_intc */
> + for (i = 0; i < num_irq; i++) {
> + irq_set_chip(i, &cp_intc_irq_chip);
> + set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
> + irq_set_handler(i, handle_edge_irq);
> + }
Instead of the else clause here, even the non-DT mode should still
call irq_domain_add. irq_domain is not just for DT. It gets the
driver away from manually managing its irq mappings.
> }
>
> /* Enable global interrupt */
> cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_OF
> +static struct of_device_id irq_match[] __initdata = {
> + { .compatible = "ti,cp_intc", .data = __cp_intc_init, },
> + { }
> +};
> +
> +void __init cp_intc_init(void)
> +{
> + of_irq_init(irq_match);
> +}
> +#else
> +void __init cp_intc_init(void)
> +{
> + __cp_intc_init(NULL, NULL);
> }
> +#endif
Nack on this hunk because it means you have either a DT kernel or a
non-DT kernel. Turning on CONFIG_OF must not break booting on a
non-DT platform. This is a policy decision to improve test coverage.
Instead the init hook should check at runtime if a DT is available,
and if it is call of_irq_init. Otherwise call __cp_initc_init()
directly.
g.
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 1/7] ARM: davinci, intc: Add OF support for TI interrupt controller
2012-05-26 1:05 ` Grant Likely
@ 2012-05-29 13:07 ` Heiko Schocher
-1 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-05-29 13:07 UTC (permalink / raw)
To: Grant Likely
Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/,
Wolfgang Denk, Sergei Shtylyov,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ, Sekhar Nori,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Hello Grant,
Am 26.05.2012 03:05, schrieb Grant Likely:
> On Mon, 5 Mar 2012 12:09:58 +0100, Heiko Schocher<hs-ynQEQJNshbs@public.gmane.org> wrote:
>> Add a function to initialize the Common Platform Interrupt Controller
>> (cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.
>>
>> Signed-off-by: Heiko Schocher<hs-ynQEQJNshbs@public.gmane.org>
>> Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
>> Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
>> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
>> Cc: Grant Likely<grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
>> Cc: Sekhar Nori<nsekhar-l0cyMroinI0@public.gmane.org>
>> Cc: Wolfgang Denk<wd-ynQEQJNshbs@public.gmane.org>
>> Cc: Sergei Shtylyov<sshtylyov-Igf4POYTYCDQT0dZR+AlfA@public.gmane.org>
>>
>> ---
>> - changes for v2:
>> - add comment from Grant Likely:
>> - migrate the whole interrupt controller to natively use an
>> irq_domain. Rebased complete patchserie to:
>> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>>
>> commit 3a806bfcde2cc3e4853f2807b2e3c94e7ccaf450
>> Author: Grant Likely<grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
>> Date: Fri Jan 27 06:44:34 2012 -0700
>>
>> irq_domain: mostly eliminate slow-path revmap lookups
>> - changes for v3:
>> - add comments from Sergei Shtylyov:
>> - rename compatible" prop to "ti,cp_intc"
>
> Nit: DT preference is to use '-' instead of '_'
fixed.
[...]
>> diff --git a/Documentation/devicetree/bindings/arm/davinci/intc.txt b/Documentation/devicetree/bindings/arm/davinci/intc.txt
>> new file mode 100644
>> index 0000000..dfd6a560
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/davinci/intc.txt
>> @@ -0,0 +1,27 @@
[...]
>> +- compatible : should be:
>> + "ti,cp_intc"
>> +- interrupt-controller : Identifies the node as an interrupt controller
>> +- #interrupt-cells : Specifies the number of cells needed to encode an
>> + interrupt source. The type shall be a<u32> and the value shall be 1.
>
> Is there any configuration for irq inputs (edge/level) or are they
> fixed mode? If configurable, then you'll want another cell for flags.
As I know, they are fixed...
[...]
>> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
>> index f83152d..585114a 100644
>> --- a/arch/arm/mach-davinci/cp_intc.c
>> +++ b/arch/arm/mach-davinci/cp_intc.c
>> @@ -9,9 +9,14 @@
[...]
>> + /* create a legacy host */
>> + cp_intc_domain = irq_domain_add_legacy(node, num_irq,
>> + irq_base, 0,&cp_intc_host_ops, NULL);
>> + if (cp_intc_domain == NULL) {
>> + pr_err("CP INTC: failed to allocate irq host!\n");
>> + return -EINVAL;
>> + }
>> + } else {
>> + /* Set up genirq dispatching for cp_intc */
>> + for (i = 0; i< num_irq; i++) {
>> + irq_set_chip(i,&cp_intc_irq_chip);
>> + set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
>> + irq_set_handler(i, handle_edge_irq);
>> + }
>
> Instead of the else clause here, even the non-DT mode should still
> call irq_domain_add. irq_domain is not just for DT. It gets the
> driver away from manually managing its irq mappings.
Ok, I try this.
>> /* Enable global interrupt */
>> cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
>> +
>> + return 0;
>> +}
>> +
>> +#ifdef CONFIG_OF
>> +static struct of_device_id irq_match[] __initdata = {
>> + { .compatible = "ti,cp_intc", .data = __cp_intc_init, },
>> + { }
>> +};
>> +
>> +void __init cp_intc_init(void)
>> +{
>> + of_irq_init(irq_match);
>> +}
>> +#else
>> +void __init cp_intc_init(void)
>> +{
>> + __cp_intc_init(NULL, NULL);
>> }
>> +#endif
>
> Nack on this hunk because it means you have either a DT kernel or a
> non-DT kernel. Turning on CONFIG_OF must not break booting on a
> non-DT platform. This is a policy decision to improve test coverage.
> Instead the init hook should check at runtime if a DT is available,
> and if it is call of_irq_init. Otherwise call __cp_initc_init()
> directly.
fixed in v4
Thanks for the review!
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 1/7] ARM: davinci, intc: Add OF support for TI interrupt controller
@ 2012-05-29 13:07 ` Heiko Schocher
0 siblings, 0 replies; 42+ messages in thread
From: Heiko Schocher @ 2012-05-29 13:07 UTC (permalink / raw)
To: linux-arm-kernel
Hello Grant,
Am 26.05.2012 03:05, schrieb Grant Likely:
> On Mon, 5 Mar 2012 12:09:58 +0100, Heiko Schocher<hs@denx.de> wrote:
>> Add a function to initialize the Common Platform Interrupt Controller
>> (cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.
>>
>> Signed-off-by: Heiko Schocher<hs@denx.de>
>> Cc: davinci-linux-open-source at linux.davincidsp.com
>> Cc: linux-arm-kernel at lists.infradead.org
>> Cc: devicetree-discuss at lists.ozlabs.org
>> Cc: Grant Likely<grant.likely@secretlab.ca>
>> Cc: Sekhar Nori<nsekhar@ti.com>
>> Cc: Wolfgang Denk<wd@denx.de>
>> Cc: Sergei Shtylyov<sshtylyov@mvista.com>
>>
>> ---
>> - changes for v2:
>> - add comment from Grant Likely:
>> - migrate the whole interrupt controller to natively use an
>> irq_domain. Rebased complete patchserie to:
>> git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
>>
>> commit 3a806bfcde2cc3e4853f2807b2e3c94e7ccaf450
>> Author: Grant Likely<grant.likely@secretlab.ca>
>> Date: Fri Jan 27 06:44:34 2012 -0700
>>
>> irq_domain: mostly eliminate slow-path revmap lookups
>> - changes for v3:
>> - add comments from Sergei Shtylyov:
>> - rename compatible" prop to "ti,cp_intc"
>
> Nit: DT preference is to use '-' instead of '_'
fixed.
[...]
>> diff --git a/Documentation/devicetree/bindings/arm/davinci/intc.txt b/Documentation/devicetree/bindings/arm/davinci/intc.txt
>> new file mode 100644
>> index 0000000..dfd6a560
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/davinci/intc.txt
>> @@ -0,0 +1,27 @@
[...]
>> +- compatible : should be:
>> + "ti,cp_intc"
>> +- interrupt-controller : Identifies the node as an interrupt controller
>> +- #interrupt-cells : Specifies the number of cells needed to encode an
>> + interrupt source. The type shall be a<u32> and the value shall be 1.
>
> Is there any configuration for irq inputs (edge/level) or are they
> fixed mode? If configurable, then you'll want another cell for flags.
As I know, they are fixed...
[...]
>> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
>> index f83152d..585114a 100644
>> --- a/arch/arm/mach-davinci/cp_intc.c
>> +++ b/arch/arm/mach-davinci/cp_intc.c
>> @@ -9,9 +9,14 @@
[...]
>> + /* create a legacy host */
>> + cp_intc_domain = irq_domain_add_legacy(node, num_irq,
>> + irq_base, 0,&cp_intc_host_ops, NULL);
>> + if (cp_intc_domain == NULL) {
>> + pr_err("CP INTC: failed to allocate irq host!\n");
>> + return -EINVAL;
>> + }
>> + } else {
>> + /* Set up genirq dispatching for cp_intc */
>> + for (i = 0; i< num_irq; i++) {
>> + irq_set_chip(i,&cp_intc_irq_chip);
>> + set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
>> + irq_set_handler(i, handle_edge_irq);
>> + }
>
> Instead of the else clause here, even the non-DT mode should still
> call irq_domain_add. irq_domain is not just for DT. It gets the
> driver away from manually managing its irq mappings.
Ok, I try this.
>> /* Enable global interrupt */
>> cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
>> +
>> + return 0;
>> +}
>> +
>> +#ifdef CONFIG_OF
>> +static struct of_device_id irq_match[] __initdata = {
>> + { .compatible = "ti,cp_intc", .data = __cp_intc_init, },
>> + { }
>> +};
>> +
>> +void __init cp_intc_init(void)
>> +{
>> + of_irq_init(irq_match);
>> +}
>> +#else
>> +void __init cp_intc_init(void)
>> +{
>> + __cp_intc_init(NULL, NULL);
>> }
>> +#endif
>
> Nack on this hunk because it means you have either a DT kernel or a
> non-DT kernel. Turning on CONFIG_OF must not break booting on a
> non-DT platform. This is a policy decision to improve test coverage.
> Instead the init hook should check at runtime if a DT is available,
> and if it is call of_irq_init. Otherwise call __cp_initc_init()
> directly.
fixed in v4
Thanks for the review!
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply [flat|nested] 42+ messages in thread
end of thread, other threads:[~2012-05-29 13:07 UTC | newest]
Thread overview: 42+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-03-05 11:09 [PATCH v3 0/7] ARM: davinci: add support for the am1808 based enbw_cmc board Heiko Schocher
2012-03-05 11:09 ` Heiko Schocher
2012-03-05 11:09 ` Heiko Schocher
2012-03-05 11:10 ` [PATCH v3 4/7] ARM: davinci: net: davinci_emac: add OF support Heiko Schocher
2012-03-05 11:10 ` Heiko Schocher
2012-05-15 18:08 ` Nori, Sekhar
2012-05-15 18:08 ` Nori, Sekhar
2012-05-17 6:32 ` Heiko Schocher
2012-05-17 6:32 ` Heiko Schocher
2012-05-17 7:21 ` Sekhar Nori
2012-05-17 7:21 ` Sekhar Nori
2012-05-17 7:21 ` Sekhar Nori
[not found] ` <1330945804-3379-1-git-send-email-hs-ynQEQJNshbs@public.gmane.org>
2012-03-05 11:09 ` [PATCH v3 1/7] ARM: davinci, intc: Add OF support for TI interrupt controller Heiko Schocher
2012-03-05 11:09 ` Heiko Schocher
[not found] ` <1330945804-3379-2-git-send-email-hs-ynQEQJNshbs@public.gmane.org>
2012-05-19 6:16 ` Grant Likely
2012-05-19 6:16 ` Grant Likely
2012-05-20 10:58 ` Sekhar Nori
2012-05-20 10:58 ` Sekhar Nori
2012-05-26 1:05 ` Grant Likely
2012-05-26 1:05 ` Grant Likely
2012-05-29 13:07 ` Heiko Schocher
2012-05-29 13:07 ` Heiko Schocher
2012-03-05 11:09 ` [PATCH v3 2/7] ARM: davinci: configure davinci aemif chipselects through OF Heiko Schocher
2012-03-05 11:09 ` Heiko Schocher
2012-03-05 11:10 ` [PATCH v3 3/7] ARM: davinci: mux: add OF support Heiko Schocher
2012-03-05 11:10 ` Heiko Schocher
2012-03-05 11:10 ` [PATCH v3 5/7] ARM: davinci: i2c: " Heiko Schocher
2012-03-05 11:10 ` Heiko Schocher
2012-03-05 11:10 ` [PATCH v3 6/7] ARM: mtd: nand: davinci: add OF support for davinci nand controller Heiko Schocher
2012-03-05 11:10 ` Heiko Schocher
2012-03-05 11:10 ` Heiko Schocher
2012-03-05 11:10 ` [PATCH v3 7/7] ARM: davinci: add support for the am1808 based enbw_cmc board Heiko Schocher
2012-03-05 11:10 ` Heiko Schocher
2012-03-05 11:10 ` Heiko Schocher
2012-05-04 15:33 ` [PATCH v3 0/7] " Heiko Schocher
2012-05-04 15:33 ` Heiko Schocher
2012-05-04 15:33 ` Heiko Schocher
2012-05-04 15:33 ` Heiko Schocher
[not found] ` <4FA3F6C2.9010602-ynQEQJNshbs@public.gmane.org>
2012-05-04 18:36 ` Sekhar Nori
2012-05-04 18:36 ` Sekhar Nori
2012-05-04 18:36 ` Sekhar Nori
2012-05-04 18:36 ` Sekhar Nori
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