[Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Andreas Färber]

Hello,

Based on my CPUState patches for 1.1 (qom-cpu-1.1) this series kills off the
cpu_state_reset() function, which had been renamed as an interim solution
to free the identifier "cpu_reset" for QOM.

The interested observer may note that the earlier sh4 SH7750 patches (that
have been deferred due to time constraints for 1.1) were a test run and
serve as template for propagating xxxCPU throughout the code base:

(i) In target-specific code, accessing CPUxxxState* is a cheap pointer
dereference from xxxCPU (&cpu->env), so xxxCPU should be preferred for any
static helper functions and QOM/qdev state structs because fields in CPUState
and in xxxCPU will increase over time. In state structs this also paves
the way for QOM child<> or link<> properties.

(ii) In TCG helpers, the target's xxxCPU can be obtained via xxx_env_get_cpu().
Be aware that this incurs one QOM cast.

(iii) In generic code, the base CPU can be obtained via ENV_GET_CPU() macro.
Note that this incurs two QOM casts, so local variables should be preferred
over repeated macro usage within a function.

(iv) In generic functions, only after all usages of env have been eliminated
can the argument be changed from CPUArchState to CPUState.

(v) Opaque xxxCPU* values are assigned directly to xxxCPU*, to save QOM casts;
to CPUState* via CPU() cast, in case the casting mechanism ever gets changed.

Historically, this series has been cherry-picked from a larger CPUState
refactoring (guess why) and reordered to group subsystems and to enforce
get, pass, use order.
I had checked v1 to compile on ...
* openSUSE 12.1 x86_64 w/KVM,
* openSUSE Factory ppc w/KVM (with the AREG0 #error suppressed),
* mingw32/64 cross-builds,
* OpenBSD 5.1 amd64.
Thus I'm confident that I got order, return types and local variables right;
changes to opaque values however (keyword "pass") should be reviewed carefully.
v2 fixes the changed cpu_init macros to return NULL if CPU init failed.

Again, target maintainers are requested to start queuing their patches on their
-next branches, where available, to avoid collisions.
I've been careful to verbosely document which change is for what; the targets
are not interdependent except for the final patch, neither is linux-user.
PReP patches depend on target-ppc, so should go through the ppc tree please.
Only target-mips actually depends on a 1.1 patch (the comment drop).

Some logical next steps that were not strictly necessary for cpu_reset() have
been deferred to part 4, including s390x and some more pxa2xx refactorings.

Available for testing and cherry-picking (not pulling!) from:
git://github.com/afaerber/qemu-cpu.git qom-cpu-reset.v2
https://github.com/afaerber/qemu-cpu/commits/qom-cpu-reset.v2

Regards,
Andreas

Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Igor Mammedov <imammedo@redhat.com>

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Alexander Graf <agraf@suse.de>
Cc: qemu-ppc <qemu-ppc@nongnu.org>
Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Riku Voipio <riku.voipio@iki.fi>

v1 -> v2:
* Handle cpu_xxx_init() failure gracefully by replacing the cpu_init() macros
  with static inline functions checking the return value. Reported by Peter.

Andreas Färber (74):
  target-arm: Use cpu_reset() in cpu_arm_init()
  target-mips: Use cpu_reset() in cpu_mips_init()
  target-i386: Pass X86CPU to do_cpu_{init,sipi}()
  target-i386: Let cpu_x86_init() return X86CPU
  pc: Use cpu_x86_init() to obtain X86CPU
  pc: Pass X86CPU to pc_cpu_reset()
  target-sparc: Let cpu_sparc_init() return SPARCCPU
  sun4m: Use cpu_sparc_init() to obtain SPARCCPU
  sun4m: Pass SPARCCPU to {main,secondary}_cpu_reset()
  sun4u: Use cpu_sparc_init() to obtain SPARCCPU
  sun4u: Let cpu_devinit() return SPARCCPU
  sun4u: Store SPARCCPU in ResetData
  leon3: Use cpu_sparc_init() to obtain SPARCCPU
  leon3: Store SPARCCPU in ResetData
  target-ppc: Let cpu_ppc_init() return PowerPCCPU
  ppce500_mpc8544ds: Pass PowerPCCPU to mpc8544ds_cpu_reset[_sec]
  spapr: Use cpu_ppc_init() to obtain PowerPCCPU
  spapr: Pass PowerPCCPU to spapr_cpu_reset()
  ppc440_bamboo: Use cpu_ppc_init() to obtain PowerPCCPU
  ppc440_bamboo: Pass PowerPCCPU to main_cpu_reset()
  ppc4xx_devs: Use cpu_ppc_init() to obtain PowerPCCPU
  ppc4xx_devs: Pass PowerPCCPU to ppc4xx_reset()
  ppc_newworld: Use cpu_ppc_init() to obtain PowerPCCPU
  ppc_newworld: Pass PowerPCCPU to ppc_core99_reset()
  ppc_oldworld: Use cpu_ppc_init() to obtain PowerPCCPU
  ppc_oldworld: Pass PowerPCCPU to ppc_heathrow_reset()
  ppc_prep: Use cpu_ppc_init() to obtain PowerPCCPU
  ppc_prep: Pass PowerPCCPU to ppc_prep_reset()
  virtex_ml507: Use cpu_ppc_init() to obtain PowerPCCPU
  virtex_ml507: Let ppc440_init_xilinx() return PowerPCCPU
  virtex_ml507: Pass PowerPCCPU to main_cpu_reset()
  cpu-exec: Use cpu_reset() in cpu_exec() for TARGET_PPC
  pxa2xx: Use cpu_arm_init() and store ARMCPU
  omap: Use cpu_arm_init() to store ARMCPU in omap_mpu_state_s
  armv7m: Use cpu_arm_init() to obtain ARMCPU
  armv7m: Pass ARMCPU to armv7m_reset()
  arm_boot: Pass ARMCPU to do_cpu_reset()
  target-sh4: Let cpu_sh4_init() return SuperHCPU
  r2d: Use cpu_sh4_init() to obtain SuperHCPU
  r2d: Store SuperHCPU in ResetData
  target-lm32: Let cpu_lm32_init() return LM32CPU
  lm32_boards: Use cpu_lm32_init() to obtain LM32CPU
  lm32_boards: Store LM32CPU in ResetInfo
  milkymist: Use cpu_lm32_init() to obtain LM32CPU
  milkymist: Store LM32 in ResetInfo
  target-xtensa: Let cpu_xtensa_init() return XtensaCPU
  xtensa_sim: Use cpu_xtensa_init() to obtain XtensaCPU
  xtensa_sim: Pass XtensaCPU to sim_reset()
  xtensa_lx60: Use cpu_xtensa_init() to obtain XtensaCPU
  xtensa_lx60: Pass XtensaCPU to lx60_reset()
  target-cris: Reindent cpu_cris_init()
  target-cris: Let cpu_cris_init() return CRISCPU
  axis_dev88: Use cpu_cris_init() to obtain CRISCPU
  cris-boot: Pass CRISCPU to cris_load_image()
  cris-boot: Pass CRISCPU to main_cpu_reset().
  target-microblaze: Let cpu_mb_init() return MicroBlazeCPU
  petalogix_ml605: Use cpu_mb_init() to obtain MicroBlazeCPU
  petalogix_s3adsp1800_mmu: Use cpu_mb_init() to obtain MicroBlazeCPU
  microblaze_boot: Pass MicroBlazeCPU to microblaze_load_kernel()
  target-mips: Use cpu_reset() in do_interrupt()
  target-mips: Let cpu_mips_init() return MIPSCPU
  mips_fulong2e: Use cpu_mips_cpu() to obtain MIPSCPU
  mips_fulong2e: Pass MIPSCPU to main_cpu_reset()
  mips_jazz: Use cpu_mips_init() to obtain MIPSCPU
  mips_jazz: Pass MIPSCPU to main_cpu_reset()
  mips_malta: Use cpu_mips_init() to obtain MIPSCPU
  mips_malta: Pass MIPSCPU to main_cpu_reset()
  mips_mipssim: Use cpu_mips_init() to obtain MIPSCPU
  mips_mipssim: Store MIPSCPU in ResetData
  mips_r4k: Use cpu_mips_init() to obtain MIPSCPU
  mips_r4k: Store MIPSCPU in ResetData
  bsd-user: Use cpu_reset() in after cpu_init()
  linux-user: Use cpu_reset() after cpu_init() / cpu_copy()
  Kill off cpu_state_reset()

 bsd-user/main.c               |    2 +-
 cpu-all.h                     |    1 -
 cpu-exec.c                    |    9 ++-
 hw/arm_boot.c                 |    9 ++-
 hw/armv7m.c                   |   15 ++++--
 hw/axis_dev88.c               |    6 ++-
 hw/cris-boot.c                |   10 ++--
 hw/cris-boot.h                |    2 +-
 hw/leon3.c                    |   14 +++--
 hw/lm32_boards.c              |   18 ++++---
 hw/mainstone.c                |    2 +-
 hw/microblaze_boot.c          |   16 +++---
 hw/microblaze_boot.h          |    4 +-
 hw/milkymist.c                |   12 +++--
 hw/mips_fulong2e.c            |   13 +++--
 hw/mips_jazz.c                |   13 +++--
 hw/mips_malta.c               |   15 ++++--
 hw/mips_mipssim.c             |   15 +++--
 hw/mips_r4k.c                 |   15 +++--
 hw/nseries.c                  |    6 +-
 hw/omap.h                     |    2 +-
 hw/omap1.c                    |   20 ++++---
 hw/omap2.c                    |    8 ++--
 hw/omap_sx1.c                 |    2 +-
 hw/palm.c                     |    2 +-
 hw/pc.c                       |   19 ++++---
 hw/petalogix_ml605_mmu.c      |   10 +++-
 hw/petalogix_s3adsp1800_mmu.c |   10 +++-
 hw/ppc440_bamboo.c            |   13 +++--
 hw/ppc4xx_devs.c              |   13 +++--
 hw/ppc_newworld.c             |   13 +++--
 hw/ppc_oldworld.c             |   13 +++--
 hw/ppc_prep.c                 |   13 +++--
 hw/ppce500_mpc8544ds.c        |   21 +++++---
 hw/pxa.h                      |    2 +-
 hw/pxa2xx.c                   |   40 +++++++-------
 hw/r2d.c                      |   18 ++++---
 hw/spapr.c                    |   14 +++--
 hw/spitz.c                    |    2 +-
 hw/sun4m.c                    |   20 +++++---
 hw/sun4u.c                    |   25 ++++++----
 hw/tosa.c                     |    2 +-
 hw/virtex_ml507.c             |   27 ++++++----
 hw/xtensa_lx60.c              |   15 +++--
 hw/xtensa_sim.c               |   17 ++++--
 hw/z2.c                       |    2 +-
 linux-user/main.c             |    2 +-
 linux-user/syscall.c          |    2 +-
 target-arm/helper.c           |    7 +--
 target-cris/cpu.h             |   12 ++++-
 target-cris/translate.c       |  110 ++++++++++++++++++++---------------------
 target-i386/cpu.h             |   16 +++++--
 target-i386/helper.c          |   23 ++++-----
 target-i386/kvm.c             |    6 ++-
 target-lm32/cpu.c             |    2 +-
 target-lm32/cpu.h             |   12 ++++-
 target-lm32/helper.c          |   10 +---
 target-m68k/helper.c          |    5 --
 target-microblaze/cpu.h       |   12 ++++-
 target-microblaze/translate.c |   18 ++-----
 target-mips/cpu.h             |   15 +++++-
 target-mips/helper.c          |    3 +-
 target-mips/translate.c       |    6 +-
 target-ppc/cpu.h              |   12 ++++-
 target-ppc/helper.c           |    9 +---
 target-s390x/helper.c         |    9 +---
 target-sh4/cpu.h              |   12 ++++-
 target-sh4/translate.c        |    9 +---
 target-sparc/cpu.c            |    9 +---
 target-sparc/cpu.h            |   17 +++++-
 target-xtensa/cpu.c           |    2 +-
 target-xtensa/cpu.h           |   16 +++++-
 target-xtensa/helper.c        |    9 +---
 73 files changed, 516 insertions(+), 389 deletions(-)

-- 
1.7.7

[Qemu-devel] [PATCH next v2 01/74] target-arm: Use cpu_reset() in cpu_arm_init()

[Andreas Färber]

Commit 3c30dd5a68e9fee6af67cfd0d14ed7520820f36a (target-arm: Move reset
handling to arm_cpu_reset) QOM'ified CPU reset. Complete it by replacing
cpu_state_reset() with cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-arm/helper.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 7e1c2c0..06ebffc 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -80,7 +80,7 @@ ARMCPU *cpu_arm_init(const char *cpu_model)
         arm_translate_init();
     }
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
     if (arm_feature(env, ARM_FEATURE_NEON)) {
         gdb_register_coprocessor(env, vfp_gdb_get_reg, vfp_gdb_set_reg,
                                  51, "arm-neon.xml", 0);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 02/74] target-mips: Use cpu_reset() in cpu_mips_init()

[Andreas Färber]

Commit 0f71a7095db6bc055bc5bb520d85ea650cca8a33 (target-mips: QOM'ify
CPU) hooked up cpu_state_reset() to CPUClass::reset(). Dropping the
introduction of subclasses for 1.1, due to mips_def_t the reset code
could not be QOM'ified yet, i.e. cpu_state_reset() will not forward to
CPUClass::reset().

Update cpu_mips_init() with cpu_reset() nontheless, indirectly calling
cpu_state_reset(), so that generic code can be converted to call
cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-mips/translate.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index f5297b0..58e044b 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12709,7 +12709,7 @@ CPUMIPSState *cpu_mips_init (const char *cpu_model)
     fpu_init(env, def);
     mvp_init(env, def);
     mips_tcg_init();
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
     qemu_init_vcpu(env);
     return env;
 }
-- 
1.7.7

[PATCH next v2 03/74] target-i386: Pass X86CPU to do_cpu_{init,sipi}()

[Andreas Färber]

Allows to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpu-exec.c           |    4 ++--
 target-i386/cpu.h    |    4 ++--
 target-i386/helper.c |   13 ++++++++-----
 target-i386/kvm.c    |    6 ++++--
 4 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/cpu-exec.c b/cpu-exec.c
index 0344cd5..fbb39cb 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -287,11 +287,11 @@ int cpu_exec(CPUArchState *env)
 #if defined(TARGET_I386)
                     if (interrupt_request & CPU_INTERRUPT_INIT) {
                             svm_check_intercept(env, SVM_EXIT_INIT);
-                            do_cpu_init(env);
+                            do_cpu_init(x86_env_get_cpu(env));
                             env->exception_index = EXCP_HALTED;
                             cpu_loop_exit(env);
                     } else if (interrupt_request & CPU_INTERRUPT_SIPI) {
-                            do_cpu_sipi(env);
+                            do_cpu_sipi(x86_env_get_cpu(env));
                     } else if (env->hflags2 & HF2_GIF_MASK) {
                         if ((interrupt_request & CPU_INTERRUPT_SMI) &&
                             !(env->hflags & HF_SMM_MASK)) {
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index b5b9a50..4bff61d 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1051,8 +1051,8 @@ static inline void cpu_get_tb_cpu_state(CPUX86State *env, target_ulong *pc,
         (env->eflags & (IOPL_MASK | TF_MASK | RF_MASK | VM_MASK));
 }
 
-void do_cpu_init(CPUX86State *env);
-void do_cpu_sipi(CPUX86State *env);
+void do_cpu_init(X86CPU *cpu);
+void do_cpu_sipi(X86CPU *cpu);
 
 #define MCE_INJECT_BROADCAST    1
 #define MCE_INJECT_UNCOND_AO    2
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 0b22582..fe181be 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1187,27 +1187,30 @@ CPUX86State *cpu_x86_init(const char *cpu_model)
 }
 
 #if !defined(CONFIG_USER_ONLY)
-void do_cpu_init(CPUX86State *env)
+void do_cpu_init(X86CPU *cpu)
 {
+    CPUX86State *env = &cpu->env;
     int sipi = env->interrupt_request & CPU_INTERRUPT_SIPI;
     uint64_t pat = env->pat;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
     env->interrupt_request = sipi;
     env->pat = pat;
     apic_init_reset(env->apic_state);
     env->halted = !cpu_is_bsp(env);
 }
 
-void do_cpu_sipi(CPUX86State *env)
+void do_cpu_sipi(X86CPU *cpu)
 {
+    CPUX86State *env = &cpu->env;
+
     apic_sipi(env->apic_state);
 }
 #else
-void do_cpu_init(CPUX86State *env)
+void do_cpu_init(X86CPU *cpu)
 {
 }
-void do_cpu_sipi(CPUX86State *env)
+void do_cpu_sipi(X86CPU *cpu)
 {
 }
 #endif
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index e74a9e4..0d0d8f6 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1698,6 +1698,8 @@ void kvm_arch_post_run(CPUX86State *env, struct kvm_run *run)
 
 int kvm_arch_process_async_events(CPUX86State *env)
 {
+    X86CPU *cpu = x86_env_get_cpu(env);
+
     if (env->interrupt_request & CPU_INTERRUPT_MCE) {
         /* We must not raise CPU_INTERRUPT_MCE if it's not supported. */
         assert(env->mcg_cap);
@@ -1732,11 +1734,11 @@ int kvm_arch_process_async_events(CPUX86State *env)
     }
     if (env->interrupt_request & CPU_INTERRUPT_INIT) {
         kvm_cpu_synchronize_state(env);
-        do_cpu_init(env);
+        do_cpu_init(cpu);
     }
     if (env->interrupt_request & CPU_INTERRUPT_SIPI) {
         kvm_cpu_synchronize_state(env);
-        do_cpu_sipi(env);
+        do_cpu_sipi(cpu);
     }
     if (env->interrupt_request & CPU_INTERRUPT_TPR) {
         env->interrupt_request &= ~CPU_INTERRUPT_TPR;
-- 
1.7.7

[Qemu-devel] [PATCH next v2 03/74] target-i386: Pass X86CPU to do_cpu_{init, sipi}()

[Andreas Färber]

Allows to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpu-exec.c           |    4 ++--
 target-i386/cpu.h    |    4 ++--
 target-i386/helper.c |   13 ++++++++-----
 target-i386/kvm.c    |    6 ++++--
 4 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/cpu-exec.c b/cpu-exec.c
index 0344cd5..fbb39cb 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -287,11 +287,11 @@ int cpu_exec(CPUArchState *env)
 #if defined(TARGET_I386)
                     if (interrupt_request & CPU_INTERRUPT_INIT) {
                             svm_check_intercept(env, SVM_EXIT_INIT);
-                            do_cpu_init(env);
+                            do_cpu_init(x86_env_get_cpu(env));
                             env->exception_index = EXCP_HALTED;
                             cpu_loop_exit(env);
                     } else if (interrupt_request & CPU_INTERRUPT_SIPI) {
-                            do_cpu_sipi(env);
+                            do_cpu_sipi(x86_env_get_cpu(env));
                     } else if (env->hflags2 & HF2_GIF_MASK) {
                         if ((interrupt_request & CPU_INTERRUPT_SMI) &&
                             !(env->hflags & HF_SMM_MASK)) {
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index b5b9a50..4bff61d 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1051,8 +1051,8 @@ static inline void cpu_get_tb_cpu_state(CPUX86State *env, target_ulong *pc,
         (env->eflags & (IOPL_MASK | TF_MASK | RF_MASK | VM_MASK));
 }
 
-void do_cpu_init(CPUX86State *env);
-void do_cpu_sipi(CPUX86State *env);
+void do_cpu_init(X86CPU *cpu);
+void do_cpu_sipi(X86CPU *cpu);
 
 #define MCE_INJECT_BROADCAST    1
 #define MCE_INJECT_UNCOND_AO    2
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 0b22582..fe181be 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1187,27 +1187,30 @@ CPUX86State *cpu_x86_init(const char *cpu_model)
 }
 
 #if !defined(CONFIG_USER_ONLY)
-void do_cpu_init(CPUX86State *env)
+void do_cpu_init(X86CPU *cpu)
 {
+    CPUX86State *env = &cpu->env;
     int sipi = env->interrupt_request & CPU_INTERRUPT_SIPI;
     uint64_t pat = env->pat;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
     env->interrupt_request = sipi;
     env->pat = pat;
     apic_init_reset(env->apic_state);
     env->halted = !cpu_is_bsp(env);
 }
 
-void do_cpu_sipi(CPUX86State *env)
+void do_cpu_sipi(X86CPU *cpu)
 {
+    CPUX86State *env = &cpu->env;
+
     apic_sipi(env->apic_state);
 }
 #else
-void do_cpu_init(CPUX86State *env)
+void do_cpu_init(X86CPU *cpu)
 {
 }
-void do_cpu_sipi(CPUX86State *env)
+void do_cpu_sipi(X86CPU *cpu)
 {
 }
 #endif
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index e74a9e4..0d0d8f6 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1698,6 +1698,8 @@ void kvm_arch_post_run(CPUX86State *env, struct kvm_run *run)
 
 int kvm_arch_process_async_events(CPUX86State *env)
 {
+    X86CPU *cpu = x86_env_get_cpu(env);
+
     if (env->interrupt_request & CPU_INTERRUPT_MCE) {
         /* We must not raise CPU_INTERRUPT_MCE if it's not supported. */
         assert(env->mcg_cap);
@@ -1732,11 +1734,11 @@ int kvm_arch_process_async_events(CPUX86State *env)
     }
     if (env->interrupt_request & CPU_INTERRUPT_INIT) {
         kvm_cpu_synchronize_state(env);
-        do_cpu_init(env);
+        do_cpu_init(cpu);
     }
     if (env->interrupt_request & CPU_INTERRUPT_SIPI) {
         kvm_cpu_synchronize_state(env);
-        do_cpu_sipi(env);
+        do_cpu_sipi(cpu);
     }
     if (env->interrupt_request & CPU_INTERRUPT_TPR) {
         env->interrupt_request &= ~CPU_INTERRUPT_TPR;
-- 
1.7.7

[Qemu-devel] [PATCH next v2 04/74] target-i386: Let cpu_x86_init() return X86CPU

[Andreas Färber]

Turn cpu_init macro into a static inline function returning CPUX86State
for backwards compatibility.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-i386/cpu.h    |   12 ++++++++++--
 target-i386/helper.c |    4 ++--
 2 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 4bff61d..adc569c 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -785,7 +785,7 @@ typedef struct CPUX86State {
 
 #include "cpu-qom.h"
 
-CPUX86State *cpu_x86_init(const char *cpu_model);
+X86CPU *cpu_x86_init(const char *cpu_model);
 int cpu_x86_exec(CPUX86State *s);
 void x86_cpu_list (FILE *f, fprintf_function cpu_fprintf, const char *optarg);
 void x86_cpudef_setup(void);
@@ -958,7 +958,15 @@ uint64_t cpu_get_tsc(CPUX86State *env);
 #define TARGET_VIRT_ADDR_SPACE_BITS 32
 #endif
 
-#define cpu_init cpu_x86_init
+static inline CPUX86State *cpu_init(const char *cpu_model)
+{
+    X86CPU *cpu = cpu_x86_init(cpu_model);
+    if (cpu == NULL) {
+        return NULL;
+    }
+    return &cpu->env;
+}
+
 #define cpu_exec cpu_x86_exec
 #define cpu_gen_code cpu_x86_gen_code
 #define cpu_signal_handler cpu_x86_signal_handler
diff --git a/target-i386/helper.c b/target-i386/helper.c
index fe181be..4577cae 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1157,7 +1157,7 @@ int cpu_x86_get_descr_debug(CPUX86State *env, unsigned int selector,
     return 1;
 }
 
-CPUX86State *cpu_x86_init(const char *cpu_model)
+X86CPU *cpu_x86_init(const char *cpu_model)
 {
     X86CPU *cpu;
     CPUX86State *env;
@@ -1183,7 +1183,7 @@ CPUX86State *cpu_x86_init(const char *cpu_model)
 
     qemu_init_vcpu(env);
 
-    return env;
+    return cpu;
 }
 
 #if !defined(CONFIG_USER_ONLY)
-- 
1.7.7

[Qemu-devel] [PATCH next v2 05/74] pc: Use cpu_x86_init() to obtain X86CPU

[Andreas Färber]

Needed for pc_cpu_reset().

Also change return type to X86CPU.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/pc.c |   10 ++++++----
 1 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index 4d34a33..4715f7a 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -940,21 +940,23 @@ static void pc_cpu_reset(void *opaque)
     env->halted = !cpu_is_bsp(env);
 }
 
-static CPUX86State *pc_new_cpu(const char *cpu_model)
+static X86CPU *pc_new_cpu(const char *cpu_model)
 {
+    X86CPU *cpu;
     CPUX86State *env;
 
-    env = cpu_init(cpu_model);
-    if (!env) {
+    cpu = cpu_x86_init(cpu_model);
+    if (cpu == NULL) {
         fprintf(stderr, "Unable to find x86 CPU definition\n");
         exit(1);
     }
+    env = &cpu->env;
     if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
         env->apic_state = apic_init(env, env->cpuid_apic_id);
     }
     qemu_register_reset(pc_cpu_reset, env);
     pc_cpu_reset(env);
-    return env;
+    return cpu;
 }
 
 void pc_cpus_init(const char *cpu_model)
-- 
1.7.7

[Qemu-devel] [PATCH next v2 06/74] pc: Pass X86CPU to pc_cpu_reset()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/pc.c |    9 +++++----
 1 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index 4715f7a..4167782 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -934,9 +934,10 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
 
 static void pc_cpu_reset(void *opaque)
 {
-    CPUX86State *env = opaque;
+    X86CPU *cpu = opaque;
+    CPUX86State *env = &cpu->env;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
     env->halted = !cpu_is_bsp(env);
 }
 
@@ -954,8 +955,8 @@ static X86CPU *pc_new_cpu(const char *cpu_model)
     if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
         env->apic_state = apic_init(env, env->cpuid_apic_id);
     }
-    qemu_register_reset(pc_cpu_reset, env);
-    pc_cpu_reset(env);
+    qemu_register_reset(pc_cpu_reset, cpu);
+    pc_cpu_reset(cpu);
     return cpu;
 }
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 07/74] target-sparc: Let cpu_sparc_init() return SPARCCPU

[Andreas Färber]

Make include paths for cpu-qom.h consistent, so that SPARCCPU can be
used in cpu.h.

Turn cpu_init macro into a static inline function returning
CPUSPARCState for backwards compatibility.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-sparc/cpu.c |    4 ++--
 target-sparc/cpu.h |   17 ++++++++++++++---
 2 files changed, 16 insertions(+), 5 deletions(-)

diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index 7ac6bdb..8ccac23 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -111,7 +111,7 @@ static int cpu_sparc_register(CPUSPARCState *env, const char *cpu_model)
     return 0;
 }
 
-CPUSPARCState *cpu_sparc_init(const char *cpu_model)
+SPARCCPU *cpu_sparc_init(const char *cpu_model)
 {
     SPARCCPU *cpu;
     CPUSPARCState *env;
@@ -129,7 +129,7 @@ CPUSPARCState *cpu_sparc_init(const char *cpu_model)
     }
     qemu_init_vcpu(env);
 
-    return env;
+    return cpu;
 }
 
 void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu)
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 29c63c7..e16b7b3 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -511,9 +511,11 @@ struct CPUSPARCState {
     uint32_t cache_control;
 };
 
+#include "cpu-qom.h"
+
 #ifndef NO_CPU_IO_DEFS
 /* cpu_init.c */
-CPUSPARCState *cpu_sparc_init(const char *cpu_model);
+SPARCCPU *cpu_sparc_init(const char *cpu_model);
 void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu);
 void sparc_cpu_list(FILE *f, fprintf_function cpu_fprintf);
 /* mmu_helper.c */
@@ -590,7 +592,17 @@ target_phys_addr_t cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong ad
 #endif
 int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc);
 
-#define cpu_init cpu_sparc_init
+#ifndef NO_CPU_IO_DEFS
+static inline CPUSPARCState *cpu_init(const char *cpu_model)
+{
+    SPARCCPU *cpu = cpu_sparc_init(cpu_model);
+    if (cpu == NULL) {
+        return NULL;
+    }
+    return &cpu->env;
+}
+#endif
+
 #define cpu_exec cpu_sparc_exec
 #define cpu_gen_code cpu_sparc_gen_code
 #define cpu_signal_handler cpu_sparc_signal_handler
@@ -691,7 +703,6 @@ static inline void cpu_clone_regs(CPUSPARCState *env, target_ulong newsp)
 #endif
 
 #include "cpu-all.h"
-#include "cpu-qom.h"
 
 #ifdef TARGET_SPARC64
 /* sun4u.c */
-- 
1.7.7

[Qemu-devel] [PATCH next v2 08/74] sun4m: Use cpu_sparc_init() to obtain SPARCCPU

[Andreas Färber]

Needed for {main,secondary}_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/sun4m.c |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/sun4m.c b/hw/sun4m.c
index 34088ad..c5d2e40 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -809,13 +809,15 @@ static TypeInfo ram_info = {
 static void cpu_devinit(const char *cpu_model, unsigned int id,
                         uint64_t prom_addr, qemu_irq **cpu_irqs)
 {
+    SPARCCPU *cpu;
     CPUSPARCState *env;
 
-    env = cpu_init(cpu_model);
-    if (!env) {
+    cpu = cpu_sparc_init(cpu_model);
+    if (cpu == NULL) {
         fprintf(stderr, "qemu: Unable to find Sparc CPU definition\n");
         exit(1);
     }
+    env = &cpu->env;
 
     cpu_sparc_set_id(env, id);
     if (id == 0) {
-- 
1.7.7

[Qemu-devel] [PATCH next v2 09/74] sun4m: Pass SPARCCPU to {main, secondary}_cpu_reset()

[Andreas Färber]

We can now use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/sun4m.c |   14 ++++++++------
 1 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/hw/sun4m.c b/hw/sun4m.c
index c5d2e40..a959261 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -281,17 +281,19 @@ static void dummy_cpu_set_irq(void *opaque, int irq, int level)
 
 static void main_cpu_reset(void *opaque)
 {
-    CPUSPARCState *env = opaque;
+    SPARCCPU *cpu = opaque;
+    CPUSPARCState *env = &cpu->env;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
     env->halted = 0;
 }
 
 static void secondary_cpu_reset(void *opaque)
 {
-    CPUSPARCState *env = opaque;
+    SPARCCPU *cpu = opaque;
+    CPUSPARCState *env = &cpu->env;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
     env->halted = 1;
 }
 
@@ -821,9 +823,9 @@ static void cpu_devinit(const char *cpu_model, unsigned int id,
 
     cpu_sparc_set_id(env, id);
     if (id == 0) {
-        qemu_register_reset(main_cpu_reset, env);
+        qemu_register_reset(main_cpu_reset, cpu);
     } else {
-        qemu_register_reset(secondary_cpu_reset, env);
+        qemu_register_reset(secondary_cpu_reset, cpu);
         env->halted = 1;
     }
     *cpu_irqs = qemu_allocate_irqs(cpu_set_irq, env, MAX_PILS);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 10/74] sun4u: Use cpu_sparc_init() to obtain SPARCCPU

[Andreas Färber]

This prepares using it in sun4uv_init().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/sun4u.c |    9 ++++++---
 1 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/hw/sun4u.c b/hw/sun4u.c
index fe33138..8bb8557 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -746,6 +746,7 @@ static TypeInfo ram_info = {
 
 static CPUSPARCState *cpu_devinit(const char *cpu_model, const struct hwdef *hwdef)
 {
+    SPARCCPU *cpu;
     CPUSPARCState *env;
     ResetData *reset_info;
 
@@ -753,13 +754,15 @@ static CPUSPARCState *cpu_devinit(const char *cpu_model, const struct hwdef *hwd
     uint32_t  stick_frequency = 100*1000000;
     uint32_t hstick_frequency = 100*1000000;
 
-    if (!cpu_model)
+    if (cpu_model == NULL) {
         cpu_model = hwdef->default_cpu_model;
-    env = cpu_init(cpu_model);
-    if (!env) {
+    }
+    cpu = cpu_sparc_init(cpu_model);
+    if (cpu == NULL) {
         fprintf(stderr, "Unable to find Sparc CPU definition\n");
         exit(1);
     }
+    env = &cpu->env;
 
     env->tick = cpu_timer_create("tick", env, tick_irq,
                                   tick_frequency, TICK_NPT_MASK);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 11/74] sun4u: Let cpu_devinit() return SPARCCPU

[Andreas Färber]

Needed for main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/sun4u.c |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/hw/sun4u.c b/hw/sun4u.c
index 8bb8557..df1aada 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -744,7 +744,7 @@ static TypeInfo ram_info = {
     .class_init    = ram_class_init,
 };
 
-static CPUSPARCState *cpu_devinit(const char *cpu_model, const struct hwdef *hwdef)
+static SPARCCPU *cpu_devinit(const char *cpu_model, const struct hwdef *hwdef)
 {
     SPARCCPU *cpu;
     CPUSPARCState *env;
@@ -778,7 +778,7 @@ static CPUSPARCState *cpu_devinit(const char *cpu_model, const struct hwdef *hwd
     reset_info->prom_addr = hwdef->prom_addr;
     qemu_register_reset(main_cpu_reset, reset_info);
 
-    return env;
+    return cpu;
 }
 
 static void sun4uv_init(MemoryRegion *address_space_mem,
@@ -788,6 +788,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
                         const char *initrd_filename, const char *cpu_model,
                         const struct hwdef *hwdef)
 {
+    SPARCCPU *cpu;
     CPUSPARCState *env;
     M48t59State *nvram;
     unsigned int i;
@@ -800,7 +801,8 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
     void *fw_cfg;
 
     /* init CPUs */
-    env = cpu_devinit(cpu_model, hwdef);
+    cpu = cpu_devinit(cpu_model, hwdef);
+    env = &cpu->env;
 
     /* set up devices */
     ram_init(0, RAM_size);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 12/74] sun4u: Store SPARCCPU in ResetData

[Andreas Färber]

We can now use cpu_reset() in place of cpu_state_reset() in
main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/sun4u.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/sun4u.c b/hw/sun4u.c
index df1aada..feede80 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -334,7 +334,7 @@ static void cpu_set_ivec_irq(void *opaque, int irq, int level)
 }
 
 typedef struct ResetData {
-    CPUSPARCState *env;
+    SPARCCPU *cpu;
     uint64_t prom_addr;
 } ResetData;
 
@@ -387,10 +387,10 @@ static void cpu_timer_reset(CPUTimer *timer)
 static void main_cpu_reset(void *opaque)
 {
     ResetData *s = (ResetData *)opaque;
-    CPUSPARCState *env = s->env;
+    CPUSPARCState *env = &s->cpu->env;
     static unsigned int nr_resets;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(s->cpu));
 
     cpu_timer_reset(env->tick);
     cpu_timer_reset(env->stick);
@@ -774,7 +774,7 @@ static SPARCCPU *cpu_devinit(const char *cpu_model, const struct hwdef *hwdef)
                                     hstick_frequency, TICK_INT_DIS);
 
     reset_info = g_malloc0(sizeof(ResetData));
-    reset_info->env = env;
+    reset_info->cpu = cpu;
     reset_info->prom_addr = hwdef->prom_addr;
     qemu_register_reset(main_cpu_reset, reset_info);
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 13/74] leon3: Use cpu_sparc_init() to obtain SPARCCPU

[Andreas Färber]

Needed for main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/leon3.c |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/leon3.c b/hw/leon3.c
index 0a5ff16..8ffef83 100644
--- a/hw/leon3.c
+++ b/hw/leon3.c
@@ -101,6 +101,7 @@ static void leon3_generic_hw_init(ram_addr_t  ram_size,
                                   const char *initrd_filename,
                                   const char *cpu_model)
 {
+    SPARCCPU *cpu;
     CPUSPARCState   *env;
     MemoryRegion *address_space_mem = get_system_memory();
     MemoryRegion *ram = g_new(MemoryRegion, 1);
@@ -117,11 +118,12 @@ static void leon3_generic_hw_init(ram_addr_t  ram_size,
         cpu_model = "LEON3";
     }
 
-    env = cpu_init(cpu_model);
-    if (!env) {
+    cpu = cpu_sparc_init(cpu_model);
+    if (cpu == NULL) {
         fprintf(stderr, "qemu: Unable to find Sparc CPU definition\n");
         exit(1);
     }
+    env = &cpu->env;
 
     cpu_sparc_set_id(env, 0);
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 14/74] leon3: Store SPARCCPU in ResetData

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset() in
main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/leon3.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/leon3.c b/hw/leon3.c
index 8ffef83..878d3aa 100644
--- a/hw/leon3.c
+++ b/hw/leon3.c
@@ -42,16 +42,16 @@
 #define MAX_PILS 16
 
 typedef struct ResetData {
-    CPUSPARCState *env;
+    SPARCCPU *cpu;
     uint32_t  entry;            /* save kernel entry in case of reset */
 } ResetData;
 
 static void main_cpu_reset(void *opaque)
 {
     ResetData *s   = (ResetData *)opaque;
-    CPUSPARCState  *env = s->env;
+    CPUSPARCState  *env = &s->cpu->env;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(s->cpu));
 
     env->halted = 0;
     env->pc     = s->entry;
@@ -129,7 +129,7 @@ static void leon3_generic_hw_init(ram_addr_t  ram_size,
 
     /* Reset data */
     reset_info        = g_malloc0(sizeof(ResetData));
-    reset_info->env   = env;
+    reset_info->cpu   = cpu;
     qemu_register_reset(main_cpu_reset, reset_info);
 
     /* Allocate IRQ manager */
-- 
1.7.7

[Qemu-devel] [PATCH next v2 15/74] target-ppc: Let cpu_ppc_init() return PowerPCCPU

[Andreas Färber]

Adapt e500 mpc8544ds machine accordingly.

Turn cpu_init() into a static inline function returning CPUPPCState for
backwards compatibility.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/ppce500_mpc8544ds.c |    7 +++++--
 target-ppc/cpu.h       |   12 ++++++++++--
 target-ppc/helper.c    |    4 ++--
 3 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index f1dfbe1..88a2767 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -254,12 +254,15 @@ static void mpc8544ds_init(ram_addr_t ram_size,
     irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
     irqs[0] = g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
     for (i = 0; i < smp_cpus; i++) {
+        PowerPCCPU *cpu;
         qemu_irq *input;
-        env = cpu_ppc_init(cpu_model);
-        if (!env) {
+
+        cpu = cpu_ppc_init(cpu_model);
+        if (cpu == NULL) {
             fprintf(stderr, "Unable to initialize CPU!\n");
             exit(1);
         }
+        env = &cpu->env;
 
         if (!firstenv) {
             firstenv = env;
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 84c9674..77a2858 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1099,7 +1099,7 @@ struct mmu_ctx_t {
 #include "cpu-qom.h"
 
 /*****************************************************************************/
-CPUPPCState *cpu_ppc_init (const char *cpu_model);
+PowerPCCPU *cpu_ppc_init(const char *cpu_model);
 void ppc_translate_init(void);
 int cpu_ppc_exec (CPUPPCState *s);
 /* you can call this signal handler from your SIGBUS and SIGSEGV
@@ -1214,7 +1214,15 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn)
 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp);
 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val);
 
-#define cpu_init cpu_ppc_init
+static inline CPUPPCState *cpu_init(const char *cpu_model)
+{
+    PowerPCCPU *cpu = cpu_ppc_init(cpu_model);
+    if (cpu == NULL) {
+        return NULL;
+    }
+    return &cpu->env;
+}
+
 #define cpu_exec cpu_ppc_exec
 #define cpu_gen_code cpu_ppc_gen_code
 #define cpu_signal_handler cpu_ppc_signal_handler
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index e97e496..42f66e8 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -3191,7 +3191,7 @@ void cpu_state_reset(CPUPPCState *env)
     cpu_reset(ENV_GET_CPU(env));
 }
 
-CPUPPCState *cpu_ppc_init (const char *cpu_model)
+PowerPCCPU *cpu_ppc_init(const char *cpu_model)
 {
     PowerPCCPU *cpu;
     CPUPPCState *env;
@@ -3213,5 +3213,5 @@ CPUPPCState *cpu_ppc_init (const char *cpu_model)
 
     qemu_init_vcpu(env);
 
-    return env;
+    return cpu;
 }
-- 
1.7.7

[Qemu-devel] [PATCH next v2 16/74] ppce500_mpc8544ds: Pass PowerPCCPU to mpc8544ds_cpu_reset[_sec]

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/ppce500_mpc8544ds.c |   14 ++++++++------
 1 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 88a2767..3eb8a23 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -196,9 +196,10 @@ static void mmubooke_create_initial_mapping(CPUPPCState *env,
 
 static void mpc8544ds_cpu_reset_sec(void *opaque)
 {
-    CPUPPCState *env = opaque;
+    PowerPCCPU *cpu = opaque;
+    CPUPPCState *env = &cpu->env;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
 
     /* Secondary CPU starts in halted state for now. Needs to change when
        implementing non-kernel boot. */
@@ -208,10 +209,11 @@ static void mpc8544ds_cpu_reset_sec(void *opaque)
 
 static void mpc8544ds_cpu_reset(void *opaque)
 {
-    CPUPPCState *env = opaque;
+    PowerPCCPU *cpu = opaque;
+    CPUPPCState *env = &cpu->env;
     struct boot_info *bi = env->load_info;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
 
     /* Set initial guest state. */
     env->halted = 0;
@@ -281,11 +283,11 @@ static void mpc8544ds_init(ram_addr_t ram_size,
             /* Primary CPU */
             struct boot_info *boot_info;
             boot_info = g_malloc0(sizeof(struct boot_info));
-            qemu_register_reset(mpc8544ds_cpu_reset, env);
+            qemu_register_reset(mpc8544ds_cpu_reset, cpu);
             env->load_info = boot_info;
         } else {
             /* Secondary CPUs */
-            qemu_register_reset(mpc8544ds_cpu_reset_sec, env);
+            qemu_register_reset(mpc8544ds_cpu_reset_sec, cpu);
         }
     }
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 17/74] spapr: Use cpu_ppc_init() to obtain PowerPCCPU

[Andreas Färber]

Needed for spapr_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/spapr.c |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/hw/spapr.c b/hw/spapr.c
index cca20f9..2672330 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -518,6 +518,7 @@ static void ppc_spapr_init(ram_addr_t ram_size,
                            const char *initrd_filename,
                            const char *cpu_model)
 {
+    PowerPCCPU *cpu;
     CPUPPCState *env;
     int i;
     MemoryRegion *sysmem = get_system_memory();
@@ -560,12 +561,13 @@ static void ppc_spapr_init(ram_addr_t ram_size,
         cpu_model = kvm_enabled() ? "host" : "POWER7";
     }
     for (i = 0; i < smp_cpus; i++) {
-        env = cpu_init(cpu_model);
-
-        if (!env) {
+        cpu = cpu_ppc_init(cpu_model);
+        if (cpu == NULL) {
             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
             exit(1);
         }
+        env = &cpu->env;
+
         /* Set time-base frequency to 512 MHz */
         cpu_ppc_tb_init(env, TIMEBASE_FREQ);
         qemu_register_reset(spapr_cpu_reset, env);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 18/74] spapr: Pass PowerPCCPU to spapr_cpu_reset()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/spapr.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/spapr.c b/hw/spapr.c
index 2672330..d0bddbc 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -505,9 +505,9 @@ static void spapr_reset(void *opaque)
 
 static void spapr_cpu_reset(void *opaque)
 {
-    CPUPPCState *env = opaque;
+    PowerPCCPU *cpu = opaque;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
 }
 
 /* pSeries LPAR / sPAPR hardware init */
@@ -570,7 +570,7 @@ static void ppc_spapr_init(ram_addr_t ram_size,
 
         /* Set time-base frequency to 512 MHz */
         cpu_ppc_tb_init(env, TIMEBASE_FREQ);
-        qemu_register_reset(spapr_cpu_reset, env);
+        qemu_register_reset(spapr_cpu_reset, cpu);
 
         env->hreset_vector = 0x60;
         env->hreset_excp_prefix = 0;
-- 
1.7.7

[Qemu-devel] [PATCH next v2 19/74] ppc440_bamboo: Use cpu_ppc_init() to obtain PowerPCCPU

[Andreas Färber]

Needed for main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/ppc440_bamboo.c |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/ppc440_bamboo.c b/hw/ppc440_bamboo.c
index f0a3ae4..1a4e66a 100644
--- a/hw/ppc440_bamboo.c
+++ b/hw/ppc440_bamboo.c
@@ -172,6 +172,7 @@ static void bamboo_init(ram_addr_t ram_size,
     qemu_irq *pic;
     qemu_irq *irqs;
     PCIBus *pcibus;
+    PowerPCCPU *cpu;
     CPUPPCState *env;
     uint64_t elf_entry;
     uint64_t elf_lowaddr;
@@ -185,11 +186,12 @@ static void bamboo_init(ram_addr_t ram_size,
     if (cpu_model == NULL) {
         cpu_model = "440EP";
     }
-    env = cpu_init(cpu_model);
-    if (!env) {
+    cpu = cpu_ppc_init(cpu_model);
+    if (cpu == NULL) {
         fprintf(stderr, "Unable to initialize CPU!\n");
         exit(1);
     }
+    env = &cpu->env;
 
     qemu_register_reset(main_cpu_reset, env);
     ppc_booke_timers_init(env, 400000000, 0);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 20/74] ppc440_bamboo: Pass PowerPCCPU to main_cpu_reset()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/ppc440_bamboo.c |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/hw/ppc440_bamboo.c b/hw/ppc440_bamboo.c
index 1a4e66a..0dd4dab 100644
--- a/hw/ppc440_bamboo.c
+++ b/hw/ppc440_bamboo.c
@@ -145,9 +145,10 @@ static void mmubooke_create_initial_mapping(CPUPPCState *env,
 
 static void main_cpu_reset(void *opaque)
 {
-    CPUPPCState *env = opaque;
+    PowerPCCPU *cpu = opaque;
+    CPUPPCState *env = &cpu->env;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
     env->gpr[1] = (16<<20) - 8;
     env->gpr[3] = FDT_ADDR;
     env->nip = entry;
@@ -193,7 +194,7 @@ static void bamboo_init(ram_addr_t ram_size,
     }
     env = &cpu->env;
 
-    qemu_register_reset(main_cpu_reset, env);
+    qemu_register_reset(main_cpu_reset, cpu);
     ppc_booke_timers_init(env, 400000000, 0);
     ppc_dcr_init(env, NULL, NULL);
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 21/74] ppc4xx_devs: Use cpu_ppc_init() to obtain PowerPCCPU

[Andreas Färber]

Needed for ppc4xx_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/ppc4xx_devs.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/hw/ppc4xx_devs.c b/hw/ppc4xx_devs.c
index 00e36f4..4cefd75 100644
--- a/hw/ppc4xx_devs.c
+++ b/hw/ppc4xx_devs.c
@@ -51,15 +51,18 @@ CPUPPCState *ppc4xx_init (const char *cpu_model,
                        clk_setup_t *cpu_clk, clk_setup_t *tb_clk,
                        uint32_t sysclk)
 {
+    PowerPCCPU *cpu;
     CPUPPCState *env;
 
     /* init CPUs */
-    env = cpu_init(cpu_model);
-    if (!env) {
+    cpu = cpu_ppc_init(cpu_model);
+    if (cpu == NULL) {
         fprintf(stderr, "Unable to find PowerPC %s CPU definition\n",
                 cpu_model);
         exit(1);
     }
+    env = &cpu->env;
+
     cpu_clk->cb = NULL; /* We don't care about CPU clock frequency changes */
     cpu_clk->opaque = env;
     /* Set time-base frequency to sysclk */
-- 
1.7.7

[Qemu-devel] [PATCH next v2 22/74] ppc4xx_devs: Pass PowerPCCPU to ppc4xx_reset()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/ppc4xx_devs.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/ppc4xx_devs.c b/hw/ppc4xx_devs.c
index 4cefd75..41163e6 100644
--- a/hw/ppc4xx_devs.c
+++ b/hw/ppc4xx_devs.c
@@ -40,9 +40,9 @@
 
 static void ppc4xx_reset(void *opaque)
 {
-    CPUPPCState *env = opaque;
+    PowerPCCPU *cpu = opaque;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
 }
 
 /*****************************************************************************/
@@ -70,7 +70,7 @@ CPUPPCState *ppc4xx_init (const char *cpu_model,
     tb_clk->opaque = env;
     ppc_dcr_init(env, NULL, NULL);
     /* Register qemu callbacks */
-    qemu_register_reset(ppc4xx_reset, env);
+    qemu_register_reset(ppc4xx_reset, cpu);
 
     return env;
 }
-- 
1.7.7

[Qemu-devel] [PATCH next v2 23/74] ppc_newworld: Use cpu_ppc_init() to obtain PowerPCCPU

[Andreas Färber]

Needed for ppc_core99_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/ppc_newworld.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/hw/ppc_newworld.c b/hw/ppc_newworld.c
index 8796510..6f7f1b5 100644
--- a/hw/ppc_newworld.c
+++ b/hw/ppc_newworld.c
@@ -136,6 +136,7 @@ static void ppc_core99_init (ram_addr_t ram_size,
                              const char *initrd_filename,
                              const char *cpu_model)
 {
+    PowerPCCPU *cpu = NULL;
     CPUPPCState *env = NULL;
     char *filename;
     qemu_irq *pic, **openpic_irqs;
@@ -166,11 +167,13 @@ static void ppc_core99_init (ram_addr_t ram_size,
         cpu_model = "G4";
 #endif
     for (i = 0; i < smp_cpus; i++) {
-        env = cpu_init(cpu_model);
-        if (!env) {
+        cpu = cpu_ppc_init(cpu_model);
+        if (cpu == NULL) {
             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
             exit(1);
         }
+        env = &cpu->env;
+
         /* Set time-base frequency to 100 Mhz */
         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
         qemu_register_reset(ppc_core99_reset, env);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 24/74] ppc_newworld: Pass PowerPCCPU to ppc_core99_reset()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/ppc_newworld.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/ppc_newworld.c b/hw/ppc_newworld.c
index 6f7f1b5..4e2a6e6 100644
--- a/hw/ppc_newworld.c
+++ b/hw/ppc_newworld.c
@@ -123,9 +123,9 @@ static target_phys_addr_t round_page(target_phys_addr_t addr)
 
 static void ppc_core99_reset(void *opaque)
 {
-    CPUPPCState *env = opaque;
+    PowerPCCPU *cpu = opaque;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
 }
 
 /* PowerPC Mac99 hardware initialisation */
@@ -176,7 +176,7 @@ static void ppc_core99_init (ram_addr_t ram_size,
 
         /* Set time-base frequency to 100 Mhz */
         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
-        qemu_register_reset(ppc_core99_reset, env);
+        qemu_register_reset(ppc_core99_reset, cpu);
     }
 
     /* allocate RAM */
-- 
1.7.7

[Qemu-devel] [PATCH next v2 25/74] ppc_oldworld: Use cpu_ppc_init() to obtain PowerPCCPU

[Andreas Färber]

Needed for ppc_heathrow_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/ppc_oldworld.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/hw/ppc_oldworld.c b/hw/ppc_oldworld.c
index 7e73d37..ba8f3ad 100644
--- a/hw/ppc_oldworld.c
+++ b/hw/ppc_oldworld.c
@@ -80,6 +80,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
                                const char *cpu_model)
 {
     MemoryRegion *sysmem = get_system_memory();
+    PowerPCCPU *cpu = NULL;
     CPUPPCState *env = NULL;
     char *filename;
     qemu_irq *pic, **heathrow_irqs;
@@ -104,11 +105,13 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
     if (cpu_model == NULL)
         cpu_model = "G3";
     for (i = 0; i < smp_cpus; i++) {
-        env = cpu_init(cpu_model);
-        if (!env) {
+        cpu = cpu_ppc_init(cpu_model);
+        if (cpu == NULL) {
             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
             exit(1);
         }
+        env = &cpu->env;
+
         /* Set time-base frequency to 16.6 Mhz */
         cpu_ppc_tb_init(env,  16600000UL);
         qemu_register_reset(ppc_heathrow_reset, env);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 26/74] ppc_oldworld: Pass PowerPCCPU to ppc_heathrow_reset()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/ppc_oldworld.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/ppc_oldworld.c b/hw/ppc_oldworld.c
index ba8f3ad..f2c6908 100644
--- a/hw/ppc_oldworld.c
+++ b/hw/ppc_oldworld.c
@@ -67,9 +67,9 @@ static target_phys_addr_t round_page(target_phys_addr_t addr)
 
 static void ppc_heathrow_reset(void *opaque)
 {
-    CPUPPCState *env = opaque;
+    PowerPCCPU *cpu = opaque;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
 }
 
 static void ppc_heathrow_init (ram_addr_t ram_size,
@@ -114,7 +114,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
 
         /* Set time-base frequency to 16.6 Mhz */
         cpu_ppc_tb_init(env,  16600000UL);
-        qemu_register_reset(ppc_heathrow_reset, env);
+        qemu_register_reset(ppc_heathrow_reset, cpu);
     }
 
     /* allocate RAM */
-- 
1.7.7

[Qemu-devel] [PATCH next v2 27/74] ppc_prep: Use cpu_ppc_init() to obtain PowerPCCPU

[Andreas Färber]

Needed for ppc_prep_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/ppc_prep.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index b1da114..0b880a5 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -455,6 +455,7 @@ static void ppc_prep_init (ram_addr_t ram_size,
                            const char *cpu_model)
 {
     MemoryRegion *sysmem = get_system_memory();
+    PowerPCCPU *cpu = NULL;
     CPUPPCState *env = NULL;
     char *filename;
     nvram_t nvram;
@@ -487,11 +488,13 @@ static void ppc_prep_init (ram_addr_t ram_size,
     if (cpu_model == NULL)
         cpu_model = "602";
     for (i = 0; i < smp_cpus; i++) {
-        env = cpu_init(cpu_model);
-        if (!env) {
+        cpu = cpu_ppc_init(cpu_model);
+        if (cpu == NULL) {
             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
             exit(1);
         }
+        env = &cpu->env;
+
         if (env->flags & POWERPC_FLAG_RTC_CLK) {
             /* POWER / PowerPC 601 RTC clock frequency is 7.8125 MHz */
             cpu_ppc_tb_init(env, 7812500UL);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 28/74] ppc_prep: Pass PowerPCCPU to ppc_prep_reset()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/ppc_prep.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 0b880a5..be2b268 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -441,9 +441,9 @@ static void cpu_request_exit(void *opaque, int irq, int level)
 
 static void ppc_prep_reset(void *opaque)
 {
-    CPUPPCState *env = opaque;
+    PowerPCCPU *cpu = opaque;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
 }
 
 /* PowerPC PREP hardware initialisation */
@@ -502,7 +502,7 @@ static void ppc_prep_init (ram_addr_t ram_size,
             /* Set time-base frequency to 100 Mhz */
             cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
         }
-        qemu_register_reset(ppc_prep_reset, env);
+        qemu_register_reset(ppc_prep_reset, cpu);
     }
 
     /* allocate RAM */
-- 
1.7.7

[Qemu-devel] [PATCH next v2 29/74] virtex_ml507: Use cpu_ppc_init() to obtain PowerPCCPU

[Andreas Färber]

Needed to change ppc440_init_xilinx() return type.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/virtex_ml507.c |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/virtex_ml507.c b/hw/virtex_ml507.c
index 4a133b5..3013016 100644
--- a/hw/virtex_ml507.c
+++ b/hw/virtex_ml507.c
@@ -83,14 +83,16 @@ static CPUPPCState *ppc440_init_xilinx(ram_addr_t *ram_size,
                                     const char *cpu_model,
                                     uint32_t sysclk)
 {
+    PowerPCCPU *cpu;
     CPUPPCState *env;
     qemu_irq *irqs;
 
-    env = cpu_init(cpu_model);
-    if (!env) {
+    cpu = cpu_ppc_init(cpu_model);
+    if (cpu == NULL) {
         fprintf(stderr, "Unable to initialize CPU!\n");
         exit(1);
     }
+    env = &cpu->env;
 
     ppc_booke_timers_init(env, sysclk, 0/* no flags */);
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 30/74] virtex_ml507: Let ppc440_init_xilinx() return PowerPCCPU

[Andreas Färber]

Needed for main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/virtex_ml507.c |   14 ++++++++------
 1 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/hw/virtex_ml507.c b/hw/virtex_ml507.c
index 3013016..0e223bd 100644
--- a/hw/virtex_ml507.c
+++ b/hw/virtex_ml507.c
@@ -78,10 +78,10 @@ static void mmubooke_create_initial_mapping(CPUPPCState *env,
     tlb->PID = 0;
 }
 
-static CPUPPCState *ppc440_init_xilinx(ram_addr_t *ram_size,
-                                    int do_init,
-                                    const char *cpu_model,
-                                    uint32_t sysclk)
+static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size,
+                                      int do_init,
+                                      const char *cpu_model,
+                                      uint32_t sysclk)
 {
     PowerPCCPU *cpu;
     CPUPPCState *env;
@@ -103,7 +103,7 @@ static CPUPPCState *ppc440_init_xilinx(ram_addr_t *ram_size,
     irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT];
     irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT];
     ppcuic_init(env, irqs, 0x0C0, 0, 1);
-    return env;
+    return cpu;
 }
 
 static void main_cpu_reset(void *opaque)
@@ -190,6 +190,7 @@ static void virtex_init(ram_addr_t ram_size,
 {
     MemoryRegion *address_space_mem = get_system_memory();
     DeviceState *dev;
+    PowerPCCPU *cpu;
     CPUPPCState *env;
     target_phys_addr_t ram_base = 0;
     DriveInfo *dinfo;
@@ -203,7 +204,8 @@ static void virtex_init(ram_addr_t ram_size,
         cpu_model = "440-Xilinx";
     }
 
-    env = ppc440_init_xilinx(&ram_size, 1, cpu_model, 400000000);
+    cpu = ppc440_init_xilinx(&ram_size, 1, cpu_model, 400000000);
+    env = &cpu->env;
     qemu_register_reset(main_cpu_reset, env);
 
     memory_region_init_ram(phys_ram, "ram", ram_size);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 31/74] virtex_ml507: Pass PowerPCCPU to main_cpu_reset()

[Andreas Färber]

Allows us to call cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/virtex_ml507.c |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/hw/virtex_ml507.c b/hw/virtex_ml507.c
index 0e223bd..cace86b 100644
--- a/hw/virtex_ml507.c
+++ b/hw/virtex_ml507.c
@@ -108,10 +108,11 @@ static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size,
 
 static void main_cpu_reset(void *opaque)
 {
-    CPUPPCState *env = opaque;
+    PowerPCCPU *cpu = opaque;
+    CPUPPCState *env = &cpu->env;
     struct boot_info *bi = env->load_info;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
     /* Linux Kernel Parameters (passing device tree):
        *   r3: pointer to the fdt
        *   r4: 0
@@ -206,7 +207,7 @@ static void virtex_init(ram_addr_t ram_size,
 
     cpu = ppc440_init_xilinx(&ram_size, 1, cpu_model, 400000000);
     env = &cpu->env;
-    qemu_register_reset(main_cpu_reset, env);
+    qemu_register_reset(main_cpu_reset, cpu);
 
     memory_region_init_ram(phys_ram, "ram", ram_size);
     vmstate_register_ram_global(phys_ram);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 32/74] cpu-exec: Use cpu_reset() in cpu_exec() for TARGET_PPC

[Andreas Färber]

CPUState will be needed for all targets in the future, so place it into
the main variable declaration block.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Alexander Graf <agraf@suse.de>
Cc: qemu-ppc <qemu-ppc@nongnu.org>
---
 cpu-exec.c |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/cpu-exec.c b/cpu-exec.c
index fbb39cb..83cac93 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -184,6 +184,9 @@ volatile sig_atomic_t exit_request;
 
 int cpu_exec(CPUArchState *env)
 {
+#ifdef TARGET_PPC
+    CPUState *cpu = ENV_GET_CPU(env);
+#endif
     int ret, interrupt_request;
     TranslationBlock *tb;
     uint8_t *tc_ptr;
@@ -341,7 +344,7 @@ int cpu_exec(CPUArchState *env)
                     }
 #elif defined(TARGET_PPC)
                     if ((interrupt_request & CPU_INTERRUPT_RESET)) {
-                        cpu_state_reset(env);
+                        cpu_reset(cpu);
                     }
                     if (interrupt_request & CPU_INTERRUPT_HARD) {
                         ppc_hw_interrupt(env);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 33/74] pxa2xx: Use cpu_arm_init() and store ARMCPU

[Andreas Färber]

Also use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/mainstone.c |    2 +-
 hw/pxa.h       |    2 +-
 hw/pxa2xx.c    |   40 ++++++++++++++++++++--------------------
 hw/spitz.c     |    2 +-
 hw/tosa.c      |    2 +-
 hw/z2.c        |    2 +-
 6 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/hw/mainstone.c b/hw/mainstone.c
index 27f5900..00a8adc 100644
--- a/hw/mainstone.c
+++ b/hw/mainstone.c
@@ -168,7 +168,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
     mainstone_binfo.kernel_cmdline = kernel_cmdline;
     mainstone_binfo.initrd_filename = initrd_filename;
     mainstone_binfo.board_id = arm_id;
-    arm_load_kernel(cpu->env, &mainstone_binfo);
+    arm_load_kernel(&cpu->cpu->env, &mainstone_binfo);
 }
 
 static void mainstone_init(ram_addr_t ram_size,
diff --git a/hw/pxa.h b/hw/pxa.h
index 025be34..2be006d 100644
--- a/hw/pxa.h
+++ b/hw/pxa.h
@@ -122,7 +122,7 @@ typedef struct PXA2xxI2SState PXA2xxI2SState;
 typedef struct PXA2xxFIrState PXA2xxFIrState;
 
 typedef struct {
-    CPUARMState *env;
+    ARMCPU *cpu;
     DeviceState *pic;
     qemu_irq reset;
     MemoryRegion sdram;
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index ddaa846..5f8f226 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -269,24 +269,24 @@ static void pxa2xx_clkpwr_write(void *opaque, int op2, int reg, int crm,
         case 1:
             /* Idle */
             if (!(s->cm_regs[CCCR >> 2] & (1 << 31))) {	/* CPDIS */
-                cpu_interrupt(s->env, CPU_INTERRUPT_HALT);
+                cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HALT);
                 break;
             }
             /* Fall through.  */
 
         case 2:
             /* Deep-Idle */
-            cpu_interrupt(s->env, CPU_INTERRUPT_HALT);
+            cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HALT);
             s->pm_regs[RCSR >> 2] |= 0x8;	/* Set GPR */
             goto message;
 
         case 3:
-            s->env->uncached_cpsr =
+            s->cpu->env.uncached_cpsr =
                     ARM_CPU_MODE_SVC | CPSR_A | CPSR_F | CPSR_I;
-            s->env->cp15.c1_sys = 0;
-            s->env->cp15.c1_coproc = 0;
-            s->env->cp15.c2_base0 = 0;
-            s->env->cp15.c3 = 0;
+            s->cpu->env.cp15.c1_sys = 0;
+            s->cpu->env.cp15.c1_coproc = 0;
+            s->cpu->env.cp15.c2_base0 = 0;
+            s->cpu->env.cp15.c3 = 0;
             s->pm_regs[PSSR >> 2] |= 0x8;	/* Set STS */
             s->pm_regs[RCSR >> 2] |= 0x8;	/* Set GPR */
 
@@ -296,8 +296,8 @@ static void pxa2xx_clkpwr_write(void *opaque, int op2, int reg, int crm,
              * lack of a resuming bootloader, perform a jump
              * directly to that address.
              */
-            memset(s->env->regs, 0, 4 * 15);
-            s->env->regs[15] = s->pm_regs[PSPR >> 2];
+            memset(s->cpu->env.regs, 0, 4 * 15);
+            s->cpu->env.regs[15] = s->pm_regs[PSPR >> 2];
 
 #if 0
             buffer = 0xe59ff000;	/* ldr     pc, [pc, #0] */
@@ -2044,7 +2044,7 @@ static void pxa2xx_reset(void *opaque, int line, int level)
     PXA2xxState *s = (PXA2xxState *) opaque;
 
     if (level && (s->pm_regs[PCFR >> 2] & 0x10)) {	/* GPR_EN */
-        cpu_state_reset(s->env);
+        cpu_reset(CPU(s->cpu));
         /* TODO: reset peripherals */
     }
 }
@@ -2065,8 +2065,8 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
     if (!revision)
         revision = "pxa270";
     
-    s->env = cpu_init(revision);
-    if (!s->env) {
+    s->cpu = cpu_arm_init(revision);
+    if (s->cpu == NULL) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
@@ -2081,7 +2081,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
     memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
                                 &s->internal);
 
-    s->pic = pxa2xx_pic_init(0x40d00000, s->env);
+    s->pic = pxa2xx_pic_init(0x40d00000, &s->cpu->env);
 
     s->dma = pxa27x_dma_init(0x40000000,
                     qdev_get_gpio_in(s->pic, PXA2XX_PIC_DMA));
@@ -2094,7 +2094,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
                     qdev_get_gpio_in(s->pic, PXA27X_PIC_OST_4_11),
                     NULL);
 
-    s->gpio = pxa2xx_gpio_init(0x40e00000, s->env, s->pic, 121);
+    s->gpio = pxa2xx_gpio_init(0x40e00000, &s->cpu->env, s->pic, 121);
 
     dinfo = drive_get(IF_SD, 0, 0);
     if (!dinfo) {
@@ -2133,7 +2133,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
     memory_region_add_subregion(address_space, s->cm_base, &s->cm_iomem);
     vmstate_register(NULL, 0, &vmstate_pxa2xx_cm, s);
 
-    cpu_arm_set_cp_io(s->env, 14, pxa2xx_cp14_read, pxa2xx_cp14_write, s);
+    cpu_arm_set_cp_io(&s->cpu->env, 14, pxa2xx_cp14_read, pxa2xx_cp14_write, s);
 
     s->mm_base = 0x48000000;
     s->mm_regs[MDMRS >> 2] = 0x00020002;
@@ -2196,8 +2196,8 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
 
     s = (PXA2xxState *) g_malloc0(sizeof(PXA2xxState));
 
-    s->env = cpu_init("pxa255");
-    if (!s->env) {
+    s->cpu = cpu_arm_init("pxa255");
+    if (s->cpu == NULL) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
@@ -2213,7 +2213,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
     memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
                                 &s->internal);
 
-    s->pic = pxa2xx_pic_init(0x40d00000, s->env);
+    s->pic = pxa2xx_pic_init(0x40d00000, &s->cpu->env);
 
     s->dma = pxa255_dma_init(0x40000000,
                     qdev_get_gpio_in(s->pic, PXA2XX_PIC_DMA));
@@ -2225,7 +2225,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
                     qdev_get_gpio_in(s->pic, PXA2XX_PIC_OST_0 + 3),
                     NULL);
 
-    s->gpio = pxa2xx_gpio_init(0x40e00000, s->env, s->pic, 85);
+    s->gpio = pxa2xx_gpio_init(0x40e00000, &s->cpu->env, s->pic, 85);
 
     dinfo = drive_get(IF_SD, 0, 0);
     if (!dinfo) {
@@ -2264,7 +2264,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
     memory_region_add_subregion(address_space, s->cm_base, &s->cm_iomem);
     vmstate_register(NULL, 0, &vmstate_pxa2xx_cm, s);
 
-    cpu_arm_set_cp_io(s->env, 14, pxa2xx_cp14_read, pxa2xx_cp14_write, s);
+    cpu_arm_set_cp_io(&s->cpu->env, 14, pxa2xx_cp14_read, pxa2xx_cp14_write, s);
 
     s->mm_base = 0x48000000;
     s->mm_regs[MDMRS >> 2] = 0x00020002;
diff --git a/hw/spitz.c b/hw/spitz.c
index 1d6d2b0..9042d44 100644
--- a/hw/spitz.c
+++ b/hw/spitz.c
@@ -932,7 +932,7 @@ static void spitz_common_init(ram_addr_t ram_size,
     spitz_binfo.kernel_cmdline = kernel_cmdline;
     spitz_binfo.initrd_filename = initrd_filename;
     spitz_binfo.board_id = arm_id;
-    arm_load_kernel(cpu->env, &spitz_binfo);
+    arm_load_kernel(&cpu->cpu->env, &spitz_binfo);
     sl_bootparam_write(SL_PXA_PARAM_BASE);
 }
 
diff --git a/hw/tosa.c b/hw/tosa.c
index 6baa17d..d1ede8d 100644
--- a/hw/tosa.c
+++ b/hw/tosa.c
@@ -242,7 +242,7 @@ static void tosa_init(ram_addr_t ram_size,
     tosa_binfo.kernel_cmdline = kernel_cmdline;
     tosa_binfo.initrd_filename = initrd_filename;
     tosa_binfo.board_id = 0x208;
-    arm_load_kernel(cpu->env, &tosa_binfo);
+    arm_load_kernel(&cpu->cpu->env, &tosa_binfo);
     sl_bootparam_write(SL_PXA_PARAM_BASE);
 }
 
diff --git a/hw/z2.c b/hw/z2.c
index 654ac55..9dd83ff 100644
--- a/hw/z2.c
+++ b/hw/z2.c
@@ -363,7 +363,7 @@ static void z2_init(ram_addr_t ram_size,
         z2_binfo.kernel_cmdline = kernel_cmdline;
         z2_binfo.initrd_filename = initrd_filename;
         z2_binfo.board_id = 0x6dd;
-        arm_load_kernel(cpu->env, &z2_binfo);
+        arm_load_kernel(&cpu->cpu->env, &z2_binfo);
     }
 }
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 34/74] omap: Use cpu_arm_init() to store ARMCPU in omap_mpu_state_s

[Andreas Färber]

Fix tab indentations of comments, add braces, use cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/nseries.c  |    6 +++---
 hw/omap.h     |    2 +-
 hw/omap1.c    |   20 +++++++++++---------
 hw/omap2.c    |    8 ++++----
 hw/omap_sx1.c |    2 +-
 hw/palm.c     |    2 +-
 6 files changed, 21 insertions(+), 19 deletions(-)

diff --git a/hw/nseries.c b/hw/nseries.c
index a5cfa8c..b8c6a29 100644
--- a/hw/nseries.c
+++ b/hw/nseries.c
@@ -1023,7 +1023,7 @@ static void n8x0_boot_init(void *opaque)
     n800_dss_init(&s->blizzard);
 
     /* CPU setup */
-    s->cpu->env->GE = 0x5;
+    s->cpu->cpu->env.GE = 0x5;
 
     /* If the machine has a slided keyboard, open it */
     if (s->kbd)
@@ -1329,7 +1329,7 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
         binfo->kernel_filename = kernel_filename;
         binfo->kernel_cmdline = kernel_cmdline;
         binfo->initrd_filename = initrd_filename;
-        arm_load_kernel(s->cpu->env, binfo);
+        arm_load_kernel(&s->cpu->cpu->env, binfo);
 
         qemu_register_reset(n8x0_boot_init, s);
     }
@@ -1338,7 +1338,7 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
         int rom_size;
         uint8_t nolo_tags[0x10000];
         /* No, wait, better start at the ROM.  */
-        s->cpu->env->regs[15] = OMAP2_Q2_BASE + 0x400000;
+        s->cpu->cpu->env.regs[15] = OMAP2_Q2_BASE + 0x400000;
 
         /* This is intended for loading the `secondary.bin' program from
          * Nokia images (the NOLO bootloader).  The entry point seems
diff --git a/hw/omap.h b/hw/omap.h
index 6c3d004..2819e5d 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -804,7 +804,7 @@ struct omap_mpu_state_s {
         omap3630,
     } mpu_model;
 
-    CPUARMState *env;
+    ARMCPU *cpu;
 
     qemu_irq *drq;
 
diff --git a/hw/omap1.c b/hw/omap1.c
index 80d47f0..a997d30 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -1519,8 +1519,9 @@ static inline void omap_clkm_idlect1_update(struct omap_mpu_state_s *s,
 {
     omap_clk clk;
 
-    if (value & (1 << 11))				/* SETARM_IDLE */
-        cpu_interrupt(s->env, CPU_INTERRUPT_HALT);
+    if (value & (1 << 11)) {                            /* SETARM_IDLE */
+        cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HALT);
+    }
     if (!(value & (1 << 10)))				/* WKUP_MODE */
         qemu_system_shutdown_request();	/* XXX: disable wakeup from IRQ */
 
@@ -1734,7 +1735,7 @@ static uint64_t omap_clkdsp_read(void *opaque, target_phys_addr_t addr,
 
     case 0x18:	/* DSP_SYSST */
         return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start |
-                (s->env->halted << 6);	/* Quite useless... */
+                (s->cpu->env.halted << 6);      /* Quite useless... */
     }
 
     OMAP_BAD_REG(addr);
@@ -3701,7 +3702,7 @@ static void omap1_mpu_reset(void *opaque)
     omap_lpg_reset(mpu->led[0]);
     omap_lpg_reset(mpu->led[1]);
     omap_clkm_reset(mpu);
-    cpu_state_reset(mpu->env);
+    cpu_reset(CPU(mpu->cpu));
 }
 
 static const struct omap_map_s {
@@ -3751,8 +3752,9 @@ void omap_mpu_wakeup(void *opaque, int irq, int req)
 {
     struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque;
 
-    if (mpu->env->halted)
-        cpu_interrupt(mpu->env, CPU_INTERRUPT_EXITTB);
+    if (mpu->cpu->env.halted) {
+        cpu_interrupt(&mpu->cpu->env, CPU_INTERRUPT_EXITTB);
+    }
 }
 
 static const struct dma_irq_map omap1_dma_irq_map[] = {
@@ -3829,8 +3831,8 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
 
     /* Core */
     s->mpu_model = omap310;
-    s->env = cpu_init(core);
-    if (!s->env) {
+    s->cpu = cpu_arm_init(core);
+    if (s->cpu == NULL) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
@@ -3852,7 +3854,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
 
     omap_clkm_init(system_memory, 0xfffece00, 0xe1008000, s);
 
-    cpu_irq = arm_pic_init_cpu(s->env);
+    cpu_irq = arm_pic_init_cpu(&s->cpu->env);
     s->ih[0] = qdev_create(NULL, "omap-intc");
     qdev_prop_set_uint32(s->ih[0], "size", 0x100);
     qdev_prop_set_ptr(s->ih[0], "clk", omap_findclk(s, "arminth_ck"));
diff --git a/hw/omap2.c b/hw/omap2.c
index 42fce5e..196c4b6 100644
--- a/hw/omap2.c
+++ b/hw/omap2.c
@@ -2222,7 +2222,7 @@ static void omap2_mpu_reset(void *opaque)
     omap_mmc_reset(mpu->mmc);
     omap_mcspi_reset(mpu->mcspi[0]);
     omap_mcspi_reset(mpu->mcspi[1]);
-    cpu_state_reset(mpu->env);
+    cpu_reset(CPU(mpu->cpu));
 }
 
 static int omap2_validate_addr(struct omap_mpu_state_s *s,
@@ -2253,8 +2253,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
 
     /* Core */
     s->mpu_model = omap2420;
-    s->env = cpu_init(core ?: "arm1136-r2");
-    if (!s->env) {
+    s->cpu = cpu_arm_init(core ?: "arm1136-r2");
+    if (s->cpu == NULL) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
@@ -2277,7 +2277,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
     s->l4 = omap_l4_init(sysmem, OMAP2_L4_BASE, 54);
 
     /* Actually mapped at any 2K boundary in the ARM11 private-peripheral if */
-    cpu_irq = arm_pic_init_cpu(s->env);
+    cpu_irq = arm_pic_init_cpu(&s->cpu->env);
     s->ih[0] = qdev_create(NULL, "omap2-intc");
     qdev_prop_set_uint8(s->ih[0], "revision", 0x21);
     qdev_prop_set_ptr(s->ih[0], "fclk", omap_findclk(s, "mpu_intc_fclk"));
diff --git a/hw/omap_sx1.c b/hw/omap_sx1.c
index 4e8ec4a..c7618c6 100644
--- a/hw/omap_sx1.c
+++ b/hw/omap_sx1.c
@@ -202,7 +202,7 @@ static void sx1_init(ram_addr_t ram_size,
         sx1_binfo.kernel_filename = kernel_filename;
         sx1_binfo.kernel_cmdline = kernel_cmdline;
         sx1_binfo.initrd_filename = initrd_filename;
-        arm_load_kernel(cpu->env, &sx1_binfo);
+        arm_load_kernel(&cpu->cpu->env, &sx1_binfo);
     }
 
     /* TODO: fix next line */
diff --git a/hw/palm.c b/hw/palm.c
index b1252ab..6d81829 100644
--- a/hw/palm.c
+++ b/hw/palm.c
@@ -265,7 +265,7 @@ static void palmte_init(ram_addr_t ram_size,
         palmte_binfo.kernel_filename = kernel_filename;
         palmte_binfo.kernel_cmdline = kernel_cmdline;
         palmte_binfo.initrd_filename = initrd_filename;
-        arm_load_kernel(cpu->env, &palmte_binfo);
+        arm_load_kernel(&cpu->cpu->env, &palmte_binfo);
     }
 
     /* FIXME: We shouldn't really be doing this here.  The LCD controller
-- 
1.7.7

[Qemu-devel] [PATCH next v2 35/74] armv7m: Use cpu_arm_init() to obtain ARMCPU

[Andreas Färber]

Needed for armv7m_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/armv7m.c |    9 ++++++---
 1 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/hw/armv7m.c b/hw/armv7m.c
index 4aac076..4e5971c 100644
--- a/hw/armv7m.c
+++ b/hw/armv7m.c
@@ -160,6 +160,7 @@ qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
                       int flash_size, int sram_size,
                       const char *kernel_filename, const char *cpu_model)
 {
+    ARMCPU *cpu;
     CPUARMState *env;
     DeviceState *nvic;
     /* FIXME: make this local state.  */
@@ -177,13 +178,15 @@ qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
     flash_size *= 1024;
     sram_size *= 1024;
 
-    if (!cpu_model)
+    if (cpu_model == NULL) {
 	cpu_model = "cortex-m3";
-    env = cpu_init(cpu_model);
-    if (!env) {
+    }
+    cpu = cpu_arm_init(cpu_model);
+    if (cpu == NULL) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
+    env = &cpu->env;
 
 #if 0
     /* > 32Mb SRAM gets complicated because it overlaps the bitband area.
-- 
1.7.7

[Qemu-devel] [PATCH next v2 36/74] armv7m: Pass ARMCPU to armv7m_reset()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/armv7m.c |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/armv7m.c b/hw/armv7m.c
index 4e5971c..418139a 100644
--- a/hw/armv7m.c
+++ b/hw/armv7m.c
@@ -149,7 +149,9 @@ static void armv7m_bitband_init(void)
 
 static void armv7m_reset(void *opaque)
 {
-    cpu_state_reset((CPUARMState *)opaque);
+    ARMCPU *cpu = opaque;
+
+    cpu_reset(CPU(cpu));
 }
 
 /* Init CPU and memory for a v7-M based board.
@@ -244,7 +246,7 @@ qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
     vmstate_register_ram_global(hack);
     memory_region_add_subregion(address_space_mem, 0xfffff000, hack);
 
-    qemu_register_reset(armv7m_reset, env);
+    qemu_register_reset(armv7m_reset, cpu);
     return pic;
 }
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 37/74] arm_boot: Pass ARMCPU to do_cpu_reset()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/arm_boot.c |    9 ++++++---
 1 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/hw/arm_boot.c b/hw/arm_boot.c
index 7447f5c..eb2d176 100644
--- a/hw/arm_boot.c
+++ b/hw/arm_boot.c
@@ -274,10 +274,11 @@ static int load_dtb(target_phys_addr_t addr, const struct arm_boot_info *binfo)
 
 static void do_cpu_reset(void *opaque)
 {
-    CPUARMState *env = opaque;
+    ARMCPU *cpu = opaque;
+    CPUARMState *env = &cpu->env;
     const struct arm_boot_info *info = env->boot_info;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
     if (info) {
         if (!info->is_linux) {
             /* Jump to the entry point.  */
@@ -302,6 +303,7 @@ static void do_cpu_reset(void *opaque)
 
 void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
 {
+    ARMCPU *cpu;
     int kernel_size;
     int initrd_size;
     int n;
@@ -406,7 +408,8 @@ void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
     info->is_linux = is_linux;
 
     for (; env; env = env->next_cpu) {
+        cpu = arm_env_get_cpu(env);
         env->boot_info = info;
-        qemu_register_reset(do_cpu_reset, env);
+        qemu_register_reset(do_cpu_reset, cpu);
     }
 }
-- 
1.7.7

[Qemu-devel] [PATCH next v2 38/74] target-sh4: Let cpu_sh4_init() return SuperHCPU

[Andreas Färber]

Turn cpu_init macro into a static inline function returning
CPUSH4State for backwards compatibility.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-sh4/cpu.h       |   12 ++++++++++--
 target-sh4/translate.c |    4 ++--
 2 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index b6768f1..bf59222 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -191,7 +191,7 @@ typedef struct CPUSH4State {
 
 #include "cpu-qom.h"
 
-CPUSH4State *cpu_sh4_init(const char *cpu_model);
+SuperHCPU *cpu_sh4_init(const char *cpu_model);
 int cpu_sh4_exec(CPUSH4State * s);
 int cpu_sh4_signal_handler(int host_signum, void *pinfo,
                            void *puc);
@@ -232,7 +232,15 @@ void cpu_load_tlb(CPUSH4State * env);
 
 #include "softfloat.h"
 
-#define cpu_init cpu_sh4_init
+static inline CPUSH4State *cpu_init(const char *cpu_model)
+{
+    SuperHCPU *cpu = cpu_sh4_init(cpu_model);
+    if (cpu == NULL) {
+        return NULL;
+    }
+    return &cpu->env;
+}
+
 #define cpu_exec cpu_sh4_exec
 #define cpu_gen_code cpu_sh4_gen_code
 #define cpu_signal_handler cpu_sh4_signal_handler
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index d25f0c5..7d35b84 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -247,7 +247,7 @@ static void cpu_register(CPUSH4State *env, const sh4_def_t *def)
     env->id = def->id;
 }
 
-CPUSH4State *cpu_sh4_init(const char *cpu_model)
+SuperHCPU *cpu_sh4_init(const char *cpu_model)
 {
     SuperHCPU *cpu;
     CPUSH4State *env;
@@ -264,7 +264,7 @@ CPUSH4State *cpu_sh4_init(const char *cpu_model)
     cpu_reset(CPU(cpu));
     cpu_register(env, def);
     qemu_init_vcpu(env);
-    return env;
+    return cpu;
 }
 
 static void gen_goto_tb(DisasContext * ctx, int n, target_ulong dest)
-- 
1.7.7

[Qemu-devel] [PATCH next v2 39/74] r2d: Use cpu_sh4_init() to obtain SuperHCPU

[Andreas Färber]

Needed for main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/r2d.c |   10 +++++++---
 1 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/hw/r2d.c b/hw/r2d.c
index c55de01..1bd8df6 100644
--- a/hw/r2d.c
+++ b/hw/r2d.c
@@ -224,6 +224,7 @@ static void r2d_init(ram_addr_t ram_size,
 	      const char *kernel_filename, const char *kernel_cmdline,
 	      const char *initrd_filename, const char *cpu_model)
 {
+    SuperHCPU *cpu;
     CPUSH4State *env;
     ResetData *reset_info;
     struct SH7750State *s;
@@ -235,14 +236,17 @@ static void r2d_init(ram_addr_t ram_size,
     SysBusDevice *busdev;
     MemoryRegion *address_space_mem = get_system_memory();
 
-    if (!cpu_model)
+    if (cpu_model == NULL) {
         cpu_model = "SH7751R";
+    }
 
-    env = cpu_init(cpu_model);
-    if (!env) {
+    cpu = cpu_sh4_init(cpu_model);
+    if (cpu == NULL) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
+    env = &cpu->env;
+
     reset_info = g_malloc0(sizeof(ResetData));
     reset_info->env = env;
     reset_info->vector = env->pc;
-- 
1.7.7

[Qemu-devel] [PATCH next v2 40/74] r2d: Store SuperHCPU in ResetData

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset() in
main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/r2d.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/r2d.c b/hw/r2d.c
index 1bd8df6..0f16e81 100644
--- a/hw/r2d.c
+++ b/hw/r2d.c
@@ -192,16 +192,16 @@ static qemu_irq *r2d_fpga_init(MemoryRegion *sysmem,
 }
 
 typedef struct ResetData {
-    CPUSH4State *env;
+    SuperHCPU *cpu;
     uint32_t vector;
 } ResetData;
 
 static void main_cpu_reset(void *opaque)
 {
     ResetData *s = (ResetData *)opaque;
-    CPUSH4State *env = s->env;
+    CPUSH4State *env = &s->cpu->env;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(s->cpu));
     env->pc = s->vector;
 }
 
@@ -248,7 +248,7 @@ static void r2d_init(ram_addr_t ram_size,
     env = &cpu->env;
 
     reset_info = g_malloc0(sizeof(ResetData));
-    reset_info->env = env;
+    reset_info->cpu = cpu;
     reset_info->vector = env->pc;
     qemu_register_reset(main_cpu_reset, reset_info);
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 41/74] target-lm32: Let cpu_lm32_init() return LM32CPU

[Andreas Färber]

Make the include paths for cpu-qom.h consistent to allow using LM32CPU
in cpu.h.

Turn cpu_init macro into a static inline function returning CPULM32State
for backwards compatibility.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-lm32/cpu.c    |    2 +-
 target-lm32/cpu.h    |   12 ++++++++++--
 target-lm32/helper.c |    4 ++--
 3 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c
index 48a5fe3..caa4834 100644
--- a/target-lm32/cpu.c
+++ b/target-lm32/cpu.c
@@ -18,7 +18,7 @@
  * <http://www.gnu.org/licenses/lgpl-2.1.html>
  */
 
-#include "cpu-qom.h"
+#include "cpu.h"
 #include "qemu-common.h"
 
 
diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index 422a55b..da80469 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -186,7 +186,7 @@ struct CPULM32State {
 
 #include "cpu-qom.h"
 
-CPULM32State *cpu_lm32_init(const char *cpu_model);
+LM32CPU *cpu_lm32_init(const char *cpu_model);
 void cpu_lm32_list(FILE *f, fprintf_function cpu_fprintf);
 int cpu_lm32_exec(CPULM32State *s);
 void cpu_lm32_close(CPULM32State *s);
@@ -199,8 +199,16 @@ int cpu_lm32_signal_handler(int host_signum, void *pinfo,
 void lm32_translate_init(void);
 void cpu_lm32_set_phys_msb_ignore(CPULM32State *env, int value);
 
+static inline CPULM32State *cpu_init(const char *cpu_model)
+{
+    LM32CPU *cpu = cpu_lm32_init(cpu_model);
+    if (cpu == NULL) {
+        return NULL;
+    }
+    return &cpu->env;
+}
+
 #define cpu_list cpu_lm32_list
-#define cpu_init cpu_lm32_init
 #define cpu_exec cpu_lm32_exec
 #define cpu_gen_code cpu_lm32_gen_code
 #define cpu_signal_handler cpu_lm32_signal_handler
diff --git a/target-lm32/helper.c b/target-lm32/helper.c
index d0bc193..3b1cee7 100644
--- a/target-lm32/helper.c
+++ b/target-lm32/helper.c
@@ -192,7 +192,7 @@ static uint32_t cfg_by_def(const LM32Def *def)
     return cfg;
 }
 
-CPULM32State *cpu_lm32_init(const char *cpu_model)
+LM32CPU *cpu_lm32_init(const char *cpu_model)
 {
     LM32CPU *cpu;
     CPULM32State *env;
@@ -219,7 +219,7 @@ CPULM32State *cpu_lm32_init(const char *cpu_model)
         lm32_translate_init();
     }
 
-    return env;
+    return cpu;
 }
 
 /* Some soc ignores the MSB on the address bus. Thus creating a shadow memory
-- 
1.7.7

[Qemu-devel] [PATCH next v2 42/74] lm32_boards: Use cpu_lm32_init() to obtain LM32CPU

[Andreas Färber]

Needed for main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc>
---
 hw/lm32_boards.c |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/hw/lm32_boards.c b/hw/lm32_boards.c
index 4dd4f0a..ffb273c 100644
--- a/hw/lm32_boards.c
+++ b/hw/lm32_boards.c
@@ -75,6 +75,7 @@ static void lm32_evr_init(ram_addr_t ram_size_not_used,
                           const char *kernel_cmdline,
                           const char *initrd_filename, const char *cpu_model)
 {
+    LM32CPU *cpu;
     CPULM32State *env;
     DriveInfo *dinfo;
     MemoryRegion *address_space_mem =  get_system_memory();
@@ -101,7 +102,8 @@ static void lm32_evr_init(ram_addr_t ram_size_not_used,
     if (cpu_model == NULL) {
         cpu_model = "lm32-full";
     }
-    env = cpu_init(cpu_model);
+    cpu = cpu_lm32_init(cpu_model);
+    env = &cpu->env;
     reset_info->env = env;
 
     reset_info->flash_base = flash_base;
@@ -163,6 +165,7 @@ static void lm32_uclinux_init(ram_addr_t ram_size_not_used,
                           const char *kernel_cmdline,
                           const char *initrd_filename, const char *cpu_model)
 {
+    LM32CPU *cpu;
     CPULM32State *env;
     DriveInfo *dinfo;
     MemoryRegion *address_space_mem =  get_system_memory();
@@ -196,7 +199,8 @@ static void lm32_uclinux_init(ram_addr_t ram_size_not_used,
     if (cpu_model == NULL) {
         cpu_model = "lm32-full";
     }
-    env = cpu_init(cpu_model);
+    cpu = cpu_lm32_init(cpu_model);
+    env = &cpu->env;
     reset_info->env = env;
 
     reset_info->flash_base = flash_base;
-- 
1.7.7

[Qemu-devel] [PATCH next v2 43/74] lm32_boards: Store LM32CPU in ResetInfo

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset() in
main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc>
---
 hw/lm32_boards.c |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/lm32_boards.c b/hw/lm32_boards.c
index ffb273c..b76d800 100644
--- a/hw/lm32_boards.c
+++ b/hw/lm32_boards.c
@@ -31,7 +31,7 @@
 #include "exec-memory.h"
 
 typedef struct {
-    CPULM32State *env;
+    LM32CPU *cpu;
     target_phys_addr_t bootstrap_pc;
     target_phys_addr_t flash_base;
     target_phys_addr_t hwsetup_base;
@@ -54,9 +54,9 @@ static void cpu_irq_handler(void *opaque, int irq, int level)
 static void main_cpu_reset(void *opaque)
 {
     ResetInfo *reset_info = opaque;
-    CPULM32State *env = reset_info->env;
+    CPULM32State *env = &reset_info->cpu->env;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(reset_info->cpu));
 
     /* init defaults */
     env->pc = (uint32_t)reset_info->bootstrap_pc;
@@ -104,7 +104,7 @@ static void lm32_evr_init(ram_addr_t ram_size_not_used,
     }
     cpu = cpu_lm32_init(cpu_model);
     env = &cpu->env;
-    reset_info->env = env;
+    reset_info->cpu = cpu;
 
     reset_info->flash_base = flash_base;
 
@@ -201,7 +201,7 @@ static void lm32_uclinux_init(ram_addr_t ram_size_not_used,
     }
     cpu = cpu_lm32_init(cpu_model);
     env = &cpu->env;
-    reset_info->env = env;
+    reset_info->cpu = cpu;
 
     reset_info->flash_base = flash_base;
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 44/74] milkymist: Use cpu_lm32_init() to obtain LM32CPU

[Andreas Färber]

Needed for main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc>
---
 hw/milkymist.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/hw/milkymist.c b/hw/milkymist.c
index 8bb6a97..59f37b4 100644
--- a/hw/milkymist.c
+++ b/hw/milkymist.c
@@ -79,6 +79,7 @@ milkymist_init(ram_addr_t ram_size_not_used,
                           const char *kernel_cmdline,
                           const char *initrd_filename, const char *cpu_model)
 {
+    LM32CPU *cpu;
     CPULM32State *env;
     int kernel_size;
     DriveInfo *dinfo;
@@ -105,7 +106,8 @@ milkymist_init(ram_addr_t ram_size_not_used,
     if (cpu_model == NULL) {
         cpu_model = "lm32-full";
     }
-    env = cpu_init(cpu_model);
+    cpu = cpu_lm32_init(cpu_model);
+    env = &cpu->env;
     reset_info->env = env;
 
     cpu_lm32_set_phys_msb_ignore(env, 1);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 45/74] milkymist: Store LM32 in ResetInfo

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset() in
main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc>
---
 hw/milkymist.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/milkymist.c b/hw/milkymist.c
index 59f37b4..2e7235b 100644
--- a/hw/milkymist.c
+++ b/hw/milkymist.c
@@ -37,7 +37,7 @@
 #define KERNEL_LOAD_ADDR 0x40000000
 
 typedef struct {
-    CPULM32State *env;
+    LM32CPU *cpu;
     target_phys_addr_t bootstrap_pc;
     target_phys_addr_t flash_base;
     target_phys_addr_t initrd_base;
@@ -59,9 +59,9 @@ static void cpu_irq_handler(void *opaque, int irq, int level)
 static void main_cpu_reset(void *opaque)
 {
     ResetInfo *reset_info = opaque;
-    CPULM32State *env = reset_info->env;
+    CPULM32State *env = &reset_info->cpu->env;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(reset_info->cpu));
 
     /* init defaults */
     env->pc = reset_info->bootstrap_pc;
@@ -108,7 +108,7 @@ milkymist_init(ram_addr_t ram_size_not_used,
     }
     cpu = cpu_lm32_init(cpu_model);
     env = &cpu->env;
-    reset_info->env = env;
+    reset_info->cpu = cpu;
 
     cpu_lm32_set_phys_msb_ignore(env, 1);
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 46/74] target-xtensa: Let cpu_xtensa_init() return XtensaCPU

[Andreas Färber]

Make the include paths for cpu-qom.h consistent to allow using XtensaCPU
in cpu.h.

Turn cpu_init macro into a static inline function returning
CPUXtensaState for backwards compatibility.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-xtensa/cpu.c    |    2 +-
 target-xtensa/cpu.h    |   16 +++++++++++++---
 target-xtensa/helper.c |    4 ++--
 3 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c
index 97deacb..9d01983 100644
--- a/target-xtensa/cpu.c
+++ b/target-xtensa/cpu.c
@@ -28,7 +28,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include "cpu-qom.h"
+#include "cpu.h"
 #include "qemu-common.h"
 
 
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 6d0ea7c..81f7833 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -344,13 +344,24 @@ typedef struct CPUXtensaState {
     CPU_COMMON
 } CPUXtensaState;
 
-#define cpu_init cpu_xtensa_init
+#include "cpu-qom.h"
+
 #define cpu_exec cpu_xtensa_exec
 #define cpu_gen_code cpu_xtensa_gen_code
 #define cpu_signal_handler cpu_xtensa_signal_handler
 #define cpu_list xtensa_cpu_list
 
-CPUXtensaState *cpu_xtensa_init(const char *cpu_model);
+XtensaCPU *cpu_xtensa_init(const char *cpu_model);
+
+static inline CPUXtensaState *cpu_init(const char *cpu_model)
+{
+    XtensaCPU *cpu = cpu_xtensa_init(cpu_model);
+    if (cpu == NULL) {
+        return NULL;
+    }
+    return &cpu->env;
+}
+
 void xtensa_translate_init(void);
 int cpu_xtensa_exec(CPUXtensaState *s);
 void xtensa_register_core(XtensaConfigList *node);
@@ -471,7 +482,6 @@ static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc,
 }
 
 #include "cpu-all.h"
-#include "cpu-qom.h"
 #include "exec-all.h"
 
 static inline int cpu_has_work(CPUXtensaState *env)
diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
index 2094227..e6cb3fe 100644
--- a/target-xtensa/helper.c
+++ b/target-xtensa/helper.c
@@ -80,7 +80,7 @@ static void breakpoint_handler(CPUXtensaState *env)
     }
 }
 
-CPUXtensaState *cpu_xtensa_init(const char *cpu_model)
+XtensaCPU *cpu_xtensa_init(const char *cpu_model)
 {
     static int tcg_inited;
     static int debug_handler_inited;
@@ -116,7 +116,7 @@ CPUXtensaState *cpu_xtensa_init(const char *cpu_model)
 
     xtensa_irq_init(env);
     qemu_init_vcpu(env);
-    return env;
+    return cpu;
 }
 
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 47/74] xtensa_sim: Use cpu_xtensa_init() to obtain XtensaCPU

[Andreas Färber]

Needed for sim_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/xtensa_sim.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/hw/xtensa_sim.c b/hw/xtensa_sim.c
index c7e05dc..dae08a1 100644
--- a/hw/xtensa_sim.c
+++ b/hw/xtensa_sim.c
@@ -47,16 +47,19 @@ static void sim_init(ram_addr_t ram_size,
         const char *kernel_filename, const char *kernel_cmdline,
         const char *initrd_filename, const char *cpu_model)
 {
+    XtensaCPU *cpu = NULL;
     CPUXtensaState *env = NULL;
     MemoryRegion *ram, *rom;
     int n;
 
     for (n = 0; n < smp_cpus; n++) {
-        env = cpu_init(cpu_model);
-        if (!env) {
+        cpu = cpu_xtensa_init(cpu_model);
+        if (cpu == NULL) {
             fprintf(stderr, "Unable to find CPU definition\n");
             exit(1);
         }
+        env = &cpu->env;
+
         env->sregs[PRID] = n;
         qemu_register_reset(sim_reset, env);
         /* Need MMU initialized prior to ELF loading,
-- 
1.7.7

[Qemu-devel] [PATCH next v2 48/74] xtensa_sim: Pass XtensaCPU to sim_reset()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/xtensa_sim.c |   10 ++++++----
 1 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/hw/xtensa_sim.c b/hw/xtensa_sim.c
index dae08a1..1ce07fb 100644
--- a/hw/xtensa_sim.c
+++ b/hw/xtensa_sim.c
@@ -37,9 +37,11 @@ static uint64_t translate_phys_addr(void *env, uint64_t addr)
     return cpu_get_phys_page_debug(env, addr);
 }
 
-static void sim_reset(void *env)
+static void sim_reset(void *opaque)
 {
-    cpu_state_reset(env);
+    XtensaCPU *cpu = opaque;
+
+    cpu_reset(CPU(cpu));
 }
 
 static void sim_init(ram_addr_t ram_size,
@@ -61,11 +63,11 @@ static void sim_init(ram_addr_t ram_size,
         env = &cpu->env;
 
         env->sregs[PRID] = n;
-        qemu_register_reset(sim_reset, env);
+        qemu_register_reset(sim_reset, cpu);
         /* Need MMU initialized prior to ELF loading,
          * so that ELF gets loaded into virtual addresses
          */
-        sim_reset(env);
+        sim_reset(cpu);
     }
 
     ram = g_malloc(sizeof(*ram));
-- 
1.7.7

[Qemu-devel] [PATCH next v2 49/74] xtensa_lx60: Use cpu_xtensa_init() to obtain XtensaCPU

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/xtensa_lx60.c |    9 ++++++---
 1 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/hw/xtensa_lx60.c b/hw/xtensa_lx60.c
index afdef49..31f8adc 100644
--- a/hw/xtensa_lx60.c
+++ b/hw/xtensa_lx60.c
@@ -164,6 +164,7 @@ static void lx_init(const LxBoardDesc *board,
     int be = 0;
 #endif
     MemoryRegion *system_memory = get_system_memory();
+    XtensaCPU *cpu = NULL;
     CPUXtensaState *env = NULL;
     MemoryRegion *ram, *rom, *system_io;
     DriveInfo *dinfo;
@@ -175,17 +176,19 @@ static void lx_init(const LxBoardDesc *board,
     }
 
     for (n = 0; n < smp_cpus; n++) {
-        env = cpu_init(cpu_model);
-        if (!env) {
+        cpu = cpu_xtensa_init(cpu_model);
+        if (cpu == NULL) {
             fprintf(stderr, "Unable to find CPU definition\n");
             exit(1);
         }
+        env = &cpu->env;
+
         env->sregs[PRID] = n;
         qemu_register_reset(lx60_reset, env);
         /* Need MMU initialized prior to ELF loading,
          * so that ELF gets loaded into virtual addresses
          */
-        cpu_state_reset(env);
+        cpu_reset(CPU(cpu));
     }
 
     ram = g_malloc(sizeof(*ram));
-- 
1.7.7

[Qemu-devel] [PATCH next v2 50/74] xtensa_lx60: Pass XtensaCPU to lx60_reset()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/xtensa_lx60.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/xtensa_lx60.c b/hw/xtensa_lx60.c
index 31f8adc..b153bfd 100644
--- a/hw/xtensa_lx60.c
+++ b/hw/xtensa_lx60.c
@@ -148,9 +148,9 @@ static uint64_t translate_phys_addr(void *env, uint64_t addr)
 
 static void lx60_reset(void *opaque)
 {
-    CPUXtensaState *env = opaque;
+    XtensaCPU *cpu = opaque;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
 }
 
 static void lx_init(const LxBoardDesc *board,
@@ -184,7 +184,7 @@ static void lx_init(const LxBoardDesc *board,
         env = &cpu->env;
 
         env->sregs[PRID] = n;
-        qemu_register_reset(lx60_reset, env);
+        qemu_register_reset(lx60_reset, cpu);
         /* Need MMU initialized prior to ELF loading,
          * so that ELF gets loaded into virtual addresses
          */
-- 
1.7.7

[Qemu-devel] [PATCH next v2 51/74] target-cris: Reindent cpu_cris_init()

[Andreas Färber]

Judging by TCG variable initialization it used 8-char tabs; use 4 spaces
instead. Also remove trailing whitespace.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-cris/translate.c |  103 ++++++++++++++++++++++++-----------------------
 1 files changed, 52 insertions(+), 51 deletions(-)

diff --git a/target-cris/translate.c b/target-cris/translate.c
index e353ea3..a398057 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3506,73 +3506,74 @@ static uint32_t vr_by_name(const char *name)
 CPUCRISState *cpu_cris_init (const char *cpu_model)
 {
     CRISCPU *cpu;
-	CPUCRISState *env;
-	static int tcg_initialized = 0;
-	int i;
+    CPUCRISState *env;
+    static int tcg_initialized = 0;
+    int i;
 
     cpu = CRIS_CPU(object_new(TYPE_CRIS_CPU));
     env = &cpu->env;
 
-	env->pregs[PR_VR] = vr_by_name(cpu_model);
+    env->pregs[PR_VR] = vr_by_name(cpu_model);
 
     cpu_reset(CPU(cpu));
-	qemu_init_vcpu(env);
+    qemu_init_vcpu(env);
 
-	if (tcg_initialized)
-		return env;
+    if (tcg_initialized) {
+        return env;
+    }
 
-	tcg_initialized = 1;
+    tcg_initialized = 1;
 
 #define GEN_HELPER 2
 #include "helper.h"
 
-	if (env->pregs[PR_VR] < 32) {
-		cpu_crisv10_init(env);
-		return env; 
-	}
+    if (env->pregs[PR_VR] < 32) {
+        cpu_crisv10_init(env);
+        return env;
+    }
 
 
-	cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
-	cc_x = tcg_global_mem_new(TCG_AREG0,
-				  offsetof(CPUCRISState, cc_x), "cc_x");
-	cc_src = tcg_global_mem_new(TCG_AREG0,
-				    offsetof(CPUCRISState, cc_src), "cc_src");
-	cc_dest = tcg_global_mem_new(TCG_AREG0,
-				     offsetof(CPUCRISState, cc_dest),
-				     "cc_dest");
-	cc_result = tcg_global_mem_new(TCG_AREG0,
-				       offsetof(CPUCRISState, cc_result),
-				       "cc_result");
-	cc_op = tcg_global_mem_new(TCG_AREG0,
-				   offsetof(CPUCRISState, cc_op), "cc_op");
-	cc_size = tcg_global_mem_new(TCG_AREG0,
-				     offsetof(CPUCRISState, cc_size),
-				     "cc_size");
-	cc_mask = tcg_global_mem_new(TCG_AREG0,
-				     offsetof(CPUCRISState, cc_mask),
-				     "cc_mask");
+    cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    cc_x = tcg_global_mem_new(TCG_AREG0,
+                              offsetof(CPUCRISState, cc_x), "cc_x");
+    cc_src = tcg_global_mem_new(TCG_AREG0,
+                                offsetof(CPUCRISState, cc_src), "cc_src");
+    cc_dest = tcg_global_mem_new(TCG_AREG0,
+                                 offsetof(CPUCRISState, cc_dest),
+                                 "cc_dest");
+    cc_result = tcg_global_mem_new(TCG_AREG0,
+                                   offsetof(CPUCRISState, cc_result),
+                                   "cc_result");
+    cc_op = tcg_global_mem_new(TCG_AREG0,
+                               offsetof(CPUCRISState, cc_op), "cc_op");
+    cc_size = tcg_global_mem_new(TCG_AREG0,
+                                 offsetof(CPUCRISState, cc_size),
+                                 "cc_size");
+    cc_mask = tcg_global_mem_new(TCG_AREG0,
+                                 offsetof(CPUCRISState, cc_mask),
+                                 "cc_mask");
 
-	env_pc = tcg_global_mem_new(TCG_AREG0, 
-				    offsetof(CPUCRISState, pc),
-				    "pc");
-	env_btarget = tcg_global_mem_new(TCG_AREG0,
-					 offsetof(CPUCRISState, btarget),
-					 "btarget");
-	env_btaken = tcg_global_mem_new(TCG_AREG0,
-					 offsetof(CPUCRISState, btaken),
-					 "btaken");
-	for (i = 0; i < 16; i++) {
-		cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
-					      offsetof(CPUCRISState, regs[i]),
-					      regnames[i]);
-	}
-	for (i = 0; i < 16; i++) {
-		cpu_PR[i] = tcg_global_mem_new(TCG_AREG0,
-					       offsetof(CPUCRISState, pregs[i]),
-					       pregnames[i]);
-	}
+    env_pc = tcg_global_mem_new(TCG_AREG0,
+                                offsetof(CPUCRISState, pc),
+                                "pc");
+    env_btarget = tcg_global_mem_new(TCG_AREG0,
+                                     offsetof(CPUCRISState, btarget),
+                                     "btarget");
+    env_btaken = tcg_global_mem_new(TCG_AREG0,
+                                    offsetof(CPUCRISState, btaken),
+                                    "btaken");
+    for (i = 0; i < 16; i++) {
+        cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
+                                      offsetof(CPUCRISState, regs[i]),
+                                      regnames[i]);
+    }
+    for (i = 0; i < 16; i++) {
+        cpu_PR[i] = tcg_global_mem_new(TCG_AREG0,
+                                       offsetof(CPUCRISState, pregs[i]),
+                                       pregnames[i]);
+    }
 
-	return env;
+    return env;
 }
 
 void cpu_state_reset(CPUCRISState *env)
-- 
1.7.7

[Qemu-devel] [PATCH next v2 52/74] target-cris: Let cpu_cris_init() return CRISCPU

[Andreas Färber]

Turn cpu_init macro into a static inline function returning CPUCRISState
for backwards compatibility.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-cris/cpu.h       |   12 ++++++++++--
 target-cris/translate.c |    8 ++++----
 2 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 5449cc4..a760367 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -171,7 +171,7 @@ typedef struct CPUCRISState {
 
 #include "cpu-qom.h"
 
-CPUCRISState *cpu_cris_init(const char *cpu_model);
+CRISCPU *cpu_cris_init(const char *cpu_model);
 int cpu_cris_exec(CPUCRISState *s);
 void cpu_cris_close(CPUCRISState *s);
 void do_interrupt(CPUCRISState *env);
@@ -216,7 +216,15 @@ enum {
 #define TARGET_PHYS_ADDR_SPACE_BITS 32
 #define TARGET_VIRT_ADDR_SPACE_BITS 32
 
-#define cpu_init cpu_cris_init
+static inline CPUCRISState *cpu_init(const char *cpu_model)
+{
+    CRISCPU *cpu = cpu_cris_init(cpu_model);
+    if (cpu == NULL) {
+        return NULL;
+    }
+    return &cpu->env;
+}
+
 #define cpu_exec cpu_cris_exec
 #define cpu_gen_code cpu_cris_gen_code
 #define cpu_signal_handler cpu_cris_signal_handler
diff --git a/target-cris/translate.c b/target-cris/translate.c
index a398057..eed03d3 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3503,7 +3503,7 @@ static uint32_t vr_by_name(const char *name)
     return 32;
 }
 
-CPUCRISState *cpu_cris_init (const char *cpu_model)
+CRISCPU *cpu_cris_init(const char *cpu_model)
 {
     CRISCPU *cpu;
     CPUCRISState *env;
@@ -3519,7 +3519,7 @@ CPUCRISState *cpu_cris_init (const char *cpu_model)
     qemu_init_vcpu(env);
 
     if (tcg_initialized) {
-        return env;
+        return cpu;
     }
 
     tcg_initialized = 1;
@@ -3529,7 +3529,7 @@ CPUCRISState *cpu_cris_init (const char *cpu_model)
 
     if (env->pregs[PR_VR] < 32) {
         cpu_crisv10_init(env);
-        return env;
+        return cpu;
     }
 
 
@@ -3573,7 +3573,7 @@ CPUCRISState *cpu_cris_init (const char *cpu_model)
                                        pregnames[i]);
     }
 
-    return env;
+    return cpu;
 }
 
 void cpu_state_reset(CPUCRISState *env)
-- 
1.7.7

[Qemu-devel] [PATCH next v2 53/74] axis_dev88: Use cpu_cris_init() to obtain CRISCPU

[Andreas Färber]

Needed for cris_load_image().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/axis_dev88.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/hw/axis_dev88.c b/hw/axis_dev88.c
index 2304e35..636708c 100644
--- a/hw/axis_dev88.c
+++ b/hw/axis_dev88.c
@@ -247,6 +247,7 @@ void axisdev88_init (ram_addr_t ram_size,
                      const char *kernel_filename, const char *kernel_cmdline,
                      const char *initrd_filename, const char *cpu_model)
 {
+    CRISCPU *cpu;
     CPUCRISState *env;
     DeviceState *dev;
     SysBusDevice *s;
@@ -263,7 +264,8 @@ void axisdev88_init (ram_addr_t ram_size,
     if (cpu_model == NULL) {
         cpu_model = "crisv32";
     }
-    env = cpu_init(cpu_model);
+    cpu = cpu_cris_init(cpu_model);
+    env = &cpu->env;
 
     /* allocate RAM */
     memory_region_init_ram(phys_ram, "axisdev88.ram", ram_size);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 54/74] cris-boot: Pass CRISCPU to cris_load_image()

[Andreas Färber]

Needed for main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/axis_dev88.c |    2 +-
 hw/cris-boot.c  |    3 ++-
 hw/cris-boot.h  |    2 +-
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/hw/axis_dev88.c b/hw/axis_dev88.c
index 636708c..eab6327 100644
--- a/hw/axis_dev88.c
+++ b/hw/axis_dev88.c
@@ -346,7 +346,7 @@ void axisdev88_init (ram_addr_t ram_size,
 
     li.image_filename = kernel_filename;
     li.cmdline = kernel_cmdline;
-    cris_load_image(env, &li);
+    cris_load_image(cpu, &li);
 }
 
 static QEMUMachine axisdev88_machine = {
diff --git a/hw/cris-boot.c b/hw/cris-boot.c
index ca6c52f..331b2d1 100644
--- a/hw/cris-boot.c
+++ b/hw/cris-boot.c
@@ -60,8 +60,9 @@ static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
     return addr - 0x80000000LL;
 }
 
-void cris_load_image(CPUCRISState *env, struct cris_load_info *li)
+void cris_load_image(CRISCPU *cpu, struct cris_load_info *li)
 {
+    CPUCRISState *env = &cpu->env;
     uint64_t entry, high;
     int kcmdline_len;
     int image_size;
diff --git a/hw/cris-boot.h b/hw/cris-boot.h
index ecb9779..0a2c242 100644
--- a/hw/cris-boot.h
+++ b/hw/cris-boot.h
@@ -8,4 +8,4 @@ struct cris_load_info
     target_phys_addr_t entry;
 };
 
-void cris_load_image(CPUCRISState *env, struct cris_load_info *li);
+void cris_load_image(CRISCPU *cpu, struct cris_load_info *li);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 55/74] cris-boot: Pass CRISCPU to main_cpu_reset().

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/cris-boot.c |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/hw/cris-boot.c b/hw/cris-boot.c
index 331b2d1..b21326f 100644
--- a/hw/cris-boot.c
+++ b/hw/cris-boot.c
@@ -29,12 +29,13 @@
 
 static void main_cpu_reset(void *opaque)
 {
-    CPUCRISState *env = opaque;
+    CRISCPU *cpu = opaque;
+    CPUCRISState *env = &cpu->env;
     struct cris_load_info *li;
 
     li = env->load_info;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
 
     if (!li) {
         /* nothing more to do.  */
@@ -93,5 +94,5 @@ void cris_load_image(CRISCPU *cpu, struct cris_load_info *li)
         }
         pstrcpy_targphys("cmdline", 0x40000000, 256, li->cmdline);
     }
-    qemu_register_reset(main_cpu_reset, env);
+    qemu_register_reset(main_cpu_reset, cpu);
 }
-- 
1.7.7

[Qemu-devel] [PATCH next v2 56/74] target-microblaze: Let cpu_mb_init() return MicroBlazeCPU

[Andreas Färber]

Since qemu_init_vcpu() is no-op for CONFIG_USER_ONLY drop the env
variable that is now unused there.

Turn cpu_init macro into a static inline function returning CPUMBState
for backwards compatibility.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-microblaze/cpu.h       |   12 ++++++++++--
 target-microblaze/translate.c |   13 ++++++-------
 2 files changed, 16 insertions(+), 9 deletions(-)

diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 718d5bb..a570678 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -268,7 +268,7 @@ struct CPUMBState {
 
 #include "cpu-qom.h"
 
-CPUMBState *cpu_mb_init(const char *cpu_model);
+MicroBlazeCPU *cpu_mb_init(const char *cpu_model);
 int cpu_mb_exec(CPUMBState *s);
 void cpu_mb_close(CPUMBState *s);
 void do_interrupt(CPUMBState *env);
@@ -291,7 +291,15 @@ enum {
 #define TARGET_PHYS_ADDR_SPACE_BITS 32
 #define TARGET_VIRT_ADDR_SPACE_BITS 32
 
-#define cpu_init cpu_mb_init
+static inline CPUMBState *cpu_init(const char *cpu_model)
+{
+    MicroBlazeCPU *cpu = cpu_mb_init(cpu_model);
+    if (cpu == NULL) {
+        return NULL;
+    }
+    return &cpu->env;
+}
+
 #define cpu_exec cpu_mb_exec
 #define cpu_gen_code cpu_mb_gen_code
 #define cpu_signal_handler cpu_mb_signal_handler
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 742b395..afa6255 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1889,21 +1889,20 @@ void cpu_dump_state (CPUMBState *env, FILE *f, fprintf_function cpu_fprintf,
     cpu_fprintf(f, "\n\n");
 }
 
-CPUMBState *cpu_mb_init (const char *cpu_model)
+MicroBlazeCPU *cpu_mb_init(const char *cpu_model)
 {
     MicroBlazeCPU *cpu;
-    CPUMBState *env;
     static int tcg_initialized = 0;
     int i;
 
     cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
-    env = &cpu->env;
 
     cpu_reset(CPU(cpu));
-    qemu_init_vcpu(env);
+    qemu_init_vcpu(&cpu->env);
 
-    if (tcg_initialized)
-        return env;
+    if (tcg_initialized) {
+        return cpu;
+    }
 
     tcg_initialized = 1;
 
@@ -1937,7 +1936,7 @@ CPUMBState *cpu_mb_init (const char *cpu_model)
 #define GEN_HELPER 2
 #include "helper.h"
 
-    return env;
+    return cpu;
 }
 
 void cpu_state_reset(CPUMBState *env)
-- 
1.7.7

[Qemu-devel] [PATCH next v2 57/74] petalogix_ml605: Use cpu_mb_init() to obtain MicroBlazeCPU

[Andreas Färber]

Needed for microblaze_load_kernel().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/petalogix_ml605_mmu.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c
index 31a4348..6819241 100644
--- a/hw/petalogix_ml605_mmu.c
+++ b/hw/petalogix_ml605_mmu.c
@@ -75,6 +75,7 @@ petalogix_ml605_init(ram_addr_t ram_size,
 {
     MemoryRegion *address_space_mem = get_system_memory();
     DeviceState *dev;
+    MicroBlazeCPU *cpu;
     CPUMBState *env;
     DriveInfo *dinfo;
     int i;
@@ -87,7 +88,8 @@ petalogix_ml605_init(ram_addr_t ram_size,
     if (cpu_model == NULL) {
         cpu_model = "microblaze";
     }
-    env = cpu_init(cpu_model);
+    cpu = cpu_mb_init(cpu_model);
+    env = &cpu->env;
 
     /* Attach emulated BRAM through the LMB.  */
     memory_region_init_ram(phys_lmb_bram, "petalogix_ml605.lmb_bram",
-- 
1.7.7

[Qemu-devel] [PATCH next v2 58/74] petalogix_s3adsp1800_mmu: Use cpu_mb_init() to obtain MicroBlazeCPU

[Andreas Färber]

Needed for microblaze_load_kernel().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/petalogix_s3adsp1800_mmu.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/hw/petalogix_s3adsp1800_mmu.c b/hw/petalogix_s3adsp1800_mmu.c
index 8b37336..7ff3cd5 100644
--- a/hw/petalogix_s3adsp1800_mmu.c
+++ b/hw/petalogix_s3adsp1800_mmu.c
@@ -62,6 +62,7 @@ petalogix_s3adsp1800_init(ram_addr_t ram_size,
                           const char *initrd_filename, const char *cpu_model)
 {
     DeviceState *dev;
+    MicroBlazeCPU *cpu;
     CPUMBState *env;
     DriveInfo *dinfo;
     int i;
@@ -75,7 +76,8 @@ petalogix_s3adsp1800_init(ram_addr_t ram_size,
     if (cpu_model == NULL) {
         cpu_model = "microblaze";
     }
-    env = cpu_init(cpu_model);
+    cpu = cpu_mb_init(cpu_model);
+    env = &cpu->env;
 
     /* Attach emulated BRAM through the LMB.  */
     memory_region_init_ram(phys_lmb_bram,
-- 
1.7.7

[Qemu-devel] [PATCH next v2 59/74] microblaze_boot: Pass MicroBlazeCPU to microblaze_load_kernel()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset() in
main_cpu_reset().

Also pass it through to its reset callbacks, while at it.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/microblaze_boot.c          |   16 ++++++++--------
 hw/microblaze_boot.h          |    4 ++--
 hw/petalogix_ml605_mmu.c      |    6 ++++--
 hw/petalogix_s3adsp1800_mmu.c |    6 ++++--
 4 files changed, 18 insertions(+), 14 deletions(-)

diff --git a/hw/microblaze_boot.c b/hw/microblaze_boot.c
index b4fbb10..1030e9c 100644
--- a/hw/microblaze_boot.c
+++ b/hw/microblaze_boot.c
@@ -35,7 +35,7 @@
 
 static struct
 {
-    void (*machine_cpu_reset)(CPUMBState *);
+    void (*machine_cpu_reset)(MicroBlazeCPU *);
     uint32_t bootstrap_pc;
     uint32_t cmdline;
     uint32_t fdt;
@@ -43,14 +43,15 @@ static struct
 
 static void main_cpu_reset(void *opaque)
 {
-    CPUMBState *env = opaque;
+    MicroBlazeCPU *cpu = opaque;
+    CPUMBState *env = &cpu->env;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
     env->regs[5] = boot_info.cmdline;
     env->regs[7] = boot_info.fdt;
     env->sregs[SR_PC] = boot_info.bootstrap_pc;
     if (boot_info.machine_cpu_reset) {
-        boot_info.machine_cpu_reset(env);
+        boot_info.machine_cpu_reset(cpu);
     }
 }
 
@@ -99,11 +100,10 @@ static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
     return addr - 0x30000000LL;
 }
 
-void microblaze_load_kernel(CPUMBState *env, target_phys_addr_t ddr_base,
+void microblaze_load_kernel(MicroBlazeCPU *cpu, target_phys_addr_t ddr_base,
                             uint32_t ramsize, const char *dtb_filename,
-                                  void (*machine_cpu_reset)(CPUMBState *))
+                            void (*machine_cpu_reset)(MicroBlazeCPU *))
 {
-
     QemuOpts *machine_opts;
     const char *kernel_filename = NULL;
     const char *kernel_cmdline = NULL;
@@ -122,7 +122,7 @@ void microblaze_load_kernel(CPUMBState *env, target_phys_addr_t ddr_base,
     }
 
     boot_info.machine_cpu_reset = machine_cpu_reset;
-    qemu_register_reset(main_cpu_reset, env);
+    qemu_register_reset(main_cpu_reset, cpu);
 
     if (kernel_filename) {
         int kernel_size;
diff --git a/hw/microblaze_boot.h b/hw/microblaze_boot.h
index bf9d136..c9a3064 100644
--- a/hw/microblaze_boot.h
+++ b/hw/microblaze_boot.h
@@ -3,8 +3,8 @@
 
 #include "hw.h"
 
-void microblaze_load_kernel(CPUMBState *env, target_phys_addr_t ddr_base,
+void microblaze_load_kernel(MicroBlazeCPU *cpu, target_phys_addr_t ddr_base,
                             uint32_t ramsize, const char *dtb_filename,
-                                  void (*machine_cpu_reset)(CPUMBState *));
+                            void (*machine_cpu_reset)(MicroBlazeCPU *));
 
 #endif /* __MICROBLAZE_BOOT __ */
diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c
index 6819241..bff63e3 100644
--- a/hw/petalogix_ml605_mmu.c
+++ b/hw/petalogix_ml605_mmu.c
@@ -54,8 +54,10 @@
 #define AXIENET_BASEADDR 0x82780000
 #define AXIDMA_BASEADDR 0x84600000
 
-static void machine_cpu_reset(CPUMBState *env)
+static void machine_cpu_reset(MicroBlazeCPU *cpu)
 {
+    CPUMBState *env = &cpu->env;
+
     env->pvr.regs[10] = 0x0e000000; /* virtex 6 */
     /* setup pvr to match kernel setting */
     env->pvr.regs[5] |= PVR5_DCACHE_WRITEBACK_MASK;
@@ -133,7 +135,7 @@ petalogix_ml605_init(ram_addr_t ram_size,
                                      irq[1], irq[0], 100 * 1000000);
     }
 
-    microblaze_load_kernel(env, ddr_base, ram_size, BINARY_DEVICE_TREE_FILE,
+    microblaze_load_kernel(cpu, ddr_base, ram_size, BINARY_DEVICE_TREE_FILE,
                                                             machine_cpu_reset);
 
 }
diff --git a/hw/petalogix_s3adsp1800_mmu.c b/hw/petalogix_s3adsp1800_mmu.c
index 7ff3cd5..f41c559 100644
--- a/hw/petalogix_s3adsp1800_mmu.c
+++ b/hw/petalogix_s3adsp1800_mmu.c
@@ -49,8 +49,10 @@
 #define UARTLITE_BASEADDR 0x84000000
 #define ETHLITE_BASEADDR 0x81000000
 
-static void machine_cpu_reset(CPUMBState *env)
+static void machine_cpu_reset(MicroBlazeCPU *cpu)
 {
+    CPUMBState *env = &cpu->env;
+
     env->pvr.regs[10] = 0x0c000000; /* spartan 3a dsp family.  */
 }
 
@@ -107,7 +109,7 @@ petalogix_s3adsp1800_init(ram_addr_t ram_size,
     xilinx_timer_create(TIMER_BASEADDR, irq[0], 2, 62 * 1000000);
     xilinx_ethlite_create(&nd_table[0], ETHLITE_BASEADDR, irq[1], 0, 0);
 
-    microblaze_load_kernel(env, ddr_base, ram_size,
+    microblaze_load_kernel(cpu, ddr_base, ram_size,
                     BINARY_DEVICE_TREE_FILE, machine_cpu_reset);
 }
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 60/74] target-mips: Use cpu_reset() in do_interrupt()

[Andreas Färber]

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-mips/helper.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/target-mips/helper.c b/target-mips/helper.c
index ddf9cb7..4208bb2 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -399,6 +399,7 @@ static void set_hflags_for_handler (CPUMIPSState *env)
 void do_interrupt (CPUMIPSState *env)
 {
 #if !defined(CONFIG_USER_ONLY)
+    MIPSCPU *cpu = mips_env_get_cpu(env);
     target_ulong offset;
     int cause = -1;
     const char *name;
@@ -452,7 +453,7 @@ void do_interrupt (CPUMIPSState *env)
         set_hflags_for_handler(env);
         break;
     case EXCP_RESET:
-        cpu_state_reset(env);
+        cpu_reset(CPU(cpu));
         break;
     case EXCP_SRESET:
         env->CP0_Status |= (1 << CP0St_SR);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 61/74] target-mips: Let cpu_mips_init() return MIPSCPU

[Andreas Färber]

Turn cpu_init macro into a static inline function returning CPUMIPSState
for backwards compatibility.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-mips/cpu.h       |   12 ++++++++++--
 target-mips/translate.c |    4 ++--
 2 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 44c1152..c7c9cb9 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -496,7 +496,6 @@ void cpu_unassigned_access(CPUMIPSState *env, target_phys_addr_t addr,
 
 void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf);
 
-#define cpu_init cpu_mips_init
 #define cpu_exec cpu_mips_exec
 #define cpu_gen_code cpu_mips_gen_code
 #define cpu_signal_handler cpu_mips_signal_handler
@@ -626,9 +625,18 @@ enum {
 #define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0
 
 int cpu_mips_exec(CPUMIPSState *s);
-CPUMIPSState *cpu_mips_init(const char *cpu_model);
+MIPSCPU *cpu_mips_init(const char *cpu_model);
 int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
 
+static inline CPUMIPSState *cpu_init(const char *cpu_model)
+{
+    MIPSCPU *cpu = cpu_mips_init(cpu_model);
+    if (cpu == NULL) {
+        return NULL;
+    }
+    return &cpu->env;
+}
+
 /* mips_timer.c */
 uint32_t cpu_mips_get_random (CPUMIPSState *env);
 uint32_t cpu_mips_get_count (CPUMIPSState *env);
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 58e044b..2d56f46 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12689,7 +12689,7 @@ static void mips_tcg_init(void)
 
 #include "translate_init.c"
 
-CPUMIPSState *cpu_mips_init (const char *cpu_model)
+MIPSCPU *cpu_mips_init(const char *cpu_model)
 {
     MIPSCPU *cpu;
     CPUMIPSState *env;
@@ -12711,7 +12711,7 @@ CPUMIPSState *cpu_mips_init (const char *cpu_model)
     mips_tcg_init();
     cpu_reset(CPU(cpu));
     qemu_init_vcpu(env);
-    return env;
+    return cpu;
 }
 
 void cpu_state_reset(CPUMIPSState *env)
-- 
1.7.7

[Qemu-devel] [PATCH next v2 62/74] mips_fulong2e: Use cpu_mips_cpu() to obtain MIPSCPU

[Andreas Färber]

Needed for main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/mips_fulong2e.c |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/mips_fulong2e.c b/hw/mips_fulong2e.c
index 37dc711..8b66e7b 100644
--- a/hw/mips_fulong2e.c
+++ b/hw/mips_fulong2e.c
@@ -272,17 +272,19 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
     i2c_bus *smbus;
     int i;
     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
+    MIPSCPU *cpu;
     CPUMIPSState *env;
 
     /* init CPUs */
     if (cpu_model == NULL) {
         cpu_model = "Loongson-2E";
     }
-    env = cpu_init(cpu_model);
-    if (!env) {
+    cpu = cpu_mips_init(cpu_model);
+    if (cpu == NULL) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
+    env = &cpu->env;
 
     register_savevm(NULL, "cpu", 0, 3, cpu_save, cpu_load, env);
     qemu_register_reset(main_cpu_reset, env);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 63/74] mips_fulong2e: Pass MIPSCPU to main_cpu_reset()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/mips_fulong2e.c |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/hw/mips_fulong2e.c b/hw/mips_fulong2e.c
index 8b66e7b..9a12a76 100644
--- a/hw/mips_fulong2e.c
+++ b/hw/mips_fulong2e.c
@@ -198,9 +198,10 @@ static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_a
 
 static void main_cpu_reset(void *opaque)
 {
-    CPUMIPSState *env = opaque;
+    MIPSCPU *cpu = opaque;
+    CPUMIPSState *env = &cpu->env;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(cpu));
     /* TODO: 2E reset stuff */
     if (loaderparams.kernel_filename) {
         env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
@@ -287,7 +288,7 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
     env = &cpu->env;
 
     register_savevm(NULL, "cpu", 0, 3, cpu_save, cpu_load, env);
-    qemu_register_reset(main_cpu_reset, env);
+    qemu_register_reset(main_cpu_reset, cpu);
 
     /* fulong 2e has 256M ram. */
     ram_size = 256 * 1024 * 1024;
-- 
1.7.7

[Qemu-devel] [PATCH next v2 64/74] mips_jazz: Use cpu_mips_init() to obtain MIPSCPU

[Andreas Färber]

Needed for main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/mips_jazz.c |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index a6bc7ba..24959e0 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -112,6 +112,7 @@ static void mips_jazz_init(MemoryRegion *address_space,
 {
     char *filename;
     int bios_size, n;
+    MIPSCPU *cpu;
     CPUMIPSState *env;
     qemu_irq *rc4030, *i8259;
     rc4030_dma *dmas;
@@ -140,11 +141,12 @@ static void mips_jazz_init(MemoryRegion *address_space,
         cpu_model = "24Kf";
 #endif
     }
-    env = cpu_init(cpu_model);
-    if (!env) {
+    cpu = cpu_mips_init(cpu_model);
+    if (cpu == NULL) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
+    env = &cpu->env;
     qemu_register_reset(main_cpu_reset, env);
 
     /* allocate RAM */
-- 
1.7.7

[Qemu-devel] [PATCH next v2 65/74] mips_jazz: Pass MIPSCPU to main_cpu_reset()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/mips_jazz.c |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 24959e0..bf1b799 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -50,8 +50,9 @@ enum jazz_model_e
 
 static void main_cpu_reset(void *opaque)
 {
-    CPUMIPSState *env = opaque;
-    cpu_state_reset(env);
+    MIPSCPU *cpu = opaque;
+
+    cpu_reset(CPU(cpu));
 }
 
 static uint64_t rtc_read(void *opaque, target_phys_addr_t addr, unsigned size)
@@ -147,7 +148,7 @@ static void mips_jazz_init(MemoryRegion *address_space,
         exit(1);
     }
     env = &cpu->env;
-    qemu_register_reset(main_cpu_reset, env);
+    qemu_register_reset(main_cpu_reset, cpu);
 
     /* allocate RAM */
     memory_region_init_ram(ram, "mips_jazz.ram", ram_size);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 66/74] mips_malta: Use cpu_mips_init() to obtain MIPSCPU

[Andreas Färber]

Needed for main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/mips_malta.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 4752bb2..d81e8d5 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -788,6 +788,7 @@ void mips_malta_init (ram_addr_t ram_size,
     int64_t kernel_entry;
     PCIBus *pci_bus;
     ISABus *isa_bus;
+    MIPSCPU *cpu;
     CPUMIPSState *env;
     qemu_irq *isa_irq;
     qemu_irq *cpu_exit_irq;
@@ -825,11 +826,13 @@ void mips_malta_init (ram_addr_t ram_size,
     }
 
     for (i = 0; i < smp_cpus; i++) {
-        env = cpu_init(cpu_model);
-        if (!env) {
+        cpu = cpu_mips_init(cpu_model);
+        if (cpu == NULL) {
             fprintf(stderr, "Unable to find CPU definition\n");
             exit(1);
         }
+        env = &cpu->env;
+
         /* Init internal devices */
         cpu_mips_irq_init_cpu(env);
         cpu_mips_clock_init(env);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 67/74] mips_malta: Pass MIPSCPU to main_cpu_reset()

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/mips_malta.c |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index d81e8d5..dfd7b6b 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -751,8 +751,10 @@ static void malta_mips_config(CPUMIPSState *env)
 
 static void main_cpu_reset(void *opaque)
 {
-    CPUMIPSState *env = opaque;
-    cpu_state_reset(env);
+    MIPSCPU *cpu = opaque;
+    CPUMIPSState *env = &cpu->env;
+
+    cpu_reset(CPU(cpu));
 
     /* The bootloader does not need to be rewritten as it is located in a
        read only location. The kernel location and the arguments table
@@ -836,7 +838,7 @@ void mips_malta_init (ram_addr_t ram_size,
         /* Init internal devices */
         cpu_mips_irq_init_cpu(env);
         cpu_mips_clock_init(env);
-        qemu_register_reset(main_cpu_reset, env);
+        qemu_register_reset(main_cpu_reset, cpu);
     }
     env = first_cpu;
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 68/74] mips_mipssim: Use cpu_mips_init() to obtain MIPSCPU

[Andreas Färber]

Needed for main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/mips_mipssim.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c
index 1ea7b58..7c510da 100644
--- a/hw/mips_mipssim.c
+++ b/hw/mips_mipssim.c
@@ -140,6 +140,7 @@ mips_mipssim_init (ram_addr_t ram_size,
     MemoryRegion *address_space_mem = get_system_memory();
     MemoryRegion *ram = g_new(MemoryRegion, 1);
     MemoryRegion *bios = g_new(MemoryRegion, 1);
+    MIPSCPU *cpu;
     CPUMIPSState *env;
     ResetData *reset_info;
     int bios_size;
@@ -152,11 +153,13 @@ mips_mipssim_init (ram_addr_t ram_size,
         cpu_model = "24Kf";
 #endif
     }
-    env = cpu_init(cpu_model);
-    if (!env) {
+    cpu = cpu_mips_init(cpu_model);
+    if (cpu == NULL) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
+    env = &cpu->env;
+
     reset_info = g_malloc0(sizeof(ResetData));
     reset_info->env = env;
     reset_info->vector = env->active_tc.PC;
-- 
1.7.7

[Qemu-devel] [PATCH next v2 69/74] mips_mipssim: Store MIPSCPU in ResetData

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset() in
main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/mips_mipssim.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c
index 7c510da..eb03047 100644
--- a/hw/mips_mipssim.c
+++ b/hw/mips_mipssim.c
@@ -46,7 +46,7 @@ static struct _loaderparams {
 } loaderparams;
 
 typedef struct ResetData {
-    CPUMIPSState *env;
+    MIPSCPU *cpu;
     uint64_t vector;
 } ResetData;
 
@@ -105,9 +105,9 @@ static int64_t load_kernel(void)
 static void main_cpu_reset(void *opaque)
 {
     ResetData *s = (ResetData *)opaque;
-    CPUMIPSState *env = s->env;
+    CPUMIPSState *env = &s->cpu->env;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(s->cpu));
     env->active_tc.PC = s->vector & ~(target_ulong)1;
     if (s->vector & 1) {
         env->hflags |= MIPS_HFLAG_M16;
@@ -161,7 +161,7 @@ mips_mipssim_init (ram_addr_t ram_size,
     env = &cpu->env;
 
     reset_info = g_malloc0(sizeof(ResetData));
-    reset_info->env = env;
+    reset_info->cpu = cpu;
     reset_info->vector = env->active_tc.PC;
     qemu_register_reset(main_cpu_reset, reset_info);
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 70/74] mips_r4k: Use cpu_mips_init() to obtain MIPSCPU

[Andreas Färber]

Needed for main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/mips_r4k.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c
index e2da49c..f89957c 100644
--- a/hw/mips_r4k.c
+++ b/hw/mips_r4k.c
@@ -162,6 +162,7 @@ void mips_r4k_init (ram_addr_t ram_size,
     MemoryRegion *bios;
     MemoryRegion *iomem = g_new(MemoryRegion, 1);
     int bios_size;
+    MIPSCPU *cpu;
     CPUMIPSState *env;
     ResetData *reset_info;
     int i;
@@ -179,11 +180,13 @@ void mips_r4k_init (ram_addr_t ram_size,
         cpu_model = "24Kf";
 #endif
     }
-    env = cpu_init(cpu_model);
-    if (!env) {
+    cpu = cpu_mips_init(cpu_model);
+    if (cpu == NULL) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
+    env = &cpu->env;
+
     reset_info = g_malloc0(sizeof(ResetData));
     reset_info->env = env;
     reset_info->vector = env->active_tc.PC;
-- 
1.7.7

[Qemu-devel] [PATCH next v2 71/74] mips_r4k: Store MIPSCPU in ResetData

[Andreas Färber]

Allows us to use cpu_reset() in place of cpu_state_reset() in
main_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/mips_r4k.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c
index f89957c..d685999 100644
--- a/hw/mips_r4k.c
+++ b/hw/mips_r4k.c
@@ -65,7 +65,7 @@ static const MemoryRegionOps mips_qemu_ops = {
 };
 
 typedef struct ResetData {
-    CPUMIPSState *env;
+    MIPSCPU *cpu;
     uint64_t vector;
 } ResetData;
 
@@ -143,9 +143,9 @@ static int64_t load_kernel(void)
 static void main_cpu_reset(void *opaque)
 {
     ResetData *s = (ResetData *)opaque;
-    CPUMIPSState *env = s->env;
+    CPUMIPSState *env = &s->cpu->env;
 
-    cpu_state_reset(env);
+    cpu_reset(CPU(s->cpu));
     env->active_tc.PC = s->vector;
 }
 
@@ -188,7 +188,7 @@ void mips_r4k_init (ram_addr_t ram_size,
     env = &cpu->env;
 
     reset_info = g_malloc0(sizeof(ResetData));
-    reset_info->env = env;
+    reset_info->cpu = cpu;
     reset_info->vector = env->active_tc.PC;
     qemu_register_reset(main_cpu_reset, reset_info);
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 72/74] bsd-user: Use cpu_reset() in after cpu_init()

[Andreas Färber]

Eliminates cpu_state_reset() usage.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 bsd-user/main.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index 0689e38..cd33d65 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -918,7 +918,7 @@ int main(int argc, char **argv)
         exit(1);
     }
 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
-    cpu_state_reset(env);
+    cpu_reset(ENV_GET_CPU(env));
 #endif
     thread_env = env;
 
-- 
1.7.7

[Qemu-devel] [PATCH next v2 73/74] linux-user: Use cpu_reset() after cpu_init() / cpu_copy()

[Andreas Färber]

Eliminates cpu_state_reset() usage.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 linux-user/main.c    |    2 +-
 linux-user/syscall.c |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/linux-user/main.c b/linux-user/main.c
index 191b750..49108b8 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -3405,7 +3405,7 @@ int main(int argc, char **argv, char **envp)
         exit(1);
     }
 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
-    cpu_state_reset(env);
+    cpu_reset(ENV_GET_CPU(env));
 #endif
 
     thread_env = env;
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 20d2a74..539af3f 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -4262,7 +4262,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
         /* we create a new CPU instance. */
         new_env = cpu_copy(env);
 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
-        cpu_state_reset(new_env);
+        cpu_reset(ENV_GET_CPU(new_env));
 #endif
         /* Init regs that differ from the parent.  */
         cpu_clone_regs(new_env, newsp);
-- 
1.7.7

[Qemu-devel] [PATCH next v2 74/74] Kill off cpu_state_reset()

[Andreas Färber]

In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset()
was renamed to cpu_state_reset(), to allow introducing a new cpu_reset()
that would operate on QOM objects.

All callers have been updated except for one in target-mips, so drop all
implementations except for the one in target-mips and move the
declaration there until MIPSCPU reset can be fully QOM'ified.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc> (for lm32)
---
 cpu-all.h                     |    1 -
 target-arm/helper.c           |    5 -----
 target-cris/translate.c       |    5 -----
 target-i386/helper.c          |    6 ------
 target-lm32/helper.c          |    6 ------
 target-m68k/helper.c          |    5 -----
 target-microblaze/translate.c |    5 -----
 target-mips/cpu.h             |    3 +++
 target-ppc/helper.c           |    5 -----
 target-s390x/helper.c         |    9 +--------
 target-sh4/translate.c        |    5 -----
 target-sparc/cpu.c            |    5 -----
 target-xtensa/helper.c        |    5 -----
 13 files changed, 4 insertions(+), 61 deletions(-)

diff --git a/cpu-all.h b/cpu-all.h
index 028528f..3a93c0c 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -443,7 +443,6 @@ void cpu_watchpoint_remove_all(CPUArchState *env, int mask);
 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 
 void cpu_single_step(CPUArchState *env, int enabled);
-void cpu_state_reset(CPUArchState *s);
 int cpu_is_stopped(CPUArchState *env);
 void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data);
 
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 06ebffc..bbb1d05 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -4,11 +4,6 @@
 #include "host-utils.h"
 #include "sysemu.h"
 
-void cpu_state_reset(CPUARMState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 static int vfp_gdb_get_reg(CPUARMState *env, uint8_t *buf, int reg)
 {
     int nregs;
diff --git a/target-cris/translate.c b/target-cris/translate.c
index eed03d3..1ad9ec7 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3576,11 +3576,6 @@ CRISCPU *cpu_cris_init(const char *cpu_model)
     return cpu;
 }
 
-void cpu_state_reset(CPUCRISState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 void restore_state_to_opc(CPUCRISState *env, TranslationBlock *tb, int pc_pos)
 {
 	env->pc = gen_opc_pc[pc_pos];
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 4577cae..1c3246b 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -26,12 +26,6 @@
 
 //#define DEBUG_MMU
 
-/* NOTE: must be called outside the CPU execute loop */
-void cpu_state_reset(CPUX86State *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 static void cpu_x86_version(CPUX86State *env, int *family, int *model)
 {
     int cpuver = env->cpuid_version;
diff --git a/target-lm32/helper.c b/target-lm32/helper.c
index 3b1cee7..1ea477f 100644
--- a/target-lm32/helper.c
+++ b/target-lm32/helper.c
@@ -233,9 +233,3 @@ void cpu_lm32_set_phys_msb_ignore(CPULM32State *env, int value)
         env->flags &= ~LM32_FLAG_IGNORE_MSB;
     }
 }
-
-void cpu_state_reset(CPULM32State *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index f428375..eac0053 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -98,11 +98,6 @@ static int fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
     return 0;
 }
 
-void cpu_state_reset(CPUM68KState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 CPUM68KState *cpu_m68k_init(const char *cpu_model)
 {
     M68kCPU *cpu;
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index afa6255..87b2fe1 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1939,11 +1939,6 @@ MicroBlazeCPU *cpu_mb_init(const char *cpu_model)
     return cpu;
 }
 
-void cpu_state_reset(CPUMBState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb, int pc_pos)
 {
     env->sregs[SR_PC] = gen_opc_pc[pc_pos];
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index c7c9cb9..ce3467f 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -637,6 +637,9 @@ static inline CPUMIPSState *cpu_init(const char *cpu_model)
     return &cpu->env;
 }
 
+/* TODO QOM'ify CPU reset and remove */
+void cpu_state_reset(CPUMIPSState *s);
+
 /* mips_timer.c */
 uint32_t cpu_mips_get_random (CPUMIPSState *env);
 uint32_t cpu_mips_get_count (CPUMIPSState *env);
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 42f66e8..f556f85 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -3186,11 +3186,6 @@ void cpu_dump_rfi (target_ulong RA, target_ulong msr)
              TARGET_FMT_lx "\n", RA, msr);
 }
 
-void cpu_state_reset(CPUPPCState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 PowerPCCPU *cpu_ppc_init(const char *cpu_model)
 {
     PowerPCCPU *cpu;
diff --git a/target-s390x/helper.c b/target-s390x/helper.c
index 209a696..a34a35b 100644
--- a/target-s390x/helper.c
+++ b/target-s390x/helper.c
@@ -106,14 +106,7 @@ int cpu_s390x_handle_mmu_fault (CPUS390XState *env, target_ulong address, int rw
     return 1;
 }
 
-#endif /* CONFIG_USER_ONLY */
-
-void cpu_state_reset(CPUS390XState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
-#ifndef CONFIG_USER_ONLY
+#else /* !CONFIG_USER_ONLY */
 
 /* Ensure to exit the TB after this call! */
 static void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilc)
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 7d35b84..6532ad2 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -178,11 +178,6 @@ void cpu_dump_state(CPUSH4State * env, FILE * f,
     }
 }
 
-void cpu_state_reset(CPUSH4State *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 typedef struct {
     const char *name;
     int id;
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index 8ccac23..f7c004c 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -23,11 +23,6 @@
 
 static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model);
 
-void cpu_state_reset(CPUSPARCState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 /* CPUClass::reset() */
 static void sparc_cpu_reset(CPUState *s)
 {
diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
index e6cb3fe..5e7e72e 100644
--- a/target-xtensa/helper.c
+++ b/target-xtensa/helper.c
@@ -33,11 +33,6 @@
 #include "hw/loader.h"
 #endif
 
-void cpu_state_reset(CPUXtensaState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 static struct XtensaConfigList *xtensa_cores;
 
 void xtensa_register_core(XtensaConfigList *node)
-- 
1.7.7

Re: [Qemu-devel] [PATCH next v2 34/74] omap: Use cpu_arm_init() to store ARMCPU in omap_mpu_state_s

[Peter Maydell]

On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
> Fix tab indentations of comments, add braces, use cpu_reset().
>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  hw/nseries.c  |    6 +++---
>  hw/omap.h     |    2 +-
>  hw/omap1.c    |   20 +++++++++++---------
>  hw/omap2.c    |    8 ++++----
>  hw/omap_sx1.c |    2 +-
>  hw/palm.c     |    2 +-
>  6 files changed, 21 insertions(+), 19 deletions(-)

There are some structs here which use the name 'cpu' for
a 'struct omap_mpu_state_s *', which leads to ugliness
like s->cpu->cpu->env. (We shouldn't be trying to fix that
here, just a passing comment.)

Acked-by: Peter Maydell <peter.maydell@linaro.org>

(For the avoidance of doubt, acked-by for me means "I've
looked at this patch and it looks generally but I have not
tested it or otherwise given it the more detailed scrutiny
I would for a reviewed-by tag".)

-- PMM

Re: [Qemu-devel] [PATCH next v2 37/74] arm_boot: Pass ARMCPU to do_cpu_reset()

[Peter Maydell]

On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
> Allows us to use cpu_reset() in place of cpu_state_reset().
>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  hw/arm_boot.c |    9 ++++++---
>  1 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/hw/arm_boot.c b/hw/arm_boot.c
> index 7447f5c..eb2d176 100644
> --- a/hw/arm_boot.c
> +++ b/hw/arm_boot.c
> @@ -274,10 +274,11 @@ static int load_dtb(target_phys_addr_t addr, const struct arm_boot_info *binfo)
>
>  static void do_cpu_reset(void *opaque)
>  {
> -    CPUARMState *env = opaque;
> +    ARMCPU *cpu = opaque;
> +    CPUARMState *env = &cpu->env;
>     const struct arm_boot_info *info = env->boot_info;
>
> -    cpu_state_reset(env);
> +    cpu_reset(CPU(cpu));

(Sadface for QOM method invocation requiring the explicit cast to
base class...)

>     if (info) {
>         if (!info->is_linux) {
>             /* Jump to the entry point.  */
> @@ -302,6 +303,7 @@ static void do_cpu_reset(void *opaque)
>
>  void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
>  {
> +    ARMCPU *cpu;
>     int kernel_size;
>     int initrd_size;
>     int n;

This variable could be kept in the more limited scope inside
the for loop below, right?

> @@ -406,7 +408,8 @@ void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
>     info->is_linux = is_linux;
>
>     for (; env; env = env->next_cpu) {
> +        cpu = arm_env_get_cpu(env);
>         env->boot_info = info;
> -        qemu_register_reset(do_cpu_reset, env);
> +        qemu_register_reset(do_cpu_reset, cpu);
>     }
>  }
> --
> 1.7.7
>
>


-- PMM

Re: [Qemu-devel] [PATCH next v2 37/74] arm_boot: Pass ARMCPU to do_cpu_reset()

[Andreas Färber]

Am 10.05.2012 23:41, schrieb Peter Maydell:
> On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
>> Allows us to use cpu_reset() in place of cpu_state_reset().
>>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>> ---
>>  hw/arm_boot.c |    9 ++++++---
>>  1 files changed, 6 insertions(+), 3 deletions(-)
>>
>> diff --git a/hw/arm_boot.c b/hw/arm_boot.c
>> index 7447f5c..eb2d176 100644
>> --- a/hw/arm_boot.c
>> +++ b/hw/arm_boot.c
[...]
>> @@ -302,6 +303,7 @@ static void do_cpu_reset(void *opaque)
>>
>>  void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
>>  {
>> +    ARMCPU *cpu;
>>     int kernel_size;
>>     int initrd_size;
>>     int n;
> 
> This variable could be kept in the more limited scope inside
> the for loop below, right?

It could. The function currently has a CPUARMState *env argument. That
is supposed to change to ARMCPU *cpu in one of the followup series, in
which case the for loop can reuse that parameter. I generally try to
keep cpu and env close together so that it's visible in diff/grep
context, as explained for your cpu_reset_model_id() series.

Would you like it better if I unneededly assigned ARMCPU *cpu =
arm_env_get_cpu(env); to show its relation to env? The next step would
be to pass cpu through to the write_secondary_boot callback.

I have not included the signature changes for arm_load_kernel() or the
callback in this series because it requires comparable changes to more
actively maintained machines such as exynos and highbank and would've
made it even longer. I'd be happy to reprioritize such a series though
if you're willing to review it and handle any arising conflicts. :)

/-F

>> @@ -406,7 +408,8 @@ void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
>>     info->is_linux = is_linux;
>>
>>     for (; env; env = env->next_cpu) {
>> +        cpu = arm_env_get_cpu(env);
>>         env->boot_info = info;
>> -        qemu_register_reset(do_cpu_reset, env);
>> +        qemu_register_reset(do_cpu_reset, cpu);
>>     }
>>  }
>> --
>> 1.7.7

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 37/74] arm_boot: Pass ARMCPU to do_cpu_reset()

[Peter Maydell]

On 10 May 2012 23:40, Andreas Färber <afaerber@suse.de> wrote:
> Am 10.05.2012 23:41, schrieb Peter Maydell:
>> On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
>>> Allows us to use cpu_reset() in place of cpu_state_reset().
>>>
>>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>>> ---
>>>  hw/arm_boot.c |    9 ++++++---
>>>  1 files changed, 6 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/hw/arm_boot.c b/hw/arm_boot.c
>>> index 7447f5c..eb2d176 100644
>>> --- a/hw/arm_boot.c
>>> +++ b/hw/arm_boot.c
> [...]
>>> @@ -302,6 +303,7 @@ static void do_cpu_reset(void *opaque)
>>>
>>>  void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
>>>  {
>>> +    ARMCPU *cpu;
>>>     int kernel_size;
>>>     int initrd_size;
>>>     int n;
>>
>> This variable could be kept in the more limited scope inside
>> the for loop below, right?
>
> It could. The function currently has a CPUARMState *env argument. That
> is supposed to change to ARMCPU *cpu in one of the followup series, in
> which case the for loop can reuse that parameter. I generally try to
> keep cpu and env close together so that it's visible in diff/grep
> context, as explained for your cpu_reset_model_id() series.

Ah, I see.

Acked-by: Peter Maydell <peter.maydell@linaro.org>

-- PMM

Re: [Qemu-devel] [PATCH next v2 33/74] pxa2xx: Use cpu_arm_init() and store ARMCPU

[Peter Maydell]

On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
> Also use cpu_reset() in place of cpu_state_reset().
>
> Signed-off-by: Andreas Färber <afaerber@suse.de>

The pxa2xx stuff is probably going to clash with the cp15
rework, but I guess we'll sort that out when one or the
other of these series hits master.

Acked-by: Peter Maydell <peter.maydell@linaro.org>

(The stuff pxa2xx.c is doing to CPUARMState is a really
gross layering violation, incidentally.)

-- PMM

Re: [Qemu-devel] [PATCH next v2 35/74] armv7m: Use cpu_arm_init() to obtain ARMCPU

[Peter Maydell]

On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
> Needed for armv7m_reset().
>
> Signed-off-by: Andreas Färber <afaerber@suse.de>

Acked-by: Peter Maydell <peter.maydell@linaro.org>

I'd have preferred it if you hadn't made the style change
from "if (!foo)" to "if (foo == NULL)", incidentally, but I'm
not going to insist on a respin for it.

-- PMM

Re: [Qemu-devel] [PATCH next v2 36/74] armv7m: Pass ARMCPU to armv7m_reset()

[Peter Maydell]

On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
> Allows us to use cpu_reset() in place of cpu_state_reset().
>
> Signed-off-by: Andreas Färber <afaerber@suse.de>

Acked-by: Peter Maydell <peter.maydell@linaro.org>


-- PMM

Re: [Qemu-devel] [PATCH next v2 73/74] linux-user: Use cpu_reset() after cpu_init() / cpu_copy()

[Peter Maydell]

On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
> Eliminates cpu_state_reset() usage.
>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  linux-user/main.c    |    2 +-
>  linux-user/syscall.c |    2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/linux-user/main.c b/linux-user/main.c
> index 191b750..49108b8 100644
> --- a/linux-user/main.c
> +++ b/linux-user/main.c
> @@ -3405,7 +3405,7 @@ int main(int argc, char **argv, char **envp)
>         exit(1);
>     }
>  #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
> -    cpu_state_reset(env);
> +    cpu_reset(ENV_GET_CPU(env));
>  #endif
>
>     thread_env = env;
> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
> index 20d2a74..539af3f 100644
> --- a/linux-user/syscall.c
> +++ b/linux-user/syscall.c
> @@ -4262,7 +4262,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
>         /* we create a new CPU instance. */
>         new_env = cpu_copy(env);
>  #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
> -        cpu_state_reset(new_env);
> +        cpu_reset(ENV_GET_CPU(new_env));
>  #endif
>         /* Init regs that differ from the parent.  */
>         cpu_clone_regs(new_env, newsp);
> --

Do you have any plans to try to rationalise the handling of reset
so that we consistently either do or don't reset the cpu here,
rather than having it done based on a TARGET_* ifdef ?

-- PMM

Re: [Qemu-devel] [PATCH next v2 33/74] pxa2xx: Use cpu_arm_init() and store ARMCPU

[Andreas Färber]

Am 11.05.2012 13:16, schrieb Peter Maydell:
> On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
>> Also use cpu_reset() in place of cpu_state_reset().
>>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
> 
> The pxa2xx stuff is probably going to clash with the cp15
> rework, but I guess we'll sort that out when one or the
> other of these series hits master.

My plan is to pull cp15 in to qom-next actually. :)
I hope to get the ARM parts of this series applied and anything needed
for cpu_copy(), then some way to fix cpu_copy(), and then apply your
cp15 on top. That's the whole point of qom-next: avoiding clashes on master.

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 01/74] target-arm: Use cpu_reset() in cpu_arm_init()

[Peter Maydell]

On 10 May 2012 01:13, Andreas Färber <afaerber@suse.de> wrote:
> Commit 3c30dd5a68e9fee6af67cfd0d14ed7520820f36a (target-arm: Move reset
> handling to arm_cpu_reset) QOM'ified CPU reset. Complete it by replacing
> cpu_state_reset() with cpu_reset().
>
> Signed-off-by: Andreas Färber <afaerber@suse.de>

Acked-by: Peter Maydell <peter.maydell@linaro.org>

-- PMM

Re: [Qemu-devel] [PATCH next v2 73/74] linux-user: Use cpu_reset() after cpu_init() / cpu_copy()

[Andreas Färber]

Am 11.05.2012 13:22, schrieb Peter Maydell:
> On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
>> Eliminates cpu_state_reset() usage.
>>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>> ---
>>  linux-user/main.c    |    2 +-
>>  linux-user/syscall.c |    2 +-
>>  2 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/linux-user/main.c b/linux-user/main.c
>> index 191b750..49108b8 100644
>> --- a/linux-user/main.c
>> +++ b/linux-user/main.c
>> @@ -3405,7 +3405,7 @@ int main(int argc, char **argv, char **envp)
>>         exit(1);
>>     }
>>  #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
>> -    cpu_state_reset(env);
>> +    cpu_reset(ENV_GET_CPU(env));
>>  #endif
>>
>>     thread_env = env;
>> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
>> index 20d2a74..539af3f 100644
>> --- a/linux-user/syscall.c
>> +++ b/linux-user/syscall.c
>> @@ -4262,7 +4262,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
>>         /* we create a new CPU instance. */
>>         new_env = cpu_copy(env);
>>  #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
>> -        cpu_state_reset(new_env);
>> +        cpu_reset(ENV_GET_CPU(new_env));
>>  #endif
>>         /* Init regs that differ from the parent.  */
>>         cpu_clone_regs(new_env, newsp);
>> --
> 
> Do you have any plans to try to rationalise the handling of reset
> so that we consistently either do or don't reset the cpu here,
> rather than having it done based on a TARGET_* ifdef ?

Igor had an RFC for x86; sparc and ppc reset I haven't looked into yet.
Cc'ing Alex and Blue.

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 73/74] linux-user: Use cpu_reset() after cpu_init() / cpu_copy()

[Alexander Graf]

On 11.05.2012, at 13:26, Andreas Färber wrote:

> Am 11.05.2012 13:22, schrieb Peter Maydell:
>> On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
>>> Eliminates cpu_state_reset() usage.
>>> 
>>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>>> ---
>>> linux-user/main.c    |    2 +-
>>> linux-user/syscall.c |    2 +-
>>> 2 files changed, 2 insertions(+), 2 deletions(-)
>>> 
>>> diff --git a/linux-user/main.c b/linux-user/main.c
>>> index 191b750..49108b8 100644
>>> --- a/linux-user/main.c
>>> +++ b/linux-user/main.c
>>> @@ -3405,7 +3405,7 @@ int main(int argc, char **argv, char **envp)
>>>        exit(1);
>>>    }
>>> #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
>>> -    cpu_state_reset(env);
>>> +    cpu_reset(ENV_GET_CPU(env));
>>> #endif
>>> 
>>>    thread_env = env;
>>> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
>>> index 20d2a74..539af3f 100644
>>> --- a/linux-user/syscall.c
>>> +++ b/linux-user/syscall.c
>>> @@ -4262,7 +4262,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
>>>        /* we create a new CPU instance. */
>>>        new_env = cpu_copy(env);
>>> #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
>>> -        cpu_state_reset(new_env);
>>> +        cpu_reset(ENV_GET_CPU(new_env));
>>> #endif
>>>        /* Init regs that differ from the parent.  */
>>>        cpu_clone_regs(new_env, newsp);
>>> --
>> 
>> Do you have any plans to try to rationalise the handling of reset
>> so that we consistently either do or don't reset the cpu here,
>> rather than having it done based on a TARGET_* ifdef ?
> 
> Igor had an RFC for x86; sparc and ppc reset I haven't looked into yet.
> Cc'ing Alex and Blue.

Why would you ever not want to reset the CPU for a new thread?


Alex

Re: [Qemu-devel] [PATCH next v2 64/74] mips_jazz: Use cpu_mips_init() to obtain MIPSCPU

[Andreas Färber]

Am 10.05.2012 02:14, schrieb Andreas Färber:
> Needed for main_cpu_reset().
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>

Got to forget something:

Acked-by: Hervé Poussineau <hpoussin@reactos.org>

Depends on the target-mips patch though, so need a review of that from
someone first.

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 65/74] mips_jazz: Pass MIPSCPU to main_cpu_reset()

[Andreas Färber]

Am 10.05.2012 02:14, schrieb Andreas Färber:
> Allows us to use cpu_reset() in place of cpu_state_reset().
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>

Forgot:

Acked-by: Hervé Poussineau <hpoussin@reactos.org>

/-F

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SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 73/74] linux-user: Use cpu_reset() after cpu_init() / cpu_copy()

[Peter Maydell]

On 11 May 2012 12:28, Alexander Graf <agraf@suse.de> wrote:
>
> On 11.05.2012, at 13:26, Andreas Färber wrote:
>
>> Am 11.05.2012 13:22, schrieb Peter Maydell:
>>> On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
>>>> Eliminates cpu_state_reset() usage.
>>>>
>>>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>>>> ---
>>>> linux-user/main.c    |    2 +-
>>>> linux-user/syscall.c |    2 +-
>>>> 2 files changed, 2 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/linux-user/main.c b/linux-user/main.c
>>>> index 191b750..49108b8 100644
>>>> --- a/linux-user/main.c
>>>> +++ b/linux-user/main.c
>>>> @@ -3405,7 +3405,7 @@ int main(int argc, char **argv, char **envp)
>>>>        exit(1);
>>>>    }
>>>> #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
>>>> -    cpu_state_reset(env);
>>>> +    cpu_reset(ENV_GET_CPU(env));
>>>> #endif
>>>>
>>>>    thread_env = env;
>>>> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
>>>> index 20d2a74..539af3f 100644
>>>> --- a/linux-user/syscall.c
>>>> +++ b/linux-user/syscall.c
>>>> @@ -4262,7 +4262,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
>>>>        /* we create a new CPU instance. */
>>>>        new_env = cpu_copy(env);
>>>> #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
>>>> -        cpu_state_reset(new_env);
>>>> +        cpu_reset(ENV_GET_CPU(new_env));
>>>> #endif
>>>>        /* Init regs that differ from the parent.  */
>>>>        cpu_clone_regs(new_env, newsp);
>>>> --
>>>
>>> Do you have any plans to try to rationalise the handling of reset
>>> so that we consistently either do or don't reset the cpu here,
>>> rather than having it done based on a TARGET_* ifdef ?
>>
>> Igor had an RFC for x86; sparc and ppc reset I haven't looked into yet.
>> Cc'ing Alex and Blue.
>
> Why would you ever not want to reset the CPU for a new thread?

The question is whether cpu_copy() and cpu_init() give you back a
CPU object which has been already reset, or one which you need to
reset yourself. At the moment I think we differ between targets
about this (eg cpu_arm_init() calls cpu_state_reset()).

(Also, "copy this CPU so it has the same register contents as this
other one" followed by "reset it" is pretty weird, what is the
thing we need to copy that means we can't do a cpu_init() of a
fresh clean CPU?)

-- PMM

Re: [Qemu-devel] [PATCH next v2 73/74] linux-user: Use cpu_reset() after cpu_init() / cpu_copy()

[Andreas Färber]

Am 11.05.2012 13:28, schrieb Alexander Graf:
> 
> On 11.05.2012, at 13:26, Andreas Färber wrote:
> 
>> Am 11.05.2012 13:22, schrieb Peter Maydell:
>>> On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
>>>> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
>>>> index 20d2a74..539af3f 100644
>>>> --- a/linux-user/syscall.c
>>>> +++ b/linux-user/syscall.c
>>>> @@ -4262,7 +4262,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
>>>>        /* we create a new CPU instance. */
>>>>        new_env = cpu_copy(env);
>>>> #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
>>>> -        cpu_state_reset(new_env);
>>>> +        cpu_reset(ENV_GET_CPU(new_env));
>>>> #endif
>>>>        /* Init regs that differ from the parent.  */
>>>>        cpu_clone_regs(new_env, newsp);
>>>> --
>>>
>>> Do you have any plans to try to rationalise the handling of reset
>>> so that we consistently either do or don't reset the cpu here,
>>> rather than having it done based on a TARGET_* ifdef ?
>>
>> Igor had an RFC for x86; sparc and ppc reset I haven't looked into yet.
>> Cc'ing Alex and Blue.
> 
> Why would you ever not want to reset the CPU for a new thread?

cpu_copy() -> cpu_init() do so themselves for some architectures.

Andreas

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SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 01/74] target-arm: Use cpu_reset() in cpu_arm_init()

[Andreas Färber]

Am 11.05.2012 13:24, schrieb Peter Maydell:
> On 10 May 2012 01:13, Andreas Färber <afaerber@suse.de> wrote:
>> Commit 3c30dd5a68e9fee6af67cfd0d14ed7520820f36a (target-arm: Move reset
>> handling to arm_cpu_reset) QOM'ified CPU reset. Complete it by replacing
>> cpu_state_reset() with cpu_reset().
>>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
> 
> Acked-by: Peter Maydell <peter.maydell@linaro.org>

Thanks, applied to qom-next:
http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next

/-F

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SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 33/74] pxa2xx: Use cpu_arm_init() and store ARMCPU

[Andreas Färber]

Am 11.05.2012 13:16, schrieb Peter Maydell:
> On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
>> Also use cpu_reset() in place of cpu_state_reset().
>>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
> 
> The pxa2xx stuff is probably going to clash with the cp15
> rework, but I guess we'll sort that out when one or the
> other of these series hits master.
> 
> Acked-by: Peter Maydell <peter.maydell@linaro.org>

Thanks, applied to qom-next:
http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next

/-F

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 34/74] omap: Use cpu_arm_init() to store ARMCPU in omap_mpu_state_s

[Andreas Färber]

Am 10.05.2012 23:38, schrieb Peter Maydell:
> On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
>> Fix tab indentations of comments, add braces, use cpu_reset().
>>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>> ---
>>  hw/nseries.c  |    6 +++---
>>  hw/omap.h     |    2 +-
>>  hw/omap1.c    |   20 +++++++++++---------
>>  hw/omap2.c    |    8 ++++----
>>  hw/omap_sx1.c |    2 +-
>>  hw/palm.c     |    2 +-
>>  6 files changed, 21 insertions(+), 19 deletions(-)
> 
> There are some structs here which use the name 'cpu' for
> a 'struct omap_mpu_state_s *', which leads to ugliness
> like s->cpu->cpu->env. (We shouldn't be trying to fix that
> here, just a passing comment.)
> 
> Acked-by: Peter Maydell <peter.maydell@linaro.org>

Thanks, applied to qom-next:
http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next

Now that we have qom-next, we are no longer limited to the concept of
self-contained series so I can try to turn that into s->mpu->cpu->env
the weekend. Not perfect either, but better distinguishable.

Andreas

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SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 35/74] armv7m: Use cpu_arm_init() to obtain ARMCPU

[Andreas Färber]

Am 11.05.2012 13:18, schrieb Peter Maydell:
> On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
>> Needed for armv7m_reset().
>>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
> 
> Acked-by: Peter Maydell <peter.maydell@linaro.org>

Thanks, applied to qom-next:
http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next

> I'd have preferred it if you hadn't made the style change
> from "if (!foo)" to "if (foo == NULL)", incidentally, but I'm
> not going to insist on a respin for it.

For the record, Peter's request here was to not propagate such stylistic
changes unneccessarily throughout old code. In these two cases on one
line I added the missing opening brace and on the other I had to change
the variable name so it does not add to the patch.

Both styles are valid C and can be expected to produce identical machine
code with an optimizing compiler.

What we might do though is assist the compiler in determining which code
paths are likely() vs. unlikely(). For stylistic reasons I prefer to
have the unlikely error case in the if, e.g. in cpu_sh4_init(). These
are not hot paths though so it shouldn't matter much.

/-F

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GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 36/74] armv7m: Pass ARMCPU to armv7m_reset()

[Andreas Färber]

Am 11.05.2012 13:19, schrieb Peter Maydell:
> On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
>> Allows us to use cpu_reset() in place of cpu_state_reset().
>>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
> 
> Acked-by: Peter Maydell <peter.maydell@linaro.org>

Thanks, applied to qom-next:
http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next

/-F

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 37/74] arm_boot: Pass ARMCPU to do_cpu_reset()

[Andreas Färber]

Am 11.05.2012 09:17, schrieb Peter Maydell:
> On 10 May 2012 23:40, Andreas Färber <afaerber@suse.de> wrote:
>> Am 10.05.2012 23:41, schrieb Peter Maydell:
>>> On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
>>>> Allows us to use cpu_reset() in place of cpu_state_reset().
>>>>
>>>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>>>> ---
>>>>  hw/arm_boot.c |    9 ++++++---
>>>>  1 files changed, 6 insertions(+), 3 deletions(-)
> 
> Acked-by: Peter Maydell <peter.maydell@linaro.org>

Thanks, applied to qom-next:
http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next

/-F

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 41/74] target-lm32: Let cpu_lm32_init() return LM32CPU

[Michael Walle]

> Make the include paths for cpu-qom.h consistent to allow using LM32CPU
> in cpu.h.
> 
> Turn cpu_init macro into a static inline function returning CPULM32State
> for backwards compatibility.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc>

-- 
Michael

Re: [Qemu-devel] [PATCH next v2 33/74] pxa2xx: Use cpu_arm_init() and store ARMCPU

[andrzej zaborowski]

On 11 May 2012 13:16, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
>> Also use cpu_reset() in place of cpu_state_reset().
>>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>
> The pxa2xx stuff is probably going to clash with the cp15
> rework, but I guess we'll sort that out when one or the
> other of these series hits master.
>
> Acked-by: Peter Maydell <peter.maydell@linaro.org>

Also looks good to me.

>
> (The stuff pxa2xx.c is doing to CPUARMState is a really
> gross layering violation, incidentally.)

The code reflects what the hardware is doing though.  One could argue
that if a hardware emulator divides things into layers where the real
hardware violates those layers then the division is not fully correct.

Cheers

Re: [Qemu-devel] [PATCH next v2 41/74] target-lm32: Let cpu_lm32_init() return LM32CPU

[Andreas Färber]

Am 11.05.2012 18:28, schrieb Michael Walle:
>> Make the include paths for cpu-qom.h consistent to allow using LM32CPU
>> in cpu.h.
>>
>> Turn cpu_init macro into a static inline function returning CPULM32State
>> for backwards compatibility.
>>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
> Acked-by: Michael Walle <michael@walle.cc>

Thanks, applied to qom-next:
http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 34/74] omap: Use cpu_arm_init() to store ARMCPU in omap_mpu_state_s

[Andreas Färber]

Am 11.05.2012 14:52, schrieb Andreas Färber:
> Am 10.05.2012 23:38, schrieb Peter Maydell:
>> On 10 May 2012 01:14, Andreas Färber <afaerber@suse.de> wrote:
>>> Fix tab indentations of comments, add braces, use cpu_reset().
>>>
>>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>>> ---
>>>  hw/nseries.c  |    6 +++---
>>>  hw/omap.h     |    2 +-
>>>  hw/omap1.c    |   20 +++++++++++---------
>>>  hw/omap2.c    |    8 ++++----
>>>  hw/omap_sx1.c |    2 +-
>>>  hw/palm.c     |    2 +-
>>>  6 files changed, 21 insertions(+), 19 deletions(-)
>>
>> There are some structs here which use the name 'cpu' for
>> a 'struct omap_mpu_state_s *', which leads to ugliness
>> like s->cpu->cpu->env. (We shouldn't be trying to fix that
>> here, just a passing comment.)
> 
> Now that we have qom-next, we are no longer limited to the concept of
> self-contained series so I can try to turn that into s->mpu->cpu->env
> the weekend. Not perfect either, but better distinguishable.

Patch sent, please review.

/-F

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SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Andreas Färber]

Am 10.05.2012 02:13, schrieb Andreas Färber:
> Andreas Färber (74):
>   target-cris: Reindent cpu_cris_init()
>   target-cris: Let cpu_cris_init() return CRISCPU
>   axis_dev88: Use cpu_cris_init() to obtain CRISCPU
>   cris-boot: Pass CRISCPU to cris_load_image()
>   cris-boot: Pass CRISCPU to main_cpu_reset().
>   target-microblaze: Let cpu_mb_init() return MicroBlazeCPU
>   petalogix_ml605: Use cpu_mb_init() to obtain MicroBlazeCPU
>   petalogix_s3adsp1800_mmu: Use cpu_mb_init() to obtain MicroBlazeCPU
>   microblaze_boot: Pass MicroBlazeCPU to microblaze_load_kernel()
[...]
>   Kill off cpu_state_reset()

Ping! Edgar, can you please ack so that I can apply it to qom-next?

Thanks,
Andreas

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SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Andreas Färber]

Am 10.05.2012 02:13, schrieb Andreas Färber:
> Andreas Färber (74):
[...]
>   target-sparc: Let cpu_sparc_init() return SPARCCPU
>   sun4m: Use cpu_sparc_init() to obtain SPARCCPU
>   sun4m: Pass SPARCCPU to {main,secondary}_cpu_reset()
>   sun4u: Use cpu_sparc_init() to obtain SPARCCPU
>   sun4u: Let cpu_devinit() return SPARCCPU
>   sun4u: Store SPARCCPU in ResetData
>   leon3: Use cpu_sparc_init() to obtain SPARCCPU
>   leon3: Store SPARCCPU in ResetData
[...]
>   Kill off cpu_state_reset()

Ping! Blue, can you ack please?

Andreas

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SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Blue Swirl]

On Mon, May 14, 2012 at 4:15 PM, Andreas Färber <afaerber@suse.de> wrote:
> Am 10.05.2012 02:13, schrieb Andreas Färber:
>> Andreas Färber (74):
> [...]
>>   target-sparc: Let cpu_sparc_init() return SPARCCPU
>>   sun4m: Use cpu_sparc_init() to obtain SPARCCPU
>>   sun4m: Pass SPARCCPU to {main,secondary}_cpu_reset()
>>   sun4u: Use cpu_sparc_init() to obtain SPARCCPU
>>   sun4u: Let cpu_devinit() return SPARCCPU
>>   sun4u: Store SPARCCPU in ResetData
>>   leon3: Use cpu_sparc_init() to obtain SPARCCPU
>>   leon3: Store SPARCCPU in ResetData
> [...]
>>   Kill off cpu_state_reset()
>
> Ping! Blue, can you ack please?

What was again the purpose of all these changes, 00/74 only mentions
killing cpu_state_reset()? For example two CPU types (SPARCCPU vs.
CPUSPARCState) doesn't look very useful, is that needed?

Otherwise the patches look pretty safe ("if it compiles, it works").

>
> Andreas
>
> --
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Andreas Färber]

Am 14.05.2012 21:54, schrieb Blue Swirl:
> On Mon, May 14, 2012 at 4:15 PM, Andreas Färber <afaerber@suse.de> wrote:
>> Am 10.05.2012 02:13, schrieb Andreas Färber:
>>> Andreas Färber (74):
>> [...]
>>>   target-sparc: Let cpu_sparc_init() return SPARCCPU
>>>   sun4m: Use cpu_sparc_init() to obtain SPARCCPU
>>>   sun4m: Pass SPARCCPU to {main,secondary}_cpu_reset()
>>>   sun4u: Use cpu_sparc_init() to obtain SPARCCPU
>>>   sun4u: Let cpu_devinit() return SPARCCPU
>>>   sun4u: Store SPARCCPU in ResetData
>>>   leon3: Use cpu_sparc_init() to obtain SPARCCPU
>>>   leon3: Store SPARCCPU in ResetData
>> [...]

Forgot to mention the bsd-user patch.

>>>   Kill off cpu_state_reset()
>>
>> Ping! Blue, can you ack please?
> 
> What was again the purpose of all these changes, 00/74 only mentions
> killing cpu_state_reset()?

cpu_reset(CPUState *) was renamed to cpu_state_reset(CPUArchState *) to
make room for a QOM cpu_reset(CPUState *). This we have now but we still
unneededly have cpu_state_reset() and in particular we have one instance
(mips) where cpu_state_reset() does not forward to cpu_reset(). It
should on sparc. So the goal of this series is to eliminate all callers
of cpu_state_reset(). The safest and cleanest way is to remove it
completely.
The upcoming followup series, part 4, then starts moving
CPUArchState-duplicated fields from CPU_COMMON to the one CPUState, for
which reset code needs to be added that requires cpu_reset() - rather
than cpu_state_reset() - to be called in order to be executed, e.g.
halted. A preview of that can be seen on my GitHub qom-cpu branch - I
still need a QOM-safe way of calling tlb_flush() for VMState without too
much code duplication before I'll submit.

> For example two CPU types (SPARCCPU vs.
> CPUSPARCState) doesn't look very useful, is that needed?

That is outside the scope of this series but I can explain again:
CPUSPARCState is the problematic struct I'm trying to fix:

* I introduced a CPUState struct for QOM TYPE_CPU. This is compiled
twice, once for system mode, once for user mode. This struct so far is
empty. Here common fields are supposed to go (part 4), in a way that
code can be shared across targets (e.g., 13x -softmmu, 1x qom/cpu.o).

* I introduced a SPARCCPU struct for QOM TYPE_SPARC_CPU. This is a
target-specific subclass of TYPE_CPU and is what 1.1 already uses to
create the CPU state internally. This embeds CPUSPARCState.

The way QOM and most object-oriented type systems work is by placing
common fields in the front and adding new ones in the back. As pointed
out by rth this is bad for TCG because we want small offsets to
target-specific register fields for immediate load/stores. env points to
the middle of the CPU, cpu to the front, if you will. So we still need
CPUSPARCState, just not for everything.

As common or target-specific fields get moved to or added to CPUState /
SPARCPU, it becomes difficult to "jailbreak" CPUSPARCState -
sparc_env_get_cpu() and generalized ENV_GET_CPU() macro are ways to do
so. To avoid their use and the runtime casts they bring along, I am
first propagating the use of the larger type, SPARCCPU, throughout the
parts of code that will use it. CPUSPARCState can then be cheaply
accessed through cpu->env.

The purpose as before is to speed up compilation, by factoring out
common code (using CPUState) that does not need to be compiled for each
CPUxxxState with their varying field offsets, and to allow for mixing
CPU cores (with some contraints) within one executable, by making
CPUState more self-describing.

Cf. http://wiki.qemu.org/Features/QOM/CPU

CPUSPARCState is what still makes having subclasses of SPARCCPU with
additional fields tricky - they would get added to the end after some of
the large CPU_COMMON fields, so accessing them from TCG gets ugly.

And SPARCCPU is the type that gives access to SPARCCPUClass, where
constant data specific to one type can be obtained from, i.e. what is
now sparc_def_t. There we'll (you'll) need to decide whether you want to
keep it declarative, which will lead to field duplication between
sparc_def_t/SPARCCPUInfo and SPARCCPUClass due to late instantiation, or
make it imperative, which needs closer review to not introduce errors
when rewriting all the type definitions.

HTE,

Andreas

> Otherwise the patches look pretty safe ("if it compiles, it works").

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SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Blue Swirl]

On Mon, May 14, 2012 at 8:59 PM, Andreas Färber <afaerber@suse.de> wrote:
> Am 14.05.2012 21:54, schrieb Blue Swirl:
>> On Mon, May 14, 2012 at 4:15 PM, Andreas Färber <afaerber@suse.de> wrote:
>>> Am 10.05.2012 02:13, schrieb Andreas Färber:
>>>> Andreas Färber (74):
>>> [...]
>>>>   target-sparc: Let cpu_sparc_init() return SPARCCPU
>>>>   sun4m: Use cpu_sparc_init() to obtain SPARCCPU
>>>>   sun4m: Pass SPARCCPU to {main,secondary}_cpu_reset()
>>>>   sun4u: Use cpu_sparc_init() to obtain SPARCCPU
>>>>   sun4u: Let cpu_devinit() return SPARCCPU
>>>>   sun4u: Store SPARCCPU in ResetData
>>>>   leon3: Use cpu_sparc_init() to obtain SPARCCPU
>>>>   leon3: Store SPARCCPU in ResetData
>>> [...]
>
> Forgot to mention the bsd-user patch.
>
>>>>   Kill off cpu_state_reset()
>>>
>>> Ping! Blue, can you ack please?
>>
>> What was again the purpose of all these changes, 00/74 only mentions
>> killing cpu_state_reset()?
>
> cpu_reset(CPUState *) was renamed to cpu_state_reset(CPUArchState *) to
> make room for a QOM cpu_reset(CPUState *). This we have now but we still
> unneededly have cpu_state_reset() and in particular we have one instance
> (mips) where cpu_state_reset() does not forward to cpu_reset(). It
> should on sparc. So the goal of this series is to eliminate all callers
> of cpu_state_reset(). The safest and cleanest way is to remove it
> completely.
> The upcoming followup series, part 4, then starts moving
> CPUArchState-duplicated fields from CPU_COMMON to the one CPUState, for
> which reset code needs to be added that requires cpu_reset() - rather
> than cpu_state_reset() - to be called in order to be executed, e.g.
> halted. A preview of that can be seen on my GitHub qom-cpu branch - I
> still need a QOM-safe way of calling tlb_flush() for VMState without too
> much code duplication before I'll submit.
>
>> For example two CPU types (SPARCCPU vs.
>> CPUSPARCState) doesn't look very useful, is that needed?
>
> That is outside the scope of this series but I can explain again:
> CPUSPARCState is the problematic struct I'm trying to fix:
>
> * I introduced a CPUState struct for QOM TYPE_CPU. This is compiled
> twice, once for system mode, once for user mode. This struct so far is
> empty. Here common fields are supposed to go (part 4), in a way that
> code can be shared across targets (e.g., 13x -softmmu, 1x qom/cpu.o).
>
> * I introduced a SPARCCPU struct for QOM TYPE_SPARC_CPU. This is a
> target-specific subclass of TYPE_CPU and is what 1.1 already uses to
> create the CPU state internally. This embeds CPUSPARCState.
>
> The way QOM and most object-oriented type systems work is by placing
> common fields in the front and adding new ones in the back. As pointed
> out by rth this is bad for TCG because we want small offsets to
> target-specific register fields for immediate load/stores. env points to
> the middle of the CPU, cpu to the front, if you will. So we still need
> CPUSPARCState, just not for everything.
>
> As common or target-specific fields get moved to or added to CPUState /
> SPARCPU, it becomes difficult to "jailbreak" CPUSPARCState -
> sparc_env_get_cpu() and generalized ENV_GET_CPU() macro are ways to do
> so. To avoid their use and the runtime casts they bring along, I am
> first propagating the use of the larger type, SPARCCPU, throughout the
> parts of code that will use it. CPUSPARCState can then be cheaply
> accessed through cpu->env.
>
> The purpose as before is to speed up compilation, by factoring out
> common code (using CPUState) that does not need to be compiled for each
> CPUxxxState with their varying field offsets, and to allow for mixing
> CPU cores (with some contraints) within one executable, by making
> CPUState more self-describing.

Excellent goals!

>
> Cf. http://wiki.qemu.org/Features/QOM/CPU
>
> CPUSPARCState is what still makes having subclasses of SPARCCPU with
> additional fields tricky - they would get added to the end after some of
> the large CPU_COMMON fields, so accessing them from TCG gets ugly.

Can't we move the TLB to common code? Why can't SPARCCPU contain
everything that CPUSPARCState had minus common items? Also, TCG
softmmu functions could use pointers to CPUTLB directly, then the slow
path could recover CPUState or others with container_of().

> And SPARCCPU is the type that gives access to SPARCCPUClass, where
> constant data specific to one type can be obtained from, i.e. what is
> now sparc_def_t. There we'll (you'll) need to decide whether you want to
> keep it declarative, which will lead to field duplication between
> sparc_def_t/SPARCCPUInfo and SPARCCPUClass due to late instantiation, or
> make it imperative, which needs closer review to not introduce errors
> when rewriting all the type definitions.
>
> HTE,
>
> Andreas
>
>> Otherwise the patches look pretty safe ("if it compiles, it works").
>
> --
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Igor Mammedov]

On Thu, May 10, 2012 at 02:13:38AM +0200, Andreas Färber wrote:
>   target-i386: Pass X86CPU to do_cpu_{init,sipi}()
>   target-i386: Let cpu_x86_init() return X86CPU
>   pc: Use cpu_x86_init() to obtain X86CPU
>   pc: Pass X86CPU to pc_cpu_reset()

Reviewed-by: Igor Mammedov <imammedo@redhat.com>

Re: [Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Andreas Färber]

Am 15.05.2012 17:16, schrieb Igor Mammedov:
> On Thu, May 10, 2012 at 02:13:38AM +0200, Andreas Färber wrote:
>>   target-i386: Pass X86CPU to do_cpu_{init,sipi}()
>>   target-i386: Let cpu_x86_init() return X86CPU
>>   pc: Use cpu_x86_init() to obtain X86CPU
>>   pc: Pass X86CPU to pc_cpu_reset()
> 
> Reviewed-by: Igor Mammedov <imammedo@redhat.com>

Thanks, applied to qom-next:
http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 73/74] linux-user: Use cpu_reset() after cpu_init() / cpu_copy()

[Igor Mammedov]

On 05/11/2012 01:26 PM, Andreas Färber wrote:
> Am 11.05.2012 13:22, schrieb Peter Maydell:
>> On 10 May 2012 01:14, Andreas Färber<afaerber@suse.de>  wrote:
>>> Eliminates cpu_state_reset() usage.
>>>
>>> Signed-off-by: Andreas Färber<afaerber@suse.de>
>>> ---
>>>   linux-user/main.c    |    2 +-
>>>   linux-user/syscall.c |    2 +-
>>>   2 files changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/linux-user/main.c b/linux-user/main.c
>>> index 191b750..49108b8 100644
>>> --- a/linux-user/main.c
>>> +++ b/linux-user/main.c
>>> @@ -3405,7 +3405,7 @@ int main(int argc, char **argv, char **envp)
>>>          exit(1);
>>>      }
>>>   #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
>>> -    cpu_state_reset(env);
>>> +    cpu_reset(ENV_GET_CPU(env));
>>>   #endif
>>>
>>>      thread_env = env;
>>> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
>>> index 20d2a74..539af3f 100644
>>> --- a/linux-user/syscall.c
>>> +++ b/linux-user/syscall.c
>>> @@ -4262,7 +4262,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
>>>          /* we create a new CPU instance. */
>>>          new_env = cpu_copy(env);
>>>   #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
>>> -        cpu_state_reset(new_env);
>>> +        cpu_reset(ENV_GET_CPU(new_env));
>>>   #endif
>>>          /* Init regs that differ from the parent.  */
>>>          cpu_clone_regs(new_env, newsp);
>>> --
>>
>> Do you have any plans to try to rationalise the handling of reset
>> so that we consistently either do or don't reset the cpu here,
>> rather than having it done based on a TARGET_* ifdef ?
>
> Igor had an RFC for x86; sparc and ppc reset I haven't looked into yet.
> Cc'ing Alex and Blue.
I'll rebase RFC for x86 and post patches today and will remove it from here
by the last patch in patchset so that when this patch applied we could remove
unnecessary call.
So ACK for target-i386 here.

-- 
-----
  Igor

Re: [Qemu-devel] [PATCH next v2 73/74] linux-user: Use cpu_reset() after cpu_init() / cpu_copy()

[Andreas Färber]

Am 16.05.2012 14:36, schrieb Igor Mammedov:
> On 05/11/2012 01:26 PM, Andreas Färber wrote:
>> Am 11.05.2012 13:22, schrieb Peter Maydell:
>>> On 10 May 2012 01:14, Andreas Färber<afaerber@suse.de>  wrote:
>>>> Eliminates cpu_state_reset() usage.
>>>>
>>>> Signed-off-by: Andreas Färber<afaerber@suse.de>
>>>> ---
>>>>   linux-user/main.c    |    2 +-
>>>>   linux-user/syscall.c |    2 +-
>>>>   2 files changed, 2 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/linux-user/main.c b/linux-user/main.c
>>>> index 191b750..49108b8 100644
>>>> --- a/linux-user/main.c
>>>> +++ b/linux-user/main.c
>>>> @@ -3405,7 +3405,7 @@ int main(int argc, char **argv, char **envp)
>>>>          exit(1);
>>>>      }
>>>>   #if defined(TARGET_I386) || defined(TARGET_SPARC) ||
>>>> defined(TARGET_PPC)
>>>> -    cpu_state_reset(env);
>>>> +    cpu_reset(ENV_GET_CPU(env));
>>>>   #endif
>>>>
>>>>      thread_env = env;
>>>> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
>>>> index 20d2a74..539af3f 100644
>>>> --- a/linux-user/syscall.c
>>>> +++ b/linux-user/syscall.c
>>>> @@ -4262,7 +4262,7 @@ static int do_fork(CPUArchState *env, unsigned
>>>> int flags, abi_ulong newsp,
>>>>          /* we create a new CPU instance. */
>>>>          new_env = cpu_copy(env);
>>>>   #if defined(TARGET_I386) || defined(TARGET_SPARC) ||
>>>> defined(TARGET_PPC)
>>>> -        cpu_state_reset(new_env);
>>>> +        cpu_reset(ENV_GET_CPU(new_env));
>>>>   #endif
>>>>          /* Init regs that differ from the parent.  */
>>>>          cpu_clone_regs(new_env, newsp);
>>>> -- 
>>>
>>> Do you have any plans to try to rationalise the handling of reset
>>> so that we consistently either do or don't reset the cpu here,
>>> rather than having it done based on a TARGET_* ifdef ?
>>
>> Igor had an RFC for x86; sparc and ppc reset I haven't looked into yet.
>> Cc'ing Alex and Blue.
> I'll rebase RFC for x86 and post patches today and will remove it from here
> by the last patch in patchset so that when this patch applied we could
> remove
> unnecessary call.
> So ACK for target-i386 here.

Since back then Peter and I have discussed whether we can rather just
remove the #ifdef here and reset for all targets.

Unfortunately I'm still not clear about some patches that stand in the
way of ObjectClass::realize - if cpu_reset() is moved to realizefn for
all targets then we can just call realize here.

Actually, all we'd need is ObjectClass::realize field, so I'm
considering extracting the intersection between Paolo and me, stick a
CPU-specific wrapper method on top as requested by Anthony and then we
can move ahead here...

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 73/74] linux-user: Use cpu_reset() after cpu_init() / cpu_copy()

[Peter Maydell]

On 16 May 2012 14:01, Andreas Färber <afaerber@suse.de> wrote:
> Am 16.05.2012 14:36, schrieb Igor Mammedov:
>> On 05/11/2012 01:26 PM, Andreas Färber wrote:
>>> Am 11.05.2012 13:22, schrieb Peter Maydell:
>>>> On 10 May 2012 01:14, Andreas Färber<afaerber@suse.de>  wrote:
>>>>> Eliminates cpu_state_reset() usage.
>>>>>
>>>>> Signed-off-by: Andreas Färber<afaerber@suse.de>
>>>>> ---
>>>>>   linux-user/main.c    |    2 +-
>>>>>   linux-user/syscall.c |    2 +-
>>>>>   2 files changed, 2 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/linux-user/main.c b/linux-user/main.c
>>>>> index 191b750..49108b8 100644
>>>>> --- a/linux-user/main.c
>>>>> +++ b/linux-user/main.c
>>>>> @@ -3405,7 +3405,7 @@ int main(int argc, char **argv, char **envp)
>>>>>          exit(1);
>>>>>      }
>>>>>   #if defined(TARGET_I386) || defined(TARGET_SPARC) ||
>>>>> defined(TARGET_PPC)
>>>>> -    cpu_state_reset(env);
>>>>> +    cpu_reset(ENV_GET_CPU(env));
>>>>>   #endif
>>>>>
>>>>>      thread_env = env;
>>>>> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
>>>>> index 20d2a74..539af3f 100644
>>>>> --- a/linux-user/syscall.c
>>>>> +++ b/linux-user/syscall.c
>>>>> @@ -4262,7 +4262,7 @@ static int do_fork(CPUArchState *env, unsigned
>>>>> int flags, abi_ulong newsp,
>>>>>          /* we create a new CPU instance. */
>>>>>          new_env = cpu_copy(env);
>>>>>   #if defined(TARGET_I386) || defined(TARGET_SPARC) ||
>>>>> defined(TARGET_PPC)
>>>>> -        cpu_state_reset(new_env);
>>>>> +        cpu_reset(ENV_GET_CPU(new_env));
>>>>>   #endif
>>>>>          /* Init regs that differ from the parent.  */
>>>>>          cpu_clone_regs(new_env, newsp);
>>>>> --
>>>>
>>>> Do you have any plans to try to rationalise the handling of reset
>>>> so that we consistently either do or don't reset the cpu here,
>>>> rather than having it done based on a TARGET_* ifdef ?
>>>
>>> Igor had an RFC for x86; sparc and ppc reset I haven't looked into yet.
>>> Cc'ing Alex and Blue.
>> I'll rebase RFC for x86 and post patches today and will remove it from here
>> by the last patch in patchset so that when this patch applied we could
>> remove
>> unnecessary call.
>> So ACK for target-i386 here.
>
> Since back then Peter and I have discussed whether we can rather just
> remove the #ifdef here and reset for all targets.
>
> Unfortunately I'm still not clear about some patches that stand in the
> way of ObjectClass::realize - if cpu_reset() is moved to realizefn for
> all targets then we can just call realize here.

I don't think we need to tangle this up with realize. What I think
we should do is:
 (1) remove the #ifdefs on the cpu reset in linux-user/main.c, so
we reset for all target CPU types
 (2) remove the cpu reset from the do_fork code in linux-user and
instead do a cpu reset inside exec.c:cpu_copy(), just after we call
cpu_init(). (This is actually fixing a bug -- the thread clone syscall
is supposed to leave register values alone, which is why we have
cpu_copy in the first place, and calling cpu_reset breaks this.)
 (3) remove any cpu reset calls from inside target cpu_init functions

This cleans things up so all targets work the same (cpu_init never
does a reset) and linux-user works the same as system mode (it's
the responsibility of the code which creates the cpu to reset it
at some point before use).

-- PMM

Re: [Qemu-devel] [PATCH next v2 73/74] linux-user: Use cpu_reset() after cpu_init() / cpu_copy()

[Igor Mammedov]

On 05/16/2012 03:01 PM, Andreas Färber wrote:
> Am 16.05.2012 14:36, schrieb Igor Mammedov:
>> On 05/11/2012 01:26 PM, Andreas Färber wrote:
>>> Am 11.05.2012 13:22, schrieb Peter Maydell:
>>>> On 10 May 2012 01:14, Andreas Färber<afaerber@suse.de>   wrote:
>>>>> Eliminates cpu_state_reset() usage.
>>>>>
>>>>> Signed-off-by: Andreas Färber<afaerber@suse.de>
>>>>> ---
>>>>>    linux-user/main.c    |    2 +-
>>>>>    linux-user/syscall.c |    2 +-
>>>>>    2 files changed, 2 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/linux-user/main.c b/linux-user/main.c
>>>>> index 191b750..49108b8 100644
>>>>> --- a/linux-user/main.c
>>>>> +++ b/linux-user/main.c
>>>>> @@ -3405,7 +3405,7 @@ int main(int argc, char **argv, char **envp)
>>>>>           exit(1);
>>>>>       }
>>>>>    #if defined(TARGET_I386) || defined(TARGET_SPARC) ||
>>>>> defined(TARGET_PPC)
>>>>> -    cpu_state_reset(env);
>>>>> +    cpu_reset(ENV_GET_CPU(env));
>>>>>    #endif
>>>>>
>>>>>       thread_env = env;
>>>>> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
>>>>> index 20d2a74..539af3f 100644
>>>>> --- a/linux-user/syscall.c
>>>>> +++ b/linux-user/syscall.c
>>>>> @@ -4262,7 +4262,7 @@ static int do_fork(CPUArchState *env, unsigned
>>>>> int flags, abi_ulong newsp,
>>>>>           /* we create a new CPU instance. */
>>>>>           new_env = cpu_copy(env);
>>>>>    #if defined(TARGET_I386) || defined(TARGET_SPARC) ||
>>>>> defined(TARGET_PPC)
>>>>> -        cpu_state_reset(new_env);
>>>>> +        cpu_reset(ENV_GET_CPU(new_env));
>>>>>    #endif
>>>>>           /* Init regs that differ from the parent.  */
>>>>>           cpu_clone_regs(new_env, newsp);
>>>>> --
>>>>
>>>> Do you have any plans to try to rationalise the handling of reset
>>>> so that we consistently either do or don't reset the cpu here,
>>>> rather than having it done based on a TARGET_* ifdef ?
>>>
>>> Igor had an RFC for x86; sparc and ppc reset I haven't looked into yet.
>>> Cc'ing Alex and Blue.
>> I'll rebase RFC for x86 and post patches today and will remove it from here
>> by the last patch in patchset so that when this patch applied we could
>> remove
>> unnecessary call.
>> So ACK for target-i386 here.
>
> Since back then Peter and I have discussed whether we can rather just
> remove the #ifdef here and reset for all targets.
>
> Unfortunately I'm still not clear about some patches that stand in the
> way of ObjectClass::realize - if cpu_reset() is moved to realizefn for
> all targets then we can just call realize here.

1. I'd like to have cpu_reset in realizefn - which is kind of equivalent
of cpu power-on, after which cpu should be in known state
(i.e. the state after reset, at least for target-i386).

2. cpu_reset in realizefn as well will free us from calling cpu_reset
in device_add when implementing hotplug and will allow to remove it from
hw/pc.c.

3. regarding exec.c:cpu_copy and do_fork on target-i386
  cpu_copy first creates cpu then copies all over it CPUArchState of original
  cpu perserving only cpu_index. It's beyond my understanding why
  anyone would/need do this.
  So I'll not touch cpu_reset in do_fork since I haven't a clue what's
  going on. Albeit adding cpu_reset in realizefn shouldn't break anything here.

>
> Actually, all we'd need is ObjectClass::realize field, so I'm
> considering extracting the intersection between Paolo and me, stick a
> CPU-specific wrapper method on top as requested by Anthony and then we
> can move ahead here...
>
> Andreas
>

-- 
-----
  Igor

Re: [Qemu-devel] [PATCH next v2 73/74] linux-user: Use cpu_reset() after cpu_init() / cpu_copy()

[Peter Maydell]

On 16 May 2012 17:05, Igor Mammedov <imammedo@redhat.com> wrote:
> 1. I'd like to have cpu_reset in realizefn - which is kind of equivalent
> of cpu power-on, after which cpu should be in known state
> (i.e. the state after reset, at least for target-i386).

Realize is not the same as "has come out of reset". Consider
CPUs where on coming out of reset they read the initial program
counter from RAM. (We don't really handle that properly anyway,
though.)

> 2. cpu_reset in realizefn as well will free us from calling cpu_reset
> in device_add when implementing hotplug and will allow to remove it from
> hw/pc.c.
>
> 3. regarding exec.c:cpu_copy and do_fork on target-i386
>  cpu_copy first creates cpu then copies all over it CPUArchState of original
>  cpu perserving only cpu_index. It's beyond my understanding why
>  anyone would/need do this.
>  So I'll not touch cpu_reset in do_fork since I haven't a clue what's
>  going on. Albeit adding cpu_reset in realizefn shouldn't break anything
> here.

The purpose of cpu_copy is to handle creating a new pthread in
linux-user mode. The new thread is supposed to start out with
a CPU state (as far as user mode is concerned) which is identical
to that of its parent thread. So we create a new CPU which is
a copy of the old one. memcpy() is a cheap hack to do this, which
is creaking at the seams rather these days. If you delve back in
the git history to when it was first put in it looked a bit cleaner...

The fact that do_fork then calls cpu_reset (for some targets) is
a bug -- we need to call cpu_reset after cpu_init and before the
copying of the registers, so in do_fork is too late (it wipes
out the copied registers we've just gone to the effort of setting
up).

-- PMM

Re: [Qemu-devel] [PATCH next v2 73/74] linux-user: Use cpu_reset() after cpu_init() / cpu_copy()

[Igor Mammedov]

----- Original Message -----
> From: "Peter Maydell" <peter.maydell@linaro.org>
> To: "Igor Mammedov" <imammedo@redhat.com>
> Cc: qemu-devel@nongnu.org
> Sent: Wednesday, May 16, 2012 6:13:37 PM
> Subject: Re: [Qemu-devel] [PATCH next v2 73/74] linux-user: Use cpu_reset() after cpu_init() / cpu_copy()
>
> On 16 May 2012 17:05, Igor Mammedov <imammedo@redhat.com> wrote:
> > 1. I'd like to have cpu_reset in realizefn - which is kind of
> > equivalent
> > of cpu power-on, after which cpu should be in known state
> > (i.e. the state after reset, at least for target-i386).
>
> Realize is not the same as "has come out of reset". Consider
> CPUs where on coming out of reset they read the initial program
> counter from RAM. (We don't really handle that properly anyway,
> though.)
Yep, it certainly could be different between for other targets.
May be then it would be acceptable to do cpu_reset for target-i386
in realize at least. It matches how x86 should behave.

>
> > 2. cpu_reset in realizefn as well will free us from calling
> > cpu_reset
> > in device_add when implementing hotplug and will allow to remove it
> > from
> > hw/pc.c.
> >
> > 3. regarding exec.c:cpu_copy and do_fork on target-i386
> >  cpu_copy first creates cpu then copies all over it CPUArchState of
> >  original
> >  cpu perserving only cpu_index. It's beyond my understanding why
> >  anyone would/need do this.
> >  So I'll not touch cpu_reset in do_fork since I haven't a clue
> >  what's
> >  going on. Albeit adding cpu_reset in realizefn shouldn't break
> >  anything
> > here.
>
> The purpose of cpu_copy is to handle creating a new pthread in
> linux-user mode. The new thread is supposed to start out with
> a CPU state (as far as user mode is concerned) which is identical
> to that of its parent thread. So we create a new CPU which is
> a copy of the old one. memcpy() is a cheap hack to do this, which
> is creaking at the seams rather these days. If you delve back in
> the git history to when it was first put in it looked a bit
> cleaner...
Thanks for expanded explanation. (/me went to read history)

>
> The fact that do_fork then calls cpu_reset (for some targets) is
> a bug -- we need to call cpu_reset after cpu_init and before the
> copying of the registers, so in do_fork is too late (it wipes
> out the copied registers we've just gone to the effort of setting
> up).

And if cpu_init could be/is a combination of object_new + set properties + realize
then on some targets calling cpu_reset at the end of cpu_init or
at the end of realize would do the thing? :)


> -- PMM
>
>

Re: [Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Andreas Färber]

Am 10.05.2012 02:13, schrieb Andreas Färber:
> Andreas Färber (74):
[...]
>   target-sh4: Let cpu_sh4_init() return SuperHCPU
>   r2d: Use cpu_sh4_init() to obtain SuperHCPU
>   r2d: Store SuperHCPU in ResetData

Seeing that no one currently cares about sh4, I have re-tested the r2d
test image and applied these to qom-next:
http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next

I'm still hoping that someone will ack the remaining mips ones though...

/-F

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Andreas Färber]

Am 14.05.2012 23:22, schrieb Blue Swirl:
> On Mon, May 14, 2012 at 8:59 PM, Andreas Färber <afaerber@suse.de> wrote:
>> Am 14.05.2012 21:54, schrieb Blue Swirl:
>>> On Mon, May 14, 2012 at 4:15 PM, Andreas Färber <afaerber@suse.de> wrote:
>>>> Am 10.05.2012 02:13, schrieb Andreas Färber:
>>>>> Andreas Färber (74):
>>>> [...]
>>>>>   target-sparc: Let cpu_sparc_init() return SPARCCPU
>>>>>   sun4m: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>   sun4m: Pass SPARCCPU to {main,secondary}_cpu_reset()
>>>>>   sun4u: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>   sun4u: Let cpu_devinit() return SPARCCPU
>>>>>   sun4u: Store SPARCCPU in ResetData
>>>>>   leon3: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>   leon3: Store SPARCCPU in ResetData
>>>> [...]
>>
>> Forgot to mention the bsd-user patch.
>>
>>>>>   Kill off cpu_state_reset()
>>>>
>>>> Ping! Blue, can you ack please?
>>>
>>> What was again the purpose of all these changes, 00/74 only mentions
>>> killing cpu_state_reset()?
[...]
>> Cf. http://wiki.qemu.org/Features/QOM/CPU
>>
>> CPUSPARCState is what still makes having subclasses of SPARCCPU with
>> additional fields tricky - they would get added to the end after some of
>> the large CPU_COMMON fields, so accessing them from TCG gets ugly.
> 
> Can't we move the TLB to common code?

The TLB depends on both target_ulong and target_phys_addr_t, so we get a
matrix of 32/32, 32/64, 64/64 at least, for which we don't have a
common-code compilation mechanism to date.

> Why can't SPARCCPU contain
> everything that CPUSPARCState had minus common items?

The common items I'm working on and it became clearer that cpu_copy() is
broken as it is, so I won't hold back that series any longer.

If we move all fields from CPUSPARCState to SPARCCPU, what pointer would
you pass as AREG0?

In C code a pointer to the start of the CPU would certainly be handier
but it was brought up that any large, rarely needed common fields at the
start (CPUState) would contribute to imm overflows for, e.g., SPARCCPU
fields such as GPRs etc.

> Also, TCG
> softmmu functions could use pointers to CPUTLB directly, then the slow
> path could recover CPUState or others with container_of().

Having messed in TCG code not too long ago, I would appreciate your
help. The current ppc/ppc64 code at least relies on indexed TLB loads
from AREG0 aka env. Pointer dereferences in generated code to get to an
external TLB object might impact performance...

>>> Otherwise the patches look pretty safe ("if it compiles, it works").

Was I supposed to interpret that as an Acked-by? ;)

Thanks,
Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Andreas Färber]

Am 10.05.2012 02:13, schrieb Andreas Färber:
> Andreas Färber (74):
[...]
>   target-mips: Use cpu_reset() in cpu_mips_init()
[...]
>   target-mips: Use cpu_reset() in do_interrupt()
>   target-mips: Let cpu_mips_init() return MIPSCPU
>   mips_fulong2e: Use cpu_mips_cpu() to obtain MIPSCPU
>   mips_fulong2e: Pass MIPSCPU to main_cpu_reset()
>   mips_jazz: Use cpu_mips_init() to obtain MIPSCPU
>   mips_jazz: Pass MIPSCPU to main_cpu_reset()
>   mips_malta: Use cpu_mips_init() to obtain MIPSCPU
>   mips_malta: Pass MIPSCPU to main_cpu_reset()
>   mips_mipssim: Use cpu_mips_init() to obtain MIPSCPU
>   mips_mipssim: Store MIPSCPU in ResetData
>   mips_r4k: Use cpu_mips_init() to obtain MIPSCPU
>   mips_r4k: Store MIPSCPU in ResetData

Since no one seems to care about these mips patches beyond jazz ATM,
I've applied these to qom-next:
http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next

If there's any issue or someone wants to add a tag after all, just let
me know.

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Blue Swirl]

On Mon, May 21, 2012 at 9:09 AM, Andreas Färber <afaerber@suse.de> wrote:
> Am 14.05.2012 23:22, schrieb Blue Swirl:
>> On Mon, May 14, 2012 at 8:59 PM, Andreas Färber <afaerber@suse.de> wrote:
>>> Am 14.05.2012 21:54, schrieb Blue Swirl:
>>>> On Mon, May 14, 2012 at 4:15 PM, Andreas Färber <afaerber@suse.de> wrote:
>>>>> Am 10.05.2012 02:13, schrieb Andreas Färber:
>>>>>> Andreas Färber (74):
>>>>> [...]
>>>>>>   target-sparc: Let cpu_sparc_init() return SPARCCPU
>>>>>>   sun4m: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>>   sun4m: Pass SPARCCPU to {main,secondary}_cpu_reset()
>>>>>>   sun4u: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>>   sun4u: Let cpu_devinit() return SPARCCPU
>>>>>>   sun4u: Store SPARCCPU in ResetData
>>>>>>   leon3: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>>   leon3: Store SPARCCPU in ResetData
>>>>> [...]
>>>
>>> Forgot to mention the bsd-user patch.
>>>
>>>>>>   Kill off cpu_state_reset()
>>>>>
>>>>> Ping! Blue, can you ack please?
>>>>
>>>> What was again the purpose of all these changes, 00/74 only mentions
>>>> killing cpu_state_reset()?
> [...]
>>> Cf. http://wiki.qemu.org/Features/QOM/CPU
>>>
>>> CPUSPARCState is what still makes having subclasses of SPARCCPU with
>>> additional fields tricky - they would get added to the end after some of
>>> the large CPU_COMMON fields, so accessing them from TCG gets ugly.
>>
>> Can't we move the TLB to common code?
>
> The TLB depends on both target_ulong and target_phys_addr_t, so we get a
> matrix of 32/32, 32/64, 64/64 at least, for which we don't have a
> common-code compilation mechanism to date.

Blah.

>> Why can't SPARCCPU contain
>> everything that CPUSPARCState had minus common items?
>
> The common items I'm working on and it became clearer that cpu_copy() is
> broken as it is, so I won't hold back that series any longer.
>
> If we move all fields from CPUSPARCState to SPARCCPU, what pointer would
> you pass as AREG0?
>
> In C code a pointer to the start of the CPU would certainly be handier
> but it was brought up that any large, rarely needed common fields at the
> start (CPUState) would contribute to imm overflows for, e.g., SPARCCPU
> fields such as GPRs etc.
>
>> Also, TCG
>> softmmu functions could use pointers to CPUTLB directly, then the slow
>> path could recover CPUState or others with container_of().
>
> Having messed in TCG code not too long ago, I would appreciate your
> help. The current ppc/ppc64 code at least relies on indexed TLB loads
> from AREG0 aka env. Pointer dereferences in generated code to get to an
> external TLB object might impact performance...

I was thinking about the reverse, TLB accesses in the fast (hit) path
would get the most direct pointer. Only in the slow path, perform
container_of(CPUXState, TLB, tlb) (or what was the syntax again).

>
>>>> Otherwise the patches look pretty safe ("if it compiles, it works").
>
> Was I supposed to interpret that as an Acked-by? ;)

No, but you may do so if it compiles. ;-)

>
> Thanks,
> Andreas
>
> --
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Andreas Färber]

Am 21.05.2012 20:20, schrieb Blue Swirl:
> On Mon, May 21, 2012 at 9:09 AM, Andreas Färber <afaerber@suse.de> wrote:
>> Am 14.05.2012 23:22, schrieb Blue Swirl:
>>> On Mon, May 14, 2012 at 8:59 PM, Andreas Färber <afaerber@suse.de> wrote:
>>>> Am 14.05.2012 21:54, schrieb Blue Swirl:
>>>>> On Mon, May 14, 2012 at 4:15 PM, Andreas Färber <afaerber@suse.de> wrote:
>>>>>> Am 10.05.2012 02:13, schrieb Andreas Färber:
>>>>>>> Andreas Färber (74):
>>>>>> [...]
>>>>>>>   target-sparc: Let cpu_sparc_init() return SPARCCPU
>>>>>>>   sun4m: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>>>   sun4m: Pass SPARCCPU to {main,secondary}_cpu_reset()
>>>>>>>   sun4u: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>>>   sun4u: Let cpu_devinit() return SPARCCPU
>>>>>>>   sun4u: Store SPARCCPU in ResetData
>>>>>>>   leon3: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>>>   leon3: Store SPARCCPU in ResetData
>>>>>> [...]
>>>>
>>>> Forgot to mention the bsd-user patch.
>>>>
>>>>>>>   Kill off cpu_state_reset()
>>>>>>
>>>>>> Ping! Blue, can you ack please?
>>>>>
>>>>> Otherwise the patches look pretty safe ("if it compiles, it works").
>>
>> Was I supposed to interpret that as an Acked-by? ;)
> 
> No, but you may do so if it compiles. ;-)

Joking, are we? My cover letter indicated pretty clearly on what
platforms I had already compile-tested on, and that meant each patch.
I had also run `make check` on each and the sparc test image for sun4m,
HelenOS for sun4u and "crible" for leon3.

Applied the remainder of the series to qom-next:
http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next

Tristan/Fabien, could you please submit a patch to document the Leon3
machine in MAINTAINERS? No one got cc'ed on those two patches. Thanks.

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Fabien Chouteau]

On 05/22/2012 02:34 AM, Andreas Färber wrote:
> Am 21.05.2012 20:20, schrieb Blue Swirl:
>> On Mon, May 21, 2012 at 9:09 AM, Andreas Färber <afaerber@suse.de> wrote:
>>> Am 14.05.2012 23:22, schrieb Blue Swirl:
>>>> On Mon, May 14, 2012 at 8:59 PM, Andreas Färber <afaerber@suse.de> wrote:
>>>>> Am 14.05.2012 21:54, schrieb Blue Swirl:
>>>>>> On Mon, May 14, 2012 at 4:15 PM, Andreas Färber <afaerber@suse.de> wrote:
>>>>>>> Am 10.05.2012 02:13, schrieb Andreas Färber:
>>>>>>>> Andreas Färber (74):
>>>>>>> [...]
>>>>>>>>   target-sparc: Let cpu_sparc_init() return SPARCCPU
>>>>>>>>   sun4m: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>>>>   sun4m: Pass SPARCCPU to {main,secondary}_cpu_reset()
>>>>>>>>   sun4u: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>>>>   sun4u: Let cpu_devinit() return SPARCCPU
>>>>>>>>   sun4u: Store SPARCCPU in ResetData
>>>>>>>>   leon3: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>>>>   leon3: Store SPARCCPU in ResetData
>>>>>>> [...]
>>>>>
>>>>> Forgot to mention the bsd-user patch.
>>>>>
>>>>>>>>   Kill off cpu_state_reset()
>>>>>>>
>>>>>>> Ping! Blue, can you ack please?
>>>>>>
>>>>>> Otherwise the patches look pretty safe ("if it compiles, it works").
>>>
>>> Was I supposed to interpret that as an Acked-by? ;)
>>
>> No, but you may do so if it compiles. ;-)
> 
> Joking, are we? My cover letter indicated pretty clearly on what
> platforms I had already compile-tested on, and that meant each patch.
> I had also run `make check` on each and the sparc test image for sun4m,
> HelenOS for sun4u and "crible" for leon3.
> 
> Applied the remainder of the series to qom-next:
> http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next
> 
> Tristan/Fabien, could you please submit a patch to document the Leon3
> machine in MAINTAINERS? No one got cc'ed on those two patches. Thanks.
> 

OK, I'll send a patch.

-- 
Fabien Chouteau

Re: [Qemu-devel] [PATCH next v2 00/74] QOM CPUState, part 3: CPU reset

[Blue Swirl]

On Tue, May 22, 2012 at 12:34 AM, Andreas Färber <afaerber@suse.de> wrote:
> Am 21.05.2012 20:20, schrieb Blue Swirl:
>> On Mon, May 21, 2012 at 9:09 AM, Andreas Färber <afaerber@suse.de> wrote:
>>> Am 14.05.2012 23:22, schrieb Blue Swirl:
>>>> On Mon, May 14, 2012 at 8:59 PM, Andreas Färber <afaerber@suse.de> wrote:
>>>>> Am 14.05.2012 21:54, schrieb Blue Swirl:
>>>>>> On Mon, May 14, 2012 at 4:15 PM, Andreas Färber <afaerber@suse.de> wrote:
>>>>>>> Am 10.05.2012 02:13, schrieb Andreas Färber:
>>>>>>>> Andreas Färber (74):
>>>>>>> [...]
>>>>>>>>   target-sparc: Let cpu_sparc_init() return SPARCCPU
>>>>>>>>   sun4m: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>>>>   sun4m: Pass SPARCCPU to {main,secondary}_cpu_reset()
>>>>>>>>   sun4u: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>>>>   sun4u: Let cpu_devinit() return SPARCCPU
>>>>>>>>   sun4u: Store SPARCCPU in ResetData
>>>>>>>>   leon3: Use cpu_sparc_init() to obtain SPARCCPU
>>>>>>>>   leon3: Store SPARCCPU in ResetData
>>>>>>> [...]
>>>>>
>>>>> Forgot to mention the bsd-user patch.
>>>>>
>>>>>>>>   Kill off cpu_state_reset()
>>>>>>>
>>>>>>> Ping! Blue, can you ack please?
>>>>>>
>>>>>> Otherwise the patches look pretty safe ("if it compiles, it works").
>>>
>>> Was I supposed to interpret that as an Acked-by? ;)
>>
>> No, but you may do so if it compiles. ;-)
>
> Joking, are we? My cover letter indicated pretty clearly on what
> platforms I had already compile-tested on, and that meant each patch.
> I had also run `make check` on each and the sparc test image for sun4m,
> HelenOS for sun4u and "crible" for leon3.

OK,
Acked-by: Blue Swirl <blauwirbel@gmail.com>

>
> Applied the remainder of the series to qom-next:
> http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next
>
> Tristan/Fabien, could you please submit a patch to document the Leon3
> machine in MAINTAINERS? No one got cc'ed on those two patches. Thanks.
>
> Andreas
>
> --
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg