* [RFC PATCH 00/11] OMAP System Control Module
@ 2012-05-25 8:25 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: amit.kucheria, balbi, linux-pm, linux-omap, linux-arm-kernel
Hello Paul and Tony,
This is a series of patches adding a basic support for system control module,
on OMAP4+ context. It is a working in progress, but I wanted to share already
to get your feedback.
I've modeled the driver as an MFD. You will see in this series:
. A rework of the system control module header (patch from Santosh, picked from the list)
. Device creation for control module core
. Early device creation for control module core
. The MFD core driver for system control module
. The MFD child for usb-phy pin control
. The MFD child for bandgap sensor
. Very early exposure of OMAP4 thermal zone
. All added drivers are only supporting DT probing
. The series is based on linux-omap master, as it has the hwmod entries for SCM.
The overall idea of this series is to put in place the infrastructure. It is
not touching nor removing the existing APIs under mach-omap2/control.c for now.
But the target is to have these APIs moved to the MFD core driver.
For early access, like ID checking, I have written the platform driver
as an early platform driver and you will see also early device addition
and probing under device.c for this case. This is of course a proposal.
I see that there are people that thing this is a bit of an overkill.
Konstantin (CCd) was proposing a simpler solution by having
APIs with early_* prefixes, and solve the IO address mapping with
a DT entry, for instance. But feel free to propose better ways.
This code has been ripped off from the Android 3.1 branch. I have rewritten
a couple of things, but the major driver functions and API's entries are kept.
So, based on this series, I see as a TODO list, for system control core driver:
- Start to move all the existing APIs under mach-omap2/control.c to the mfd core.
- Rewrite the users of the existing APIs, mentioned on previous item
Once we decide the API and agree on how to deal with early calls.
- Add remaining children (from top of my head, the CAM is one of them,
but I also think we should prob have one for HWOBS for instance)
- Test on boards that use the existing APIs.
TODO list for bandgap driver:
- Improve thermal zone definition for OMAP4
- Introduce the thermal zones for OMAP5
Amit, due to hwmod dep, I didn't include any cooling binding in this series,
based on the generic CPU cooling device.
Overall series has been tested only with panda board OMAP4460.
Your comments are welcome.
All best,
Eduardo Valentin (9):
ARM: OMAP: expose control.h to mach area
OMAP: Add early device for system control module
mfd: omap: control: core system control driver
OMAP2+: use control module mfd driver in omap_type
mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
ARM: OMAP4+: Adding the temperature sensor register set bit fields
ARM: OMAP4+: thermal: introduce bandgap temperature sensor
omap4: thermal: add basic CPU thermal zone
ARM: DT: Add support to system control module for OMAP4
Kishon Vijay Abraham I (1):
arm: omap: device: create a device for system control module
Santosh Shilimkar (1):
ARM: OMAP4: Remove un-used control module headers and defines.
.../devicetree/bindings/mfd/omap_control.txt | 44 +
.../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
arch/arm/boot/dts/omap4.dtsi | 13 +
arch/arm/mach-omap2/Kconfig | 1 +
arch/arm/mach-omap2/am35xx-emac.c | 2 +-
arch/arm/mach-omap2/board-3430sdp.c | 2 +-
arch/arm/mach-omap2/board-4430sdp.c | 2 +-
arch/arm/mach-omap2/board-am3517crane.c | 2 +-
arch/arm/mach-omap2/board-am3517evm.c | 2 +-
arch/arm/mach-omap2/board-apollon.c | 2 +-
arch/arm/mach-omap2/board-cm-t3517.c | 2 +-
arch/arm/mach-omap2/board-h4.c | 2 +-
arch/arm/mach-omap2/board-igep0020.c | 2 +-
arch/arm/mach-omap2/board-ldp.c | 2 +-
arch/arm/mach-omap2/board-omap3logic.c | 2 +-
arch/arm/mach-omap2/board-omap4panda.c | 2 +-
arch/arm/mach-omap2/board-omap4pcm049.c | 2 +-
arch/arm/mach-omap2/clock2420_data.c | 2 +-
arch/arm/mach-omap2/clock2430_data.c | 2 +-
arch/arm/mach-omap2/clock3xxx_data.c | 2 +-
arch/arm/mach-omap2/clock44xx_data.c | 2 +-
arch/arm/mach-omap2/common.c | 2 +-
arch/arm/mach-omap2/control.c | 2 +-
arch/arm/mach-omap2/cpuidle34xx.c | 2 +-
arch/arm/mach-omap2/devices.c | 57 +-
arch/arm/mach-omap2/display.c | 2 +-
arch/arm/mach-omap2/hsmmc.c | 2 +-
arch/arm/mach-omap2/id.c | 18 +-
arch/arm/mach-omap2/{ => include/mach}/control.h | 163 ++-
.../include/mach/ctrl_module_core_44xx.h | 391 -----
.../include/mach/ctrl_module_pad_core_44xx.h | 1409 -----------------
.../include/mach/ctrl_module_pad_wkup_44xx.h | 236 ---
.../include/mach/ctrl_module_wkup_44xx.h | 92 --
arch/arm/mach-omap2/mcbsp.c | 2 +-
arch/arm/mach-omap2/mux.c | 2 +-
arch/arm/mach-omap2/omap_phy_internal.c | 2 +-
arch/arm/mach-omap2/opp3xxx_data.c | 2 +-
arch/arm/mach-omap2/opp4xxx_data.c | 2 +-
arch/arm/mach-omap2/pm24xx.c | 2 +-
arch/arm/mach-omap2/pm34xx.c | 2 +-
arch/arm/mach-omap2/prcm.c | 2 +-
arch/arm/mach-omap2/serial.c | 2 +-
arch/arm/mach-omap2/sleep34xx.S | 2 +-
arch/arm/mach-omap2/sr_device.c | 2 +-
arch/arm/mach-omap2/usb-fs.c | 2 +-
arch/arm/mach-omap2/voltage.c | 2 +-
arch/arm/plat-omap/Kconfig | 3 +
drivers/mfd/Kconfig | 9 +
drivers/mfd/Makefile | 1 +
drivers/mfd/omap-control-core.c | 211 +++
drivers/thermal/Kconfig | 25 +
drivers/thermal/Makefile | 5 +-
drivers/thermal/omap-bandgap.c | 1602 ++++++++++++++++++++
drivers/thermal/omap-bandgap.h | 75 +
drivers/thermal/omap4-thermal.c | 72 +
drivers/usb/otg/Kconfig | 13 +
drivers/usb/otg/Makefile | 1 +
drivers/usb/otg/omap4-usb-phy.c | 130 ++
include/linux/mfd/omap_control.h | 69 +
include/linux/usb/omap4_usb_phy.h | 53 +
60 files changed, 2617 insertions(+), 2173 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
rename arch/arm/mach-omap2/{ => include/mach}/control.h (75%)
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
create mode 100644 drivers/mfd/omap-control-core.c
create mode 100644 drivers/thermal/omap-bandgap.c
create mode 100644 drivers/thermal/omap-bandgap.h
create mode 100644 drivers/thermal/omap4-thermal.c
create mode 100644 drivers/usb/otg/omap4-usb-phy.c
create mode 100644 include/linux/mfd/omap_control.h
create mode 100644 include/linux/usb/omap4_usb_phy.h
--
1.7.7.1.488.ge8e1c
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 00/11] OMAP System Control Module
@ 2012-05-25 8:25 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: linux-arm-kernel
Hello Paul and Tony,
This is a series of patches adding a basic support for system control module,
on OMAP4+ context. It is a working in progress, but I wanted to share already
to get your feedback.
I've modeled the driver as an MFD. You will see in this series:
. A rework of the system control module header (patch from Santosh, picked from the list)
. Device creation for control module core
. Early device creation for control module core
. The MFD core driver for system control module
. The MFD child for usb-phy pin control
. The MFD child for bandgap sensor
. Very early exposure of OMAP4 thermal zone
. All added drivers are only supporting DT probing
. The series is based on linux-omap master, as it has the hwmod entries for SCM.
The overall idea of this series is to put in place the infrastructure. It is
not touching nor removing the existing APIs under mach-omap2/control.c for now.
But the target is to have these APIs moved to the MFD core driver.
For early access, like ID checking, I have written the platform driver
as an early platform driver and you will see also early device addition
and probing under device.c for this case. This is of course a proposal.
I see that there are people that thing this is a bit of an overkill.
Konstantin (CCd) was proposing a simpler solution by having
APIs with early_* prefixes, and solve the IO address mapping with
a DT entry, for instance. But feel free to propose better ways.
This code has been ripped off from the Android 3.1 branch. I have rewritten
a couple of things, but the major driver functions and API's entries are kept.
So, based on this series, I see as a TODO list, for system control core driver:
- Start to move all the existing APIs under mach-omap2/control.c to the mfd core.
- Rewrite the users of the existing APIs, mentioned on previous item
Once we decide the API and agree on how to deal with early calls.
- Add remaining children (from top of my head, the CAM is one of them,
but I also think we should prob have one for HWOBS for instance)
- Test on boards that use the existing APIs.
TODO list for bandgap driver:
- Improve thermal zone definition for OMAP4
- Introduce the thermal zones for OMAP5
Amit, due to hwmod dep, I didn't include any cooling binding in this series,
based on the generic CPU cooling device.
Overall series has been tested only with panda board OMAP4460.
Your comments are welcome.
All best,
Eduardo Valentin (9):
ARM: OMAP: expose control.h to mach area
OMAP: Add early device for system control module
mfd: omap: control: core system control driver
OMAP2+: use control module mfd driver in omap_type
mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
ARM: OMAP4+: Adding the temperature sensor register set bit fields
ARM: OMAP4+: thermal: introduce bandgap temperature sensor
omap4: thermal: add basic CPU thermal zone
ARM: DT: Add support to system control module for OMAP4
Kishon Vijay Abraham I (1):
arm: omap: device: create a device for system control module
Santosh Shilimkar (1):
ARM: OMAP4: Remove un-used control module headers and defines.
.../devicetree/bindings/mfd/omap_control.txt | 44 +
.../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
arch/arm/boot/dts/omap4.dtsi | 13 +
arch/arm/mach-omap2/Kconfig | 1 +
arch/arm/mach-omap2/am35xx-emac.c | 2 +-
arch/arm/mach-omap2/board-3430sdp.c | 2 +-
arch/arm/mach-omap2/board-4430sdp.c | 2 +-
arch/arm/mach-omap2/board-am3517crane.c | 2 +-
arch/arm/mach-omap2/board-am3517evm.c | 2 +-
arch/arm/mach-omap2/board-apollon.c | 2 +-
arch/arm/mach-omap2/board-cm-t3517.c | 2 +-
arch/arm/mach-omap2/board-h4.c | 2 +-
arch/arm/mach-omap2/board-igep0020.c | 2 +-
arch/arm/mach-omap2/board-ldp.c | 2 +-
arch/arm/mach-omap2/board-omap3logic.c | 2 +-
arch/arm/mach-omap2/board-omap4panda.c | 2 +-
arch/arm/mach-omap2/board-omap4pcm049.c | 2 +-
arch/arm/mach-omap2/clock2420_data.c | 2 +-
arch/arm/mach-omap2/clock2430_data.c | 2 +-
arch/arm/mach-omap2/clock3xxx_data.c | 2 +-
arch/arm/mach-omap2/clock44xx_data.c | 2 +-
arch/arm/mach-omap2/common.c | 2 +-
arch/arm/mach-omap2/control.c | 2 +-
arch/arm/mach-omap2/cpuidle34xx.c | 2 +-
arch/arm/mach-omap2/devices.c | 57 +-
arch/arm/mach-omap2/display.c | 2 +-
arch/arm/mach-omap2/hsmmc.c | 2 +-
arch/arm/mach-omap2/id.c | 18 +-
arch/arm/mach-omap2/{ => include/mach}/control.h | 163 ++-
.../include/mach/ctrl_module_core_44xx.h | 391 -----
.../include/mach/ctrl_module_pad_core_44xx.h | 1409 -----------------
.../include/mach/ctrl_module_pad_wkup_44xx.h | 236 ---
.../include/mach/ctrl_module_wkup_44xx.h | 92 --
arch/arm/mach-omap2/mcbsp.c | 2 +-
arch/arm/mach-omap2/mux.c | 2 +-
arch/arm/mach-omap2/omap_phy_internal.c | 2 +-
arch/arm/mach-omap2/opp3xxx_data.c | 2 +-
arch/arm/mach-omap2/opp4xxx_data.c | 2 +-
arch/arm/mach-omap2/pm24xx.c | 2 +-
arch/arm/mach-omap2/pm34xx.c | 2 +-
arch/arm/mach-omap2/prcm.c | 2 +-
arch/arm/mach-omap2/serial.c | 2 +-
arch/arm/mach-omap2/sleep34xx.S | 2 +-
arch/arm/mach-omap2/sr_device.c | 2 +-
arch/arm/mach-omap2/usb-fs.c | 2 +-
arch/arm/mach-omap2/voltage.c | 2 +-
arch/arm/plat-omap/Kconfig | 3 +
drivers/mfd/Kconfig | 9 +
drivers/mfd/Makefile | 1 +
drivers/mfd/omap-control-core.c | 211 +++
drivers/thermal/Kconfig | 25 +
drivers/thermal/Makefile | 5 +-
drivers/thermal/omap-bandgap.c | 1602 ++++++++++++++++++++
drivers/thermal/omap-bandgap.h | 75 +
drivers/thermal/omap4-thermal.c | 72 +
drivers/usb/otg/Kconfig | 13 +
drivers/usb/otg/Makefile | 1 +
drivers/usb/otg/omap4-usb-phy.c | 130 ++
include/linux/mfd/omap_control.h | 69 +
include/linux/usb/omap4_usb_phy.h | 53 +
60 files changed, 2617 insertions(+), 2173 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
rename arch/arm/mach-omap2/{ => include/mach}/control.h (75%)
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
create mode 100644 drivers/mfd/omap-control-core.c
create mode 100644 drivers/thermal/omap-bandgap.c
create mode 100644 drivers/thermal/omap-bandgap.h
create mode 100644 drivers/thermal/omap4-thermal.c
create mode 100644 drivers/usb/otg/omap4-usb-phy.c
create mode 100644 include/linux/mfd/omap_control.h
create mode 100644 include/linux/usb/omap4_usb_phy.h
--
1.7.7.1.488.ge8e1c
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 01/11] ARM: OMAP4: Remove un-used control module headers and defines.
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 8:25 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: amit.kucheria, balbi, linux-pm, linux-omap, linux-arm-kernel
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
Most of the OMAP4 control module register defines are not used and
can be removed. Keep only needed defines and move them to common
control module header just like other OMAP versions.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/control.h | 45 +-
.../include/mach/ctrl_module_core_44xx.h | 391 ------
.../include/mach/ctrl_module_pad_core_44xx.h | 1409 --------------------
.../include/mach/ctrl_module_pad_wkup_44xx.h | 236 ----
.../include/mach/ctrl_module_wkup_44xx.h | 92 --
5 files changed, 40 insertions(+), 2133 deletions(-)
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index a406fd0..dad2903 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -16,11 +16,6 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H
#define __ARCH_ARM_MACH_OMAP2_CONTROL_H
-#include <mach/ctrl_module_core_44xx.h>
-#include <mach/ctrl_module_wkup_44xx.h>
-#include <mach/ctrl_module_pad_core_44xx.h>
-#include <mach/ctrl_module_pad_wkup_44xx.h>
-
#ifndef __ASSEMBLY__
#define OMAP242X_CTRL_REGADDR(reg) \
OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
@@ -183,6 +178,43 @@
#define OMAP3630_CONTROL_FUSE_OPP50_VDD2 (OMAP2_CONTROL_GENERAL + 0x0128)
#define OMAP3630_CONTROL_FUSE_OPP100_VDD2 (OMAP2_CONTROL_GENERAL + 0x012C)
+/* OMAP4 IDCODE CONTROL */
+#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1 0x0218
+#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4
+
+/* CONTROL_I2C_1 */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1 0x0624
+#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK (1 << 28)
+#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK (1 << 24)
+
+/* DSI CONTROL_DSIPHY */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY 0x0618
+#define OMAP4_DSI2_LANEENABLE_SHIFT 29
+#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29)
+#define OMAP4_DSI1_LANEENABLE_SHIFT 24
+#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24)
+#define OMAP4_DSI1_PIPD_SHIFT 19
+#define OMAP4_DSI1_PIPD_MASK (0x1f << 19)
+#define OMAP4_DSI2_PIPD_SHIFT 14
+#define OMAP4_DSI2_PIPD_MASK (0x1f << 14)
+
+/* CONTROL_PBIASLITE */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PBIASLITE 0x0600
+#define OMAP4_MMC1_PWRDNZ_MASK (1 << 26)
+#define OMAP4_MMC1_PBIASLITE_VMODE_MASK (1 << 21)
+#define OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK (1 << 22)
+#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK (1 << 23)
+
+/* CONTROL_MMC1 */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC1 0x0628
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_MASK (1 << 31)
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK (1 << 30)
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK (1 << 29)
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK (1 << 28)
+#define OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK (1 << 27)
+#define OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK (1 << 26)
+#define OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK (1 << 25)
+
/* OMAP44xx control efuse offsets */
#define OMAP44XX_CONTROL_FUSE_IVA_OPP50 0x22C
#define OMAP44XX_CONTROL_FUSE_IVA_OPP100 0x22F
@@ -195,6 +227,9 @@
#define OMAP44XX_CONTROL_FUSE_CORE_OPP50 0x254
#define OMAP44XX_CONTROL_FUSE_CORE_OPP100 0x257
+/* OMAP44xx control McBSP padconf */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
+
/* AM35XX only CONTROL_GENERAL register offsets */
#define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
#define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
deleted file mode 100644
index 2f7ac70..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
+++ /dev/null
@@ -1,391 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_CORE registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson@ti.com)
- * Santosh Shilimkar (santosh.shilimkar@ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_CORE_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_CORE_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_CORE 0x4a002000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_CORE_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_CORE_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_CORE_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_0 0x0200
-#define OMAP4_CTRL_MODULE_CORE_ID_CODE 0x0204
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_1 0x0208
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_2 0x020c
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_3 0x0210
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_0 0x0214
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1 0x0218
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_USB_CONF 0x021c
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_VDD_WKUP 0x0228
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_BGAP 0x0260
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_0 0x0264
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268
-#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4
-#define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300
-#define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314
-#define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318
-#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320
-#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_MPU_VOLTAGE_CTRL 0x0324
-#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_CORE_VOLTAGE_CTRL 0x0328
-#define OMAP4_CTRL_MODULE_CORE_TEMP_SENSOR 0x032c
-#define OMAP4_CTRL_MODULE_CORE_DPLL_NWELL_TRIM_0 0x0330
-#define OMAP4_CTRL_MODULE_CORE_DPLL_NWELL_TRIM_1 0x0334
-#define OMAP4_CTRL_MODULE_CORE_USBOTGHS_CONTROL 0x033c
-#define OMAP4_CTRL_MODULE_CORE_DSS_CONTROL 0x0340
-#define OMAP4_CTRL_MODULE_CORE_HWOBS_CONTROL 0x0350
-#define OMAP4_CTRL_MODULE_CORE_DEBOBS_FINAL_MUX_SEL 0x0400
-#define OMAP4_CTRL_MODULE_CORE_DEBOBS_MMR_MPU 0x0408
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL0 0x042c
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL1 0x0430
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL2 0x0434
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL3 0x0438
-#define OMAP4_CTRL_MODULE_CORE_CONF_CLK_SEL0 0x0440
-#define OMAP4_CTRL_MODULE_CORE_CONF_CLK_SEL1 0x0444
-#define OMAP4_CTRL_MODULE_CORE_CONF_CLK_SEL2 0x0448
-#define OMAP4_CTRL_MODULE_CORE_CONF_DPLL_FREQLOCK_SEL 0x044c
-#define OMAP4_CTRL_MODULE_CORE_CONF_DPLL_TINITZ_SEL 0x0450
-#define OMAP4_CTRL_MODULE_CORE_CONF_DPLL_PHASELOCK_SEL 0x0454
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_0 0x0480
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_1 0x0484
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_2 0x0488
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_3 0x048c
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_4 0x0490
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_5 0x0494
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_6 0x0498
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_7 0x049c
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_8 0x04a0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_9 0x04a4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_10 0x04a8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_11 0x04ac
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_12 0x04b0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_13 0x04b4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_14 0x04b8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_15 0x04bc
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_16 0x04c0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_17 0x04c4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_18 0x04c8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_19 0x04cc
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_20 0x04d0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_21 0x04d4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_22 0x04d8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_23 0x04dc
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_24 0x04e0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_25 0x04e4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_26 0x04e8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_27 0x04ec
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_28 0x04f0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_29 0x04f4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_30 0x04f8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_31 0x04fc
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* STD_FUSE_DIE_ID_0 */
-#define OMAP4_STD_FUSE_DIE_ID_0_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_0_MASK (0xffffffff << 0)
-
-/* ID_CODE */
-#define OMAP4_STD_FUSE_IDCODE_SHIFT 0
-#define OMAP4_STD_FUSE_IDCODE_MASK (0xffffffff << 0)
-
-/* STD_FUSE_DIE_ID_1 */
-#define OMAP4_STD_FUSE_DIE_ID_1_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_1_MASK (0xffffffff << 0)
-
-/* STD_FUSE_DIE_ID_2 */
-#define OMAP4_STD_FUSE_DIE_ID_2_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_2_MASK (0xffffffff << 0)
-
-/* STD_FUSE_DIE_ID_3 */
-#define OMAP4_STD_FUSE_DIE_ID_3_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_3_MASK (0xffffffff << 0)
-
-/* STD_FUSE_PROD_ID_0 */
-#define OMAP4_STD_FUSE_PROD_ID_0_SHIFT 0
-#define OMAP4_STD_FUSE_PROD_ID_0_MASK (0xffffffff << 0)
-
-/* STD_FUSE_PROD_ID_1 */
-#define OMAP4_STD_FUSE_PROD_ID_1_SHIFT 0
-#define OMAP4_STD_FUSE_PROD_ID_1_MASK (0xffffffff << 0)
-
-/* STD_FUSE_USB_CONF */
-#define OMAP4_USB_PROD_ID_SHIFT 16
-#define OMAP4_USB_PROD_ID_MASK (0xffff << 16)
-#define OMAP4_USB_VENDOR_ID_SHIFT 0
-#define OMAP4_USB_VENDOR_ID_MASK (0xffff << 0)
-
-/* STD_FUSE_OPP_VDD_WKUP */
-#define OMAP4_STD_FUSE_OPP_VDD_WKUP_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_VDD_WKUP_MASK (0xffffffff << 0)
-
-/* STD_FUSE_OPP_BGAP */
-#define OMAP4_STD_FUSE_OPP_BGAP_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_BGAP_MASK (0xffffffff << 0)
-
-/* STD_FUSE_OPP_DPLL_0 */
-#define OMAP4_STD_FUSE_OPP_DPLL_0_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_DPLL_0_MASK (0xffffffff << 0)
-
-/* STD_FUSE_OPP_DPLL_1 */
-#define OMAP4_STD_FUSE_OPP_DPLL_1_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_DPLL_1_MASK (0xffffffff << 0)
-
-/* STATUS */
-#define OMAP4_ATTILA_CONF_SHIFT 11
-#define OMAP4_ATTILA_CONF_MASK (0x3 << 11)
-#define OMAP4_DEVICE_TYPE_SHIFT 8
-#define OMAP4_DEVICE_TYPE_MASK (0x7 << 8)
-#define OMAP4_SYS_BOOT_SHIFT 0
-#define OMAP4_SYS_BOOT_MASK (0xff << 0)
-
-/* DEV_CONF */
-#define OMAP4_DEV_CONF_SHIFT 1
-#define OMAP4_DEV_CONF_MASK (0x7fffffff << 1)
-#define OMAP4_USBPHY_PD_SHIFT 0
-#define OMAP4_USBPHY_PD_MASK (1 << 0)
-
-/* LDOVBB_IVA_VOLTAGE_CTRL */
-#define OMAP4_LDOVBBIVA_RBB_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOVBBIVA_RBB_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOVBBIVA_RBB_VSET_IN_SHIFT 21
-#define OMAP4_LDOVBBIVA_RBB_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOVBBIVA_RBB_VSET_OUT_SHIFT 16
-#define OMAP4_LDOVBBIVA_RBB_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOVBBIVA_FBB_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOVBBIVA_FBB_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOVBBIVA_FBB_VSET_IN_SHIFT 5
-#define OMAP4_LDOVBBIVA_FBB_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOVBBIVA_FBB_VSET_OUT_SHIFT 0
-#define OMAP4_LDOVBBIVA_FBB_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOVBB_MPU_VOLTAGE_CTRL */
-#define OMAP4_LDOVBBMPU_RBB_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOVBBMPU_RBB_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOVBBMPU_RBB_VSET_IN_SHIFT 21
-#define OMAP4_LDOVBBMPU_RBB_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOVBBMPU_RBB_VSET_OUT_SHIFT 16
-#define OMAP4_LDOVBBMPU_RBB_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOVBBMPU_FBB_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOVBBMPU_FBB_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOVBBMPU_FBB_VSET_IN_SHIFT 5
-#define OMAP4_LDOVBBMPU_FBB_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOVBBMPU_FBB_VSET_OUT_SHIFT 0
-#define OMAP4_LDOVBBMPU_FBB_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOSRAM_IVA_VOLTAGE_CTRL */
-#define OMAP4_LDOSRAMIVA_RETMODE_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOSRAMIVA_RETMODE_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_IN_SHIFT 21
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_OUT_SHIFT 16
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOSRAMIVA_ACTMODE_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOSRAMIVA_ACTMODE_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_IN_SHIFT 5
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_OUT_SHIFT 0
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOSRAM_MPU_VOLTAGE_CTRL */
-#define OMAP4_LDOSRAMMPU_RETMODE_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOSRAMMPU_RETMODE_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_IN_SHIFT 21
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_OUT_SHIFT 16
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOSRAMMPU_ACTMODE_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOSRAMMPU_ACTMODE_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_IN_SHIFT 5
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_OUT_SHIFT 0
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOSRAM_CORE_VOLTAGE_CTRL */
-#define OMAP4_LDOSRAMCORE_RETMODE_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOSRAMCORE_RETMODE_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_IN_SHIFT 21
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_OUT_SHIFT 16
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOSRAMCORE_ACTMODE_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOSRAMCORE_ACTMODE_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_IN_SHIFT 5
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_OUT_SHIFT 0
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_OUT_MASK (0x1f << 0)
-
-/* TEMP_SENSOR */
-#define OMAP4_BGAP_TEMPSOFF_SHIFT 12
-#define OMAP4_BGAP_TEMPSOFF_MASK (1 << 12)
-#define OMAP4_BGAP_TSHUT_SHIFT 11
-#define OMAP4_BGAP_TSHUT_MASK (1 << 11)
-#define OMAP4_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10
-#define OMAP4_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10)
-#define OMAP4_BGAP_TEMP_SENSOR_SOC_SHIFT 9
-#define OMAP4_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9)
-#define OMAP4_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8
-#define OMAP4_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8)
-#define OMAP4_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
-#define OMAP4_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0)
-
-/* DPLL_NWELL_TRIM_0 */
-#define OMAP4_DPLL_ABE_NWELL_TRIM_MUX_CTRL_SHIFT 29
-#define OMAP4_DPLL_ABE_NWELL_TRIM_MUX_CTRL_MASK (1 << 29)
-#define OMAP4_DPLL_ABE_NWELL_TRIM_SHIFT 24
-#define OMAP4_DPLL_ABE_NWELL_TRIM_MASK (0x1f << 24)
-#define OMAP4_DPLL_PER_NWELL_TRIM_MUX_CTRL_SHIFT 23
-#define OMAP4_DPLL_PER_NWELL_TRIM_MUX_CTRL_MASK (1 << 23)
-#define OMAP4_DPLL_PER_NWELL_TRIM_SHIFT 18
-#define OMAP4_DPLL_PER_NWELL_TRIM_MASK (0x1f << 18)
-#define OMAP4_DPLL_CORE_NWELL_TRIM_MUX_CTRL_SHIFT 17
-#define OMAP4_DPLL_CORE_NWELL_TRIM_MUX_CTRL_MASK (1 << 17)
-#define OMAP4_DPLL_CORE_NWELL_TRIM_SHIFT 12
-#define OMAP4_DPLL_CORE_NWELL_TRIM_MASK (0x1f << 12)
-#define OMAP4_DPLL_IVA_NWELL_TRIM_MUX_CTRL_SHIFT 11
-#define OMAP4_DPLL_IVA_NWELL_TRIM_MUX_CTRL_MASK (1 << 11)
-#define OMAP4_DPLL_IVA_NWELL_TRIM_SHIFT 6
-#define OMAP4_DPLL_IVA_NWELL_TRIM_MASK (0x1f << 6)
-#define OMAP4_DPLL_MPU_NWELL_TRIM_MUX_CTRL_SHIFT 5
-#define OMAP4_DPLL_MPU_NWELL_TRIM_MUX_CTRL_MASK (1 << 5)
-#define OMAP4_DPLL_MPU_NWELL_TRIM_SHIFT 0
-#define OMAP4_DPLL_MPU_NWELL_TRIM_MASK (0x1f << 0)
-
-/* DPLL_NWELL_TRIM_1 */
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_MUX_CTRL_SHIFT 29
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_MUX_CTRL_MASK (1 << 29)
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_SHIFT 24
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_MASK (0x1f << 24)
-#define OMAP4_DPLL_USB_NWELL_TRIM_MUX_CTRL_SHIFT 23
-#define OMAP4_DPLL_USB_NWELL_TRIM_MUX_CTRL_MASK (1 << 23)
-#define OMAP4_DPLL_USB_NWELL_TRIM_SHIFT 18
-#define OMAP4_DPLL_USB_NWELL_TRIM_MASK (0x1f << 18)
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_MUX_CTRL_SHIFT 17
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_MUX_CTRL_MASK (1 << 17)
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_SHIFT 12
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_MASK (0x1f << 12)
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_MUX_CTRL_SHIFT 11
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_MUX_CTRL_MASK (1 << 11)
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_SHIFT 6
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_MASK (0x1f << 6)
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_MUX_CTRL_SHIFT 5
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_MUX_CTRL_MASK (1 << 5)
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_SHIFT 0
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_MASK (0x1f << 0)
-
-/* USBOTGHS_CONTROL */
-#define OMAP4_DISCHRGVBUS_SHIFT 8
-#define OMAP4_DISCHRGVBUS_MASK (1 << 8)
-#define OMAP4_CHRGVBUS_SHIFT 7
-#define OMAP4_CHRGVBUS_MASK (1 << 7)
-#define OMAP4_DRVVBUS_SHIFT 6
-#define OMAP4_DRVVBUS_MASK (1 << 6)
-#define OMAP4_IDPULLUP_SHIFT 5
-#define OMAP4_IDPULLUP_MASK (1 << 5)
-#define OMAP4_IDDIG_SHIFT 4
-#define OMAP4_IDDIG_MASK (1 << 4)
-#define OMAP4_SESSEND_SHIFT 3
-#define OMAP4_SESSEND_MASK (1 << 3)
-#define OMAP4_VBUSVALID_SHIFT 2
-#define OMAP4_VBUSVALID_MASK (1 << 2)
-#define OMAP4_BVALID_SHIFT 1
-#define OMAP4_BVALID_MASK (1 << 1)
-#define OMAP4_AVALID_SHIFT 0
-#define OMAP4_AVALID_MASK (1 << 0)
-
-/* DSS_CONTROL */
-#define OMAP4_DSS_MUX6_SELECT_SHIFT 0
-#define OMAP4_DSS_MUX6_SELECT_MASK (1 << 0)
-
-/* HWOBS_CONTROL */
-#define OMAP4_HWOBS_CLKDIV_SEL_SHIFT 3
-#define OMAP4_HWOBS_CLKDIV_SEL_MASK (0x1f << 3)
-#define OMAP4_HWOBS_ALL_ZERO_MODE_SHIFT 2
-#define OMAP4_HWOBS_ALL_ZERO_MODE_MASK (1 << 2)
-#define OMAP4_HWOBS_ALL_ONE_MODE_SHIFT 1
-#define OMAP4_HWOBS_ALL_ONE_MODE_MASK (1 << 1)
-#define OMAP4_HWOBS_MACRO_ENABLE_SHIFT 0
-#define OMAP4_HWOBS_MACRO_ENABLE_MASK (1 << 0)
-
-/* DEBOBS_FINAL_MUX_SEL */
-#define OMAP4_SELECT_SHIFT 0
-#define OMAP4_SELECT_MASK (0xffffffff << 0)
-
-/* DEBOBS_MMR_MPU */
-#define OMAP4_SELECT_DEBOBS_MMR_MPU_SHIFT 0
-#define OMAP4_SELECT_DEBOBS_MMR_MPU_MASK (0xf << 0)
-
-/* CONF_SDMA_REQ_SEL0 */
-#define OMAP4_MULT_SHIFT 0
-#define OMAP4_MULT_MASK (0x7f << 0)
-
-/* CONF_CLK_SEL0 */
-#define OMAP4_MULT_CONF_CLK_SEL0_SHIFT 0
-#define OMAP4_MULT_CONF_CLK_SEL0_MASK (0x7 << 0)
-
-/* CONF_CLK_SEL1 */
-#define OMAP4_MULT_CONF_CLK_SEL1_SHIFT 0
-#define OMAP4_MULT_CONF_CLK_SEL1_MASK (0x7 << 0)
-
-/* CONF_CLK_SEL2 */
-#define OMAP4_MULT_CONF_CLK_SEL2_SHIFT 0
-#define OMAP4_MULT_CONF_CLK_SEL2_MASK (0x7 << 0)
-
-/* CONF_DPLL_FREQLOCK_SEL */
-#define OMAP4_MULT_CONF_DPLL_FREQLOCK_SEL_SHIFT 0
-#define OMAP4_MULT_CONF_DPLL_FREQLOCK_SEL_MASK (0x7 << 0)
-
-/* CONF_DPLL_TINITZ_SEL */
-#define OMAP4_MULT_CONF_DPLL_TINITZ_SEL_SHIFT 0
-#define OMAP4_MULT_CONF_DPLL_TINITZ_SEL_MASK (0x7 << 0)
-
-/* CONF_DPLL_PHASELOCK_SEL */
-#define OMAP4_MULT_CONF_DPLL_PHASELOCK_SEL_SHIFT 0
-#define OMAP4_MULT_CONF_DPLL_PHASELOCK_SEL_MASK (0x7 << 0)
-
-/* CONF_DEBUG_SEL_TST_0 */
-#define OMAP4_MODE_SHIFT 0
-#define OMAP4_MODE_MASK (0xf << 0)
-
-#endif
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
deleted file mode 100644
index c88420d..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
+++ /dev/null
@@ -1,1409 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_PAD_CORE registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson@ti.com)
- * Santosh Shilimkar (santosh.shilimkar@ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_CORE_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_CORE_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_PAD_CORE 0x4a100000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_PAD_CORE_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_PAD_CORE_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_PAD_CORE_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_0 0x01d8
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_1 0x01dc
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_2 0x01e0
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_3 0x01e4
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_4 0x01e8
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_5 0x01ec
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_6 0x01f0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PADCONF_GLOBAL 0x05a0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PADCONF_MODE 0x05a4
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART1IO_PADCONF_0 0x05a8
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART1IO_PADCONF_1 0x05ac
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_0 0x05b0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_1 0x05b4
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_0 0x05b8
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_1 0x05bc
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_2 0x05c0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USBB_HSIC 0x05c4
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SLIMBUS 0x05c8
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PBIASLITE 0x0600
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_0 0x0604
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_CAMERA_RX 0x0608
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_AVDAC 0x060c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HDMI_TX_PHY 0x0610
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC2 0x0614
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY 0x0618
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USB2PHYCORE 0x0620
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1 0x0624
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC1 0x0628
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HSI 0x062c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USB 0x0630
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HDQ 0x0634
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_0 0x0638
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_1 0x063c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_2 0x0640
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_3 0x0644
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_0 0x0648
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_1 0x064c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_2 0x0650
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_3 0x0654
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_BUS_HOLD 0x0658
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_C2C 0x065c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_RW 0x0660
-#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_R 0x0664
-#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_R_C0 0x0668
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_1 0x0700
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_2 0x0704
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_3 0x0708
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_4 0x070c
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* PADCONF_WAKEUPEVENT_0 */
-#define OMAP4_GPMC_CLK_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_GPMC_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_GPMC_NWP_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_GPMC_NWP_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_GPMC_NCS3_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_GPMC_NCS3_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_GPMC_NCS2_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_GPMC_NCS2_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_GPMC_NCS1_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_GPMC_NCS1_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_GPMC_NCS0_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_GPMC_NCS0_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_GPMC_A25_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_GPMC_A25_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_GPMC_A24_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_GPMC_A24_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_GPMC_A23_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_GPMC_A23_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_GPMC_A22_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_GPMC_A22_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_GPMC_A21_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_GPMC_A21_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_GPMC_A20_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_GPMC_A20_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_GPMC_A19_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_GPMC_A19_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_GPMC_A18_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_GPMC_A18_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_GPMC_A17_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_GPMC_A17_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_GPMC_A16_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_GPMC_A16_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_GPMC_AD15_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_GPMC_AD15_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_GPMC_AD14_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_GPMC_AD14_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_GPMC_AD13_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_GPMC_AD13_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_GPMC_AD12_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_GPMC_AD12_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_GPMC_AD11_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_GPMC_AD11_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_GPMC_AD10_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_GPMC_AD10_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_GPMC_AD9_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_GPMC_AD9_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_GPMC_AD8_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_GPMC_AD8_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_GPMC_AD7_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_GPMC_AD7_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_GPMC_AD6_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_GPMC_AD6_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_GPMC_AD5_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_GPMC_AD5_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_GPMC_AD4_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_GPMC_AD4_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_GPMC_AD3_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_GPMC_AD3_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_GPMC_AD2_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_GPMC_AD2_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_GPMC_AD1_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_GPMC_AD1_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_GPMC_AD0_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_GPMC_AD0_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_1 */
-#define OMAP4_CAM_STROBE_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_CAM_STROBE_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_CAM_SHUTTER_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_CAM_SHUTTER_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_CSI22_DY1_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_CSI22_DY1_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_CSI22_DX1_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_CSI22_DX1_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_CSI22_DY0_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_CSI22_DY0_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_CSI22_DX0_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_CSI22_DX0_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_CSI21_DY4_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_CSI21_DY4_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_CSI21_DX4_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_CSI21_DX4_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_CSI21_DY3_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_CSI21_DY3_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_CSI21_DX3_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_CSI21_DX3_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_CSI21_DY2_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_CSI21_DY2_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_CSI21_DX2_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_CSI21_DX2_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_CSI21_DY1_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_CSI21_DY1_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_CSI21_DX1_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_CSI21_DX1_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_CSI21_DY0_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_CSI21_DY0_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_CSI21_DX0_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_CSI21_DX0_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_HDMI_DDC_SDA_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_HDMI_DDC_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_HDMI_DDC_SCL_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_HDMI_DDC_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_HDMI_CEC_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_HDMI_CEC_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_HDMI_HPD_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_HDMI_HPD_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_C2C_DATA15_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_C2C_DATA15_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_C2C_DATA14_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_C2C_DATA14_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_C2C_DATA13_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_C2C_DATA13_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_C2C_DATA12_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_C2C_DATA12_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_C2C_DATA11_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_C2C_DATA11_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_GPMC_WAIT1_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_GPMC_WAIT1_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_GPMC_WAIT0_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_GPMC_WAIT0_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_GPMC_NBE1_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_GPMC_NBE1_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_GPMC_NBE0_CLE_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_GPMC_NBE0_CLE_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_GPMC_NWE_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_GPMC_NWE_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_GPMC_NOE_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_GPMC_NOE_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_GPMC_NADV_ALE_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_GPMC_NADV_ALE_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_2 */
-#define OMAP4_ABE_MCBSP1_CLKX_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_ABE_MCBSP1_CLKX_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_ABE_MCBSP2_FSX_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_ABE_MCBSP2_FSX_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_ABE_MCBSP2_DX_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_ABE_MCBSP2_DX_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_ABE_MCBSP2_DR_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_ABE_MCBSP2_DR_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_ABE_MCBSP2_CLKX_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_ABE_MCBSP2_CLKX_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_SDMMC1_DAT7_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_SDMMC1_DAT7_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_SDMMC1_DAT6_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_SDMMC1_DAT6_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_SDMMC1_DAT5_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_SDMMC1_DAT5_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_SDMMC1_DAT4_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_SDMMC1_DAT4_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_SDMMC1_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_SDMMC1_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_SDMMC1_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_SDMMC1_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_SDMMC1_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_SDMMC1_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_SDMMC1_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_SDMMC1_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_SDMMC1_CMD_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_SDMMC1_CMD_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_SDMMC1_CLK_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_SDMMC1_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_USBC1_ICUSB_DM_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_USBC1_ICUSB_DM_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_USBC1_ICUSB_DP_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_USBC1_ICUSB_DP_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_USBB1_HSIC_STROBE_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_USBB1_HSIC_STROBE_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_USBB1_HSIC_DATA_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_USBB1_HSIC_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_USBB1_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_USBB1_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_USBB1_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_USBB1_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_USBB1_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_USBB1_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_USBB1_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_USBB1_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_USBB1_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_USBB1_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_USBB1_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_USBB1_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_USBB1_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_USBB1_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_USBB1_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_USBB1_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_USBB1_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_USBB1_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_USBB1_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_USBB1_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_USBB1_ULPITLL_STP_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_USBB1_ULPITLL_STP_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_USBB1_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_USBB1_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_CAM_GLOBALRESET_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_CAM_GLOBALRESET_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_3 */
-#define OMAP4_MCSPI1_CS3_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_MCSPI1_CS3_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_MCSPI1_CS2_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_MCSPI1_CS2_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_MCSPI1_CS1_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_MCSPI1_CS1_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_MCSPI1_CS0_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_MCSPI1_CS0_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_MCSPI1_SIMO_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_MCSPI1_SIMO_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_MCSPI1_SOMI_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_MCSPI1_SOMI_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_MCSPI1_CLK_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_MCSPI1_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_I2C4_SDA_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_I2C4_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_I2C4_SCL_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_I2C4_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_I2C3_SDA_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_I2C3_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_I2C3_SCL_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_I2C3_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_I2C2_SDA_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_I2C2_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_I2C2_SCL_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_I2C2_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_I2C1_SDA_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_I2C1_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_I2C1_SCL_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_I2C1_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_HDQ_SIO_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_HDQ_SIO_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_UART2_TX_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_UART2_TX_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_UART2_RX_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_UART2_RX_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_UART2_RTS_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_UART2_RTS_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_UART2_CTS_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_UART2_CTS_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_ABE_DMIC_DIN3_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_ABE_DMIC_DIN3_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_ABE_DMIC_DIN2_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_ABE_DMIC_DIN2_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_ABE_DMIC_DIN1_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_ABE_DMIC_DIN1_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_ABE_DMIC_CLK1_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_ABE_DMIC_CLK1_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_ABE_CLKS_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_ABE_CLKS_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_ABE_PDM_LB_CLK_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_ABE_PDM_LB_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_ABE_PDM_FRAME_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_ABE_PDM_FRAME_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_ABE_PDM_DL_DATA_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_ABE_PDM_DL_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_ABE_PDM_UL_DATA_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_ABE_PDM_UL_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_ABE_MCBSP1_FSX_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_ABE_MCBSP1_FSX_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_ABE_MCBSP1_DX_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_ABE_MCBSP1_DX_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_ABE_MCBSP1_DR_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_ABE_MCBSP1_DR_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_4 */
-#define OMAP4_UNIPRO_TY0_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_UNIPRO_TY0_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_UNIPRO_TX0_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_UNIPRO_TX0_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_USBB2_HSIC_STROBE_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_USBB2_HSIC_STROBE_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_USBB2_HSIC_DATA_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_USBB2_HSIC_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_USBB2_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_USBB2_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_USBB2_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_USBB2_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_USBB2_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_USBB2_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_USBB2_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_USBB2_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_USBB2_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_USBB2_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_USBB2_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_USBB2_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_USBB2_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_USBB2_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_USBB2_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_USBB2_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_USBB2_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_USBB2_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_USBB2_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_USBB2_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_USBB2_ULPITLL_STP_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_USBB2_ULPITLL_STP_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_USBB2_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_USBB2_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_UART4_TX_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_UART4_TX_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_UART4_RX_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_UART4_RX_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_MCSPI4_CS0_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_MCSPI4_CS0_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_MCSPI4_SOMI_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_MCSPI4_SOMI_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_MCSPI4_SIMO_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_MCSPI4_SIMO_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_MCSPI4_CLK_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_MCSPI4_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_SDMMC5_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_SDMMC5_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_SDMMC5_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_SDMMC5_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_SDMMC5_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_SDMMC5_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_SDMMC5_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_SDMMC5_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_SDMMC5_CMD_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_SDMMC5_CMD_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_SDMMC5_CLK_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_SDMMC5_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_UART3_TX_IRTX_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_UART3_TX_IRTX_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_UART3_RX_IRRX_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_UART3_RX_IRRX_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_UART3_RTS_SD_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_UART3_RTS_SD_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_UART3_CTS_RCTX_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_UART3_CTS_RCTX_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_5 */
-#define OMAP4_DPM_EMU11_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_DPM_EMU11_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_DPM_EMU10_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_DPM_EMU10_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_DPM_EMU9_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_DPM_EMU9_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_DPM_EMU8_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_DPM_EMU8_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_DPM_EMU7_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_DPM_EMU7_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_DPM_EMU6_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_DPM_EMU6_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_DPM_EMU5_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_DPM_EMU5_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_DPM_EMU4_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_DPM_EMU4_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_DPM_EMU3_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_DPM_EMU3_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_DPM_EMU2_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_DPM_EMU2_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_DPM_EMU1_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_DPM_EMU1_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_DPM_EMU0_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_DPM_EMU0_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_SYS_BOOT5_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_SYS_BOOT5_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_SYS_BOOT4_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_SYS_BOOT4_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_SYS_BOOT3_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_SYS_BOOT3_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_SYS_BOOT2_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_SYS_BOOT2_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_SYS_BOOT1_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_SYS_BOOT1_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_SYS_BOOT0_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_SYS_BOOT0_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_SYS_NIRQ2_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_SYS_NIRQ2_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_SYS_NIRQ1_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_SYS_NIRQ1_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_FREF_CLK2_OUT_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_FREF_CLK2_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_FREF_CLK1_OUT_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_FREF_CLK1_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_UNIPRO_RY2_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_UNIPRO_RY2_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_UNIPRO_RX2_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_UNIPRO_RX2_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_UNIPRO_RY1_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_UNIPRO_RY1_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_UNIPRO_RX1_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_UNIPRO_RX1_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_UNIPRO_RY0_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_UNIPRO_RY0_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_UNIPRO_RX0_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_UNIPRO_RX0_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_UNIPRO_TY2_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_UNIPRO_TY2_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_UNIPRO_TX2_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_UNIPRO_TX2_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_UNIPRO_TY1_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_UNIPRO_TY1_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_UNIPRO_TX1_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_UNIPRO_TX1_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_6 */
-#define OMAP4_DPM_EMU19_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_DPM_EMU19_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_DPM_EMU18_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_DPM_EMU18_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_DPM_EMU17_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_DPM_EMU17_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_DPM_EMU16_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_DPM_EMU16_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_DPM_EMU15_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_DPM_EMU15_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_DPM_EMU14_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_DPM_EMU14_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_DPM_EMU13_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_DPM_EMU13_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_DPM_EMU12_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_DPM_EMU12_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* CONTROL_PADCONF_GLOBAL */
-#define OMAP4_FORCE_OFFMODE_EN_SHIFT 31
-#define OMAP4_FORCE_OFFMODE_EN_MASK (1 << 31)
-
-/* CONTROL_PADCONF_MODE */
-#define OMAP4_VDDS_DV_BANK0_SHIFT 31
-#define OMAP4_VDDS_DV_BANK0_MASK (1 << 31)
-#define OMAP4_VDDS_DV_BANK1_SHIFT 30
-#define OMAP4_VDDS_DV_BANK1_MASK (1 << 30)
-#define OMAP4_VDDS_DV_BANK3_SHIFT 29
-#define OMAP4_VDDS_DV_BANK3_MASK (1 << 29)
-#define OMAP4_VDDS_DV_BANK4_SHIFT 28
-#define OMAP4_VDDS_DV_BANK4_MASK (1 << 28)
-#define OMAP4_VDDS_DV_BANK5_SHIFT 27
-#define OMAP4_VDDS_DV_BANK5_MASK (1 << 27)
-#define OMAP4_VDDS_DV_BANK6_SHIFT 26
-#define OMAP4_VDDS_DV_BANK6_MASK (1 << 26)
-#define OMAP4_VDDS_DV_C2C_SHIFT 25
-#define OMAP4_VDDS_DV_C2C_MASK (1 << 25)
-#define OMAP4_VDDS_DV_CAM_SHIFT 24
-#define OMAP4_VDDS_DV_CAM_MASK (1 << 24)
-#define OMAP4_VDDS_DV_GPMC_SHIFT 23
-#define OMAP4_VDDS_DV_GPMC_MASK (1 << 23)
-#define OMAP4_VDDS_DV_SDMMC2_SHIFT 22
-#define OMAP4_VDDS_DV_SDMMC2_MASK (1 << 22)
-
-/* CONTROL_SMART1IO_PADCONF_0 */
-#define OMAP4_ABE_DR0_SC_SHIFT 30
-#define OMAP4_ABE_DR0_SC_MASK (0x3 << 30)
-#define OMAP4_CAM_DR0_SC_SHIFT 28
-#define OMAP4_CAM_DR0_SC_MASK (0x3 << 28)
-#define OMAP4_FREF_DR2_SC_SHIFT 26
-#define OMAP4_FREF_DR2_SC_MASK (0x3 << 26)
-#define OMAP4_FREF_DR3_SC_SHIFT 24
-#define OMAP4_FREF_DR3_SC_MASK (0x3 << 24)
-#define OMAP4_GPIO_DR8_SC_SHIFT 22
-#define OMAP4_GPIO_DR8_SC_MASK (0x3 << 22)
-#define OMAP4_GPIO_DR9_SC_SHIFT 20
-#define OMAP4_GPIO_DR9_SC_MASK (0x3 << 20)
-#define OMAP4_GPMC_DR2_SC_SHIFT 18
-#define OMAP4_GPMC_DR2_SC_MASK (0x3 << 18)
-#define OMAP4_GPMC_DR3_SC_SHIFT 16
-#define OMAP4_GPMC_DR3_SC_MASK (0x3 << 16)
-#define OMAP4_GPMC_DR6_SC_SHIFT 14
-#define OMAP4_GPMC_DR6_SC_MASK (0x3 << 14)
-#define OMAP4_HDMI_DR0_SC_SHIFT 12
-#define OMAP4_HDMI_DR0_SC_MASK (0x3 << 12)
-#define OMAP4_MCSPI1_DR0_SC_SHIFT 10
-#define OMAP4_MCSPI1_DR0_SC_MASK (0x3 << 10)
-#define OMAP4_UART1_DR0_SC_SHIFT 8
-#define OMAP4_UART1_DR0_SC_MASK (0x3 << 8)
-#define OMAP4_UART3_DR0_SC_SHIFT 6
-#define OMAP4_UART3_DR0_SC_MASK (0x3 << 6)
-#define OMAP4_UART3_DR1_SC_SHIFT 4
-#define OMAP4_UART3_DR1_SC_MASK (0x3 << 4)
-#define OMAP4_UNIPRO_DR0_SC_SHIFT 2
-#define OMAP4_UNIPRO_DR0_SC_MASK (0x3 << 2)
-#define OMAP4_UNIPRO_DR1_SC_SHIFT 0
-#define OMAP4_UNIPRO_DR1_SC_MASK (0x3 << 0)
-
-/* CONTROL_SMART1IO_PADCONF_1 */
-#define OMAP4_ABE_DR0_LB_SHIFT 30
-#define OMAP4_ABE_DR0_LB_MASK (0x3 << 30)
-#define OMAP4_CAM_DR0_LB_SHIFT 28
-#define OMAP4_CAM_DR0_LB_MASK (0x3 << 28)
-#define OMAP4_FREF_DR2_LB_SHIFT 26
-#define OMAP4_FREF_DR2_LB_MASK (0x3 << 26)
-#define OMAP4_FREF_DR3_LB_SHIFT 24
-#define OMAP4_FREF_DR3_LB_MASK (0x3 << 24)
-#define OMAP4_GPIO_DR8_LB_SHIFT 22
-#define OMAP4_GPIO_DR8_LB_MASK (0x3 << 22)
-#define OMAP4_GPIO_DR9_LB_SHIFT 20
-#define OMAP4_GPIO_DR9_LB_MASK (0x3 << 20)
-#define OMAP4_GPMC_DR2_LB_SHIFT 18
-#define OMAP4_GPMC_DR2_LB_MASK (0x3 << 18)
-#define OMAP4_GPMC_DR3_LB_SHIFT 16
-#define OMAP4_GPMC_DR3_LB_MASK (0x3 << 16)
-#define OMAP4_GPMC_DR6_LB_SHIFT 14
-#define OMAP4_GPMC_DR6_LB_MASK (0x3 << 14)
-#define OMAP4_HDMI_DR0_LB_SHIFT 12
-#define OMAP4_HDMI_DR0_LB_MASK (0x3 << 12)
-#define OMAP4_MCSPI1_DR0_LB_SHIFT 10
-#define OMAP4_MCSPI1_DR0_LB_MASK (0x3 << 10)
-#define OMAP4_UART1_DR0_LB_SHIFT 8
-#define OMAP4_UART1_DR0_LB_MASK (0x3 << 8)
-#define OMAP4_UART3_DR0_LB_SHIFT 6
-#define OMAP4_UART3_DR0_LB_MASK (0x3 << 6)
-#define OMAP4_UART3_DR1_LB_SHIFT 4
-#define OMAP4_UART3_DR1_LB_MASK (0x3 << 4)
-#define OMAP4_UNIPRO_DR0_LB_SHIFT 2
-#define OMAP4_UNIPRO_DR0_LB_MASK (0x3 << 2)
-#define OMAP4_UNIPRO_DR1_LB_SHIFT 0
-#define OMAP4_UNIPRO_DR1_LB_MASK (0x3 << 0)
-
-/* CONTROL_SMART2IO_PADCONF_0 */
-#define OMAP4_C2C_DR0_LB_SHIFT 31
-#define OMAP4_C2C_DR0_LB_MASK (1 << 31)
-#define OMAP4_DPM_DR1_LB_SHIFT 30
-#define OMAP4_DPM_DR1_LB_MASK (1 << 30)
-#define OMAP4_DPM_DR2_LB_SHIFT 29
-#define OMAP4_DPM_DR2_LB_MASK (1 << 29)
-#define OMAP4_DPM_DR3_LB_SHIFT 28
-#define OMAP4_DPM_DR3_LB_MASK (1 << 28)
-#define OMAP4_GPIO_DR0_LB_SHIFT 27
-#define OMAP4_GPIO_DR0_LB_MASK (1 << 27)
-#define OMAP4_GPIO_DR1_LB_SHIFT 26
-#define OMAP4_GPIO_DR1_LB_MASK (1 << 26)
-#define OMAP4_GPIO_DR10_LB_SHIFT 25
-#define OMAP4_GPIO_DR10_LB_MASK (1 << 25)
-#define OMAP4_GPIO_DR2_LB_SHIFT 24
-#define OMAP4_GPIO_DR2_LB_MASK (1 << 24)
-#define OMAP4_GPMC_DR0_LB_SHIFT 23
-#define OMAP4_GPMC_DR0_LB_MASK (1 << 23)
-#define OMAP4_GPMC_DR1_LB_SHIFT 22
-#define OMAP4_GPMC_DR1_LB_MASK (1 << 22)
-#define OMAP4_GPMC_DR4_LB_SHIFT 21
-#define OMAP4_GPMC_DR4_LB_MASK (1 << 21)
-#define OMAP4_GPMC_DR5_LB_SHIFT 20
-#define OMAP4_GPMC_DR5_LB_MASK (1 << 20)
-#define OMAP4_GPMC_DR7_LB_SHIFT 19
-#define OMAP4_GPMC_DR7_LB_MASK (1 << 19)
-#define OMAP4_HSI2_DR0_LB_SHIFT 18
-#define OMAP4_HSI2_DR0_LB_MASK (1 << 18)
-#define OMAP4_HSI2_DR1_LB_SHIFT 17
-#define OMAP4_HSI2_DR1_LB_MASK (1 << 17)
-#define OMAP4_HSI2_DR2_LB_SHIFT 16
-#define OMAP4_HSI2_DR2_LB_MASK (1 << 16)
-#define OMAP4_KPD_DR0_LB_SHIFT 15
-#define OMAP4_KPD_DR0_LB_MASK (1 << 15)
-#define OMAP4_KPD_DR1_LB_SHIFT 14
-#define OMAP4_KPD_DR1_LB_MASK (1 << 14)
-#define OMAP4_PDM_DR0_LB_SHIFT 13
-#define OMAP4_PDM_DR0_LB_MASK (1 << 13)
-#define OMAP4_SDMMC2_DR0_LB_SHIFT 12
-#define OMAP4_SDMMC2_DR0_LB_MASK (1 << 12)
-#define OMAP4_SDMMC3_DR0_LB_SHIFT 11
-#define OMAP4_SDMMC3_DR0_LB_MASK (1 << 11)
-#define OMAP4_SDMMC4_DR0_LB_SHIFT 10
-#define OMAP4_SDMMC4_DR0_LB_MASK (1 << 10)
-#define OMAP4_SDMMC4_DR1_LB_SHIFT 9
-#define OMAP4_SDMMC4_DR1_LB_MASK (1 << 9)
-#define OMAP4_SPI3_DR0_LB_SHIFT 8
-#define OMAP4_SPI3_DR0_LB_MASK (1 << 8)
-#define OMAP4_SPI3_DR1_LB_SHIFT 7
-#define OMAP4_SPI3_DR1_LB_MASK (1 << 7)
-#define OMAP4_UART3_DR2_LB_SHIFT 6
-#define OMAP4_UART3_DR2_LB_MASK (1 << 6)
-#define OMAP4_UART3_DR3_LB_SHIFT 5
-#define OMAP4_UART3_DR3_LB_MASK (1 << 5)
-#define OMAP4_UART3_DR4_LB_SHIFT 4
-#define OMAP4_UART3_DR4_LB_MASK (1 << 4)
-#define OMAP4_UART3_DR5_LB_SHIFT 3
-#define OMAP4_UART3_DR5_LB_MASK (1 << 3)
-#define OMAP4_USBA0_DR1_LB_SHIFT 2
-#define OMAP4_USBA0_DR1_LB_MASK (1 << 2)
-#define OMAP4_USBA_DR2_LB_SHIFT 1
-#define OMAP4_USBA_DR2_LB_MASK (1 << 1)
-
-/* CONTROL_SMART2IO_PADCONF_1 */
-#define OMAP4_USBB1_DR0_LB_SHIFT 31
-#define OMAP4_USBB1_DR0_LB_MASK (1 << 31)
-#define OMAP4_USBB2_DR0_LB_SHIFT 30
-#define OMAP4_USBB2_DR0_LB_MASK (1 << 30)
-#define OMAP4_USBA0_DR0_LB_SHIFT 29
-#define OMAP4_USBA0_DR0_LB_MASK (1 << 29)
-
-/* CONTROL_SMART3IO_PADCONF_0 */
-#define OMAP4_DMIC_DR0_MB_SHIFT 30
-#define OMAP4_DMIC_DR0_MB_MASK (0x3 << 30)
-#define OMAP4_GPIO_DR3_MB_SHIFT 28
-#define OMAP4_GPIO_DR3_MB_MASK (0x3 << 28)
-#define OMAP4_GPIO_DR4_MB_SHIFT 26
-#define OMAP4_GPIO_DR4_MB_MASK (0x3 << 26)
-#define OMAP4_GPIO_DR5_MB_SHIFT 24
-#define OMAP4_GPIO_DR5_MB_MASK (0x3 << 24)
-#define OMAP4_GPIO_DR6_MB_SHIFT 22
-#define OMAP4_GPIO_DR6_MB_MASK (0x3 << 22)
-#define OMAP4_HSI_DR1_MB_SHIFT 20
-#define OMAP4_HSI_DR1_MB_MASK (0x3 << 20)
-#define OMAP4_HSI_DR2_MB_SHIFT 18
-#define OMAP4_HSI_DR2_MB_MASK (0x3 << 18)
-#define OMAP4_HSI_DR3_MB_SHIFT 16
-#define OMAP4_HSI_DR3_MB_MASK (0x3 << 16)
-#define OMAP4_MCBSP2_DR0_MB_SHIFT 14
-#define OMAP4_MCBSP2_DR0_MB_MASK (0x3 << 14)
-#define OMAP4_MCSPI4_DR0_MB_SHIFT 12
-#define OMAP4_MCSPI4_DR0_MB_MASK (0x3 << 12)
-#define OMAP4_MCSPI4_DR1_MB_SHIFT 10
-#define OMAP4_MCSPI4_DR1_MB_MASK (0x3 << 10)
-#define OMAP4_SDMMC3_DR0_MB_SHIFT 8
-#define OMAP4_SDMMC3_DR0_MB_MASK (0x3 << 8)
-#define OMAP4_SPI2_DR0_MB_SHIFT 0
-#define OMAP4_SPI2_DR0_MB_MASK (0x3 << 0)
-
-/* CONTROL_SMART3IO_PADCONF_1 */
-#define OMAP4_SPI2_DR1_MB_SHIFT 30
-#define OMAP4_SPI2_DR1_MB_MASK (0x3 << 30)
-#define OMAP4_SPI2_DR2_MB_SHIFT 28
-#define OMAP4_SPI2_DR2_MB_MASK (0x3 << 28)
-#define OMAP4_UART2_DR0_MB_SHIFT 26
-#define OMAP4_UART2_DR0_MB_MASK (0x3 << 26)
-#define OMAP4_UART2_DR1_MB_SHIFT 24
-#define OMAP4_UART2_DR1_MB_MASK (0x3 << 24)
-#define OMAP4_UART4_DR0_MB_SHIFT 22
-#define OMAP4_UART4_DR0_MB_MASK (0x3 << 22)
-#define OMAP4_HSI_DR0_MB_SHIFT 20
-#define OMAP4_HSI_DR0_MB_MASK (0x3 << 20)
-
-/* CONTROL_SMART3IO_PADCONF_2 */
-#define OMAP4_DMIC_DR0_LB_SHIFT 31
-#define OMAP4_DMIC_DR0_LB_MASK (1 << 31)
-#define OMAP4_GPIO_DR3_LB_SHIFT 30
-#define OMAP4_GPIO_DR3_LB_MASK (1 << 30)
-#define OMAP4_GPIO_DR4_LB_SHIFT 29
-#define OMAP4_GPIO_DR4_LB_MASK (1 << 29)
-#define OMAP4_GPIO_DR5_LB_SHIFT 28
-#define OMAP4_GPIO_DR5_LB_MASK (1 << 28)
-#define OMAP4_GPIO_DR6_LB_SHIFT 27
-#define OMAP4_GPIO_DR6_LB_MASK (1 << 27)
-#define OMAP4_HSI_DR1_LB_SHIFT 26
-#define OMAP4_HSI_DR1_LB_MASK (1 << 26)
-#define OMAP4_HSI_DR2_LB_SHIFT 25
-#define OMAP4_HSI_DR2_LB_MASK (1 << 25)
-#define OMAP4_HSI_DR3_LB_SHIFT 24
-#define OMAP4_HSI_DR3_LB_MASK (1 << 24)
-#define OMAP4_MCBSP2_DR0_LB_SHIFT 23
-#define OMAP4_MCBSP2_DR0_LB_MASK (1 << 23)
-#define OMAP4_MCSPI4_DR0_LB_SHIFT 22
-#define OMAP4_MCSPI4_DR0_LB_MASK (1 << 22)
-#define OMAP4_MCSPI4_DR1_LB_SHIFT 21
-#define OMAP4_MCSPI4_DR1_LB_MASK (1 << 21)
-#define OMAP4_SLIMBUS2_DR0_LB_SHIFT 18
-#define OMAP4_SLIMBUS2_DR0_LB_MASK (1 << 18)
-#define OMAP4_SPI2_DR0_LB_SHIFT 16
-#define OMAP4_SPI2_DR0_LB_MASK (1 << 16)
-#define OMAP4_SPI2_DR1_LB_SHIFT 15
-#define OMAP4_SPI2_DR1_LB_MASK (1 << 15)
-#define OMAP4_SPI2_DR2_LB_SHIFT 14
-#define OMAP4_SPI2_DR2_LB_MASK (1 << 14)
-#define OMAP4_UART2_DR0_LB_SHIFT 13
-#define OMAP4_UART2_DR0_LB_MASK (1 << 13)
-#define OMAP4_UART2_DR1_LB_SHIFT 12
-#define OMAP4_UART2_DR1_LB_MASK (1 << 12)
-#define OMAP4_UART4_DR0_LB_SHIFT 11
-#define OMAP4_UART4_DR0_LB_MASK (1 << 11)
-#define OMAP4_HSI_DR0_LB_SHIFT 10
-#define OMAP4_HSI_DR0_LB_MASK (1 << 10)
-
-/* CONTROL_USBB_HSIC */
-#define OMAP4_USBB2_DR1_SR_SHIFT 30
-#define OMAP4_USBB2_DR1_SR_MASK (0x3 << 30)
-#define OMAP4_USBB2_DR1_I_SHIFT 27
-#define OMAP4_USBB2_DR1_I_MASK (0x7 << 27)
-#define OMAP4_USBB1_DR1_SR_SHIFT 25
-#define OMAP4_USBB1_DR1_SR_MASK (0x3 << 25)
-#define OMAP4_USBB1_DR1_I_SHIFT 22
-#define OMAP4_USBB1_DR1_I_MASK (0x7 << 22)
-#define OMAP4_USBB1_HSIC_DATA_WD_SHIFT 20
-#define OMAP4_USBB1_HSIC_DATA_WD_MASK (0x3 << 20)
-#define OMAP4_USBB1_HSIC_STROBE_WD_SHIFT 18
-#define OMAP4_USBB1_HSIC_STROBE_WD_MASK (0x3 << 18)
-#define OMAP4_USBB2_HSIC_DATA_WD_SHIFT 16
-#define OMAP4_USBB2_HSIC_DATA_WD_MASK (0x3 << 16)
-#define OMAP4_USBB2_HSIC_STROBE_WD_SHIFT 14
-#define OMAP4_USBB2_HSIC_STROBE_WD_MASK (0x3 << 14)
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_ENABLE_SHIFT 13
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_ENABLE_MASK (1 << 13)
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_SHIFT 11
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_MASK (0x3 << 11)
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_ENABLE_SHIFT 10
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_ENABLE_MASK (1 << 10)
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_SHIFT 8
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_MASK (0x3 << 8)
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_ENABLE_SHIFT 7
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_ENABLE_MASK (1 << 7)
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_SHIFT 5
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_MASK (0x3 << 5)
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_ENABLE_SHIFT 4
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_ENABLE_MASK (1 << 4)
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_SHIFT 2
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_MASK (0x3 << 2)
-
-/* CONTROL_SLIMBUS */
-#define OMAP4_SLIMBUS1_DR0_MB_SHIFT 30
-#define OMAP4_SLIMBUS1_DR0_MB_MASK (0x3 << 30)
-#define OMAP4_SLIMBUS1_DR1_MB_SHIFT 28
-#define OMAP4_SLIMBUS1_DR1_MB_MASK (0x3 << 28)
-#define OMAP4_SLIMBUS2_DR0_MB_SHIFT 26
-#define OMAP4_SLIMBUS2_DR0_MB_MASK (0x3 << 26)
-#define OMAP4_SLIMBUS2_DR1_MB_SHIFT 24
-#define OMAP4_SLIMBUS2_DR1_MB_MASK (0x3 << 24)
-#define OMAP4_SLIMBUS2_DR2_MB_SHIFT 22
-#define OMAP4_SLIMBUS2_DR2_MB_MASK (0x3 << 22)
-#define OMAP4_SLIMBUS2_DR3_MB_SHIFT 20
-#define OMAP4_SLIMBUS2_DR3_MB_MASK (0x3 << 20)
-#define OMAP4_SLIMBUS1_DR0_LB_SHIFT 19
-#define OMAP4_SLIMBUS1_DR0_LB_MASK (1 << 19)
-#define OMAP4_SLIMBUS2_DR1_LB_SHIFT 18
-#define OMAP4_SLIMBUS2_DR1_LB_MASK (1 << 18)
-
-/* CONTROL_PBIASLITE */
-#define OMAP4_USIM_PBIASLITE_HIZ_MODE_SHIFT 31
-#define OMAP4_USIM_PBIASLITE_HIZ_MODE_MASK (1 << 31)
-#define OMAP4_USIM_PBIASLITE_SUPPLY_HI_OUT_SHIFT 30
-#define OMAP4_USIM_PBIASLITE_SUPPLY_HI_OUT_MASK (1 << 30)
-#define OMAP4_USIM_PBIASLITE_VMODE_ERROR_SHIFT 29
-#define OMAP4_USIM_PBIASLITE_VMODE_ERROR_MASK (1 << 29)
-#define OMAP4_USIM_PBIASLITE_PWRDNZ_SHIFT 28
-#define OMAP4_USIM_PBIASLITE_PWRDNZ_MASK (1 << 28)
-#define OMAP4_USIM_PBIASLITE_VMODE_SHIFT 27
-#define OMAP4_USIM_PBIASLITE_VMODE_MASK (1 << 27)
-#define OMAP4_MMC1_PWRDNZ_SHIFT 26
-#define OMAP4_MMC1_PWRDNZ_MASK (1 << 26)
-#define OMAP4_MMC1_PBIASLITE_HIZ_MODE_SHIFT 25
-#define OMAP4_MMC1_PBIASLITE_HIZ_MODE_MASK (1 << 25)
-#define OMAP4_MMC1_PBIASLITE_SUPPLY_HI_OUT_SHIFT 24
-#define OMAP4_MMC1_PBIASLITE_SUPPLY_HI_OUT_MASK (1 << 24)
-#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_SHIFT 23
-#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK (1 << 23)
-#define OMAP4_MMC1_PBIASLITE_PWRDNZ_SHIFT 22
-#define OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK (1 << 22)
-#define OMAP4_MMC1_PBIASLITE_VMODE_SHIFT 21
-#define OMAP4_MMC1_PBIASLITE_VMODE_MASK (1 << 21)
-#define OMAP4_USBC1_ICUSB_PWRDNZ_SHIFT 20
-#define OMAP4_USBC1_ICUSB_PWRDNZ_MASK (1 << 20)
-
-/* CONTROL_I2C_0 */
-#define OMAP4_I2C4_SDA_GLFENB_SHIFT 31
-#define OMAP4_I2C4_SDA_GLFENB_MASK (1 << 31)
-#define OMAP4_I2C4_SDA_LOAD_BITS_SHIFT 29
-#define OMAP4_I2C4_SDA_LOAD_BITS_MASK (0x3 << 29)
-#define OMAP4_I2C4_SDA_PULLUPRESX_SHIFT 28
-#define OMAP4_I2C4_SDA_PULLUPRESX_MASK (1 << 28)
-#define OMAP4_I2C3_SDA_GLFENB_SHIFT 27
-#define OMAP4_I2C3_SDA_GLFENB_MASK (1 << 27)
-#define OMAP4_I2C3_SDA_LOAD_BITS_SHIFT 25
-#define OMAP4_I2C3_SDA_LOAD_BITS_MASK (0x3 << 25)
-#define OMAP4_I2C3_SDA_PULLUPRESX_SHIFT 24
-#define OMAP4_I2C3_SDA_PULLUPRESX_MASK (1 << 24)
-#define OMAP4_I2C2_SDA_GLFENB_SHIFT 23
-#define OMAP4_I2C2_SDA_GLFENB_MASK (1 << 23)
-#define OMAP4_I2C2_SDA_LOAD_BITS_SHIFT 21
-#define OMAP4_I2C2_SDA_LOAD_BITS_MASK (0x3 << 21)
-#define OMAP4_I2C2_SDA_PULLUPRESX_SHIFT 20
-#define OMAP4_I2C2_SDA_PULLUPRESX_MASK (1 << 20)
-#define OMAP4_I2C1_SDA_GLFENB_SHIFT 19
-#define OMAP4_I2C1_SDA_GLFENB_MASK (1 << 19)
-#define OMAP4_I2C1_SDA_LOAD_BITS_SHIFT 17
-#define OMAP4_I2C1_SDA_LOAD_BITS_MASK (0x3 << 17)
-#define OMAP4_I2C1_SDA_PULLUPRESX_SHIFT 16
-#define OMAP4_I2C1_SDA_PULLUPRESX_MASK (1 << 16)
-#define OMAP4_I2C4_SCL_GLFENB_SHIFT 15
-#define OMAP4_I2C4_SCL_GLFENB_MASK (1 << 15)
-#define OMAP4_I2C4_SCL_LOAD_BITS_SHIFT 13
-#define OMAP4_I2C4_SCL_LOAD_BITS_MASK (0x3 << 13)
-#define OMAP4_I2C4_SCL_PULLUPRESX_SHIFT 12
-#define OMAP4_I2C4_SCL_PULLUPRESX_MASK (1 << 12)
-#define OMAP4_I2C3_SCL_GLFENB_SHIFT 11
-#define OMAP4_I2C3_SCL_GLFENB_MASK (1 << 11)
-#define OMAP4_I2C3_SCL_LOAD_BITS_SHIFT 9
-#define OMAP4_I2C3_SCL_LOAD_BITS_MASK (0x3 << 9)
-#define OMAP4_I2C3_SCL_PULLUPRESX_SHIFT 8
-#define OMAP4_I2C3_SCL_PULLUPRESX_MASK (1 << 8)
-#define OMAP4_I2C2_SCL_GLFENB_SHIFT 7
-#define OMAP4_I2C2_SCL_GLFENB_MASK (1 << 7)
-#define OMAP4_I2C2_SCL_LOAD_BITS_SHIFT 5
-#define OMAP4_I2C2_SCL_LOAD_BITS_MASK (0x3 << 5)
-#define OMAP4_I2C2_SCL_PULLUPRESX_SHIFT 4
-#define OMAP4_I2C2_SCL_PULLUPRESX_MASK (1 << 4)
-#define OMAP4_I2C1_SCL_GLFENB_SHIFT 3
-#define OMAP4_I2C1_SCL_GLFENB_MASK (1 << 3)
-#define OMAP4_I2C1_SCL_LOAD_BITS_SHIFT 1
-#define OMAP4_I2C1_SCL_LOAD_BITS_MASK (0x3 << 1)
-#define OMAP4_I2C1_SCL_PULLUPRESX_SHIFT 0
-#define OMAP4_I2C1_SCL_PULLUPRESX_MASK (1 << 0)
-
-/* CONTROL_CAMERA_RX */
-#define OMAP4_CAMERARX_UNIPRO_CTRLCLKEN_SHIFT 31
-#define OMAP4_CAMERARX_UNIPRO_CTRLCLKEN_MASK (1 << 31)
-#define OMAP4_CAMERARX_CSI22_LANEENABLE_SHIFT 29
-#define OMAP4_CAMERARX_CSI22_LANEENABLE_MASK (0x3 << 29)
-#define OMAP4_CAMERARX_CSI21_LANEENABLE_SHIFT 24
-#define OMAP4_CAMERARX_CSI21_LANEENABLE_MASK (0x1f << 24)
-#define OMAP4_CAMERARX_UNIPRO_CAMMODE_SHIFT 22
-#define OMAP4_CAMERARX_UNIPRO_CAMMODE_MASK (0x3 << 22)
-#define OMAP4_CAMERARX_CSI22_CTRLCLKEN_SHIFT 21
-#define OMAP4_CAMERARX_CSI22_CTRLCLKEN_MASK (1 << 21)
-#define OMAP4_CAMERARX_CSI22_CAMMODE_SHIFT 19
-#define OMAP4_CAMERARX_CSI22_CAMMODE_MASK (0x3 << 19)
-#define OMAP4_CAMERARX_CSI21_CTRLCLKEN_SHIFT 18
-#define OMAP4_CAMERARX_CSI21_CTRLCLKEN_MASK (1 << 18)
-#define OMAP4_CAMERARX_CSI21_CAMMODE_SHIFT 16
-#define OMAP4_CAMERARX_CSI21_CAMMODE_MASK (0x3 << 16)
-
-/* CONTROL_AVDAC */
-#define OMAP4_AVDAC_ACEN_SHIFT 31
-#define OMAP4_AVDAC_ACEN_MASK (1 << 31)
-#define OMAP4_AVDAC_TVOUTBYPASS_SHIFT 30
-#define OMAP4_AVDAC_TVOUTBYPASS_MASK (1 << 30)
-#define OMAP4_AVDAC_INPUTINV_SHIFT 29
-#define OMAP4_AVDAC_INPUTINV_MASK (1 << 29)
-#define OMAP4_AVDAC_CTL_SHIFT 13
-#define OMAP4_AVDAC_CTL_MASK (0xffff << 13)
-#define OMAP4_AVDAC_CTL_WR_ACK_SHIFT 12
-#define OMAP4_AVDAC_CTL_WR_ACK_MASK (1 << 12)
-
-/* CONTROL_HDMI_TX_PHY */
-#define OMAP4_HDMITXPHY_PADORDER_SHIFT 31
-#define OMAP4_HDMITXPHY_PADORDER_MASK (1 << 31)
-#define OMAP4_HDMITXPHY_TXVALID_SHIFT 30
-#define OMAP4_HDMITXPHY_TXVALID_MASK (1 << 30)
-#define OMAP4_HDMITXPHY_ENBYPASSCLK_SHIFT 29
-#define OMAP4_HDMITXPHY_ENBYPASSCLK_MASK (1 << 29)
-#define OMAP4_HDMITXPHY_PD_PULLUPDET_SHIFT 28
-#define OMAP4_HDMITXPHY_PD_PULLUPDET_MASK (1 << 28)
-
-/* CONTROL_MMC2 */
-#define OMAP4_MMC2_FEEDBACK_CLK_SEL_SHIFT 31
-#define OMAP4_MMC2_FEEDBACK_CLK_SEL_MASK (1 << 31)
-
-/* CONTROL_DSIPHY */
-#define OMAP4_DSI2_LANEENABLE_SHIFT 29
-#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29)
-#define OMAP4_DSI1_LANEENABLE_SHIFT 24
-#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24)
-#define OMAP4_DSI1_PIPD_SHIFT 19
-#define OMAP4_DSI1_PIPD_MASK (0x1f << 19)
-#define OMAP4_DSI2_PIPD_SHIFT 14
-#define OMAP4_DSI2_PIPD_MASK (0x1f << 14)
-
-/* CONTROL_MCBSPLP */
-#define OMAP4_ALBCTRLRX_FSX_SHIFT 31
-#define OMAP4_ALBCTRLRX_FSX_MASK (1 << 31)
-#define OMAP4_ALBCTRLRX_CLKX_SHIFT 30
-#define OMAP4_ALBCTRLRX_CLKX_MASK (1 << 30)
-#define OMAP4_ABE_MCBSP1_DR_EN_SHIFT 29
-#define OMAP4_ABE_MCBSP1_DR_EN_MASK (1 << 29)
-
-/* CONTROL_USB2PHYCORE */
-#define OMAP4_USB2PHY_AUTORESUME_EN_SHIFT 31
-#define OMAP4_USB2PHY_AUTORESUME_EN_MASK (1 << 31)
-#define OMAP4_USB2PHY_DISCHGDET_SHIFT 30
-#define OMAP4_USB2PHY_DISCHGDET_MASK (1 << 30)
-#define OMAP4_USB2PHY_GPIOMODE_SHIFT 29
-#define OMAP4_USB2PHY_GPIOMODE_MASK (1 << 29)
-#define OMAP4_USB2PHY_CHG_DET_EXT_CTL_SHIFT 28
-#define OMAP4_USB2PHY_CHG_DET_EXT_CTL_MASK (1 << 28)
-#define OMAP4_USB2PHY_RDM_PD_CHGDET_EN_SHIFT 27
-#define OMAP4_USB2PHY_RDM_PD_CHGDET_EN_MASK (1 << 27)
-#define OMAP4_USB2PHY_RDP_PU_CHGDET_EN_SHIFT 26
-#define OMAP4_USB2PHY_RDP_PU_CHGDET_EN_MASK (1 << 26)
-#define OMAP4_USB2PHY_CHG_VSRC_EN_SHIFT 25
-#define OMAP4_USB2PHY_CHG_VSRC_EN_MASK (1 << 25)
-#define OMAP4_USB2PHY_CHG_ISINK_EN_SHIFT 24
-#define OMAP4_USB2PHY_CHG_ISINK_EN_MASK (1 << 24)
-#define OMAP4_USB2PHY_CHG_DET_STATUS_SHIFT 21
-#define OMAP4_USB2PHY_CHG_DET_STATUS_MASK (0x7 << 21)
-#define OMAP4_USB2PHY_CHG_DET_DM_COMP_SHIFT 20
-#define OMAP4_USB2PHY_CHG_DET_DM_COMP_MASK (1 << 20)
-#define OMAP4_USB2PHY_CHG_DET_DP_COMP_SHIFT 19
-#define OMAP4_USB2PHY_CHG_DET_DP_COMP_MASK (1 << 19)
-#define OMAP4_USB2PHY_DATADET_SHIFT 18
-#define OMAP4_USB2PHY_DATADET_MASK (1 << 18)
-#define OMAP4_USB2PHY_SINKONDP_SHIFT 17
-#define OMAP4_USB2PHY_SINKONDP_MASK (1 << 17)
-#define OMAP4_USB2PHY_SRCONDM_SHIFT 16
-#define OMAP4_USB2PHY_SRCONDM_MASK (1 << 16)
-#define OMAP4_USB2PHY_RESTARTCHGDET_SHIFT 15
-#define OMAP4_USB2PHY_RESTARTCHGDET_MASK (1 << 15)
-#define OMAP4_USB2PHY_CHGDETDONE_SHIFT 14
-#define OMAP4_USB2PHY_CHGDETDONE_MASK (1 << 14)
-#define OMAP4_USB2PHY_CHGDETECTED_SHIFT 13
-#define OMAP4_USB2PHY_CHGDETECTED_MASK (1 << 13)
-#define OMAP4_USB2PHY_MCPCPUEN_SHIFT 12
-#define OMAP4_USB2PHY_MCPCPUEN_MASK (1 << 12)
-#define OMAP4_USB2PHY_MCPCMODEEN_SHIFT 11
-#define OMAP4_USB2PHY_MCPCMODEEN_MASK (1 << 11)
-#define OMAP4_USB2PHY_RESETDONEMCLK_SHIFT 10
-#define OMAP4_USB2PHY_RESETDONEMCLK_MASK (1 << 10)
-#define OMAP4_USB2PHY_UTMIRESETDONE_SHIFT 9
-#define OMAP4_USB2PHY_UTMIRESETDONE_MASK (1 << 9)
-#define OMAP4_USB2PHY_TXBITSTUFFENABLE_SHIFT 8
-#define OMAP4_USB2PHY_TXBITSTUFFENABLE_MASK (1 << 8)
-#define OMAP4_USB2PHY_DATAPOLARITYN_SHIFT 7
-#define OMAP4_USB2PHY_DATAPOLARITYN_MASK (1 << 7)
-#define OMAP4_USBDPLL_FREQLOCK_SHIFT 6
-#define OMAP4_USBDPLL_FREQLOCK_MASK (1 << 6)
-#define OMAP4_USB2PHY_RESETDONETCLK_SHIFT 5
-#define OMAP4_USB2PHY_RESETDONETCLK_MASK (1 << 5)
-
-/* CONTROL_I2C_1 */
-#define OMAP4_HDMI_DDC_SDA_GLFENB_SHIFT 31
-#define OMAP4_HDMI_DDC_SDA_GLFENB_MASK (1 << 31)
-#define OMAP4_HDMI_DDC_SDA_LOAD_BITS_SHIFT 29
-#define OMAP4_HDMI_DDC_SDA_LOAD_BITS_MASK (0x3 << 29)
-#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_SHIFT 28
-#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK (1 << 28)
-#define OMAP4_HDMI_DDC_SCL_GLFENB_SHIFT 27
-#define OMAP4_HDMI_DDC_SCL_GLFENB_MASK (1 << 27)
-#define OMAP4_HDMI_DDC_SCL_LOAD_BITS_SHIFT 25
-#define OMAP4_HDMI_DDC_SCL_LOAD_BITS_MASK (0x3 << 25)
-#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_SHIFT 24
-#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK (1 << 24)
-#define OMAP4_HDMI_DDC_SDA_HSMODE_SHIFT 23
-#define OMAP4_HDMI_DDC_SDA_HSMODE_MASK (1 << 23)
-#define OMAP4_HDMI_DDC_SDA_NMODE_SHIFT 22
-#define OMAP4_HDMI_DDC_SDA_NMODE_MASK (1 << 22)
-#define OMAP4_HDMI_DDC_SCL_HSMODE_SHIFT 21
-#define OMAP4_HDMI_DDC_SCL_HSMODE_MASK (1 << 21)
-#define OMAP4_HDMI_DDC_SCL_NMODE_SHIFT 20
-#define OMAP4_HDMI_DDC_SCL_NMODE_MASK (1 << 20)
-
-/* CONTROL_MMC1 */
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_SHIFT 31
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_MASK (1 << 31)
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_SHIFT 30
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK (1 << 30)
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_SHIFT 29
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK (1 << 29)
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_SHIFT 28
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK (1 << 28)
-#define OMAP4_SDMMC1_DR0_SPEEDCTRL_SHIFT 27
-#define OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK (1 << 27)
-#define OMAP4_SDMMC1_DR1_SPEEDCTRL_SHIFT 26
-#define OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK (1 << 26)
-#define OMAP4_SDMMC1_DR2_SPEEDCTRL_SHIFT 25
-#define OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK (1 << 25)
-#define OMAP4_USBC1_DR0_SPEEDCTRL_SHIFT 24
-#define OMAP4_USBC1_DR0_SPEEDCTRL_MASK (1 << 24)
-#define OMAP4_USB_FD_CDEN_SHIFT 23
-#define OMAP4_USB_FD_CDEN_MASK (1 << 23)
-#define OMAP4_USBC1_ICUSB_DP_PDDIS_SHIFT 22
-#define OMAP4_USBC1_ICUSB_DP_PDDIS_MASK (1 << 22)
-#define OMAP4_USBC1_ICUSB_DM_PDDIS_SHIFT 21
-#define OMAP4_USBC1_ICUSB_DM_PDDIS_MASK (1 << 21)
-
-/* CONTROL_HSI */
-#define OMAP4_HSI1_CALLOOP_SEL_SHIFT 31
-#define OMAP4_HSI1_CALLOOP_SEL_MASK (1 << 31)
-#define OMAP4_HSI1_CALMUX_SEL_SHIFT 30
-#define OMAP4_HSI1_CALMUX_SEL_MASK (1 << 30)
-#define OMAP4_HSI2_CALLOOP_SEL_SHIFT 29
-#define OMAP4_HSI2_CALLOOP_SEL_MASK (1 << 29)
-#define OMAP4_HSI2_CALMUX_SEL_SHIFT 28
-#define OMAP4_HSI2_CALMUX_SEL_MASK (1 << 28)
-
-/* CONTROL_USB */
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT0_AUTO_EN_SHIFT 31
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT0_AUTO_EN_MASK (1 << 31)
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT1_AUTO_EN_SHIFT 30
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT1_AUTO_EN_MASK (1 << 30)
-
-/* CONTROL_HDQ */
-#define OMAP4_HDQ_SIO_PWRDNZ_SHIFT 31
-#define OMAP4_HDQ_SIO_PWRDNZ_MASK (1 << 31)
-
-/* CONTROL_LPDDR2IO1_0 */
-#define OMAP4_LPDDR2IO1_GR4_SR_SHIFT 30
-#define OMAP4_LPDDR2IO1_GR4_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO1_GR4_I_SHIFT 27
-#define OMAP4_LPDDR2IO1_GR4_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO1_GR4_WD_SHIFT 25
-#define OMAP4_LPDDR2IO1_GR4_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO1_GR3_SR_SHIFT 22
-#define OMAP4_LPDDR2IO1_GR3_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO1_GR3_I_SHIFT 19
-#define OMAP4_LPDDR2IO1_GR3_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO1_GR3_WD_SHIFT 17
-#define OMAP4_LPDDR2IO1_GR3_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO1_GR2_SR_SHIFT 14
-#define OMAP4_LPDDR2IO1_GR2_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO1_GR2_I_SHIFT 11
-#define OMAP4_LPDDR2IO1_GR2_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO1_GR2_WD_SHIFT 9
-#define OMAP4_LPDDR2IO1_GR2_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO1_GR1_SR_SHIFT 6
-#define OMAP4_LPDDR2IO1_GR1_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO1_GR1_I_SHIFT 3
-#define OMAP4_LPDDR2IO1_GR1_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO1_GR1_WD_SHIFT 1
-#define OMAP4_LPDDR2IO1_GR1_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO1_1 */
-#define OMAP4_LPDDR2IO1_GR8_SR_SHIFT 30
-#define OMAP4_LPDDR2IO1_GR8_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO1_GR8_I_SHIFT 27
-#define OMAP4_LPDDR2IO1_GR8_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO1_GR8_WD_SHIFT 25
-#define OMAP4_LPDDR2IO1_GR8_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO1_GR7_SR_SHIFT 22
-#define OMAP4_LPDDR2IO1_GR7_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO1_GR7_I_SHIFT 19
-#define OMAP4_LPDDR2IO1_GR7_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO1_GR7_WD_SHIFT 17
-#define OMAP4_LPDDR2IO1_GR7_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO1_GR6_SR_SHIFT 14
-#define OMAP4_LPDDR2IO1_GR6_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO1_GR6_I_SHIFT 11
-#define OMAP4_LPDDR2IO1_GR6_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO1_GR6_WD_SHIFT 9
-#define OMAP4_LPDDR2IO1_GR6_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO1_GR5_SR_SHIFT 6
-#define OMAP4_LPDDR2IO1_GR5_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO1_GR5_I_SHIFT 3
-#define OMAP4_LPDDR2IO1_GR5_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO1_GR5_WD_SHIFT 1
-#define OMAP4_LPDDR2IO1_GR5_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO1_2 */
-#define OMAP4_LPDDR2IO1_GR11_SR_SHIFT 30
-#define OMAP4_LPDDR2IO1_GR11_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO1_GR11_I_SHIFT 27
-#define OMAP4_LPDDR2IO1_GR11_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO1_GR11_WD_SHIFT 25
-#define OMAP4_LPDDR2IO1_GR11_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO1_GR10_SR_SHIFT 22
-#define OMAP4_LPDDR2IO1_GR10_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO1_GR10_I_SHIFT 19
-#define OMAP4_LPDDR2IO1_GR10_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO1_GR10_WD_SHIFT 17
-#define OMAP4_LPDDR2IO1_GR10_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO1_GR9_SR_SHIFT 14
-#define OMAP4_LPDDR2IO1_GR9_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO1_GR9_I_SHIFT 11
-#define OMAP4_LPDDR2IO1_GR9_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO1_GR9_WD_SHIFT 9
-#define OMAP4_LPDDR2IO1_GR9_WD_MASK (0x3 << 9)
-
-/* CONTROL_LPDDR2IO1_3 */
-#define OMAP4_LPDDR21_VREF_CA_CCAP0_SHIFT 31
-#define OMAP4_LPDDR21_VREF_CA_CCAP0_MASK (1 << 31)
-#define OMAP4_LPDDR21_VREF_CA_CCAP1_SHIFT 30
-#define OMAP4_LPDDR21_VREF_CA_CCAP1_MASK (1 << 30)
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP0_SHIFT 29
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP0_MASK (1 << 29)
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP1_SHIFT 28
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP1_MASK (1 << 28)
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP0_SHIFT 27
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP0_MASK (1 << 27)
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP1_SHIFT 26
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP1_MASK (1 << 26)
-#define OMAP4_LPDDR21_VREF_CA_TAP0_SHIFT 25
-#define OMAP4_LPDDR21_VREF_CA_TAP0_MASK (1 << 25)
-#define OMAP4_LPDDR21_VREF_CA_TAP1_SHIFT 24
-#define OMAP4_LPDDR21_VREF_CA_TAP1_MASK (1 << 24)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP0_SHIFT 23
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP0_MASK (1 << 23)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP1_SHIFT 22
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP1_MASK (1 << 22)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP0_SHIFT 21
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP0_MASK (1 << 21)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP1_SHIFT 20
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP1_MASK (1 << 20)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP0_SHIFT 19
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP0_MASK (1 << 19)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP1_SHIFT 18
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP1_MASK (1 << 18)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP0_SHIFT 17
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP0_MASK (1 << 17)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP1_SHIFT 16
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP1_MASK (1 << 16)
-#define OMAP4_LPDDR21_VREF_DQ_CCAP0_SHIFT 15
-#define OMAP4_LPDDR21_VREF_DQ_CCAP0_MASK (1 << 15)
-#define OMAP4_LPDDR21_VREF_DQ_CCAP1_SHIFT 14
-#define OMAP4_LPDDR21_VREF_DQ_CCAP1_MASK (1 << 14)
-#define OMAP4_LPDDR21_VREF_DQ_TAP0_SHIFT 13
-#define OMAP4_LPDDR21_VREF_DQ_TAP0_MASK (1 << 13)
-#define OMAP4_LPDDR21_VREF_DQ_TAP1_SHIFT 12
-#define OMAP4_LPDDR21_VREF_DQ_TAP1_MASK (1 << 12)
-
-/* CONTROL_LPDDR2IO2_0 */
-#define OMAP4_LPDDR2IO2_GR4_SR_SHIFT 30
-#define OMAP4_LPDDR2IO2_GR4_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO2_GR4_I_SHIFT 27
-#define OMAP4_LPDDR2IO2_GR4_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO2_GR4_WD_SHIFT 25
-#define OMAP4_LPDDR2IO2_GR4_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO2_GR3_SR_SHIFT 22
-#define OMAP4_LPDDR2IO2_GR3_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO2_GR3_I_SHIFT 19
-#define OMAP4_LPDDR2IO2_GR3_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO2_GR3_WD_SHIFT 17
-#define OMAP4_LPDDR2IO2_GR3_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO2_GR2_SR_SHIFT 14
-#define OMAP4_LPDDR2IO2_GR2_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO2_GR2_I_SHIFT 11
-#define OMAP4_LPDDR2IO2_GR2_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO2_GR2_WD_SHIFT 9
-#define OMAP4_LPDDR2IO2_GR2_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO2_GR1_SR_SHIFT 6
-#define OMAP4_LPDDR2IO2_GR1_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO2_GR1_I_SHIFT 3
-#define OMAP4_LPDDR2IO2_GR1_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO2_GR1_WD_SHIFT 1
-#define OMAP4_LPDDR2IO2_GR1_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO2_1 */
-#define OMAP4_LPDDR2IO2_GR8_SR_SHIFT 30
-#define OMAP4_LPDDR2IO2_GR8_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO2_GR8_I_SHIFT 27
-#define OMAP4_LPDDR2IO2_GR8_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO2_GR8_WD_SHIFT 25
-#define OMAP4_LPDDR2IO2_GR8_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO2_GR7_SR_SHIFT 22
-#define OMAP4_LPDDR2IO2_GR7_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO2_GR7_I_SHIFT 19
-#define OMAP4_LPDDR2IO2_GR7_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO2_GR7_WD_SHIFT 17
-#define OMAP4_LPDDR2IO2_GR7_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO2_GR6_SR_SHIFT 14
-#define OMAP4_LPDDR2IO2_GR6_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO2_GR6_I_SHIFT 11
-#define OMAP4_LPDDR2IO2_GR6_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO2_GR6_WD_SHIFT 9
-#define OMAP4_LPDDR2IO2_GR6_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO2_GR5_SR_SHIFT 6
-#define OMAP4_LPDDR2IO2_GR5_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO2_GR5_I_SHIFT 3
-#define OMAP4_LPDDR2IO2_GR5_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO2_GR5_WD_SHIFT 1
-#define OMAP4_LPDDR2IO2_GR5_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO2_2 */
-#define OMAP4_LPDDR2IO2_GR11_SR_SHIFT 30
-#define OMAP4_LPDDR2IO2_GR11_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO2_GR11_I_SHIFT 27
-#define OMAP4_LPDDR2IO2_GR11_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO2_GR11_WD_SHIFT 25
-#define OMAP4_LPDDR2IO2_GR11_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO2_GR10_SR_SHIFT 22
-#define OMAP4_LPDDR2IO2_GR10_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO2_GR10_I_SHIFT 19
-#define OMAP4_LPDDR2IO2_GR10_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO2_GR10_WD_SHIFT 17
-#define OMAP4_LPDDR2IO2_GR10_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO2_GR9_SR_SHIFT 14
-#define OMAP4_LPDDR2IO2_GR9_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO2_GR9_I_SHIFT 11
-#define OMAP4_LPDDR2IO2_GR9_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO2_GR9_WD_SHIFT 9
-#define OMAP4_LPDDR2IO2_GR9_WD_MASK (0x3 << 9)
-
-/* CONTROL_LPDDR2IO2_3 */
-#define OMAP4_LPDDR22_VREF_CA_CCAP0_SHIFT 31
-#define OMAP4_LPDDR22_VREF_CA_CCAP0_MASK (1 << 31)
-#define OMAP4_LPDDR22_VREF_CA_CCAP1_SHIFT 30
-#define OMAP4_LPDDR22_VREF_CA_CCAP1_MASK (1 << 30)
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP0_SHIFT 29
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP0_MASK (1 << 29)
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP1_SHIFT 28
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP1_MASK (1 << 28)
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP0_SHIFT 27
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP0_MASK (1 << 27)
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP1_SHIFT 26
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP1_MASK (1 << 26)
-#define OMAP4_LPDDR22_VREF_CA_TAP0_SHIFT 25
-#define OMAP4_LPDDR22_VREF_CA_TAP0_MASK (1 << 25)
-#define OMAP4_LPDDR22_VREF_CA_TAP1_SHIFT 24
-#define OMAP4_LPDDR22_VREF_CA_TAP1_MASK (1 << 24)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP0_SHIFT 23
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP0_MASK (1 << 23)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP1_SHIFT 22
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP1_MASK (1 << 22)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP0_SHIFT 21
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP0_MASK (1 << 21)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP1_SHIFT 20
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP1_MASK (1 << 20)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP0_SHIFT 19
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP0_MASK (1 << 19)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP1_SHIFT 18
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP1_MASK (1 << 18)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP0_SHIFT 17
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP0_MASK (1 << 17)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP1_SHIFT 16
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP1_MASK (1 << 16)
-#define OMAP4_LPDDR22_VREF_DQ_CCAP0_SHIFT 15
-#define OMAP4_LPDDR22_VREF_DQ_CCAP0_MASK (1 << 15)
-#define OMAP4_LPDDR22_VREF_DQ_CCAP1_SHIFT 14
-#define OMAP4_LPDDR22_VREF_DQ_CCAP1_MASK (1 << 14)
-#define OMAP4_LPDDR22_VREF_DQ_TAP0_SHIFT 13
-#define OMAP4_LPDDR22_VREF_DQ_TAP0_MASK (1 << 13)
-#define OMAP4_LPDDR22_VREF_DQ_TAP1_SHIFT 12
-#define OMAP4_LPDDR22_VREF_DQ_TAP1_MASK (1 << 12)
-
-/* CONTROL_BUS_HOLD */
-#define OMAP4_ABE_DMIC_DIN3_EN_SHIFT 31
-#define OMAP4_ABE_DMIC_DIN3_EN_MASK (1 << 31)
-#define OMAP4_MCSPI1_CS3_EN_SHIFT 30
-#define OMAP4_MCSPI1_CS3_EN_MASK (1 << 30)
-
-/* CONTROL_C2C */
-#define OMAP4_MIRROR_MODE_EN_SHIFT 31
-#define OMAP4_MIRROR_MODE_EN_MASK (1 << 31)
-#define OMAP4_C2C_SPARE_SHIFT 24
-#define OMAP4_C2C_SPARE_MASK (0x7f << 24)
-
-/* CORE_CONTROL_SPARE_RW */
-#define OMAP4_CORE_CONTROL_SPARE_RW_SHIFT 0
-#define OMAP4_CORE_CONTROL_SPARE_RW_MASK (0xffffffff << 0)
-
-/* CORE_CONTROL_SPARE_R */
-#define OMAP4_CORE_CONTROL_SPARE_R_SHIFT 0
-#define OMAP4_CORE_CONTROL_SPARE_R_MASK (0xffffffff << 0)
-
-/* CORE_CONTROL_SPARE_R_C0 */
-#define OMAP4_CORE_CONTROL_SPARE_R_C0_SHIFT 31
-#define OMAP4_CORE_CONTROL_SPARE_R_C0_MASK (1 << 31)
-#define OMAP4_CORE_CONTROL_SPARE_R_C1_SHIFT 30
-#define OMAP4_CORE_CONTROL_SPARE_R_C1_MASK (1 << 30)
-#define OMAP4_CORE_CONTROL_SPARE_R_C2_SHIFT 29
-#define OMAP4_CORE_CONTROL_SPARE_R_C2_MASK (1 << 29)
-#define OMAP4_CORE_CONTROL_SPARE_R_C3_SHIFT 28
-#define OMAP4_CORE_CONTROL_SPARE_R_C3_MASK (1 << 28)
-#define OMAP4_CORE_CONTROL_SPARE_R_C4_SHIFT 27
-#define OMAP4_CORE_CONTROL_SPARE_R_C4_MASK (1 << 27)
-#define OMAP4_CORE_CONTROL_SPARE_R_C5_SHIFT 26
-#define OMAP4_CORE_CONTROL_SPARE_R_C5_MASK (1 << 26)
-#define OMAP4_CORE_CONTROL_SPARE_R_C6_SHIFT 25
-#define OMAP4_CORE_CONTROL_SPARE_R_C6_MASK (1 << 25)
-#define OMAP4_CORE_CONTROL_SPARE_R_C7_SHIFT 24
-#define OMAP4_CORE_CONTROL_SPARE_R_C7_MASK (1 << 24)
-
-/* CONTROL_EFUSE_1 */
-#define OMAP4_AVDAC_TRIM_BYTE3_SHIFT 24
-#define OMAP4_AVDAC_TRIM_BYTE3_MASK (0x7f << 24)
-#define OMAP4_AVDAC_TRIM_BYTE2_SHIFT 16
-#define OMAP4_AVDAC_TRIM_BYTE2_MASK (0xff << 16)
-#define OMAP4_AVDAC_TRIM_BYTE1_SHIFT 8
-#define OMAP4_AVDAC_TRIM_BYTE1_MASK (0xff << 8)
-#define OMAP4_AVDAC_TRIM_BYTE0_SHIFT 0
-#define OMAP4_AVDAC_TRIM_BYTE0_MASK (0xff << 0)
-
-/* CONTROL_EFUSE_2 */
-#define OMAP4_EFUSE_SMART2TEST_P0_SHIFT 31
-#define OMAP4_EFUSE_SMART2TEST_P0_MASK (1 << 31)
-#define OMAP4_EFUSE_SMART2TEST_P1_SHIFT 30
-#define OMAP4_EFUSE_SMART2TEST_P1_MASK (1 << 30)
-#define OMAP4_EFUSE_SMART2TEST_P2_SHIFT 29
-#define OMAP4_EFUSE_SMART2TEST_P2_MASK (1 << 29)
-#define OMAP4_EFUSE_SMART2TEST_P3_SHIFT 28
-#define OMAP4_EFUSE_SMART2TEST_P3_MASK (1 << 28)
-#define OMAP4_EFUSE_SMART2TEST_N0_SHIFT 27
-#define OMAP4_EFUSE_SMART2TEST_N0_MASK (1 << 27)
-#define OMAP4_EFUSE_SMART2TEST_N1_SHIFT 26
-#define OMAP4_EFUSE_SMART2TEST_N1_MASK (1 << 26)
-#define OMAP4_EFUSE_SMART2TEST_N2_SHIFT 25
-#define OMAP4_EFUSE_SMART2TEST_N2_MASK (1 << 25)
-#define OMAP4_EFUSE_SMART2TEST_N3_SHIFT 24
-#define OMAP4_EFUSE_SMART2TEST_N3_MASK (1 << 24)
-#define OMAP4_LPDDR2_PTV_N1_SHIFT 23
-#define OMAP4_LPDDR2_PTV_N1_MASK (1 << 23)
-#define OMAP4_LPDDR2_PTV_N2_SHIFT 22
-#define OMAP4_LPDDR2_PTV_N2_MASK (1 << 22)
-#define OMAP4_LPDDR2_PTV_N3_SHIFT 21
-#define OMAP4_LPDDR2_PTV_N3_MASK (1 << 21)
-#define OMAP4_LPDDR2_PTV_N4_SHIFT 20
-#define OMAP4_LPDDR2_PTV_N4_MASK (1 << 20)
-#define OMAP4_LPDDR2_PTV_N5_SHIFT 19
-#define OMAP4_LPDDR2_PTV_N5_MASK (1 << 19)
-#define OMAP4_LPDDR2_PTV_P1_SHIFT 18
-#define OMAP4_LPDDR2_PTV_P1_MASK (1 << 18)
-#define OMAP4_LPDDR2_PTV_P2_SHIFT 17
-#define OMAP4_LPDDR2_PTV_P2_MASK (1 << 17)
-#define OMAP4_LPDDR2_PTV_P3_SHIFT 16
-#define OMAP4_LPDDR2_PTV_P3_MASK (1 << 16)
-#define OMAP4_LPDDR2_PTV_P4_SHIFT 15
-#define OMAP4_LPDDR2_PTV_P4_MASK (1 << 15)
-#define OMAP4_LPDDR2_PTV_P5_SHIFT 14
-#define OMAP4_LPDDR2_PTV_P5_MASK (1 << 14)
-
-/* CONTROL_EFUSE_3 */
-#define OMAP4_STD_FUSE_SPARE_1_SHIFT 24
-#define OMAP4_STD_FUSE_SPARE_1_MASK (0xff << 24)
-#define OMAP4_STD_FUSE_SPARE_2_SHIFT 16
-#define OMAP4_STD_FUSE_SPARE_2_MASK (0xff << 16)
-#define OMAP4_STD_FUSE_SPARE_3_SHIFT 8
-#define OMAP4_STD_FUSE_SPARE_3_MASK (0xff << 8)
-#define OMAP4_STD_FUSE_SPARE_4_SHIFT 0
-#define OMAP4_STD_FUSE_SPARE_4_MASK (0xff << 0)
-
-/* CONTROL_EFUSE_4 */
-#define OMAP4_STD_FUSE_SPARE_5_SHIFT 24
-#define OMAP4_STD_FUSE_SPARE_5_MASK (0xff << 24)
-#define OMAP4_STD_FUSE_SPARE_6_SHIFT 16
-#define OMAP4_STD_FUSE_SPARE_6_MASK (0xff << 16)
-#define OMAP4_STD_FUSE_SPARE_7_SHIFT 8
-#define OMAP4_STD_FUSE_SPARE_7_MASK (0xff << 8)
-#define OMAP4_STD_FUSE_SPARE_8_SHIFT 0
-#define OMAP4_STD_FUSE_SPARE_8_MASK (0xff << 0)
-
-#endif
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
deleted file mode 100644
index 17c9b37..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
+++ /dev/null
@@ -1,236 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_PAD_WKUP registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson@ti.com)
- * Santosh Shilimkar (santosh.shilimkar@ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_WKUP_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_WKUP_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_PAD_WKUP 0x4a31e000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_PAD_WKUP_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_PAD_WKUP_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_PAD_WKUP_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_PAD_WKUP_PADCONF_WAKEUPEVENT_0 0x007c
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_SMART1NOPMIO_PADCONF_0 0x05a0
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_SMART1NOPMIO_PADCONF_1 0x05a4
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_PADCONF_MODE 0x05a8
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_XTAL_OSCILLATOR 0x05ac
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_USIMIO 0x0600
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_I2C_2 0x0604
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_JTAG 0x0608
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_SYS 0x060c
-#define OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_RW 0x0614
-#define OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_R 0x0618
-#define OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_R_C0 0x061c
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* PADCONF_WAKEUPEVENT_0 */
-#define OMAP4_JTAG_TDO_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_JTAG_TDO_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_JTAG_TDI_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_JTAG_TDI_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_JTAG_TMS_TMSC_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_JTAG_TMS_TMSC_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_JTAG_RTCK_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_JTAG_RTCK_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_JTAG_TCK_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_JTAG_TCK_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_JTAG_NTRST_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_JTAG_NTRST_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_SYS_BOOT7_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_SYS_BOOT7_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_SYS_BOOT6_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_SYS_BOOT6_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_SYS_PWRON_RESET_OUT_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_SYS_PWRON_RESET_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_SYS_PWR_REQ_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_SYS_PWR_REQ_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_SYS_NRESWARM_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_SYS_NRESWARM_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_SYS_32K_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_SYS_32K_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_FREF_CLK4_OUT_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_FREF_CLK4_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_FREF_CLK4_REQ_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_FREF_CLK4_REQ_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_FREF_CLK3_OUT_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_FREF_CLK3_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_FREF_CLK3_REQ_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_FREF_CLK3_REQ_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_FREF_CLK0_OUT_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_FREF_CLK0_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_FREF_CLK_IOREQ_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_FREF_CLK_IOREQ_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_SR_SDA_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_SR_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_SR_SCL_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_SR_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_SIM_PWRCTRL_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_SIM_PWRCTRL_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_SIM_CD_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_SIM_CD_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_SIM_RESET_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_SIM_RESET_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_SIM_CLK_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_SIM_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_SIM_IO_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_SIM_IO_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* CONTROL_SMART1NOPMIO_PADCONF_0 */
-#define OMAP4_FREF_DR0_SC_SHIFT 30
-#define OMAP4_FREF_DR0_SC_MASK (0x3 << 30)
-#define OMAP4_FREF_DR1_SC_SHIFT 28
-#define OMAP4_FREF_DR1_SC_MASK (0x3 << 28)
-#define OMAP4_FREF_DR4_SC_SHIFT 26
-#define OMAP4_FREF_DR4_SC_MASK (0x3 << 26)
-#define OMAP4_FREF_DR5_SC_SHIFT 24
-#define OMAP4_FREF_DR5_SC_MASK (0x3 << 24)
-#define OMAP4_FREF_DR6_SC_SHIFT 22
-#define OMAP4_FREF_DR6_SC_MASK (0x3 << 22)
-#define OMAP4_FREF_DR7_SC_SHIFT 20
-#define OMAP4_FREF_DR7_SC_MASK (0x3 << 20)
-#define OMAP4_GPIO_DR7_SC_SHIFT 18
-#define OMAP4_GPIO_DR7_SC_MASK (0x3 << 18)
-#define OMAP4_DPM_DR0_SC_SHIFT 14
-#define OMAP4_DPM_DR0_SC_MASK (0x3 << 14)
-#define OMAP4_SIM_DR0_SC_SHIFT 12
-#define OMAP4_SIM_DR0_SC_MASK (0x3 << 12)
-
-/* CONTROL_SMART1NOPMIO_PADCONF_1 */
-#define OMAP4_FREF_DR0_LB_SHIFT 30
-#define OMAP4_FREF_DR0_LB_MASK (0x3 << 30)
-#define OMAP4_FREF_DR1_LB_SHIFT 28
-#define OMAP4_FREF_DR1_LB_MASK (0x3 << 28)
-#define OMAP4_FREF_DR4_LB_SHIFT 26
-#define OMAP4_FREF_DR4_LB_MASK (0x3 << 26)
-#define OMAP4_FREF_DR5_LB_SHIFT 24
-#define OMAP4_FREF_DR5_LB_MASK (0x3 << 24)
-#define OMAP4_FREF_DR6_LB_SHIFT 22
-#define OMAP4_FREF_DR6_LB_MASK (0x3 << 22)
-#define OMAP4_FREF_DR7_LB_SHIFT 20
-#define OMAP4_FREF_DR7_LB_MASK (0x3 << 20)
-#define OMAP4_GPIO_DR7_LB_SHIFT 18
-#define OMAP4_GPIO_DR7_LB_MASK (0x3 << 18)
-#define OMAP4_DPM_DR0_LB_SHIFT 14
-#define OMAP4_DPM_DR0_LB_MASK (0x3 << 14)
-#define OMAP4_SIM_DR0_LB_SHIFT 12
-#define OMAP4_SIM_DR0_LB_MASK (0x3 << 12)
-
-/* CONTROL_PADCONF_MODE */
-#define OMAP4_VDDS_DV_FREF_SHIFT 31
-#define OMAP4_VDDS_DV_FREF_MASK (1 << 31)
-#define OMAP4_VDDS_DV_BANK2_SHIFT 30
-#define OMAP4_VDDS_DV_BANK2_MASK (1 << 30)
-
-/* CONTROL_XTAL_OSCILLATOR */
-#define OMAP4_OSCILLATOR_BOOST_SHIFT 31
-#define OMAP4_OSCILLATOR_BOOST_MASK (1 << 31)
-#define OMAP4_OSCILLATOR_OS_OUT_SHIFT 30
-#define OMAP4_OSCILLATOR_OS_OUT_MASK (1 << 30)
-
-/* CONTROL_USIMIO */
-#define OMAP4_PAD_USIM_CLK_LOW_SHIFT 31
-#define OMAP4_PAD_USIM_CLK_LOW_MASK (1 << 31)
-#define OMAP4_PAD_USIM_RST_LOW_SHIFT 29
-#define OMAP4_PAD_USIM_RST_LOW_MASK (1 << 29)
-#define OMAP4_USIM_PWRDNZ_SHIFT 28
-#define OMAP4_USIM_PWRDNZ_MASK (1 << 28)
-
-/* CONTROL_I2C_2 */
-#define OMAP4_SR_SDA_GLFENB_SHIFT 31
-#define OMAP4_SR_SDA_GLFENB_MASK (1 << 31)
-#define OMAP4_SR_SDA_LOAD_BITS_SHIFT 29
-#define OMAP4_SR_SDA_LOAD_BITS_MASK (0x3 << 29)
-#define OMAP4_SR_SDA_PULLUPRESX_SHIFT 28
-#define OMAP4_SR_SDA_PULLUPRESX_MASK (1 << 28)
-#define OMAP4_SR_SCL_GLFENB_SHIFT 27
-#define OMAP4_SR_SCL_GLFENB_MASK (1 << 27)
-#define OMAP4_SR_SCL_LOAD_BITS_SHIFT 25
-#define OMAP4_SR_SCL_LOAD_BITS_MASK (0x3 << 25)
-#define OMAP4_SR_SCL_PULLUPRESX_SHIFT 24
-#define OMAP4_SR_SCL_PULLUPRESX_MASK (1 << 24)
-
-/* CONTROL_JTAG */
-#define OMAP4_JTAG_NTRST_EN_SHIFT 31
-#define OMAP4_JTAG_NTRST_EN_MASK (1 << 31)
-#define OMAP4_JTAG_TCK_EN_SHIFT 30
-#define OMAP4_JTAG_TCK_EN_MASK (1 << 30)
-#define OMAP4_JTAG_RTCK_EN_SHIFT 29
-#define OMAP4_JTAG_RTCK_EN_MASK (1 << 29)
-#define OMAP4_JTAG_TDI_EN_SHIFT 28
-#define OMAP4_JTAG_TDI_EN_MASK (1 << 28)
-#define OMAP4_JTAG_TDO_EN_SHIFT 27
-#define OMAP4_JTAG_TDO_EN_MASK (1 << 27)
-
-/* CONTROL_SYS */
-#define OMAP4_SYS_NRESWARM_PIPU_SHIFT 31
-#define OMAP4_SYS_NRESWARM_PIPU_MASK (1 << 31)
-
-/* WKUP_CONTROL_SPARE_RW */
-#define OMAP4_WKUP_CONTROL_SPARE_RW_SHIFT 0
-#define OMAP4_WKUP_CONTROL_SPARE_RW_MASK (0xffffffff << 0)
-
-/* WKUP_CONTROL_SPARE_R */
-#define OMAP4_WKUP_CONTROL_SPARE_R_SHIFT 0
-#define OMAP4_WKUP_CONTROL_SPARE_R_MASK (0xffffffff << 0)
-
-/* WKUP_CONTROL_SPARE_R_C0 */
-#define OMAP4_WKUP_CONTROL_SPARE_R_C0_SHIFT 31
-#define OMAP4_WKUP_CONTROL_SPARE_R_C0_MASK (1 << 31)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C1_SHIFT 30
-#define OMAP4_WKUP_CONTROL_SPARE_R_C1_MASK (1 << 30)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C2_SHIFT 29
-#define OMAP4_WKUP_CONTROL_SPARE_R_C2_MASK (1 << 29)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C3_SHIFT 28
-#define OMAP4_WKUP_CONTROL_SPARE_R_C3_MASK (1 << 28)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C4_SHIFT 27
-#define OMAP4_WKUP_CONTROL_SPARE_R_C4_MASK (1 << 27)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C5_SHIFT 26
-#define OMAP4_WKUP_CONTROL_SPARE_R_C5_MASK (1 << 26)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C6_SHIFT 25
-#define OMAP4_WKUP_CONTROL_SPARE_R_C6_MASK (1 << 25)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C7_SHIFT 24
-#define OMAP4_WKUP_CONTROL_SPARE_R_C7_MASK (1 << 24)
-
-#endif
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
deleted file mode 100644
index a0af9ba..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_WKUP registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson@ti.com)
- * Santosh Shilimkar (santosh.shilimkar@ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_WKUP_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_WKUP_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_WKUP 0x4a30c000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_WKUP_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_WKUP_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_WKUP_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_0 0x0460
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_1 0x0464
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_2 0x0468
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_3 0x046c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_4 0x0470
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_5 0x0474
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_6 0x0478
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_7 0x047c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_8 0x0480
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_9 0x0484
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_10 0x0488
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_11 0x048c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_12 0x0490
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_13 0x0494
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_14 0x0498
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_15 0x049c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_16 0x04a0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_17 0x04a4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_18 0x04a8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_19 0x04ac
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_20 0x04b0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_21 0x04b4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_22 0x04b8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_23 0x04bc
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_24 0x04c0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_25 0x04c4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_26 0x04c8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_27 0x04cc
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_28 0x04d0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_29 0x04d4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_30 0x04d8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_31 0x04dc
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* CONF_DEBUG_SEL_TST_0 */
-#define OMAP4_WKUP_MODE_SHIFT 0
-#define OMAP4_WKUP_MODE_MASK (1 << 0)
-
-#endif
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 01/11] ARM: OMAP4: Remove un-used control module headers and defines.
@ 2012-05-25 8:25 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: linux-arm-kernel
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
Most of the OMAP4 control module register defines are not used and
can be removed. Keep only needed defines and move them to common
control module header just like other OMAP versions.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/control.h | 45 +-
.../include/mach/ctrl_module_core_44xx.h | 391 ------
.../include/mach/ctrl_module_pad_core_44xx.h | 1409 --------------------
.../include/mach/ctrl_module_pad_wkup_44xx.h | 236 ----
.../include/mach/ctrl_module_wkup_44xx.h | 92 --
5 files changed, 40 insertions(+), 2133 deletions(-)
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index a406fd0..dad2903 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -16,11 +16,6 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H
#define __ARCH_ARM_MACH_OMAP2_CONTROL_H
-#include <mach/ctrl_module_core_44xx.h>
-#include <mach/ctrl_module_wkup_44xx.h>
-#include <mach/ctrl_module_pad_core_44xx.h>
-#include <mach/ctrl_module_pad_wkup_44xx.h>
-
#ifndef __ASSEMBLY__
#define OMAP242X_CTRL_REGADDR(reg) \
OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
@@ -183,6 +178,43 @@
#define OMAP3630_CONTROL_FUSE_OPP50_VDD2 (OMAP2_CONTROL_GENERAL + 0x0128)
#define OMAP3630_CONTROL_FUSE_OPP100_VDD2 (OMAP2_CONTROL_GENERAL + 0x012C)
+/* OMAP4 IDCODE CONTROL */
+#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1 0x0218
+#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4
+
+/* CONTROL_I2C_1 */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1 0x0624
+#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK (1 << 28)
+#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK (1 << 24)
+
+/* DSI CONTROL_DSIPHY */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY 0x0618
+#define OMAP4_DSI2_LANEENABLE_SHIFT 29
+#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29)
+#define OMAP4_DSI1_LANEENABLE_SHIFT 24
+#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24)
+#define OMAP4_DSI1_PIPD_SHIFT 19
+#define OMAP4_DSI1_PIPD_MASK (0x1f << 19)
+#define OMAP4_DSI2_PIPD_SHIFT 14
+#define OMAP4_DSI2_PIPD_MASK (0x1f << 14)
+
+/* CONTROL_PBIASLITE */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PBIASLITE 0x0600
+#define OMAP4_MMC1_PWRDNZ_MASK (1 << 26)
+#define OMAP4_MMC1_PBIASLITE_VMODE_MASK (1 << 21)
+#define OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK (1 << 22)
+#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK (1 << 23)
+
+/* CONTROL_MMC1 */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC1 0x0628
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_MASK (1 << 31)
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK (1 << 30)
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK (1 << 29)
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK (1 << 28)
+#define OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK (1 << 27)
+#define OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK (1 << 26)
+#define OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK (1 << 25)
+
/* OMAP44xx control efuse offsets */
#define OMAP44XX_CONTROL_FUSE_IVA_OPP50 0x22C
#define OMAP44XX_CONTROL_FUSE_IVA_OPP100 0x22F
@@ -195,6 +227,9 @@
#define OMAP44XX_CONTROL_FUSE_CORE_OPP50 0x254
#define OMAP44XX_CONTROL_FUSE_CORE_OPP100 0x257
+/* OMAP44xx control McBSP padconf */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
+
/* AM35XX only CONTROL_GENERAL register offsets */
#define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
#define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
deleted file mode 100644
index 2f7ac70..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
+++ /dev/null
@@ -1,391 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_CORE registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson at ti.com)
- * Santosh Shilimkar (santosh.shilimkar at ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap at vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_CORE_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_CORE_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_CORE 0x4a002000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_CORE_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_CORE_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_CORE_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_0 0x0200
-#define OMAP4_CTRL_MODULE_CORE_ID_CODE 0x0204
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_1 0x0208
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_2 0x020c
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_3 0x0210
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_0 0x0214
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1 0x0218
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_USB_CONF 0x021c
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_VDD_WKUP 0x0228
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_BGAP 0x0260
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_0 0x0264
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268
-#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4
-#define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300
-#define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314
-#define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318
-#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320
-#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_MPU_VOLTAGE_CTRL 0x0324
-#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_CORE_VOLTAGE_CTRL 0x0328
-#define OMAP4_CTRL_MODULE_CORE_TEMP_SENSOR 0x032c
-#define OMAP4_CTRL_MODULE_CORE_DPLL_NWELL_TRIM_0 0x0330
-#define OMAP4_CTRL_MODULE_CORE_DPLL_NWELL_TRIM_1 0x0334
-#define OMAP4_CTRL_MODULE_CORE_USBOTGHS_CONTROL 0x033c
-#define OMAP4_CTRL_MODULE_CORE_DSS_CONTROL 0x0340
-#define OMAP4_CTRL_MODULE_CORE_HWOBS_CONTROL 0x0350
-#define OMAP4_CTRL_MODULE_CORE_DEBOBS_FINAL_MUX_SEL 0x0400
-#define OMAP4_CTRL_MODULE_CORE_DEBOBS_MMR_MPU 0x0408
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL0 0x042c
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL1 0x0430
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL2 0x0434
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL3 0x0438
-#define OMAP4_CTRL_MODULE_CORE_CONF_CLK_SEL0 0x0440
-#define OMAP4_CTRL_MODULE_CORE_CONF_CLK_SEL1 0x0444
-#define OMAP4_CTRL_MODULE_CORE_CONF_CLK_SEL2 0x0448
-#define OMAP4_CTRL_MODULE_CORE_CONF_DPLL_FREQLOCK_SEL 0x044c
-#define OMAP4_CTRL_MODULE_CORE_CONF_DPLL_TINITZ_SEL 0x0450
-#define OMAP4_CTRL_MODULE_CORE_CONF_DPLL_PHASELOCK_SEL 0x0454
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_0 0x0480
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_1 0x0484
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_2 0x0488
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_3 0x048c
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_4 0x0490
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_5 0x0494
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_6 0x0498
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_7 0x049c
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_8 0x04a0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_9 0x04a4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_10 0x04a8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_11 0x04ac
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_12 0x04b0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_13 0x04b4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_14 0x04b8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_15 0x04bc
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_16 0x04c0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_17 0x04c4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_18 0x04c8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_19 0x04cc
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_20 0x04d0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_21 0x04d4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_22 0x04d8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_23 0x04dc
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_24 0x04e0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_25 0x04e4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_26 0x04e8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_27 0x04ec
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_28 0x04f0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_29 0x04f4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_30 0x04f8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_31 0x04fc
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* STD_FUSE_DIE_ID_0 */
-#define OMAP4_STD_FUSE_DIE_ID_0_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_0_MASK (0xffffffff << 0)
-
-/* ID_CODE */
-#define OMAP4_STD_FUSE_IDCODE_SHIFT 0
-#define OMAP4_STD_FUSE_IDCODE_MASK (0xffffffff << 0)
-
-/* STD_FUSE_DIE_ID_1 */
-#define OMAP4_STD_FUSE_DIE_ID_1_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_1_MASK (0xffffffff << 0)
-
-/* STD_FUSE_DIE_ID_2 */
-#define OMAP4_STD_FUSE_DIE_ID_2_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_2_MASK (0xffffffff << 0)
-
-/* STD_FUSE_DIE_ID_3 */
-#define OMAP4_STD_FUSE_DIE_ID_3_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_3_MASK (0xffffffff << 0)
-
-/* STD_FUSE_PROD_ID_0 */
-#define OMAP4_STD_FUSE_PROD_ID_0_SHIFT 0
-#define OMAP4_STD_FUSE_PROD_ID_0_MASK (0xffffffff << 0)
-
-/* STD_FUSE_PROD_ID_1 */
-#define OMAP4_STD_FUSE_PROD_ID_1_SHIFT 0
-#define OMAP4_STD_FUSE_PROD_ID_1_MASK (0xffffffff << 0)
-
-/* STD_FUSE_USB_CONF */
-#define OMAP4_USB_PROD_ID_SHIFT 16
-#define OMAP4_USB_PROD_ID_MASK (0xffff << 16)
-#define OMAP4_USB_VENDOR_ID_SHIFT 0
-#define OMAP4_USB_VENDOR_ID_MASK (0xffff << 0)
-
-/* STD_FUSE_OPP_VDD_WKUP */
-#define OMAP4_STD_FUSE_OPP_VDD_WKUP_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_VDD_WKUP_MASK (0xffffffff << 0)
-
-/* STD_FUSE_OPP_BGAP */
-#define OMAP4_STD_FUSE_OPP_BGAP_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_BGAP_MASK (0xffffffff << 0)
-
-/* STD_FUSE_OPP_DPLL_0 */
-#define OMAP4_STD_FUSE_OPP_DPLL_0_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_DPLL_0_MASK (0xffffffff << 0)
-
-/* STD_FUSE_OPP_DPLL_1 */
-#define OMAP4_STD_FUSE_OPP_DPLL_1_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_DPLL_1_MASK (0xffffffff << 0)
-
-/* STATUS */
-#define OMAP4_ATTILA_CONF_SHIFT 11
-#define OMAP4_ATTILA_CONF_MASK (0x3 << 11)
-#define OMAP4_DEVICE_TYPE_SHIFT 8
-#define OMAP4_DEVICE_TYPE_MASK (0x7 << 8)
-#define OMAP4_SYS_BOOT_SHIFT 0
-#define OMAP4_SYS_BOOT_MASK (0xff << 0)
-
-/* DEV_CONF */
-#define OMAP4_DEV_CONF_SHIFT 1
-#define OMAP4_DEV_CONF_MASK (0x7fffffff << 1)
-#define OMAP4_USBPHY_PD_SHIFT 0
-#define OMAP4_USBPHY_PD_MASK (1 << 0)
-
-/* LDOVBB_IVA_VOLTAGE_CTRL */
-#define OMAP4_LDOVBBIVA_RBB_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOVBBIVA_RBB_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOVBBIVA_RBB_VSET_IN_SHIFT 21
-#define OMAP4_LDOVBBIVA_RBB_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOVBBIVA_RBB_VSET_OUT_SHIFT 16
-#define OMAP4_LDOVBBIVA_RBB_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOVBBIVA_FBB_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOVBBIVA_FBB_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOVBBIVA_FBB_VSET_IN_SHIFT 5
-#define OMAP4_LDOVBBIVA_FBB_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOVBBIVA_FBB_VSET_OUT_SHIFT 0
-#define OMAP4_LDOVBBIVA_FBB_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOVBB_MPU_VOLTAGE_CTRL */
-#define OMAP4_LDOVBBMPU_RBB_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOVBBMPU_RBB_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOVBBMPU_RBB_VSET_IN_SHIFT 21
-#define OMAP4_LDOVBBMPU_RBB_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOVBBMPU_RBB_VSET_OUT_SHIFT 16
-#define OMAP4_LDOVBBMPU_RBB_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOVBBMPU_FBB_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOVBBMPU_FBB_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOVBBMPU_FBB_VSET_IN_SHIFT 5
-#define OMAP4_LDOVBBMPU_FBB_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOVBBMPU_FBB_VSET_OUT_SHIFT 0
-#define OMAP4_LDOVBBMPU_FBB_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOSRAM_IVA_VOLTAGE_CTRL */
-#define OMAP4_LDOSRAMIVA_RETMODE_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOSRAMIVA_RETMODE_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_IN_SHIFT 21
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_OUT_SHIFT 16
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOSRAMIVA_ACTMODE_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOSRAMIVA_ACTMODE_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_IN_SHIFT 5
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_OUT_SHIFT 0
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOSRAM_MPU_VOLTAGE_CTRL */
-#define OMAP4_LDOSRAMMPU_RETMODE_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOSRAMMPU_RETMODE_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_IN_SHIFT 21
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_OUT_SHIFT 16
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOSRAMMPU_ACTMODE_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOSRAMMPU_ACTMODE_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_IN_SHIFT 5
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_OUT_SHIFT 0
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOSRAM_CORE_VOLTAGE_CTRL */
-#define OMAP4_LDOSRAMCORE_RETMODE_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOSRAMCORE_RETMODE_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_IN_SHIFT 21
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_OUT_SHIFT 16
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOSRAMCORE_ACTMODE_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOSRAMCORE_ACTMODE_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_IN_SHIFT 5
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_OUT_SHIFT 0
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_OUT_MASK (0x1f << 0)
-
-/* TEMP_SENSOR */
-#define OMAP4_BGAP_TEMPSOFF_SHIFT 12
-#define OMAP4_BGAP_TEMPSOFF_MASK (1 << 12)
-#define OMAP4_BGAP_TSHUT_SHIFT 11
-#define OMAP4_BGAP_TSHUT_MASK (1 << 11)
-#define OMAP4_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10
-#define OMAP4_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10)
-#define OMAP4_BGAP_TEMP_SENSOR_SOC_SHIFT 9
-#define OMAP4_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9)
-#define OMAP4_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8
-#define OMAP4_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8)
-#define OMAP4_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
-#define OMAP4_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0)
-
-/* DPLL_NWELL_TRIM_0 */
-#define OMAP4_DPLL_ABE_NWELL_TRIM_MUX_CTRL_SHIFT 29
-#define OMAP4_DPLL_ABE_NWELL_TRIM_MUX_CTRL_MASK (1 << 29)
-#define OMAP4_DPLL_ABE_NWELL_TRIM_SHIFT 24
-#define OMAP4_DPLL_ABE_NWELL_TRIM_MASK (0x1f << 24)
-#define OMAP4_DPLL_PER_NWELL_TRIM_MUX_CTRL_SHIFT 23
-#define OMAP4_DPLL_PER_NWELL_TRIM_MUX_CTRL_MASK (1 << 23)
-#define OMAP4_DPLL_PER_NWELL_TRIM_SHIFT 18
-#define OMAP4_DPLL_PER_NWELL_TRIM_MASK (0x1f << 18)
-#define OMAP4_DPLL_CORE_NWELL_TRIM_MUX_CTRL_SHIFT 17
-#define OMAP4_DPLL_CORE_NWELL_TRIM_MUX_CTRL_MASK (1 << 17)
-#define OMAP4_DPLL_CORE_NWELL_TRIM_SHIFT 12
-#define OMAP4_DPLL_CORE_NWELL_TRIM_MASK (0x1f << 12)
-#define OMAP4_DPLL_IVA_NWELL_TRIM_MUX_CTRL_SHIFT 11
-#define OMAP4_DPLL_IVA_NWELL_TRIM_MUX_CTRL_MASK (1 << 11)
-#define OMAP4_DPLL_IVA_NWELL_TRIM_SHIFT 6
-#define OMAP4_DPLL_IVA_NWELL_TRIM_MASK (0x1f << 6)
-#define OMAP4_DPLL_MPU_NWELL_TRIM_MUX_CTRL_SHIFT 5
-#define OMAP4_DPLL_MPU_NWELL_TRIM_MUX_CTRL_MASK (1 << 5)
-#define OMAP4_DPLL_MPU_NWELL_TRIM_SHIFT 0
-#define OMAP4_DPLL_MPU_NWELL_TRIM_MASK (0x1f << 0)
-
-/* DPLL_NWELL_TRIM_1 */
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_MUX_CTRL_SHIFT 29
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_MUX_CTRL_MASK (1 << 29)
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_SHIFT 24
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_MASK (0x1f << 24)
-#define OMAP4_DPLL_USB_NWELL_TRIM_MUX_CTRL_SHIFT 23
-#define OMAP4_DPLL_USB_NWELL_TRIM_MUX_CTRL_MASK (1 << 23)
-#define OMAP4_DPLL_USB_NWELL_TRIM_SHIFT 18
-#define OMAP4_DPLL_USB_NWELL_TRIM_MASK (0x1f << 18)
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_MUX_CTRL_SHIFT 17
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_MUX_CTRL_MASK (1 << 17)
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_SHIFT 12
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_MASK (0x1f << 12)
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_MUX_CTRL_SHIFT 11
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_MUX_CTRL_MASK (1 << 11)
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_SHIFT 6
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_MASK (0x1f << 6)
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_MUX_CTRL_SHIFT 5
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_MUX_CTRL_MASK (1 << 5)
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_SHIFT 0
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_MASK (0x1f << 0)
-
-/* USBOTGHS_CONTROL */
-#define OMAP4_DISCHRGVBUS_SHIFT 8
-#define OMAP4_DISCHRGVBUS_MASK (1 << 8)
-#define OMAP4_CHRGVBUS_SHIFT 7
-#define OMAP4_CHRGVBUS_MASK (1 << 7)
-#define OMAP4_DRVVBUS_SHIFT 6
-#define OMAP4_DRVVBUS_MASK (1 << 6)
-#define OMAP4_IDPULLUP_SHIFT 5
-#define OMAP4_IDPULLUP_MASK (1 << 5)
-#define OMAP4_IDDIG_SHIFT 4
-#define OMAP4_IDDIG_MASK (1 << 4)
-#define OMAP4_SESSEND_SHIFT 3
-#define OMAP4_SESSEND_MASK (1 << 3)
-#define OMAP4_VBUSVALID_SHIFT 2
-#define OMAP4_VBUSVALID_MASK (1 << 2)
-#define OMAP4_BVALID_SHIFT 1
-#define OMAP4_BVALID_MASK (1 << 1)
-#define OMAP4_AVALID_SHIFT 0
-#define OMAP4_AVALID_MASK (1 << 0)
-
-/* DSS_CONTROL */
-#define OMAP4_DSS_MUX6_SELECT_SHIFT 0
-#define OMAP4_DSS_MUX6_SELECT_MASK (1 << 0)
-
-/* HWOBS_CONTROL */
-#define OMAP4_HWOBS_CLKDIV_SEL_SHIFT 3
-#define OMAP4_HWOBS_CLKDIV_SEL_MASK (0x1f << 3)
-#define OMAP4_HWOBS_ALL_ZERO_MODE_SHIFT 2
-#define OMAP4_HWOBS_ALL_ZERO_MODE_MASK (1 << 2)
-#define OMAP4_HWOBS_ALL_ONE_MODE_SHIFT 1
-#define OMAP4_HWOBS_ALL_ONE_MODE_MASK (1 << 1)
-#define OMAP4_HWOBS_MACRO_ENABLE_SHIFT 0
-#define OMAP4_HWOBS_MACRO_ENABLE_MASK (1 << 0)
-
-/* DEBOBS_FINAL_MUX_SEL */
-#define OMAP4_SELECT_SHIFT 0
-#define OMAP4_SELECT_MASK (0xffffffff << 0)
-
-/* DEBOBS_MMR_MPU */
-#define OMAP4_SELECT_DEBOBS_MMR_MPU_SHIFT 0
-#define OMAP4_SELECT_DEBOBS_MMR_MPU_MASK (0xf << 0)
-
-/* CONF_SDMA_REQ_SEL0 */
-#define OMAP4_MULT_SHIFT 0
-#define OMAP4_MULT_MASK (0x7f << 0)
-
-/* CONF_CLK_SEL0 */
-#define OMAP4_MULT_CONF_CLK_SEL0_SHIFT 0
-#define OMAP4_MULT_CONF_CLK_SEL0_MASK (0x7 << 0)
-
-/* CONF_CLK_SEL1 */
-#define OMAP4_MULT_CONF_CLK_SEL1_SHIFT 0
-#define OMAP4_MULT_CONF_CLK_SEL1_MASK (0x7 << 0)
-
-/* CONF_CLK_SEL2 */
-#define OMAP4_MULT_CONF_CLK_SEL2_SHIFT 0
-#define OMAP4_MULT_CONF_CLK_SEL2_MASK (0x7 << 0)
-
-/* CONF_DPLL_FREQLOCK_SEL */
-#define OMAP4_MULT_CONF_DPLL_FREQLOCK_SEL_SHIFT 0
-#define OMAP4_MULT_CONF_DPLL_FREQLOCK_SEL_MASK (0x7 << 0)
-
-/* CONF_DPLL_TINITZ_SEL */
-#define OMAP4_MULT_CONF_DPLL_TINITZ_SEL_SHIFT 0
-#define OMAP4_MULT_CONF_DPLL_TINITZ_SEL_MASK (0x7 << 0)
-
-/* CONF_DPLL_PHASELOCK_SEL */
-#define OMAP4_MULT_CONF_DPLL_PHASELOCK_SEL_SHIFT 0
-#define OMAP4_MULT_CONF_DPLL_PHASELOCK_SEL_MASK (0x7 << 0)
-
-/* CONF_DEBUG_SEL_TST_0 */
-#define OMAP4_MODE_SHIFT 0
-#define OMAP4_MODE_MASK (0xf << 0)
-
-#endif
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
deleted file mode 100644
index c88420d..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
+++ /dev/null
@@ -1,1409 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_PAD_CORE registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson at ti.com)
- * Santosh Shilimkar (santosh.shilimkar at ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap at vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_CORE_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_CORE_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_PAD_CORE 0x4a100000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_PAD_CORE_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_PAD_CORE_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_PAD_CORE_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_0 0x01d8
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_1 0x01dc
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_2 0x01e0
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_3 0x01e4
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_4 0x01e8
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_5 0x01ec
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_6 0x01f0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PADCONF_GLOBAL 0x05a0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PADCONF_MODE 0x05a4
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART1IO_PADCONF_0 0x05a8
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART1IO_PADCONF_1 0x05ac
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_0 0x05b0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_1 0x05b4
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_0 0x05b8
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_1 0x05bc
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_2 0x05c0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USBB_HSIC 0x05c4
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SLIMBUS 0x05c8
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PBIASLITE 0x0600
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_0 0x0604
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_CAMERA_RX 0x0608
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_AVDAC 0x060c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HDMI_TX_PHY 0x0610
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC2 0x0614
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY 0x0618
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USB2PHYCORE 0x0620
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1 0x0624
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC1 0x0628
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HSI 0x062c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USB 0x0630
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HDQ 0x0634
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_0 0x0638
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_1 0x063c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_2 0x0640
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_3 0x0644
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_0 0x0648
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_1 0x064c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_2 0x0650
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_3 0x0654
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_BUS_HOLD 0x0658
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_C2C 0x065c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_RW 0x0660
-#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_R 0x0664
-#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_R_C0 0x0668
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_1 0x0700
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_2 0x0704
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_3 0x0708
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_4 0x070c
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* PADCONF_WAKEUPEVENT_0 */
-#define OMAP4_GPMC_CLK_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_GPMC_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_GPMC_NWP_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_GPMC_NWP_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_GPMC_NCS3_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_GPMC_NCS3_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_GPMC_NCS2_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_GPMC_NCS2_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_GPMC_NCS1_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_GPMC_NCS1_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_GPMC_NCS0_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_GPMC_NCS0_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_GPMC_A25_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_GPMC_A25_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_GPMC_A24_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_GPMC_A24_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_GPMC_A23_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_GPMC_A23_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_GPMC_A22_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_GPMC_A22_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_GPMC_A21_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_GPMC_A21_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_GPMC_A20_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_GPMC_A20_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_GPMC_A19_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_GPMC_A19_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_GPMC_A18_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_GPMC_A18_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_GPMC_A17_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_GPMC_A17_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_GPMC_A16_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_GPMC_A16_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_GPMC_AD15_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_GPMC_AD15_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_GPMC_AD14_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_GPMC_AD14_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_GPMC_AD13_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_GPMC_AD13_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_GPMC_AD12_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_GPMC_AD12_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_GPMC_AD11_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_GPMC_AD11_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_GPMC_AD10_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_GPMC_AD10_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_GPMC_AD9_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_GPMC_AD9_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_GPMC_AD8_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_GPMC_AD8_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_GPMC_AD7_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_GPMC_AD7_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_GPMC_AD6_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_GPMC_AD6_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_GPMC_AD5_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_GPMC_AD5_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_GPMC_AD4_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_GPMC_AD4_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_GPMC_AD3_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_GPMC_AD3_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_GPMC_AD2_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_GPMC_AD2_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_GPMC_AD1_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_GPMC_AD1_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_GPMC_AD0_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_GPMC_AD0_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_1 */
-#define OMAP4_CAM_STROBE_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_CAM_STROBE_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_CAM_SHUTTER_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_CAM_SHUTTER_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_CSI22_DY1_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_CSI22_DY1_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_CSI22_DX1_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_CSI22_DX1_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_CSI22_DY0_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_CSI22_DY0_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_CSI22_DX0_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_CSI22_DX0_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_CSI21_DY4_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_CSI21_DY4_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_CSI21_DX4_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_CSI21_DX4_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_CSI21_DY3_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_CSI21_DY3_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_CSI21_DX3_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_CSI21_DX3_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_CSI21_DY2_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_CSI21_DY2_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_CSI21_DX2_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_CSI21_DX2_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_CSI21_DY1_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_CSI21_DY1_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_CSI21_DX1_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_CSI21_DX1_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_CSI21_DY0_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_CSI21_DY0_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_CSI21_DX0_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_CSI21_DX0_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_HDMI_DDC_SDA_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_HDMI_DDC_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_HDMI_DDC_SCL_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_HDMI_DDC_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_HDMI_CEC_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_HDMI_CEC_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_HDMI_HPD_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_HDMI_HPD_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_C2C_DATA15_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_C2C_DATA15_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_C2C_DATA14_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_C2C_DATA14_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_C2C_DATA13_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_C2C_DATA13_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_C2C_DATA12_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_C2C_DATA12_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_C2C_DATA11_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_C2C_DATA11_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_GPMC_WAIT1_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_GPMC_WAIT1_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_GPMC_WAIT0_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_GPMC_WAIT0_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_GPMC_NBE1_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_GPMC_NBE1_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_GPMC_NBE0_CLE_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_GPMC_NBE0_CLE_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_GPMC_NWE_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_GPMC_NWE_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_GPMC_NOE_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_GPMC_NOE_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_GPMC_NADV_ALE_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_GPMC_NADV_ALE_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_2 */
-#define OMAP4_ABE_MCBSP1_CLKX_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_ABE_MCBSP1_CLKX_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_ABE_MCBSP2_FSX_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_ABE_MCBSP2_FSX_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_ABE_MCBSP2_DX_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_ABE_MCBSP2_DX_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_ABE_MCBSP2_DR_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_ABE_MCBSP2_DR_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_ABE_MCBSP2_CLKX_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_ABE_MCBSP2_CLKX_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_SDMMC1_DAT7_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_SDMMC1_DAT7_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_SDMMC1_DAT6_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_SDMMC1_DAT6_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_SDMMC1_DAT5_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_SDMMC1_DAT5_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_SDMMC1_DAT4_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_SDMMC1_DAT4_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_SDMMC1_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_SDMMC1_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_SDMMC1_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_SDMMC1_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_SDMMC1_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_SDMMC1_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_SDMMC1_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_SDMMC1_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_SDMMC1_CMD_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_SDMMC1_CMD_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_SDMMC1_CLK_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_SDMMC1_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_USBC1_ICUSB_DM_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_USBC1_ICUSB_DM_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_USBC1_ICUSB_DP_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_USBC1_ICUSB_DP_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_USBB1_HSIC_STROBE_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_USBB1_HSIC_STROBE_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_USBB1_HSIC_DATA_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_USBB1_HSIC_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_USBB1_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_USBB1_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_USBB1_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_USBB1_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_USBB1_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_USBB1_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_USBB1_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_USBB1_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_USBB1_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_USBB1_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_USBB1_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_USBB1_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_USBB1_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_USBB1_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_USBB1_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_USBB1_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_USBB1_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_USBB1_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_USBB1_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_USBB1_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_USBB1_ULPITLL_STP_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_USBB1_ULPITLL_STP_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_USBB1_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_USBB1_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_CAM_GLOBALRESET_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_CAM_GLOBALRESET_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_3 */
-#define OMAP4_MCSPI1_CS3_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_MCSPI1_CS3_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_MCSPI1_CS2_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_MCSPI1_CS2_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_MCSPI1_CS1_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_MCSPI1_CS1_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_MCSPI1_CS0_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_MCSPI1_CS0_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_MCSPI1_SIMO_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_MCSPI1_SIMO_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_MCSPI1_SOMI_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_MCSPI1_SOMI_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_MCSPI1_CLK_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_MCSPI1_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_I2C4_SDA_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_I2C4_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_I2C4_SCL_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_I2C4_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_I2C3_SDA_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_I2C3_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_I2C3_SCL_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_I2C3_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_I2C2_SDA_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_I2C2_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_I2C2_SCL_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_I2C2_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_I2C1_SDA_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_I2C1_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_I2C1_SCL_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_I2C1_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_HDQ_SIO_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_HDQ_SIO_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_UART2_TX_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_UART2_TX_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_UART2_RX_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_UART2_RX_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_UART2_RTS_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_UART2_RTS_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_UART2_CTS_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_UART2_CTS_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_ABE_DMIC_DIN3_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_ABE_DMIC_DIN3_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_ABE_DMIC_DIN2_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_ABE_DMIC_DIN2_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_ABE_DMIC_DIN1_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_ABE_DMIC_DIN1_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_ABE_DMIC_CLK1_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_ABE_DMIC_CLK1_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_ABE_CLKS_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_ABE_CLKS_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_ABE_PDM_LB_CLK_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_ABE_PDM_LB_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_ABE_PDM_FRAME_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_ABE_PDM_FRAME_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_ABE_PDM_DL_DATA_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_ABE_PDM_DL_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_ABE_PDM_UL_DATA_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_ABE_PDM_UL_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_ABE_MCBSP1_FSX_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_ABE_MCBSP1_FSX_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_ABE_MCBSP1_DX_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_ABE_MCBSP1_DX_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_ABE_MCBSP1_DR_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_ABE_MCBSP1_DR_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_4 */
-#define OMAP4_UNIPRO_TY0_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_UNIPRO_TY0_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_UNIPRO_TX0_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_UNIPRO_TX0_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_USBB2_HSIC_STROBE_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_USBB2_HSIC_STROBE_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_USBB2_HSIC_DATA_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_USBB2_HSIC_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_USBB2_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_USBB2_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_USBB2_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_USBB2_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_USBB2_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_USBB2_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_USBB2_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_USBB2_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_USBB2_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_USBB2_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_USBB2_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_USBB2_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_USBB2_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_USBB2_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_USBB2_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_USBB2_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_USBB2_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_USBB2_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_USBB2_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_USBB2_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_USBB2_ULPITLL_STP_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_USBB2_ULPITLL_STP_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_USBB2_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_USBB2_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_UART4_TX_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_UART4_TX_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_UART4_RX_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_UART4_RX_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_MCSPI4_CS0_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_MCSPI4_CS0_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_MCSPI4_SOMI_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_MCSPI4_SOMI_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_MCSPI4_SIMO_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_MCSPI4_SIMO_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_MCSPI4_CLK_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_MCSPI4_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_SDMMC5_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_SDMMC5_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_SDMMC5_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_SDMMC5_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_SDMMC5_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_SDMMC5_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_SDMMC5_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_SDMMC5_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_SDMMC5_CMD_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_SDMMC5_CMD_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_SDMMC5_CLK_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_SDMMC5_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_UART3_TX_IRTX_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_UART3_TX_IRTX_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_UART3_RX_IRRX_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_UART3_RX_IRRX_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_UART3_RTS_SD_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_UART3_RTS_SD_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_UART3_CTS_RCTX_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_UART3_CTS_RCTX_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_5 */
-#define OMAP4_DPM_EMU11_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_DPM_EMU11_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_DPM_EMU10_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_DPM_EMU10_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_DPM_EMU9_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_DPM_EMU9_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_DPM_EMU8_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_DPM_EMU8_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_DPM_EMU7_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_DPM_EMU7_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_DPM_EMU6_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_DPM_EMU6_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_DPM_EMU5_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_DPM_EMU5_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_DPM_EMU4_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_DPM_EMU4_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_DPM_EMU3_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_DPM_EMU3_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_DPM_EMU2_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_DPM_EMU2_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_DPM_EMU1_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_DPM_EMU1_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_DPM_EMU0_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_DPM_EMU0_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_SYS_BOOT5_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_SYS_BOOT5_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_SYS_BOOT4_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_SYS_BOOT4_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_SYS_BOOT3_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_SYS_BOOT3_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_SYS_BOOT2_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_SYS_BOOT2_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_SYS_BOOT1_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_SYS_BOOT1_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_SYS_BOOT0_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_SYS_BOOT0_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_SYS_NIRQ2_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_SYS_NIRQ2_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_SYS_NIRQ1_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_SYS_NIRQ1_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_FREF_CLK2_OUT_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_FREF_CLK2_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_FREF_CLK1_OUT_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_FREF_CLK1_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_UNIPRO_RY2_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_UNIPRO_RY2_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_UNIPRO_RX2_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_UNIPRO_RX2_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_UNIPRO_RY1_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_UNIPRO_RY1_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_UNIPRO_RX1_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_UNIPRO_RX1_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_UNIPRO_RY0_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_UNIPRO_RY0_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_UNIPRO_RX0_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_UNIPRO_RX0_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_UNIPRO_TY2_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_UNIPRO_TY2_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_UNIPRO_TX2_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_UNIPRO_TX2_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_UNIPRO_TY1_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_UNIPRO_TY1_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_UNIPRO_TX1_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_UNIPRO_TX1_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_6 */
-#define OMAP4_DPM_EMU19_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_DPM_EMU19_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_DPM_EMU18_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_DPM_EMU18_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_DPM_EMU17_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_DPM_EMU17_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_DPM_EMU16_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_DPM_EMU16_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_DPM_EMU15_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_DPM_EMU15_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_DPM_EMU14_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_DPM_EMU14_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_DPM_EMU13_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_DPM_EMU13_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_DPM_EMU12_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_DPM_EMU12_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* CONTROL_PADCONF_GLOBAL */
-#define OMAP4_FORCE_OFFMODE_EN_SHIFT 31
-#define OMAP4_FORCE_OFFMODE_EN_MASK (1 << 31)
-
-/* CONTROL_PADCONF_MODE */
-#define OMAP4_VDDS_DV_BANK0_SHIFT 31
-#define OMAP4_VDDS_DV_BANK0_MASK (1 << 31)
-#define OMAP4_VDDS_DV_BANK1_SHIFT 30
-#define OMAP4_VDDS_DV_BANK1_MASK (1 << 30)
-#define OMAP4_VDDS_DV_BANK3_SHIFT 29
-#define OMAP4_VDDS_DV_BANK3_MASK (1 << 29)
-#define OMAP4_VDDS_DV_BANK4_SHIFT 28
-#define OMAP4_VDDS_DV_BANK4_MASK (1 << 28)
-#define OMAP4_VDDS_DV_BANK5_SHIFT 27
-#define OMAP4_VDDS_DV_BANK5_MASK (1 << 27)
-#define OMAP4_VDDS_DV_BANK6_SHIFT 26
-#define OMAP4_VDDS_DV_BANK6_MASK (1 << 26)
-#define OMAP4_VDDS_DV_C2C_SHIFT 25
-#define OMAP4_VDDS_DV_C2C_MASK (1 << 25)
-#define OMAP4_VDDS_DV_CAM_SHIFT 24
-#define OMAP4_VDDS_DV_CAM_MASK (1 << 24)
-#define OMAP4_VDDS_DV_GPMC_SHIFT 23
-#define OMAP4_VDDS_DV_GPMC_MASK (1 << 23)
-#define OMAP4_VDDS_DV_SDMMC2_SHIFT 22
-#define OMAP4_VDDS_DV_SDMMC2_MASK (1 << 22)
-
-/* CONTROL_SMART1IO_PADCONF_0 */
-#define OMAP4_ABE_DR0_SC_SHIFT 30
-#define OMAP4_ABE_DR0_SC_MASK (0x3 << 30)
-#define OMAP4_CAM_DR0_SC_SHIFT 28
-#define OMAP4_CAM_DR0_SC_MASK (0x3 << 28)
-#define OMAP4_FREF_DR2_SC_SHIFT 26
-#define OMAP4_FREF_DR2_SC_MASK (0x3 << 26)
-#define OMAP4_FREF_DR3_SC_SHIFT 24
-#define OMAP4_FREF_DR3_SC_MASK (0x3 << 24)
-#define OMAP4_GPIO_DR8_SC_SHIFT 22
-#define OMAP4_GPIO_DR8_SC_MASK (0x3 << 22)
-#define OMAP4_GPIO_DR9_SC_SHIFT 20
-#define OMAP4_GPIO_DR9_SC_MASK (0x3 << 20)
-#define OMAP4_GPMC_DR2_SC_SHIFT 18
-#define OMAP4_GPMC_DR2_SC_MASK (0x3 << 18)
-#define OMAP4_GPMC_DR3_SC_SHIFT 16
-#define OMAP4_GPMC_DR3_SC_MASK (0x3 << 16)
-#define OMAP4_GPMC_DR6_SC_SHIFT 14
-#define OMAP4_GPMC_DR6_SC_MASK (0x3 << 14)
-#define OMAP4_HDMI_DR0_SC_SHIFT 12
-#define OMAP4_HDMI_DR0_SC_MASK (0x3 << 12)
-#define OMAP4_MCSPI1_DR0_SC_SHIFT 10
-#define OMAP4_MCSPI1_DR0_SC_MASK (0x3 << 10)
-#define OMAP4_UART1_DR0_SC_SHIFT 8
-#define OMAP4_UART1_DR0_SC_MASK (0x3 << 8)
-#define OMAP4_UART3_DR0_SC_SHIFT 6
-#define OMAP4_UART3_DR0_SC_MASK (0x3 << 6)
-#define OMAP4_UART3_DR1_SC_SHIFT 4
-#define OMAP4_UART3_DR1_SC_MASK (0x3 << 4)
-#define OMAP4_UNIPRO_DR0_SC_SHIFT 2
-#define OMAP4_UNIPRO_DR0_SC_MASK (0x3 << 2)
-#define OMAP4_UNIPRO_DR1_SC_SHIFT 0
-#define OMAP4_UNIPRO_DR1_SC_MASK (0x3 << 0)
-
-/* CONTROL_SMART1IO_PADCONF_1 */
-#define OMAP4_ABE_DR0_LB_SHIFT 30
-#define OMAP4_ABE_DR0_LB_MASK (0x3 << 30)
-#define OMAP4_CAM_DR0_LB_SHIFT 28
-#define OMAP4_CAM_DR0_LB_MASK (0x3 << 28)
-#define OMAP4_FREF_DR2_LB_SHIFT 26
-#define OMAP4_FREF_DR2_LB_MASK (0x3 << 26)
-#define OMAP4_FREF_DR3_LB_SHIFT 24
-#define OMAP4_FREF_DR3_LB_MASK (0x3 << 24)
-#define OMAP4_GPIO_DR8_LB_SHIFT 22
-#define OMAP4_GPIO_DR8_LB_MASK (0x3 << 22)
-#define OMAP4_GPIO_DR9_LB_SHIFT 20
-#define OMAP4_GPIO_DR9_LB_MASK (0x3 << 20)
-#define OMAP4_GPMC_DR2_LB_SHIFT 18
-#define OMAP4_GPMC_DR2_LB_MASK (0x3 << 18)
-#define OMAP4_GPMC_DR3_LB_SHIFT 16
-#define OMAP4_GPMC_DR3_LB_MASK (0x3 << 16)
-#define OMAP4_GPMC_DR6_LB_SHIFT 14
-#define OMAP4_GPMC_DR6_LB_MASK (0x3 << 14)
-#define OMAP4_HDMI_DR0_LB_SHIFT 12
-#define OMAP4_HDMI_DR0_LB_MASK (0x3 << 12)
-#define OMAP4_MCSPI1_DR0_LB_SHIFT 10
-#define OMAP4_MCSPI1_DR0_LB_MASK (0x3 << 10)
-#define OMAP4_UART1_DR0_LB_SHIFT 8
-#define OMAP4_UART1_DR0_LB_MASK (0x3 << 8)
-#define OMAP4_UART3_DR0_LB_SHIFT 6
-#define OMAP4_UART3_DR0_LB_MASK (0x3 << 6)
-#define OMAP4_UART3_DR1_LB_SHIFT 4
-#define OMAP4_UART3_DR1_LB_MASK (0x3 << 4)
-#define OMAP4_UNIPRO_DR0_LB_SHIFT 2
-#define OMAP4_UNIPRO_DR0_LB_MASK (0x3 << 2)
-#define OMAP4_UNIPRO_DR1_LB_SHIFT 0
-#define OMAP4_UNIPRO_DR1_LB_MASK (0x3 << 0)
-
-/* CONTROL_SMART2IO_PADCONF_0 */
-#define OMAP4_C2C_DR0_LB_SHIFT 31
-#define OMAP4_C2C_DR0_LB_MASK (1 << 31)
-#define OMAP4_DPM_DR1_LB_SHIFT 30
-#define OMAP4_DPM_DR1_LB_MASK (1 << 30)
-#define OMAP4_DPM_DR2_LB_SHIFT 29
-#define OMAP4_DPM_DR2_LB_MASK (1 << 29)
-#define OMAP4_DPM_DR3_LB_SHIFT 28
-#define OMAP4_DPM_DR3_LB_MASK (1 << 28)
-#define OMAP4_GPIO_DR0_LB_SHIFT 27
-#define OMAP4_GPIO_DR0_LB_MASK (1 << 27)
-#define OMAP4_GPIO_DR1_LB_SHIFT 26
-#define OMAP4_GPIO_DR1_LB_MASK (1 << 26)
-#define OMAP4_GPIO_DR10_LB_SHIFT 25
-#define OMAP4_GPIO_DR10_LB_MASK (1 << 25)
-#define OMAP4_GPIO_DR2_LB_SHIFT 24
-#define OMAP4_GPIO_DR2_LB_MASK (1 << 24)
-#define OMAP4_GPMC_DR0_LB_SHIFT 23
-#define OMAP4_GPMC_DR0_LB_MASK (1 << 23)
-#define OMAP4_GPMC_DR1_LB_SHIFT 22
-#define OMAP4_GPMC_DR1_LB_MASK (1 << 22)
-#define OMAP4_GPMC_DR4_LB_SHIFT 21
-#define OMAP4_GPMC_DR4_LB_MASK (1 << 21)
-#define OMAP4_GPMC_DR5_LB_SHIFT 20
-#define OMAP4_GPMC_DR5_LB_MASK (1 << 20)
-#define OMAP4_GPMC_DR7_LB_SHIFT 19
-#define OMAP4_GPMC_DR7_LB_MASK (1 << 19)
-#define OMAP4_HSI2_DR0_LB_SHIFT 18
-#define OMAP4_HSI2_DR0_LB_MASK (1 << 18)
-#define OMAP4_HSI2_DR1_LB_SHIFT 17
-#define OMAP4_HSI2_DR1_LB_MASK (1 << 17)
-#define OMAP4_HSI2_DR2_LB_SHIFT 16
-#define OMAP4_HSI2_DR2_LB_MASK (1 << 16)
-#define OMAP4_KPD_DR0_LB_SHIFT 15
-#define OMAP4_KPD_DR0_LB_MASK (1 << 15)
-#define OMAP4_KPD_DR1_LB_SHIFT 14
-#define OMAP4_KPD_DR1_LB_MASK (1 << 14)
-#define OMAP4_PDM_DR0_LB_SHIFT 13
-#define OMAP4_PDM_DR0_LB_MASK (1 << 13)
-#define OMAP4_SDMMC2_DR0_LB_SHIFT 12
-#define OMAP4_SDMMC2_DR0_LB_MASK (1 << 12)
-#define OMAP4_SDMMC3_DR0_LB_SHIFT 11
-#define OMAP4_SDMMC3_DR0_LB_MASK (1 << 11)
-#define OMAP4_SDMMC4_DR0_LB_SHIFT 10
-#define OMAP4_SDMMC4_DR0_LB_MASK (1 << 10)
-#define OMAP4_SDMMC4_DR1_LB_SHIFT 9
-#define OMAP4_SDMMC4_DR1_LB_MASK (1 << 9)
-#define OMAP4_SPI3_DR0_LB_SHIFT 8
-#define OMAP4_SPI3_DR0_LB_MASK (1 << 8)
-#define OMAP4_SPI3_DR1_LB_SHIFT 7
-#define OMAP4_SPI3_DR1_LB_MASK (1 << 7)
-#define OMAP4_UART3_DR2_LB_SHIFT 6
-#define OMAP4_UART3_DR2_LB_MASK (1 << 6)
-#define OMAP4_UART3_DR3_LB_SHIFT 5
-#define OMAP4_UART3_DR3_LB_MASK (1 << 5)
-#define OMAP4_UART3_DR4_LB_SHIFT 4
-#define OMAP4_UART3_DR4_LB_MASK (1 << 4)
-#define OMAP4_UART3_DR5_LB_SHIFT 3
-#define OMAP4_UART3_DR5_LB_MASK (1 << 3)
-#define OMAP4_USBA0_DR1_LB_SHIFT 2
-#define OMAP4_USBA0_DR1_LB_MASK (1 << 2)
-#define OMAP4_USBA_DR2_LB_SHIFT 1
-#define OMAP4_USBA_DR2_LB_MASK (1 << 1)
-
-/* CONTROL_SMART2IO_PADCONF_1 */
-#define OMAP4_USBB1_DR0_LB_SHIFT 31
-#define OMAP4_USBB1_DR0_LB_MASK (1 << 31)
-#define OMAP4_USBB2_DR0_LB_SHIFT 30
-#define OMAP4_USBB2_DR0_LB_MASK (1 << 30)
-#define OMAP4_USBA0_DR0_LB_SHIFT 29
-#define OMAP4_USBA0_DR0_LB_MASK (1 << 29)
-
-/* CONTROL_SMART3IO_PADCONF_0 */
-#define OMAP4_DMIC_DR0_MB_SHIFT 30
-#define OMAP4_DMIC_DR0_MB_MASK (0x3 << 30)
-#define OMAP4_GPIO_DR3_MB_SHIFT 28
-#define OMAP4_GPIO_DR3_MB_MASK (0x3 << 28)
-#define OMAP4_GPIO_DR4_MB_SHIFT 26
-#define OMAP4_GPIO_DR4_MB_MASK (0x3 << 26)
-#define OMAP4_GPIO_DR5_MB_SHIFT 24
-#define OMAP4_GPIO_DR5_MB_MASK (0x3 << 24)
-#define OMAP4_GPIO_DR6_MB_SHIFT 22
-#define OMAP4_GPIO_DR6_MB_MASK (0x3 << 22)
-#define OMAP4_HSI_DR1_MB_SHIFT 20
-#define OMAP4_HSI_DR1_MB_MASK (0x3 << 20)
-#define OMAP4_HSI_DR2_MB_SHIFT 18
-#define OMAP4_HSI_DR2_MB_MASK (0x3 << 18)
-#define OMAP4_HSI_DR3_MB_SHIFT 16
-#define OMAP4_HSI_DR3_MB_MASK (0x3 << 16)
-#define OMAP4_MCBSP2_DR0_MB_SHIFT 14
-#define OMAP4_MCBSP2_DR0_MB_MASK (0x3 << 14)
-#define OMAP4_MCSPI4_DR0_MB_SHIFT 12
-#define OMAP4_MCSPI4_DR0_MB_MASK (0x3 << 12)
-#define OMAP4_MCSPI4_DR1_MB_SHIFT 10
-#define OMAP4_MCSPI4_DR1_MB_MASK (0x3 << 10)
-#define OMAP4_SDMMC3_DR0_MB_SHIFT 8
-#define OMAP4_SDMMC3_DR0_MB_MASK (0x3 << 8)
-#define OMAP4_SPI2_DR0_MB_SHIFT 0
-#define OMAP4_SPI2_DR0_MB_MASK (0x3 << 0)
-
-/* CONTROL_SMART3IO_PADCONF_1 */
-#define OMAP4_SPI2_DR1_MB_SHIFT 30
-#define OMAP4_SPI2_DR1_MB_MASK (0x3 << 30)
-#define OMAP4_SPI2_DR2_MB_SHIFT 28
-#define OMAP4_SPI2_DR2_MB_MASK (0x3 << 28)
-#define OMAP4_UART2_DR0_MB_SHIFT 26
-#define OMAP4_UART2_DR0_MB_MASK (0x3 << 26)
-#define OMAP4_UART2_DR1_MB_SHIFT 24
-#define OMAP4_UART2_DR1_MB_MASK (0x3 << 24)
-#define OMAP4_UART4_DR0_MB_SHIFT 22
-#define OMAP4_UART4_DR0_MB_MASK (0x3 << 22)
-#define OMAP4_HSI_DR0_MB_SHIFT 20
-#define OMAP4_HSI_DR0_MB_MASK (0x3 << 20)
-
-/* CONTROL_SMART3IO_PADCONF_2 */
-#define OMAP4_DMIC_DR0_LB_SHIFT 31
-#define OMAP4_DMIC_DR0_LB_MASK (1 << 31)
-#define OMAP4_GPIO_DR3_LB_SHIFT 30
-#define OMAP4_GPIO_DR3_LB_MASK (1 << 30)
-#define OMAP4_GPIO_DR4_LB_SHIFT 29
-#define OMAP4_GPIO_DR4_LB_MASK (1 << 29)
-#define OMAP4_GPIO_DR5_LB_SHIFT 28
-#define OMAP4_GPIO_DR5_LB_MASK (1 << 28)
-#define OMAP4_GPIO_DR6_LB_SHIFT 27
-#define OMAP4_GPIO_DR6_LB_MASK (1 << 27)
-#define OMAP4_HSI_DR1_LB_SHIFT 26
-#define OMAP4_HSI_DR1_LB_MASK (1 << 26)
-#define OMAP4_HSI_DR2_LB_SHIFT 25
-#define OMAP4_HSI_DR2_LB_MASK (1 << 25)
-#define OMAP4_HSI_DR3_LB_SHIFT 24
-#define OMAP4_HSI_DR3_LB_MASK (1 << 24)
-#define OMAP4_MCBSP2_DR0_LB_SHIFT 23
-#define OMAP4_MCBSP2_DR0_LB_MASK (1 << 23)
-#define OMAP4_MCSPI4_DR0_LB_SHIFT 22
-#define OMAP4_MCSPI4_DR0_LB_MASK (1 << 22)
-#define OMAP4_MCSPI4_DR1_LB_SHIFT 21
-#define OMAP4_MCSPI4_DR1_LB_MASK (1 << 21)
-#define OMAP4_SLIMBUS2_DR0_LB_SHIFT 18
-#define OMAP4_SLIMBUS2_DR0_LB_MASK (1 << 18)
-#define OMAP4_SPI2_DR0_LB_SHIFT 16
-#define OMAP4_SPI2_DR0_LB_MASK (1 << 16)
-#define OMAP4_SPI2_DR1_LB_SHIFT 15
-#define OMAP4_SPI2_DR1_LB_MASK (1 << 15)
-#define OMAP4_SPI2_DR2_LB_SHIFT 14
-#define OMAP4_SPI2_DR2_LB_MASK (1 << 14)
-#define OMAP4_UART2_DR0_LB_SHIFT 13
-#define OMAP4_UART2_DR0_LB_MASK (1 << 13)
-#define OMAP4_UART2_DR1_LB_SHIFT 12
-#define OMAP4_UART2_DR1_LB_MASK (1 << 12)
-#define OMAP4_UART4_DR0_LB_SHIFT 11
-#define OMAP4_UART4_DR0_LB_MASK (1 << 11)
-#define OMAP4_HSI_DR0_LB_SHIFT 10
-#define OMAP4_HSI_DR0_LB_MASK (1 << 10)
-
-/* CONTROL_USBB_HSIC */
-#define OMAP4_USBB2_DR1_SR_SHIFT 30
-#define OMAP4_USBB2_DR1_SR_MASK (0x3 << 30)
-#define OMAP4_USBB2_DR1_I_SHIFT 27
-#define OMAP4_USBB2_DR1_I_MASK (0x7 << 27)
-#define OMAP4_USBB1_DR1_SR_SHIFT 25
-#define OMAP4_USBB1_DR1_SR_MASK (0x3 << 25)
-#define OMAP4_USBB1_DR1_I_SHIFT 22
-#define OMAP4_USBB1_DR1_I_MASK (0x7 << 22)
-#define OMAP4_USBB1_HSIC_DATA_WD_SHIFT 20
-#define OMAP4_USBB1_HSIC_DATA_WD_MASK (0x3 << 20)
-#define OMAP4_USBB1_HSIC_STROBE_WD_SHIFT 18
-#define OMAP4_USBB1_HSIC_STROBE_WD_MASK (0x3 << 18)
-#define OMAP4_USBB2_HSIC_DATA_WD_SHIFT 16
-#define OMAP4_USBB2_HSIC_DATA_WD_MASK (0x3 << 16)
-#define OMAP4_USBB2_HSIC_STROBE_WD_SHIFT 14
-#define OMAP4_USBB2_HSIC_STROBE_WD_MASK (0x3 << 14)
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_ENABLE_SHIFT 13
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_ENABLE_MASK (1 << 13)
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_SHIFT 11
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_MASK (0x3 << 11)
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_ENABLE_SHIFT 10
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_ENABLE_MASK (1 << 10)
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_SHIFT 8
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_MASK (0x3 << 8)
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_ENABLE_SHIFT 7
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_ENABLE_MASK (1 << 7)
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_SHIFT 5
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_MASK (0x3 << 5)
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_ENABLE_SHIFT 4
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_ENABLE_MASK (1 << 4)
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_SHIFT 2
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_MASK (0x3 << 2)
-
-/* CONTROL_SLIMBUS */
-#define OMAP4_SLIMBUS1_DR0_MB_SHIFT 30
-#define OMAP4_SLIMBUS1_DR0_MB_MASK (0x3 << 30)
-#define OMAP4_SLIMBUS1_DR1_MB_SHIFT 28
-#define OMAP4_SLIMBUS1_DR1_MB_MASK (0x3 << 28)
-#define OMAP4_SLIMBUS2_DR0_MB_SHIFT 26
-#define OMAP4_SLIMBUS2_DR0_MB_MASK (0x3 << 26)
-#define OMAP4_SLIMBUS2_DR1_MB_SHIFT 24
-#define OMAP4_SLIMBUS2_DR1_MB_MASK (0x3 << 24)
-#define OMAP4_SLIMBUS2_DR2_MB_SHIFT 22
-#define OMAP4_SLIMBUS2_DR2_MB_MASK (0x3 << 22)
-#define OMAP4_SLIMBUS2_DR3_MB_SHIFT 20
-#define OMAP4_SLIMBUS2_DR3_MB_MASK (0x3 << 20)
-#define OMAP4_SLIMBUS1_DR0_LB_SHIFT 19
-#define OMAP4_SLIMBUS1_DR0_LB_MASK (1 << 19)
-#define OMAP4_SLIMBUS2_DR1_LB_SHIFT 18
-#define OMAP4_SLIMBUS2_DR1_LB_MASK (1 << 18)
-
-/* CONTROL_PBIASLITE */
-#define OMAP4_USIM_PBIASLITE_HIZ_MODE_SHIFT 31
-#define OMAP4_USIM_PBIASLITE_HIZ_MODE_MASK (1 << 31)
-#define OMAP4_USIM_PBIASLITE_SUPPLY_HI_OUT_SHIFT 30
-#define OMAP4_USIM_PBIASLITE_SUPPLY_HI_OUT_MASK (1 << 30)
-#define OMAP4_USIM_PBIASLITE_VMODE_ERROR_SHIFT 29
-#define OMAP4_USIM_PBIASLITE_VMODE_ERROR_MASK (1 << 29)
-#define OMAP4_USIM_PBIASLITE_PWRDNZ_SHIFT 28
-#define OMAP4_USIM_PBIASLITE_PWRDNZ_MASK (1 << 28)
-#define OMAP4_USIM_PBIASLITE_VMODE_SHIFT 27
-#define OMAP4_USIM_PBIASLITE_VMODE_MASK (1 << 27)
-#define OMAP4_MMC1_PWRDNZ_SHIFT 26
-#define OMAP4_MMC1_PWRDNZ_MASK (1 << 26)
-#define OMAP4_MMC1_PBIASLITE_HIZ_MODE_SHIFT 25
-#define OMAP4_MMC1_PBIASLITE_HIZ_MODE_MASK (1 << 25)
-#define OMAP4_MMC1_PBIASLITE_SUPPLY_HI_OUT_SHIFT 24
-#define OMAP4_MMC1_PBIASLITE_SUPPLY_HI_OUT_MASK (1 << 24)
-#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_SHIFT 23
-#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK (1 << 23)
-#define OMAP4_MMC1_PBIASLITE_PWRDNZ_SHIFT 22
-#define OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK (1 << 22)
-#define OMAP4_MMC1_PBIASLITE_VMODE_SHIFT 21
-#define OMAP4_MMC1_PBIASLITE_VMODE_MASK (1 << 21)
-#define OMAP4_USBC1_ICUSB_PWRDNZ_SHIFT 20
-#define OMAP4_USBC1_ICUSB_PWRDNZ_MASK (1 << 20)
-
-/* CONTROL_I2C_0 */
-#define OMAP4_I2C4_SDA_GLFENB_SHIFT 31
-#define OMAP4_I2C4_SDA_GLFENB_MASK (1 << 31)
-#define OMAP4_I2C4_SDA_LOAD_BITS_SHIFT 29
-#define OMAP4_I2C4_SDA_LOAD_BITS_MASK (0x3 << 29)
-#define OMAP4_I2C4_SDA_PULLUPRESX_SHIFT 28
-#define OMAP4_I2C4_SDA_PULLUPRESX_MASK (1 << 28)
-#define OMAP4_I2C3_SDA_GLFENB_SHIFT 27
-#define OMAP4_I2C3_SDA_GLFENB_MASK (1 << 27)
-#define OMAP4_I2C3_SDA_LOAD_BITS_SHIFT 25
-#define OMAP4_I2C3_SDA_LOAD_BITS_MASK (0x3 << 25)
-#define OMAP4_I2C3_SDA_PULLUPRESX_SHIFT 24
-#define OMAP4_I2C3_SDA_PULLUPRESX_MASK (1 << 24)
-#define OMAP4_I2C2_SDA_GLFENB_SHIFT 23
-#define OMAP4_I2C2_SDA_GLFENB_MASK (1 << 23)
-#define OMAP4_I2C2_SDA_LOAD_BITS_SHIFT 21
-#define OMAP4_I2C2_SDA_LOAD_BITS_MASK (0x3 << 21)
-#define OMAP4_I2C2_SDA_PULLUPRESX_SHIFT 20
-#define OMAP4_I2C2_SDA_PULLUPRESX_MASK (1 << 20)
-#define OMAP4_I2C1_SDA_GLFENB_SHIFT 19
-#define OMAP4_I2C1_SDA_GLFENB_MASK (1 << 19)
-#define OMAP4_I2C1_SDA_LOAD_BITS_SHIFT 17
-#define OMAP4_I2C1_SDA_LOAD_BITS_MASK (0x3 << 17)
-#define OMAP4_I2C1_SDA_PULLUPRESX_SHIFT 16
-#define OMAP4_I2C1_SDA_PULLUPRESX_MASK (1 << 16)
-#define OMAP4_I2C4_SCL_GLFENB_SHIFT 15
-#define OMAP4_I2C4_SCL_GLFENB_MASK (1 << 15)
-#define OMAP4_I2C4_SCL_LOAD_BITS_SHIFT 13
-#define OMAP4_I2C4_SCL_LOAD_BITS_MASK (0x3 << 13)
-#define OMAP4_I2C4_SCL_PULLUPRESX_SHIFT 12
-#define OMAP4_I2C4_SCL_PULLUPRESX_MASK (1 << 12)
-#define OMAP4_I2C3_SCL_GLFENB_SHIFT 11
-#define OMAP4_I2C3_SCL_GLFENB_MASK (1 << 11)
-#define OMAP4_I2C3_SCL_LOAD_BITS_SHIFT 9
-#define OMAP4_I2C3_SCL_LOAD_BITS_MASK (0x3 << 9)
-#define OMAP4_I2C3_SCL_PULLUPRESX_SHIFT 8
-#define OMAP4_I2C3_SCL_PULLUPRESX_MASK (1 << 8)
-#define OMAP4_I2C2_SCL_GLFENB_SHIFT 7
-#define OMAP4_I2C2_SCL_GLFENB_MASK (1 << 7)
-#define OMAP4_I2C2_SCL_LOAD_BITS_SHIFT 5
-#define OMAP4_I2C2_SCL_LOAD_BITS_MASK (0x3 << 5)
-#define OMAP4_I2C2_SCL_PULLUPRESX_SHIFT 4
-#define OMAP4_I2C2_SCL_PULLUPRESX_MASK (1 << 4)
-#define OMAP4_I2C1_SCL_GLFENB_SHIFT 3
-#define OMAP4_I2C1_SCL_GLFENB_MASK (1 << 3)
-#define OMAP4_I2C1_SCL_LOAD_BITS_SHIFT 1
-#define OMAP4_I2C1_SCL_LOAD_BITS_MASK (0x3 << 1)
-#define OMAP4_I2C1_SCL_PULLUPRESX_SHIFT 0
-#define OMAP4_I2C1_SCL_PULLUPRESX_MASK (1 << 0)
-
-/* CONTROL_CAMERA_RX */
-#define OMAP4_CAMERARX_UNIPRO_CTRLCLKEN_SHIFT 31
-#define OMAP4_CAMERARX_UNIPRO_CTRLCLKEN_MASK (1 << 31)
-#define OMAP4_CAMERARX_CSI22_LANEENABLE_SHIFT 29
-#define OMAP4_CAMERARX_CSI22_LANEENABLE_MASK (0x3 << 29)
-#define OMAP4_CAMERARX_CSI21_LANEENABLE_SHIFT 24
-#define OMAP4_CAMERARX_CSI21_LANEENABLE_MASK (0x1f << 24)
-#define OMAP4_CAMERARX_UNIPRO_CAMMODE_SHIFT 22
-#define OMAP4_CAMERARX_UNIPRO_CAMMODE_MASK (0x3 << 22)
-#define OMAP4_CAMERARX_CSI22_CTRLCLKEN_SHIFT 21
-#define OMAP4_CAMERARX_CSI22_CTRLCLKEN_MASK (1 << 21)
-#define OMAP4_CAMERARX_CSI22_CAMMODE_SHIFT 19
-#define OMAP4_CAMERARX_CSI22_CAMMODE_MASK (0x3 << 19)
-#define OMAP4_CAMERARX_CSI21_CTRLCLKEN_SHIFT 18
-#define OMAP4_CAMERARX_CSI21_CTRLCLKEN_MASK (1 << 18)
-#define OMAP4_CAMERARX_CSI21_CAMMODE_SHIFT 16
-#define OMAP4_CAMERARX_CSI21_CAMMODE_MASK (0x3 << 16)
-
-/* CONTROL_AVDAC */
-#define OMAP4_AVDAC_ACEN_SHIFT 31
-#define OMAP4_AVDAC_ACEN_MASK (1 << 31)
-#define OMAP4_AVDAC_TVOUTBYPASS_SHIFT 30
-#define OMAP4_AVDAC_TVOUTBYPASS_MASK (1 << 30)
-#define OMAP4_AVDAC_INPUTINV_SHIFT 29
-#define OMAP4_AVDAC_INPUTINV_MASK (1 << 29)
-#define OMAP4_AVDAC_CTL_SHIFT 13
-#define OMAP4_AVDAC_CTL_MASK (0xffff << 13)
-#define OMAP4_AVDAC_CTL_WR_ACK_SHIFT 12
-#define OMAP4_AVDAC_CTL_WR_ACK_MASK (1 << 12)
-
-/* CONTROL_HDMI_TX_PHY */
-#define OMAP4_HDMITXPHY_PADORDER_SHIFT 31
-#define OMAP4_HDMITXPHY_PADORDER_MASK (1 << 31)
-#define OMAP4_HDMITXPHY_TXVALID_SHIFT 30
-#define OMAP4_HDMITXPHY_TXVALID_MASK (1 << 30)
-#define OMAP4_HDMITXPHY_ENBYPASSCLK_SHIFT 29
-#define OMAP4_HDMITXPHY_ENBYPASSCLK_MASK (1 << 29)
-#define OMAP4_HDMITXPHY_PD_PULLUPDET_SHIFT 28
-#define OMAP4_HDMITXPHY_PD_PULLUPDET_MASK (1 << 28)
-
-/* CONTROL_MMC2 */
-#define OMAP4_MMC2_FEEDBACK_CLK_SEL_SHIFT 31
-#define OMAP4_MMC2_FEEDBACK_CLK_SEL_MASK (1 << 31)
-
-/* CONTROL_DSIPHY */
-#define OMAP4_DSI2_LANEENABLE_SHIFT 29
-#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29)
-#define OMAP4_DSI1_LANEENABLE_SHIFT 24
-#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24)
-#define OMAP4_DSI1_PIPD_SHIFT 19
-#define OMAP4_DSI1_PIPD_MASK (0x1f << 19)
-#define OMAP4_DSI2_PIPD_SHIFT 14
-#define OMAP4_DSI2_PIPD_MASK (0x1f << 14)
-
-/* CONTROL_MCBSPLP */
-#define OMAP4_ALBCTRLRX_FSX_SHIFT 31
-#define OMAP4_ALBCTRLRX_FSX_MASK (1 << 31)
-#define OMAP4_ALBCTRLRX_CLKX_SHIFT 30
-#define OMAP4_ALBCTRLRX_CLKX_MASK (1 << 30)
-#define OMAP4_ABE_MCBSP1_DR_EN_SHIFT 29
-#define OMAP4_ABE_MCBSP1_DR_EN_MASK (1 << 29)
-
-/* CONTROL_USB2PHYCORE */
-#define OMAP4_USB2PHY_AUTORESUME_EN_SHIFT 31
-#define OMAP4_USB2PHY_AUTORESUME_EN_MASK (1 << 31)
-#define OMAP4_USB2PHY_DISCHGDET_SHIFT 30
-#define OMAP4_USB2PHY_DISCHGDET_MASK (1 << 30)
-#define OMAP4_USB2PHY_GPIOMODE_SHIFT 29
-#define OMAP4_USB2PHY_GPIOMODE_MASK (1 << 29)
-#define OMAP4_USB2PHY_CHG_DET_EXT_CTL_SHIFT 28
-#define OMAP4_USB2PHY_CHG_DET_EXT_CTL_MASK (1 << 28)
-#define OMAP4_USB2PHY_RDM_PD_CHGDET_EN_SHIFT 27
-#define OMAP4_USB2PHY_RDM_PD_CHGDET_EN_MASK (1 << 27)
-#define OMAP4_USB2PHY_RDP_PU_CHGDET_EN_SHIFT 26
-#define OMAP4_USB2PHY_RDP_PU_CHGDET_EN_MASK (1 << 26)
-#define OMAP4_USB2PHY_CHG_VSRC_EN_SHIFT 25
-#define OMAP4_USB2PHY_CHG_VSRC_EN_MASK (1 << 25)
-#define OMAP4_USB2PHY_CHG_ISINK_EN_SHIFT 24
-#define OMAP4_USB2PHY_CHG_ISINK_EN_MASK (1 << 24)
-#define OMAP4_USB2PHY_CHG_DET_STATUS_SHIFT 21
-#define OMAP4_USB2PHY_CHG_DET_STATUS_MASK (0x7 << 21)
-#define OMAP4_USB2PHY_CHG_DET_DM_COMP_SHIFT 20
-#define OMAP4_USB2PHY_CHG_DET_DM_COMP_MASK (1 << 20)
-#define OMAP4_USB2PHY_CHG_DET_DP_COMP_SHIFT 19
-#define OMAP4_USB2PHY_CHG_DET_DP_COMP_MASK (1 << 19)
-#define OMAP4_USB2PHY_DATADET_SHIFT 18
-#define OMAP4_USB2PHY_DATADET_MASK (1 << 18)
-#define OMAP4_USB2PHY_SINKONDP_SHIFT 17
-#define OMAP4_USB2PHY_SINKONDP_MASK (1 << 17)
-#define OMAP4_USB2PHY_SRCONDM_SHIFT 16
-#define OMAP4_USB2PHY_SRCONDM_MASK (1 << 16)
-#define OMAP4_USB2PHY_RESTARTCHGDET_SHIFT 15
-#define OMAP4_USB2PHY_RESTARTCHGDET_MASK (1 << 15)
-#define OMAP4_USB2PHY_CHGDETDONE_SHIFT 14
-#define OMAP4_USB2PHY_CHGDETDONE_MASK (1 << 14)
-#define OMAP4_USB2PHY_CHGDETECTED_SHIFT 13
-#define OMAP4_USB2PHY_CHGDETECTED_MASK (1 << 13)
-#define OMAP4_USB2PHY_MCPCPUEN_SHIFT 12
-#define OMAP4_USB2PHY_MCPCPUEN_MASK (1 << 12)
-#define OMAP4_USB2PHY_MCPCMODEEN_SHIFT 11
-#define OMAP4_USB2PHY_MCPCMODEEN_MASK (1 << 11)
-#define OMAP4_USB2PHY_RESETDONEMCLK_SHIFT 10
-#define OMAP4_USB2PHY_RESETDONEMCLK_MASK (1 << 10)
-#define OMAP4_USB2PHY_UTMIRESETDONE_SHIFT 9
-#define OMAP4_USB2PHY_UTMIRESETDONE_MASK (1 << 9)
-#define OMAP4_USB2PHY_TXBITSTUFFENABLE_SHIFT 8
-#define OMAP4_USB2PHY_TXBITSTUFFENABLE_MASK (1 << 8)
-#define OMAP4_USB2PHY_DATAPOLARITYN_SHIFT 7
-#define OMAP4_USB2PHY_DATAPOLARITYN_MASK (1 << 7)
-#define OMAP4_USBDPLL_FREQLOCK_SHIFT 6
-#define OMAP4_USBDPLL_FREQLOCK_MASK (1 << 6)
-#define OMAP4_USB2PHY_RESETDONETCLK_SHIFT 5
-#define OMAP4_USB2PHY_RESETDONETCLK_MASK (1 << 5)
-
-/* CONTROL_I2C_1 */
-#define OMAP4_HDMI_DDC_SDA_GLFENB_SHIFT 31
-#define OMAP4_HDMI_DDC_SDA_GLFENB_MASK (1 << 31)
-#define OMAP4_HDMI_DDC_SDA_LOAD_BITS_SHIFT 29
-#define OMAP4_HDMI_DDC_SDA_LOAD_BITS_MASK (0x3 << 29)
-#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_SHIFT 28
-#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK (1 << 28)
-#define OMAP4_HDMI_DDC_SCL_GLFENB_SHIFT 27
-#define OMAP4_HDMI_DDC_SCL_GLFENB_MASK (1 << 27)
-#define OMAP4_HDMI_DDC_SCL_LOAD_BITS_SHIFT 25
-#define OMAP4_HDMI_DDC_SCL_LOAD_BITS_MASK (0x3 << 25)
-#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_SHIFT 24
-#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK (1 << 24)
-#define OMAP4_HDMI_DDC_SDA_HSMODE_SHIFT 23
-#define OMAP4_HDMI_DDC_SDA_HSMODE_MASK (1 << 23)
-#define OMAP4_HDMI_DDC_SDA_NMODE_SHIFT 22
-#define OMAP4_HDMI_DDC_SDA_NMODE_MASK (1 << 22)
-#define OMAP4_HDMI_DDC_SCL_HSMODE_SHIFT 21
-#define OMAP4_HDMI_DDC_SCL_HSMODE_MASK (1 << 21)
-#define OMAP4_HDMI_DDC_SCL_NMODE_SHIFT 20
-#define OMAP4_HDMI_DDC_SCL_NMODE_MASK (1 << 20)
-
-/* CONTROL_MMC1 */
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_SHIFT 31
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_MASK (1 << 31)
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_SHIFT 30
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK (1 << 30)
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_SHIFT 29
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK (1 << 29)
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_SHIFT 28
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK (1 << 28)
-#define OMAP4_SDMMC1_DR0_SPEEDCTRL_SHIFT 27
-#define OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK (1 << 27)
-#define OMAP4_SDMMC1_DR1_SPEEDCTRL_SHIFT 26
-#define OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK (1 << 26)
-#define OMAP4_SDMMC1_DR2_SPEEDCTRL_SHIFT 25
-#define OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK (1 << 25)
-#define OMAP4_USBC1_DR0_SPEEDCTRL_SHIFT 24
-#define OMAP4_USBC1_DR0_SPEEDCTRL_MASK (1 << 24)
-#define OMAP4_USB_FD_CDEN_SHIFT 23
-#define OMAP4_USB_FD_CDEN_MASK (1 << 23)
-#define OMAP4_USBC1_ICUSB_DP_PDDIS_SHIFT 22
-#define OMAP4_USBC1_ICUSB_DP_PDDIS_MASK (1 << 22)
-#define OMAP4_USBC1_ICUSB_DM_PDDIS_SHIFT 21
-#define OMAP4_USBC1_ICUSB_DM_PDDIS_MASK (1 << 21)
-
-/* CONTROL_HSI */
-#define OMAP4_HSI1_CALLOOP_SEL_SHIFT 31
-#define OMAP4_HSI1_CALLOOP_SEL_MASK (1 << 31)
-#define OMAP4_HSI1_CALMUX_SEL_SHIFT 30
-#define OMAP4_HSI1_CALMUX_SEL_MASK (1 << 30)
-#define OMAP4_HSI2_CALLOOP_SEL_SHIFT 29
-#define OMAP4_HSI2_CALLOOP_SEL_MASK (1 << 29)
-#define OMAP4_HSI2_CALMUX_SEL_SHIFT 28
-#define OMAP4_HSI2_CALMUX_SEL_MASK (1 << 28)
-
-/* CONTROL_USB */
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT0_AUTO_EN_SHIFT 31
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT0_AUTO_EN_MASK (1 << 31)
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT1_AUTO_EN_SHIFT 30
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT1_AUTO_EN_MASK (1 << 30)
-
-/* CONTROL_HDQ */
-#define OMAP4_HDQ_SIO_PWRDNZ_SHIFT 31
-#define OMAP4_HDQ_SIO_PWRDNZ_MASK (1 << 31)
-
-/* CONTROL_LPDDR2IO1_0 */
-#define OMAP4_LPDDR2IO1_GR4_SR_SHIFT 30
-#define OMAP4_LPDDR2IO1_GR4_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO1_GR4_I_SHIFT 27
-#define OMAP4_LPDDR2IO1_GR4_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO1_GR4_WD_SHIFT 25
-#define OMAP4_LPDDR2IO1_GR4_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO1_GR3_SR_SHIFT 22
-#define OMAP4_LPDDR2IO1_GR3_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO1_GR3_I_SHIFT 19
-#define OMAP4_LPDDR2IO1_GR3_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO1_GR3_WD_SHIFT 17
-#define OMAP4_LPDDR2IO1_GR3_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO1_GR2_SR_SHIFT 14
-#define OMAP4_LPDDR2IO1_GR2_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO1_GR2_I_SHIFT 11
-#define OMAP4_LPDDR2IO1_GR2_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO1_GR2_WD_SHIFT 9
-#define OMAP4_LPDDR2IO1_GR2_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO1_GR1_SR_SHIFT 6
-#define OMAP4_LPDDR2IO1_GR1_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO1_GR1_I_SHIFT 3
-#define OMAP4_LPDDR2IO1_GR1_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO1_GR1_WD_SHIFT 1
-#define OMAP4_LPDDR2IO1_GR1_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO1_1 */
-#define OMAP4_LPDDR2IO1_GR8_SR_SHIFT 30
-#define OMAP4_LPDDR2IO1_GR8_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO1_GR8_I_SHIFT 27
-#define OMAP4_LPDDR2IO1_GR8_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO1_GR8_WD_SHIFT 25
-#define OMAP4_LPDDR2IO1_GR8_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO1_GR7_SR_SHIFT 22
-#define OMAP4_LPDDR2IO1_GR7_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO1_GR7_I_SHIFT 19
-#define OMAP4_LPDDR2IO1_GR7_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO1_GR7_WD_SHIFT 17
-#define OMAP4_LPDDR2IO1_GR7_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO1_GR6_SR_SHIFT 14
-#define OMAP4_LPDDR2IO1_GR6_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO1_GR6_I_SHIFT 11
-#define OMAP4_LPDDR2IO1_GR6_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO1_GR6_WD_SHIFT 9
-#define OMAP4_LPDDR2IO1_GR6_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO1_GR5_SR_SHIFT 6
-#define OMAP4_LPDDR2IO1_GR5_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO1_GR5_I_SHIFT 3
-#define OMAP4_LPDDR2IO1_GR5_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO1_GR5_WD_SHIFT 1
-#define OMAP4_LPDDR2IO1_GR5_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO1_2 */
-#define OMAP4_LPDDR2IO1_GR11_SR_SHIFT 30
-#define OMAP4_LPDDR2IO1_GR11_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO1_GR11_I_SHIFT 27
-#define OMAP4_LPDDR2IO1_GR11_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO1_GR11_WD_SHIFT 25
-#define OMAP4_LPDDR2IO1_GR11_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO1_GR10_SR_SHIFT 22
-#define OMAP4_LPDDR2IO1_GR10_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO1_GR10_I_SHIFT 19
-#define OMAP4_LPDDR2IO1_GR10_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO1_GR10_WD_SHIFT 17
-#define OMAP4_LPDDR2IO1_GR10_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO1_GR9_SR_SHIFT 14
-#define OMAP4_LPDDR2IO1_GR9_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO1_GR9_I_SHIFT 11
-#define OMAP4_LPDDR2IO1_GR9_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO1_GR9_WD_SHIFT 9
-#define OMAP4_LPDDR2IO1_GR9_WD_MASK (0x3 << 9)
-
-/* CONTROL_LPDDR2IO1_3 */
-#define OMAP4_LPDDR21_VREF_CA_CCAP0_SHIFT 31
-#define OMAP4_LPDDR21_VREF_CA_CCAP0_MASK (1 << 31)
-#define OMAP4_LPDDR21_VREF_CA_CCAP1_SHIFT 30
-#define OMAP4_LPDDR21_VREF_CA_CCAP1_MASK (1 << 30)
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP0_SHIFT 29
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP0_MASK (1 << 29)
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP1_SHIFT 28
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP1_MASK (1 << 28)
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP0_SHIFT 27
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP0_MASK (1 << 27)
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP1_SHIFT 26
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP1_MASK (1 << 26)
-#define OMAP4_LPDDR21_VREF_CA_TAP0_SHIFT 25
-#define OMAP4_LPDDR21_VREF_CA_TAP0_MASK (1 << 25)
-#define OMAP4_LPDDR21_VREF_CA_TAP1_SHIFT 24
-#define OMAP4_LPDDR21_VREF_CA_TAP1_MASK (1 << 24)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP0_SHIFT 23
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP0_MASK (1 << 23)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP1_SHIFT 22
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP1_MASK (1 << 22)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP0_SHIFT 21
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP0_MASK (1 << 21)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP1_SHIFT 20
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP1_MASK (1 << 20)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP0_SHIFT 19
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP0_MASK (1 << 19)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP1_SHIFT 18
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP1_MASK (1 << 18)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP0_SHIFT 17
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP0_MASK (1 << 17)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP1_SHIFT 16
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP1_MASK (1 << 16)
-#define OMAP4_LPDDR21_VREF_DQ_CCAP0_SHIFT 15
-#define OMAP4_LPDDR21_VREF_DQ_CCAP0_MASK (1 << 15)
-#define OMAP4_LPDDR21_VREF_DQ_CCAP1_SHIFT 14
-#define OMAP4_LPDDR21_VREF_DQ_CCAP1_MASK (1 << 14)
-#define OMAP4_LPDDR21_VREF_DQ_TAP0_SHIFT 13
-#define OMAP4_LPDDR21_VREF_DQ_TAP0_MASK (1 << 13)
-#define OMAP4_LPDDR21_VREF_DQ_TAP1_SHIFT 12
-#define OMAP4_LPDDR21_VREF_DQ_TAP1_MASK (1 << 12)
-
-/* CONTROL_LPDDR2IO2_0 */
-#define OMAP4_LPDDR2IO2_GR4_SR_SHIFT 30
-#define OMAP4_LPDDR2IO2_GR4_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO2_GR4_I_SHIFT 27
-#define OMAP4_LPDDR2IO2_GR4_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO2_GR4_WD_SHIFT 25
-#define OMAP4_LPDDR2IO2_GR4_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO2_GR3_SR_SHIFT 22
-#define OMAP4_LPDDR2IO2_GR3_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO2_GR3_I_SHIFT 19
-#define OMAP4_LPDDR2IO2_GR3_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO2_GR3_WD_SHIFT 17
-#define OMAP4_LPDDR2IO2_GR3_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO2_GR2_SR_SHIFT 14
-#define OMAP4_LPDDR2IO2_GR2_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO2_GR2_I_SHIFT 11
-#define OMAP4_LPDDR2IO2_GR2_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO2_GR2_WD_SHIFT 9
-#define OMAP4_LPDDR2IO2_GR2_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO2_GR1_SR_SHIFT 6
-#define OMAP4_LPDDR2IO2_GR1_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO2_GR1_I_SHIFT 3
-#define OMAP4_LPDDR2IO2_GR1_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO2_GR1_WD_SHIFT 1
-#define OMAP4_LPDDR2IO2_GR1_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO2_1 */
-#define OMAP4_LPDDR2IO2_GR8_SR_SHIFT 30
-#define OMAP4_LPDDR2IO2_GR8_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO2_GR8_I_SHIFT 27
-#define OMAP4_LPDDR2IO2_GR8_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO2_GR8_WD_SHIFT 25
-#define OMAP4_LPDDR2IO2_GR8_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO2_GR7_SR_SHIFT 22
-#define OMAP4_LPDDR2IO2_GR7_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO2_GR7_I_SHIFT 19
-#define OMAP4_LPDDR2IO2_GR7_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO2_GR7_WD_SHIFT 17
-#define OMAP4_LPDDR2IO2_GR7_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO2_GR6_SR_SHIFT 14
-#define OMAP4_LPDDR2IO2_GR6_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO2_GR6_I_SHIFT 11
-#define OMAP4_LPDDR2IO2_GR6_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO2_GR6_WD_SHIFT 9
-#define OMAP4_LPDDR2IO2_GR6_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO2_GR5_SR_SHIFT 6
-#define OMAP4_LPDDR2IO2_GR5_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO2_GR5_I_SHIFT 3
-#define OMAP4_LPDDR2IO2_GR5_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO2_GR5_WD_SHIFT 1
-#define OMAP4_LPDDR2IO2_GR5_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO2_2 */
-#define OMAP4_LPDDR2IO2_GR11_SR_SHIFT 30
-#define OMAP4_LPDDR2IO2_GR11_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO2_GR11_I_SHIFT 27
-#define OMAP4_LPDDR2IO2_GR11_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO2_GR11_WD_SHIFT 25
-#define OMAP4_LPDDR2IO2_GR11_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO2_GR10_SR_SHIFT 22
-#define OMAP4_LPDDR2IO2_GR10_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO2_GR10_I_SHIFT 19
-#define OMAP4_LPDDR2IO2_GR10_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO2_GR10_WD_SHIFT 17
-#define OMAP4_LPDDR2IO2_GR10_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO2_GR9_SR_SHIFT 14
-#define OMAP4_LPDDR2IO2_GR9_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO2_GR9_I_SHIFT 11
-#define OMAP4_LPDDR2IO2_GR9_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO2_GR9_WD_SHIFT 9
-#define OMAP4_LPDDR2IO2_GR9_WD_MASK (0x3 << 9)
-
-/* CONTROL_LPDDR2IO2_3 */
-#define OMAP4_LPDDR22_VREF_CA_CCAP0_SHIFT 31
-#define OMAP4_LPDDR22_VREF_CA_CCAP0_MASK (1 << 31)
-#define OMAP4_LPDDR22_VREF_CA_CCAP1_SHIFT 30
-#define OMAP4_LPDDR22_VREF_CA_CCAP1_MASK (1 << 30)
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP0_SHIFT 29
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP0_MASK (1 << 29)
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP1_SHIFT 28
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP1_MASK (1 << 28)
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP0_SHIFT 27
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP0_MASK (1 << 27)
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP1_SHIFT 26
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP1_MASK (1 << 26)
-#define OMAP4_LPDDR22_VREF_CA_TAP0_SHIFT 25
-#define OMAP4_LPDDR22_VREF_CA_TAP0_MASK (1 << 25)
-#define OMAP4_LPDDR22_VREF_CA_TAP1_SHIFT 24
-#define OMAP4_LPDDR22_VREF_CA_TAP1_MASK (1 << 24)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP0_SHIFT 23
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP0_MASK (1 << 23)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP1_SHIFT 22
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP1_MASK (1 << 22)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP0_SHIFT 21
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP0_MASK (1 << 21)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP1_SHIFT 20
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP1_MASK (1 << 20)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP0_SHIFT 19
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP0_MASK (1 << 19)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP1_SHIFT 18
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP1_MASK (1 << 18)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP0_SHIFT 17
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP0_MASK (1 << 17)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP1_SHIFT 16
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP1_MASK (1 << 16)
-#define OMAP4_LPDDR22_VREF_DQ_CCAP0_SHIFT 15
-#define OMAP4_LPDDR22_VREF_DQ_CCAP0_MASK (1 << 15)
-#define OMAP4_LPDDR22_VREF_DQ_CCAP1_SHIFT 14
-#define OMAP4_LPDDR22_VREF_DQ_CCAP1_MASK (1 << 14)
-#define OMAP4_LPDDR22_VREF_DQ_TAP0_SHIFT 13
-#define OMAP4_LPDDR22_VREF_DQ_TAP0_MASK (1 << 13)
-#define OMAP4_LPDDR22_VREF_DQ_TAP1_SHIFT 12
-#define OMAP4_LPDDR22_VREF_DQ_TAP1_MASK (1 << 12)
-
-/* CONTROL_BUS_HOLD */
-#define OMAP4_ABE_DMIC_DIN3_EN_SHIFT 31
-#define OMAP4_ABE_DMIC_DIN3_EN_MASK (1 << 31)
-#define OMAP4_MCSPI1_CS3_EN_SHIFT 30
-#define OMAP4_MCSPI1_CS3_EN_MASK (1 << 30)
-
-/* CONTROL_C2C */
-#define OMAP4_MIRROR_MODE_EN_SHIFT 31
-#define OMAP4_MIRROR_MODE_EN_MASK (1 << 31)
-#define OMAP4_C2C_SPARE_SHIFT 24
-#define OMAP4_C2C_SPARE_MASK (0x7f << 24)
-
-/* CORE_CONTROL_SPARE_RW */
-#define OMAP4_CORE_CONTROL_SPARE_RW_SHIFT 0
-#define OMAP4_CORE_CONTROL_SPARE_RW_MASK (0xffffffff << 0)
-
-/* CORE_CONTROL_SPARE_R */
-#define OMAP4_CORE_CONTROL_SPARE_R_SHIFT 0
-#define OMAP4_CORE_CONTROL_SPARE_R_MASK (0xffffffff << 0)
-
-/* CORE_CONTROL_SPARE_R_C0 */
-#define OMAP4_CORE_CONTROL_SPARE_R_C0_SHIFT 31
-#define OMAP4_CORE_CONTROL_SPARE_R_C0_MASK (1 << 31)
-#define OMAP4_CORE_CONTROL_SPARE_R_C1_SHIFT 30
-#define OMAP4_CORE_CONTROL_SPARE_R_C1_MASK (1 << 30)
-#define OMAP4_CORE_CONTROL_SPARE_R_C2_SHIFT 29
-#define OMAP4_CORE_CONTROL_SPARE_R_C2_MASK (1 << 29)
-#define OMAP4_CORE_CONTROL_SPARE_R_C3_SHIFT 28
-#define OMAP4_CORE_CONTROL_SPARE_R_C3_MASK (1 << 28)
-#define OMAP4_CORE_CONTROL_SPARE_R_C4_SHIFT 27
-#define OMAP4_CORE_CONTROL_SPARE_R_C4_MASK (1 << 27)
-#define OMAP4_CORE_CONTROL_SPARE_R_C5_SHIFT 26
-#define OMAP4_CORE_CONTROL_SPARE_R_C5_MASK (1 << 26)
-#define OMAP4_CORE_CONTROL_SPARE_R_C6_SHIFT 25
-#define OMAP4_CORE_CONTROL_SPARE_R_C6_MASK (1 << 25)
-#define OMAP4_CORE_CONTROL_SPARE_R_C7_SHIFT 24
-#define OMAP4_CORE_CONTROL_SPARE_R_C7_MASK (1 << 24)
-
-/* CONTROL_EFUSE_1 */
-#define OMAP4_AVDAC_TRIM_BYTE3_SHIFT 24
-#define OMAP4_AVDAC_TRIM_BYTE3_MASK (0x7f << 24)
-#define OMAP4_AVDAC_TRIM_BYTE2_SHIFT 16
-#define OMAP4_AVDAC_TRIM_BYTE2_MASK (0xff << 16)
-#define OMAP4_AVDAC_TRIM_BYTE1_SHIFT 8
-#define OMAP4_AVDAC_TRIM_BYTE1_MASK (0xff << 8)
-#define OMAP4_AVDAC_TRIM_BYTE0_SHIFT 0
-#define OMAP4_AVDAC_TRIM_BYTE0_MASK (0xff << 0)
-
-/* CONTROL_EFUSE_2 */
-#define OMAP4_EFUSE_SMART2TEST_P0_SHIFT 31
-#define OMAP4_EFUSE_SMART2TEST_P0_MASK (1 << 31)
-#define OMAP4_EFUSE_SMART2TEST_P1_SHIFT 30
-#define OMAP4_EFUSE_SMART2TEST_P1_MASK (1 << 30)
-#define OMAP4_EFUSE_SMART2TEST_P2_SHIFT 29
-#define OMAP4_EFUSE_SMART2TEST_P2_MASK (1 << 29)
-#define OMAP4_EFUSE_SMART2TEST_P3_SHIFT 28
-#define OMAP4_EFUSE_SMART2TEST_P3_MASK (1 << 28)
-#define OMAP4_EFUSE_SMART2TEST_N0_SHIFT 27
-#define OMAP4_EFUSE_SMART2TEST_N0_MASK (1 << 27)
-#define OMAP4_EFUSE_SMART2TEST_N1_SHIFT 26
-#define OMAP4_EFUSE_SMART2TEST_N1_MASK (1 << 26)
-#define OMAP4_EFUSE_SMART2TEST_N2_SHIFT 25
-#define OMAP4_EFUSE_SMART2TEST_N2_MASK (1 << 25)
-#define OMAP4_EFUSE_SMART2TEST_N3_SHIFT 24
-#define OMAP4_EFUSE_SMART2TEST_N3_MASK (1 << 24)
-#define OMAP4_LPDDR2_PTV_N1_SHIFT 23
-#define OMAP4_LPDDR2_PTV_N1_MASK (1 << 23)
-#define OMAP4_LPDDR2_PTV_N2_SHIFT 22
-#define OMAP4_LPDDR2_PTV_N2_MASK (1 << 22)
-#define OMAP4_LPDDR2_PTV_N3_SHIFT 21
-#define OMAP4_LPDDR2_PTV_N3_MASK (1 << 21)
-#define OMAP4_LPDDR2_PTV_N4_SHIFT 20
-#define OMAP4_LPDDR2_PTV_N4_MASK (1 << 20)
-#define OMAP4_LPDDR2_PTV_N5_SHIFT 19
-#define OMAP4_LPDDR2_PTV_N5_MASK (1 << 19)
-#define OMAP4_LPDDR2_PTV_P1_SHIFT 18
-#define OMAP4_LPDDR2_PTV_P1_MASK (1 << 18)
-#define OMAP4_LPDDR2_PTV_P2_SHIFT 17
-#define OMAP4_LPDDR2_PTV_P2_MASK (1 << 17)
-#define OMAP4_LPDDR2_PTV_P3_SHIFT 16
-#define OMAP4_LPDDR2_PTV_P3_MASK (1 << 16)
-#define OMAP4_LPDDR2_PTV_P4_SHIFT 15
-#define OMAP4_LPDDR2_PTV_P4_MASK (1 << 15)
-#define OMAP4_LPDDR2_PTV_P5_SHIFT 14
-#define OMAP4_LPDDR2_PTV_P5_MASK (1 << 14)
-
-/* CONTROL_EFUSE_3 */
-#define OMAP4_STD_FUSE_SPARE_1_SHIFT 24
-#define OMAP4_STD_FUSE_SPARE_1_MASK (0xff << 24)
-#define OMAP4_STD_FUSE_SPARE_2_SHIFT 16
-#define OMAP4_STD_FUSE_SPARE_2_MASK (0xff << 16)
-#define OMAP4_STD_FUSE_SPARE_3_SHIFT 8
-#define OMAP4_STD_FUSE_SPARE_3_MASK (0xff << 8)
-#define OMAP4_STD_FUSE_SPARE_4_SHIFT 0
-#define OMAP4_STD_FUSE_SPARE_4_MASK (0xff << 0)
-
-/* CONTROL_EFUSE_4 */
-#define OMAP4_STD_FUSE_SPARE_5_SHIFT 24
-#define OMAP4_STD_FUSE_SPARE_5_MASK (0xff << 24)
-#define OMAP4_STD_FUSE_SPARE_6_SHIFT 16
-#define OMAP4_STD_FUSE_SPARE_6_MASK (0xff << 16)
-#define OMAP4_STD_FUSE_SPARE_7_SHIFT 8
-#define OMAP4_STD_FUSE_SPARE_7_MASK (0xff << 8)
-#define OMAP4_STD_FUSE_SPARE_8_SHIFT 0
-#define OMAP4_STD_FUSE_SPARE_8_MASK (0xff << 0)
-
-#endif
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
deleted file mode 100644
index 17c9b37..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
+++ /dev/null
@@ -1,236 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_PAD_WKUP registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson at ti.com)
- * Santosh Shilimkar (santosh.shilimkar at ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap at vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_WKUP_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_WKUP_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_PAD_WKUP 0x4a31e000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_PAD_WKUP_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_PAD_WKUP_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_PAD_WKUP_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_PAD_WKUP_PADCONF_WAKEUPEVENT_0 0x007c
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_SMART1NOPMIO_PADCONF_0 0x05a0
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_SMART1NOPMIO_PADCONF_1 0x05a4
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_PADCONF_MODE 0x05a8
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_XTAL_OSCILLATOR 0x05ac
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_USIMIO 0x0600
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_I2C_2 0x0604
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_JTAG 0x0608
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_SYS 0x060c
-#define OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_RW 0x0614
-#define OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_R 0x0618
-#define OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_R_C0 0x061c
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* PADCONF_WAKEUPEVENT_0 */
-#define OMAP4_JTAG_TDO_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_JTAG_TDO_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_JTAG_TDI_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_JTAG_TDI_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_JTAG_TMS_TMSC_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_JTAG_TMS_TMSC_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_JTAG_RTCK_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_JTAG_RTCK_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_JTAG_TCK_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_JTAG_TCK_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_JTAG_NTRST_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_JTAG_NTRST_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_SYS_BOOT7_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_SYS_BOOT7_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_SYS_BOOT6_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_SYS_BOOT6_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_SYS_PWRON_RESET_OUT_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_SYS_PWRON_RESET_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_SYS_PWR_REQ_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_SYS_PWR_REQ_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_SYS_NRESWARM_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_SYS_NRESWARM_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_SYS_32K_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_SYS_32K_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_FREF_CLK4_OUT_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_FREF_CLK4_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_FREF_CLK4_REQ_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_FREF_CLK4_REQ_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_FREF_CLK3_OUT_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_FREF_CLK3_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_FREF_CLK3_REQ_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_FREF_CLK3_REQ_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_FREF_CLK0_OUT_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_FREF_CLK0_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_FREF_CLK_IOREQ_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_FREF_CLK_IOREQ_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_SR_SDA_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_SR_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_SR_SCL_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_SR_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_SIM_PWRCTRL_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_SIM_PWRCTRL_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_SIM_CD_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_SIM_CD_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_SIM_RESET_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_SIM_RESET_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_SIM_CLK_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_SIM_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_SIM_IO_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_SIM_IO_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* CONTROL_SMART1NOPMIO_PADCONF_0 */
-#define OMAP4_FREF_DR0_SC_SHIFT 30
-#define OMAP4_FREF_DR0_SC_MASK (0x3 << 30)
-#define OMAP4_FREF_DR1_SC_SHIFT 28
-#define OMAP4_FREF_DR1_SC_MASK (0x3 << 28)
-#define OMAP4_FREF_DR4_SC_SHIFT 26
-#define OMAP4_FREF_DR4_SC_MASK (0x3 << 26)
-#define OMAP4_FREF_DR5_SC_SHIFT 24
-#define OMAP4_FREF_DR5_SC_MASK (0x3 << 24)
-#define OMAP4_FREF_DR6_SC_SHIFT 22
-#define OMAP4_FREF_DR6_SC_MASK (0x3 << 22)
-#define OMAP4_FREF_DR7_SC_SHIFT 20
-#define OMAP4_FREF_DR7_SC_MASK (0x3 << 20)
-#define OMAP4_GPIO_DR7_SC_SHIFT 18
-#define OMAP4_GPIO_DR7_SC_MASK (0x3 << 18)
-#define OMAP4_DPM_DR0_SC_SHIFT 14
-#define OMAP4_DPM_DR0_SC_MASK (0x3 << 14)
-#define OMAP4_SIM_DR0_SC_SHIFT 12
-#define OMAP4_SIM_DR0_SC_MASK (0x3 << 12)
-
-/* CONTROL_SMART1NOPMIO_PADCONF_1 */
-#define OMAP4_FREF_DR0_LB_SHIFT 30
-#define OMAP4_FREF_DR0_LB_MASK (0x3 << 30)
-#define OMAP4_FREF_DR1_LB_SHIFT 28
-#define OMAP4_FREF_DR1_LB_MASK (0x3 << 28)
-#define OMAP4_FREF_DR4_LB_SHIFT 26
-#define OMAP4_FREF_DR4_LB_MASK (0x3 << 26)
-#define OMAP4_FREF_DR5_LB_SHIFT 24
-#define OMAP4_FREF_DR5_LB_MASK (0x3 << 24)
-#define OMAP4_FREF_DR6_LB_SHIFT 22
-#define OMAP4_FREF_DR6_LB_MASK (0x3 << 22)
-#define OMAP4_FREF_DR7_LB_SHIFT 20
-#define OMAP4_FREF_DR7_LB_MASK (0x3 << 20)
-#define OMAP4_GPIO_DR7_LB_SHIFT 18
-#define OMAP4_GPIO_DR7_LB_MASK (0x3 << 18)
-#define OMAP4_DPM_DR0_LB_SHIFT 14
-#define OMAP4_DPM_DR0_LB_MASK (0x3 << 14)
-#define OMAP4_SIM_DR0_LB_SHIFT 12
-#define OMAP4_SIM_DR0_LB_MASK (0x3 << 12)
-
-/* CONTROL_PADCONF_MODE */
-#define OMAP4_VDDS_DV_FREF_SHIFT 31
-#define OMAP4_VDDS_DV_FREF_MASK (1 << 31)
-#define OMAP4_VDDS_DV_BANK2_SHIFT 30
-#define OMAP4_VDDS_DV_BANK2_MASK (1 << 30)
-
-/* CONTROL_XTAL_OSCILLATOR */
-#define OMAP4_OSCILLATOR_BOOST_SHIFT 31
-#define OMAP4_OSCILLATOR_BOOST_MASK (1 << 31)
-#define OMAP4_OSCILLATOR_OS_OUT_SHIFT 30
-#define OMAP4_OSCILLATOR_OS_OUT_MASK (1 << 30)
-
-/* CONTROL_USIMIO */
-#define OMAP4_PAD_USIM_CLK_LOW_SHIFT 31
-#define OMAP4_PAD_USIM_CLK_LOW_MASK (1 << 31)
-#define OMAP4_PAD_USIM_RST_LOW_SHIFT 29
-#define OMAP4_PAD_USIM_RST_LOW_MASK (1 << 29)
-#define OMAP4_USIM_PWRDNZ_SHIFT 28
-#define OMAP4_USIM_PWRDNZ_MASK (1 << 28)
-
-/* CONTROL_I2C_2 */
-#define OMAP4_SR_SDA_GLFENB_SHIFT 31
-#define OMAP4_SR_SDA_GLFENB_MASK (1 << 31)
-#define OMAP4_SR_SDA_LOAD_BITS_SHIFT 29
-#define OMAP4_SR_SDA_LOAD_BITS_MASK (0x3 << 29)
-#define OMAP4_SR_SDA_PULLUPRESX_SHIFT 28
-#define OMAP4_SR_SDA_PULLUPRESX_MASK (1 << 28)
-#define OMAP4_SR_SCL_GLFENB_SHIFT 27
-#define OMAP4_SR_SCL_GLFENB_MASK (1 << 27)
-#define OMAP4_SR_SCL_LOAD_BITS_SHIFT 25
-#define OMAP4_SR_SCL_LOAD_BITS_MASK (0x3 << 25)
-#define OMAP4_SR_SCL_PULLUPRESX_SHIFT 24
-#define OMAP4_SR_SCL_PULLUPRESX_MASK (1 << 24)
-
-/* CONTROL_JTAG */
-#define OMAP4_JTAG_NTRST_EN_SHIFT 31
-#define OMAP4_JTAG_NTRST_EN_MASK (1 << 31)
-#define OMAP4_JTAG_TCK_EN_SHIFT 30
-#define OMAP4_JTAG_TCK_EN_MASK (1 << 30)
-#define OMAP4_JTAG_RTCK_EN_SHIFT 29
-#define OMAP4_JTAG_RTCK_EN_MASK (1 << 29)
-#define OMAP4_JTAG_TDI_EN_SHIFT 28
-#define OMAP4_JTAG_TDI_EN_MASK (1 << 28)
-#define OMAP4_JTAG_TDO_EN_SHIFT 27
-#define OMAP4_JTAG_TDO_EN_MASK (1 << 27)
-
-/* CONTROL_SYS */
-#define OMAP4_SYS_NRESWARM_PIPU_SHIFT 31
-#define OMAP4_SYS_NRESWARM_PIPU_MASK (1 << 31)
-
-/* WKUP_CONTROL_SPARE_RW */
-#define OMAP4_WKUP_CONTROL_SPARE_RW_SHIFT 0
-#define OMAP4_WKUP_CONTROL_SPARE_RW_MASK (0xffffffff << 0)
-
-/* WKUP_CONTROL_SPARE_R */
-#define OMAP4_WKUP_CONTROL_SPARE_R_SHIFT 0
-#define OMAP4_WKUP_CONTROL_SPARE_R_MASK (0xffffffff << 0)
-
-/* WKUP_CONTROL_SPARE_R_C0 */
-#define OMAP4_WKUP_CONTROL_SPARE_R_C0_SHIFT 31
-#define OMAP4_WKUP_CONTROL_SPARE_R_C0_MASK (1 << 31)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C1_SHIFT 30
-#define OMAP4_WKUP_CONTROL_SPARE_R_C1_MASK (1 << 30)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C2_SHIFT 29
-#define OMAP4_WKUP_CONTROL_SPARE_R_C2_MASK (1 << 29)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C3_SHIFT 28
-#define OMAP4_WKUP_CONTROL_SPARE_R_C3_MASK (1 << 28)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C4_SHIFT 27
-#define OMAP4_WKUP_CONTROL_SPARE_R_C4_MASK (1 << 27)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C5_SHIFT 26
-#define OMAP4_WKUP_CONTROL_SPARE_R_C5_MASK (1 << 26)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C6_SHIFT 25
-#define OMAP4_WKUP_CONTROL_SPARE_R_C6_MASK (1 << 25)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C7_SHIFT 24
-#define OMAP4_WKUP_CONTROL_SPARE_R_C7_MASK (1 << 24)
-
-#endif
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
deleted file mode 100644
index a0af9ba..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_WKUP registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson at ti.com)
- * Santosh Shilimkar (santosh.shilimkar at ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_WKUP_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_WKUP_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_WKUP 0x4a30c000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_WKUP_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_WKUP_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_WKUP_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_0 0x0460
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_1 0x0464
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_2 0x0468
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_3 0x046c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_4 0x0470
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_5 0x0474
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_6 0x0478
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_7 0x047c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_8 0x0480
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_9 0x0484
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_10 0x0488
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_11 0x048c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_12 0x0490
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_13 0x0494
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_14 0x0498
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_15 0x049c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_16 0x04a0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_17 0x04a4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_18 0x04a8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_19 0x04ac
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_20 0x04b0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_21 0x04b4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_22 0x04b8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_23 0x04bc
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_24 0x04c0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_25 0x04c4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_26 0x04c8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_27 0x04cc
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_28 0x04d0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_29 0x04d4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_30 0x04d8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_31 0x04dc
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* CONF_DEBUG_SEL_TST_0 */
-#define OMAP4_WKUP_MODE_SHIFT 0
-#define OMAP4_WKUP_MODE_MASK (1 << 0)
-
-#endif
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 02/11] ARM: OMAP: expose control.h to mach area
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 8:25 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: amit.kucheria, balbi, linux-pm, linux-omap, linux-arm-kernel
This patch exposes the definitions under control.h to
drivers outside the machine code.
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/am35xx-emac.c | 2 +-
arch/arm/mach-omap2/board-3430sdp.c | 2 +-
arch/arm/mach-omap2/board-4430sdp.c | 2 +-
arch/arm/mach-omap2/board-am3517crane.c | 2 +-
arch/arm/mach-omap2/board-am3517evm.c | 2 +-
arch/arm/mach-omap2/board-apollon.c | 2 +-
arch/arm/mach-omap2/board-cm-t3517.c | 2 +-
arch/arm/mach-omap2/board-h4.c | 2 +-
arch/arm/mach-omap2/board-igep0020.c | 2 +-
arch/arm/mach-omap2/board-ldp.c | 2 +-
arch/arm/mach-omap2/board-omap3logic.c | 2 +-
arch/arm/mach-omap2/board-omap4panda.c | 2 +-
arch/arm/mach-omap2/board-omap4pcm049.c | 2 +-
arch/arm/mach-omap2/clock2420_data.c | 2 +-
arch/arm/mach-omap2/clock2430_data.c | 2 +-
arch/arm/mach-omap2/clock3xxx_data.c | 2 +-
arch/arm/mach-omap2/clock44xx_data.c | 2 +-
arch/arm/mach-omap2/common.c | 2 +-
arch/arm/mach-omap2/control.c | 2 +-
arch/arm/mach-omap2/cpuidle34xx.c | 2 +-
arch/arm/mach-omap2/devices.c | 2 +-
arch/arm/mach-omap2/display.c | 2 +-
arch/arm/mach-omap2/hsmmc.c | 2 +-
arch/arm/mach-omap2/id.c | 2 +-
arch/arm/mach-omap2/{ => include/mach}/control.h | 2 +-
arch/arm/mach-omap2/mcbsp.c | 2 +-
arch/arm/mach-omap2/mux.c | 2 +-
arch/arm/mach-omap2/omap_phy_internal.c | 2 +-
arch/arm/mach-omap2/opp3xxx_data.c | 2 +-
arch/arm/mach-omap2/opp4xxx_data.c | 2 +-
arch/arm/mach-omap2/pm24xx.c | 2 +-
arch/arm/mach-omap2/pm34xx.c | 2 +-
arch/arm/mach-omap2/prcm.c | 2 +-
arch/arm/mach-omap2/serial.c | 2 +-
arch/arm/mach-omap2/sleep34xx.S | 2 +-
arch/arm/mach-omap2/sr_device.c | 2 +-
arch/arm/mach-omap2/usb-fs.c | 2 +-
arch/arm/mach-omap2/voltage.c | 2 +-
38 files changed, 38 insertions(+), 38 deletions(-)
rename arch/arm/mach-omap2/{ => include/mach}/control.h (99%)
diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c
index 447682c..c3da28a 100644
--- a/arch/arm/mach-omap2/am35xx-emac.c
+++ b/arch/arm/mach-omap2/am35xx-emac.c
@@ -21,7 +21,7 @@
#include <plat/irqs.h>
#include <mach/am35xx.h>
-#include "control.h"
+#include <mach/control.h>
static struct mdio_platform_data am35xx_emac_mdio_pdata;
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 37abb0d..ad1132b 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -46,7 +46,7 @@
#include "sdram-qimonda-hyb18m512160af-6.h"
#include "hsmmc.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#define CONFIG_DISABLE_HFCLK 1
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 94af6cd..8f7f76b 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -47,7 +47,7 @@
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#define ETH_KS8851_IRQ 34
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 3b8a53c..2ad514d 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -32,7 +32,7 @@
#include "am35xx-emac.h"
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#define GPIO_USB_POWER 35
#define GPIO_USB_NRESET 38
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 99790eb..bef6586 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -41,7 +41,7 @@
#include "am35xx-emac.h"
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "hsmmc.h"
#define LCD_PANEL_PWR 176
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 768ece2..bd04fe2 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -44,7 +44,7 @@
#include <video/omap-panel-generic-dpi.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
/* LED & Switch macros */
#define LED0_GPIO13 13
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 9e66e16..1d2b7a3 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -47,7 +47,7 @@
#include <mach/am35xx.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#include "am35xx-emac.h"
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 0bbbabe..623a231 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -43,7 +43,7 @@
#include <video/omap-panel-generic-dpi.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#define H4_FLASH_CS 0
#define H4_SMC91X_CS 1
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 7a27409..ebef044 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -42,7 +42,7 @@
#include "sdram-numonyx-m65kxxxxam.h"
#include "common-board-devices.h"
#include "board-flash.h"
-#include "control.h"
+#include <mach/control.h>
#define IGEP2_SMSC911X_CS 5
#define IGEP2_SMSC911X_GPIO 176
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 1b60495..6383a76 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -50,7 +50,7 @@
#include "board-flash.h"
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#define LDP_SMSC911X_CS 1
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index c008bf8..ca3e075 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -37,7 +37,7 @@
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#include <plat/mux.h>
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 847a857..b1c8517 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -45,7 +45,7 @@
#include <video/omap-panel-tfp410.h>
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#include "common-board-devices.h"
diff --git a/arch/arm/mach-omap2/board-omap4pcm049.c b/arch/arm/mach-omap2/board-omap4pcm049.c
index a95f426..101e984 100644
--- a/arch/arm/mach-omap2/board-omap4pcm049.c
+++ b/arch/arm/mach-omap2/board-omap4pcm049.c
@@ -48,7 +48,7 @@
#include "common.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#include "common-board-devices.h"
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index bace930..f350e96 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -30,7 +30,7 @@
#include "prm-regbits-24xx.h"
#include "cm-regbits-24xx.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
#define OMAP_CM_REGADDR OMAP2420_CM_REGADDR
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 3b4d09a..dd08bcb 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -29,7 +29,7 @@
#include "prm-regbits-24xx.h"
#include "cm-regbits-24xx.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
#define OMAP_CM_REGADDR OMAP2430_CM_REGADDR
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 4e1a3b0..694625f 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -34,7 +34,7 @@
#include "cm-regbits-34xx.h"
#include "prm2xxx_3xxx.h"
#include "prm-regbits-34xx.h"
-#include "control.h"
+#include <mach/control.h>
/*
* clocks
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 2172f66..ce11ee4 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -39,7 +39,7 @@
#include "cm-regbits-44xx.h"
#include "prm44xx.h"
#include "prm-regbits-44xx.h"
-#include "control.h"
+#include <mach/control.h>
#include "scrm44xx.h"
/* OMAP4 modulemode control */
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 8a6953a..3dc94d0 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -25,7 +25,7 @@
#include "iomap.h"
#include "common.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
/* Global address base setup code */
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 08e674b..92e35bf 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -26,7 +26,7 @@
#include "cm2xxx_3xxx.h"
#include "sdrc.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
/* Used by omap3_ctrl_save_padconf() */
#define START_PADCONF_SAVE 0x2
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 207bc1c..7d82c6bb 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -33,7 +33,7 @@
#include "clockdomain.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
#include "common.h"
#ifdef CONFIG_CPU_IDLE
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 7b4b932..152c266 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -34,7 +34,7 @@
#include <plat/omap4-keypad.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "devices.h"
#define L3_MODULES_MAX_LEN 12
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index db5a88a..0681407 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -32,7 +32,7 @@
#include "iomap.h"
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "display.h"
#define DISPC_CONTROL 0x0040
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index be697d4..33b3d62 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -22,7 +22,7 @@
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 0389b32..5bb9746 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -26,7 +26,7 @@
#include <mach/id.h>
-#include "control.h"
+#include <mach/control.h>
static unsigned int omap_revision;
static const char *cpu_rev;
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/include/mach/control.h
similarity index 99%
rename from arch/arm/mach-omap2/control.h
rename to arch/arm/mach-omap2/include/mach/control.h
index dad2903..cf42764 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/include/mach/control.h
@@ -1,5 +1,5 @@
/*
- * arch/arm/mach-omap2/control.h
+ * arch/arm/mach-omap2/include/mach/control.h
*
* OMAP2/3/4 System Control Module definitions
*
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 577cb77..0367035 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -25,7 +25,7 @@
#include <plat/omap_device.h>
#include <linux/pm_runtime.h>
-#include "control.h"
+#include <mach/control.h>
/*
* FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 3268ee2..f23e6618 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -38,7 +38,7 @@
#include <plat/omap_hwmod.h>
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#include "prm.h"
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 4c90477..b2c9253 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -29,7 +29,7 @@
#include <linux/usb.h>
#include <plat/usb.h>
-#include "control.h"
+#include <mach/control.h>
/* OMAP control module register for UTMI PHY */
#define CONTROL_DEV_CONF 0x300
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c
index d95f3f9..6dafdbb 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -21,7 +21,7 @@
#include <plat/cpu.h>
-#include "control.h"
+#include <mach/control.h>
#include "omap_opp_data.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c
index 2293ba2..27f823c 100644
--- a/arch/arm/mach-omap2/opp4xxx_data.c
+++ b/arch/arm/mach-omap2/opp4xxx_data.c
@@ -22,7 +22,7 @@
#include <plat/cpu.h>
-#include "control.h"
+#include <mach/control.h>
#include "omap_opp_data.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index facfffc..7ebca30 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -49,7 +49,7 @@
#include "cm-regbits-24xx.h"
#include "sdrc.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
#include "powerdomain.h"
#include "clockdomain.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 8b43aef..1d2a51c 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -49,7 +49,7 @@
#include "prm2xxx_3xxx.h"
#include "pm.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
/* pm34xx errata defined in pm.h */
u16 pm34xx_errata;
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 480f40a..fff0b09 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -37,7 +37,7 @@
#include "prminst44xx.h"
#include "prm-regbits-24xx.h"
#include "prm-regbits-44xx.h"
-#include "control.h"
+#include <mach/control.h>
void __iomem *prm_base;
void __iomem *cm_base;
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 678dd1d..97b09da5 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -39,7 +39,7 @@
#include "pm.h"
#include "cm2xxx_3xxx.h"
#include "prm-regbits-34xx.h"
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
/*
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 1f62f23..b3f6bfc 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -33,7 +33,7 @@
#include "cm2xxx_3xxx.h"
#include "prm2xxx_3xxx.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
/*
* Registers access definitions
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index a503e1e..48a01f6 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -26,7 +26,7 @@
#include "smartreflex.h"
#include "voltage.h"
-#include "control.h"
+#include <mach/control.h>
#include "pm.h"
static bool sr_enable_on_init;
diff --git a/arch/arm/mach-omap2/usb-fs.c b/arch/arm/mach-omap2/usb-fs.c
index 1481078..94d471c 100644
--- a/arch/arm/mach-omap2/usb-fs.c
+++ b/arch/arm/mach-omap2/usb-fs.c
@@ -32,7 +32,7 @@
#include <plat/usb.h>
#include <plat/board.h>
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 4dc60e8..d2f0644 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -34,7 +34,7 @@
#include "prm44xx.h"
#include "prcm44xx.h"
#include "prminst44xx.h"
-#include "control.h"
+#include <mach/control.h>
#include "voltage.h"
#include "powerdomain.h"
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 02/11] ARM: OMAP: expose control.h to mach area
@ 2012-05-25 8:25 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: linux-arm-kernel
This patch exposes the definitions under control.h to
drivers outside the machine code.
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/am35xx-emac.c | 2 +-
arch/arm/mach-omap2/board-3430sdp.c | 2 +-
arch/arm/mach-omap2/board-4430sdp.c | 2 +-
arch/arm/mach-omap2/board-am3517crane.c | 2 +-
arch/arm/mach-omap2/board-am3517evm.c | 2 +-
arch/arm/mach-omap2/board-apollon.c | 2 +-
arch/arm/mach-omap2/board-cm-t3517.c | 2 +-
arch/arm/mach-omap2/board-h4.c | 2 +-
arch/arm/mach-omap2/board-igep0020.c | 2 +-
arch/arm/mach-omap2/board-ldp.c | 2 +-
arch/arm/mach-omap2/board-omap3logic.c | 2 +-
arch/arm/mach-omap2/board-omap4panda.c | 2 +-
arch/arm/mach-omap2/board-omap4pcm049.c | 2 +-
arch/arm/mach-omap2/clock2420_data.c | 2 +-
arch/arm/mach-omap2/clock2430_data.c | 2 +-
arch/arm/mach-omap2/clock3xxx_data.c | 2 +-
arch/arm/mach-omap2/clock44xx_data.c | 2 +-
arch/arm/mach-omap2/common.c | 2 +-
arch/arm/mach-omap2/control.c | 2 +-
arch/arm/mach-omap2/cpuidle34xx.c | 2 +-
arch/arm/mach-omap2/devices.c | 2 +-
arch/arm/mach-omap2/display.c | 2 +-
arch/arm/mach-omap2/hsmmc.c | 2 +-
arch/arm/mach-omap2/id.c | 2 +-
arch/arm/mach-omap2/{ => include/mach}/control.h | 2 +-
arch/arm/mach-omap2/mcbsp.c | 2 +-
arch/arm/mach-omap2/mux.c | 2 +-
arch/arm/mach-omap2/omap_phy_internal.c | 2 +-
arch/arm/mach-omap2/opp3xxx_data.c | 2 +-
arch/arm/mach-omap2/opp4xxx_data.c | 2 +-
arch/arm/mach-omap2/pm24xx.c | 2 +-
arch/arm/mach-omap2/pm34xx.c | 2 +-
arch/arm/mach-omap2/prcm.c | 2 +-
arch/arm/mach-omap2/serial.c | 2 +-
arch/arm/mach-omap2/sleep34xx.S | 2 +-
arch/arm/mach-omap2/sr_device.c | 2 +-
arch/arm/mach-omap2/usb-fs.c | 2 +-
arch/arm/mach-omap2/voltage.c | 2 +-
38 files changed, 38 insertions(+), 38 deletions(-)
rename arch/arm/mach-omap2/{ => include/mach}/control.h (99%)
diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c
index 447682c..c3da28a 100644
--- a/arch/arm/mach-omap2/am35xx-emac.c
+++ b/arch/arm/mach-omap2/am35xx-emac.c
@@ -21,7 +21,7 @@
#include <plat/irqs.h>
#include <mach/am35xx.h>
-#include "control.h"
+#include <mach/control.h>
static struct mdio_platform_data am35xx_emac_mdio_pdata;
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 37abb0d..ad1132b 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -46,7 +46,7 @@
#include "sdram-qimonda-hyb18m512160af-6.h"
#include "hsmmc.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#define CONFIG_DISABLE_HFCLK 1
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 94af6cd..8f7f76b 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -47,7 +47,7 @@
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#define ETH_KS8851_IRQ 34
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 3b8a53c..2ad514d 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -32,7 +32,7 @@
#include "am35xx-emac.h"
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#define GPIO_USB_POWER 35
#define GPIO_USB_NRESET 38
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 99790eb..bef6586 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -41,7 +41,7 @@
#include "am35xx-emac.h"
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "hsmmc.h"
#define LCD_PANEL_PWR 176
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 768ece2..bd04fe2 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -44,7 +44,7 @@
#include <video/omap-panel-generic-dpi.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
/* LED & Switch macros */
#define LED0_GPIO13 13
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 9e66e16..1d2b7a3 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -47,7 +47,7 @@
#include <mach/am35xx.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#include "am35xx-emac.h"
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 0bbbabe..623a231 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -43,7 +43,7 @@
#include <video/omap-panel-generic-dpi.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#define H4_FLASH_CS 0
#define H4_SMC91X_CS 1
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 7a27409..ebef044 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -42,7 +42,7 @@
#include "sdram-numonyx-m65kxxxxam.h"
#include "common-board-devices.h"
#include "board-flash.h"
-#include "control.h"
+#include <mach/control.h>
#define IGEP2_SMSC911X_CS 5
#define IGEP2_SMSC911X_GPIO 176
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 1b60495..6383a76 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -50,7 +50,7 @@
#include "board-flash.h"
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#define LDP_SMSC911X_CS 1
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index c008bf8..ca3e075 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -37,7 +37,7 @@
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#include <plat/mux.h>
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 847a857..b1c8517 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -45,7 +45,7 @@
#include <video/omap-panel-tfp410.h>
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#include "common-board-devices.h"
diff --git a/arch/arm/mach-omap2/board-omap4pcm049.c b/arch/arm/mach-omap2/board-omap4pcm049.c
index a95f426..101e984 100644
--- a/arch/arm/mach-omap2/board-omap4pcm049.c
+++ b/arch/arm/mach-omap2/board-omap4pcm049.c
@@ -48,7 +48,7 @@
#include "common.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#include "common-board-devices.h"
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index bace930..f350e96 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -30,7 +30,7 @@
#include "prm-regbits-24xx.h"
#include "cm-regbits-24xx.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
#define OMAP_CM_REGADDR OMAP2420_CM_REGADDR
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 3b4d09a..dd08bcb 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -29,7 +29,7 @@
#include "prm-regbits-24xx.h"
#include "cm-regbits-24xx.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
#define OMAP_CM_REGADDR OMAP2430_CM_REGADDR
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 4e1a3b0..694625f 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -34,7 +34,7 @@
#include "cm-regbits-34xx.h"
#include "prm2xxx_3xxx.h"
#include "prm-regbits-34xx.h"
-#include "control.h"
+#include <mach/control.h>
/*
* clocks
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 2172f66..ce11ee4 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -39,7 +39,7 @@
#include "cm-regbits-44xx.h"
#include "prm44xx.h"
#include "prm-regbits-44xx.h"
-#include "control.h"
+#include <mach/control.h>
#include "scrm44xx.h"
/* OMAP4 modulemode control */
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 8a6953a..3dc94d0 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -25,7 +25,7 @@
#include "iomap.h"
#include "common.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
/* Global address base setup code */
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 08e674b..92e35bf 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -26,7 +26,7 @@
#include "cm2xxx_3xxx.h"
#include "sdrc.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
/* Used by omap3_ctrl_save_padconf() */
#define START_PADCONF_SAVE 0x2
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 207bc1c..7d82c6bb 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -33,7 +33,7 @@
#include "clockdomain.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
#include "common.h"
#ifdef CONFIG_CPU_IDLE
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 7b4b932..152c266 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -34,7 +34,7 @@
#include <plat/omap4-keypad.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "devices.h"
#define L3_MODULES_MAX_LEN 12
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index db5a88a..0681407 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -32,7 +32,7 @@
#include "iomap.h"
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "display.h"
#define DISPC_CONTROL 0x0040
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index be697d4..33b3d62 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -22,7 +22,7 @@
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 0389b32..5bb9746 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -26,7 +26,7 @@
#include <mach/id.h>
-#include "control.h"
+#include <mach/control.h>
static unsigned int omap_revision;
static const char *cpu_rev;
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/include/mach/control.h
similarity index 99%
rename from arch/arm/mach-omap2/control.h
rename to arch/arm/mach-omap2/include/mach/control.h
index dad2903..cf42764 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/include/mach/control.h
@@ -1,5 +1,5 @@
/*
- * arch/arm/mach-omap2/control.h
+ * arch/arm/mach-omap2/include/mach/control.h
*
* OMAP2/3/4 System Control Module definitions
*
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 577cb77..0367035 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -25,7 +25,7 @@
#include <plat/omap_device.h>
#include <linux/pm_runtime.h>
-#include "control.h"
+#include <mach/control.h>
/*
* FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 3268ee2..f23e6618 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -38,7 +38,7 @@
#include <plat/omap_hwmod.h>
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#include "prm.h"
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 4c90477..b2c9253 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -29,7 +29,7 @@
#include <linux/usb.h>
#include <plat/usb.h>
-#include "control.h"
+#include <mach/control.h>
/* OMAP control module register for UTMI PHY */
#define CONTROL_DEV_CONF 0x300
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c
index d95f3f9..6dafdbb 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -21,7 +21,7 @@
#include <plat/cpu.h>
-#include "control.h"
+#include <mach/control.h>
#include "omap_opp_data.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c
index 2293ba2..27f823c 100644
--- a/arch/arm/mach-omap2/opp4xxx_data.c
+++ b/arch/arm/mach-omap2/opp4xxx_data.c
@@ -22,7 +22,7 @@
#include <plat/cpu.h>
-#include "control.h"
+#include <mach/control.h>
#include "omap_opp_data.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index facfffc..7ebca30 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -49,7 +49,7 @@
#include "cm-regbits-24xx.h"
#include "sdrc.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
#include "powerdomain.h"
#include "clockdomain.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 8b43aef..1d2a51c 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -49,7 +49,7 @@
#include "prm2xxx_3xxx.h"
#include "pm.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
/* pm34xx errata defined in pm.h */
u16 pm34xx_errata;
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 480f40a..fff0b09 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -37,7 +37,7 @@
#include "prminst44xx.h"
#include "prm-regbits-24xx.h"
#include "prm-regbits-44xx.h"
-#include "control.h"
+#include <mach/control.h>
void __iomem *prm_base;
void __iomem *cm_base;
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 678dd1d..97b09da5 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -39,7 +39,7 @@
#include "pm.h"
#include "cm2xxx_3xxx.h"
#include "prm-regbits-34xx.h"
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
/*
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 1f62f23..b3f6bfc 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -33,7 +33,7 @@
#include "cm2xxx_3xxx.h"
#include "prm2xxx_3xxx.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
/*
* Registers access definitions
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index a503e1e..48a01f6 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -26,7 +26,7 @@
#include "smartreflex.h"
#include "voltage.h"
-#include "control.h"
+#include <mach/control.h>
#include "pm.h"
static bool sr_enable_on_init;
diff --git a/arch/arm/mach-omap2/usb-fs.c b/arch/arm/mach-omap2/usb-fs.c
index 1481078..94d471c 100644
--- a/arch/arm/mach-omap2/usb-fs.c
+++ b/arch/arm/mach-omap2/usb-fs.c
@@ -32,7 +32,7 @@
#include <plat/usb.h>
#include <plat/board.h>
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 4dc60e8..d2f0644 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -34,7 +34,7 @@
#include "prm44xx.h"
#include "prcm44xx.h"
#include "prminst44xx.h"
-#include "control.h"
+#include <mach/control.h>
#include "voltage.h"
#include "powerdomain.h"
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 03/11] arm: omap: device: create a device for system control module
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 8:25 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin
From: Kishon Vijay Abraham I <kishon@ti.com>
Extracts the device data from hwmod database and create a platform device
using omap device build.
The device build is done during postcore_initcall.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/devices.c | 26 ++++++++++++++++++++++++++
1 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 152c266..9332673 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -40,6 +40,32 @@
#define L3_MODULES_MAX_LEN 12
#define L3_MODULES 3
+static int omap_init_control(void)
+{
+ struct omap_hwmod *oh;
+ struct platform_device *pdev;
+ const char *oh_name, *name;
+
+ oh_name = "ctrl_module_core";
+ name = "omap-control-core";
+
+ oh = omap_hwmod_lookup(oh_name);
+ if (!oh) {
+ pr_err("Could not lookup hwmod for %s\n", oh_name);
+ return PTR_ERR(oh);
+ }
+
+ pdev = omap_device_build(name, -1, oh, NULL, 0, NULL, 0, true);
+ if (IS_ERR(pdev)) {
+ pr_err("Could not build omap_device for %s %s\n",
+ name, oh_name);
+ return PTR_ERR(pdev);
+ }
+
+ return 0;
+}
+postcore_initcall(omap_init_control);
+
static int __init omap3_l3_init(void)
{
struct omap_hwmod *oh;
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 03/11] arm: omap: device: create a device for system control module
@ 2012-05-25 8:25 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: linux-arm-kernel
From: Kishon Vijay Abraham I <kishon@ti.com>
Extracts the device data from hwmod database and create a platform device
using omap device build.
The device build is done during postcore_initcall.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/devices.c | 26 ++++++++++++++++++++++++++
1 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 152c266..9332673 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -40,6 +40,32 @@
#define L3_MODULES_MAX_LEN 12
#define L3_MODULES 3
+static int omap_init_control(void)
+{
+ struct omap_hwmod *oh;
+ struct platform_device *pdev;
+ const char *oh_name, *name;
+
+ oh_name = "ctrl_module_core";
+ name = "omap-control-core";
+
+ oh = omap_hwmod_lookup(oh_name);
+ if (!oh) {
+ pr_err("Could not lookup hwmod for %s\n", oh_name);
+ return PTR_ERR(oh);
+ }
+
+ pdev = omap_device_build(name, -1, oh, NULL, 0, NULL, 0, true);
+ if (IS_ERR(pdev)) {
+ pr_err("Could not build omap_device for %s %s\n",
+ name, oh_name);
+ return PTR_ERR(pdev);
+ }
+
+ return 0;
+}
+postcore_initcall(omap_init_control);
+
static int __init omap3_l3_init(void)
{
struct omap_hwmod *oh;
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 04/11] OMAP: Add early device for system control module
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 8:25 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin
This is a way to add an early device for system control module.
the code is also requesting for driver registration and probing.
Done at early_initcall because at that time, ioremapping is possible.
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/devices.c | 29 +++++++++++++++++++++++++++++
1 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 9332673..58cc5c3 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -40,6 +40,35 @@
#define L3_MODULES_MAX_LEN 12
#define L3_MODULES 3
+static struct resource control_resources[] = {
+ [0] = {
+ .start = 0x4a002000,
+ .end = 0x4a0027ff,
+ .flags = IORESOURCE_MEM,
+ },
+};
+static struct platform_device control_device = {
+ .name = "omap-control-core",
+ .id = 0,
+ .resource = control_resources,
+ .num_resources = ARRAY_SIZE(control_resources),
+};
+
+static struct platform_device *early_devices[] __initdata = {
+ &control_device,
+};
+
+static int __init plat_early_device_setup(void)
+{
+ early_platform_add_devices(early_devices,
+ ARRAY_SIZE(early_devices));
+ early_platform_driver_register_all("early_omap_control");
+ early_platform_driver_probe("early_omap_control", 1, false);
+
+ return 0;
+}
+early_initcall(plat_early_device_setup);
+
static int omap_init_control(void)
{
struct omap_hwmod *oh;
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 04/11] OMAP: Add early device for system control module
@ 2012-05-25 8:25 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: linux-arm-kernel
This is a way to add an early device for system control module.
the code is also requesting for driver registration and probing.
Done at early_initcall because at that time, ioremapping is possible.
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/devices.c | 29 +++++++++++++++++++++++++++++
1 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 9332673..58cc5c3 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -40,6 +40,35 @@
#define L3_MODULES_MAX_LEN 12
#define L3_MODULES 3
+static struct resource control_resources[] = {
+ [0] = {
+ .start = 0x4a002000,
+ .end = 0x4a0027ff,
+ .flags = IORESOURCE_MEM,
+ },
+};
+static struct platform_device control_device = {
+ .name = "omap-control-core",
+ .id = 0,
+ .resource = control_resources,
+ .num_resources = ARRAY_SIZE(control_resources),
+};
+
+static struct platform_device *early_devices[] __initdata = {
+ &control_device,
+};
+
+static int __init plat_early_device_setup(void)
+{
+ early_platform_add_devices(early_devices,
+ ARRAY_SIZE(early_devices));
+ early_platform_driver_register_all("early_omap_control");
+ early_platform_driver_probe("early_omap_control", 1, false);
+
+ return 0;
+}
+early_initcall(plat_early_device_setup);
+
static int omap_init_control(void)
{
struct omap_hwmod *oh;
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 8:25 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin, J Keerthy
This patch introduces a MFD core device driver for
OMAP system control module.
The control module allows software control of
various static modes supported by the device. It is
composed of two control submodules: general control
module and device (padconfiguration) control
module.
In this patch, the children defined are for:
. USB-phy pin control
. Bangap temperature sensor
Device driver is probed with postcore_initcall.
However, as some of the APIs exposed by this driver
may be needed in very early init phase, an early init
class is also available: "early_omap_control".
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
.../devicetree/bindings/mfd/omap_control.txt | 44 ++++
arch/arm/mach-omap2/Kconfig | 1 +
arch/arm/plat-omap/Kconfig | 3 +
drivers/mfd/Kconfig | 9 +
drivers/mfd/Makefile | 1 +
drivers/mfd/omap-control-core.c | 211 ++++++++++++++++++++
include/linux/mfd/omap_control.h | 69 +++++++
7 files changed, 338 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
create mode 100644 drivers/mfd/omap-control-core.c
create mode 100644 include/linux/mfd/omap_control.h
diff --git a/Documentation/devicetree/bindings/mfd/omap_control.txt b/Documentation/devicetree/bindings/mfd/omap_control.txt
new file mode 100644
index 0000000..46d5e7e
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/omap_control.txt
@@ -0,0 +1,44 @@
+* Texas Instrument OMAP System Control Module (SCM) bindings
+
+The control module allows software control of various static modes supported by
+the device. The control module controls the settings of various device modules
+through register configuration and internal signals. It also controls the pad
+configuration, pin functional multiplexing, and the routing of internal signals
+(such as PRCM signals or DMA requests) to output pins configured for hardware
+observability.
+
+Required properties:
+- compatible : Should be:
+ - "ti,omap3-control" for OMAP3 support
+ - "ti,omap4-control" for OMAP4 support
+ - "ti,omap5-control" for OMAP5 support
+
+OMAP specific properties:
+- ti,hwmods: Name of the hwmod associated to the control module:
+ Should be "ctrl_module_core";
+
+Sub-nodes:
+- bandgap : contains the bandgap node
+
+ The bindings details of individual bandgap device can be found in:
+ Documentation/devicetree/bindings/thermal/omap_bandgap.txt
+
+- usb : contains the usb phy pin control node
+
+ The only required property for this child is:
+ - compatible = "ti,omap4-control-usb";
+
+Examples:
+
+ctrl_module_core: ctrl_module_core@4a002000 {
+ compatible = "ti,omap4-control";
+ ti,hwmods = "ctrl_module_core";
+ bandgap {
+ compatible = "ti,omap4460-bandgap";
+ interrupts = <0 126 4>; /* talert */
+ ti,tshut-gpio = <86>; /* tshut */
+ };
+ usb {
+ compatible = "ti,omap4-usb-phy";
+ };
+};
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index a2b946d..7dfe5e1 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -52,6 +52,7 @@ config ARCH_OMAP4
select PL310_ERRATA_727915
select ARM_ERRATA_720789
select ARCH_HAS_OPP
+ select ARCH_HAS_CONTROL_MODULE
select PM_OPP if PM
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select ARM_CPU_SUSPEND if PM
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index ad95c7a..222dbad 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -5,6 +5,9 @@ menu "TI OMAP Common Features"
config ARCH_OMAP_OTG
bool
+config ARCH_HAS_CONTROL_MODULE
+ bool
+
choice
prompt "OMAP System Type"
default ARCH_OMAP2PLUS
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 11e4438..25a66d8 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -795,6 +795,15 @@ config MFD_WL1273_CORE
driver connects the radio-wl1273 V4L2 module and the wl1273
audio codec.
+config MFD_OMAP_CONTROL
+ bool "Texas Instruments OMAP System control module"
+ depends on ARCH_HAS_CONTROL_MODULE
+ help
+ This is the core driver for system control module. This driver
+ is responsible for creating the control module mfd child,
+ like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
+ change for off mode.
+
config MFD_OMAP_USB_HOST
bool "Support OMAP USBHS core driver"
depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 05fa538..00f99d6 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -106,6 +106,7 @@ obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
obj-$(CONFIG_MFD_VX855) += vx855.o
obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
+obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
diff --git a/drivers/mfd/omap-control-core.c b/drivers/mfd/omap-control-core.c
new file mode 100644
index 0000000..7d8d408
--- /dev/null
+++ b/drivers/mfd/omap-control-core.c
@@ -0,0 +1,211 @@
+/*
+ * OMAP system control module driver file
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Contacts:
+ * Based on original code written by:
+ * J Keerthy <j-keerthy@ti.com>
+ * Moiz Sonasath <m-sonasath@ti.com>
+ * MFD clean up and re-factoring:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/export.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/err.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/omap_control.h>
+
+static struct omap_control *omap_control_module;
+
+/**
+ * omap_control_readl: Read a single omap control module register.
+ *
+ * @dev: device to read from.
+ * @reg: register to read.
+ * @val: output with register value.
+ *
+ * returns 0 on success or -EINVAL in case struct device is invalid.
+ */
+int omap_control_readl(struct device *dev, u32 reg, u32 *val)
+{
+ struct omap_control *omap_control = dev_get_drvdata(dev);
+
+ if (!omap_control)
+ return -EINVAL;
+
+ *val = readl(omap_control->base + reg);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(omap_control_readl);
+
+/**
+ * omap_control_writel: Write a single omap control module register.
+ *
+ * @dev: device to read from.
+ * @val: value to write.
+ * @reg: register to write to.
+ *
+ * returns 0 on success or -EINVAL in case struct device is invalid.
+ */
+int omap_control_writel(struct device *dev, u32 val, u32 reg)
+{
+ struct omap_control *omap_control = dev_get_drvdata(dev);
+ unsigned long flags;
+
+ if (!omap_control)
+ return -EINVAL;
+
+ spin_lock_irqsave(&omap_control->reg_lock, flags);
+ writel(val, omap_control->base + reg);
+ spin_unlock_irqrestore(&omap_control->reg_lock, flags);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(omap_control_writel);
+
+/**
+ * omap_control_get: returns the control module device pinter
+ *
+ * The modules which has to use control module API's to read or write should
+ * call this API to get the control module device pointer.
+ */
+struct device *omap_control_get(void)
+{
+ unsigned long flags;
+
+ if (!omap_control_module)
+ return ERR_PTR(-ENODEV);
+
+ spin_lock_irqsave(&omap_control_module->reg_lock, flags);
+ omap_control_module->use_count++;
+ spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
+
+ return omap_control_module->dev;
+}
+EXPORT_SYMBOL_GPL(omap_control_get);
+
+/**
+ * omap_control_put: returns the control module device pinter
+ *
+ * The modules which has to use control module API's to read or write should
+ * call this API to get the control module device pointer.
+ */
+void omap_control_put(struct device *dev)
+{
+ struct omap_control *omap_control = dev_get_drvdata(dev);
+ unsigned long flags;
+
+ if (!omap_control)
+ return;
+
+ spin_lock_irqsave(&omap_control->reg_lock, flags);
+ omap_control->use_count--;
+ spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
+}
+EXPORT_SYMBOL_GPL(omap_control_put);
+
+static const struct of_device_id of_omap_control_match[] = {
+ { .compatible = "ti,omap3-control", },
+ { .compatible = "ti,omap4-control", },
+ { .compatible = "ti,omap5-control", },
+ { },
+};
+
+static int __devinit omap_control_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ void __iomem *base;
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct omap_control *omap_control;
+
+ omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
+ if (!omap_control) {
+ dev_err(dev, "not enough memory for omap_control\n");
+ return -ENOMEM;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(dev, "missing memory base resource\n");
+ return -EINVAL;
+ }
+
+ base = devm_request_and_ioremap(dev, res);
+ if (!base) {
+ dev_err(dev, "ioremap failed\n");
+ return -EADDRNOTAVAIL;
+ }
+
+ omap_control->base = base;
+ omap_control->dev = dev;
+ spin_lock_init(&omap_control->reg_lock);
+
+ platform_set_drvdata(pdev, omap_control);
+ omap_control_module = omap_control;
+
+ return of_platform_populate(np, of_omap_control_match, NULL, dev);
+}
+
+static int __devexit omap_control_remove(struct platform_device *pdev)
+{
+ struct omap_control *omap_control = platform_get_drvdata(pdev);
+
+ spin_lock(&omap_control->reg_lock);
+ if (omap_control->use_count > 0) {
+ spin_unlock(&omap_control->reg_lock);
+ dev_err(&pdev->dev, "device removed while still being used\n");
+ return -EBUSY;
+ }
+ spin_unlock(&omap_control->reg_lock);
+
+ iounmap(omap_control->base);
+ platform_set_drvdata(pdev, NULL);
+
+ return 0;
+}
+
+static struct platform_driver omap_control_driver = {
+ .probe = omap_control_probe,
+ .remove = __devexit_p(omap_control_remove),
+ .driver = {
+ .name = "omap-control-core",
+ .owner = THIS_MODULE,
+ .of_match_table = of_omap_control_match,
+ },
+};
+
+static int __init omap_control_init(void)
+{
+ return platform_driver_register(&omap_control_driver);
+}
+postcore_initcall_sync(omap_control_init);
+
+static void __exit omap_control_exit(void)
+{
+ platform_driver_unregister(&omap_control_driver);
+}
+module_exit(omap_control_exit);
+early_platform_init("early_omap_control", &omap_control_driver);
+
+MODULE_DESCRIPTION("OMAP system control module driver");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:omap-control-core");
+MODULE_AUTHOR("Texas Instruments Inc.");
diff --git a/include/linux/mfd/omap_control.h b/include/linux/mfd/omap_control.h
new file mode 100644
index 0000000..7a33eda
--- /dev/null
+++ b/include/linux/mfd/omap_control.h
@@ -0,0 +1,69 @@
+/*
+ * OMAP system control module header file
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Contact:
+ * J Keerthy <j-keerthy@ti.com>
+ * Moiz Sonasath <m-sonasath@ti.com>
+ * Abraham, Kishon Vijay <kishon@ti.com>
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ */
+
+#ifndef __DRIVERS_OMAP_CONTROL_H
+#define __DRIVERS_OMAP_CONTROL_H
+
+#include <linux/err.h>
+
+/**
+ * struct system control module - scm device structure
+ * @dev: device pointer
+ * @base: Base of the temp I/O
+ * @reg_lock: protect omap_control structure
+ * @use_count: track API users
+ */
+struct omap_control {
+ struct device *dev;
+ void __iomem *base;
+ /* protect this data structure and register access */
+ spinlock_t reg_lock;
+ int use_count;
+};
+
+/* TODO: Add helpers for 16bit and byte access */
+#ifdef CONFIG_MFD_OMAP_CONTROL
+extern int omap_control_readl(struct device *dev, u32 reg, u32 *val);
+extern int omap_control_writel(struct device *dev, u32 val, u32 reg);
+extern struct device *omap_control_get(void);
+extern void omap_control_put(struct device *dev);
+#else
+static inline int omap_control_readl(struct device *dev, u32 reg, u32 *val)
+{
+ return 0;
+}
+
+static inline int omap_control_writel(struct device *dev, u32 val, u32 reg)
+{
+ return 0;
+}
+
+static inline struct device *omap_control_get(void)
+{
+ return ERR_PTR(-EINVAL);
+}
+
+static inline void omap_control_put(struct device *dev)
+{
+}
+#endif
+
+#endif /* __DRIVERS_OMAP_CONTROL_H */
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-05-25 8:25 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: linux-arm-kernel
This patch introduces a MFD core device driver for
OMAP system control module.
The control module allows software control of
various static modes supported by the device. It is
composed of two control submodules: general control
module and device (padconfiguration) control
module.
In this patch, the children defined are for:
. USB-phy pin control
. Bangap temperature sensor
Device driver is probed with postcore_initcall.
However, as some of the APIs exposed by this driver
may be needed in very early init phase, an early init
class is also available: "early_omap_control".
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
.../devicetree/bindings/mfd/omap_control.txt | 44 ++++
arch/arm/mach-omap2/Kconfig | 1 +
arch/arm/plat-omap/Kconfig | 3 +
drivers/mfd/Kconfig | 9 +
drivers/mfd/Makefile | 1 +
drivers/mfd/omap-control-core.c | 211 ++++++++++++++++++++
include/linux/mfd/omap_control.h | 69 +++++++
7 files changed, 338 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
create mode 100644 drivers/mfd/omap-control-core.c
create mode 100644 include/linux/mfd/omap_control.h
diff --git a/Documentation/devicetree/bindings/mfd/omap_control.txt b/Documentation/devicetree/bindings/mfd/omap_control.txt
new file mode 100644
index 0000000..46d5e7e
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/omap_control.txt
@@ -0,0 +1,44 @@
+* Texas Instrument OMAP System Control Module (SCM) bindings
+
+The control module allows software control of various static modes supported by
+the device. The control module controls the settings of various device modules
+through register configuration and internal signals. It also controls the pad
+configuration, pin functional multiplexing, and the routing of internal signals
+(such as PRCM signals or DMA requests) to output pins configured for hardware
+observability.
+
+Required properties:
+- compatible : Should be:
+ - "ti,omap3-control" for OMAP3 support
+ - "ti,omap4-control" for OMAP4 support
+ - "ti,omap5-control" for OMAP5 support
+
+OMAP specific properties:
+- ti,hwmods: Name of the hwmod associated to the control module:
+ Should be "ctrl_module_core";
+
+Sub-nodes:
+- bandgap : contains the bandgap node
+
+ The bindings details of individual bandgap device can be found in:
+ Documentation/devicetree/bindings/thermal/omap_bandgap.txt
+
+- usb : contains the usb phy pin control node
+
+ The only required property for this child is:
+ - compatible = "ti,omap4-control-usb";
+
+Examples:
+
+ctrl_module_core: ctrl_module_core at 4a002000 {
+ compatible = "ti,omap4-control";
+ ti,hwmods = "ctrl_module_core";
+ bandgap {
+ compatible = "ti,omap4460-bandgap";
+ interrupts = <0 126 4>; /* talert */
+ ti,tshut-gpio = <86>; /* tshut */
+ };
+ usb {
+ compatible = "ti,omap4-usb-phy";
+ };
+};
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index a2b946d..7dfe5e1 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -52,6 +52,7 @@ config ARCH_OMAP4
select PL310_ERRATA_727915
select ARM_ERRATA_720789
select ARCH_HAS_OPP
+ select ARCH_HAS_CONTROL_MODULE
select PM_OPP if PM
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select ARM_CPU_SUSPEND if PM
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index ad95c7a..222dbad 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -5,6 +5,9 @@ menu "TI OMAP Common Features"
config ARCH_OMAP_OTG
bool
+config ARCH_HAS_CONTROL_MODULE
+ bool
+
choice
prompt "OMAP System Type"
default ARCH_OMAP2PLUS
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 11e4438..25a66d8 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -795,6 +795,15 @@ config MFD_WL1273_CORE
driver connects the radio-wl1273 V4L2 module and the wl1273
audio codec.
+config MFD_OMAP_CONTROL
+ bool "Texas Instruments OMAP System control module"
+ depends on ARCH_HAS_CONTROL_MODULE
+ help
+ This is the core driver for system control module. This driver
+ is responsible for creating the control module mfd child,
+ like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
+ change for off mode.
+
config MFD_OMAP_USB_HOST
bool "Support OMAP USBHS core driver"
depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 05fa538..00f99d6 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -106,6 +106,7 @@ obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
obj-$(CONFIG_MFD_VX855) += vx855.o
obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
+obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
diff --git a/drivers/mfd/omap-control-core.c b/drivers/mfd/omap-control-core.c
new file mode 100644
index 0000000..7d8d408
--- /dev/null
+++ b/drivers/mfd/omap-control-core.c
@@ -0,0 +1,211 @@
+/*
+ * OMAP system control module driver file
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Contacts:
+ * Based on original code written by:
+ * J Keerthy <j-keerthy@ti.com>
+ * Moiz Sonasath <m-sonasath@ti.com>
+ * MFD clean up and re-factoring:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/export.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/err.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/omap_control.h>
+
+static struct omap_control *omap_control_module;
+
+/**
+ * omap_control_readl: Read a single omap control module register.
+ *
+ * @dev: device to read from.
+ * @reg: register to read.
+ * @val: output with register value.
+ *
+ * returns 0 on success or -EINVAL in case struct device is invalid.
+ */
+int omap_control_readl(struct device *dev, u32 reg, u32 *val)
+{
+ struct omap_control *omap_control = dev_get_drvdata(dev);
+
+ if (!omap_control)
+ return -EINVAL;
+
+ *val = readl(omap_control->base + reg);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(omap_control_readl);
+
+/**
+ * omap_control_writel: Write a single omap control module register.
+ *
+ * @dev: device to read from.
+ * @val: value to write.
+ * @reg: register to write to.
+ *
+ * returns 0 on success or -EINVAL in case struct device is invalid.
+ */
+int omap_control_writel(struct device *dev, u32 val, u32 reg)
+{
+ struct omap_control *omap_control = dev_get_drvdata(dev);
+ unsigned long flags;
+
+ if (!omap_control)
+ return -EINVAL;
+
+ spin_lock_irqsave(&omap_control->reg_lock, flags);
+ writel(val, omap_control->base + reg);
+ spin_unlock_irqrestore(&omap_control->reg_lock, flags);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(omap_control_writel);
+
+/**
+ * omap_control_get: returns the control module device pinter
+ *
+ * The modules which has to use control module API's to read or write should
+ * call this API to get the control module device pointer.
+ */
+struct device *omap_control_get(void)
+{
+ unsigned long flags;
+
+ if (!omap_control_module)
+ return ERR_PTR(-ENODEV);
+
+ spin_lock_irqsave(&omap_control_module->reg_lock, flags);
+ omap_control_module->use_count++;
+ spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
+
+ return omap_control_module->dev;
+}
+EXPORT_SYMBOL_GPL(omap_control_get);
+
+/**
+ * omap_control_put: returns the control module device pinter
+ *
+ * The modules which has to use control module API's to read or write should
+ * call this API to get the control module device pointer.
+ */
+void omap_control_put(struct device *dev)
+{
+ struct omap_control *omap_control = dev_get_drvdata(dev);
+ unsigned long flags;
+
+ if (!omap_control)
+ return;
+
+ spin_lock_irqsave(&omap_control->reg_lock, flags);
+ omap_control->use_count--;
+ spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
+}
+EXPORT_SYMBOL_GPL(omap_control_put);
+
+static const struct of_device_id of_omap_control_match[] = {
+ { .compatible = "ti,omap3-control", },
+ { .compatible = "ti,omap4-control", },
+ { .compatible = "ti,omap5-control", },
+ { },
+};
+
+static int __devinit omap_control_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ void __iomem *base;
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct omap_control *omap_control;
+
+ omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
+ if (!omap_control) {
+ dev_err(dev, "not enough memory for omap_control\n");
+ return -ENOMEM;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(dev, "missing memory base resource\n");
+ return -EINVAL;
+ }
+
+ base = devm_request_and_ioremap(dev, res);
+ if (!base) {
+ dev_err(dev, "ioremap failed\n");
+ return -EADDRNOTAVAIL;
+ }
+
+ omap_control->base = base;
+ omap_control->dev = dev;
+ spin_lock_init(&omap_control->reg_lock);
+
+ platform_set_drvdata(pdev, omap_control);
+ omap_control_module = omap_control;
+
+ return of_platform_populate(np, of_omap_control_match, NULL, dev);
+}
+
+static int __devexit omap_control_remove(struct platform_device *pdev)
+{
+ struct omap_control *omap_control = platform_get_drvdata(pdev);
+
+ spin_lock(&omap_control->reg_lock);
+ if (omap_control->use_count > 0) {
+ spin_unlock(&omap_control->reg_lock);
+ dev_err(&pdev->dev, "device removed while still being used\n");
+ return -EBUSY;
+ }
+ spin_unlock(&omap_control->reg_lock);
+
+ iounmap(omap_control->base);
+ platform_set_drvdata(pdev, NULL);
+
+ return 0;
+}
+
+static struct platform_driver omap_control_driver = {
+ .probe = omap_control_probe,
+ .remove = __devexit_p(omap_control_remove),
+ .driver = {
+ .name = "omap-control-core",
+ .owner = THIS_MODULE,
+ .of_match_table = of_omap_control_match,
+ },
+};
+
+static int __init omap_control_init(void)
+{
+ return platform_driver_register(&omap_control_driver);
+}
+postcore_initcall_sync(omap_control_init);
+
+static void __exit omap_control_exit(void)
+{
+ platform_driver_unregister(&omap_control_driver);
+}
+module_exit(omap_control_exit);
+early_platform_init("early_omap_control", &omap_control_driver);
+
+MODULE_DESCRIPTION("OMAP system control module driver");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:omap-control-core");
+MODULE_AUTHOR("Texas Instruments Inc.");
diff --git a/include/linux/mfd/omap_control.h b/include/linux/mfd/omap_control.h
new file mode 100644
index 0000000..7a33eda
--- /dev/null
+++ b/include/linux/mfd/omap_control.h
@@ -0,0 +1,69 @@
+/*
+ * OMAP system control module header file
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Contact:
+ * J Keerthy <j-keerthy@ti.com>
+ * Moiz Sonasath <m-sonasath@ti.com>
+ * Abraham, Kishon Vijay <kishon@ti.com>
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ */
+
+#ifndef __DRIVERS_OMAP_CONTROL_H
+#define __DRIVERS_OMAP_CONTROL_H
+
+#include <linux/err.h>
+
+/**
+ * struct system control module - scm device structure
+ * @dev: device pointer
+ * @base: Base of the temp I/O
+ * @reg_lock: protect omap_control structure
+ * @use_count: track API users
+ */
+struct omap_control {
+ struct device *dev;
+ void __iomem *base;
+ /* protect this data structure and register access */
+ spinlock_t reg_lock;
+ int use_count;
+};
+
+/* TODO: Add helpers for 16bit and byte access */
+#ifdef CONFIG_MFD_OMAP_CONTROL
+extern int omap_control_readl(struct device *dev, u32 reg, u32 *val);
+extern int omap_control_writel(struct device *dev, u32 val, u32 reg);
+extern struct device *omap_control_get(void);
+extern void omap_control_put(struct device *dev);
+#else
+static inline int omap_control_readl(struct device *dev, u32 reg, u32 *val)
+{
+ return 0;
+}
+
+static inline int omap_control_writel(struct device *dev, u32 val, u32 reg)
+{
+ return 0;
+}
+
+static inline struct device *omap_control_get(void)
+{
+ return ERR_PTR(-EINVAL);
+}
+
+static inline void omap_control_put(struct device *dev)
+{
+}
+#endif
+
+#endif /* __DRIVERS_OMAP_CONTROL_H */
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 06/11] OMAP2+: use control module mfd driver in omap_type
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 8:25 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin
OMAP system control module can be probed early, then
omap_type is safe to use its APIs.
TODO: add support for other omap versions
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/id.c | 16 +++++++++++++++-
1 files changed, 15 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 5bb9746..acfd698 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -18,6 +18,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
+#include <linux/mfd/omap_control.h>
#include <asm/cputype.h>
@@ -40,8 +41,14 @@ EXPORT_SYMBOL(omap_rev);
int omap_type(void)
{
+ struct device *scm;
+ int ret = 0;
u32 val = 0;
+ scm = omap_control_get();
+ if (IS_ERR_OR_NULL(scm))
+ return 0;
+
if (cpu_is_omap24xx()) {
val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
} else if (cpu_is_am33xx()) {
@@ -49,16 +56,23 @@ int omap_type(void)
} else if (cpu_is_omap34xx()) {
val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
} else if (cpu_is_omap44xx()) {
- val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
+ ret = omap_control_readl(scm, OMAP4_CTRL_MODULE_CORE_STATUS,
+ &val);
} else {
pr_err("Cannot detect omap type!\n");
goto out;
}
+ if (ret) {
+ pr_err("problem while fetching omap type\n");
+ goto out;
+ }
+
val &= OMAP2_DEVICETYPE_MASK;
val >>= 8;
out:
+ omap_control_put(scm);
return val;
}
EXPORT_SYMBOL(omap_type);
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 06/11] OMAP2+: use control module mfd driver in omap_type
@ 2012-05-25 8:25 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: linux-arm-kernel
OMAP system control module can be probed early, then
omap_type is safe to use its APIs.
TODO: add support for other omap versions
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/id.c | 16 +++++++++++++++-
1 files changed, 15 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 5bb9746..acfd698 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -18,6 +18,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
+#include <linux/mfd/omap_control.h>
#include <asm/cputype.h>
@@ -40,8 +41,14 @@ EXPORT_SYMBOL(omap_rev);
int omap_type(void)
{
+ struct device *scm;
+ int ret = 0;
u32 val = 0;
+ scm = omap_control_get();
+ if (IS_ERR_OR_NULL(scm))
+ return 0;
+
if (cpu_is_omap24xx()) {
val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
} else if (cpu_is_am33xx()) {
@@ -49,16 +56,23 @@ int omap_type(void)
} else if (cpu_is_omap34xx()) {
val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
} else if (cpu_is_omap44xx()) {
- val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
+ ret = omap_control_readl(scm, OMAP4_CTRL_MODULE_CORE_STATUS,
+ &val);
} else {
pr_err("Cannot detect omap type!\n");
goto out;
}
+ if (ret) {
+ pr_err("problem while fetching omap type\n");
+ goto out;
+ }
+
val &= OMAP2_DEVICETYPE_MASK;
val >>= 8;
out:
+ omap_control_put(scm);
return val;
}
EXPORT_SYMBOL(omap_type);
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 8:25 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin
Created a new platform driver for the platform device created by the
control module mfd core, wrt usb. This driver has API's to power on/off
the phy and the API's to write to musb mailbox.
(p.s. the mailbox for musb in omap4 is present in system control
module)
[kishon@ti.com: wrote the original API's related to USB functions]
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
drivers/usb/otg/Kconfig | 13 ++++
drivers/usb/otg/Makefile | 1 +
drivers/usb/otg/omap4-usb-phy.c | 130 +++++++++++++++++++++++++++++++++++++
include/linux/usb/omap4_usb_phy.h | 53 +++++++++++++++
4 files changed, 197 insertions(+), 0 deletions(-)
create mode 100644 drivers/usb/otg/omap4-usb-phy.c
create mode 100644 include/linux/usb/omap4_usb_phy.h
diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
index 5c87db0..e2840f1 100644
--- a/drivers/usb/otg/Kconfig
+++ b/drivers/usb/otg/Kconfig
@@ -78,6 +78,19 @@ config TWL6030_USB
are hooked to this driver through platform_data structure.
The definition of internal PHY APIs are in the mach-omap2 layer.
+config OMAP4_USB_PHY
+ tristate "Texas Instruments OMAP4+ USB pin control driver"
+ depends on MFD_OMAP_CONTROL
+ help
+ If you say yes here you get support for the Texas Instruments
+ OMAP4+ USB pin control driver. The register set is part of system
+ control module.
+
+ USB phy in OMAP configures control module register for powering on
+ the phy, configuring VBUSVALID, AVALID, IDDIG and SESSEND. For
+ performing the above mentioned configuration, API's are added in
+ by this children of the control module driver.
+
config NOP_USB_XCEIV
tristate "NOP USB Transceiver Driver"
select USB_OTG_UTILS
diff --git a/drivers/usb/otg/Makefile b/drivers/usb/otg/Makefile
index 41aa509..60c8c83 100644
--- a/drivers/usb/otg/Makefile
+++ b/drivers/usb/otg/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_USB_GPIO_VBUS) += gpio_vbus.o
obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o
obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o
obj-$(CONFIG_TWL6030_USB) += twl6030-usb.o
+obj-$(CONFIG_OMAP4_USB_PHY) += omap4-usb-phy.o
obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o
obj-$(CONFIG_USB_ULPI) += ulpi.o
obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi_viewport.o
diff --git a/drivers/usb/otg/omap4-usb-phy.c b/drivers/usb/otg/omap4-usb-phy.c
new file mode 100644
index 0000000..a29ea45
--- /dev/null
+++ b/drivers/usb/otg/omap4-usb-phy.c
@@ -0,0 +1,130 @@
+/*
+ * OMAP4 system control module driver, USB control children
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Contact:
+ * Kishon Vijay Abraham I <kishon@ti.com>
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/omap_control.h>
+#include <linux/usb/omap4_usb_phy.h>
+
+/**
+ * omap4_usb_phy_power - power on/off the phy using control module reg
+ * @dev: struct device *
+ * @on: 0 or 1, based on powering on or off the PHY
+ *
+ * omap_usb2 can call this API to power on or off the PHY.
+ */
+int omap4_usb_phy_power(struct device *dev, int on)
+{
+ u32 val;
+ int ret;
+
+ if (on) {
+ ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
+ if (!ret && (val & PHY_PD)) {
+ ret = omap_control_writel(dev, ~PHY_PD,
+ CONTROL_DEV_CONF);
+ /* XXX: add proper documentation for this delay */
+ mdelay(200);
+ }
+ } else {
+ ret = omap_control_writel(dev, PHY_PD, CONTROL_DEV_CONF);
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
+
+/**
+ * omap4_usb_phy_mailbox - write to usb otg mailbox
+ * @dev: struct device *
+ * @val: the value to be written to the mailbox
+ *
+ * On detection of a device (ID pin is grounded), the phy should call this API
+ * to set AVALID, VBUSVALID and ID pin is grounded.
+ *
+ * When OMAP is connected to a host (OMAP in device mode), the phy should call
+ * this API to set AVALID, VBUSVALID and ID pin in high impedance.
+ *
+ * The phy should call this API, if OMAP is disconnected from host or device.
+ */
+int omap4_usb_phy_mailbox(struct device *dev, u32 val)
+{
+ return omap_control_writel(dev, val, CONTROL_USBOTGHS_CONTROL);
+}
+EXPORT_SYMBOL_GPL(omap4_usb_phy_mailbox);
+
+static int __devinit omap_usb_phy_probe(struct platform_device *pdev)
+{
+ struct omap_control *omap_control;
+
+ omap_control = dev_get_drvdata(pdev->dev.parent);
+
+ if (!omap_control) {
+ dev_err(&pdev->dev, "no omap_control in our parent\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int __devexit omap_usb_phy_remove(struct platform_device *pdev)
+{
+ return 0;
+}
+
+static const struct of_device_id of_omap_usb_phy_match[] = {
+ { .compatible = "ti,omap4-usb-phy", },
+ { },
+};
+
+static struct platform_driver omap_usb_phy_driver = {
+ .probe = omap_usb_phy_probe,
+ .remove = __devexit_p(omap_usb_phy_remove),
+ .driver = {
+ .name = "omap4-usb-phy",
+ .owner = THIS_MODULE,
+ .of_match_table = of_omap_usb_phy_match,
+ },
+};
+
+static int __init omap_usb_phy_init(void)
+{
+ return platform_driver_register(&omap_usb_phy_driver);
+}
+postcore_initcall(omap_usb_phy_init);
+
+static void __exit omap_usb_phy_exit(void)
+{
+ platform_driver_unregister(&omap_usb_phy_driver);
+}
+module_exit(omap_usb_phy_exit);
+
+MODULE_DESCRIPTION("OMAP4+ USB-phy driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform: omap4-usb-phy");
+MODULE_AUTHOR("Texas Instrument Inc.");
diff --git a/include/linux/usb/omap4_usb_phy.h b/include/linux/usb/omap4_usb_phy.h
new file mode 100644
index 0000000..b6a4701
--- /dev/null
+++ b/include/linux/usb/omap4_usb_phy.h
@@ -0,0 +1,53 @@
+/*
+ * OMAP4 USB-phy
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Contact:
+ * Kishon Vijay Abraham I <kishon@ti.com>
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#ifndef __OMAP4_USB_PHY_H
+#define __OMAP4_USB_PHY_H
+
+#define PHY_PD 0x1
+#define AVALID BIT(0)
+#define BVALID BIT(1)
+#define VBUSVALID BIT(2)
+#define SESSEND BIT(3)
+#define IDDIG BIT(4)
+#define CONTROL_DEV_CONF 0x00000300
+#define CONTROL_USBOTGHS_CONTROL 0x0000033C
+
+/* USB-PHY helpers */
+#if (defined(CONFIG_OMAP4_USB_PHY)) || (defined(CONFIG_OMAP4_USB_PHY_MODULE))
+extern int omap4_usb_phy_mailbox(struct device *dev, u32 val);
+extern int omap4_usb_phy_power(struct device *dev, int on);
+#else
+static inline int omap4_usb_phy_mailbox(struct device *dev, u32 val)
+{
+ return 0;
+}
+static inline int omap4_usb_phy_power(struct device *dev, int on)
+{
+ return 0;
+}
+#endif
+
+#endif
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
@ 2012-05-25 8:25 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: linux-arm-kernel
Created a new platform driver for the platform device created by the
control module mfd core, wrt usb. This driver has API's to power on/off
the phy and the API's to write to musb mailbox.
(p.s. the mailbox for musb in omap4 is present in system control
module)
[kishon at ti.com: wrote the original API's related to USB functions]
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
drivers/usb/otg/Kconfig | 13 ++++
drivers/usb/otg/Makefile | 1 +
drivers/usb/otg/omap4-usb-phy.c | 130 +++++++++++++++++++++++++++++++++++++
include/linux/usb/omap4_usb_phy.h | 53 +++++++++++++++
4 files changed, 197 insertions(+), 0 deletions(-)
create mode 100644 drivers/usb/otg/omap4-usb-phy.c
create mode 100644 include/linux/usb/omap4_usb_phy.h
diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
index 5c87db0..e2840f1 100644
--- a/drivers/usb/otg/Kconfig
+++ b/drivers/usb/otg/Kconfig
@@ -78,6 +78,19 @@ config TWL6030_USB
are hooked to this driver through platform_data structure.
The definition of internal PHY APIs are in the mach-omap2 layer.
+config OMAP4_USB_PHY
+ tristate "Texas Instruments OMAP4+ USB pin control driver"
+ depends on MFD_OMAP_CONTROL
+ help
+ If you say yes here you get support for the Texas Instruments
+ OMAP4+ USB pin control driver. The register set is part of system
+ control module.
+
+ USB phy in OMAP configures control module register for powering on
+ the phy, configuring VBUSVALID, AVALID, IDDIG and SESSEND. For
+ performing the above mentioned configuration, API's are added in
+ by this children of the control module driver.
+
config NOP_USB_XCEIV
tristate "NOP USB Transceiver Driver"
select USB_OTG_UTILS
diff --git a/drivers/usb/otg/Makefile b/drivers/usb/otg/Makefile
index 41aa509..60c8c83 100644
--- a/drivers/usb/otg/Makefile
+++ b/drivers/usb/otg/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_USB_GPIO_VBUS) += gpio_vbus.o
obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o
obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o
obj-$(CONFIG_TWL6030_USB) += twl6030-usb.o
+obj-$(CONFIG_OMAP4_USB_PHY) += omap4-usb-phy.o
obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o
obj-$(CONFIG_USB_ULPI) += ulpi.o
obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi_viewport.o
diff --git a/drivers/usb/otg/omap4-usb-phy.c b/drivers/usb/otg/omap4-usb-phy.c
new file mode 100644
index 0000000..a29ea45
--- /dev/null
+++ b/drivers/usb/otg/omap4-usb-phy.c
@@ -0,0 +1,130 @@
+/*
+ * OMAP4 system control module driver, USB control children
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Contact:
+ * Kishon Vijay Abraham I <kishon@ti.com>
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/omap_control.h>
+#include <linux/usb/omap4_usb_phy.h>
+
+/**
+ * omap4_usb_phy_power - power on/off the phy using control module reg
+ * @dev: struct device *
+ * @on: 0 or 1, based on powering on or off the PHY
+ *
+ * omap_usb2 can call this API to power on or off the PHY.
+ */
+int omap4_usb_phy_power(struct device *dev, int on)
+{
+ u32 val;
+ int ret;
+
+ if (on) {
+ ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
+ if (!ret && (val & PHY_PD)) {
+ ret = omap_control_writel(dev, ~PHY_PD,
+ CONTROL_DEV_CONF);
+ /* XXX: add proper documentation for this delay */
+ mdelay(200);
+ }
+ } else {
+ ret = omap_control_writel(dev, PHY_PD, CONTROL_DEV_CONF);
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
+
+/**
+ * omap4_usb_phy_mailbox - write to usb otg mailbox
+ * @dev: struct device *
+ * @val: the value to be written to the mailbox
+ *
+ * On detection of a device (ID pin is grounded), the phy should call this API
+ * to set AVALID, VBUSVALID and ID pin is grounded.
+ *
+ * When OMAP is connected to a host (OMAP in device mode), the phy should call
+ * this API to set AVALID, VBUSVALID and ID pin in high impedance.
+ *
+ * The phy should call this API, if OMAP is disconnected from host or device.
+ */
+int omap4_usb_phy_mailbox(struct device *dev, u32 val)
+{
+ return omap_control_writel(dev, val, CONTROL_USBOTGHS_CONTROL);
+}
+EXPORT_SYMBOL_GPL(omap4_usb_phy_mailbox);
+
+static int __devinit omap_usb_phy_probe(struct platform_device *pdev)
+{
+ struct omap_control *omap_control;
+
+ omap_control = dev_get_drvdata(pdev->dev.parent);
+
+ if (!omap_control) {
+ dev_err(&pdev->dev, "no omap_control in our parent\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int __devexit omap_usb_phy_remove(struct platform_device *pdev)
+{
+ return 0;
+}
+
+static const struct of_device_id of_omap_usb_phy_match[] = {
+ { .compatible = "ti,omap4-usb-phy", },
+ { },
+};
+
+static struct platform_driver omap_usb_phy_driver = {
+ .probe = omap_usb_phy_probe,
+ .remove = __devexit_p(omap_usb_phy_remove),
+ .driver = {
+ .name = "omap4-usb-phy",
+ .owner = THIS_MODULE,
+ .of_match_table = of_omap_usb_phy_match,
+ },
+};
+
+static int __init omap_usb_phy_init(void)
+{
+ return platform_driver_register(&omap_usb_phy_driver);
+}
+postcore_initcall(omap_usb_phy_init);
+
+static void __exit omap_usb_phy_exit(void)
+{
+ platform_driver_unregister(&omap_usb_phy_driver);
+}
+module_exit(omap_usb_phy_exit);
+
+MODULE_DESCRIPTION("OMAP4+ USB-phy driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform: omap4-usb-phy");
+MODULE_AUTHOR("Texas Instrument Inc.");
diff --git a/include/linux/usb/omap4_usb_phy.h b/include/linux/usb/omap4_usb_phy.h
new file mode 100644
index 0000000..b6a4701
--- /dev/null
+++ b/include/linux/usb/omap4_usb_phy.h
@@ -0,0 +1,53 @@
+/*
+ * OMAP4 USB-phy
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Contact:
+ * Kishon Vijay Abraham I <kishon@ti.com>
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#ifndef __OMAP4_USB_PHY_H
+#define __OMAP4_USB_PHY_H
+
+#define PHY_PD 0x1
+#define AVALID BIT(0)
+#define BVALID BIT(1)
+#define VBUSVALID BIT(2)
+#define SESSEND BIT(3)
+#define IDDIG BIT(4)
+#define CONTROL_DEV_CONF 0x00000300
+#define CONTROL_USBOTGHS_CONTROL 0x0000033C
+
+/* USB-PHY helpers */
+#if (defined(CONFIG_OMAP4_USB_PHY)) || (defined(CONFIG_OMAP4_USB_PHY_MODULE))
+extern int omap4_usb_phy_mailbox(struct device *dev, u32 val);
+extern int omap4_usb_phy_power(struct device *dev, int on);
+#else
+static inline int omap4_usb_phy_mailbox(struct device *dev, u32 val)
+{
+ return 0;
+}
+static inline int omap4_usb_phy_power(struct device *dev, int on)
+{
+ return 0;
+}
+#endif
+
+#endif
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 08/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 8:25 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin, Keerthy
OMAP4460 specific temperature sensor register bit fields are added.
Existing OMAP4 entries are renamed to OMAP4430.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/include/mach/control.h | 116 ++++++++++++++++++++++++++++
1 files changed, 116 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/include/mach/control.h b/arch/arm/mach-omap2/include/mach/control.h
index cf42764..171b504 100644
--- a/arch/arm/mach-omap2/include/mach/control.h
+++ b/arch/arm/mach-omap2/include/mach/control.h
@@ -230,6 +230,122 @@
/* OMAP44xx control McBSP padconf */
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
+/* TEMP_SENSOR OMAP4430 */
+#define OMAP4430_BGAP_TEMPSOFF_SHIFT 12
+#define OMAP4430_BGAP_TEMPSOFF_MASK (1 << 12)
+#define OMAP4430_BGAP_TSHUT_SHIFT 11
+#define OMAP4430_BGAP_TSHUT_MASK (1 << 11)
+#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10
+#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10)
+#define OMAP4430_BGAP_TEMP_SENSOR_SOC_SHIFT 9
+#define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9)
+#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8
+#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8)
+#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
+#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0)
+
+/* TEMP_SENSOR OMAP4460 */
+#define OMAP4460_BGAP_TEMPSOFF_SHIFT 13
+#define OMAP4460_BGAP_TEMPSOFF_MASK (1 << 13)
+#define OMAP4460_BGAP_TEMP_SENSOR_SOC_SHIFT 11
+#define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK (1 << 11)
+#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
+#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 10)
+#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
+#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0)
+
+/* BANDGAP_CTRL */
+#define OMAP4460_SINGLE_MODE_SHIFT 31
+#define OMAP4460_SINGLE_MODE_MASK (1 << 31)
+#define OMAP4460_MASK_HOT_SHIFT 1
+#define OMAP4460_MASK_HOT_MASK (1 << 1)
+#define OMAP4460_MASK_COLD_SHIFT 0
+#define OMAP4460_MASK_COLD_MASK (1 << 0)
+
+/* BANDGAP_COUNTER */
+#define OMAP4460_COUNTER_SHIFT 0
+#define OMAP4460_COUNTER_MASK (0xffffff << 0)
+
+/* BANDGAP_THRESHOLD */
+#define OMAP4460_T_HOT_SHIFT 16
+#define OMAP4460_T_HOT_MASK (0x3ff << 16)
+#define OMAP4460_T_COLD_SHIFT 0
+#define OMAP4460_T_COLD_MASK (0x3ff << 0)
+
+/* TSHUT_THRESHOLD */
+#define OMAP4460_TSHUT_HOT_SHIFT 16
+#define OMAP4460_TSHUT_HOT_MASK (0x3ff << 16)
+#define OMAP4460_TSHUT_COLD_SHIFT 0
+#define OMAP4460_TSHUT_COLD_MASK (0x3ff << 0)
+
+/* BANDGAP_STATUS */
+#define OMAP4460_CLEAN_STOP_SHIFT 3
+#define OMAP4460_CLEAN_STOP_MASK (1 << 3)
+#define OMAP4460_BGAP_ALERT_SHIFT 2
+#define OMAP4460_BGAP_ALERT_MASK (1 << 2)
+#define OMAP4460_HOT_FLAG_SHIFT 1
+#define OMAP4460_HOT_FLAG_MASK (1 << 1)
+#define OMAP4460_COLD_FLAG_SHIFT 0
+#define OMAP4460_COLD_FLAG_MASK (1 << 0)
+
+/* TEMP_SENSOR OMAP5430 */
+#define OMAP5430_BGAP_TEMP_SENSOR_SOC_SHIFT 12
+#define OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK (1 << 12)
+#define OMAP5430_BGAP_TEMPSOFF_SHIFT 11
+#define OMAP5430_BGAP_TEMPSOFF_MASK (1 << 11)
+#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
+#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 10)
+#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
+#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0)
+
+/* BANDGAP_CTRL */
+#define OMAP5430_MASK_HOT_CORE_SHIFT 5
+#define OMAP5430_MASK_HOT_CORE_MASK (1 << 5)
+#define OMAP5430_MASK_COLD_CORE_SHIFT 4
+#define OMAP5430_MASK_COLD_CORE_MASK (1 << 4)
+#define OMAP5430_MASK_HOT_MM_SHIFT 3
+#define OMAP5430_MASK_HOT_MM_MASK (1 << 3)
+#define OMAP5430_MASK_COLD_MM_SHIFT 2
+#define OMAP5430_MASK_COLD_MM_MASK (1 << 2)
+#define OMAP5430_MASK_HOT_MPU_SHIFT 1
+#define OMAP5430_MASK_HOT_MPU_MASK (1 << 1)
+#define OMAP5430_MASK_COLD_MPU_SHIFT 0
+#define OMAP5430_MASK_COLD_MPU_MASK (1 << 0)
+
+/* BANDGAP_COUNTER */
+#define OMAP5430_REPEAT_MODE_SHIFT 31
+#define OMAP5430_REPEAT_MODE_MASK (1 << 31)
+#define OMAP5430_COUNTER_SHIFT 0
+#define OMAP5430_COUNTER_MASK (0xffffff << 0)
+
+/* BANDGAP_THRESHOLD */
+#define OMAP5430_T_HOT_SHIFT 16
+#define OMAP5430_T_HOT_MASK (0x3ff << 16)
+#define OMAP5430_T_COLD_SHIFT 0
+#define OMAP5430_T_COLD_MASK (0x3ff << 0)
+
+/* TSHUT_THRESHOLD */
+#define OMAP5430_TSHUT_HOT_SHIFT 16
+#define OMAP5430_TSHUT_HOT_MASK (0x3ff << 16)
+#define OMAP5430_TSHUT_COLD_SHIFT 0
+#define OMAP5430_TSHUT_COLD_MASK (0x3ff << 0)
+
+/* BANDGAP_STATUS */
+#define OMAP5430_BGAP_ALERT_SHIFT 31
+#define OMAP5430_BGAP_ALERT_MASK (1 << 31)
+#define OMAP5430_HOT_CORE_FLAG_SHIFT 5
+#define OMAP5430_HOT_CORE_FLAG_MASK (1 << 5)
+#define OMAP5430_COLD_CORE_FLAG_SHIFT 4
+#define OMAP5430_COLD_CORE_FLAG_MASK (1 << 4)
+#define OMAP5430_HOT_MM_FLAG_SHIFT 3
+#define OMAP5430_HOT_MM_FLAG_MASK (1 << 3)
+#define OMAP5430_COLD_MM_FLAG_SHIFT 2
+#define OMAP5430_COLD_MM_FLAG_MASK (1 << 2)
+#define OMAP5430_HOT_MPU_FLAG_SHIFT 1
+#define OMAP5430_HOT_MPU_FLAG_MASK (1 << 1)
+#define OMAP5430_COLD_MPU_FLAG_SHIFT 0
+#define OMAP5430_COLD_MPU_FLAG_MASK (1 << 0)
+
/* AM35XX only CONTROL_GENERAL register offsets */
#define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
#define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 08/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields
@ 2012-05-25 8:25 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: linux-arm-kernel
OMAP4460 specific temperature sensor register bit fields are added.
Existing OMAP4 entries are renamed to OMAP4430.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/include/mach/control.h | 116 ++++++++++++++++++++++++++++
1 files changed, 116 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/include/mach/control.h b/arch/arm/mach-omap2/include/mach/control.h
index cf42764..171b504 100644
--- a/arch/arm/mach-omap2/include/mach/control.h
+++ b/arch/arm/mach-omap2/include/mach/control.h
@@ -230,6 +230,122 @@
/* OMAP44xx control McBSP padconf */
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
+/* TEMP_SENSOR OMAP4430 */
+#define OMAP4430_BGAP_TEMPSOFF_SHIFT 12
+#define OMAP4430_BGAP_TEMPSOFF_MASK (1 << 12)
+#define OMAP4430_BGAP_TSHUT_SHIFT 11
+#define OMAP4430_BGAP_TSHUT_MASK (1 << 11)
+#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10
+#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10)
+#define OMAP4430_BGAP_TEMP_SENSOR_SOC_SHIFT 9
+#define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9)
+#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8
+#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8)
+#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
+#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0)
+
+/* TEMP_SENSOR OMAP4460 */
+#define OMAP4460_BGAP_TEMPSOFF_SHIFT 13
+#define OMAP4460_BGAP_TEMPSOFF_MASK (1 << 13)
+#define OMAP4460_BGAP_TEMP_SENSOR_SOC_SHIFT 11
+#define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK (1 << 11)
+#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
+#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 10)
+#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
+#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0)
+
+/* BANDGAP_CTRL */
+#define OMAP4460_SINGLE_MODE_SHIFT 31
+#define OMAP4460_SINGLE_MODE_MASK (1 << 31)
+#define OMAP4460_MASK_HOT_SHIFT 1
+#define OMAP4460_MASK_HOT_MASK (1 << 1)
+#define OMAP4460_MASK_COLD_SHIFT 0
+#define OMAP4460_MASK_COLD_MASK (1 << 0)
+
+/* BANDGAP_COUNTER */
+#define OMAP4460_COUNTER_SHIFT 0
+#define OMAP4460_COUNTER_MASK (0xffffff << 0)
+
+/* BANDGAP_THRESHOLD */
+#define OMAP4460_T_HOT_SHIFT 16
+#define OMAP4460_T_HOT_MASK (0x3ff << 16)
+#define OMAP4460_T_COLD_SHIFT 0
+#define OMAP4460_T_COLD_MASK (0x3ff << 0)
+
+/* TSHUT_THRESHOLD */
+#define OMAP4460_TSHUT_HOT_SHIFT 16
+#define OMAP4460_TSHUT_HOT_MASK (0x3ff << 16)
+#define OMAP4460_TSHUT_COLD_SHIFT 0
+#define OMAP4460_TSHUT_COLD_MASK (0x3ff << 0)
+
+/* BANDGAP_STATUS */
+#define OMAP4460_CLEAN_STOP_SHIFT 3
+#define OMAP4460_CLEAN_STOP_MASK (1 << 3)
+#define OMAP4460_BGAP_ALERT_SHIFT 2
+#define OMAP4460_BGAP_ALERT_MASK (1 << 2)
+#define OMAP4460_HOT_FLAG_SHIFT 1
+#define OMAP4460_HOT_FLAG_MASK (1 << 1)
+#define OMAP4460_COLD_FLAG_SHIFT 0
+#define OMAP4460_COLD_FLAG_MASK (1 << 0)
+
+/* TEMP_SENSOR OMAP5430 */
+#define OMAP5430_BGAP_TEMP_SENSOR_SOC_SHIFT 12
+#define OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK (1 << 12)
+#define OMAP5430_BGAP_TEMPSOFF_SHIFT 11
+#define OMAP5430_BGAP_TEMPSOFF_MASK (1 << 11)
+#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
+#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 10)
+#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
+#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0)
+
+/* BANDGAP_CTRL */
+#define OMAP5430_MASK_HOT_CORE_SHIFT 5
+#define OMAP5430_MASK_HOT_CORE_MASK (1 << 5)
+#define OMAP5430_MASK_COLD_CORE_SHIFT 4
+#define OMAP5430_MASK_COLD_CORE_MASK (1 << 4)
+#define OMAP5430_MASK_HOT_MM_SHIFT 3
+#define OMAP5430_MASK_HOT_MM_MASK (1 << 3)
+#define OMAP5430_MASK_COLD_MM_SHIFT 2
+#define OMAP5430_MASK_COLD_MM_MASK (1 << 2)
+#define OMAP5430_MASK_HOT_MPU_SHIFT 1
+#define OMAP5430_MASK_HOT_MPU_MASK (1 << 1)
+#define OMAP5430_MASK_COLD_MPU_SHIFT 0
+#define OMAP5430_MASK_COLD_MPU_MASK (1 << 0)
+
+/* BANDGAP_COUNTER */
+#define OMAP5430_REPEAT_MODE_SHIFT 31
+#define OMAP5430_REPEAT_MODE_MASK (1 << 31)
+#define OMAP5430_COUNTER_SHIFT 0
+#define OMAP5430_COUNTER_MASK (0xffffff << 0)
+
+/* BANDGAP_THRESHOLD */
+#define OMAP5430_T_HOT_SHIFT 16
+#define OMAP5430_T_HOT_MASK (0x3ff << 16)
+#define OMAP5430_T_COLD_SHIFT 0
+#define OMAP5430_T_COLD_MASK (0x3ff << 0)
+
+/* TSHUT_THRESHOLD */
+#define OMAP5430_TSHUT_HOT_SHIFT 16
+#define OMAP5430_TSHUT_HOT_MASK (0x3ff << 16)
+#define OMAP5430_TSHUT_COLD_SHIFT 0
+#define OMAP5430_TSHUT_COLD_MASK (0x3ff << 0)
+
+/* BANDGAP_STATUS */
+#define OMAP5430_BGAP_ALERT_SHIFT 31
+#define OMAP5430_BGAP_ALERT_MASK (1 << 31)
+#define OMAP5430_HOT_CORE_FLAG_SHIFT 5
+#define OMAP5430_HOT_CORE_FLAG_MASK (1 << 5)
+#define OMAP5430_COLD_CORE_FLAG_SHIFT 4
+#define OMAP5430_COLD_CORE_FLAG_MASK (1 << 4)
+#define OMAP5430_HOT_MM_FLAG_SHIFT 3
+#define OMAP5430_HOT_MM_FLAG_MASK (1 << 3)
+#define OMAP5430_COLD_MM_FLAG_SHIFT 2
+#define OMAP5430_COLD_MM_FLAG_MASK (1 << 2)
+#define OMAP5430_HOT_MPU_FLAG_SHIFT 1
+#define OMAP5430_HOT_MPU_FLAG_MASK (1 << 1)
+#define OMAP5430_COLD_MPU_FLAG_SHIFT 0
+#define OMAP5430_COLD_MPU_FLAG_MASK (1 << 0)
+
/* AM35XX only CONTROL_GENERAL register offsets */
#define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
#define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 8:25 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin, Keerthy
In the System Control Module, OMAP supplies a voltage reference
and a temperature sensor feature that are gathered in the band
gap voltage and temperature sensor (VBGAPTS) module. The band
gap provides current and voltage reference for its internal
circuits and other analog IP blocks. The analog-to-digital
converter (ADC) produces an output value that is proportional
to the silicon temperature.
This patch provides a platform driver which expose this feature.
It is moduled as a MFD child of the System Control Module core
MFD driver.
This driver provides only APIs to access the device properties,
like temperature, thresholds and update rate.
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
.../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
drivers/thermal/Kconfig | 13 +
drivers/thermal/Makefile | 4 +-
drivers/thermal/omap-bandgap.c | 1601 ++++++++++++++++++++
drivers/thermal/omap-bandgap.h | 63 +
5 files changed, 1707 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
create mode 100644 drivers/thermal/omap-bandgap.c
create mode 100644 drivers/thermal/omap-bandgap.h
diff --git a/Documentation/devicetree/bindings/thermal/omap_bandgap.txt b/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
new file mode 100644
index 0000000..430bcf8
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
@@ -0,0 +1,27 @@
+* Texas Instrument OMAP SCM bandgap bindings
+
+In the System Control Module, OMAP supplies a voltage reference
+and a temperature sensor feature that are gathered in the band
+gap voltage and temperature sensor (VBGAPTS) module. The band
+gap provides current and voltage reference for its internal
+circuits and other analog IP blocks. The analog-to-digital
+converter (ADC) produces an output value that is proportional
+to the silicon temperature.
+
+Required properties:
+- compatible : Should be:
+ - "ti,omap4460-control-bandgap" : for OMAP4460 bandgap
+ - "ti,omap5430-control-bandgap" : for OMAP5430 bandgap
+- interrupts : this entry should indicate which interrupt line
+the talert signal is routed to;
+Specific:
+- ti,tshut-gpio : this entry should be used to inform which GPIO
+line the tshut signal is routed to;
+
+Example:
+
+bandgap {
+ compatible = "ti,omap4460-control-bandgap";
+ interrupts = <0 126 4>; /* talert */
+ ti,tshut-gpio = <86>;
+};
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 514a691..ffdd240 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -26,3 +26,16 @@ config SPEAR_THERMAL
help
Enable this to plug the SPEAr thermal sensor driver into the Linux
thermal framework
+
+config OMAP_BANDGAP
+ tristate "Texas Instruments OMAP4+ temperature sensor driver"
+ depends on THERMAL
+ depends on MFD_OMAP_CONTROL
+ help
+ If you say yes here you get support for the Texas Instruments
+ OMAP4460+ on die bandgap temperature sensor support. The register
+ set is part of system control module.
+
+ This includes alert interrupts generation and also the TSHUT
+ support.
+
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index a9fff0b..5ff1af1 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -3,4 +3,6 @@
#
obj-$(CONFIG_THERMAL) += thermal_sys.o
-obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
\ No newline at end of file
+obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
+obj-$(CONFIG_OMAP_BANDGAP) += omap-thermal.o
+omap-thermal-y := omap-bandgap.o
diff --git a/drivers/thermal/omap-bandgap.c b/drivers/thermal/omap-bandgap.c
new file mode 100644
index 0000000..3d5a12b
--- /dev/null
+++ b/drivers/thermal/omap-bandgap.c
@@ -0,0 +1,1601 @@
+/*
+ * OMAP4 Bandgap temperature sensor driver
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Author: J Keerthy <j-keerthy@ti.com>
+ * Author: Moiz Sonasath <m-sonasath@ti.com>
+ * Couple of fixes, DT and MFD adaptation:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/export.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/clk.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/types.h>
+#include <linux/mutex.h>
+#include <linux/reboot.h>
+#include <linux/of_platform.h>
+#include <linux/of_irq.h>
+#include <linux/mfd/omap_control.h>
+
+#include <mach/control.h>
+
+#include "omap-bandgap.h"
+
+/* Offsets from the base of temperature sensor registers */
+
+#define OMAP4460_TEMP_SENSOR_CTRL_OFFSET 0x32C
+#define OMAP4460_BGAP_CTRL_OFFSET 0x378
+#define OMAP4460_BGAP_COUNTER_OFFSET 0x37C
+#define OMAP4460_BGAP_THRESHOLD_OFFSET 0x380
+#define OMAP4460_BGAP_TSHUT_OFFSET 0x384
+#define OMAP4460_BGAP_STATUS_OFFSET 0x388
+#define OMAP4460_FUSE_OPP_BGAP 0x260
+
+#define OMAP5430_TEMP_SENSOR_MPU_OFFSET 0x32C
+#define OMAP5430_BGAP_CTRL_OFFSET 0x380
+#define OMAP5430_BGAP_COUNTER_MPU_OFFSET 0x39C
+#define OMAP5430_BGAP_THRESHOLD_MPU_OFFSET 0x384
+#define OMAP5430_BGAP_TSHUT_MPU_OFFSET 0x390
+#define OMAP5430_BGAP_STATUS_OFFSET 0x3A8
+#define OMAP5430_FUSE_OPP_BGAP_MPU 0x1E4
+
+#define OMAP5430_TEMP_SENSOR_GPU_OFFSET 0x330
+#define OMAP5430_BGAP_COUNTER_GPU_OFFSET 0x3A0
+#define OMAP5430_BGAP_THRESHOLD_GPU_OFFSET 0x388
+#define OMAP5430_BGAP_TSHUT_GPU_OFFSET 0x394
+#define OMAP5430_FUSE_OPP_BGAP_GPU 0x1E0
+
+#define OMAP5430_TEMP_SENSOR_CORE_OFFSET 0x334
+#define OMAP5430_BGAP_COUNTER_CORE_OFFSET 0x3A4
+#define OMAP5430_BGAP_THRESHOLD_CORE_OFFSET 0x38C
+#define OMAP5430_BGAP_TSHUT_CORE_OFFSET 0x398
+#define OMAP5430_FUSE_OPP_BGAP_CORE 0x1E8
+
+#define OMAP4460_TSHUT_HOT 900 /* 122 deg C */
+#define OMAP4460_TSHUT_COLD 895 /* 100 deg C */
+#define OMAP4460_T_HOT 800 /* 73 deg C */
+#define OMAP4460_T_COLD 795 /* 71 deg C */
+#define OMAP4460_MAX_FREQ 1500000
+#define OMAP4460_MIN_FREQ 1000000
+#define OMAP4460_MIN_TEMP -40000
+#define OMAP4460_MAX_TEMP 123000
+#define OMAP4460_HYST_VAL 5000
+#define OMAP4460_ADC_START_VALUE 530
+#define OMAP4460_ADC_END_VALUE 932
+
+#define OMAP5430_MPU_TSHUT_HOT 915
+#define OMAP5430_MPU_TSHUT_COLD 900
+#define OMAP5430_MPU_T_HOT 800
+#define OMAP5430_MPU_T_COLD 795
+#define OMAP5430_MPU_MAX_FREQ 1500000
+#define OMAP5430_MPU_MIN_FREQ 1000000
+#define OMAP5430_MPU_MIN_TEMP -40000
+#define OMAP5430_MPU_MAX_TEMP 125000
+#define OMAP5430_MPU_HYST_VAL 5000
+#define OMAP5430_ADC_START_VALUE 532
+#define OMAP5430_ADC_END_VALUE 934
+
+#define OMAP5430_GPU_TSHUT_HOT 915
+#define OMAP5430_GPU_TSHUT_COLD 900
+#define OMAP5430_GPU_T_HOT 800
+#define OMAP5430_GPU_T_COLD 795
+#define OMAP5430_GPU_MAX_FREQ 1500000
+#define OMAP5430_GPU_MIN_FREQ 1000000
+#define OMAP5430_GPU_MIN_TEMP -40000
+#define OMAP5430_GPU_MAX_TEMP 125000
+#define OMAP5430_GPU_HYST_VAL 5000
+
+#define OMAP5430_CORE_TSHUT_HOT 915
+#define OMAP5430_CORE_TSHUT_COLD 900
+#define OMAP5430_CORE_T_HOT 800
+#define OMAP5430_CORE_T_COLD 795
+#define OMAP5430_CORE_MAX_FREQ 1500000
+#define OMAP5430_CORE_MIN_FREQ 1000000
+#define OMAP5430_CORE_MIN_TEMP -40000
+#define OMAP5430_CORE_MAX_TEMP 125000
+#define OMAP5430_CORE_HYST_VAL 5000
+
+/**
+ * The register offsets and bit fields might change across
+ * OMAP versions hence populating them in this structure.
+ */
+
+struct temp_sensor_registers {
+ u32 temp_sensor_ctrl;
+ u32 bgap_tempsoff_mask;
+ u32 bgap_soc_mask;
+ u32 bgap_eocz_mask;
+ u32 bgap_dtemp_mask;
+
+ u32 bgap_mask_ctrl;
+ u32 mask_hot_mask;
+ u32 mask_cold_mask;
+
+ u32 bgap_mode_ctrl;
+ u32 mode_ctrl_mask;
+
+ u32 bgap_counter;
+ u32 counter_mask;
+
+ u32 bgap_threshold;
+ u32 threshold_thot_mask;
+ u32 threshold_tcold_mask;
+
+ u32 tshut_threshold;
+ u32 tshut_hot_mask;
+ u32 tshut_cold_mask;
+
+ u32 bgap_status;
+ u32 status_clean_stop_mask;
+ u32 status_bgap_alert_mask;
+ u32 status_hot_mask;
+ u32 status_cold_mask;
+
+ u32 bgap_efuse;
+};
+
+/**
+ * The thresholds and limits for temperature sensors.
+ */
+struct temp_sensor_data {
+ u32 tshut_hot;
+ u32 tshut_cold;
+ u32 t_hot;
+ u32 t_cold;
+ u32 min_freq;
+ u32 max_freq;
+ int max_temp;
+ int min_temp;
+ int hyst_val;
+ u32 adc_start_val;
+ u32 adc_end_val;
+ u32 update_int1;
+ u32 update_int2;
+};
+
+/**
+ * struct temp_sensor_regval - temperature sensor register values
+ * @bg_mode_ctrl: temp sensor control register value
+ * @bg_ctrl: bandgap ctrl register value
+ * @bg_counter: bandgap counter value
+ * @bg_threshold: bandgap threshold register value
+ * @tshut_threshold: bandgap tshut register value
+ */
+struct temp_sensor_regval {
+ u32 bg_mode_ctrl;
+ u32 bg_ctrl;
+ u32 bg_counter;
+ u32 bg_threshold;
+ u32 tshut_threshold;
+};
+
+/**
+ * struct omap_temp_sensor - bandgap temperature sensor platform data
+ * @ts_data: pointer to struct with thresholds, limits of temperature sensor
+ * @registers: pointer to the list of register offsets and bitfields
+ * @regval: temperature sensor register values
+ * @domain: the name of the domain where the sensor is located
+ */
+struct omap_temp_sensor {
+ struct temp_sensor_data *ts_data;
+ struct temp_sensor_registers *registers;
+ struct temp_sensor_regval *regval;
+ char *domain;
+};
+
+/**
+ * struct omap_bandgap_data - bandgap platform data structure
+ * @has_talert: indicates if the chip has talert output line
+ * @has_tshut: indicates if the chip has tshut output line
+ * @conv_table: Pointer to adc to temperature conversion table
+ * @fclock_name: clock name of the functional clock
+ * @div_ck_nme: clock name of the clock divisor
+ * @sensor_count: count of temperature sensor device in scm
+ * @sensors: array of sensors present in this bandgap instance
+ * @expose_sensor: callback to export sensor to thermal API
+ */
+struct omap_bandgap_data {
+ bool has_talert;
+ bool has_tshut;
+ const int *conv_table;
+ char *fclock_name;
+ char *div_ck_name;
+ int sensor_count;
+ int (*report_temperature)(struct omap_bandgap *bg_ptr, int id);
+ int (*expose_sensor)(struct omap_bandgap *bg_ptr, int id, char *domain);
+
+ /* this needs to be at the end */
+ struct omap_temp_sensor sensors[];
+};
+
+/* TODO: provide data structures for 4430 */
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap4460_mpu_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP4460_TEMP_SENSOR_CTRL_OFFSET,
+ .bgap_tempsoff_mask = OMAP4460_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP4460_MASK_HOT_MASK,
+ .mask_cold_mask = OMAP4460_MASK_COLD_MASK,
+
+ .bgap_mode_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
+ .mode_ctrl_mask = OMAP4460_SINGLE_MODE_MASK,
+
+ .bgap_counter = OMAP4460_BGAP_COUNTER_OFFSET,
+ .counter_mask = OMAP4460_COUNTER_MASK,
+
+ .bgap_threshold = OMAP4460_BGAP_THRESHOLD_OFFSET,
+ .threshold_thot_mask = OMAP4460_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP4460_T_COLD_MASK,
+
+ .tshut_threshold = OMAP4460_BGAP_TSHUT_OFFSET,
+ .tshut_hot_mask = OMAP4460_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP4460_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP4460_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = OMAP4460_CLEAN_STOP_MASK,
+ .status_bgap_alert_mask = OMAP4460_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP4460_HOT_FLAG_MASK,
+ .status_cold_mask = OMAP4460_COLD_FLAG_MASK,
+
+ .bgap_efuse = OMAP4460_FUSE_OPP_BGAP,
+};
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap5430_mpu_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_MPU_OFFSET,
+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP5430_MASK_HOT_MPU_MASK,
+ .mask_cold_mask = OMAP5430_MASK_COLD_MPU_MASK,
+
+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
+
+ .bgap_counter = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
+ .counter_mask = OMAP5430_COUNTER_MASK,
+
+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_MPU_OFFSET,
+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
+
+ .tshut_threshold = OMAP5430_BGAP_TSHUT_MPU_OFFSET,
+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = 0x0,
+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP5430_HOT_MPU_FLAG_MASK,
+ .status_cold_mask = OMAP5430_COLD_MPU_FLAG_MASK,
+
+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_MPU,
+};
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap5430_gpu_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_GPU_OFFSET,
+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP5430_MASK_HOT_MM_MASK,
+ .mask_cold_mask = OMAP5430_MASK_COLD_MM_MASK,
+
+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
+
+ .bgap_counter = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
+ .counter_mask = OMAP5430_COUNTER_MASK,
+
+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_GPU_OFFSET,
+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
+
+ .tshut_threshold = OMAP5430_BGAP_TSHUT_GPU_OFFSET,
+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = 0x0,
+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP5430_HOT_MM_FLAG_MASK,
+ .status_cold_mask = OMAP5430_COLD_MM_FLAG_MASK,
+
+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_GPU,
+};
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap5430_core_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_CORE_OFFSET,
+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP5430_MASK_HOT_CORE_MASK,
+ .mask_cold_mask = OMAP5430_MASK_COLD_CORE_MASK,
+
+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
+
+ .bgap_counter = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
+ .counter_mask = OMAP5430_COUNTER_MASK,
+
+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_CORE_OFFSET,
+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
+
+ .tshut_threshold = OMAP5430_BGAP_TSHUT_CORE_OFFSET,
+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = 0x0,
+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP5430_HOT_CORE_FLAG_MASK,
+ .status_cold_mask = OMAP5430_COLD_CORE_FLAG_MASK,
+
+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_CORE,
+};
+
+/* Thresholds and limits for OMAP4460 MPU temperature sensor */
+static struct temp_sensor_data omap4460_mpu_temp_sensor_data = {
+ .tshut_hot = OMAP4460_TSHUT_HOT,
+ .tshut_cold = OMAP4460_TSHUT_COLD,
+ .t_hot = OMAP4460_T_HOT,
+ .t_cold = OMAP4460_T_COLD,
+ .min_freq = OMAP4460_MIN_FREQ,
+ .max_freq = OMAP4460_MAX_FREQ,
+ .max_temp = OMAP4460_MAX_TEMP,
+ .min_temp = OMAP4460_MIN_TEMP,
+ .hyst_val = OMAP4460_HYST_VAL,
+ .adc_start_val = OMAP4460_ADC_START_VALUE,
+ .adc_end_val = OMAP4460_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/* Thresholds and limits for OMAP5430 MPU temperature sensor */
+static struct temp_sensor_data omap5430_mpu_temp_sensor_data = {
+ .tshut_hot = OMAP5430_MPU_TSHUT_HOT,
+ .tshut_cold = OMAP5430_MPU_TSHUT_COLD,
+ .t_hot = OMAP5430_MPU_T_HOT,
+ .t_cold = OMAP5430_MPU_T_COLD,
+ .min_freq = OMAP5430_MPU_MIN_FREQ,
+ .max_freq = OMAP5430_MPU_MAX_FREQ,
+ .max_temp = OMAP5430_MPU_MAX_TEMP,
+ .min_temp = OMAP5430_MPU_MIN_TEMP,
+ .hyst_val = OMAP5430_MPU_HYST_VAL,
+ .adc_start_val = OMAP5430_ADC_START_VALUE,
+ .adc_end_val = OMAP5430_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/* Thresholds and limits for OMAP5430 GPU temperature sensor */
+static struct temp_sensor_data omap5430_gpu_temp_sensor_data = {
+ .tshut_hot = OMAP5430_GPU_TSHUT_HOT,
+ .tshut_cold = OMAP5430_GPU_TSHUT_COLD,
+ .t_hot = OMAP5430_GPU_T_HOT,
+ .t_cold = OMAP5430_GPU_T_COLD,
+ .min_freq = OMAP5430_GPU_MIN_FREQ,
+ .max_freq = OMAP5430_GPU_MAX_FREQ,
+ .max_temp = OMAP5430_GPU_MAX_TEMP,
+ .min_temp = OMAP5430_GPU_MIN_TEMP,
+ .hyst_val = OMAP5430_GPU_HYST_VAL,
+ .adc_start_val = OMAP5430_ADC_START_VALUE,
+ .adc_end_val = OMAP5430_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/* Thresholds and limits for OMAP5430 CORE temperature sensor */
+static struct temp_sensor_data omap5430_core_temp_sensor_data = {
+ .tshut_hot = OMAP5430_CORE_TSHUT_HOT,
+ .tshut_cold = OMAP5430_CORE_TSHUT_COLD,
+ .t_hot = OMAP5430_CORE_T_HOT,
+ .t_cold = OMAP5430_CORE_T_COLD,
+ .min_freq = OMAP5430_CORE_MIN_FREQ,
+ .max_freq = OMAP5430_CORE_MAX_FREQ,
+ .max_temp = OMAP5430_CORE_MAX_TEMP,
+ .min_temp = OMAP5430_CORE_MIN_TEMP,
+ .hyst_val = OMAP5430_CORE_HYST_VAL,
+ .adc_start_val = OMAP5430_ADC_START_VALUE,
+ .adc_end_val = OMAP5430_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/*
+ * Temperature values in milli degree celsius
+ * ADC code values from 530 to 923
+ */
+static const int
+omap4460_adc_to_temp[OMAP4460_ADC_END_VALUE - OMAP4460_ADC_START_VALUE + 1] = {
+ -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600, -38200,
+ -37800, -37300, -36800, -36400, -36000, -35600, -35200, -34800,
+ -34300, -33800, -33400, -33000, -32600, -32200, -31800, -31300,
+ -30800, -30400, -30000, -29600, -29200, -28700, -28200, -27800,
+ -27400, -27000, -26600, -26200, -25700, -25200, -24800, -24400,
+ -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
+ -20600, -20200, -19700, -19200, -18800, -18400, -18000, -17600,
+ -17200, -16700, -16200, -15800, -15400, -15000, -14600, -14200,
+ -13700, -13200, -12800, -12400, -12000, -11600, -11200, -10700,
+ -10200, -9800, -9400, -9000, -8600, -8200, -7700, -7200, -6800,
+ -6400, -6000, -5600, -5200, -4800, -4300, -3800, -3400, -3000,
+ -2600, -2200, -1800, -1300, -800, -400, 0, 400, 800, 1200, 1600,
+ 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000, 6400,
+ 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10600, 11000,
+ 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800,
+ 15300, 15800, 16200, 16600, 17000, 17400, 17800, 18200, 18700,
+ 19200, 19600, 20000, 20400, 20800, 21200, 21600, 22100, 22600,
+ 23000, 23400, 23800, 24200, 24600, 25000, 25400, 25900, 26400,
+ 26800, 27200, 27600, 28000, 28400, 28800, 29300, 29800, 30200,
+ 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
+ 34400, 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800,
+ 38200, 38600, 39000, 39400, 39800, 40200, 40600, 41100, 41600,
+ 42000, 42400, 42800, 43200, 43600, 44000, 44400, 44800, 45300,
+ 45800, 46200, 46600, 47000, 47400, 47800, 48200, 48600, 49000,
+ 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400, 52800,
+ 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600,
+ 57000, 57400, 57800, 58200, 58700, 59200, 59600, 60000, 60400,
+ 60800, 61200, 61600, 62000, 62400, 62800, 63300, 63800, 64200,
+ 64600, 65000, 65400, 65800, 66200, 66600, 67000, 67400, 67800,
+ 68200, 68700, 69200, 69600, 70000, 70400, 70800, 71200, 71600,
+ 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
+ 75800, 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000,
+ 79400, 79800, 80300, 80800, 81200, 81600, 82000, 82400, 82800,
+ 83200, 83600, 84000, 84400, 84800, 85200, 85600, 86000, 86400,
+ 86800, 87300, 87800, 88200, 88600, 89000, 89400, 89800, 90200,
+ 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400, 93800,
+ 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600,
+ 98000, 98400, 98800, 99200, 99600, 100000, 100400, 100800, 101200,
+ 101600, 102000, 102400, 102800, 103200, 103600, 104000, 104400,
+ 104800, 105200, 105600, 106100, 106600, 107000, 107400, 107800,
+ 108200, 108600, 109000, 109400, 109800, 110200, 110600, 111000,
+ 111400, 111800, 112200, 112600, 113000, 113400, 113800, 114200,
+ 114600, 115000, 115400, 115800, 116200, 116600, 117000, 117400,
+ 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
+ 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
+ 124600, 124900, 125000, 125000, 125000, 125000
+};
+
+static const int
+omap5430_adc_to_temp[OMAP5430_ADC_END_VALUE - OMAP5430_ADC_START_VALUE + 1] = {
+ -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600,
+ -38200, -37800, -37300, -36800,
+ -36400, -36000, -35600, -35200, -34800, -34300, -33800, -33400, -33000,
+ -32600,
+ -32200, -31800, -31300, -30800, -30400, -30000, -29600, -29200, -28700,
+ -28200, -27800, -27400, -27000, -26600, -26200, -25700, -25200, -24800,
+ -24400, -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
+ -20600, -20200, -19700, -19200, -9300, -18400, -18000, -17600, -17200,
+ -16700, -16200, -15800, -15400, -15000, -14600, -14200, -13700, -13200,
+ -12800, -12400, -12000, -11600, -11200, -10700, -10200, -9800, -9400,
+ -9000,
+ -8600, -8200, -7700, -7200, -6800, -6400, -6000, -5600, -5200, -4800,
+ -4300,
+ -3800, -3400, -3000, -2600, -2200, -1800, -1300, -800, -400, 0, 400,
+ 800,
+ 1200, 1600, 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000,
+ 6400, 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10800,
+ 11100,
+ 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800, 15300,
+ 15800,
+ 16200, 16600, 17000, 17400, 17800, 18200, 18700, 19200, 19600, 20000,
+ 20400,
+ 20800, 21200, 21600, 22100, 22600, 23000, 23400, 23800, 24200, 24600,
+ 25000,
+ 25400, 25900, 26400, 26800, 27200, 27600, 28000, 28400, 28800, 29300,
+ 29800,
+ 30200, 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
+ 34400,
+ 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800, 38200, 38600,
+ 39000,
+ 39400, 39800, 40200, 40600, 41100, 41600, 42000, 42400, 42800, 43200,
+ 43600,
+ 44000, 44400, 44800, 45300, 45800, 46200, 46600, 47000, 47400, 47800,
+ 48200,
+ 48600, 49000, 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400,
+ 52800,
+ 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600, 57000,
+ 57400,
+ 57800, 58200, 58700, 59200, 59600, 60000, 60400, 60800, 61200, 61600,
+ 62000,
+ 62400, 62800, 63300, 63800, 64200, 64600, 65000, 65400, 65800, 66200,
+ 66600,
+ 67000, 67400, 67800, 68200, 68700, 69200, 69600, 70000, 70400, 70800,
+ 71200,
+ 71600, 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
+ 75800,
+ 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000, 79400, 79800,
+ 80300,
+ 80800, 81200, 81600, 82000, 82400, 82800, 83200, 83600, 84000, 84400,
+ 84800,
+ 85200, 85600, 86000, 86400, 86800, 87300, 87800, 88200, 88600, 89000,
+ 89400,
+ 89800, 90200, 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400,
+ 93800,
+ 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600, 98000,
+ 98400,
+ 98800, 99200, 99600, 100000, 100400, 100800, 101200, 101600, 102000,
+ 102400,
+ 102800, 103200, 103600, 104000, 104400, 104800, 105200, 105600, 106100,
+ 106600, 107000, 107400, 107800, 108200, 108600, 109000, 109400, 109800,
+ 110200, 110600, 111000, 111400, 111800, 112200, 112600, 113000, 113400,
+ 113800, 114200, 114600, 115000, 115400, 115800, 116200, 116600, 117000,
+ 117400, 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
+ 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
+ 124600, 124900, 125000, 125000, 125000, 125000,
+};
+
+static irqreturn_t talert_irq_handler(int irq, void *data)
+{
+ struct omap_bandgap *bg_ptr = data;
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 t_hot = 0, t_cold = 0, temp, ctrl;
+ int i, r;
+
+ bg_ptr = data;
+ /* Read the status of t_hot */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ tsr = bg_ptr->pdata->sensors[i].registers;
+ r = omap_control_readl(cdev, tsr->bgap_status, &t_hot);
+ t_hot &= tsr->status_hot_mask;
+
+ /* Read the status of t_cold */
+ r |= omap_control_readl(cdev, tsr->bgap_status, &t_cold);
+ t_cold &= tsr->status_cold_mask;
+
+ if (!t_cold && !t_hot)
+ continue;
+
+ r |= omap_control_readl(cdev, tsr->bgap_mask_ctrl, &ctrl);
+ /*
+ * One TALERT interrupt: Two sources
+ * If the interrupt is due to t_hot then mask t_hot and
+ * and unmask t_cold else mask t_cold and unmask t_hot
+ */
+ if (t_hot) {
+ ctrl &= ~tsr->mask_hot_mask;
+ ctrl |= tsr->mask_cold_mask;
+ } else if (t_cold) {
+ ctrl &= ~tsr->mask_cold_mask;
+ ctrl |= tsr->mask_hot_mask;
+ }
+
+ r |= omap_control_writel(cdev, ctrl, tsr->bgap_mask_ctrl);
+
+ if (r) {
+ dev_err(bg_ptr->dev, "failed to ack talert interrupt\n");
+ return IRQ_NONE;
+ }
+
+ /* read temperature */
+ r = omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
+ temp &= tsr->bgap_dtemp_mask;
+
+ /* report temperature to whom may concern */
+ if (bg_ptr->pdata->report_temperature)
+ bg_ptr->pdata->report_temperature(bg_ptr, i);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t omap_bandgap_tshut_irq_handler(int irq, void *data)
+{
+ orderly_poweroff(true);
+
+ return IRQ_HANDLED;
+}
+
+static
+int adc_to_temp_conversion(struct omap_bandgap *bg_ptr, int id, int adc_val,
+ int *t)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+
+ /* look up for temperature in the table and return the temperature */
+ if (adc_val < ts_data->adc_start_val || adc_val > ts_data->adc_end_val)
+ return -ERANGE;
+
+ *t = bg_ptr->conv_table[adc_val - ts_data->adc_start_val];
+
+ return 0;
+}
+
+static int temp_to_adc_conversion(long temp, struct omap_bandgap *bg_ptr, int i,
+ int *adc)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[i].ts_data;
+ int high, low, mid;
+
+ low = 0;
+ high = ts_data->adc_end_val - ts_data->adc_start_val;
+ mid = (high + low) / 2;
+
+ if (temp < bg_ptr->conv_table[high] || temp > bg_ptr->conv_table[high])
+ return -EINVAL;
+
+ while (low < high) {
+ if (temp < bg_ptr->conv_table[mid])
+ high = mid - 1;
+ else
+ low = mid + 1;
+ mid = (low + high) / 2;
+ }
+
+ *adc = ts_data->adc_start_val + low;
+
+ return 0;
+}
+
+static int temp_sensor_unmask_interrupts(struct omap_bandgap *bg_ptr, int id,
+ u32 t_hot, u32 t_cold)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 temp, reg_val;
+ int err;
+
+ /* Read the current on die temperature */
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
+ temp &= tsr->bgap_dtemp_mask;
+
+ err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl, ®_val);
+ if (temp < t_hot)
+ reg_val |= tsr->mask_hot_mask;
+ else
+ reg_val &= ~tsr->mask_hot_mask;
+
+ if (t_cold < temp)
+ reg_val |= tsr->mask_cold_mask;
+ else
+ reg_val &= ~tsr->mask_cold_mask;
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
+
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to unmask interrupts\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static
+int add_hyst(int adc_val, int hyst_val, struct omap_bandgap *bg_ptr, int i,
+ u32 *sum)
+{
+ int temp, ret;
+
+ ret = adc_to_temp_conversion(bg_ptr, i, adc_val, &temp);
+ if (ret < 0)
+ return ret;
+
+ temp += hyst_val;
+
+ return temp_to_adc_conversion(temp, bg_ptr, i, sum);
+}
+
+static
+int temp_sensor_configure_thot(struct omap_bandgap *bg_ptr, int id, int t_hot)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 thresh_val, reg_val;
+ int cold, err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+
+ /* obtain the T cold value */
+ err = omap_control_readl(cdev, tsr->bgap_threshold, &thresh_val);
+ cold = (thresh_val & tsr->threshold_tcold_mask) >>
+ __ffs(tsr->threshold_tcold_mask);
+ if (t_hot <= cold) {
+ /* change the t_cold to t_hot - 5000 millidegrees */
+ err |= add_hyst(t_hot, -ts_data->hyst_val, bg_ptr, id, &cold);
+ /* write the new t_cold value */
+ reg_val = thresh_val & (~tsr->threshold_tcold_mask);
+ reg_val |= cold << __ffs(tsr->threshold_tcold_mask);
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ thresh_val = reg_val;
+ }
+
+ /* write the new t_hot value */
+ reg_val = thresh_val & ~tsr->threshold_thot_mask;
+ reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
+ return -EIO;
+ }
+
+ return temp_sensor_unmask_interrupts(bg_ptr, id, t_hot, cold);
+}
+
+static
+int temp_sensor_init_talert_thresholds(struct omap_bandgap *bg_ptr, int id,
+ int t_hot, int t_cold)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 reg_val, thresh_val;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = omap_control_readl(cdev, tsr->bgap_threshold, &thresh_val);
+
+ /* write the new t_cold value */
+ reg_val = thresh_val & ~tsr->threshold_tcold_mask;
+ reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
+ return -EIO;
+ }
+
+ err = omap_control_readl(cdev, tsr->bgap_threshold, &thresh_val);
+
+ /* write the new t_hot value */
+ reg_val = thresh_val & ~tsr->threshold_thot_mask;
+ reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
+ return -EIO;
+ }
+
+ err = omap_control_readl(cdev, tsr->bgap_mask_ctrl, ®_val);
+ reg_val |= tsr->mask_hot_mask;
+ reg_val |= tsr->mask_cold_mask;
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
+ return -EIO;
+ }
+
+ return err;
+}
+
+static
+int temp_sensor_configure_tcold(struct omap_bandgap *bg_ptr, int id,
+ int t_cold)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 thresh_val, reg_val;
+ int hot, err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ /* obtain the T cold value */
+ err = omap_control_readl(cdev, tsr->bgap_threshold, &thresh_val);
+ hot = (thresh_val & tsr->threshold_thot_mask) >>
+ __ffs(tsr->threshold_thot_mask);
+
+ if (t_cold >= hot) {
+ /* change the t_hot to t_cold + 5000 millidegrees */
+ err |= add_hyst(t_cold, ts_data->hyst_val, bg_ptr, id, &hot);
+ /* write the new t_hot value */
+ reg_val = thresh_val & (~tsr->threshold_thot_mask);
+ reg_val |= hot << __ffs(tsr->threshold_thot_mask);
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ thresh_val = reg_val;
+ }
+
+ /* write the new t_cold value */
+ reg_val = thresh_val & ~tsr->threshold_tcold_mask;
+ reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
+ return -EIO;
+ }
+
+ return temp_sensor_unmask_interrupts(bg_ptr, id, hot, t_cold);
+}
+
+static int temp_sensor_configure_tshut_hot(struct omap_bandgap *bg_ptr,
+ int id, int tshut_hot)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 reg_val;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = omap_control_readl(cdev, tsr->tshut_threshold, ®_val);
+ reg_val &= ~tsr->tshut_hot_mask;
+ reg_val |= tshut_hot << __ffs(tsr->tshut_hot_mask);
+ err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tshut thot\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int temp_sensor_configure_tshut_cold(struct omap_bandgap *bg_ptr,
+ int id, int tshut_cold)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 reg_val;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = omap_control_readl(cdev, tsr->tshut_threshold, ®_val);
+ reg_val &= ~tsr->tshut_cold_mask;
+ reg_val |= tshut_cold << __ffs(tsr->tshut_cold_mask);
+ err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int configure_temp_sensor_counter(struct omap_bandgap *bg_ptr, int id,
+ u32 counter)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 val;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = omap_control_readl(cdev, tsr->bgap_counter, &val);
+ val &= ~tsr->counter_mask;
+ val |= counter << __ffs(tsr->counter_mask);
+ err |= omap_control_writel(cdev, val, tsr->bgap_counter);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+/* Exposed APIs */
+/**
+ * omap_bandgap_read_thot() - reads sensor current thot
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @thot - resulting current thot value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id,
+ int *thot)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 temp;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = omap_control_readl(cdev, tsr->bgap_threshold, &temp);
+ temp = (temp & tsr->threshold_thot_mask) >>
+ __ffs(tsr->threshold_thot_mask);
+ ret |= adc_to_temp_conversion(bg_ptr, id, temp, &temp);
+ if (ret) {
+ dev_err(bg_ptr->dev, "failed to read thot\n");
+ return -EIO;
+ }
+
+ *thot = temp;
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_write_thot() - sets sensor current thot
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @val - desired thot value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct temp_sensor_registers *tsr;
+ u32 t_hot;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+
+ if (val < ts_data->min_temp + ts_data->hyst_val)
+ return -EINVAL;
+ ret = temp_to_adc_conversion(val, bg_ptr, id, &t_hot);
+ if (ret < 0)
+ return ret;
+
+ mutex_lock(&bg_ptr->bg_mutex);
+ temp_sensor_configure_thot(bg_ptr, id, t_hot);
+ mutex_unlock(&bg_ptr->bg_mutex);
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_read_tcold() - reads sensor current tcold
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @tcold - resulting current tcold value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id,
+ int *tcold)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 temp;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = omap_control_readl(cdev, tsr->bgap_threshold, &temp);
+ temp = (temp & tsr->threshold_tcold_mask)
+ >> __ffs(tsr->threshold_tcold_mask);
+ ret |= adc_to_temp_conversion(bg_ptr, id, temp, &temp);
+ if (ret)
+ return -EIO;
+
+ *tcold = temp;
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_write_tcold() - sets the sensor tcold
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @val - desired tcold value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct temp_sensor_registers *tsr;
+ u32 t_cold;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ if (val > ts_data->max_temp + ts_data->hyst_val)
+ return -EINVAL;
+
+ ret = temp_to_adc_conversion(val, bg_ptr, id, &t_cold);
+ if (ret < 0)
+ return ret;
+
+ mutex_lock(&bg_ptr->bg_mutex);
+ temp_sensor_configure_tcold(bg_ptr, id, t_cold);
+ mutex_unlock(&bg_ptr->bg_mutex);
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_read_update_interval() - read the sensor update interval
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @interval - resulting update interval in miliseconds
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
+ int *interval)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 time;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = omap_control_readl(cdev, tsr->bgap_counter, &time);
+ if (ret)
+ return ret;
+ time = (time & tsr->counter_mask) >> __ffs(tsr->counter_mask);
+ time = time * 1000 / bg_ptr->clk_rate;
+
+ *interval = time;
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_write_update_interval() - set the update interval
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @interval - desired update interval in miliseconds
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr,
+ int id, u32 interval)
+{
+ interval = interval * bg_ptr->clk_rate / 1000;
+ mutex_lock(&bg_ptr->bg_mutex);
+ configure_temp_sensor_counter(bg_ptr, id, interval);
+ mutex_unlock(&bg_ptr->bg_mutex);
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_read_temperature() - report current temperature
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @temperature - resulting temperature
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
+ int *temperature)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 temp;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
+ temp &= tsr->bgap_dtemp_mask;
+
+ ret |= adc_to_temp_conversion(bg_ptr, id, temp, &temp);
+ if (ret)
+ return -EIO;
+
+ *temperature = temp;
+
+ return 0;
+}
+
+/**
+ * enable_continuous_mode() - One time enabling of continuous conversion mode
+ * @bg_ptr - pointer to scm instance
+ */
+static int enable_continuous_mode(struct omap_bandgap *bg_ptr)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ int i, r;
+ u32 val;
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ tsr = bg_ptr->pdata->sensors[i].registers;
+ r = omap_control_readl(cdev, tsr->bgap_mode_ctrl, &val);
+ val |= 1 << __ffs(tsr->mode_ctrl_mask);
+ r |= omap_control_writel(cdev, val, tsr->bgap_mode_ctrl);
+ if (r)
+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
+ }
+
+ return r ? -EIO : 0;
+}
+
+static int omap_bandgap_tshut_init(struct omap_bandgap *bg_ptr,
+ struct platform_device *pdev)
+{
+ int gpio_nr = bg_ptr->tshut_gpio;
+ int status;
+
+ /* Request for gpio_86 line */
+ status = gpio_request(gpio_nr, "tshut");
+ if (status < 0) {
+ dev_err(bg_ptr->dev,
+ "Could not request for TSHUT GPIO:%i\n", 86);
+ return status;
+ }
+ status = gpio_direction_input(gpio_nr);
+ if (status) {
+ dev_err(bg_ptr->dev,
+ "Cannot set input TSHUT GPIO %d\n", gpio_nr);
+ return status;
+ }
+
+ status = request_irq(gpio_to_irq(gpio_nr),
+ omap_bandgap_tshut_irq_handler,
+ IRQF_TRIGGER_RISING, "tshut",
+ NULL);
+ if (status) {
+ gpio_free(gpio_nr);
+ dev_err(bg_ptr->dev, "request irq failed for TSHUT");
+ }
+
+ return 0;
+}
+
+static int omap_bandgap_talert_init(struct omap_bandgap *bg_ptr,
+ struct platform_device *pdev)
+{
+ int ret;
+
+ bg_ptr->irq = platform_get_irq(pdev, 0);
+ if (bg_ptr->irq < 0) {
+ dev_err(&pdev->dev, "get_irq failed\n");
+ return bg_ptr->irq;
+ }
+ ret = request_threaded_irq(bg_ptr->irq, NULL,
+ talert_irq_handler,
+ IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
+ "talert", bg_ptr);
+ if (ret) {
+ dev_err(&pdev->dev, "Request threaded irq failed.\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct omap_bandgap_data omap4460_data = {
+ .has_talert = true,
+ .has_tshut = true,
+ .fclock_name = "bandgap_ts_fclk",
+ .div_ck_name = "div_ts_ck",
+ .conv_table = omap4460_adc_to_temp,
+ .sensors = {
+ {
+ .registers = &omap4460_mpu_temp_sensor_registers,
+ .ts_data = &omap4460_mpu_temp_sensor_data,
+ .domain = "cpu",
+ },
+ },
+ .sensor_count = 1,
+};
+
+static const struct omap_bandgap_data omap5430_data = {
+ .has_talert = true,
+ .has_tshut = true,
+ .fclock_name = "ts_clk_div_ck",
+ .div_ck_name = "ts_clk_div_ck",
+ .conv_table = omap5430_adc_to_temp,
+ .sensors = {
+ {
+ .registers = &omap5430_mpu_temp_sensor_registers,
+ .ts_data = &omap5430_mpu_temp_sensor_data,
+ .domain = "cpu",
+ },
+ {
+ .registers = &omap5430_gpu_temp_sensor_registers,
+ .ts_data = &omap5430_gpu_temp_sensor_data,
+ .domain = "gpu",
+ },
+ {
+ .registers = &omap5430_core_temp_sensor_registers,
+ .ts_data = &omap5430_core_temp_sensor_data,
+ .domain = "core",
+ },
+ },
+ .sensor_count = 3,
+};
+
+static const struct of_device_id of_omap_bandgap_match[] = {
+ /*
+ * TODO: Add support to 4430
+ * { .compatible = "ti,omap4430-bandgap", .data = , },
+ */
+ {
+ .compatible = "ti,omap4460-bandgap",
+ .data = (void *)&omap4460_data,
+ },
+ {
+ .compatible = "ti,omap5430-bandgap",
+ .data = (void *)&omap5430_data,
+ },
+ /* Sentinel */
+ { },
+};
+
+static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
+{
+ struct device_node *node = pdev->dev.of_node;
+ const struct of_device_id *of_id;
+ struct omap_bandgap *bg_ptr;
+ u32 prop;
+
+ /* just for the sake */
+ if (!node) {
+ dev_err(&pdev->dev, "no platform information available\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ bg_ptr = devm_kzalloc(&pdev->dev, sizeof(struct omap_bandgap),
+ GFP_KERNEL);
+ if (!bg_ptr) {
+ dev_err(&pdev->dev, "Unable to allocate mem for driver ref\n");
+ return ERR_PTR(-ENOMEM);
+ }
+
+ of_id = of_match_device(of_omap_bandgap_match, &pdev->dev);
+ if (of_id)
+ bg_ptr->pdata = of_id->data;
+
+ if (bg_ptr->pdata->has_tshut) {
+ if (of_property_read_u32(node, "ti,tshut-gpio", &prop) < 0) {
+ dev_err(&pdev->dev, "missing tshut gpio in device tree\n");
+ return ERR_PTR(-EINVAL);
+ }
+ bg_ptr->tshut_gpio = prop;
+ if (!gpio_is_valid(bg_ptr->tshut_gpio)) {
+ dev_err(&pdev->dev, "invalid gpio for tshut (%d)\n",
+ bg_ptr->tshut_gpio);
+ return ERR_PTR(-EINVAL);
+ }
+ }
+
+ return bg_ptr;
+}
+
+static
+int __devinit omap_bandgap_probe(struct platform_device *pdev)
+{
+ struct device *cdev = pdev->dev.parent;
+ struct omap_bandgap *bg_ptr;
+ int clk_rate, ret = 0, i;
+
+ if (!cdev) {
+ dev_err(&pdev->dev, "no omap control ref in our parent\n");
+ return -EINVAL;
+ }
+
+ bg_ptr = omap_bandgap_build(pdev);
+ if (IS_ERR_OR_NULL(bg_ptr)) {
+ dev_err(&pdev->dev, "failed to fetch platform data\n");
+ return PTR_ERR(bg_ptr);
+ }
+
+ if (bg_ptr->pdata->has_talert) {
+ ret = omap_bandgap_talert_init(bg_ptr, pdev);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to initialize Talert IRQ\n");
+ return ret;
+ }
+ }
+
+ if (bg_ptr->pdata->has_tshut) {
+ ret = omap_bandgap_tshut_init(bg_ptr, pdev);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "failed to initialize system tshut IRQ\n");
+ goto free_talert;
+ }
+ }
+
+ bg_ptr->fclock = clk_get(NULL, bg_ptr->pdata->fclock_name);
+ ret = IS_ERR_OR_NULL(bg_ptr->fclock);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to request fclock reference\n");
+ goto free_irqs;
+ }
+
+ bg_ptr->div_clk = clk_get(NULL, bg_ptr->pdata->div_ck_name);
+ ret = IS_ERR_OR_NULL(bg_ptr->div_clk);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "failed to request div_ts_ck clock ref\n");
+ goto free_irqs;
+ }
+
+ bg_ptr->conv_table = bg_ptr->pdata->conv_table;
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_registers *tsr;
+ u32 val;
+
+ tsr = bg_ptr->pdata->sensors[i].registers;
+ /*
+ * check if the efuse has a non-zero value if not
+ * it is an untrimmed sample and the temperatures
+ * may not be accurate
+ */
+ ret = omap_control_readl(cdev, tsr->bgap_efuse, &val);
+ if (ret || !val)
+ dev_info(&pdev->dev,
+ "Non-trimmed BGAP, Temp not accurate\n");
+ }
+
+ clk_rate = clk_round_rate(bg_ptr->div_clk,
+ bg_ptr->pdata->sensors[0].ts_data->max_freq);
+ if (clk_rate < bg_ptr->pdata->sensors[0].ts_data->min_freq ||
+ clk_rate == 0xffffffff) {
+ ret = -ENODEV;
+ goto put_clks;
+ }
+
+ ret = clk_set_rate(bg_ptr->div_clk, clk_rate);
+ if (ret) {
+ dev_err(&pdev->dev, "Cannot set clock rate\n");
+ goto put_clks;
+ }
+
+ bg_ptr->clk_rate = clk_rate;
+ clk_enable(bg_ptr->fclock);
+
+ mutex_init(&bg_ptr->bg_mutex);
+ bg_ptr->dev = &pdev->dev;
+ platform_set_drvdata(pdev, bg_ptr);
+
+ /* 1 clk cycle */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++)
+ configure_temp_sensor_counter(bg_ptr, i, 1);
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_data *ts_data;
+
+ ts_data = bg_ptr->pdata->sensors[i].ts_data;
+
+ temp_sensor_init_talert_thresholds(bg_ptr, i,
+ ts_data->t_hot,
+ ts_data->t_cold);
+ temp_sensor_configure_tshut_hot(bg_ptr, i,
+ ts_data->tshut_hot);
+ temp_sensor_configure_tshut_cold(bg_ptr, i,
+ ts_data->tshut_cold);
+ }
+
+ enable_continuous_mode(bg_ptr);
+
+ /* Set .250 seconds time as default counter */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++)
+ configure_temp_sensor_counter(bg_ptr, i,
+ bg_ptr->clk_rate / 4);
+
+ /* Every thing is good? Then expose the sensors */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ char *domain;
+
+ domain = bg_ptr->pdata->sensors[i].domain;
+ if (bg_ptr->pdata->expose_sensor)
+ bg_ptr->pdata->expose_sensor(bg_ptr, i, domain);
+ }
+
+ return 0;
+
+put_clks:
+ clk_disable(bg_ptr->fclock);
+ clk_put(bg_ptr->fclock);
+ clk_put(bg_ptr->div_clk);
+free_irqs:
+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
+ gpio_free(bg_ptr->tshut_gpio);
+free_talert:
+ free_irq(bg_ptr->irq, bg_ptr);
+
+ return ret;
+}
+
+static
+int __devexit omap_bandgap_remove(struct platform_device *pdev)
+{
+ struct omap_bandgap *bg_ptr = platform_get_drvdata(pdev);
+
+ clk_disable(bg_ptr->fclock);
+ clk_put(bg_ptr->fclock);
+ clk_put(bg_ptr->div_clk);
+ free_irq(bg_ptr->irq, bg_ptr);
+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
+ gpio_free(bg_ptr->tshut_gpio);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int omap_bandgap_save_ctxt(struct omap_bandgap *bg_ptr)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ int err = 0;
+ int i;
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_registers *tsr;
+ struct temp_sensor_regval *rval;
+
+ rval = bg_ptr->pdata->sensors[i].regval;
+ tsr = bg_ptr->pdata->sensors[i].registers;
+
+ err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,
+ &rval->bg_mode_ctrl);
+ err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,
+ &rval->bg_ctrl);
+ err |= omap_control_readl(cdev, tsr->bgap_counter,
+ &rval->bg_counter);
+ err |= omap_control_readl(cdev, tsr->bgap_threshold,
+ &rval->bg_threshold);
+ err |= omap_control_readl(cdev, tsr->tshut_threshold,
+ &rval->tshut_threshold);
+
+ if (err)
+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
+ }
+
+ return err ? -EIO : 0;
+}
+
+static int
+omap_bandgap_force_single_read(struct omap_bandgap *bg_ptr, int id)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 temp = 0, counter = 1000;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ /* Select single conversion mode */
+ err = omap_control_readl(cdev, tsr->bgap_mode_ctrl, &temp);
+ temp &= ~(1 << __ffs(tsr->mode_ctrl_mask));
+ omap_control_writel(cdev, temp, tsr->bgap_mode_ctrl);
+
+ /* Start of Conversion = 1 */
+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
+ temp |= 1 << __ffs(tsr->bgap_soc_mask);
+ omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
+ /* Wait until DTEMP is updated */
+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
+ temp &= (tsr->bgap_dtemp_mask);
+ while ((temp == 0) && --counter) {
+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
+ temp &= (tsr->bgap_dtemp_mask);
+ }
+ /* Start of Conversion = 0 */
+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
+ temp &= ~(1 << __ffs(tsr->bgap_soc_mask));
+ err |= omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
+
+ return err ? -EIO : 0;
+}
+
+static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ int i, err = 0;
+ u32 temp = 0;
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_registers *tsr;
+ struct temp_sensor_regval *rval;
+ u32 val;
+
+ rval = bg_ptr->pdata->sensors[i].regval;
+ tsr = bg_ptr->pdata->sensors[i].registers;
+
+ err = omap_control_readl(cdev, tsr->bgap_counter, &val);
+ if (val == 0) {
+ err |= omap_control_writel(cdev, rval->bg_threshold,
+ tsr->bgap_threshold);
+ err |= omap_control_writel(cdev, rval->tshut_threshold,
+ tsr->tshut_threshold);
+ /* Force immediate temperature measurement and update
+ * of the DTEMP field
+ */
+ omap_bandgap_force_single_read(bg_ptr, i);
+ err |= omap_control_writel(cdev, rval->bg_counter,
+ tsr->bgap_counter);
+ err |= omap_control_writel(cdev, rval->bg_mode_ctrl,
+ tsr->bgap_mode_ctrl);
+ err |= omap_control_writel(cdev, rval->bg_ctrl,
+ tsr->bgap_mask_ctrl);
+ } else {
+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,
+ &temp);
+ temp &= (tsr->bgap_dtemp_mask);
+ if (temp == 0) {
+ omap_bandgap_force_single_read(bg_ptr, i);
+ err |= omap_control_readl(cdev,
+ tsr->bgap_mask_ctrl,
+ &temp);
+ temp |= 1 << __ffs(tsr->mode_ctrl_mask);
+ err |= omap_control_writel(cdev, temp,
+ tsr->bgap_mask_ctrl);
+ }
+ }
+ if (err)
+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
+ }
+
+ return err ? -EIO : 0;
+}
+
+static int omap_bandgap_suspend(struct device *dev)
+{
+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
+ int err;
+
+ err = omap_bandgap_save_ctxt(bg_ptr);
+ clk_disable(bg_ptr->fclock);
+
+ return err;
+}
+
+static int omap_bandgap_resume(struct device *dev)
+{
+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
+
+ clk_enable(bg_ptr->fclock);
+
+ return omap_bandgap_restore_ctxt(bg_ptr);
+}
+static const struct dev_pm_ops omap_bandgap_dev_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(omap_bandgap_suspend,
+ omap_bandgap_resume)
+};
+
+#define DEV_PM_OPS (&omap_bandgap_dev_pm_ops)
+#else
+#define DEV_PM_OPS NULL
+#endif
+
+static struct platform_driver omap_bandgap_sensor_driver = {
+ .probe = omap_bandgap_probe,
+ .remove = omap_bandgap_remove,
+ .driver = {
+ .name = "omap-bandgap",
+ .pm = DEV_PM_OPS,
+ .of_match_table = of_omap_bandgap_match,
+ },
+};
+
+module_platform_driver(omap_bandgap_sensor_driver);
+early_platform_init("early_omap_temperature", &omap_bandgap_sensor_driver);
+
+MODULE_DESCRIPTION("OMAP4+ bandgap temperature sensor driver");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:omap-bandgap");
+MODULE_AUTHOR("Texas Instrument Inc.");
diff --git a/drivers/thermal/omap-bandgap.h b/drivers/thermal/omap-bandgap.h
new file mode 100644
index 0000000..12e0d6b
--- /dev/null
+++ b/drivers/thermal/omap-bandgap.h
@@ -0,0 +1,63 @@
+/*
+ * OMAP4 Bandgap temperature sensor driver
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ * Contact:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+#ifndef __OMAP_BANDGAP_H
+#define __OMAP_BANDGAP_H
+
+struct omap_bandgap_data;
+
+/**
+ * struct omap_bandgap - bandgap device structure
+ * @dev: device pointer
+ * @pdata: platform data with sensor data
+ * @fclock: pointer to functional clock of temperature sensor
+ * @div_clk: pointer to parent clock of temperature sensor fclk
+ * @conv_table: Pointer to adc to temperature conversion table
+ * @bg_mutex: Mutex for sysfs, irq and PM
+ * @irq: MPU Irq number for thermal alert
+ * @tshut_gpio: GPIO where Tshut signal is routed
+ * @clk_rate: Holds current clock rate
+ */
+struct omap_bandgap {
+ struct device *dev;
+ const struct omap_bandgap_data *pdata;
+ struct clk *fclock;
+ struct clk *div_clk;
+ const int *conv_table;
+ struct mutex bg_mutex; /* Mutex for irq and PM */
+ int irq;
+ int tshut_gpio;
+ u32 clk_rate;
+};
+
+int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id, int *thot);
+int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val);
+int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id, int *tcold);
+int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val);
+int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
+ int *interval);
+int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr, int id,
+ u32 interval);
+int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
+ int *temperature);
+
+#endif
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
@ 2012-05-25 8:25 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:25 UTC (permalink / raw)
To: linux-arm-kernel
In the System Control Module, OMAP supplies a voltage reference
and a temperature sensor feature that are gathered in the band
gap voltage and temperature sensor (VBGAPTS) module. The band
gap provides current and voltage reference for its internal
circuits and other analog IP blocks. The analog-to-digital
converter (ADC) produces an output value that is proportional
to the silicon temperature.
This patch provides a platform driver which expose this feature.
It is moduled as a MFD child of the System Control Module core
MFD driver.
This driver provides only APIs to access the device properties,
like temperature, thresholds and update rate.
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
.../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
drivers/thermal/Kconfig | 13 +
drivers/thermal/Makefile | 4 +-
drivers/thermal/omap-bandgap.c | 1601 ++++++++++++++++++++
drivers/thermal/omap-bandgap.h | 63 +
5 files changed, 1707 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
create mode 100644 drivers/thermal/omap-bandgap.c
create mode 100644 drivers/thermal/omap-bandgap.h
diff --git a/Documentation/devicetree/bindings/thermal/omap_bandgap.txt b/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
new file mode 100644
index 0000000..430bcf8
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
@@ -0,0 +1,27 @@
+* Texas Instrument OMAP SCM bandgap bindings
+
+In the System Control Module, OMAP supplies a voltage reference
+and a temperature sensor feature that are gathered in the band
+gap voltage and temperature sensor (VBGAPTS) module. The band
+gap provides current and voltage reference for its internal
+circuits and other analog IP blocks. The analog-to-digital
+converter (ADC) produces an output value that is proportional
+to the silicon temperature.
+
+Required properties:
+- compatible : Should be:
+ - "ti,omap4460-control-bandgap" : for OMAP4460 bandgap
+ - "ti,omap5430-control-bandgap" : for OMAP5430 bandgap
+- interrupts : this entry should indicate which interrupt line
+the talert signal is routed to;
+Specific:
+- ti,tshut-gpio : this entry should be used to inform which GPIO
+line the tshut signal is routed to;
+
+Example:
+
+bandgap {
+ compatible = "ti,omap4460-control-bandgap";
+ interrupts = <0 126 4>; /* talert */
+ ti,tshut-gpio = <86>;
+};
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 514a691..ffdd240 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -26,3 +26,16 @@ config SPEAR_THERMAL
help
Enable this to plug the SPEAr thermal sensor driver into the Linux
thermal framework
+
+config OMAP_BANDGAP
+ tristate "Texas Instruments OMAP4+ temperature sensor driver"
+ depends on THERMAL
+ depends on MFD_OMAP_CONTROL
+ help
+ If you say yes here you get support for the Texas Instruments
+ OMAP4460+ on die bandgap temperature sensor support. The register
+ set is part of system control module.
+
+ This includes alert interrupts generation and also the TSHUT
+ support.
+
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index a9fff0b..5ff1af1 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -3,4 +3,6 @@
#
obj-$(CONFIG_THERMAL) += thermal_sys.o
-obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
\ No newline at end of file
+obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
+obj-$(CONFIG_OMAP_BANDGAP) += omap-thermal.o
+omap-thermal-y := omap-bandgap.o
diff --git a/drivers/thermal/omap-bandgap.c b/drivers/thermal/omap-bandgap.c
new file mode 100644
index 0000000..3d5a12b
--- /dev/null
+++ b/drivers/thermal/omap-bandgap.c
@@ -0,0 +1,1601 @@
+/*
+ * OMAP4 Bandgap temperature sensor driver
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Author: J Keerthy <j-keerthy@ti.com>
+ * Author: Moiz Sonasath <m-sonasath@ti.com>
+ * Couple of fixes, DT and MFD adaptation:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/export.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/clk.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/types.h>
+#include <linux/mutex.h>
+#include <linux/reboot.h>
+#include <linux/of_platform.h>
+#include <linux/of_irq.h>
+#include <linux/mfd/omap_control.h>
+
+#include <mach/control.h>
+
+#include "omap-bandgap.h"
+
+/* Offsets from the base of temperature sensor registers */
+
+#define OMAP4460_TEMP_SENSOR_CTRL_OFFSET 0x32C
+#define OMAP4460_BGAP_CTRL_OFFSET 0x378
+#define OMAP4460_BGAP_COUNTER_OFFSET 0x37C
+#define OMAP4460_BGAP_THRESHOLD_OFFSET 0x380
+#define OMAP4460_BGAP_TSHUT_OFFSET 0x384
+#define OMAP4460_BGAP_STATUS_OFFSET 0x388
+#define OMAP4460_FUSE_OPP_BGAP 0x260
+
+#define OMAP5430_TEMP_SENSOR_MPU_OFFSET 0x32C
+#define OMAP5430_BGAP_CTRL_OFFSET 0x380
+#define OMAP5430_BGAP_COUNTER_MPU_OFFSET 0x39C
+#define OMAP5430_BGAP_THRESHOLD_MPU_OFFSET 0x384
+#define OMAP5430_BGAP_TSHUT_MPU_OFFSET 0x390
+#define OMAP5430_BGAP_STATUS_OFFSET 0x3A8
+#define OMAP5430_FUSE_OPP_BGAP_MPU 0x1E4
+
+#define OMAP5430_TEMP_SENSOR_GPU_OFFSET 0x330
+#define OMAP5430_BGAP_COUNTER_GPU_OFFSET 0x3A0
+#define OMAP5430_BGAP_THRESHOLD_GPU_OFFSET 0x388
+#define OMAP5430_BGAP_TSHUT_GPU_OFFSET 0x394
+#define OMAP5430_FUSE_OPP_BGAP_GPU 0x1E0
+
+#define OMAP5430_TEMP_SENSOR_CORE_OFFSET 0x334
+#define OMAP5430_BGAP_COUNTER_CORE_OFFSET 0x3A4
+#define OMAP5430_BGAP_THRESHOLD_CORE_OFFSET 0x38C
+#define OMAP5430_BGAP_TSHUT_CORE_OFFSET 0x398
+#define OMAP5430_FUSE_OPP_BGAP_CORE 0x1E8
+
+#define OMAP4460_TSHUT_HOT 900 /* 122 deg C */
+#define OMAP4460_TSHUT_COLD 895 /* 100 deg C */
+#define OMAP4460_T_HOT 800 /* 73 deg C */
+#define OMAP4460_T_COLD 795 /* 71 deg C */
+#define OMAP4460_MAX_FREQ 1500000
+#define OMAP4460_MIN_FREQ 1000000
+#define OMAP4460_MIN_TEMP -40000
+#define OMAP4460_MAX_TEMP 123000
+#define OMAP4460_HYST_VAL 5000
+#define OMAP4460_ADC_START_VALUE 530
+#define OMAP4460_ADC_END_VALUE 932
+
+#define OMAP5430_MPU_TSHUT_HOT 915
+#define OMAP5430_MPU_TSHUT_COLD 900
+#define OMAP5430_MPU_T_HOT 800
+#define OMAP5430_MPU_T_COLD 795
+#define OMAP5430_MPU_MAX_FREQ 1500000
+#define OMAP5430_MPU_MIN_FREQ 1000000
+#define OMAP5430_MPU_MIN_TEMP -40000
+#define OMAP5430_MPU_MAX_TEMP 125000
+#define OMAP5430_MPU_HYST_VAL 5000
+#define OMAP5430_ADC_START_VALUE 532
+#define OMAP5430_ADC_END_VALUE 934
+
+#define OMAP5430_GPU_TSHUT_HOT 915
+#define OMAP5430_GPU_TSHUT_COLD 900
+#define OMAP5430_GPU_T_HOT 800
+#define OMAP5430_GPU_T_COLD 795
+#define OMAP5430_GPU_MAX_FREQ 1500000
+#define OMAP5430_GPU_MIN_FREQ 1000000
+#define OMAP5430_GPU_MIN_TEMP -40000
+#define OMAP5430_GPU_MAX_TEMP 125000
+#define OMAP5430_GPU_HYST_VAL 5000
+
+#define OMAP5430_CORE_TSHUT_HOT 915
+#define OMAP5430_CORE_TSHUT_COLD 900
+#define OMAP5430_CORE_T_HOT 800
+#define OMAP5430_CORE_T_COLD 795
+#define OMAP5430_CORE_MAX_FREQ 1500000
+#define OMAP5430_CORE_MIN_FREQ 1000000
+#define OMAP5430_CORE_MIN_TEMP -40000
+#define OMAP5430_CORE_MAX_TEMP 125000
+#define OMAP5430_CORE_HYST_VAL 5000
+
+/**
+ * The register offsets and bit fields might change across
+ * OMAP versions hence populating them in this structure.
+ */
+
+struct temp_sensor_registers {
+ u32 temp_sensor_ctrl;
+ u32 bgap_tempsoff_mask;
+ u32 bgap_soc_mask;
+ u32 bgap_eocz_mask;
+ u32 bgap_dtemp_mask;
+
+ u32 bgap_mask_ctrl;
+ u32 mask_hot_mask;
+ u32 mask_cold_mask;
+
+ u32 bgap_mode_ctrl;
+ u32 mode_ctrl_mask;
+
+ u32 bgap_counter;
+ u32 counter_mask;
+
+ u32 bgap_threshold;
+ u32 threshold_thot_mask;
+ u32 threshold_tcold_mask;
+
+ u32 tshut_threshold;
+ u32 tshut_hot_mask;
+ u32 tshut_cold_mask;
+
+ u32 bgap_status;
+ u32 status_clean_stop_mask;
+ u32 status_bgap_alert_mask;
+ u32 status_hot_mask;
+ u32 status_cold_mask;
+
+ u32 bgap_efuse;
+};
+
+/**
+ * The thresholds and limits for temperature sensors.
+ */
+struct temp_sensor_data {
+ u32 tshut_hot;
+ u32 tshut_cold;
+ u32 t_hot;
+ u32 t_cold;
+ u32 min_freq;
+ u32 max_freq;
+ int max_temp;
+ int min_temp;
+ int hyst_val;
+ u32 adc_start_val;
+ u32 adc_end_val;
+ u32 update_int1;
+ u32 update_int2;
+};
+
+/**
+ * struct temp_sensor_regval - temperature sensor register values
+ * @bg_mode_ctrl: temp sensor control register value
+ * @bg_ctrl: bandgap ctrl register value
+ * @bg_counter: bandgap counter value
+ * @bg_threshold: bandgap threshold register value
+ * @tshut_threshold: bandgap tshut register value
+ */
+struct temp_sensor_regval {
+ u32 bg_mode_ctrl;
+ u32 bg_ctrl;
+ u32 bg_counter;
+ u32 bg_threshold;
+ u32 tshut_threshold;
+};
+
+/**
+ * struct omap_temp_sensor - bandgap temperature sensor platform data
+ * @ts_data: pointer to struct with thresholds, limits of temperature sensor
+ * @registers: pointer to the list of register offsets and bitfields
+ * @regval: temperature sensor register values
+ * @domain: the name of the domain where the sensor is located
+ */
+struct omap_temp_sensor {
+ struct temp_sensor_data *ts_data;
+ struct temp_sensor_registers *registers;
+ struct temp_sensor_regval *regval;
+ char *domain;
+};
+
+/**
+ * struct omap_bandgap_data - bandgap platform data structure
+ * @has_talert: indicates if the chip has talert output line
+ * @has_tshut: indicates if the chip has tshut output line
+ * @conv_table: Pointer to adc to temperature conversion table
+ * @fclock_name: clock name of the functional clock
+ * @div_ck_nme: clock name of the clock divisor
+ * @sensor_count: count of temperature sensor device in scm
+ * @sensors: array of sensors present in this bandgap instance
+ * @expose_sensor: callback to export sensor to thermal API
+ */
+struct omap_bandgap_data {
+ bool has_talert;
+ bool has_tshut;
+ const int *conv_table;
+ char *fclock_name;
+ char *div_ck_name;
+ int sensor_count;
+ int (*report_temperature)(struct omap_bandgap *bg_ptr, int id);
+ int (*expose_sensor)(struct omap_bandgap *bg_ptr, int id, char *domain);
+
+ /* this needs to be at the end */
+ struct omap_temp_sensor sensors[];
+};
+
+/* TODO: provide data structures for 4430 */
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap4460_mpu_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP4460_TEMP_SENSOR_CTRL_OFFSET,
+ .bgap_tempsoff_mask = OMAP4460_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP4460_MASK_HOT_MASK,
+ .mask_cold_mask = OMAP4460_MASK_COLD_MASK,
+
+ .bgap_mode_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
+ .mode_ctrl_mask = OMAP4460_SINGLE_MODE_MASK,
+
+ .bgap_counter = OMAP4460_BGAP_COUNTER_OFFSET,
+ .counter_mask = OMAP4460_COUNTER_MASK,
+
+ .bgap_threshold = OMAP4460_BGAP_THRESHOLD_OFFSET,
+ .threshold_thot_mask = OMAP4460_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP4460_T_COLD_MASK,
+
+ .tshut_threshold = OMAP4460_BGAP_TSHUT_OFFSET,
+ .tshut_hot_mask = OMAP4460_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP4460_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP4460_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = OMAP4460_CLEAN_STOP_MASK,
+ .status_bgap_alert_mask = OMAP4460_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP4460_HOT_FLAG_MASK,
+ .status_cold_mask = OMAP4460_COLD_FLAG_MASK,
+
+ .bgap_efuse = OMAP4460_FUSE_OPP_BGAP,
+};
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap5430_mpu_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_MPU_OFFSET,
+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP5430_MASK_HOT_MPU_MASK,
+ .mask_cold_mask = OMAP5430_MASK_COLD_MPU_MASK,
+
+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
+
+ .bgap_counter = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
+ .counter_mask = OMAP5430_COUNTER_MASK,
+
+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_MPU_OFFSET,
+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
+
+ .tshut_threshold = OMAP5430_BGAP_TSHUT_MPU_OFFSET,
+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = 0x0,
+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP5430_HOT_MPU_FLAG_MASK,
+ .status_cold_mask = OMAP5430_COLD_MPU_FLAG_MASK,
+
+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_MPU,
+};
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap5430_gpu_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_GPU_OFFSET,
+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP5430_MASK_HOT_MM_MASK,
+ .mask_cold_mask = OMAP5430_MASK_COLD_MM_MASK,
+
+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
+
+ .bgap_counter = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
+ .counter_mask = OMAP5430_COUNTER_MASK,
+
+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_GPU_OFFSET,
+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
+
+ .tshut_threshold = OMAP5430_BGAP_TSHUT_GPU_OFFSET,
+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = 0x0,
+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP5430_HOT_MM_FLAG_MASK,
+ .status_cold_mask = OMAP5430_COLD_MM_FLAG_MASK,
+
+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_GPU,
+};
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap5430_core_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_CORE_OFFSET,
+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP5430_MASK_HOT_CORE_MASK,
+ .mask_cold_mask = OMAP5430_MASK_COLD_CORE_MASK,
+
+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
+
+ .bgap_counter = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
+ .counter_mask = OMAP5430_COUNTER_MASK,
+
+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_CORE_OFFSET,
+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
+
+ .tshut_threshold = OMAP5430_BGAP_TSHUT_CORE_OFFSET,
+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = 0x0,
+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP5430_HOT_CORE_FLAG_MASK,
+ .status_cold_mask = OMAP5430_COLD_CORE_FLAG_MASK,
+
+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_CORE,
+};
+
+/* Thresholds and limits for OMAP4460 MPU temperature sensor */
+static struct temp_sensor_data omap4460_mpu_temp_sensor_data = {
+ .tshut_hot = OMAP4460_TSHUT_HOT,
+ .tshut_cold = OMAP4460_TSHUT_COLD,
+ .t_hot = OMAP4460_T_HOT,
+ .t_cold = OMAP4460_T_COLD,
+ .min_freq = OMAP4460_MIN_FREQ,
+ .max_freq = OMAP4460_MAX_FREQ,
+ .max_temp = OMAP4460_MAX_TEMP,
+ .min_temp = OMAP4460_MIN_TEMP,
+ .hyst_val = OMAP4460_HYST_VAL,
+ .adc_start_val = OMAP4460_ADC_START_VALUE,
+ .adc_end_val = OMAP4460_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/* Thresholds and limits for OMAP5430 MPU temperature sensor */
+static struct temp_sensor_data omap5430_mpu_temp_sensor_data = {
+ .tshut_hot = OMAP5430_MPU_TSHUT_HOT,
+ .tshut_cold = OMAP5430_MPU_TSHUT_COLD,
+ .t_hot = OMAP5430_MPU_T_HOT,
+ .t_cold = OMAP5430_MPU_T_COLD,
+ .min_freq = OMAP5430_MPU_MIN_FREQ,
+ .max_freq = OMAP5430_MPU_MAX_FREQ,
+ .max_temp = OMAP5430_MPU_MAX_TEMP,
+ .min_temp = OMAP5430_MPU_MIN_TEMP,
+ .hyst_val = OMAP5430_MPU_HYST_VAL,
+ .adc_start_val = OMAP5430_ADC_START_VALUE,
+ .adc_end_val = OMAP5430_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/* Thresholds and limits for OMAP5430 GPU temperature sensor */
+static struct temp_sensor_data omap5430_gpu_temp_sensor_data = {
+ .tshut_hot = OMAP5430_GPU_TSHUT_HOT,
+ .tshut_cold = OMAP5430_GPU_TSHUT_COLD,
+ .t_hot = OMAP5430_GPU_T_HOT,
+ .t_cold = OMAP5430_GPU_T_COLD,
+ .min_freq = OMAP5430_GPU_MIN_FREQ,
+ .max_freq = OMAP5430_GPU_MAX_FREQ,
+ .max_temp = OMAP5430_GPU_MAX_TEMP,
+ .min_temp = OMAP5430_GPU_MIN_TEMP,
+ .hyst_val = OMAP5430_GPU_HYST_VAL,
+ .adc_start_val = OMAP5430_ADC_START_VALUE,
+ .adc_end_val = OMAP5430_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/* Thresholds and limits for OMAP5430 CORE temperature sensor */
+static struct temp_sensor_data omap5430_core_temp_sensor_data = {
+ .tshut_hot = OMAP5430_CORE_TSHUT_HOT,
+ .tshut_cold = OMAP5430_CORE_TSHUT_COLD,
+ .t_hot = OMAP5430_CORE_T_HOT,
+ .t_cold = OMAP5430_CORE_T_COLD,
+ .min_freq = OMAP5430_CORE_MIN_FREQ,
+ .max_freq = OMAP5430_CORE_MAX_FREQ,
+ .max_temp = OMAP5430_CORE_MAX_TEMP,
+ .min_temp = OMAP5430_CORE_MIN_TEMP,
+ .hyst_val = OMAP5430_CORE_HYST_VAL,
+ .adc_start_val = OMAP5430_ADC_START_VALUE,
+ .adc_end_val = OMAP5430_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/*
+ * Temperature values in milli degree celsius
+ * ADC code values from 530 to 923
+ */
+static const int
+omap4460_adc_to_temp[OMAP4460_ADC_END_VALUE - OMAP4460_ADC_START_VALUE + 1] = {
+ -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600, -38200,
+ -37800, -37300, -36800, -36400, -36000, -35600, -35200, -34800,
+ -34300, -33800, -33400, -33000, -32600, -32200, -31800, -31300,
+ -30800, -30400, -30000, -29600, -29200, -28700, -28200, -27800,
+ -27400, -27000, -26600, -26200, -25700, -25200, -24800, -24400,
+ -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
+ -20600, -20200, -19700, -19200, -18800, -18400, -18000, -17600,
+ -17200, -16700, -16200, -15800, -15400, -15000, -14600, -14200,
+ -13700, -13200, -12800, -12400, -12000, -11600, -11200, -10700,
+ -10200, -9800, -9400, -9000, -8600, -8200, -7700, -7200, -6800,
+ -6400, -6000, -5600, -5200, -4800, -4300, -3800, -3400, -3000,
+ -2600, -2200, -1800, -1300, -800, -400, 0, 400, 800, 1200, 1600,
+ 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000, 6400,
+ 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10600, 11000,
+ 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800,
+ 15300, 15800, 16200, 16600, 17000, 17400, 17800, 18200, 18700,
+ 19200, 19600, 20000, 20400, 20800, 21200, 21600, 22100, 22600,
+ 23000, 23400, 23800, 24200, 24600, 25000, 25400, 25900, 26400,
+ 26800, 27200, 27600, 28000, 28400, 28800, 29300, 29800, 30200,
+ 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
+ 34400, 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800,
+ 38200, 38600, 39000, 39400, 39800, 40200, 40600, 41100, 41600,
+ 42000, 42400, 42800, 43200, 43600, 44000, 44400, 44800, 45300,
+ 45800, 46200, 46600, 47000, 47400, 47800, 48200, 48600, 49000,
+ 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400, 52800,
+ 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600,
+ 57000, 57400, 57800, 58200, 58700, 59200, 59600, 60000, 60400,
+ 60800, 61200, 61600, 62000, 62400, 62800, 63300, 63800, 64200,
+ 64600, 65000, 65400, 65800, 66200, 66600, 67000, 67400, 67800,
+ 68200, 68700, 69200, 69600, 70000, 70400, 70800, 71200, 71600,
+ 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
+ 75800, 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000,
+ 79400, 79800, 80300, 80800, 81200, 81600, 82000, 82400, 82800,
+ 83200, 83600, 84000, 84400, 84800, 85200, 85600, 86000, 86400,
+ 86800, 87300, 87800, 88200, 88600, 89000, 89400, 89800, 90200,
+ 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400, 93800,
+ 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600,
+ 98000, 98400, 98800, 99200, 99600, 100000, 100400, 100800, 101200,
+ 101600, 102000, 102400, 102800, 103200, 103600, 104000, 104400,
+ 104800, 105200, 105600, 106100, 106600, 107000, 107400, 107800,
+ 108200, 108600, 109000, 109400, 109800, 110200, 110600, 111000,
+ 111400, 111800, 112200, 112600, 113000, 113400, 113800, 114200,
+ 114600, 115000, 115400, 115800, 116200, 116600, 117000, 117400,
+ 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
+ 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
+ 124600, 124900, 125000, 125000, 125000, 125000
+};
+
+static const int
+omap5430_adc_to_temp[OMAP5430_ADC_END_VALUE - OMAP5430_ADC_START_VALUE + 1] = {
+ -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600,
+ -38200, -37800, -37300, -36800,
+ -36400, -36000, -35600, -35200, -34800, -34300, -33800, -33400, -33000,
+ -32600,
+ -32200, -31800, -31300, -30800, -30400, -30000, -29600, -29200, -28700,
+ -28200, -27800, -27400, -27000, -26600, -26200, -25700, -25200, -24800,
+ -24400, -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
+ -20600, -20200, -19700, -19200, -9300, -18400, -18000, -17600, -17200,
+ -16700, -16200, -15800, -15400, -15000, -14600, -14200, -13700, -13200,
+ -12800, -12400, -12000, -11600, -11200, -10700, -10200, -9800, -9400,
+ -9000,
+ -8600, -8200, -7700, -7200, -6800, -6400, -6000, -5600, -5200, -4800,
+ -4300,
+ -3800, -3400, -3000, -2600, -2200, -1800, -1300, -800, -400, 0, 400,
+ 800,
+ 1200, 1600, 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000,
+ 6400, 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10800,
+ 11100,
+ 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800, 15300,
+ 15800,
+ 16200, 16600, 17000, 17400, 17800, 18200, 18700, 19200, 19600, 20000,
+ 20400,
+ 20800, 21200, 21600, 22100, 22600, 23000, 23400, 23800, 24200, 24600,
+ 25000,
+ 25400, 25900, 26400, 26800, 27200, 27600, 28000, 28400, 28800, 29300,
+ 29800,
+ 30200, 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
+ 34400,
+ 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800, 38200, 38600,
+ 39000,
+ 39400, 39800, 40200, 40600, 41100, 41600, 42000, 42400, 42800, 43200,
+ 43600,
+ 44000, 44400, 44800, 45300, 45800, 46200, 46600, 47000, 47400, 47800,
+ 48200,
+ 48600, 49000, 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400,
+ 52800,
+ 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600, 57000,
+ 57400,
+ 57800, 58200, 58700, 59200, 59600, 60000, 60400, 60800, 61200, 61600,
+ 62000,
+ 62400, 62800, 63300, 63800, 64200, 64600, 65000, 65400, 65800, 66200,
+ 66600,
+ 67000, 67400, 67800, 68200, 68700, 69200, 69600, 70000, 70400, 70800,
+ 71200,
+ 71600, 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
+ 75800,
+ 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000, 79400, 79800,
+ 80300,
+ 80800, 81200, 81600, 82000, 82400, 82800, 83200, 83600, 84000, 84400,
+ 84800,
+ 85200, 85600, 86000, 86400, 86800, 87300, 87800, 88200, 88600, 89000,
+ 89400,
+ 89800, 90200, 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400,
+ 93800,
+ 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600, 98000,
+ 98400,
+ 98800, 99200, 99600, 100000, 100400, 100800, 101200, 101600, 102000,
+ 102400,
+ 102800, 103200, 103600, 104000, 104400, 104800, 105200, 105600, 106100,
+ 106600, 107000, 107400, 107800, 108200, 108600, 109000, 109400, 109800,
+ 110200, 110600, 111000, 111400, 111800, 112200, 112600, 113000, 113400,
+ 113800, 114200, 114600, 115000, 115400, 115800, 116200, 116600, 117000,
+ 117400, 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
+ 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
+ 124600, 124900, 125000, 125000, 125000, 125000,
+};
+
+static irqreturn_t talert_irq_handler(int irq, void *data)
+{
+ struct omap_bandgap *bg_ptr = data;
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 t_hot = 0, t_cold = 0, temp, ctrl;
+ int i, r;
+
+ bg_ptr = data;
+ /* Read the status of t_hot */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ tsr = bg_ptr->pdata->sensors[i].registers;
+ r = omap_control_readl(cdev, tsr->bgap_status, &t_hot);
+ t_hot &= tsr->status_hot_mask;
+
+ /* Read the status of t_cold */
+ r |= omap_control_readl(cdev, tsr->bgap_status, &t_cold);
+ t_cold &= tsr->status_cold_mask;
+
+ if (!t_cold && !t_hot)
+ continue;
+
+ r |= omap_control_readl(cdev, tsr->bgap_mask_ctrl, &ctrl);
+ /*
+ * One TALERT interrupt: Two sources
+ * If the interrupt is due to t_hot then mask t_hot and
+ * and unmask t_cold else mask t_cold and unmask t_hot
+ */
+ if (t_hot) {
+ ctrl &= ~tsr->mask_hot_mask;
+ ctrl |= tsr->mask_cold_mask;
+ } else if (t_cold) {
+ ctrl &= ~tsr->mask_cold_mask;
+ ctrl |= tsr->mask_hot_mask;
+ }
+
+ r |= omap_control_writel(cdev, ctrl, tsr->bgap_mask_ctrl);
+
+ if (r) {
+ dev_err(bg_ptr->dev, "failed to ack talert interrupt\n");
+ return IRQ_NONE;
+ }
+
+ /* read temperature */
+ r = omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
+ temp &= tsr->bgap_dtemp_mask;
+
+ /* report temperature to whom may concern */
+ if (bg_ptr->pdata->report_temperature)
+ bg_ptr->pdata->report_temperature(bg_ptr, i);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t omap_bandgap_tshut_irq_handler(int irq, void *data)
+{
+ orderly_poweroff(true);
+
+ return IRQ_HANDLED;
+}
+
+static
+int adc_to_temp_conversion(struct omap_bandgap *bg_ptr, int id, int adc_val,
+ int *t)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+
+ /* look up for temperature in the table and return the temperature */
+ if (adc_val < ts_data->adc_start_val || adc_val > ts_data->adc_end_val)
+ return -ERANGE;
+
+ *t = bg_ptr->conv_table[adc_val - ts_data->adc_start_val];
+
+ return 0;
+}
+
+static int temp_to_adc_conversion(long temp, struct omap_bandgap *bg_ptr, int i,
+ int *adc)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[i].ts_data;
+ int high, low, mid;
+
+ low = 0;
+ high = ts_data->adc_end_val - ts_data->adc_start_val;
+ mid = (high + low) / 2;
+
+ if (temp < bg_ptr->conv_table[high] || temp > bg_ptr->conv_table[high])
+ return -EINVAL;
+
+ while (low < high) {
+ if (temp < bg_ptr->conv_table[mid])
+ high = mid - 1;
+ else
+ low = mid + 1;
+ mid = (low + high) / 2;
+ }
+
+ *adc = ts_data->adc_start_val + low;
+
+ return 0;
+}
+
+static int temp_sensor_unmask_interrupts(struct omap_bandgap *bg_ptr, int id,
+ u32 t_hot, u32 t_cold)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 temp, reg_val;
+ int err;
+
+ /* Read the current on die temperature */
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
+ temp &= tsr->bgap_dtemp_mask;
+
+ err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl, ®_val);
+ if (temp < t_hot)
+ reg_val |= tsr->mask_hot_mask;
+ else
+ reg_val &= ~tsr->mask_hot_mask;
+
+ if (t_cold < temp)
+ reg_val |= tsr->mask_cold_mask;
+ else
+ reg_val &= ~tsr->mask_cold_mask;
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
+
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to unmask interrupts\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static
+int add_hyst(int adc_val, int hyst_val, struct omap_bandgap *bg_ptr, int i,
+ u32 *sum)
+{
+ int temp, ret;
+
+ ret = adc_to_temp_conversion(bg_ptr, i, adc_val, &temp);
+ if (ret < 0)
+ return ret;
+
+ temp += hyst_val;
+
+ return temp_to_adc_conversion(temp, bg_ptr, i, sum);
+}
+
+static
+int temp_sensor_configure_thot(struct omap_bandgap *bg_ptr, int id, int t_hot)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 thresh_val, reg_val;
+ int cold, err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+
+ /* obtain the T cold value */
+ err = omap_control_readl(cdev, tsr->bgap_threshold, &thresh_val);
+ cold = (thresh_val & tsr->threshold_tcold_mask) >>
+ __ffs(tsr->threshold_tcold_mask);
+ if (t_hot <= cold) {
+ /* change the t_cold to t_hot - 5000 millidegrees */
+ err |= add_hyst(t_hot, -ts_data->hyst_val, bg_ptr, id, &cold);
+ /* write the new t_cold value */
+ reg_val = thresh_val & (~tsr->threshold_tcold_mask);
+ reg_val |= cold << __ffs(tsr->threshold_tcold_mask);
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ thresh_val = reg_val;
+ }
+
+ /* write the new t_hot value */
+ reg_val = thresh_val & ~tsr->threshold_thot_mask;
+ reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
+ return -EIO;
+ }
+
+ return temp_sensor_unmask_interrupts(bg_ptr, id, t_hot, cold);
+}
+
+static
+int temp_sensor_init_talert_thresholds(struct omap_bandgap *bg_ptr, int id,
+ int t_hot, int t_cold)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 reg_val, thresh_val;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = omap_control_readl(cdev, tsr->bgap_threshold, &thresh_val);
+
+ /* write the new t_cold value */
+ reg_val = thresh_val & ~tsr->threshold_tcold_mask;
+ reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
+ return -EIO;
+ }
+
+ err = omap_control_readl(cdev, tsr->bgap_threshold, &thresh_val);
+
+ /* write the new t_hot value */
+ reg_val = thresh_val & ~tsr->threshold_thot_mask;
+ reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
+ return -EIO;
+ }
+
+ err = omap_control_readl(cdev, tsr->bgap_mask_ctrl, ®_val);
+ reg_val |= tsr->mask_hot_mask;
+ reg_val |= tsr->mask_cold_mask;
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
+ return -EIO;
+ }
+
+ return err;
+}
+
+static
+int temp_sensor_configure_tcold(struct omap_bandgap *bg_ptr, int id,
+ int t_cold)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 thresh_val, reg_val;
+ int hot, err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ /* obtain the T cold value */
+ err = omap_control_readl(cdev, tsr->bgap_threshold, &thresh_val);
+ hot = (thresh_val & tsr->threshold_thot_mask) >>
+ __ffs(tsr->threshold_thot_mask);
+
+ if (t_cold >= hot) {
+ /* change the t_hot to t_cold + 5000 millidegrees */
+ err |= add_hyst(t_cold, ts_data->hyst_val, bg_ptr, id, &hot);
+ /* write the new t_hot value */
+ reg_val = thresh_val & (~tsr->threshold_thot_mask);
+ reg_val |= hot << __ffs(tsr->threshold_thot_mask);
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ thresh_val = reg_val;
+ }
+
+ /* write the new t_cold value */
+ reg_val = thresh_val & ~tsr->threshold_tcold_mask;
+ reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
+ return -EIO;
+ }
+
+ return temp_sensor_unmask_interrupts(bg_ptr, id, hot, t_cold);
+}
+
+static int temp_sensor_configure_tshut_hot(struct omap_bandgap *bg_ptr,
+ int id, int tshut_hot)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 reg_val;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = omap_control_readl(cdev, tsr->tshut_threshold, ®_val);
+ reg_val &= ~tsr->tshut_hot_mask;
+ reg_val |= tshut_hot << __ffs(tsr->tshut_hot_mask);
+ err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tshut thot\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int temp_sensor_configure_tshut_cold(struct omap_bandgap *bg_ptr,
+ int id, int tshut_cold)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 reg_val;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = omap_control_readl(cdev, tsr->tshut_threshold, ®_val);
+ reg_val &= ~tsr->tshut_cold_mask;
+ reg_val |= tshut_cold << __ffs(tsr->tshut_cold_mask);
+ err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int configure_temp_sensor_counter(struct omap_bandgap *bg_ptr, int id,
+ u32 counter)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 val;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = omap_control_readl(cdev, tsr->bgap_counter, &val);
+ val &= ~tsr->counter_mask;
+ val |= counter << __ffs(tsr->counter_mask);
+ err |= omap_control_writel(cdev, val, tsr->bgap_counter);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+/* Exposed APIs */
+/**
+ * omap_bandgap_read_thot() - reads sensor current thot
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @thot - resulting current thot value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id,
+ int *thot)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 temp;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = omap_control_readl(cdev, tsr->bgap_threshold, &temp);
+ temp = (temp & tsr->threshold_thot_mask) >>
+ __ffs(tsr->threshold_thot_mask);
+ ret |= adc_to_temp_conversion(bg_ptr, id, temp, &temp);
+ if (ret) {
+ dev_err(bg_ptr->dev, "failed to read thot\n");
+ return -EIO;
+ }
+
+ *thot = temp;
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_write_thot() - sets sensor current thot
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @val - desired thot value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct temp_sensor_registers *tsr;
+ u32 t_hot;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+
+ if (val < ts_data->min_temp + ts_data->hyst_val)
+ return -EINVAL;
+ ret = temp_to_adc_conversion(val, bg_ptr, id, &t_hot);
+ if (ret < 0)
+ return ret;
+
+ mutex_lock(&bg_ptr->bg_mutex);
+ temp_sensor_configure_thot(bg_ptr, id, t_hot);
+ mutex_unlock(&bg_ptr->bg_mutex);
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_read_tcold() - reads sensor current tcold
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @tcold - resulting current tcold value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id,
+ int *tcold)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 temp;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = omap_control_readl(cdev, tsr->bgap_threshold, &temp);
+ temp = (temp & tsr->threshold_tcold_mask)
+ >> __ffs(tsr->threshold_tcold_mask);
+ ret |= adc_to_temp_conversion(bg_ptr, id, temp, &temp);
+ if (ret)
+ return -EIO;
+
+ *tcold = temp;
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_write_tcold() - sets the sensor tcold
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @val - desired tcold value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct temp_sensor_registers *tsr;
+ u32 t_cold;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ if (val > ts_data->max_temp + ts_data->hyst_val)
+ return -EINVAL;
+
+ ret = temp_to_adc_conversion(val, bg_ptr, id, &t_cold);
+ if (ret < 0)
+ return ret;
+
+ mutex_lock(&bg_ptr->bg_mutex);
+ temp_sensor_configure_tcold(bg_ptr, id, t_cold);
+ mutex_unlock(&bg_ptr->bg_mutex);
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_read_update_interval() - read the sensor update interval
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @interval - resulting update interval in miliseconds
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
+ int *interval)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 time;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = omap_control_readl(cdev, tsr->bgap_counter, &time);
+ if (ret)
+ return ret;
+ time = (time & tsr->counter_mask) >> __ffs(tsr->counter_mask);
+ time = time * 1000 / bg_ptr->clk_rate;
+
+ *interval = time;
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_write_update_interval() - set the update interval
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @interval - desired update interval in miliseconds
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr,
+ int id, u32 interval)
+{
+ interval = interval * bg_ptr->clk_rate / 1000;
+ mutex_lock(&bg_ptr->bg_mutex);
+ configure_temp_sensor_counter(bg_ptr, id, interval);
+ mutex_unlock(&bg_ptr->bg_mutex);
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_read_temperature() - report current temperature
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @temperature - resulting temperature
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
+ int *temperature)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 temp;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
+ temp &= tsr->bgap_dtemp_mask;
+
+ ret |= adc_to_temp_conversion(bg_ptr, id, temp, &temp);
+ if (ret)
+ return -EIO;
+
+ *temperature = temp;
+
+ return 0;
+}
+
+/**
+ * enable_continuous_mode() - One time enabling of continuous conversion mode
+ * @bg_ptr - pointer to scm instance
+ */
+static int enable_continuous_mode(struct omap_bandgap *bg_ptr)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ int i, r;
+ u32 val;
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ tsr = bg_ptr->pdata->sensors[i].registers;
+ r = omap_control_readl(cdev, tsr->bgap_mode_ctrl, &val);
+ val |= 1 << __ffs(tsr->mode_ctrl_mask);
+ r |= omap_control_writel(cdev, val, tsr->bgap_mode_ctrl);
+ if (r)
+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
+ }
+
+ return r ? -EIO : 0;
+}
+
+static int omap_bandgap_tshut_init(struct omap_bandgap *bg_ptr,
+ struct platform_device *pdev)
+{
+ int gpio_nr = bg_ptr->tshut_gpio;
+ int status;
+
+ /* Request for gpio_86 line */
+ status = gpio_request(gpio_nr, "tshut");
+ if (status < 0) {
+ dev_err(bg_ptr->dev,
+ "Could not request for TSHUT GPIO:%i\n", 86);
+ return status;
+ }
+ status = gpio_direction_input(gpio_nr);
+ if (status) {
+ dev_err(bg_ptr->dev,
+ "Cannot set input TSHUT GPIO %d\n", gpio_nr);
+ return status;
+ }
+
+ status = request_irq(gpio_to_irq(gpio_nr),
+ omap_bandgap_tshut_irq_handler,
+ IRQF_TRIGGER_RISING, "tshut",
+ NULL);
+ if (status) {
+ gpio_free(gpio_nr);
+ dev_err(bg_ptr->dev, "request irq failed for TSHUT");
+ }
+
+ return 0;
+}
+
+static int omap_bandgap_talert_init(struct omap_bandgap *bg_ptr,
+ struct platform_device *pdev)
+{
+ int ret;
+
+ bg_ptr->irq = platform_get_irq(pdev, 0);
+ if (bg_ptr->irq < 0) {
+ dev_err(&pdev->dev, "get_irq failed\n");
+ return bg_ptr->irq;
+ }
+ ret = request_threaded_irq(bg_ptr->irq, NULL,
+ talert_irq_handler,
+ IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
+ "talert", bg_ptr);
+ if (ret) {
+ dev_err(&pdev->dev, "Request threaded irq failed.\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct omap_bandgap_data omap4460_data = {
+ .has_talert = true,
+ .has_tshut = true,
+ .fclock_name = "bandgap_ts_fclk",
+ .div_ck_name = "div_ts_ck",
+ .conv_table = omap4460_adc_to_temp,
+ .sensors = {
+ {
+ .registers = &omap4460_mpu_temp_sensor_registers,
+ .ts_data = &omap4460_mpu_temp_sensor_data,
+ .domain = "cpu",
+ },
+ },
+ .sensor_count = 1,
+};
+
+static const struct omap_bandgap_data omap5430_data = {
+ .has_talert = true,
+ .has_tshut = true,
+ .fclock_name = "ts_clk_div_ck",
+ .div_ck_name = "ts_clk_div_ck",
+ .conv_table = omap5430_adc_to_temp,
+ .sensors = {
+ {
+ .registers = &omap5430_mpu_temp_sensor_registers,
+ .ts_data = &omap5430_mpu_temp_sensor_data,
+ .domain = "cpu",
+ },
+ {
+ .registers = &omap5430_gpu_temp_sensor_registers,
+ .ts_data = &omap5430_gpu_temp_sensor_data,
+ .domain = "gpu",
+ },
+ {
+ .registers = &omap5430_core_temp_sensor_registers,
+ .ts_data = &omap5430_core_temp_sensor_data,
+ .domain = "core",
+ },
+ },
+ .sensor_count = 3,
+};
+
+static const struct of_device_id of_omap_bandgap_match[] = {
+ /*
+ * TODO: Add support to 4430
+ * { .compatible = "ti,omap4430-bandgap", .data = , },
+ */
+ {
+ .compatible = "ti,omap4460-bandgap",
+ .data = (void *)&omap4460_data,
+ },
+ {
+ .compatible = "ti,omap5430-bandgap",
+ .data = (void *)&omap5430_data,
+ },
+ /* Sentinel */
+ { },
+};
+
+static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
+{
+ struct device_node *node = pdev->dev.of_node;
+ const struct of_device_id *of_id;
+ struct omap_bandgap *bg_ptr;
+ u32 prop;
+
+ /* just for the sake */
+ if (!node) {
+ dev_err(&pdev->dev, "no platform information available\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ bg_ptr = devm_kzalloc(&pdev->dev, sizeof(struct omap_bandgap),
+ GFP_KERNEL);
+ if (!bg_ptr) {
+ dev_err(&pdev->dev, "Unable to allocate mem for driver ref\n");
+ return ERR_PTR(-ENOMEM);
+ }
+
+ of_id = of_match_device(of_omap_bandgap_match, &pdev->dev);
+ if (of_id)
+ bg_ptr->pdata = of_id->data;
+
+ if (bg_ptr->pdata->has_tshut) {
+ if (of_property_read_u32(node, "ti,tshut-gpio", &prop) < 0) {
+ dev_err(&pdev->dev, "missing tshut gpio in device tree\n");
+ return ERR_PTR(-EINVAL);
+ }
+ bg_ptr->tshut_gpio = prop;
+ if (!gpio_is_valid(bg_ptr->tshut_gpio)) {
+ dev_err(&pdev->dev, "invalid gpio for tshut (%d)\n",
+ bg_ptr->tshut_gpio);
+ return ERR_PTR(-EINVAL);
+ }
+ }
+
+ return bg_ptr;
+}
+
+static
+int __devinit omap_bandgap_probe(struct platform_device *pdev)
+{
+ struct device *cdev = pdev->dev.parent;
+ struct omap_bandgap *bg_ptr;
+ int clk_rate, ret = 0, i;
+
+ if (!cdev) {
+ dev_err(&pdev->dev, "no omap control ref in our parent\n");
+ return -EINVAL;
+ }
+
+ bg_ptr = omap_bandgap_build(pdev);
+ if (IS_ERR_OR_NULL(bg_ptr)) {
+ dev_err(&pdev->dev, "failed to fetch platform data\n");
+ return PTR_ERR(bg_ptr);
+ }
+
+ if (bg_ptr->pdata->has_talert) {
+ ret = omap_bandgap_talert_init(bg_ptr, pdev);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to initialize Talert IRQ\n");
+ return ret;
+ }
+ }
+
+ if (bg_ptr->pdata->has_tshut) {
+ ret = omap_bandgap_tshut_init(bg_ptr, pdev);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "failed to initialize system tshut IRQ\n");
+ goto free_talert;
+ }
+ }
+
+ bg_ptr->fclock = clk_get(NULL, bg_ptr->pdata->fclock_name);
+ ret = IS_ERR_OR_NULL(bg_ptr->fclock);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to request fclock reference\n");
+ goto free_irqs;
+ }
+
+ bg_ptr->div_clk = clk_get(NULL, bg_ptr->pdata->div_ck_name);
+ ret = IS_ERR_OR_NULL(bg_ptr->div_clk);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "failed to request div_ts_ck clock ref\n");
+ goto free_irqs;
+ }
+
+ bg_ptr->conv_table = bg_ptr->pdata->conv_table;
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_registers *tsr;
+ u32 val;
+
+ tsr = bg_ptr->pdata->sensors[i].registers;
+ /*
+ * check if the efuse has a non-zero value if not
+ * it is an untrimmed sample and the temperatures
+ * may not be accurate
+ */
+ ret = omap_control_readl(cdev, tsr->bgap_efuse, &val);
+ if (ret || !val)
+ dev_info(&pdev->dev,
+ "Non-trimmed BGAP, Temp not accurate\n");
+ }
+
+ clk_rate = clk_round_rate(bg_ptr->div_clk,
+ bg_ptr->pdata->sensors[0].ts_data->max_freq);
+ if (clk_rate < bg_ptr->pdata->sensors[0].ts_data->min_freq ||
+ clk_rate == 0xffffffff) {
+ ret = -ENODEV;
+ goto put_clks;
+ }
+
+ ret = clk_set_rate(bg_ptr->div_clk, clk_rate);
+ if (ret) {
+ dev_err(&pdev->dev, "Cannot set clock rate\n");
+ goto put_clks;
+ }
+
+ bg_ptr->clk_rate = clk_rate;
+ clk_enable(bg_ptr->fclock);
+
+ mutex_init(&bg_ptr->bg_mutex);
+ bg_ptr->dev = &pdev->dev;
+ platform_set_drvdata(pdev, bg_ptr);
+
+ /* 1 clk cycle */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++)
+ configure_temp_sensor_counter(bg_ptr, i, 1);
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_data *ts_data;
+
+ ts_data = bg_ptr->pdata->sensors[i].ts_data;
+
+ temp_sensor_init_talert_thresholds(bg_ptr, i,
+ ts_data->t_hot,
+ ts_data->t_cold);
+ temp_sensor_configure_tshut_hot(bg_ptr, i,
+ ts_data->tshut_hot);
+ temp_sensor_configure_tshut_cold(bg_ptr, i,
+ ts_data->tshut_cold);
+ }
+
+ enable_continuous_mode(bg_ptr);
+
+ /* Set .250 seconds time as default counter */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++)
+ configure_temp_sensor_counter(bg_ptr, i,
+ bg_ptr->clk_rate / 4);
+
+ /* Every thing is good? Then expose the sensors */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ char *domain;
+
+ domain = bg_ptr->pdata->sensors[i].domain;
+ if (bg_ptr->pdata->expose_sensor)
+ bg_ptr->pdata->expose_sensor(bg_ptr, i, domain);
+ }
+
+ return 0;
+
+put_clks:
+ clk_disable(bg_ptr->fclock);
+ clk_put(bg_ptr->fclock);
+ clk_put(bg_ptr->div_clk);
+free_irqs:
+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
+ gpio_free(bg_ptr->tshut_gpio);
+free_talert:
+ free_irq(bg_ptr->irq, bg_ptr);
+
+ return ret;
+}
+
+static
+int __devexit omap_bandgap_remove(struct platform_device *pdev)
+{
+ struct omap_bandgap *bg_ptr = platform_get_drvdata(pdev);
+
+ clk_disable(bg_ptr->fclock);
+ clk_put(bg_ptr->fclock);
+ clk_put(bg_ptr->div_clk);
+ free_irq(bg_ptr->irq, bg_ptr);
+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
+ gpio_free(bg_ptr->tshut_gpio);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int omap_bandgap_save_ctxt(struct omap_bandgap *bg_ptr)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ int err = 0;
+ int i;
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_registers *tsr;
+ struct temp_sensor_regval *rval;
+
+ rval = bg_ptr->pdata->sensors[i].regval;
+ tsr = bg_ptr->pdata->sensors[i].registers;
+
+ err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,
+ &rval->bg_mode_ctrl);
+ err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,
+ &rval->bg_ctrl);
+ err |= omap_control_readl(cdev, tsr->bgap_counter,
+ &rval->bg_counter);
+ err |= omap_control_readl(cdev, tsr->bgap_threshold,
+ &rval->bg_threshold);
+ err |= omap_control_readl(cdev, tsr->tshut_threshold,
+ &rval->tshut_threshold);
+
+ if (err)
+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
+ }
+
+ return err ? -EIO : 0;
+}
+
+static int
+omap_bandgap_force_single_read(struct omap_bandgap *bg_ptr, int id)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ struct temp_sensor_registers *tsr;
+ u32 temp = 0, counter = 1000;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ /* Select single conversion mode */
+ err = omap_control_readl(cdev, tsr->bgap_mode_ctrl, &temp);
+ temp &= ~(1 << __ffs(tsr->mode_ctrl_mask));
+ omap_control_writel(cdev, temp, tsr->bgap_mode_ctrl);
+
+ /* Start of Conversion = 1 */
+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
+ temp |= 1 << __ffs(tsr->bgap_soc_mask);
+ omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
+ /* Wait until DTEMP is updated */
+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
+ temp &= (tsr->bgap_dtemp_mask);
+ while ((temp == 0) && --counter) {
+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
+ temp &= (tsr->bgap_dtemp_mask);
+ }
+ /* Start of Conversion = 0 */
+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
+ temp &= ~(1 << __ffs(tsr->bgap_soc_mask));
+ err |= omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
+
+ return err ? -EIO : 0;
+}
+
+static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr)
+{
+ struct device *cdev = bg_ptr->dev->parent;
+ int i, err = 0;
+ u32 temp = 0;
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_registers *tsr;
+ struct temp_sensor_regval *rval;
+ u32 val;
+
+ rval = bg_ptr->pdata->sensors[i].regval;
+ tsr = bg_ptr->pdata->sensors[i].registers;
+
+ err = omap_control_readl(cdev, tsr->bgap_counter, &val);
+ if (val == 0) {
+ err |= omap_control_writel(cdev, rval->bg_threshold,
+ tsr->bgap_threshold);
+ err |= omap_control_writel(cdev, rval->tshut_threshold,
+ tsr->tshut_threshold);
+ /* Force immediate temperature measurement and update
+ * of the DTEMP field
+ */
+ omap_bandgap_force_single_read(bg_ptr, i);
+ err |= omap_control_writel(cdev, rval->bg_counter,
+ tsr->bgap_counter);
+ err |= omap_control_writel(cdev, rval->bg_mode_ctrl,
+ tsr->bgap_mode_ctrl);
+ err |= omap_control_writel(cdev, rval->bg_ctrl,
+ tsr->bgap_mask_ctrl);
+ } else {
+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,
+ &temp);
+ temp &= (tsr->bgap_dtemp_mask);
+ if (temp == 0) {
+ omap_bandgap_force_single_read(bg_ptr, i);
+ err |= omap_control_readl(cdev,
+ tsr->bgap_mask_ctrl,
+ &temp);
+ temp |= 1 << __ffs(tsr->mode_ctrl_mask);
+ err |= omap_control_writel(cdev, temp,
+ tsr->bgap_mask_ctrl);
+ }
+ }
+ if (err)
+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
+ }
+
+ return err ? -EIO : 0;
+}
+
+static int omap_bandgap_suspend(struct device *dev)
+{
+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
+ int err;
+
+ err = omap_bandgap_save_ctxt(bg_ptr);
+ clk_disable(bg_ptr->fclock);
+
+ return err;
+}
+
+static int omap_bandgap_resume(struct device *dev)
+{
+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
+
+ clk_enable(bg_ptr->fclock);
+
+ return omap_bandgap_restore_ctxt(bg_ptr);
+}
+static const struct dev_pm_ops omap_bandgap_dev_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(omap_bandgap_suspend,
+ omap_bandgap_resume)
+};
+
+#define DEV_PM_OPS (&omap_bandgap_dev_pm_ops)
+#else
+#define DEV_PM_OPS NULL
+#endif
+
+static struct platform_driver omap_bandgap_sensor_driver = {
+ .probe = omap_bandgap_probe,
+ .remove = omap_bandgap_remove,
+ .driver = {
+ .name = "omap-bandgap",
+ .pm = DEV_PM_OPS,
+ .of_match_table = of_omap_bandgap_match,
+ },
+};
+
+module_platform_driver(omap_bandgap_sensor_driver);
+early_platform_init("early_omap_temperature", &omap_bandgap_sensor_driver);
+
+MODULE_DESCRIPTION("OMAP4+ bandgap temperature sensor driver");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:omap-bandgap");
+MODULE_AUTHOR("Texas Instrument Inc.");
diff --git a/drivers/thermal/omap-bandgap.h b/drivers/thermal/omap-bandgap.h
new file mode 100644
index 0000000..12e0d6b
--- /dev/null
+++ b/drivers/thermal/omap-bandgap.h
@@ -0,0 +1,63 @@
+/*
+ * OMAP4 Bandgap temperature sensor driver
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ * Contact:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+#ifndef __OMAP_BANDGAP_H
+#define __OMAP_BANDGAP_H
+
+struct omap_bandgap_data;
+
+/**
+ * struct omap_bandgap - bandgap device structure
+ * @dev: device pointer
+ * @pdata: platform data with sensor data
+ * @fclock: pointer to functional clock of temperature sensor
+ * @div_clk: pointer to parent clock of temperature sensor fclk
+ * @conv_table: Pointer to adc to temperature conversion table
+ * @bg_mutex: Mutex for sysfs, irq and PM
+ * @irq: MPU Irq number for thermal alert
+ * @tshut_gpio: GPIO where Tshut signal is routed
+ * @clk_rate: Holds current clock rate
+ */
+struct omap_bandgap {
+ struct device *dev;
+ const struct omap_bandgap_data *pdata;
+ struct clk *fclock;
+ struct clk *div_clk;
+ const int *conv_table;
+ struct mutex bg_mutex; /* Mutex for irq and PM */
+ int irq;
+ int tshut_gpio;
+ u32 clk_rate;
+};
+
+int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id, int *thot);
+int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val);
+int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id, int *tcold);
+int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val);
+int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
+ int *interval);
+int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr, int id,
+ u32 interval);
+int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
+ int *temperature);
+
+#endif
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 10/11] omap4: thermal: add basic CPU thermal zone
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 8:26 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:26 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin
This patch exposes OMAP4 thermal sensor as a thermal zone
named "cpu". Only thermal creation is done here.
TODO:
- Add cooling bindings
- Add extrapolation rules
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
drivers/thermal/Kconfig | 12 ++++++
drivers/thermal/Makefile | 1 +
drivers/thermal/omap-bandgap.c | 1 +
drivers/thermal/omap-bandgap.h | 12 ++++++
drivers/thermal/omap4-thermal.c | 72 +++++++++++++++++++++++++++++++++++++++
5 files changed, 98 insertions(+), 0 deletions(-)
create mode 100644 drivers/thermal/omap4-thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index ffdd240..2e82797 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -39,3 +39,15 @@ config OMAP_BANDGAP
This includes alert interrupts generation and also the TSHUT
support.
+config OMAP4_THERMAL
+ bool "Texas Instruments OMAP4 thermal support"
+ depends on OMAP_BANDGAP
+ depends on ARCH_OMAP4
+ help
+ If you say yes here you get thermal support for the Texas Instruments
+ OMAP4 SoC family. The current chip supported are:
+ - OMAP4460
+
+ This includes alert interrupts generation and also the TSHUT
+ support.
+
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 5ff1af1..6397678 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_THERMAL) += thermal_sys.o
obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
obj-$(CONFIG_OMAP_BANDGAP) += omap-thermal.o
omap-thermal-y := omap-bandgap.o
+omap-thermal-$(CONFIG_OMAP4_THERMAL) += omap4-thermal.o
diff --git a/drivers/thermal/omap-bandgap.c b/drivers/thermal/omap-bandgap.c
index 3d5a12b..d53ffcf 100644
--- a/drivers/thermal/omap-bandgap.c
+++ b/drivers/thermal/omap-bandgap.c
@@ -1192,6 +1192,7 @@ static const struct omap_bandgap_data omap4460_data = {
.fclock_name = "bandgap_ts_fclk",
.div_ck_name = "div_ts_ck",
.conv_table = omap4460_adc_to_temp,
+ .expose_sensor = omap4_thermal_expose_sensor,
.sensors = {
{
.registers = &omap4460_mpu_temp_sensor_registers,
diff --git a/drivers/thermal/omap-bandgap.h b/drivers/thermal/omap-bandgap.h
index 12e0d6b..0f5b3e6 100644
--- a/drivers/thermal/omap-bandgap.h
+++ b/drivers/thermal/omap-bandgap.h
@@ -60,4 +60,16 @@ int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr, int id,
int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
int *temperature);
+#ifdef CONFIG_OMAP4_THERMAL
+int omap4_thermal_expose_sensor(struct omap_bandgap *bg_ptr, int id,
+ char *domain);
+#else
+static inline int omap4_thermal_expose_sensor(struct omap_bandgap *bg_ptr,
+ int id, char *domain)
+{
+ return 0;
+}
+
+#endif
+
#endif
diff --git a/drivers/thermal/omap4-thermal.c b/drivers/thermal/omap4-thermal.c
new file mode 100644
index 0000000..f83cf96
--- /dev/null
+++ b/drivers/thermal/omap4-thermal.c
@@ -0,0 +1,72 @@
+/*
+ * OMAP4 thermal driver.
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Inc.
+ * Contact:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/thermal.h>
+
+#include "omap-bandgap.h"
+
+struct omap4_thermal_data {
+ struct thermal_zone_device *omap4_thermal;
+ struct omap_bandgap *bg_ptr;
+ int sensor_id;
+};
+
+static inline int omap4_thermal_get_temp(struct thermal_zone_device *thermal,
+ unsigned long *temp)
+{
+ struct omap4_thermal_data *data = thermal->devdata;
+ int ret, tmp;
+
+ ret = omap_bandgap_read_temperature(data->bg_ptr, data->sensor_id,
+ &tmp);
+ if (!ret)
+ *temp = tmp;
+
+ return ret;
+}
+
+static struct thermal_zone_device_ops omap4_thermal_ops = {
+ .get_temp = omap4_thermal_get_temp,
+};
+
+int omap4_thermal_expose_sensor(struct omap_bandgap *bg_ptr, int id,
+ char *domain)
+{
+ struct omap4_thermal_data *data;
+
+ data = devm_kzalloc(bg_ptr->dev, sizeof(*data), GFP_KERNEL);
+ if (!data) {
+ dev_err(bg_ptr->dev, "kzalloc fail\n");
+ return -ENOMEM;
+ }
+ data->sensor_id = id;
+ data->bg_ptr = bg_ptr;
+ data->omap4_thermal = thermal_zone_device_register(domain, 0,
+ data, &omap4_thermal_ops, 0, 0, 0, 0);
+ if (IS_ERR(data->omap4_thermal)) {
+ dev_err(bg_ptr->dev, "thermal zone device is NULL\n");
+ return PTR_ERR(data->omap4_thermal);
+ }
+
+ return 0;
+}
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 10/11] omap4: thermal: add basic CPU thermal zone
@ 2012-05-25 8:26 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:26 UTC (permalink / raw)
To: linux-arm-kernel
This patch exposes OMAP4 thermal sensor as a thermal zone
named "cpu". Only thermal creation is done here.
TODO:
- Add cooling bindings
- Add extrapolation rules
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
drivers/thermal/Kconfig | 12 ++++++
drivers/thermal/Makefile | 1 +
drivers/thermal/omap-bandgap.c | 1 +
drivers/thermal/omap-bandgap.h | 12 ++++++
drivers/thermal/omap4-thermal.c | 72 +++++++++++++++++++++++++++++++++++++++
5 files changed, 98 insertions(+), 0 deletions(-)
create mode 100644 drivers/thermal/omap4-thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index ffdd240..2e82797 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -39,3 +39,15 @@ config OMAP_BANDGAP
This includes alert interrupts generation and also the TSHUT
support.
+config OMAP4_THERMAL
+ bool "Texas Instruments OMAP4 thermal support"
+ depends on OMAP_BANDGAP
+ depends on ARCH_OMAP4
+ help
+ If you say yes here you get thermal support for the Texas Instruments
+ OMAP4 SoC family. The current chip supported are:
+ - OMAP4460
+
+ This includes alert interrupts generation and also the TSHUT
+ support.
+
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 5ff1af1..6397678 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_THERMAL) += thermal_sys.o
obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
obj-$(CONFIG_OMAP_BANDGAP) += omap-thermal.o
omap-thermal-y := omap-bandgap.o
+omap-thermal-$(CONFIG_OMAP4_THERMAL) += omap4-thermal.o
diff --git a/drivers/thermal/omap-bandgap.c b/drivers/thermal/omap-bandgap.c
index 3d5a12b..d53ffcf 100644
--- a/drivers/thermal/omap-bandgap.c
+++ b/drivers/thermal/omap-bandgap.c
@@ -1192,6 +1192,7 @@ static const struct omap_bandgap_data omap4460_data = {
.fclock_name = "bandgap_ts_fclk",
.div_ck_name = "div_ts_ck",
.conv_table = omap4460_adc_to_temp,
+ .expose_sensor = omap4_thermal_expose_sensor,
.sensors = {
{
.registers = &omap4460_mpu_temp_sensor_registers,
diff --git a/drivers/thermal/omap-bandgap.h b/drivers/thermal/omap-bandgap.h
index 12e0d6b..0f5b3e6 100644
--- a/drivers/thermal/omap-bandgap.h
+++ b/drivers/thermal/omap-bandgap.h
@@ -60,4 +60,16 @@ int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr, int id,
int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
int *temperature);
+#ifdef CONFIG_OMAP4_THERMAL
+int omap4_thermal_expose_sensor(struct omap_bandgap *bg_ptr, int id,
+ char *domain);
+#else
+static inline int omap4_thermal_expose_sensor(struct omap_bandgap *bg_ptr,
+ int id, char *domain)
+{
+ return 0;
+}
+
+#endif
+
#endif
diff --git a/drivers/thermal/omap4-thermal.c b/drivers/thermal/omap4-thermal.c
new file mode 100644
index 0000000..f83cf96
--- /dev/null
+++ b/drivers/thermal/omap4-thermal.c
@@ -0,0 +1,72 @@
+/*
+ * OMAP4 thermal driver.
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Inc.
+ * Contact:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/thermal.h>
+
+#include "omap-bandgap.h"
+
+struct omap4_thermal_data {
+ struct thermal_zone_device *omap4_thermal;
+ struct omap_bandgap *bg_ptr;
+ int sensor_id;
+};
+
+static inline int omap4_thermal_get_temp(struct thermal_zone_device *thermal,
+ unsigned long *temp)
+{
+ struct omap4_thermal_data *data = thermal->devdata;
+ int ret, tmp;
+
+ ret = omap_bandgap_read_temperature(data->bg_ptr, data->sensor_id,
+ &tmp);
+ if (!ret)
+ *temp = tmp;
+
+ return ret;
+}
+
+static struct thermal_zone_device_ops omap4_thermal_ops = {
+ .get_temp = omap4_thermal_get_temp,
+};
+
+int omap4_thermal_expose_sensor(struct omap_bandgap *bg_ptr, int id,
+ char *domain)
+{
+ struct omap4_thermal_data *data;
+
+ data = devm_kzalloc(bg_ptr->dev, sizeof(*data), GFP_KERNEL);
+ if (!data) {
+ dev_err(bg_ptr->dev, "kzalloc fail\n");
+ return -ENOMEM;
+ }
+ data->sensor_id = id;
+ data->bg_ptr = bg_ptr;
+ data->omap4_thermal = thermal_zone_device_register(domain, 0,
+ data, &omap4_thermal_ops, 0, 0, 0, 0);
+ if (IS_ERR(data->omap4_thermal)) {
+ dev_err(bg_ptr->dev, "thermal zone device is NULL\n");
+ return PTR_ERR(data->omap4_thermal);
+ }
+
+ return 0;
+}
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 8:26 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:26 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin
This patch add device tree entries on OMAP4 based boards
for System Control Module (SCM).
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/boot/dts/omap4.dtsi | 13 +++++++++++++
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 359c497..d2cb392 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -272,5 +272,18 @@
ti,hwmods = "mmc5";
ti,needs-special-reset;
};
+
+ ctrl_module_core: ctrl_module_core@4a002000 {
+ compatible = "ti,omap4-control";
+ ti,hwmods = "ctrl_module_core";
+ bandgap {
+ compatible = "ti,omap4460-bandgap";
+ interrupts = <0 126 4>; /* talert */
+ ti,tshut-gpio = <86>; /* tshut */
+ };
+ usb {
+ compatible = "ti,omap4-usb-phy";
+ };
+ };
};
};
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-05-25 8:26 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:26 UTC (permalink / raw)
To: linux-arm-kernel
This patch add device tree entries on OMAP4 based boards
for System Control Module (SCM).
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/boot/dts/omap4.dtsi | 13 +++++++++++++
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 359c497..d2cb392 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -272,5 +272,18 @@
ti,hwmods = "mmc5";
ti,needs-special-reset;
};
+
+ ctrl_module_core: ctrl_module_core at 4a002000 {
+ compatible = "ti,omap4-control";
+ ti,hwmods = "ctrl_module_core";
+ bandgap {
+ compatible = "ti,omap4460-bandgap";
+ interrupts = <0 126 4>; /* talert */
+ ti,tshut-gpio = <86>; /* tshut */
+ };
+ usb {
+ compatible = "ti,omap4-usb-phy";
+ };
+ };
};
};
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 00/11] OMAP System Control Module
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 8:35 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:35 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, kbaidarov, kishon, balbi, linux-pm, linux-omap,
linux-arm-kernel
Hello again,
On Fri, May 25, 2012 at 11:25:50AM +0300, Eduardo Valentin wrote:
> Hello Paul and Tony,
FYI, Forgot to mention that these patches are available here:
git://gitorious.org/omap-thermal/omap-thermal.git omap_scm_dev
>
> This is a series of patches adding a basic support for system control module,
> on OMAP4+ context. It is a working in progress, but I wanted to share already
> to get your feedback.
>
> I've modeled the driver as an MFD. You will see in this series:
> . A rework of the system control module header (patch from Santosh, picked from the list)
> . Device creation for control module core
> . Early device creation for control module core
> . The MFD core driver for system control module
> . The MFD child for usb-phy pin control
> . The MFD child for bandgap sensor
> . Very early exposure of OMAP4 thermal zone
> . All added drivers are only supporting DT probing
> . The series is based on linux-omap master, as it has the hwmod entries for SCM.
>
> The overall idea of this series is to put in place the infrastructure. It is
> not touching nor removing the existing APIs under mach-omap2/control.c for now.
> But the target is to have these APIs moved to the MFD core driver.
>
> For early access, like ID checking, I have written the platform driver
> as an early platform driver and you will see also early device addition
> and probing under device.c for this case. This is of course a proposal.
> I see that there are people that thing this is a bit of an overkill.
> Konstantin (CCd) was proposing a simpler solution by having
> APIs with early_* prefixes, and solve the IO address mapping with
> a DT entry, for instance. But feel free to propose better ways.
>
> This code has been ripped off from the Android 3.1 branch. I have rewritten
> a couple of things, but the major driver functions and API's entries are kept.
>
> So, based on this series, I see as a TODO list, for system control core driver:
> - Start to move all the existing APIs under mach-omap2/control.c to the mfd core.
> - Rewrite the users of the existing APIs, mentioned on previous item
> Once we decide the API and agree on how to deal with early calls.
> - Add remaining children (from top of my head, the CAM is one of them,
> but I also think we should prob have one for HWOBS for instance)
> - Test on boards that use the existing APIs.
>
> TODO list for bandgap driver:
> - Improve thermal zone definition for OMAP4
> - Introduce the thermal zones for OMAP5
>
> Amit, due to hwmod dep, I didn't include any cooling binding in this series,
> based on the generic CPU cooling device.
>
> Overall series has been tested only with panda board OMAP4460.
>
> Your comments are welcome.
>
> All best,
>
> Eduardo Valentin (9):
> ARM: OMAP: expose control.h to mach area
> OMAP: Add early device for system control module
> mfd: omap: control: core system control driver
> OMAP2+: use control module mfd driver in omap_type
> mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
> ARM: OMAP4+: Adding the temperature sensor register set bit fields
> ARM: OMAP4+: thermal: introduce bandgap temperature sensor
> omap4: thermal: add basic CPU thermal zone
> ARM: DT: Add support to system control module for OMAP4
>
> Kishon Vijay Abraham I (1):
> arm: omap: device: create a device for system control module
>
> Santosh Shilimkar (1):
> ARM: OMAP4: Remove un-used control module headers and defines.
>
> .../devicetree/bindings/mfd/omap_control.txt | 44 +
> .../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
> arch/arm/boot/dts/omap4.dtsi | 13 +
> arch/arm/mach-omap2/Kconfig | 1 +
> arch/arm/mach-omap2/am35xx-emac.c | 2 +-
> arch/arm/mach-omap2/board-3430sdp.c | 2 +-
> arch/arm/mach-omap2/board-4430sdp.c | 2 +-
> arch/arm/mach-omap2/board-am3517crane.c | 2 +-
> arch/arm/mach-omap2/board-am3517evm.c | 2 +-
> arch/arm/mach-omap2/board-apollon.c | 2 +-
> arch/arm/mach-omap2/board-cm-t3517.c | 2 +-
> arch/arm/mach-omap2/board-h4.c | 2 +-
> arch/arm/mach-omap2/board-igep0020.c | 2 +-
> arch/arm/mach-omap2/board-ldp.c | 2 +-
> arch/arm/mach-omap2/board-omap3logic.c | 2 +-
> arch/arm/mach-omap2/board-omap4panda.c | 2 +-
> arch/arm/mach-omap2/board-omap4pcm049.c | 2 +-
> arch/arm/mach-omap2/clock2420_data.c | 2 +-
> arch/arm/mach-omap2/clock2430_data.c | 2 +-
> arch/arm/mach-omap2/clock3xxx_data.c | 2 +-
> arch/arm/mach-omap2/clock44xx_data.c | 2 +-
> arch/arm/mach-omap2/common.c | 2 +-
> arch/arm/mach-omap2/control.c | 2 +-
> arch/arm/mach-omap2/cpuidle34xx.c | 2 +-
> arch/arm/mach-omap2/devices.c | 57 +-
> arch/arm/mach-omap2/display.c | 2 +-
> arch/arm/mach-omap2/hsmmc.c | 2 +-
> arch/arm/mach-omap2/id.c | 18 +-
> arch/arm/mach-omap2/{ => include/mach}/control.h | 163 ++-
> .../include/mach/ctrl_module_core_44xx.h | 391 -----
> .../include/mach/ctrl_module_pad_core_44xx.h | 1409 -----------------
> .../include/mach/ctrl_module_pad_wkup_44xx.h | 236 ---
> .../include/mach/ctrl_module_wkup_44xx.h | 92 --
> arch/arm/mach-omap2/mcbsp.c | 2 +-
> arch/arm/mach-omap2/mux.c | 2 +-
> arch/arm/mach-omap2/omap_phy_internal.c | 2 +-
> arch/arm/mach-omap2/opp3xxx_data.c | 2 +-
> arch/arm/mach-omap2/opp4xxx_data.c | 2 +-
> arch/arm/mach-omap2/pm24xx.c | 2 +-
> arch/arm/mach-omap2/pm34xx.c | 2 +-
> arch/arm/mach-omap2/prcm.c | 2 +-
> arch/arm/mach-omap2/serial.c | 2 +-
> arch/arm/mach-omap2/sleep34xx.S | 2 +-
> arch/arm/mach-omap2/sr_device.c | 2 +-
> arch/arm/mach-omap2/usb-fs.c | 2 +-
> arch/arm/mach-omap2/voltage.c | 2 +-
> arch/arm/plat-omap/Kconfig | 3 +
> drivers/mfd/Kconfig | 9 +
> drivers/mfd/Makefile | 1 +
> drivers/mfd/omap-control-core.c | 211 +++
> drivers/thermal/Kconfig | 25 +
> drivers/thermal/Makefile | 5 +-
> drivers/thermal/omap-bandgap.c | 1602 ++++++++++++++++++++
> drivers/thermal/omap-bandgap.h | 75 +
> drivers/thermal/omap4-thermal.c | 72 +
> drivers/usb/otg/Kconfig | 13 +
> drivers/usb/otg/Makefile | 1 +
> drivers/usb/otg/omap4-usb-phy.c | 130 ++
> include/linux/mfd/omap_control.h | 69 +
> include/linux/usb/omap4_usb_phy.h | 53 +
> 60 files changed, 2617 insertions(+), 2173 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
> create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> rename arch/arm/mach-omap2/{ => include/mach}/control.h (75%)
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
> create mode 100644 drivers/mfd/omap-control-core.c
> create mode 100644 drivers/thermal/omap-bandgap.c
> create mode 100644 drivers/thermal/omap-bandgap.h
> create mode 100644 drivers/thermal/omap4-thermal.c
> create mode 100644 drivers/usb/otg/omap4-usb-phy.c
> create mode 100644 include/linux/mfd/omap_control.h
> create mode 100644 include/linux/usb/omap4_usb_phy.h
>
> --
> 1.7.7.1.488.ge8e1c
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 00/11] OMAP System Control Module
@ 2012-05-25 8:35 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-25 8:35 UTC (permalink / raw)
To: linux-arm-kernel
Hello again,
On Fri, May 25, 2012 at 11:25:50AM +0300, Eduardo Valentin wrote:
> Hello Paul and Tony,
FYI, Forgot to mention that these patches are available here:
git://gitorious.org/omap-thermal/omap-thermal.git omap_scm_dev
>
> This is a series of patches adding a basic support for system control module,
> on OMAP4+ context. It is a working in progress, but I wanted to share already
> to get your feedback.
>
> I've modeled the driver as an MFD. You will see in this series:
> . A rework of the system control module header (patch from Santosh, picked from the list)
> . Device creation for control module core
> . Early device creation for control module core
> . The MFD core driver for system control module
> . The MFD child for usb-phy pin control
> . The MFD child for bandgap sensor
> . Very early exposure of OMAP4 thermal zone
> . All added drivers are only supporting DT probing
> . The series is based on linux-omap master, as it has the hwmod entries for SCM.
>
> The overall idea of this series is to put in place the infrastructure. It is
> not touching nor removing the existing APIs under mach-omap2/control.c for now.
> But the target is to have these APIs moved to the MFD core driver.
>
> For early access, like ID checking, I have written the platform driver
> as an early platform driver and you will see also early device addition
> and probing under device.c for this case. This is of course a proposal.
> I see that there are people that thing this is a bit of an overkill.
> Konstantin (CCd) was proposing a simpler solution by having
> APIs with early_* prefixes, and solve the IO address mapping with
> a DT entry, for instance. But feel free to propose better ways.
>
> This code has been ripped off from the Android 3.1 branch. I have rewritten
> a couple of things, but the major driver functions and API's entries are kept.
>
> So, based on this series, I see as a TODO list, for system control core driver:
> - Start to move all the existing APIs under mach-omap2/control.c to the mfd core.
> - Rewrite the users of the existing APIs, mentioned on previous item
> Once we decide the API and agree on how to deal with early calls.
> - Add remaining children (from top of my head, the CAM is one of them,
> but I also think we should prob have one for HWOBS for instance)
> - Test on boards that use the existing APIs.
>
> TODO list for bandgap driver:
> - Improve thermal zone definition for OMAP4
> - Introduce the thermal zones for OMAP5
>
> Amit, due to hwmod dep, I didn't include any cooling binding in this series,
> based on the generic CPU cooling device.
>
> Overall series has been tested only with panda board OMAP4460.
>
> Your comments are welcome.
>
> All best,
>
> Eduardo Valentin (9):
> ARM: OMAP: expose control.h to mach area
> OMAP: Add early device for system control module
> mfd: omap: control: core system control driver
> OMAP2+: use control module mfd driver in omap_type
> mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
> ARM: OMAP4+: Adding the temperature sensor register set bit fields
> ARM: OMAP4+: thermal: introduce bandgap temperature sensor
> omap4: thermal: add basic CPU thermal zone
> ARM: DT: Add support to system control module for OMAP4
>
> Kishon Vijay Abraham I (1):
> arm: omap: device: create a device for system control module
>
> Santosh Shilimkar (1):
> ARM: OMAP4: Remove un-used control module headers and defines.
>
> .../devicetree/bindings/mfd/omap_control.txt | 44 +
> .../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
> arch/arm/boot/dts/omap4.dtsi | 13 +
> arch/arm/mach-omap2/Kconfig | 1 +
> arch/arm/mach-omap2/am35xx-emac.c | 2 +-
> arch/arm/mach-omap2/board-3430sdp.c | 2 +-
> arch/arm/mach-omap2/board-4430sdp.c | 2 +-
> arch/arm/mach-omap2/board-am3517crane.c | 2 +-
> arch/arm/mach-omap2/board-am3517evm.c | 2 +-
> arch/arm/mach-omap2/board-apollon.c | 2 +-
> arch/arm/mach-omap2/board-cm-t3517.c | 2 +-
> arch/arm/mach-omap2/board-h4.c | 2 +-
> arch/arm/mach-omap2/board-igep0020.c | 2 +-
> arch/arm/mach-omap2/board-ldp.c | 2 +-
> arch/arm/mach-omap2/board-omap3logic.c | 2 +-
> arch/arm/mach-omap2/board-omap4panda.c | 2 +-
> arch/arm/mach-omap2/board-omap4pcm049.c | 2 +-
> arch/arm/mach-omap2/clock2420_data.c | 2 +-
> arch/arm/mach-omap2/clock2430_data.c | 2 +-
> arch/arm/mach-omap2/clock3xxx_data.c | 2 +-
> arch/arm/mach-omap2/clock44xx_data.c | 2 +-
> arch/arm/mach-omap2/common.c | 2 +-
> arch/arm/mach-omap2/control.c | 2 +-
> arch/arm/mach-omap2/cpuidle34xx.c | 2 +-
> arch/arm/mach-omap2/devices.c | 57 +-
> arch/arm/mach-omap2/display.c | 2 +-
> arch/arm/mach-omap2/hsmmc.c | 2 +-
> arch/arm/mach-omap2/id.c | 18 +-
> arch/arm/mach-omap2/{ => include/mach}/control.h | 163 ++-
> .../include/mach/ctrl_module_core_44xx.h | 391 -----
> .../include/mach/ctrl_module_pad_core_44xx.h | 1409 -----------------
> .../include/mach/ctrl_module_pad_wkup_44xx.h | 236 ---
> .../include/mach/ctrl_module_wkup_44xx.h | 92 --
> arch/arm/mach-omap2/mcbsp.c | 2 +-
> arch/arm/mach-omap2/mux.c | 2 +-
> arch/arm/mach-omap2/omap_phy_internal.c | 2 +-
> arch/arm/mach-omap2/opp3xxx_data.c | 2 +-
> arch/arm/mach-omap2/opp4xxx_data.c | 2 +-
> arch/arm/mach-omap2/pm24xx.c | 2 +-
> arch/arm/mach-omap2/pm34xx.c | 2 +-
> arch/arm/mach-omap2/prcm.c | 2 +-
> arch/arm/mach-omap2/serial.c | 2 +-
> arch/arm/mach-omap2/sleep34xx.S | 2 +-
> arch/arm/mach-omap2/sr_device.c | 2 +-
> arch/arm/mach-omap2/usb-fs.c | 2 +-
> arch/arm/mach-omap2/voltage.c | 2 +-
> arch/arm/plat-omap/Kconfig | 3 +
> drivers/mfd/Kconfig | 9 +
> drivers/mfd/Makefile | 1 +
> drivers/mfd/omap-control-core.c | 211 +++
> drivers/thermal/Kconfig | 25 +
> drivers/thermal/Makefile | 5 +-
> drivers/thermal/omap-bandgap.c | 1602 ++++++++++++++++++++
> drivers/thermal/omap-bandgap.h | 75 +
> drivers/thermal/omap4-thermal.c | 72 +
> drivers/usb/otg/Kconfig | 13 +
> drivers/usb/otg/Makefile | 1 +
> drivers/usb/otg/omap4-usb-phy.c | 130 ++
> include/linux/mfd/omap_control.h | 69 +
> include/linux/usb/omap4_usb_phy.h | 53 +
> 60 files changed, 2617 insertions(+), 2173 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
> create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> rename arch/arm/mach-omap2/{ => include/mach}/control.h (75%)
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
> create mode 100644 drivers/mfd/omap-control-core.c
> create mode 100644 drivers/thermal/omap-bandgap.c
> create mode 100644 drivers/thermal/omap-bandgap.h
> create mode 100644 drivers/thermal/omap4-thermal.c
> create mode 100644 drivers/usb/otg/omap4-usb-phy.c
> create mode 100644 include/linux/mfd/omap_control.h
> create mode 100644 include/linux/usb/omap4_usb_phy.h
>
> --
> 1.7.7.1.488.ge8e1c
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 00/11] OMAP System Control Module
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 10:50 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-25 10:50 UTC (permalink / raw)
To: Eduardo Valentin
Cc: paul, b-cousson, tony, Konstantin Baydarov, balbi, kishon,
santosh.shilimkar, amit.kucheria, linux-pm, linux-omap,
linux-arm-kernel, amit.kachhap
Hi.
On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
> Hello Paul and Tony,
>
> This is a series of patches adding a basic support for system control module,
> on OMAP4+ context. It is a working in progress, but I wanted to share already
> to get your feedback.
>
> I've modeled the driver as an MFD. You will see in this series:
> . A rework of the system control module header (patch from Santosh, picked from the list)
> . Device creation for control module core
> . Early device creation for control module core
> . The MFD core driver for system control module
> . The MFD child for usb-phy pin control
> . The MFD child for bandgap sensor
> . Very early exposure of OMAP4 thermal zone
> . All added drivers are only supporting DT probing
> . The series is based on linux-omap master, as it has the hwmod entries for SCM.
>
> The overall idea of this series is to put in place the infrastructure. It is
> not touching nor removing the existing APIs under mach-omap2/control.c for now.
> But the target is to have these APIs moved to the MFD core driver.
>
> For early access, like ID checking, I have written the platform driver
> as an early platform driver and you will see also early device addition
> and probing under device.c for this case. This is of course a proposal.
> I see that there are people that thing this is a bit of an overkill.
> Konstantin (CCd) was proposing a simpler solution by having
> APIs with early_* prefixes, and solve the IO address mapping with
> a DT entry, for instance. But feel free to propose better ways.
In my latest version I got rid from early API set, check out patch for V3 patch set.
I'll attach patch for current version later.
BR,
Konstantin Baydarov.
>
> This code has been ripped off from the Android 3.1 branch. I have rewritten
> a couple of things, but the major driver functions and API's entries are kept.
>
> So, based on this series, I see as a TODO list, for system control core driver:
> - Start to move all the existing APIs under mach-omap2/control.c to the mfd core.
> - Rewrite the users of the existing APIs, mentioned on previous item
> Once we decide the API and agree on how to deal with early calls.
> - Add remaining children (from top of my head, the CAM is one of them,
> but I also think we should prob have one for HWOBS for instance)
> - Test on boards that use the existing APIs.
>
> TODO list for bandgap driver:
> - Improve thermal zone definition for OMAP4
> - Introduce the thermal zones for OMAP5
>
> Amit, due to hwmod dep, I didn't include any cooling binding in this series,
> based on the generic CPU cooling device.
>
> Overall series has been tested only with panda board OMAP4460.
>
> Your comments are welcome.
>
> All best,
>
> Eduardo Valentin (9):
> ARM: OMAP: expose control.h to mach area
> OMAP: Add early device for system control module
> mfd: omap: control: core system control driver
> OMAP2+: use control module mfd driver in omap_type
> mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
> ARM: OMAP4+: Adding the temperature sensor register set bit fields
> ARM: OMAP4+: thermal: introduce bandgap temperature sensor
> omap4: thermal: add basic CPU thermal zone
> ARM: DT: Add support to system control module for OMAP4
>
> Kishon Vijay Abraham I (1):
> arm: omap: device: create a device for system control module
>
> Santosh Shilimkar (1):
> ARM: OMAP4: Remove un-used control module headers and defines.
>
> .../devicetree/bindings/mfd/omap_control.txt | 44 +
> .../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
> arch/arm/boot/dts/omap4.dtsi | 13 +
> arch/arm/mach-omap2/Kconfig | 1 +
> arch/arm/mach-omap2/am35xx-emac.c | 2 +-
> arch/arm/mach-omap2/board-3430sdp.c | 2 +-
> arch/arm/mach-omap2/board-4430sdp.c | 2 +-
> arch/arm/mach-omap2/board-am3517crane.c | 2 +-
> arch/arm/mach-omap2/board-am3517evm.c | 2 +-
> arch/arm/mach-omap2/board-apollon.c | 2 +-
> arch/arm/mach-omap2/board-cm-t3517.c | 2 +-
> arch/arm/mach-omap2/board-h4.c | 2 +-
> arch/arm/mach-omap2/board-igep0020.c | 2 +-
> arch/arm/mach-omap2/board-ldp.c | 2 +-
> arch/arm/mach-omap2/board-omap3logic.c | 2 +-
> arch/arm/mach-omap2/board-omap4panda.c | 2 +-
> arch/arm/mach-omap2/board-omap4pcm049.c | 2 +-
> arch/arm/mach-omap2/clock2420_data.c | 2 +-
> arch/arm/mach-omap2/clock2430_data.c | 2 +-
> arch/arm/mach-omap2/clock3xxx_data.c | 2 +-
> arch/arm/mach-omap2/clock44xx_data.c | 2 +-
> arch/arm/mach-omap2/common.c | 2 +-
> arch/arm/mach-omap2/control.c | 2 +-
> arch/arm/mach-omap2/cpuidle34xx.c | 2 +-
> arch/arm/mach-omap2/devices.c | 57 +-
> arch/arm/mach-omap2/display.c | 2 +-
> arch/arm/mach-omap2/hsmmc.c | 2 +-
> arch/arm/mach-omap2/id.c | 18 +-
> arch/arm/mach-omap2/{ => include/mach}/control.h | 163 ++-
> .../include/mach/ctrl_module_core_44xx.h | 391 -----
> .../include/mach/ctrl_module_pad_core_44xx.h | 1409 -----------------
> .../include/mach/ctrl_module_pad_wkup_44xx.h | 236 ---
> .../include/mach/ctrl_module_wkup_44xx.h | 92 --
> arch/arm/mach-omap2/mcbsp.c | 2 +-
> arch/arm/mach-omap2/mux.c | 2 +-
> arch/arm/mach-omap2/omap_phy_internal.c | 2 +-
> arch/arm/mach-omap2/opp3xxx_data.c | 2 +-
> arch/arm/mach-omap2/opp4xxx_data.c | 2 +-
> arch/arm/mach-omap2/pm24xx.c | 2 +-
> arch/arm/mach-omap2/pm34xx.c | 2 +-
> arch/arm/mach-omap2/prcm.c | 2 +-
> arch/arm/mach-omap2/serial.c | 2 +-
> arch/arm/mach-omap2/sleep34xx.S | 2 +-
> arch/arm/mach-omap2/sr_device.c | 2 +-
> arch/arm/mach-omap2/usb-fs.c | 2 +-
> arch/arm/mach-omap2/voltage.c | 2 +-
> arch/arm/plat-omap/Kconfig | 3 +
> drivers/mfd/Kconfig | 9 +
> drivers/mfd/Makefile | 1 +
> drivers/mfd/omap-control-core.c | 211 +++
> drivers/thermal/Kconfig | 25 +
> drivers/thermal/Makefile | 5 +-
> drivers/thermal/omap-bandgap.c | 1602 ++++++++++++++++++++
> drivers/thermal/omap-bandgap.h | 75 +
> drivers/thermal/omap4-thermal.c | 72 +
> drivers/usb/otg/Kconfig | 13 +
> drivers/usb/otg/Makefile | 1 +
> drivers/usb/otg/omap4-usb-phy.c | 130 ++
> include/linux/mfd/omap_control.h | 69 +
> include/linux/usb/omap4_usb_phy.h | 53 +
> 60 files changed, 2617 insertions(+), 2173 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
> create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> rename arch/arm/mach-omap2/{ => include/mach}/control.h (75%)
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
> create mode 100644 drivers/mfd/omap-control-core.c
> create mode 100644 drivers/thermal/omap-bandgap.c
> create mode 100644 drivers/thermal/omap-bandgap.h
> create mode 100644 drivers/thermal/omap4-thermal.c
> create mode 100644 drivers/usb/otg/omap4-usb-phy.c
> create mode 100644 include/linux/mfd/omap_control.h
> create mode 100644 include/linux/usb/omap4_usb_phy.h
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 00/11] OMAP System Control Module
@ 2012-05-25 10:50 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-25 10:50 UTC (permalink / raw)
To: linux-arm-kernel
Hi.
On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
> Hello Paul and Tony,
>
> This is a series of patches adding a basic support for system control module,
> on OMAP4+ context. It is a working in progress, but I wanted to share already
> to get your feedback.
>
> I've modeled the driver as an MFD. You will see in this series:
> . A rework of the system control module header (patch from Santosh, picked from the list)
> . Device creation for control module core
> . Early device creation for control module core
> . The MFD core driver for system control module
> . The MFD child for usb-phy pin control
> . The MFD child for bandgap sensor
> . Very early exposure of OMAP4 thermal zone
> . All added drivers are only supporting DT probing
> . The series is based on linux-omap master, as it has the hwmod entries for SCM.
>
> The overall idea of this series is to put in place the infrastructure. It is
> not touching nor removing the existing APIs under mach-omap2/control.c for now.
> But the target is to have these APIs moved to the MFD core driver.
>
> For early access, like ID checking, I have written the platform driver
> as an early platform driver and you will see also early device addition
> and probing under device.c for this case. This is of course a proposal.
> I see that there are people that thing this is a bit of an overkill.
> Konstantin (CCd) was proposing a simpler solution by having
> APIs with early_* prefixes, and solve the IO address mapping with
> a DT entry, for instance. But feel free to propose better ways.
In my latest version I got rid from early API set, check out patch for V3 patch set.
I'll attach patch for current version later.
BR,
Konstantin Baydarov.
>
> This code has been ripped off from the Android 3.1 branch. I have rewritten
> a couple of things, but the major driver functions and API's entries are kept.
>
> So, based on this series, I see as a TODO list, for system control core driver:
> - Start to move all the existing APIs under mach-omap2/control.c to the mfd core.
> - Rewrite the users of the existing APIs, mentioned on previous item
> Once we decide the API and agree on how to deal with early calls.
> - Add remaining children (from top of my head, the CAM is one of them,
> but I also think we should prob have one for HWOBS for instance)
> - Test on boards that use the existing APIs.
>
> TODO list for bandgap driver:
> - Improve thermal zone definition for OMAP4
> - Introduce the thermal zones for OMAP5
>
> Amit, due to hwmod dep, I didn't include any cooling binding in this series,
> based on the generic CPU cooling device.
>
> Overall series has been tested only with panda board OMAP4460.
>
> Your comments are welcome.
>
> All best,
>
> Eduardo Valentin (9):
> ARM: OMAP: expose control.h to mach area
> OMAP: Add early device for system control module
> mfd: omap: control: core system control driver
> OMAP2+: use control module mfd driver in omap_type
> mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
> ARM: OMAP4+: Adding the temperature sensor register set bit fields
> ARM: OMAP4+: thermal: introduce bandgap temperature sensor
> omap4: thermal: add basic CPU thermal zone
> ARM: DT: Add support to system control module for OMAP4
>
> Kishon Vijay Abraham I (1):
> arm: omap: device: create a device for system control module
>
> Santosh Shilimkar (1):
> ARM: OMAP4: Remove un-used control module headers and defines.
>
> .../devicetree/bindings/mfd/omap_control.txt | 44 +
> .../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
> arch/arm/boot/dts/omap4.dtsi | 13 +
> arch/arm/mach-omap2/Kconfig | 1 +
> arch/arm/mach-omap2/am35xx-emac.c | 2 +-
> arch/arm/mach-omap2/board-3430sdp.c | 2 +-
> arch/arm/mach-omap2/board-4430sdp.c | 2 +-
> arch/arm/mach-omap2/board-am3517crane.c | 2 +-
> arch/arm/mach-omap2/board-am3517evm.c | 2 +-
> arch/arm/mach-omap2/board-apollon.c | 2 +-
> arch/arm/mach-omap2/board-cm-t3517.c | 2 +-
> arch/arm/mach-omap2/board-h4.c | 2 +-
> arch/arm/mach-omap2/board-igep0020.c | 2 +-
> arch/arm/mach-omap2/board-ldp.c | 2 +-
> arch/arm/mach-omap2/board-omap3logic.c | 2 +-
> arch/arm/mach-omap2/board-omap4panda.c | 2 +-
> arch/arm/mach-omap2/board-omap4pcm049.c | 2 +-
> arch/arm/mach-omap2/clock2420_data.c | 2 +-
> arch/arm/mach-omap2/clock2430_data.c | 2 +-
> arch/arm/mach-omap2/clock3xxx_data.c | 2 +-
> arch/arm/mach-omap2/clock44xx_data.c | 2 +-
> arch/arm/mach-omap2/common.c | 2 +-
> arch/arm/mach-omap2/control.c | 2 +-
> arch/arm/mach-omap2/cpuidle34xx.c | 2 +-
> arch/arm/mach-omap2/devices.c | 57 +-
> arch/arm/mach-omap2/display.c | 2 +-
> arch/arm/mach-omap2/hsmmc.c | 2 +-
> arch/arm/mach-omap2/id.c | 18 +-
> arch/arm/mach-omap2/{ => include/mach}/control.h | 163 ++-
> .../include/mach/ctrl_module_core_44xx.h | 391 -----
> .../include/mach/ctrl_module_pad_core_44xx.h | 1409 -----------------
> .../include/mach/ctrl_module_pad_wkup_44xx.h | 236 ---
> .../include/mach/ctrl_module_wkup_44xx.h | 92 --
> arch/arm/mach-omap2/mcbsp.c | 2 +-
> arch/arm/mach-omap2/mux.c | 2 +-
> arch/arm/mach-omap2/omap_phy_internal.c | 2 +-
> arch/arm/mach-omap2/opp3xxx_data.c | 2 +-
> arch/arm/mach-omap2/opp4xxx_data.c | 2 +-
> arch/arm/mach-omap2/pm24xx.c | 2 +-
> arch/arm/mach-omap2/pm34xx.c | 2 +-
> arch/arm/mach-omap2/prcm.c | 2 +-
> arch/arm/mach-omap2/serial.c | 2 +-
> arch/arm/mach-omap2/sleep34xx.S | 2 +-
> arch/arm/mach-omap2/sr_device.c | 2 +-
> arch/arm/mach-omap2/usb-fs.c | 2 +-
> arch/arm/mach-omap2/voltage.c | 2 +-
> arch/arm/plat-omap/Kconfig | 3 +
> drivers/mfd/Kconfig | 9 +
> drivers/mfd/Makefile | 1 +
> drivers/mfd/omap-control-core.c | 211 +++
> drivers/thermal/Kconfig | 25 +
> drivers/thermal/Makefile | 5 +-
> drivers/thermal/omap-bandgap.c | 1602 ++++++++++++++++++++
> drivers/thermal/omap-bandgap.h | 75 +
> drivers/thermal/omap4-thermal.c | 72 +
> drivers/usb/otg/Kconfig | 13 +
> drivers/usb/otg/Makefile | 1 +
> drivers/usb/otg/omap4-usb-phy.c | 130 ++
> include/linux/mfd/omap_control.h | 69 +
> include/linux/usb/omap4_usb_phy.h | 53 +
> 60 files changed, 2617 insertions(+), 2173 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
> create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> rename arch/arm/mach-omap2/{ => include/mach}/control.h (75%)
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
> create mode 100644 drivers/mfd/omap-control-core.c
> create mode 100644 drivers/thermal/omap-bandgap.c
> create mode 100644 drivers/thermal/omap-bandgap.h
> create mode 100644 drivers/thermal/omap4-thermal.c
> create mode 100644 drivers/usb/otg/omap4-usb-phy.c
> create mode 100644 include/linux/mfd/omap_control.h
> create mode 100644 include/linux/usb/omap4_usb_phy.h
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 00/11] OMAP System Control Module
2012-05-25 10:50 ` Konstantin Baydarov
@ 2012-05-25 11:11 ` Valentin, Eduardo
-1 siblings, 0 replies; 198+ messages in thread
From: Valentin, Eduardo @ 2012-05-25 11:11 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: b-cousson, kishon, santosh.shilimkar, tony, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap
Konstantin,
On Fri, May 25, 2012 at 1:50 PM, Konstantin Baydarov
<kbaidarov@dev.rtsoft.ru> wrote:
> Hi.
>
> On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
>> Hello Paul and Tony,
>>
>> This is a series of patches adding a basic support for system control module,
>> on OMAP4+ context. It is a working in progress, but I wanted to share already
>> to get your feedback.
>>
>> I've modeled the driver as an MFD. You will see in this series:
>> . A rework of the system control module header (patch from Santosh, picked from the list)
>> . Device creation for control module core
>> . Early device creation for control module core
>> . The MFD core driver for system control module
>> . The MFD child for usb-phy pin control
>> . The MFD child for bandgap sensor
>> . Very early exposure of OMAP4 thermal zone
>> . All added drivers are only supporting DT probing
>> . The series is based on linux-omap master, as it has the hwmod entries for SCM.
>>
>> The overall idea of this series is to put in place the infrastructure. It is
>> not touching nor removing the existing APIs under mach-omap2/control.c for now.
>> But the target is to have these APIs moved to the MFD core driver.
>>
>> For early access, like ID checking, I have written the platform driver
>> as an early platform driver and you will see also early device addition
>> and probing under device.c for this case. This is of course a proposal.
>> I see that there are people that thing this is a bit of an overkill.
>> Konstantin (CCd) was proposing a simpler solution by having
>> APIs with early_* prefixes, and solve the IO address mapping with
>> a DT entry, for instance. But feel free to propose better ways.
> In my latest version I got rid from early API set, check out patch for V3 patch set.
> I'll attach patch for current version later.
Please send it across so we can compare your approach with the one
present in this series.
>
> BR,
> Konstantin Baydarov.
>
>>
>> This code has been ripped off from the Android 3.1 branch. I have rewritten
>> a couple of things, but the major driver functions and API's entries are kept.
>>
>> So, based on this series, I see as a TODO list, for system control core driver:
>> - Start to move all the existing APIs under mach-omap2/control.c to the mfd core.
>> - Rewrite the users of the existing APIs, mentioned on previous item
>> Once we decide the API and agree on how to deal with early calls.
>> - Add remaining children (from top of my head, the CAM is one of them,
>> but I also think we should prob have one for HWOBS for instance)
>> - Test on boards that use the existing APIs.
>>
>> TODO list for bandgap driver:
>> - Improve thermal zone definition for OMAP4
>> - Introduce the thermal zones for OMAP5
>>
>> Amit, due to hwmod dep, I didn't include any cooling binding in this series,
>> based on the generic CPU cooling device.
>>
>> Overall series has been tested only with panda board OMAP4460.
>>
>> Your comments are welcome.
>>
>> All best,
>>
>> Eduardo Valentin (9):
>> ARM: OMAP: expose control.h to mach area
>> OMAP: Add early device for system control module
>> mfd: omap: control: core system control driver
>> OMAP2+: use control module mfd driver in omap_type
>> mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
>> ARM: OMAP4+: Adding the temperature sensor register set bit fields
>> ARM: OMAP4+: thermal: introduce bandgap temperature sensor
>> omap4: thermal: add basic CPU thermal zone
>> ARM: DT: Add support to system control module for OMAP4
>>
>> Kishon Vijay Abraham I (1):
>> arm: omap: device: create a device for system control module
>>
>> Santosh Shilimkar (1):
>> ARM: OMAP4: Remove un-used control module headers and defines.
>>
>> .../devicetree/bindings/mfd/omap_control.txt | 44 +
>> .../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
>> arch/arm/boot/dts/omap4.dtsi | 13 +
>> arch/arm/mach-omap2/Kconfig | 1 +
>> arch/arm/mach-omap2/am35xx-emac.c | 2 +-
>> arch/arm/mach-omap2/board-3430sdp.c | 2 +-
>> arch/arm/mach-omap2/board-4430sdp.c | 2 +-
>> arch/arm/mach-omap2/board-am3517crane.c | 2 +-
>> arch/arm/mach-omap2/board-am3517evm.c | 2 +-
>> arch/arm/mach-omap2/board-apollon.c | 2 +-
>> arch/arm/mach-omap2/board-cm-t3517.c | 2 +-
>> arch/arm/mach-omap2/board-h4.c | 2 +-
>> arch/arm/mach-omap2/board-igep0020.c | 2 +-
>> arch/arm/mach-omap2/board-ldp.c | 2 +-
>> arch/arm/mach-omap2/board-omap3logic.c | 2 +-
>> arch/arm/mach-omap2/board-omap4panda.c | 2 +-
>> arch/arm/mach-omap2/board-omap4pcm049.c | 2 +-
>> arch/arm/mach-omap2/clock2420_data.c | 2 +-
>> arch/arm/mach-omap2/clock2430_data.c | 2 +-
>> arch/arm/mach-omap2/clock3xxx_data.c | 2 +-
>> arch/arm/mach-omap2/clock44xx_data.c | 2 +-
>> arch/arm/mach-omap2/common.c | 2 +-
>> arch/arm/mach-omap2/control.c | 2 +-
>> arch/arm/mach-omap2/cpuidle34xx.c | 2 +-
>> arch/arm/mach-omap2/devices.c | 57 +-
>> arch/arm/mach-omap2/display.c | 2 +-
>> arch/arm/mach-omap2/hsmmc.c | 2 +-
>> arch/arm/mach-omap2/id.c | 18 +-
>> arch/arm/mach-omap2/{ => include/mach}/control.h | 163 ++-
>> .../include/mach/ctrl_module_core_44xx.h | 391 -----
>> .../include/mach/ctrl_module_pad_core_44xx.h | 1409 -----------------
>> .../include/mach/ctrl_module_pad_wkup_44xx.h | 236 ---
>> .../include/mach/ctrl_module_wkup_44xx.h | 92 --
>> arch/arm/mach-omap2/mcbsp.c | 2 +-
>> arch/arm/mach-omap2/mux.c | 2 +-
>> arch/arm/mach-omap2/omap_phy_internal.c | 2 +-
>> arch/arm/mach-omap2/opp3xxx_data.c | 2 +-
>> arch/arm/mach-omap2/opp4xxx_data.c | 2 +-
>> arch/arm/mach-omap2/pm24xx.c | 2 +-
>> arch/arm/mach-omap2/pm34xx.c | 2 +-
>> arch/arm/mach-omap2/prcm.c | 2 +-
>> arch/arm/mach-omap2/serial.c | 2 +-
>> arch/arm/mach-omap2/sleep34xx.S | 2 +-
>> arch/arm/mach-omap2/sr_device.c | 2 +-
>> arch/arm/mach-omap2/usb-fs.c | 2 +-
>> arch/arm/mach-omap2/voltage.c | 2 +-
>> arch/arm/plat-omap/Kconfig | 3 +
>> drivers/mfd/Kconfig | 9 +
>> drivers/mfd/Makefile | 1 +
>> drivers/mfd/omap-control-core.c | 211 +++
>> drivers/thermal/Kconfig | 25 +
>> drivers/thermal/Makefile | 5 +-
>> drivers/thermal/omap-bandgap.c | 1602 ++++++++++++++++++++
>> drivers/thermal/omap-bandgap.h | 75 +
>> drivers/thermal/omap4-thermal.c | 72 +
>> drivers/usb/otg/Kconfig | 13 +
>> drivers/usb/otg/Makefile | 1 +
>> drivers/usb/otg/omap4-usb-phy.c | 130 ++
>> include/linux/mfd/omap_control.h | 69 +
>> include/linux/usb/omap4_usb_phy.h | 53 +
>> 60 files changed, 2617 insertions(+), 2173 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
>> create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
>> rename arch/arm/mach-omap2/{ => include/mach}/control.h (75%)
>> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
>> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
>> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
>> delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
>> create mode 100644 drivers/mfd/omap-control-core.c
>> create mode 100644 drivers/thermal/omap-bandgap.c
>> create mode 100644 drivers/thermal/omap-bandgap.h
>> create mode 100644 drivers/thermal/omap4-thermal.c
>> create mode 100644 drivers/usb/otg/omap4-usb-phy.c
>> create mode 100644 include/linux/mfd/omap_control.h
>> create mode 100644 include/linux/usb/omap4_usb_phy.h
>>
>
--
Eduardo Valentin
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 00/11] OMAP System Control Module
@ 2012-05-25 11:11 ` Valentin, Eduardo
0 siblings, 0 replies; 198+ messages in thread
From: Valentin, Eduardo @ 2012-05-25 11:11 UTC (permalink / raw)
To: linux-arm-kernel
Konstantin,
On Fri, May 25, 2012 at 1:50 PM, Konstantin Baydarov
<kbaidarov@dev.rtsoft.ru> wrote:
> ?Hi.
>
> On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
>> Hello Paul and Tony,
>>
>> This is a series of patches adding a basic support for system control module,
>> on OMAP4+ context. It is a working in progress, but I wanted to share already
>> to get your feedback.
>>
>> I've modeled the driver as an MFD. You will see in this series:
>> . A rework of the system control module header (patch from Santosh, picked from the list)
>> . Device creation for control module core
>> . Early device creation for control module core
>> . The MFD core driver for system control module
>> . The MFD child for usb-phy pin control
>> . The MFD child for bandgap sensor
>> . Very early exposure of OMAP4 thermal zone
>> . All added drivers are only supporting DT probing
>> . The series is based on linux-omap master, as it has the hwmod entries for SCM.
>>
>> The overall idea of this series is to put in place the infrastructure. It is
>> not touching nor removing the existing APIs under mach-omap2/control.c for now.
>> But the target is to have these APIs moved to the MFD core driver.
>>
>> For early access, like ID checking, I have written the platform driver
>> as an early platform driver and you will see also early device addition
>> and probing under device.c for this case. This is of course a proposal.
>> I see that there are people that thing this is a bit of an overkill.
>> Konstantin (CCd) was proposing a simpler solution by having
>> APIs with early_* prefixes, and solve the IO address mapping with
>> a DT entry, for instance. But feel free to propose better ways.
> In my latest version I got rid from early API set, check out patch for V3 patch set.
> I'll attach patch for current version later.
Please send it across so we can compare your approach with the one
present in this series.
>
> BR,
> ? ?Konstantin Baydarov.
>
>>
>> This code has been ripped off from the Android 3.1 branch. I have rewritten
>> a couple of things, but the major driver functions and API's entries are kept.
>>
>> So, based on this series, I see as a TODO list, for system control core driver:
>> - Start to move all the existing APIs under mach-omap2/control.c to the mfd core.
>> - Rewrite the users of the existing APIs, mentioned on previous item
>> Once we decide the API and agree on how to deal with early calls.
>> - Add remaining children (from top of my head, the CAM is one of them,
>> but I also think we should prob have one for HWOBS for instance)
>> - Test on boards that use the existing APIs.
>>
>> TODO list for bandgap driver:
>> - Improve thermal zone definition for OMAP4
>> - Introduce the thermal zones for OMAP5
>>
>> Amit, due to hwmod dep, I didn't include any cooling binding in this series,
>> based on the generic CPU cooling device.
>>
>> Overall series has been tested only with panda board OMAP4460.
>>
>> Your comments are welcome.
>>
>> All best,
>>
>> Eduardo Valentin (9):
>> ? ARM: OMAP: expose control.h to mach area
>> ? OMAP: Add early device for system control module
>> ? mfd: omap: control: core system control driver
>> ? OMAP2+: use control module mfd driver in omap_type
>> ? mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
>> ? ARM: OMAP4+: Adding the temperature sensor register set bit fields
>> ? ARM: OMAP4+: thermal: introduce bandgap temperature sensor
>> ? omap4: thermal: add basic CPU thermal zone
>> ? ARM: DT: Add support to system control module for OMAP4
>>
>> Kishon Vijay Abraham I (1):
>> ? arm: omap: device: create a device for system control module
>>
>> Santosh Shilimkar (1):
>> ? ARM: OMAP4: Remove un-used control module headers and defines.
>>
>> ?.../devicetree/bindings/mfd/omap_control.txt ? ? ? | ? 44 +
>> ?.../devicetree/bindings/thermal/omap_bandgap.txt ? | ? 27 +
>> ?arch/arm/boot/dts/omap4.dtsi ? ? ? ? ? ? ? ? ? ? ? | ? 13 +
>> ?arch/arm/mach-omap2/Kconfig ? ? ? ? ? ? ? ? ? ? ? ?| ? ?1 +
>> ?arch/arm/mach-omap2/am35xx-emac.c ? ? ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/board-3430sdp.c ? ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/board-4430sdp.c ? ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/board-am3517crane.c ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/board-am3517evm.c ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/board-apollon.c ? ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/board-cm-t3517.c ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/board-h4.c ? ? ? ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/board-igep0020.c ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/board-ldp.c ? ? ? ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/board-omap3logic.c ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/board-omap4panda.c ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/board-omap4pcm049.c ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/clock2420_data.c ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/clock2430_data.c ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/clock3xxx_data.c ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/clock44xx_data.c ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/common.c ? ? ? ? ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/control.c ? ? ? ? ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/cpuidle34xx.c ? ? ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/devices.c ? ? ? ? ? ? ? ? ? ? ?| ? 57 +-
>> ?arch/arm/mach-omap2/display.c ? ? ? ? ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/hsmmc.c ? ? ? ? ? ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/id.c ? ? ? ? ? ? ? ? ? ? ? ? ? | ? 18 +-
>> ?arch/arm/mach-omap2/{ => include/mach}/control.h ? | ?163 ++-
>> ?.../include/mach/ctrl_module_core_44xx.h ? ? ? ? ? | ?391 -----
>> ?.../include/mach/ctrl_module_pad_core_44xx.h ? ? ? | 1409 -----------------
>> ?.../include/mach/ctrl_module_pad_wkup_44xx.h ? ? ? | ?236 ---
>> ?.../include/mach/ctrl_module_wkup_44xx.h ? ? ? ? ? | ? 92 --
>> ?arch/arm/mach-omap2/mcbsp.c ? ? ? ? ? ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/mux.c ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/omap_phy_internal.c ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/opp3xxx_data.c ? ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/opp4xxx_data.c ? ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/pm24xx.c ? ? ? ? ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/pm34xx.c ? ? ? ? ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/prcm.c ? ? ? ? ? ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/serial.c ? ? ? ? ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/sleep34xx.S ? ? ? ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/sr_device.c ? ? ? ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/mach-omap2/usb-fs.c ? ? ? ? ? ? ? ? ? ? ? | ? ?2 +-
>> ?arch/arm/mach-omap2/voltage.c ? ? ? ? ? ? ? ? ? ? ?| ? ?2 +-
>> ?arch/arm/plat-omap/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? | ? ?3 +
>> ?drivers/mfd/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?9 +
>> ?drivers/mfd/Makefile ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?1 +
>> ?drivers/mfd/omap-control-core.c ? ? ? ? ? ? ? ? ? ?| ?211 +++
>> ?drivers/thermal/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? ? ?| ? 25 +
>> ?drivers/thermal/Makefile ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?5 +-
>> ?drivers/thermal/omap-bandgap.c ? ? ? ? ? ? ? ? ? ? | 1602 ++++++++++++++++++++
>> ?drivers/thermal/omap-bandgap.h ? ? ? ? ? ? ? ? ? ? | ? 75 +
>> ?drivers/thermal/omap4-thermal.c ? ? ? ? ? ? ? ? ? ?| ? 72 +
>> ?drivers/usb/otg/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? ? ?| ? 13 +
>> ?drivers/usb/otg/Makefile ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?1 +
>> ?drivers/usb/otg/omap4-usb-phy.c ? ? ? ? ? ? ? ? ? ?| ?130 ++
>> ?include/linux/mfd/omap_control.h ? ? ? ? ? ? ? ? ? | ? 69 +
>> ?include/linux/usb/omap4_usb_phy.h ? ? ? ? ? ? ? ? ?| ? 53 +
>> ?60 files changed, 2617 insertions(+), 2173 deletions(-)
>> ?create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
>> ?create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
>> ?rename arch/arm/mach-omap2/{ => include/mach}/control.h (75%)
>> ?delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
>> ?delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
>> ?delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
>> ?delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
>> ?create mode 100644 drivers/mfd/omap-control-core.c
>> ?create mode 100644 drivers/thermal/omap-bandgap.c
>> ?create mode 100644 drivers/thermal/omap-bandgap.h
>> ?create mode 100644 drivers/thermal/omap4-thermal.c
>> ?create mode 100644 drivers/usb/otg/omap4-usb-phy.c
>> ?create mode 100644 include/linux/mfd/omap_control.h
>> ?create mode 100644 include/linux/usb/omap4_usb_phy.h
>>
>
--
Eduardo Valentin
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 04/11] OMAP: Add early device for system control module
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 11:32 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-25 11:32 UTC (permalink / raw)
To: Eduardo Valentin
Cc: b-cousson, kishon, santosh.shilimkar, tony, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Konstantin Baydarov
Hi , Eduardo.
On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
> This is a way to add an early device for system control module.
> the code is also requesting for driver registration and probing.
> Done at early_initcall because at that time, ioremapping is possible.
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/devices.c | 29 +++++++++++++++++++++++++++++
> 1 files changed, 29 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> index 9332673..58cc5c3 100644
> --- a/arch/arm/mach-omap2/devices.c
> +++ b/arch/arm/mach-omap2/devices.c
> @@ -40,6 +40,35 @@
> #define L3_MODULES_MAX_LEN 12
> #define L3_MODULES 3
>
> +static struct resource control_resources[] = {
> + [0] = {
> + .start = 0x4a002000,
> + .end = 0x4a0027ff,
> + .flags = IORESOURCE_MEM,
> + },
> +};
> +static struct platform_device control_device = {
> + .name = "omap-control-core",
> + .id = 0,
> + .resource = control_resources,
> + .num_resources = ARRAY_SIZE(control_resources),
> +};
> +
> +static struct platform_device *early_devices[] __initdata = {
> + &control_device,
> +};
> +
> +static int __init plat_early_device_setup(void)
> +{
> + early_platform_add_devices(early_devices,
> + ARRAY_SIZE(early_devices));
> + early_platform_driver_register_all("early_omap_control");
> + early_platform_driver_probe("early_omap_control", 1, false);
I checked out git://gitorious.org/omap-thermal/omap-thermal.git omap_scm_dev.
Looks like that calling devm_kzalloc() and platform_get_resource() from early_initcall is too early.
I get following backtrace (probably the backtrace is kernel config dependent):
...
[ 0.198455] [<c00193b4>] (unwind_backtrace+0x0/0xe0) from [<c02b2a10>] (do_raw_spin_lock+0x20/0x134)
[ 0.207977] [<c02b2a10>] (do_raw_spin_lock+0x20/0x134) from [<c05df068>] (_raw_spin_lock_irqsave+0x58/0x64)
[ 0.218109] [<c05df068>] (_raw_spin_lock_irqsave+0x58/0x64) from [<c02f03bc>] (devres_add+0x18/0x38)
[ 0.227600] [<c02f03bc>] (devres_add+0x18/0x38) from [<c02f07d0>] (devm_kzalloc+0x50/0x5c)
[ 0.236206] [<c02f07d0>] (devm_kzalloc+0x50/0x5c) from [<c05c73a4>] (omap_control_probe+0x20/0xe4)
[ 0.245544] [<c05c73a4>] (omap_control_probe+0x20/0xe4) from [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c)
[ 0.256378] [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c) from [<c0798030>] (plat_early_device_setup+0x2c/0x3c)
[ 0.267700] [<c0798030>] (plat_early_device_setup+0x2c/0x3c) from [<c078f8c4>] (do_one_initcall+0x90/0x164)
[ 0.277801] [<c078f8c4>] (do_one_initcall+0x90/0x164) from [<c078f9ec>] (kernel_init+0x54/0x1a4)
[ 0.286956] [<c078f9ec>] (kernel_init+0x54/0x1a4) from [<c0013818>] (kernel_thread_exit+0x0/0x8)
[ 0.296203] ------------[ cut here ]------------
[ 0.301086] WARNING: at include/linux/kref.h:41 kobject_get+0x24/0x48()
[ 0.308044] [<c00193b4>] (unwind_backtrace+0x0/0xe0) from [<c00394a4>] (warn_slowpath_common+0x48/0x60)
[ 0.317871] [<c00394a4>] (warn_slowpath_common+0x48/0x60) from [<c0039574>] (warn_slowpath_null+0x18/0x1c)
[ 0.327941] [<c0039574>] (warn_slowpath_null+0x18/0x1c) from [<c02a59b4>] (kobject_get+0x24/0x48)
[ 0.337219] [<c02a59b4>] (kobject_get+0x24/0x48) from [<c02eb588>] (get_device+0x14/0x1c)
[ 0.345764] [<c02eb588>] (get_device+0x14/0x1c) from [<c02eb66c>] (device_add+0xc4/0x594)
[ 0.354370] [<c02eb66c>] (device_add+0xc4/0x594) from [<c03eeab4>] (of_platform_device_create_pdata+0x5c/0x7c)
[ 0.364807] [<c03eeab4>] (of_platform_device_create_pdata+0x5c/0x7c) from [<c03eec94>] (of_platform_bus_create+0x1c0/0x258)
[ 0.376403] [<c03eec94>] (of_platform_bus_create+0x1c0/0x258) from [<c03eee4c>] (of_platform_populate+0x5c/0x88)
[ 0.387023] [<c03eee4c>] (of_platform_populate+0x5c/0x88) from [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c)
[ 0.398101] [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c) from [<c0798030>] (plat_early_device_setup+0x2c/0x3c)
[ 0.409423] [<c0798030>] (plat_early_device_setup+0x2c/0x3c) from [<c078f8c4>] (do_one_initcall+0x90/0x164)
[ 0.419586] [<c078f8c4>] (do_one_initcall+0x90/0x164) from [<c078f9ec>] (kernel_init+0x54/0x1a4)
[ 0.428771] [<c078f9ec>] (kernel_init+0x54/0x1a4) from [<c0013818>] (kernel_thread_exit+0x0/0x8)
[ 0.437957] ---[ end trace da227214a82491b7 ]--
...
BR,
Konstantin Baydarov.
> +
> + return 0;
> +}
> +early_initcall(plat_early_device_setup);
> +
> static int omap_init_control(void)
> {
> struct omap_hwmod *oh;
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 04/11] OMAP: Add early device for system control module
@ 2012-05-25 11:32 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-25 11:32 UTC (permalink / raw)
To: linux-arm-kernel
Hi , Eduardo.
On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
> This is a way to add an early device for system control module.
> the code is also requesting for driver registration and probing.
> Done at early_initcall because at that time, ioremapping is possible.
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/devices.c | 29 +++++++++++++++++++++++++++++
> 1 files changed, 29 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> index 9332673..58cc5c3 100644
> --- a/arch/arm/mach-omap2/devices.c
> +++ b/arch/arm/mach-omap2/devices.c
> @@ -40,6 +40,35 @@
> #define L3_MODULES_MAX_LEN 12
> #define L3_MODULES 3
>
> +static struct resource control_resources[] = {
> + [0] = {
> + .start = 0x4a002000,
> + .end = 0x4a0027ff,
> + .flags = IORESOURCE_MEM,
> + },
> +};
> +static struct platform_device control_device = {
> + .name = "omap-control-core",
> + .id = 0,
> + .resource = control_resources,
> + .num_resources = ARRAY_SIZE(control_resources),
> +};
> +
> +static struct platform_device *early_devices[] __initdata = {
> + &control_device,
> +};
> +
> +static int __init plat_early_device_setup(void)
> +{
> + early_platform_add_devices(early_devices,
> + ARRAY_SIZE(early_devices));
> + early_platform_driver_register_all("early_omap_control");
> + early_platform_driver_probe("early_omap_control", 1, false);
I checked out git://gitorious.org/omap-thermal/omap-thermal.git omap_scm_dev.
Looks like that calling devm_kzalloc() and platform_get_resource() from early_initcall is too early.
I get following backtrace (probably the backtrace is kernel config dependent):
...
[ 0.198455] [<c00193b4>] (unwind_backtrace+0x0/0xe0) from [<c02b2a10>] (do_raw_spin_lock+0x20/0x134)
[ 0.207977] [<c02b2a10>] (do_raw_spin_lock+0x20/0x134) from [<c05df068>] (_raw_spin_lock_irqsave+0x58/0x64)
[ 0.218109] [<c05df068>] (_raw_spin_lock_irqsave+0x58/0x64) from [<c02f03bc>] (devres_add+0x18/0x38)
[ 0.227600] [<c02f03bc>] (devres_add+0x18/0x38) from [<c02f07d0>] (devm_kzalloc+0x50/0x5c)
[ 0.236206] [<c02f07d0>] (devm_kzalloc+0x50/0x5c) from [<c05c73a4>] (omap_control_probe+0x20/0xe4)
[ 0.245544] [<c05c73a4>] (omap_control_probe+0x20/0xe4) from [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c)
[ 0.256378] [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c) from [<c0798030>] (plat_early_device_setup+0x2c/0x3c)
[ 0.267700] [<c0798030>] (plat_early_device_setup+0x2c/0x3c) from [<c078f8c4>] (do_one_initcall+0x90/0x164)
[ 0.277801] [<c078f8c4>] (do_one_initcall+0x90/0x164) from [<c078f9ec>] (kernel_init+0x54/0x1a4)
[ 0.286956] [<c078f9ec>] (kernel_init+0x54/0x1a4) from [<c0013818>] (kernel_thread_exit+0x0/0x8)
[ 0.296203] ------------[ cut here ]------------
[ 0.301086] WARNING: at include/linux/kref.h:41 kobject_get+0x24/0x48()
[ 0.308044] [<c00193b4>] (unwind_backtrace+0x0/0xe0) from [<c00394a4>] (warn_slowpath_common+0x48/0x60)
[ 0.317871] [<c00394a4>] (warn_slowpath_common+0x48/0x60) from [<c0039574>] (warn_slowpath_null+0x18/0x1c)
[ 0.327941] [<c0039574>] (warn_slowpath_null+0x18/0x1c) from [<c02a59b4>] (kobject_get+0x24/0x48)
[ 0.337219] [<c02a59b4>] (kobject_get+0x24/0x48) from [<c02eb588>] (get_device+0x14/0x1c)
[ 0.345764] [<c02eb588>] (get_device+0x14/0x1c) from [<c02eb66c>] (device_add+0xc4/0x594)
[ 0.354370] [<c02eb66c>] (device_add+0xc4/0x594) from [<c03eeab4>] (of_platform_device_create_pdata+0x5c/0x7c)
[ 0.364807] [<c03eeab4>] (of_platform_device_create_pdata+0x5c/0x7c) from [<c03eec94>] (of_platform_bus_create+0x1c0/0x258)
[ 0.376403] [<c03eec94>] (of_platform_bus_create+0x1c0/0x258) from [<c03eee4c>] (of_platform_populate+0x5c/0x88)
[ 0.387023] [<c03eee4c>] (of_platform_populate+0x5c/0x88) from [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c)
[ 0.398101] [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c) from [<c0798030>] (plat_early_device_setup+0x2c/0x3c)
[ 0.409423] [<c0798030>] (plat_early_device_setup+0x2c/0x3c) from [<c078f8c4>] (do_one_initcall+0x90/0x164)
[ 0.419586] [<c078f8c4>] (do_one_initcall+0x90/0x164) from [<c078f9ec>] (kernel_init+0x54/0x1a4)
[ 0.428771] [<c078f9ec>] (kernel_init+0x54/0x1a4) from [<c0013818>] (kernel_thread_exit+0x0/0x8)
[ 0.437957] ---[ end trace da227214a82491b7 ]--
...
BR,
Konstantin Baydarov.
> +
> + return 0;
> +}
> +early_initcall(plat_early_device_setup);
> +
> static int omap_init_control(void)
> {
> struct omap_hwmod *oh;
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 04/11] OMAP: Add early device for system control module
2012-05-25 11:32 ` Konstantin Baydarov
@ 2012-05-25 11:44 ` Valentin, Eduardo
-1 siblings, 0 replies; 198+ messages in thread
From: Valentin, Eduardo @ 2012-05-25 11:44 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: balbi, kishon, amit.kucheria, linux-pm, linux-omap, linux-arm-kernel
Hello,
On Fri, May 25, 2012 at 2:32 PM, Konstantin Baydarov
<kbaidarov@dev.rtsoft.ru> wrote:
> Hi , Eduardo.
>
> On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
>> This is a way to add an early device for system control module.
>> the code is also requesting for driver registration and probing.
>> Done at early_initcall because at that time, ioremapping is possible.
OK. Which debug config you have?
In any case, that can be solved by not requesting the resource and
passing the address area by other means.
>>
>> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
>> ---
>> arch/arm/mach-omap2/devices.c | 29 +++++++++++++++++++++++++++++
>> 1 files changed, 29 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
>> index 9332673..58cc5c3 100644
>> --- a/arch/arm/mach-omap2/devices.c
>> +++ b/arch/arm/mach-omap2/devices.c
>> @@ -40,6 +40,35 @@
>> #define L3_MODULES_MAX_LEN 12
>> #define L3_MODULES 3
>>
>> +static struct resource control_resources[] = {
>> + [0] = {
>> + .start = 0x4a002000,
>> + .end = 0x4a0027ff,
>> + .flags = IORESOURCE_MEM,
>> + },
>> +};
>> +static struct platform_device control_device = {
>> + .name = "omap-control-core",
>> + .id = 0,
>> + .resource = control_resources,
>> + .num_resources = ARRAY_SIZE(control_resources),
>> +};
>> +
>> +static struct platform_device *early_devices[] __initdata = {
>> + &control_device,
>> +};
>> +
>> +static int __init plat_early_device_setup(void)
>> +{
>> + early_platform_add_devices(early_devices,
>> + ARRAY_SIZE(early_devices));
>> + early_platform_driver_register_all("early_omap_control");
>> + early_platform_driver_probe("early_omap_control", 1, false);
> I checked out git://gitorious.org/omap-thermal/omap-thermal.git omap_scm_dev.
> Looks like that calling devm_kzalloc() and platform_get_resource() from early_initcall is too early.
> I get following backtrace (probably the backtrace is kernel config dependent):
> ...
> [ 0.198455] [<c00193b4>] (unwind_backtrace+0x0/0xe0) from [<c02b2a10>] (do_raw_spin_lock+0x20/0x134)
> [ 0.207977] [<c02b2a10>] (do_raw_spin_lock+0x20/0x134) from [<c05df068>] (_raw_spin_lock_irqsave+0x58/0x64)
> [ 0.218109] [<c05df068>] (_raw_spin_lock_irqsave+0x58/0x64) from [<c02f03bc>] (devres_add+0x18/0x38)
> [ 0.227600] [<c02f03bc>] (devres_add+0x18/0x38) from [<c02f07d0>] (devm_kzalloc+0x50/0x5c)
> [ 0.236206] [<c02f07d0>] (devm_kzalloc+0x50/0x5c) from [<c05c73a4>] (omap_control_probe+0x20/0xe4)
> [ 0.245544] [<c05c73a4>] (omap_control_probe+0x20/0xe4) from [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c)
> [ 0.256378] [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c) from [<c0798030>] (plat_early_device_setup+0x2c/0x3c)
> [ 0.267700] [<c0798030>] (plat_early_device_setup+0x2c/0x3c) from [<c078f8c4>] (do_one_initcall+0x90/0x164)
> [ 0.277801] [<c078f8c4>] (do_one_initcall+0x90/0x164) from [<c078f9ec>] (kernel_init+0x54/0x1a4)
> [ 0.286956] [<c078f9ec>] (kernel_init+0x54/0x1a4) from [<c0013818>] (kernel_thread_exit+0x0/0x8)
> [ 0.296203] ------------[ cut here ]------------
> [ 0.301086] WARNING: at include/linux/kref.h:41 kobject_get+0x24/0x48()
> [ 0.308044] [<c00193b4>] (unwind_backtrace+0x0/0xe0) from [<c00394a4>] (warn_slowpath_common+0x48/0x60)
> [ 0.317871] [<c00394a4>] (warn_slowpath_common+0x48/0x60) from [<c0039574>] (warn_slowpath_null+0x18/0x1c)
> [ 0.327941] [<c0039574>] (warn_slowpath_null+0x18/0x1c) from [<c02a59b4>] (kobject_get+0x24/0x48)
> [ 0.337219] [<c02a59b4>] (kobject_get+0x24/0x48) from [<c02eb588>] (get_device+0x14/0x1c)
> [ 0.345764] [<c02eb588>] (get_device+0x14/0x1c) from [<c02eb66c>] (device_add+0xc4/0x594)
> [ 0.354370] [<c02eb66c>] (device_add+0xc4/0x594) from [<c03eeab4>] (of_platform_device_create_pdata+0x5c/0x7c)
> [ 0.364807] [<c03eeab4>] (of_platform_device_create_pdata+0x5c/0x7c) from [<c03eec94>] (of_platform_bus_create+0x1c0/0x258)
> [ 0.376403] [<c03eec94>] (of_platform_bus_create+0x1c0/0x258) from [<c03eee4c>] (of_platform_populate+0x5c/0x88)
> [ 0.387023] [<c03eee4c>] (of_platform_populate+0x5c/0x88) from [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c)
> [ 0.398101] [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c) from [<c0798030>] (plat_early_device_setup+0x2c/0x3c)
> [ 0.409423] [<c0798030>] (plat_early_device_setup+0x2c/0x3c) from [<c078f8c4>] (do_one_initcall+0x90/0x164)
> [ 0.419586] [<c078f8c4>] (do_one_initcall+0x90/0x164) from [<c078f9ec>] (kernel_init+0x54/0x1a4)
> [ 0.428771] [<c078f9ec>] (kernel_init+0x54/0x1a4) from [<c0013818>] (kernel_thread_exit+0x0/0x8)
> [ 0.437957] ---[ end trace da227214a82491b7 ]--
> ...
>
> BR,
> Konstantin Baydarov.
>
>> +
>> + return 0;
>> +}
>> +early_initcall(plat_early_device_setup);
>> +
>> static int omap_init_control(void)
>> {
>> struct omap_hwmod *oh;
>
--
Eduardo Valentin
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 04/11] OMAP: Add early device for system control module
@ 2012-05-25 11:44 ` Valentin, Eduardo
0 siblings, 0 replies; 198+ messages in thread
From: Valentin, Eduardo @ 2012-05-25 11:44 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
On Fri, May 25, 2012 at 2:32 PM, Konstantin Baydarov
<kbaidarov@dev.rtsoft.ru> wrote:
> ?Hi , Eduardo.
>
> On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
>> This is a way to add an early device for system control module.
>> the code is also requesting for driver registration and probing.
>> Done at early_initcall because at that time, ioremapping is possible.
OK. Which debug config you have?
In any case, that can be solved by not requesting the resource and
passing the address area by other means.
>>
>> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
>> ---
>> ?arch/arm/mach-omap2/devices.c | ? 29 +++++++++++++++++++++++++++++
>> ?1 files changed, 29 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
>> index 9332673..58cc5c3 100644
>> --- a/arch/arm/mach-omap2/devices.c
>> +++ b/arch/arm/mach-omap2/devices.c
>> @@ -40,6 +40,35 @@
>> ?#define L3_MODULES_MAX_LEN 12
>> ?#define L3_MODULES 3
>>
>> +static struct resource control_resources[] = {
>> + ? ? [0] = {
>> + ? ? ? ? ? ? .start ?= 0x4a002000,
>> + ? ? ? ? ? ? .end ? ?= 0x4a0027ff,
>> + ? ? ? ? ? ? .flags ?= IORESOURCE_MEM,
>> + ? ? },
>> +};
>> +static struct platform_device control_device = {
>> + ? ? .name ? ? ? ? ? = "omap-control-core",
>> + ? ? .id ? ? ? ? ? ? = 0,
>> + ? ? .resource ? ? ? = control_resources,
>> + ? ? .num_resources ?= ARRAY_SIZE(control_resources),
>> +};
>> +
>> +static struct platform_device *early_devices[] __initdata = {
>> + ? ? &control_device,
>> +};
>> +
>> +static int __init plat_early_device_setup(void)
>> +{
>> + ? ? early_platform_add_devices(early_devices,
>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?ARRAY_SIZE(early_devices));
>> + ? ? early_platform_driver_register_all("early_omap_control");
>> + ? ? early_platform_driver_probe("early_omap_control", 1, false);
> I checked out git://gitorious.org/omap-thermal/omap-thermal.git omap_scm_dev.
> Looks like that calling devm_kzalloc() and platform_get_resource() from early_initcall is too early.
> I get following backtrace (probably the backtrace is kernel config dependent):
> ...
> [ ? ?0.198455] [<c00193b4>] (unwind_backtrace+0x0/0xe0) from [<c02b2a10>] (do_raw_spin_lock+0x20/0x134)
> [ ? ?0.207977] [<c02b2a10>] (do_raw_spin_lock+0x20/0x134) from [<c05df068>] (_raw_spin_lock_irqsave+0x58/0x64)
> [ ? ?0.218109] [<c05df068>] (_raw_spin_lock_irqsave+0x58/0x64) from [<c02f03bc>] (devres_add+0x18/0x38)
> [ ? ?0.227600] [<c02f03bc>] (devres_add+0x18/0x38) from [<c02f07d0>] (devm_kzalloc+0x50/0x5c)
> [ ? ?0.236206] [<c02f07d0>] (devm_kzalloc+0x50/0x5c) from [<c05c73a4>] (omap_control_probe+0x20/0xe4)
> [ ? ?0.245544] [<c05c73a4>] (omap_control_probe+0x20/0xe4) from [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c)
> [ ? ?0.256378] [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c) from [<c0798030>] (plat_early_device_setup+0x2c/0x3c)
> [ ? ?0.267700] [<c0798030>] (plat_early_device_setup+0x2c/0x3c) from [<c078f8c4>] (do_one_initcall+0x90/0x164)
> [ ? ?0.277801] [<c078f8c4>] (do_one_initcall+0x90/0x164) from [<c078f9ec>] (kernel_init+0x54/0x1a4)
> [ ? ?0.286956] [<c078f9ec>] (kernel_init+0x54/0x1a4) from [<c0013818>] (kernel_thread_exit+0x0/0x8)
> [ ? ?0.296203] ------------[ cut here ]------------
> [ ? ?0.301086] WARNING: at include/linux/kref.h:41 kobject_get+0x24/0x48()
> [ ? ?0.308044] [<c00193b4>] (unwind_backtrace+0x0/0xe0) from [<c00394a4>] (warn_slowpath_common+0x48/0x60)
> [ ? ?0.317871] [<c00394a4>] (warn_slowpath_common+0x48/0x60) from [<c0039574>] (warn_slowpath_null+0x18/0x1c)
> [ ? ?0.327941] [<c0039574>] (warn_slowpath_null+0x18/0x1c) from [<c02a59b4>] (kobject_get+0x24/0x48)
> [ ? ?0.337219] [<c02a59b4>] (kobject_get+0x24/0x48) from [<c02eb588>] (get_device+0x14/0x1c)
> [ ? ?0.345764] [<c02eb588>] (get_device+0x14/0x1c) from [<c02eb66c>] (device_add+0xc4/0x594)
> [ ? ?0.354370] [<c02eb66c>] (device_add+0xc4/0x594) from [<c03eeab4>] (of_platform_device_create_pdata+0x5c/0x7c)
> [ ? ?0.364807] [<c03eeab4>] (of_platform_device_create_pdata+0x5c/0x7c) from [<c03eec94>] (of_platform_bus_create+0x1c0/0x258)
> [ ? ?0.376403] [<c03eec94>] (of_platform_bus_create+0x1c0/0x258) from [<c03eee4c>] (of_platform_populate+0x5c/0x88)
> [ ? ?0.387023] [<c03eee4c>] (of_platform_populate+0x5c/0x88) from [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c)
> [ ? ?0.398101] [<c07b3178>] (early_platform_driver_probe+0x1ac/0x23c) from [<c0798030>] (plat_early_device_setup+0x2c/0x3c)
> [ ? ?0.409423] [<c0798030>] (plat_early_device_setup+0x2c/0x3c) from [<c078f8c4>] (do_one_initcall+0x90/0x164)
> [ ? ?0.419586] [<c078f8c4>] (do_one_initcall+0x90/0x164) from [<c078f9ec>] (kernel_init+0x54/0x1a4)
> [ ? ?0.428771] [<c078f9ec>] (kernel_init+0x54/0x1a4) from [<c0013818>] (kernel_thread_exit+0x0/0x8)
> [ ? ?0.437957] ---[ end trace da227214a82491b7 ]--
> ...
>
> ?BR,
> ? ?Konstantin Baydarov.
>
>> +
>> + ? ? return 0;
>> +}
>> +early_initcall(plat_early_device_setup);
>> +
>> ?static int omap_init_control(void)
>> ?{
>> ? ? ? struct omap_hwmod ? ? ? ? ? ? ? *oh;
>
--
Eduardo Valentin
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 04/11] OMAP: Add early device for system control module
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 11:54 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-25 11:54 UTC (permalink / raw)
To: Eduardo Valentin
Cc: b-cousson, kishon, santosh.shilimkar, tony, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Konstantin Baydarov
Hi.
On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
> This is a way to add an early device for system control module.
> the code is also requesting for driver registration and probing.
> Done at early_initcall because at that time, ioremapping is possible.
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/devices.c | 29 +++++++++++++++++++++++++++++
> 1 files changed, 29 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> index 9332673..58cc5c3 100644
> --- a/arch/arm/mach-omap2/devices.c
> +++ b/arch/arm/mach-omap2/devices.c
> @@ -40,6 +40,35 @@
> #define L3_MODULES_MAX_LEN 12
> #define L3_MODULES 3
>
> +static struct resource control_resources[] = {
> + [0] = {
> + .start = 0x4a002000,
> + .end = 0x4a0027ff,
> + .flags = IORESOURCE_MEM,
> + },
> +};
Init control module platform device resources from device tree instead of
hard-coding them.
Prevent control module driver registering itself second time after it has
already been registered by early_platform_driver_register_all().
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Index: omap-thermal/arch/arm/boot/dts/omap4.dtsi
===================================================================
--- omap-thermal.orig/arch/arm/boot/dts/omap4.dtsi
+++ omap-thermal/arch/arm/boot/dts/omap4.dtsi
@@ -275,7 +275,10 @@
ctrl_module_core: ctrl_module_core@4a002000 {
compatible = "ti,omap4-control";
+ #address-cells = <1>;
+ #size-cells = <1>;
ti,hwmods = "ctrl_module_core";
+ reg = <0x4a002000 0x1000>;
bandgap {
compatible = "ti,omap4460-bandgap";
interrupts = <0 126 4>; /* talert */
Index: omap-thermal/arch/arm/mach-omap2/devices.c
===================================================================
--- omap-thermal.orig/arch/arm/mach-omap2/devices.c
+++ omap-thermal/arch/arm/mach-omap2/devices.c
@@ -18,6 +18,7 @@
#include <linux/slab.h>
#include <linux/of.h>
#include <linux/platform_data/omap4-keypad.h>
+#include <linux/of_address.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
@@ -40,6 +41,7 @@
#define L3_MODULES_MAX_LEN 12
#define L3_MODULES 3
+#if 0
static struct resource control_resources[] = {
[0] = {
.start = 0x4a002000,
@@ -47,6 +49,17 @@ static struct resource control_resources
.flags = IORESOURCE_MEM,
},
};
+#endif
+
+static const struct of_device_id of_omap_control_match[] = {
+ { .compatible = "ti,omap3-control", },
+ { .compatible = "ti,omap4-control", },
+ { .compatible = "ti,omap5-control", },
+ { },
+};
+
+static struct resource control_resources[1];
+
static struct platform_device control_device = {
.name = "omap-control-core",
.id = 0,
@@ -58,8 +71,56 @@ static struct platform_device *early_dev
&control_device,
};
+int __init omap_control_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ struct resource res;
+
+ if (WARN_ON(!node))
+ return -ENODEV;
+
+ if (of_address_to_resource(node, 0, &res)) {
+ WARN(1, "unable to get intc registers\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+void __init of_omap_control_init(const struct of_device_id *matches)
+{
+ struct device_node *np;
+ struct property *pp = 0;
+ unsigned long phys_base = 0;
+ size_t mapsize = 0;
+
+ for_each_matching_node(np, matches) {
+
+ pp = of_find_property(np, "reg", NULL);
+ if(pp) {
+// printk("\t\t **** of_omap_control_init(): ioremap %x \n", be32_to_cpup(pp->value));
+// printk("\t\t **** of_omap_control_init(): 2 value %x \n", be32_to_cpup( (char*)pp->value + 4 ) );
+// printk("\t\t **** of_omap_control_init(): length %x \n", pp->length);
+
+ phys_base = (resource_size_t)be32_to_cpup(pp->value);
+ mapsize = (size_t)be32_to_cpup( (void*)((char*)pp->value + 4) );
+#if 0
+ omap_control_data.base = ioremap(phys_base, mapsize);
+ if(omap_control_data.base)
+ omap_control_module = &omap_control_data;
+#endif
+ control_resources[0].start = phys_base;
+ control_resources[0].end = phys_base + mapsize;
+ control_resources[0].flags = IORESOURCE_MEM;
+ printk("\t\t **** of_omap_control_init(): start addr %x \n", control_resources[0].start);
+ printk("\t\t **** of_omap_control_init(): end addr %x \n", control_resources[0].end);
+ }
+ }
+}
+
static int __init plat_early_device_setup(void)
{
+ of_omap_control_init(of_omap_control_match);
early_platform_add_devices(early_devices,
ARRAY_SIZE(early_devices));
early_platform_driver_register_all("early_omap_control");
Index: omap-thermal/drivers/mfd/omap-control-core.c
===================================================================
--- omap-thermal.orig/drivers/mfd/omap-control-core.c
+++ omap-thermal/drivers/mfd/omap-control-core.c
@@ -194,6 +194,10 @@ static struct platform_driver omap_contr
static int __init omap_control_init(void)
{
+ /* Check is early driver probe is done */
+ if (!omap_control_module)
+ return 0;
+
return platform_driver_register(&omap_control_driver);
}
postcore_initcall_sync(omap_control_init);
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 04/11] OMAP: Add early device for system control module
@ 2012-05-25 11:54 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-25 11:54 UTC (permalink / raw)
To: linux-arm-kernel
Hi.
On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
> This is a way to add an early device for system control module.
> the code is also requesting for driver registration and probing.
> Done at early_initcall because at that time, ioremapping is possible.
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/devices.c | 29 +++++++++++++++++++++++++++++
> 1 files changed, 29 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> index 9332673..58cc5c3 100644
> --- a/arch/arm/mach-omap2/devices.c
> +++ b/arch/arm/mach-omap2/devices.c
> @@ -40,6 +40,35 @@
> #define L3_MODULES_MAX_LEN 12
> #define L3_MODULES 3
>
> +static struct resource control_resources[] = {
> + [0] = {
> + .start = 0x4a002000,
> + .end = 0x4a0027ff,
> + .flags = IORESOURCE_MEM,
> + },
> +};
Init control module platform device resources from device tree instead of
hard-coding them.
Prevent control module driver registering itself second time after it has
already been registered by early_platform_driver_register_all().
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Index: omap-thermal/arch/arm/boot/dts/omap4.dtsi
===================================================================
--- omap-thermal.orig/arch/arm/boot/dts/omap4.dtsi
+++ omap-thermal/arch/arm/boot/dts/omap4.dtsi
@@ -275,7 +275,10 @@
ctrl_module_core: ctrl_module_core at 4a002000 {
compatible = "ti,omap4-control";
+ #address-cells = <1>;
+ #size-cells = <1>;
ti,hwmods = "ctrl_module_core";
+ reg = <0x4a002000 0x1000>;
bandgap {
compatible = "ti,omap4460-bandgap";
interrupts = <0 126 4>; /* talert */
Index: omap-thermal/arch/arm/mach-omap2/devices.c
===================================================================
--- omap-thermal.orig/arch/arm/mach-omap2/devices.c
+++ omap-thermal/arch/arm/mach-omap2/devices.c
@@ -18,6 +18,7 @@
#include <linux/slab.h>
#include <linux/of.h>
#include <linux/platform_data/omap4-keypad.h>
+#include <linux/of_address.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
@@ -40,6 +41,7 @@
#define L3_MODULES_MAX_LEN 12
#define L3_MODULES 3
+#if 0
static struct resource control_resources[] = {
[0] = {
.start = 0x4a002000,
@@ -47,6 +49,17 @@ static struct resource control_resources
.flags = IORESOURCE_MEM,
},
};
+#endif
+
+static const struct of_device_id of_omap_control_match[] = {
+ { .compatible = "ti,omap3-control", },
+ { .compatible = "ti,omap4-control", },
+ { .compatible = "ti,omap5-control", },
+ { },
+};
+
+static struct resource control_resources[1];
+
static struct platform_device control_device = {
.name = "omap-control-core",
.id = 0,
@@ -58,8 +71,56 @@ static struct platform_device *early_dev
&control_device,
};
+int __init omap_control_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ struct resource res;
+
+ if (WARN_ON(!node))
+ return -ENODEV;
+
+ if (of_address_to_resource(node, 0, &res)) {
+ WARN(1, "unable to get intc registers\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+void __init of_omap_control_init(const struct of_device_id *matches)
+{
+ struct device_node *np;
+ struct property *pp = 0;
+ unsigned long phys_base = 0;
+ size_t mapsize = 0;
+
+ for_each_matching_node(np, matches) {
+
+ pp = of_find_property(np, "reg", NULL);
+ if(pp) {
+// printk("\t\t **** of_omap_control_init(): ioremap %x \n", be32_to_cpup(pp->value));
+// printk("\t\t **** of_omap_control_init(): 2 value %x \n", be32_to_cpup( (char*)pp->value + 4 ) );
+// printk("\t\t **** of_omap_control_init(): length %x \n", pp->length);
+
+ phys_base = (resource_size_t)be32_to_cpup(pp->value);
+ mapsize = (size_t)be32_to_cpup( (void*)((char*)pp->value + 4) );
+#if 0
+ omap_control_data.base = ioremap(phys_base, mapsize);
+ if(omap_control_data.base)
+ omap_control_module = &omap_control_data;
+#endif
+ control_resources[0].start = phys_base;
+ control_resources[0].end = phys_base + mapsize;
+ control_resources[0].flags = IORESOURCE_MEM;
+ printk("\t\t **** of_omap_control_init(): start addr %x \n", control_resources[0].start);
+ printk("\t\t **** of_omap_control_init(): end addr %x \n", control_resources[0].end);
+ }
+ }
+}
+
static int __init plat_early_device_setup(void)
{
+ of_omap_control_init(of_omap_control_match);
early_platform_add_devices(early_devices,
ARRAY_SIZE(early_devices));
early_platform_driver_register_all("early_omap_control");
Index: omap-thermal/drivers/mfd/omap-control-core.c
===================================================================
--- omap-thermal.orig/drivers/mfd/omap-control-core.c
+++ omap-thermal/drivers/mfd/omap-control-core.c
@@ -194,6 +194,10 @@ static struct platform_driver omap_contr
static int __init omap_control_init(void)
{
+ /* Check is early driver probe is done */
+ if (!omap_control_module)
+ return 0;
+
return platform_driver_register(&omap_control_driver);
}
postcore_initcall_sync(omap_control_init);
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 00/11] OMAP System Control Module
2012-05-25 11:11 ` Valentin, Eduardo
@ 2012-05-25 12:21 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-25 12:21 UTC (permalink / raw)
To: Valentin, Eduardo
Cc: b-cousson, kishon, santosh.shilimkar, tony, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Konstantin Baydarov
Hi.
On 05/25/2012 03:11 PM, Valentin, Eduardo wrote:
> Konstantin,
>
> On Fri, May 25, 2012 at 1:50 PM, Konstantin Baydarov
> <kbaidarov@dev.rtsoft.ru> wrote:
>> Hi.
>>
>> On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
>>> Hello Paul and Tony,
>>>
>>> This is a series of patches adding a basic support for system control module,
>>> on OMAP4+ context. It is a working in progress, but I wanted to share already
>>> to get your feedback.
>>>
>>> I've modeled the driver as an MFD. You will see in this series:
>>> . A rework of the system control module header (patch from Santosh, picked from the list)
>>> . Device creation for control module core
>>> . Early device creation for control module core
>>> . The MFD core driver for system control module
>>> . The MFD child for usb-phy pin control
>>> . The MFD child for bandgap sensor
>>> . Very early exposure of OMAP4 thermal zone
>>> . All added drivers are only supporting DT probing
>>> . The series is based on linux-omap master, as it has the hwmod entries for SCM.
>>>
>>> The overall idea of this series is to put in place the infrastructure. It is
>>> not touching nor removing the existing APIs under mach-omap2/control.c for now.
>>> But the target is to have these APIs moved to the MFD core driver.
>>>
>>> For early access, like ID checking, I have written the platform driver
>>> as an early platform driver and you will see also early device addition
>>> and probing under device.c for this case. This is of course a proposal.
>>> I see that there are people that thing this is a bit of an overkill.
>>> Konstantin (CCd) was proposing a simpler solution by having
>>> APIs with early_* prefixes, and solve the IO address mapping with
>>> a DT entry, for instance. But feel free to propose better ways.
>> In my latest version I got rid from early API set, check out patch for V3 patch set.
>> I'll attach patch for current version later.
>
> Please send it across so we can compare your approach with the one
> present in this series.
Moved control module window remap to early_initcall to allow usage of
control module API very early during kernel initialization.
Switched omap_type() to omap-control-core.c API.
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Index: omap-thermal/drivers/mfd/omap-control-core.c
===================================================================
--- omap-thermal.orig/drivers/mfd/omap-control-core.c
+++ omap-thermal/drivers/mfd/omap-control-core.c
@@ -31,12 +31,16 @@
#include <linux/mfd/core.h>
#include <linux/mfd/omap_control.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+
static struct omap_control *omap_control_module;
+struct omap_control omap_control_data;
/**
* omap_control_readl: Read a single omap control module register.
*
- * @dev: device to read from.
+ * @dev: unused - there is only one controle module
* @reg: register to read.
* @val: output with register value.
*
@@ -44,7 +48,7 @@ static struct omap_control *omap_control
*/
int omap_control_readl(struct device *dev, u32 reg, u32 *val)
{
- struct omap_control *omap_control = dev_get_drvdata(dev);
+ struct omap_control *omap_control = omap_control_module;
if (!omap_control)
return -EINVAL;
@@ -58,7 +62,7 @@ EXPORT_SYMBOL_GPL(omap_control_readl);
/**
* omap_control_writel: Write a single omap control module register.
*
- * @dev: device to read from.
+ * @dev: unused - there is only one controle module
* @val: value to write.
* @reg: register to write to.
*
@@ -66,7 +70,7 @@ EXPORT_SYMBOL_GPL(omap_control_readl);
*/
int omap_control_writel(struct device *dev, u32 val, u32 reg)
{
- struct omap_control *omap_control = dev_get_drvdata(dev);
+ struct omap_control *omap_control = omap_control_module;
unsigned long flags;
if (!omap_control)
@@ -130,40 +134,26 @@ static const struct of_device_id of_omap
static int __devinit omap_control_probe(struct platform_device *pdev)
{
- struct resource *res;
- void __iomem *base;
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
struct omap_control *omap_control;
- omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
- if (!omap_control) {
- dev_err(dev, "not enough memory for omap_control\n");
- return -ENOMEM;
- }
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- dev_err(dev, "missing memory base resource\n");
- return -EINVAL;
- }
-
- base = devm_request_and_ioremap(dev, res);
- if (!base) {
+ if (!omap_control_module) {
dev_err(dev, "ioremap failed\n");
return -EADDRNOTAVAIL;
}
+ omap_control = omap_control_module;
- omap_control->base = base;
omap_control->dev = dev;
spin_lock_init(&omap_control->reg_lock);
platform_set_drvdata(pdev, omap_control);
- omap_control_module = omap_control;
return of_platform_populate(np, of_omap_control_match, NULL, dev);
}
+/* Looks like that there is no need to remove control module */
+#if 0
static int __devexit omap_control_remove(struct platform_device *pdev)
{
struct omap_control *omap_control = platform_get_drvdata(pdev);
@@ -181,10 +171,11 @@ static int __devexit omap_control_remove
return 0;
}
+#endif
static struct platform_driver omap_control_driver = {
.probe = omap_control_probe,
- .remove = __devexit_p(omap_control_remove),
+// .remove = __devexit_p(omap_control_remove),
.driver = {
.name = "omap-control-core",
.owner = THIS_MODULE,
@@ -192,6 +183,53 @@ static struct platform_driver omap_contr
},
};
+int __init omap_control_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ struct resource res;
+
+ if (WARN_ON(!node))
+ return -ENODEV;
+
+ if (of_address_to_resource(node, 0, &res)) {
+ WARN(1, "unable to get intc registers\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+void __init of_omap_control_init(const struct of_device_id *matches)
+{
+ struct device_node *np;
+ struct property *pp = 0;
+ unsigned long phys_base = 0;
+ size_t mapsize = 0;
+
+ for_each_matching_node(np, matches) {
+
+ pp = of_find_property(np, "reg", NULL);
+ if(pp) {
+ phys_base = (unsigned long)be32_to_cpup(pp->value);
+ mapsize = (size_t)be32_to_cpup( (void*)((char*)pp->value + 4) );
+ omap_control_data.base = ioremap(phys_base, mapsize);
+ if(omap_control_data.base)
+ omap_control_module = &omap_control_data;
+
+// printk("\t\t **** of_omap_control_init(): ioremap addr %x \n", omap_control_data.base);
+ }
+ }
+}
+
+static int __init
+omap_control_early_initcall(void)
+{
+ of_omap_control_init(of_omap_control_match);
+
+ return 0;
+}
+early_initcall(omap_control_early_initcall);
+
static int __init omap_control_init(void)
{
return platform_driver_register(&omap_control_driver);
Index: omap-thermal/arch/arm/boot/dts/omap4.dtsi
===================================================================
--- omap-thermal.orig/arch/arm/boot/dts/omap4.dtsi
+++ omap-thermal/arch/arm/boot/dts/omap4.dtsi
@@ -275,7 +275,10 @@
ctrl_module_core: ctrl_module_core@4a002000 {
compatible = "ti,omap4-control";
+ #address-cells = <1>;
+ #size-cells = <1>;
ti,hwmods = "ctrl_module_core";
+ reg = <0x4a002000 0x1000>;
bandgap {
compatible = "ti,omap4460-bandgap";
interrupts = <0 126 4>; /* talert */
Index: omap-thermal/arch/arm/mach-omap2/id.c
===================================================================
--- omap-thermal.orig/arch/arm/mach-omap2/id.c
+++ omap-thermal/arch/arm/mach-omap2/id.c
@@ -39,16 +39,12 @@ unsigned int omap_rev(void)
}
EXPORT_SYMBOL(omap_rev);
+int omap_control_readl(struct device *dev, u32 reg, u32 *val);
+
int omap_type(void)
{
- struct device *scm;
- int ret = 0;
u32 val = 0;
- scm = omap_control_get();
- if (IS_ERR_OR_NULL(scm))
- return 0;
-
if (cpu_is_omap24xx()) {
val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
} else if (cpu_is_am33xx()) {
@@ -56,23 +52,17 @@ int omap_type(void)
} else if (cpu_is_omap34xx()) {
val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
} else if (cpu_is_omap44xx()) {
- ret = omap_control_readl(scm, OMAP4_CTRL_MODULE_CORE_STATUS,
+ omap_control_readl(0x0, OMAP4_CTRL_MODULE_CORE_STATUS,
&val);
} else {
pr_err("Cannot detect omap type!\n");
goto out;
}
- if (ret) {
- pr_err("problem while fetching omap type\n");
- goto out;
- }
-
val &= OMAP2_DEVICETYPE_MASK;
val >>= 8;
out:
- omap_control_put(scm);
return val;
}
EXPORT_SYMBOL(omap_type);
Index: omap-thermal/arch/arm/mach-omap2/devices.c
===================================================================
--- omap-thermal.orig/arch/arm/mach-omap2/devices.c
+++ omap-thermal/arch/arm/mach-omap2/devices.c
@@ -40,6 +40,7 @@
#define L3_MODULES_MAX_LEN 12
#define L3_MODULES 3
+#if 0
static struct resource control_resources[] = {
[0] = {
.start = 0x4a002000,
@@ -68,6 +69,7 @@ static int __init plat_early_device_setu
return 0;
}
early_initcall(plat_early_device_setup);
+#endif
static int omap_init_control(void)
{
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 00/11] OMAP System Control Module
@ 2012-05-25 12:21 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-25 12:21 UTC (permalink / raw)
To: linux-arm-kernel
Hi.
On 05/25/2012 03:11 PM, Valentin, Eduardo wrote:
> Konstantin,
>
> On Fri, May 25, 2012 at 1:50 PM, Konstantin Baydarov
> <kbaidarov@dev.rtsoft.ru> wrote:
>> Hi.
>>
>> On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
>>> Hello Paul and Tony,
>>>
>>> This is a series of patches adding a basic support for system control module,
>>> on OMAP4+ context. It is a working in progress, but I wanted to share already
>>> to get your feedback.
>>>
>>> I've modeled the driver as an MFD. You will see in this series:
>>> . A rework of the system control module header (patch from Santosh, picked from the list)
>>> . Device creation for control module core
>>> . Early device creation for control module core
>>> . The MFD core driver for system control module
>>> . The MFD child for usb-phy pin control
>>> . The MFD child for bandgap sensor
>>> . Very early exposure of OMAP4 thermal zone
>>> . All added drivers are only supporting DT probing
>>> . The series is based on linux-omap master, as it has the hwmod entries for SCM.
>>>
>>> The overall idea of this series is to put in place the infrastructure. It is
>>> not touching nor removing the existing APIs under mach-omap2/control.c for now.
>>> But the target is to have these APIs moved to the MFD core driver.
>>>
>>> For early access, like ID checking, I have written the platform driver
>>> as an early platform driver and you will see also early device addition
>>> and probing under device.c for this case. This is of course a proposal.
>>> I see that there are people that thing this is a bit of an overkill.
>>> Konstantin (CCd) was proposing a simpler solution by having
>>> APIs with early_* prefixes, and solve the IO address mapping with
>>> a DT entry, for instance. But feel free to propose better ways.
>> In my latest version I got rid from early API set, check out patch for V3 patch set.
>> I'll attach patch for current version later.
>
> Please send it across so we can compare your approach with the one
> present in this series.
Moved control module window remap to early_initcall to allow usage of
control module API very early during kernel initialization.
Switched omap_type() to omap-control-core.c API.
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Index: omap-thermal/drivers/mfd/omap-control-core.c
===================================================================
--- omap-thermal.orig/drivers/mfd/omap-control-core.c
+++ omap-thermal/drivers/mfd/omap-control-core.c
@@ -31,12 +31,16 @@
#include <linux/mfd/core.h>
#include <linux/mfd/omap_control.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+
static struct omap_control *omap_control_module;
+struct omap_control omap_control_data;
/**
* omap_control_readl: Read a single omap control module register.
*
- * @dev: device to read from.
+ * @dev: unused - there is only one controle module
* @reg: register to read.
* @val: output with register value.
*
@@ -44,7 +48,7 @@ static struct omap_control *omap_control
*/
int omap_control_readl(struct device *dev, u32 reg, u32 *val)
{
- struct omap_control *omap_control = dev_get_drvdata(dev);
+ struct omap_control *omap_control = omap_control_module;
if (!omap_control)
return -EINVAL;
@@ -58,7 +62,7 @@ EXPORT_SYMBOL_GPL(omap_control_readl);
/**
* omap_control_writel: Write a single omap control module register.
*
- * @dev: device to read from.
+ * @dev: unused - there is only one controle module
* @val: value to write.
* @reg: register to write to.
*
@@ -66,7 +70,7 @@ EXPORT_SYMBOL_GPL(omap_control_readl);
*/
int omap_control_writel(struct device *dev, u32 val, u32 reg)
{
- struct omap_control *omap_control = dev_get_drvdata(dev);
+ struct omap_control *omap_control = omap_control_module;
unsigned long flags;
if (!omap_control)
@@ -130,40 +134,26 @@ static const struct of_device_id of_omap
static int __devinit omap_control_probe(struct platform_device *pdev)
{
- struct resource *res;
- void __iomem *base;
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
struct omap_control *omap_control;
- omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
- if (!omap_control) {
- dev_err(dev, "not enough memory for omap_control\n");
- return -ENOMEM;
- }
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- dev_err(dev, "missing memory base resource\n");
- return -EINVAL;
- }
-
- base = devm_request_and_ioremap(dev, res);
- if (!base) {
+ if (!omap_control_module) {
dev_err(dev, "ioremap failed\n");
return -EADDRNOTAVAIL;
}
+ omap_control = omap_control_module;
- omap_control->base = base;
omap_control->dev = dev;
spin_lock_init(&omap_control->reg_lock);
platform_set_drvdata(pdev, omap_control);
- omap_control_module = omap_control;
return of_platform_populate(np, of_omap_control_match, NULL, dev);
}
+/* Looks like that there is no need to remove control module */
+#if 0
static int __devexit omap_control_remove(struct platform_device *pdev)
{
struct omap_control *omap_control = platform_get_drvdata(pdev);
@@ -181,10 +171,11 @@ static int __devexit omap_control_remove
return 0;
}
+#endif
static struct platform_driver omap_control_driver = {
.probe = omap_control_probe,
- .remove = __devexit_p(omap_control_remove),
+// .remove = __devexit_p(omap_control_remove),
.driver = {
.name = "omap-control-core",
.owner = THIS_MODULE,
@@ -192,6 +183,53 @@ static struct platform_driver omap_contr
},
};
+int __init omap_control_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ struct resource res;
+
+ if (WARN_ON(!node))
+ return -ENODEV;
+
+ if (of_address_to_resource(node, 0, &res)) {
+ WARN(1, "unable to get intc registers\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+void __init of_omap_control_init(const struct of_device_id *matches)
+{
+ struct device_node *np;
+ struct property *pp = 0;
+ unsigned long phys_base = 0;
+ size_t mapsize = 0;
+
+ for_each_matching_node(np, matches) {
+
+ pp = of_find_property(np, "reg", NULL);
+ if(pp) {
+ phys_base = (unsigned long)be32_to_cpup(pp->value);
+ mapsize = (size_t)be32_to_cpup( (void*)((char*)pp->value + 4) );
+ omap_control_data.base = ioremap(phys_base, mapsize);
+ if(omap_control_data.base)
+ omap_control_module = &omap_control_data;
+
+// printk("\t\t **** of_omap_control_init(): ioremap addr %x \n", omap_control_data.base);
+ }
+ }
+}
+
+static int __init
+omap_control_early_initcall(void)
+{
+ of_omap_control_init(of_omap_control_match);
+
+ return 0;
+}
+early_initcall(omap_control_early_initcall);
+
static int __init omap_control_init(void)
{
return platform_driver_register(&omap_control_driver);
Index: omap-thermal/arch/arm/boot/dts/omap4.dtsi
===================================================================
--- omap-thermal.orig/arch/arm/boot/dts/omap4.dtsi
+++ omap-thermal/arch/arm/boot/dts/omap4.dtsi
@@ -275,7 +275,10 @@
ctrl_module_core: ctrl_module_core at 4a002000 {
compatible = "ti,omap4-control";
+ #address-cells = <1>;
+ #size-cells = <1>;
ti,hwmods = "ctrl_module_core";
+ reg = <0x4a002000 0x1000>;
bandgap {
compatible = "ti,omap4460-bandgap";
interrupts = <0 126 4>; /* talert */
Index: omap-thermal/arch/arm/mach-omap2/id.c
===================================================================
--- omap-thermal.orig/arch/arm/mach-omap2/id.c
+++ omap-thermal/arch/arm/mach-omap2/id.c
@@ -39,16 +39,12 @@ unsigned int omap_rev(void)
}
EXPORT_SYMBOL(omap_rev);
+int omap_control_readl(struct device *dev, u32 reg, u32 *val);
+
int omap_type(void)
{
- struct device *scm;
- int ret = 0;
u32 val = 0;
- scm = omap_control_get();
- if (IS_ERR_OR_NULL(scm))
- return 0;
-
if (cpu_is_omap24xx()) {
val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
} else if (cpu_is_am33xx()) {
@@ -56,23 +52,17 @@ int omap_type(void)
} else if (cpu_is_omap34xx()) {
val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
} else if (cpu_is_omap44xx()) {
- ret = omap_control_readl(scm, OMAP4_CTRL_MODULE_CORE_STATUS,
+ omap_control_readl(0x0, OMAP4_CTRL_MODULE_CORE_STATUS,
&val);
} else {
pr_err("Cannot detect omap type!\n");
goto out;
}
- if (ret) {
- pr_err("problem while fetching omap type\n");
- goto out;
- }
-
val &= OMAP2_DEVICETYPE_MASK;
val >>= 8;
out:
- omap_control_put(scm);
return val;
}
EXPORT_SYMBOL(omap_type);
Index: omap-thermal/arch/arm/mach-omap2/devices.c
===================================================================
--- omap-thermal.orig/arch/arm/mach-omap2/devices.c
+++ omap-thermal/arch/arm/mach-omap2/devices.c
@@ -40,6 +40,7 @@
#define L3_MODULES_MAX_LEN 12
#define L3_MODULES 3
+#if 0
static struct resource control_resources[] = {
[0] = {
.start = 0x4a002000,
@@ -68,6 +69,7 @@ static int __init plat_early_device_setu
return 0;
}
early_initcall(plat_early_device_setup);
+#endif
static int omap_init_control(void)
{
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 03/11] arm: omap: device: create a device for system control module
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 12:30 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-25 12:30 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, balbi, kishon, kbaidarov, linux-pm, linux-omap,
linux-arm-kernel
On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> From: Kishon Vijay Abraham I<kishon@ti.com>
>
> Extracts the device data from hwmod database and create a platform device
> using omap device build.
>
> The device build is done during postcore_initcall.
Do you still need that since you are supporting only DT?
The device will be built automatically in the DT case.
Regards,
Benoit
>
> Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/devices.c | 26 ++++++++++++++++++++++++++
> 1 files changed, 26 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> index 152c266..9332673 100644
> --- a/arch/arm/mach-omap2/devices.c
> +++ b/arch/arm/mach-omap2/devices.c
> @@ -40,6 +40,32 @@
> #define L3_MODULES_MAX_LEN 12
> #define L3_MODULES 3
>
> +static int omap_init_control(void)
> +{
> + struct omap_hwmod *oh;
> + struct platform_device *pdev;
> + const char *oh_name, *name;
> +
> + oh_name = "ctrl_module_core";
> + name = "omap-control-core";
> +
> + oh = omap_hwmod_lookup(oh_name);
> + if (!oh) {
> + pr_err("Could not lookup hwmod for %s\n", oh_name);
> + return PTR_ERR(oh);
> + }
> +
> + pdev = omap_device_build(name, -1, oh, NULL, 0, NULL, 0, true);
> + if (IS_ERR(pdev)) {
> + pr_err("Could not build omap_device for %s %s\n",
> + name, oh_name);
> + return PTR_ERR(pdev);
> + }
> +
> + return 0;
> +}
> +postcore_initcall(omap_init_control);
> +
> static int __init omap3_l3_init(void)
> {
> struct omap_hwmod *oh;
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 03/11] arm: omap: device: create a device for system control module
@ 2012-05-25 12:30 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-25 12:30 UTC (permalink / raw)
To: linux-arm-kernel
On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> From: Kishon Vijay Abraham I<kishon@ti.com>
>
> Extracts the device data from hwmod database and create a platform device
> using omap device build.
>
> The device build is done during postcore_initcall.
Do you still need that since you are supporting only DT?
The device will be built automatically in the DT case.
Regards,
Benoit
>
> Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/devices.c | 26 ++++++++++++++++++++++++++
> 1 files changed, 26 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> index 152c266..9332673 100644
> --- a/arch/arm/mach-omap2/devices.c
> +++ b/arch/arm/mach-omap2/devices.c
> @@ -40,6 +40,32 @@
> #define L3_MODULES_MAX_LEN 12
> #define L3_MODULES 3
>
> +static int omap_init_control(void)
> +{
> + struct omap_hwmod *oh;
> + struct platform_device *pdev;
> + const char *oh_name, *name;
> +
> + oh_name = "ctrl_module_core";
> + name = "omap-control-core";
> +
> + oh = omap_hwmod_lookup(oh_name);
> + if (!oh) {
> + pr_err("Could not lookup hwmod for %s\n", oh_name);
> + return PTR_ERR(oh);
> + }
> +
> + pdev = omap_device_build(name, -1, oh, NULL, 0, NULL, 0, true);
> + if (IS_ERR(pdev)) {
> + pr_err("Could not build omap_device for %s %s\n",
> + name, oh_name);
> + return PTR_ERR(pdev);
> + }
> +
> + return 0;
> +}
> +postcore_initcall(omap_init_control);
> +
> static int __init omap3_l3_init(void)
> {
> struct omap_hwmod *oh;
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 04/11] OMAP: Add early device for system control module
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 12:32 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-25 12:32 UTC (permalink / raw)
To: Eduardo Valentin
Cc: kishon, kbaidarov, santosh.shilimkar, tony, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap
On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> This is a way to add an early device for system control module.
> the code is also requesting for driver registration and probing.
> Done at early_initcall because at that time, ioremapping is possible.
>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/devices.c | 29 +++++++++++++++++++++++++++++
> 1 files changed, 29 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> index 9332673..58cc5c3 100644
> --- a/arch/arm/mach-omap2/devices.c
> +++ b/arch/arm/mach-omap2/devices.c
> @@ -40,6 +40,35 @@
> #define L3_MODULES_MAX_LEN 12
> #define L3_MODULES 3
>
> +static struct resource control_resources[] = {
> + [0] = {
> + .start = 0x4a002000,
> + .end = 0x4a0027ff,
> + .flags = IORESOURCE_MEM,
> + },
> +};
I guess you should be able to do use DT to build the early device as well.
It will avoid hard coding some physical address inside the devices.
Regards,
Benoit
> +static struct platform_device control_device = {
> + .name = "omap-control-core",
> + .id = 0,
> + .resource = control_resources,
> + .num_resources = ARRAY_SIZE(control_resources),
> +};
> +
> +static struct platform_device *early_devices[] __initdata = {
> + &control_device,
> +};
> +
> +static int __init plat_early_device_setup(void)
> +{
> + early_platform_add_devices(early_devices,
> + ARRAY_SIZE(early_devices));
> + early_platform_driver_register_all("early_omap_control");
> + early_platform_driver_probe("early_omap_control", 1, false);
> +
> + return 0;
> +}
> +early_initcall(plat_early_device_setup);
> +
> static int omap_init_control(void)
> {
> struct omap_hwmod *oh;
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 04/11] OMAP: Add early device for system control module
@ 2012-05-25 12:32 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-25 12:32 UTC (permalink / raw)
To: linux-arm-kernel
On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> This is a way to add an early device for system control module.
> the code is also requesting for driver registration and probing.
> Done at early_initcall because at that time, ioremapping is possible.
>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/devices.c | 29 +++++++++++++++++++++++++++++
> 1 files changed, 29 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> index 9332673..58cc5c3 100644
> --- a/arch/arm/mach-omap2/devices.c
> +++ b/arch/arm/mach-omap2/devices.c
> @@ -40,6 +40,35 @@
> #define L3_MODULES_MAX_LEN 12
> #define L3_MODULES 3
>
> +static struct resource control_resources[] = {
> + [0] = {
> + .start = 0x4a002000,
> + .end = 0x4a0027ff,
> + .flags = IORESOURCE_MEM,
> + },
> +};
I guess you should be able to do use DT to build the early device as well.
It will avoid hard coding some physical address inside the devices.
Regards,
Benoit
> +static struct platform_device control_device = {
> + .name = "omap-control-core",
> + .id = 0,
> + .resource = control_resources,
> + .num_resources = ARRAY_SIZE(control_resources),
> +};
> +
> +static struct platform_device *early_devices[] __initdata = {
> + &control_device,
> +};
> +
> +static int __init plat_early_device_setup(void)
> +{
> + early_platform_add_devices(early_devices,
> + ARRAY_SIZE(early_devices));
> + early_platform_driver_register_all("early_omap_control");
> + early_platform_driver_probe("early_omap_control", 1, false);
> +
> + return 0;
> +}
> +early_initcall(plat_early_device_setup);
> +
> static int omap_init_control(void)
> {
> struct omap_hwmod *oh;
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 12:52 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-25 12:52 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, balbi, kishon, kbaidarov, J Keerthy, linux-pm,
linux-omap, linux-arm-kernel
On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> This patch introduces a MFD core device driver for
> OMAP system control module.
>
> The control module allows software control of
> various static modes supported by the device. It is
> composed of two control submodules: general control
> module and device (padconfiguration) control
> module.
>
> In this patch, the children defined are for:
> . USB-phy pin control
> . Bangap temperature sensor
>
> Device driver is probed with postcore_initcall.
> However, as some of the APIs exposed by this driver
> may be needed in very early init phase, an early init
> class is also available: "early_omap_control".
>
> Signed-off-by: J Keerthy<j-keerthy@ti.com>
> Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> ---
> .../devicetree/bindings/mfd/omap_control.txt | 44 ++++
> arch/arm/mach-omap2/Kconfig | 1 +
> arch/arm/plat-omap/Kconfig | 3 +
> drivers/mfd/Kconfig | 9 +
> drivers/mfd/Makefile | 1 +
> drivers/mfd/omap-control-core.c | 211 ++++++++++++++++++++
> include/linux/mfd/omap_control.h | 69 +++++++
> 7 files changed, 338 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
> create mode 100644 drivers/mfd/omap-control-core.c
> create mode 100644 include/linux/mfd/omap_control.h
>
> diff --git a/Documentation/devicetree/bindings/mfd/omap_control.txt b/Documentation/devicetree/bindings/mfd/omap_control.txt
> new file mode 100644
> index 0000000..46d5e7e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/omap_control.txt
> @@ -0,0 +1,44 @@
> +* Texas Instrument OMAP System Control Module (SCM) bindings
> +
> +The control module allows software control of various static modes supported by
> +the device. The control module controls the settings of various device modules
> +through register configuration and internal signals. It also controls the pad
> +configuration, pin functional multiplexing, and the routing of internal signals
> +(such as PRCM signals or DMA requests) to output pins configured for hardware
> +observability.
> +
> +Required properties:
> +- compatible : Should be:
> + - "ti,omap3-control" for OMAP3 support
> + - "ti,omap4-control" for OMAP4 support
> + - "ti,omap5-control" for OMAP5 support
> +
> +OMAP specific properties:
> +- ti,hwmods: Name of the hwmod associated to the control module:
> + Should be "ctrl_module_core";
> +
> +Sub-nodes:
> +- bandgap : contains the bandgap node
> +
> + The bindings details of individual bandgap device can be found in:
> + Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> +
> +- usb : contains the usb phy pin control node
> +
> + The only required property for this child is:
> + - compatible = "ti,omap4-control-usb";
> +
> +Examples:
> +
> +ctrl_module_core: ctrl_module_core@4a002000 {
> + compatible = "ti,omap4-control";
> + ti,hwmods = "ctrl_module_core";
> + bandgap {
> + compatible = "ti,omap4460-bandgap";
> + interrupts =<0 126 4>; /* talert */
> + ti,tshut-gpio =<86>; /* tshut */
> + };
> + usb {
> + compatible = "ti,omap4-usb-phy";
> + };
> +};
> diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
> index a2b946d..7dfe5e1 100644
> --- a/arch/arm/mach-omap2/Kconfig
> +++ b/arch/arm/mach-omap2/Kconfig
> @@ -52,6 +52,7 @@ config ARCH_OMAP4
> select PL310_ERRATA_727915
> select ARM_ERRATA_720789
> select ARCH_HAS_OPP
> + select ARCH_HAS_CONTROL_MODULE
> select PM_OPP if PM
> select USB_ARCH_HAS_EHCI if USB_SUPPORT
> select ARM_CPU_SUSPEND if PM
> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> index ad95c7a..222dbad 100644
> --- a/arch/arm/plat-omap/Kconfig
> +++ b/arch/arm/plat-omap/Kconfig
> @@ -5,6 +5,9 @@ menu "TI OMAP Common Features"
> config ARCH_OMAP_OTG
> bool
>
> +config ARCH_HAS_CONTROL_MODULE
> + bool
> +
> choice
> prompt "OMAP System Type"
> default ARCH_OMAP2PLUS
> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> index 11e4438..25a66d8 100644
> --- a/drivers/mfd/Kconfig
> +++ b/drivers/mfd/Kconfig
> @@ -795,6 +795,15 @@ config MFD_WL1273_CORE
> driver connects the radio-wl1273 V4L2 module and the wl1273
> audio codec.
>
> +config MFD_OMAP_CONTROL
> + bool "Texas Instruments OMAP System control module"
> + depends on ARCH_HAS_CONTROL_MODULE
> + help
> + This is the core driver for system control module. This driver
> + is responsible for creating the control module mfd child,
> + like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
> + change for off mode.
> +
> config MFD_OMAP_USB_HOST
> bool "Support OMAP USBHS core driver"
> depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index 05fa538..00f99d6 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -106,6 +106,7 @@ obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
> obj-$(CONFIG_MFD_VX855) += vx855.o
> obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
> obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
> +obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
> obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
> obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
> obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
> diff --git a/drivers/mfd/omap-control-core.c b/drivers/mfd/omap-control-core.c
> new file mode 100644
> index 0000000..7d8d408
> --- /dev/null
> +++ b/drivers/mfd/omap-control-core.c
> @@ -0,0 +1,211 @@
> +/*
> + * OMAP system control module driver file
> + *
> + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> + * Contacts:
> + * Based on original code written by:
> + * J Keerthy<j-keerthy@ti.com>
> + * Moiz Sonasath<m-sonasath@ti.com>
> + * MFD clean up and re-factoring:
> + * Eduardo Valentin<eduardo.valentin@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + *
> + */
> +
> +#include<linux/module.h>
> +#include<linux/export.h>
> +#include<linux/platform_device.h>
> +#include<linux/slab.h>
> +#include<linux/io.h>
> +#include<linux/err.h>
> +#include<linux/of_platform.h>
> +#include<linux/of_address.h>
> +#include<linux/mfd/core.h>
> +#include<linux/mfd/omap_control.h>
> +
> +static struct omap_control *omap_control_module;
Mmm, we can have up to 4 control module instances in OMAP4.
Well, I'm not sure it worth considering them as separate devices. Is
that your plan as well?
But since they all have different base address, it will be trick to
handle them with only a single entry.
> +
> +/**
> + * omap_control_readl: Read a single omap control module register.
> + *
> + * @dev: device to read from.
> + * @reg: register to read.
> + * @val: output with register value.
> + *
> + * returns 0 on success or -EINVAL in case struct device is invalid.
> + */
> +int omap_control_readl(struct device *dev, u32 reg, u32 *val)
> +{
> + struct omap_control *omap_control = dev_get_drvdata(dev);
> +
> + if (!omap_control)
> + return -EINVAL;
> +
> + *val = readl(omap_control->base + reg);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(omap_control_readl);
> +
> +/**
> + * omap_control_writel: Write a single omap control module register.
> + *
> + * @dev: device to read from.
> + * @val: value to write.
> + * @reg: register to write to.
> + *
> + * returns 0 on success or -EINVAL in case struct device is invalid.
> + */
> +int omap_control_writel(struct device *dev, u32 val, u32 reg)
> +{
> + struct omap_control *omap_control = dev_get_drvdata(dev);
> + unsigned long flags;
> +
> + if (!omap_control)
> + return -EINVAL;
> +
> + spin_lock_irqsave(&omap_control->reg_lock, flags);
> + writel(val, omap_control->base + reg);
> + spin_unlock_irqrestore(&omap_control->reg_lock, flags);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(omap_control_writel);
> +
> +/**
> + * omap_control_get: returns the control module device pinter
typo
> + *
> + * The modules which has to use control module API's to read or write should
> + * call this API to get the control module device pointer.
> + */
> +struct device *omap_control_get(void)
> +{
> + unsigned long flags;
> +
> + if (!omap_control_module)
> + return ERR_PTR(-ENODEV);
> +
> + spin_lock_irqsave(&omap_control_module->reg_lock, flags);
> + omap_control_module->use_count++;
> + spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
Don't we do have some better way to increment atomically a variable in
Linux.
> +
> + return omap_control_module->dev;
> +}
> +EXPORT_SYMBOL_GPL(omap_control_get);
> +
> +/**
> + * omap_control_put: returns the control module device pinter
> + *
> + * The modules which has to use control module API's to read or write should
> + * call this API to get the control module device pointer.
> + */
> +void omap_control_put(struct device *dev)
> +{
> + struct omap_control *omap_control = dev_get_drvdata(dev);
> + unsigned long flags;
> +
> + if (!omap_control)
> + return;
> +
> + spin_lock_irqsave(&omap_control->reg_lock, flags);
> + omap_control->use_count--;
> + spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
> +}
> +EXPORT_SYMBOL_GPL(omap_control_put);
> +
> +static const struct of_device_id of_omap_control_match[] = {
> + { .compatible = "ti,omap3-control", },
> + { .compatible = "ti,omap4-control", },
> + { .compatible = "ti,omap5-control", },
> + { },
> +};
> +
> +static int __devinit omap_control_probe(struct platform_device *pdev)
> +{
> + struct resource *res;
> + void __iomem *base;
> + struct device *dev =&pdev->dev;
> + struct device_node *np = dev->of_node;
> + struct omap_control *omap_control;
Maybe omap_control_data instead? At least if this is drvdata only. If
this is supposed to be the *handle* to the control module instance, it
should be fine.
> +
> + omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
> + if (!omap_control) {
> + dev_err(dev, "not enough memory for omap_control\n");
> + return -ENOMEM;
> + }
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!res) {
> + dev_err(dev, "missing memory base resource\n");
> + return -EINVAL;
> + }
> +
> + base = devm_request_and_ioremap(dev, res);
> + if (!base) {
> + dev_err(dev, "ioremap failed\n");
> + return -EADDRNOTAVAIL;
> + }
> +
> + omap_control->base = base;
> + omap_control->dev = dev;
> + spin_lock_init(&omap_control->reg_lock);
> +
> + platform_set_drvdata(pdev, omap_control);
> + omap_control_module = omap_control;
> +
> + return of_platform_populate(np, of_omap_control_match, NULL, dev);
> +}
> +
> +static int __devexit omap_control_remove(struct platform_device *pdev)
> +{
> + struct omap_control *omap_control = platform_get_drvdata(pdev);
> +
> + spin_lock(&omap_control->reg_lock);
> + if (omap_control->use_count> 0) {
> + spin_unlock(&omap_control->reg_lock);
> + dev_err(&pdev->dev, "device removed while still being used\n");
> + return -EBUSY;
> + }
> + spin_unlock(&omap_control->reg_lock);
> +
> + iounmap(omap_control->base);
> + platform_set_drvdata(pdev, NULL);
> +
> + return 0;
> +}
> +
> +static struct platform_driver omap_control_driver = {
> + .probe = omap_control_probe,
> + .remove = __devexit_p(omap_control_remove),
> + .driver = {
> + .name = "omap-control-core",
> + .owner = THIS_MODULE,
> + .of_match_table = of_omap_control_match,
> + },
> +};
> +
> +static int __init omap_control_init(void)
> +{
> + return platform_driver_register(&omap_control_driver);
> +}
> +postcore_initcall_sync(omap_control_init);
> +
> +static void __exit omap_control_exit(void)
> +{
> + platform_driver_unregister(&omap_control_driver);
> +}
> +module_exit(omap_control_exit);
> +early_platform_init("early_omap_control",&omap_control_driver);
> +
> +MODULE_DESCRIPTION("OMAP system control module driver");
> +MODULE_LICENSE("GPL v2");
> +MODULE_ALIAS("platform:omap-control-core");
> +MODULE_AUTHOR("Texas Instruments Inc.");
> diff --git a/include/linux/mfd/omap_control.h b/include/linux/mfd/omap_control.h
> new file mode 100644
> index 0000000..7a33eda
> --- /dev/null
> +++ b/include/linux/mfd/omap_control.h
> @@ -0,0 +1,69 @@
> +/*
> + * OMAP system control module header file
> + *
> + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> + * Contact:
> + * J Keerthy<j-keerthy@ti.com>
> + * Moiz Sonasath<m-sonasath@ti.com>
> + * Abraham, Kishon Vijay<kishon@ti.com>
> + * Eduardo Valentin<eduardo.valentin@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + *
> + */
> +
> +#ifndef __DRIVERS_OMAP_CONTROL_H
> +#define __DRIVERS_OMAP_CONTROL_H
> +
> +#include<linux/err.h>
> +
> +/**
> + * struct system control module - scm device structure
> + * @dev: device pointer
> + * @base: Base of the temp I/O
> + * @reg_lock: protect omap_control structure
> + * @use_count: track API users
> + */
> +struct omap_control {
> + struct device *dev;
Do you really need the dev?
You API is device based and not omap_control based, so it should not be
needed.
I guess we should be consistent here. We can store the devices and used
a device based API or store the omap_control and thus expose a
omap_control API.
Regards,
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-05-25 12:52 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-25 12:52 UTC (permalink / raw)
To: linux-arm-kernel
On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> This patch introduces a MFD core device driver for
> OMAP system control module.
>
> The control module allows software control of
> various static modes supported by the device. It is
> composed of two control submodules: general control
> module and device (padconfiguration) control
> module.
>
> In this patch, the children defined are for:
> . USB-phy pin control
> . Bangap temperature sensor
>
> Device driver is probed with postcore_initcall.
> However, as some of the APIs exposed by this driver
> may be needed in very early init phase, an early init
> class is also available: "early_omap_control".
>
> Signed-off-by: J Keerthy<j-keerthy@ti.com>
> Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> ---
> .../devicetree/bindings/mfd/omap_control.txt | 44 ++++
> arch/arm/mach-omap2/Kconfig | 1 +
> arch/arm/plat-omap/Kconfig | 3 +
> drivers/mfd/Kconfig | 9 +
> drivers/mfd/Makefile | 1 +
> drivers/mfd/omap-control-core.c | 211 ++++++++++++++++++++
> include/linux/mfd/omap_control.h | 69 +++++++
> 7 files changed, 338 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
> create mode 100644 drivers/mfd/omap-control-core.c
> create mode 100644 include/linux/mfd/omap_control.h
>
> diff --git a/Documentation/devicetree/bindings/mfd/omap_control.txt b/Documentation/devicetree/bindings/mfd/omap_control.txt
> new file mode 100644
> index 0000000..46d5e7e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/omap_control.txt
> @@ -0,0 +1,44 @@
> +* Texas Instrument OMAP System Control Module (SCM) bindings
> +
> +The control module allows software control of various static modes supported by
> +the device. The control module controls the settings of various device modules
> +through register configuration and internal signals. It also controls the pad
> +configuration, pin functional multiplexing, and the routing of internal signals
> +(such as PRCM signals or DMA requests) to output pins configured for hardware
> +observability.
> +
> +Required properties:
> +- compatible : Should be:
> + - "ti,omap3-control" for OMAP3 support
> + - "ti,omap4-control" for OMAP4 support
> + - "ti,omap5-control" for OMAP5 support
> +
> +OMAP specific properties:
> +- ti,hwmods: Name of the hwmod associated to the control module:
> + Should be "ctrl_module_core";
> +
> +Sub-nodes:
> +- bandgap : contains the bandgap node
> +
> + The bindings details of individual bandgap device can be found in:
> + Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> +
> +- usb : contains the usb phy pin control node
> +
> + The only required property for this child is:
> + - compatible = "ti,omap4-control-usb";
> +
> +Examples:
> +
> +ctrl_module_core: ctrl_module_core at 4a002000 {
> + compatible = "ti,omap4-control";
> + ti,hwmods = "ctrl_module_core";
> + bandgap {
> + compatible = "ti,omap4460-bandgap";
> + interrupts =<0 126 4>; /* talert */
> + ti,tshut-gpio =<86>; /* tshut */
> + };
> + usb {
> + compatible = "ti,omap4-usb-phy";
> + };
> +};
> diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
> index a2b946d..7dfe5e1 100644
> --- a/arch/arm/mach-omap2/Kconfig
> +++ b/arch/arm/mach-omap2/Kconfig
> @@ -52,6 +52,7 @@ config ARCH_OMAP4
> select PL310_ERRATA_727915
> select ARM_ERRATA_720789
> select ARCH_HAS_OPP
> + select ARCH_HAS_CONTROL_MODULE
> select PM_OPP if PM
> select USB_ARCH_HAS_EHCI if USB_SUPPORT
> select ARM_CPU_SUSPEND if PM
> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> index ad95c7a..222dbad 100644
> --- a/arch/arm/plat-omap/Kconfig
> +++ b/arch/arm/plat-omap/Kconfig
> @@ -5,6 +5,9 @@ menu "TI OMAP Common Features"
> config ARCH_OMAP_OTG
> bool
>
> +config ARCH_HAS_CONTROL_MODULE
> + bool
> +
> choice
> prompt "OMAP System Type"
> default ARCH_OMAP2PLUS
> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> index 11e4438..25a66d8 100644
> --- a/drivers/mfd/Kconfig
> +++ b/drivers/mfd/Kconfig
> @@ -795,6 +795,15 @@ config MFD_WL1273_CORE
> driver connects the radio-wl1273 V4L2 module and the wl1273
> audio codec.
>
> +config MFD_OMAP_CONTROL
> + bool "Texas Instruments OMAP System control module"
> + depends on ARCH_HAS_CONTROL_MODULE
> + help
> + This is the core driver for system control module. This driver
> + is responsible for creating the control module mfd child,
> + like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
> + change for off mode.
> +
> config MFD_OMAP_USB_HOST
> bool "Support OMAP USBHS core driver"
> depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index 05fa538..00f99d6 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -106,6 +106,7 @@ obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
> obj-$(CONFIG_MFD_VX855) += vx855.o
> obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
> obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
> +obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
> obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
> obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
> obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
> diff --git a/drivers/mfd/omap-control-core.c b/drivers/mfd/omap-control-core.c
> new file mode 100644
> index 0000000..7d8d408
> --- /dev/null
> +++ b/drivers/mfd/omap-control-core.c
> @@ -0,0 +1,211 @@
> +/*
> + * OMAP system control module driver file
> + *
> + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> + * Contacts:
> + * Based on original code written by:
> + * J Keerthy<j-keerthy@ti.com>
> + * Moiz Sonasath<m-sonasath@ti.com>
> + * MFD clean up and re-factoring:
> + * Eduardo Valentin<eduardo.valentin@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + *
> + */
> +
> +#include<linux/module.h>
> +#include<linux/export.h>
> +#include<linux/platform_device.h>
> +#include<linux/slab.h>
> +#include<linux/io.h>
> +#include<linux/err.h>
> +#include<linux/of_platform.h>
> +#include<linux/of_address.h>
> +#include<linux/mfd/core.h>
> +#include<linux/mfd/omap_control.h>
> +
> +static struct omap_control *omap_control_module;
Mmm, we can have up to 4 control module instances in OMAP4.
Well, I'm not sure it worth considering them as separate devices. Is
that your plan as well?
But since they all have different base address, it will be trick to
handle them with only a single entry.
> +
> +/**
> + * omap_control_readl: Read a single omap control module register.
> + *
> + * @dev: device to read from.
> + * @reg: register to read.
> + * @val: output with register value.
> + *
> + * returns 0 on success or -EINVAL in case struct device is invalid.
> + */
> +int omap_control_readl(struct device *dev, u32 reg, u32 *val)
> +{
> + struct omap_control *omap_control = dev_get_drvdata(dev);
> +
> + if (!omap_control)
> + return -EINVAL;
> +
> + *val = readl(omap_control->base + reg);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(omap_control_readl);
> +
> +/**
> + * omap_control_writel: Write a single omap control module register.
> + *
> + * @dev: device to read from.
> + * @val: value to write.
> + * @reg: register to write to.
> + *
> + * returns 0 on success or -EINVAL in case struct device is invalid.
> + */
> +int omap_control_writel(struct device *dev, u32 val, u32 reg)
> +{
> + struct omap_control *omap_control = dev_get_drvdata(dev);
> + unsigned long flags;
> +
> + if (!omap_control)
> + return -EINVAL;
> +
> + spin_lock_irqsave(&omap_control->reg_lock, flags);
> + writel(val, omap_control->base + reg);
> + spin_unlock_irqrestore(&omap_control->reg_lock, flags);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(omap_control_writel);
> +
> +/**
> + * omap_control_get: returns the control module device pinter
typo
> + *
> + * The modules which has to use control module API's to read or write should
> + * call this API to get the control module device pointer.
> + */
> +struct device *omap_control_get(void)
> +{
> + unsigned long flags;
> +
> + if (!omap_control_module)
> + return ERR_PTR(-ENODEV);
> +
> + spin_lock_irqsave(&omap_control_module->reg_lock, flags);
> + omap_control_module->use_count++;
> + spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
Don't we do have some better way to increment atomically a variable in
Linux.
> +
> + return omap_control_module->dev;
> +}
> +EXPORT_SYMBOL_GPL(omap_control_get);
> +
> +/**
> + * omap_control_put: returns the control module device pinter
> + *
> + * The modules which has to use control module API's to read or write should
> + * call this API to get the control module device pointer.
> + */
> +void omap_control_put(struct device *dev)
> +{
> + struct omap_control *omap_control = dev_get_drvdata(dev);
> + unsigned long flags;
> +
> + if (!omap_control)
> + return;
> +
> + spin_lock_irqsave(&omap_control->reg_lock, flags);
> + omap_control->use_count--;
> + spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
> +}
> +EXPORT_SYMBOL_GPL(omap_control_put);
> +
> +static const struct of_device_id of_omap_control_match[] = {
> + { .compatible = "ti,omap3-control", },
> + { .compatible = "ti,omap4-control", },
> + { .compatible = "ti,omap5-control", },
> + { },
> +};
> +
> +static int __devinit omap_control_probe(struct platform_device *pdev)
> +{
> + struct resource *res;
> + void __iomem *base;
> + struct device *dev =&pdev->dev;
> + struct device_node *np = dev->of_node;
> + struct omap_control *omap_control;
Maybe omap_control_data instead? At least if this is drvdata only. If
this is supposed to be the *handle* to the control module instance, it
should be fine.
> +
> + omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
> + if (!omap_control) {
> + dev_err(dev, "not enough memory for omap_control\n");
> + return -ENOMEM;
> + }
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!res) {
> + dev_err(dev, "missing memory base resource\n");
> + return -EINVAL;
> + }
> +
> + base = devm_request_and_ioremap(dev, res);
> + if (!base) {
> + dev_err(dev, "ioremap failed\n");
> + return -EADDRNOTAVAIL;
> + }
> +
> + omap_control->base = base;
> + omap_control->dev = dev;
> + spin_lock_init(&omap_control->reg_lock);
> +
> + platform_set_drvdata(pdev, omap_control);
> + omap_control_module = omap_control;
> +
> + return of_platform_populate(np, of_omap_control_match, NULL, dev);
> +}
> +
> +static int __devexit omap_control_remove(struct platform_device *pdev)
> +{
> + struct omap_control *omap_control = platform_get_drvdata(pdev);
> +
> + spin_lock(&omap_control->reg_lock);
> + if (omap_control->use_count> 0) {
> + spin_unlock(&omap_control->reg_lock);
> + dev_err(&pdev->dev, "device removed while still being used\n");
> + return -EBUSY;
> + }
> + spin_unlock(&omap_control->reg_lock);
> +
> + iounmap(omap_control->base);
> + platform_set_drvdata(pdev, NULL);
> +
> + return 0;
> +}
> +
> +static struct platform_driver omap_control_driver = {
> + .probe = omap_control_probe,
> + .remove = __devexit_p(omap_control_remove),
> + .driver = {
> + .name = "omap-control-core",
> + .owner = THIS_MODULE,
> + .of_match_table = of_omap_control_match,
> + },
> +};
> +
> +static int __init omap_control_init(void)
> +{
> + return platform_driver_register(&omap_control_driver);
> +}
> +postcore_initcall_sync(omap_control_init);
> +
> +static void __exit omap_control_exit(void)
> +{
> + platform_driver_unregister(&omap_control_driver);
> +}
> +module_exit(omap_control_exit);
> +early_platform_init("early_omap_control",&omap_control_driver);
> +
> +MODULE_DESCRIPTION("OMAP system control module driver");
> +MODULE_LICENSE("GPL v2");
> +MODULE_ALIAS("platform:omap-control-core");
> +MODULE_AUTHOR("Texas Instruments Inc.");
> diff --git a/include/linux/mfd/omap_control.h b/include/linux/mfd/omap_control.h
> new file mode 100644
> index 0000000..7a33eda
> --- /dev/null
> +++ b/include/linux/mfd/omap_control.h
> @@ -0,0 +1,69 @@
> +/*
> + * OMAP system control module header file
> + *
> + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> + * Contact:
> + * J Keerthy<j-keerthy@ti.com>
> + * Moiz Sonasath<m-sonasath@ti.com>
> + * Abraham, Kishon Vijay<kishon@ti.com>
> + * Eduardo Valentin<eduardo.valentin@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + *
> + */
> +
> +#ifndef __DRIVERS_OMAP_CONTROL_H
> +#define __DRIVERS_OMAP_CONTROL_H
> +
> +#include<linux/err.h>
> +
> +/**
> + * struct system control module - scm device structure
> + * @dev: device pointer
> + * @base: Base of the temp I/O
> + * @reg_lock: protect omap_control structure
> + * @use_count: track API users
> + */
> +struct omap_control {
> + struct device *dev;
Do you really need the dev?
You API is device based and not omap_control based, so it should not be
needed.
I guess we should be consistent here. We can store the devices and used
a device based API or store the omap_control and thus expose a
omap_control API.
Regards,
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 06/11] OMAP2+: use control module mfd driver in omap_type
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 12:53 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-25 12:53 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, balbi, kishon, kbaidarov, linux-pm, linux-omap,
linux-arm-kernel
Hi Eduardo,
On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> OMAP system control module can be probed early, then
> omap_type is safe to use its APIs.
>
> TODO: add support for other omap versions
>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/id.c | 16 +++++++++++++++-
> 1 files changed, 15 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
> index 5bb9746..acfd698 100644
> --- a/arch/arm/mach-omap2/id.c
> +++ b/arch/arm/mach-omap2/id.c
> @@ -18,6 +18,7 @@
> #include<linux/kernel.h>
> #include<linux/init.h>
> #include<linux/io.h>
> +#include<linux/mfd/omap_control.h>
>
> #include<asm/cputype.h>
>
> @@ -40,8 +41,14 @@ EXPORT_SYMBOL(omap_rev);
>
> int omap_type(void)
> {
> + struct device *scm;
> + int ret = 0;
> u32 val = 0;
>
> + scm = omap_control_get();
> + if (IS_ERR_OR_NULL(scm))
> + return 0;
> +
> if (cpu_is_omap24xx()) {
OK, not really related to that patch, but the previous cpu_is_omap24xx
makes me think of that :-)
What about the omap<X>_check_revision used by cpu_is_XXX?
This call is the very first one to require the control module access in
order to get the ID_CODE inside the control module.
So far it still use that ugly hard coded phys -> virtual address macro
that is sued for that.
> val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
> } else if (cpu_is_am33xx()) {
> @@ -49,16 +56,23 @@ int omap_type(void)
> } else if (cpu_is_omap34xx()) {
> val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
> } else if (cpu_is_omap44xx()) {
> - val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
> + ret = omap_control_readl(scm, OMAP4_CTRL_MODULE_CORE_STATUS,
> + &val);
I guess you should get rid of these cpu_is_omap44xx and store the
omap_type somewhere to avoid further access to the control module since
there are a couple of places that use that API.
Not necessarily in this patch for sure, but something that might be done
in this series.
Regards,
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 06/11] OMAP2+: use control module mfd driver in omap_type
@ 2012-05-25 12:53 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-25 12:53 UTC (permalink / raw)
To: linux-arm-kernel
Hi Eduardo,
On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> OMAP system control module can be probed early, then
> omap_type is safe to use its APIs.
>
> TODO: add support for other omap versions
>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/id.c | 16 +++++++++++++++-
> 1 files changed, 15 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
> index 5bb9746..acfd698 100644
> --- a/arch/arm/mach-omap2/id.c
> +++ b/arch/arm/mach-omap2/id.c
> @@ -18,6 +18,7 @@
> #include<linux/kernel.h>
> #include<linux/init.h>
> #include<linux/io.h>
> +#include<linux/mfd/omap_control.h>
>
> #include<asm/cputype.h>
>
> @@ -40,8 +41,14 @@ EXPORT_SYMBOL(omap_rev);
>
> int omap_type(void)
> {
> + struct device *scm;
> + int ret = 0;
> u32 val = 0;
>
> + scm = omap_control_get();
> + if (IS_ERR_OR_NULL(scm))
> + return 0;
> +
> if (cpu_is_omap24xx()) {
OK, not really related to that patch, but the previous cpu_is_omap24xx
makes me think of that :-)
What about the omap<X>_check_revision used by cpu_is_XXX?
This call is the very first one to require the control module access in
order to get the ID_CODE inside the control module.
So far it still use that ugly hard coded phys -> virtual address macro
that is sued for that.
> val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
> } else if (cpu_is_am33xx()) {
> @@ -49,16 +56,23 @@ int omap_type(void)
> } else if (cpu_is_omap34xx()) {
> val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
> } else if (cpu_is_omap44xx()) {
> - val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
> + ret = omap_control_readl(scm, OMAP4_CTRL_MODULE_CORE_STATUS,
> + &val);
I guess you should get rid of these cpu_is_omap44xx and store the
omap_type somewhere to avoid further access to the control module since
there are a couple of places that use that API.
Not necessarily in this patch for sure, but something that might be done
in this series.
Regards,
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 13:35 ` Shubhrajyoti Datta
-1 siblings, 0 replies; 198+ messages in thread
From: Shubhrajyoti Datta @ 2012-05-25 13:35 UTC (permalink / raw)
To: Eduardo Valentin
Cc: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul,
balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap
Hi Edurardo,
A few doubts,
On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> Created a new platform driver for the platform device created by the
> control module mfd core, wrt usb. This driver has API's to power on/off
> the phy and the API's to write to musb mailbox.
>
> (p.s. the mailbox for musb in omap4 is present in system control
> module)
>
> [kishon@ti.com: wrote the original API's related to USB functions]
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> drivers/usb/otg/Kconfig | 13 ++++
> drivers/usb/otg/Makefile | 1 +
> drivers/usb/otg/omap4-usb-phy.c | 130 +++++++++++++++++++++++++++++++++++++
> include/linux/usb/omap4_usb_phy.h | 53 +++++++++++++++
> 4 files changed, 197 insertions(+), 0 deletions(-)
> create mode 100644 drivers/usb/otg/omap4-usb-phy.c
> create mode 100644 include/linux/usb/omap4_usb_phy.h
>
> diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
> index 5c87db0..e2840f1 100644
> --- a/drivers/usb/otg/Kconfig
> +++ b/drivers/usb/otg/Kconfig
> @@ -78,6 +78,19 @@ config TWL6030_USB
> are hooked to this driver through platform_data structure.
> The definition of internal PHY APIs are in the mach-omap2 layer.
>
> +config OMAP4_USB_PHY
> + tristate "Texas Instruments OMAP4+ USB pin control driver"
> + depends on MFD_OMAP_CONTROL
> + help
> + If you say yes here you get support for the Texas Instruments
> + OMAP4+ USB pin control driver. The register set is part of system
> + control module.
> +
> + USB phy in OMAP configures control module register for powering on
> + the phy, configuring VBUSVALID, AVALID, IDDIG and SESSEND. For
> + performing the above mentioned configuration, API's are added in
> + by this children of the control module driver.
> +
> config NOP_USB_XCEIV
> tristate "NOP USB Transceiver Driver"
> select USB_OTG_UTILS
> diff --git a/drivers/usb/otg/Makefile b/drivers/usb/otg/Makefile
> index 41aa509..60c8c83 100644
> --- a/drivers/usb/otg/Makefile
> +++ b/drivers/usb/otg/Makefile
> @@ -13,6 +13,7 @@ obj-$(CONFIG_USB_GPIO_VBUS) += gpio_vbus.o
> obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o
> obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o
> obj-$(CONFIG_TWL6030_USB) += twl6030-usb.o
> +obj-$(CONFIG_OMAP4_USB_PHY) += omap4-usb-phy.o
> obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o
> obj-$(CONFIG_USB_ULPI) += ulpi.o
> obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi_viewport.o
> diff --git a/drivers/usb/otg/omap4-usb-phy.c b/drivers/usb/otg/omap4-usb-phy.c
> new file mode 100644
> index 0000000..a29ea45
> --- /dev/null
> +++ b/drivers/usb/otg/omap4-usb-phy.c
> @@ -0,0 +1,130 @@
> +/*
> + * OMAP4 system control module driver, USB control children
> + *
> + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
> + *
> + * Contact:
> + * Kishon Vijay Abraham I <kishon@ti.com>
> + * Eduardo Valentin <eduardo.valentin@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
> + * 02110-1301 USA
> + *
> + */
> +
> +#include <linux/module.h>
> +#include <linux/init.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/platform_device.h>
> +#include <linux/mfd/omap_control.h>
> +#include <linux/usb/omap4_usb_phy.h>
> +
> +/**
> + * omap4_usb_phy_power - power on/off the phy using control module reg
> + * @dev: struct device *
> + * @on: 0 or 1, based on powering on or off the PHY
Could it be bool ?
> + *
> + * omap_usb2 can call this API to power on or off the PHY.
> + */
> +int omap4_usb_phy_power(struct device *dev, int on)
> +{
> + u32 val;
> + int ret;
> +
> + if (on) {
> + ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
> + if (!ret && (val & PHY_PD)) {
> + ret = omap_control_writel(dev, ~PHY_PD,
> + CONTROL_DEV_CONF);
> + /* XXX: add proper documentation for this delay */
> + mdelay(200);
Also does it have to be a busy one?
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^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
@ 2012-05-25 13:35 ` Shubhrajyoti Datta
0 siblings, 0 replies; 198+ messages in thread
From: Shubhrajyoti Datta @ 2012-05-25 13:35 UTC (permalink / raw)
To: linux-arm-kernel
Hi Edurardo,
A few doubts,
On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> Created a new platform driver for the platform device created by the
> control module mfd core, wrt usb. This driver has API's to power on/off
> the phy and the API's to write to musb mailbox.
>
> (p.s. the mailbox for musb in omap4 is present in system control
> module)
>
> [kishon at ti.com: wrote the original API's related to USB functions]
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> ?drivers/usb/otg/Kconfig ? ? ? ? ? | ? 13 ++++
> ?drivers/usb/otg/Makefile ? ? ? ? ?| ? ?1 +
> ?drivers/usb/otg/omap4-usb-phy.c ? | ?130 +++++++++++++++++++++++++++++++++++++
> ?include/linux/usb/omap4_usb_phy.h | ? 53 +++++++++++++++
> ?4 files changed, 197 insertions(+), 0 deletions(-)
> ?create mode 100644 drivers/usb/otg/omap4-usb-phy.c
> ?create mode 100644 include/linux/usb/omap4_usb_phy.h
>
> diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
> index 5c87db0..e2840f1 100644
> --- a/drivers/usb/otg/Kconfig
> +++ b/drivers/usb/otg/Kconfig
> @@ -78,6 +78,19 @@ config TWL6030_USB
> ? ? ? ? ?are hooked to this driver through platform_data structure.
> ? ? ? ? ?The definition of internal PHY APIs are in the mach-omap2 layer.
>
> +config OMAP4_USB_PHY
> + ? ? ? tristate "Texas Instruments OMAP4+ USB pin control driver"
> + ? ? ? depends on MFD_OMAP_CONTROL
> + ? ? ? help
> + ? ? ? ? If you say yes here you get support for the Texas Instruments
> + ? ? ? ? OMAP4+ USB pin control driver. The register set is part of system
> + ? ? ? ? control module.
> +
> + ? ? ? ? USB phy in OMAP configures control module register for powering on
> + ? ? ? ? the phy, configuring VBUSVALID, AVALID, IDDIG and SESSEND. For
> + ? ? ? ? performing the above mentioned configuration, API's are added in
> + ? ? ? ? by this children of the control module driver.
> +
> ?config NOP_USB_XCEIV
> ? ? ? ?tristate "NOP USB Transceiver Driver"
> ? ? ? ?select USB_OTG_UTILS
> diff --git a/drivers/usb/otg/Makefile b/drivers/usb/otg/Makefile
> index 41aa509..60c8c83 100644
> --- a/drivers/usb/otg/Makefile
> +++ b/drivers/usb/otg/Makefile
> @@ -13,6 +13,7 @@ obj-$(CONFIG_USB_GPIO_VBUS) ? += gpio_vbus.o
> ?obj-$(CONFIG_ISP1301_OMAP) ? ? += isp1301_omap.o
> ?obj-$(CONFIG_TWL4030_USB) ? ? ?+= twl4030-usb.o
> ?obj-$(CONFIG_TWL6030_USB) ? ? ?+= twl6030-usb.o
> +obj-$(CONFIG_OMAP4_USB_PHY) ? ?+= omap4-usb-phy.o
> ?obj-$(CONFIG_NOP_USB_XCEIV) ? ?+= nop-usb-xceiv.o
> ?obj-$(CONFIG_USB_ULPI) ? ? ? ? += ulpi.o
> ?obj-$(CONFIG_USB_ULPI_VIEWPORT) ? ? ? ?+= ulpi_viewport.o
> diff --git a/drivers/usb/otg/omap4-usb-phy.c b/drivers/usb/otg/omap4-usb-phy.c
> new file mode 100644
> index 0000000..a29ea45
> --- /dev/null
> +++ b/drivers/usb/otg/omap4-usb-phy.c
> @@ -0,0 +1,130 @@
> +/*
> + * OMAP4 system control module driver, USB control children
> + *
> + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
> + *
> + * Contact:
> + * ? ?Kishon Vijay Abraham I <kishon@ti.com>
> + * ? ?Eduardo Valentin <eduardo.valentin@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the GNU
> + * General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
> + * 02110-1301 USA
> + *
> + */
> +
> +#include <linux/module.h>
> +#include <linux/init.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/platform_device.h>
> +#include <linux/mfd/omap_control.h>
> +#include <linux/usb/omap4_usb_phy.h>
> +
> +/**
> + * omap4_usb_phy_power - power on/off the phy using control module reg
> + * @dev: struct device *
> + * @on: 0 or 1, based on powering on or off the PHY
Could it be bool ?
> + *
> + * omap_usb2 can call this API to power on or off the PHY.
> + */
> +int omap4_usb_phy_power(struct device *dev, int on)
> +{
> + ? ? ? u32 val;
> + ? ? ? int ret;
> +
> + ? ? ? if (on) {
> + ? ? ? ? ? ? ? ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
> + ? ? ? ? ? ? ? if (!ret && (val & PHY_PD)) {
> + ? ? ? ? ? ? ? ? ? ? ? ret = omap_control_writel(dev, ~PHY_PD,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CONTROL_DEV_CONF);
> + ? ? ? ? ? ? ? ? ? ? ? /* XXX: add proper documentation for this delay */
> + ? ? ? ? ? ? ? ? ? ? ? mdelay(200);
Also does it have to be a busy one?
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 15:06 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-25 15:06 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, balbi, kishon, kbaidarov, linux-pm, linux-omap,
linux-arm-kernel
On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> Created a new platform driver for the platform device created by the
> control module mfd core, wrt usb. This driver has API's to power on/off
> the phy and the API's to write to musb mailbox.
>
> (p.s. the mailbox for musb in omap4 is present in system control
> module)
>
> [kishon@ti.com: wrote the original API's related to USB functions]
> Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
...
> +/**
> + * omap4_usb_phy_mailbox - write to usb otg mailbox
> + * @dev: struct device *
> + * @val: the value to be written to the mailbox
> + *
> + * On detection of a device (ID pin is grounded), the phy should call this API
> + * to set AVALID, VBUSVALID and ID pin is grounded.
> + *
> + * When OMAP is connected to a host (OMAP in device mode), the phy should call
> + * this API to set AVALID, VBUSVALID and ID pin in high impedance.
> + *
> + * The phy should call this API, if OMAP is disconnected from host or device.
> + */
> +int omap4_usb_phy_mailbox(struct device *dev, u32 val)
> +{
> + return omap_control_writel(dev, val, CONTROL_USBOTGHS_CONTROL);
Mmm, I'm missing something. The device for usb_phy mailbox cannot be the
same than the device for the scm...
> +}
> +EXPORT_SYMBOL_GPL(omap4_usb_phy_mailbox);
> +
> +static int __devinit omap_usb_phy_probe(struct platform_device *pdev)
> +{
> + struct omap_control *omap_control;
> +
> + omap_control = dev_get_drvdata(pdev->dev.parent);
Directly accessing your parent device data does not looks very nice to me.
Maybe that's only me, but I'll never try to sneak into my parents stuff :-)
You previously exposed an API to get/put the control module device, so I
guess you should use it from the probe.
> +
> + if (!omap_control) {
> + dev_err(&pdev->dev, "no omap_control in our parent\n");
> + return -EINVAL;
> + }
BTW, where is the omap_control struct used?
I'm not sure to understand how the user is supposed to call that API?
Regards,
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
@ 2012-05-25 15:06 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-25 15:06 UTC (permalink / raw)
To: linux-arm-kernel
On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> Created a new platform driver for the platform device created by the
> control module mfd core, wrt usb. This driver has API's to power on/off
> the phy and the API's to write to musb mailbox.
>
> (p.s. the mailbox for musb in omap4 is present in system control
> module)
>
> [kishon at ti.com: wrote the original API's related to USB functions]
> Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
...
> +/**
> + * omap4_usb_phy_mailbox - write to usb otg mailbox
> + * @dev: struct device *
> + * @val: the value to be written to the mailbox
> + *
> + * On detection of a device (ID pin is grounded), the phy should call this API
> + * to set AVALID, VBUSVALID and ID pin is grounded.
> + *
> + * When OMAP is connected to a host (OMAP in device mode), the phy should call
> + * this API to set AVALID, VBUSVALID and ID pin in high impedance.
> + *
> + * The phy should call this API, if OMAP is disconnected from host or device.
> + */
> +int omap4_usb_phy_mailbox(struct device *dev, u32 val)
> +{
> + return omap_control_writel(dev, val, CONTROL_USBOTGHS_CONTROL);
Mmm, I'm missing something. The device for usb_phy mailbox cannot be the
same than the device for the scm...
> +}
> +EXPORT_SYMBOL_GPL(omap4_usb_phy_mailbox);
> +
> +static int __devinit omap_usb_phy_probe(struct platform_device *pdev)
> +{
> + struct omap_control *omap_control;
> +
> + omap_control = dev_get_drvdata(pdev->dev.parent);
Directly accessing your parent device data does not looks very nice to me.
Maybe that's only me, but I'll never try to sneak into my parents stuff :-)
You previously exposed an API to get/put the control module device, so I
guess you should use it from the probe.
> +
> + if (!omap_control) {
> + dev_err(&pdev->dev, "no omap_control in our parent\n");
> + return -EINVAL;
> + }
BTW, where is the omap_control struct used?
I'm not sure to understand how the user is supposed to call that API?
Regards,
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 08/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 15:13 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-25 15:13 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, balbi, kishon, kbaidarov, Keerthy, linux-pm,
linux-omap, linux-arm-kernel
On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> OMAP4460 specific temperature sensor register bit fields are added.
> Existing OMAP4 entries are renamed to OMAP4430.
>
> Signed-off-by: Keerthy<j-keerthy@ti.com>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/include/mach/control.h | 116 ++++++++++++++++++++++++++++
Now that we do have a dedicated driver for the bandgap, I guess it will
be better to put these defines inside the driver directly.
Benoit
> 1 files changed, 116 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/include/mach/control.h b/arch/arm/mach-omap2/include/mach/control.h
> index cf42764..171b504 100644
> --- a/arch/arm/mach-omap2/include/mach/control.h
> +++ b/arch/arm/mach-omap2/include/mach/control.h
> @@ -230,6 +230,122 @@
> /* OMAP44xx control McBSP padconf */
> #define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
>
> +/* TEMP_SENSOR OMAP4430 */
> +#define OMAP4430_BGAP_TEMPSOFF_SHIFT 12
> +#define OMAP4430_BGAP_TEMPSOFF_MASK (1<< 12)
> +#define OMAP4430_BGAP_TSHUT_SHIFT 11
> +#define OMAP4430_BGAP_TSHUT_MASK (1<< 11)
> +#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10
> +#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_MASK (1<< 10)
> +#define OMAP4430_BGAP_TEMP_SENSOR_SOC_SHIFT 9
> +#define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK (1<< 9)
> +#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8
> +#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK (1<< 8)
> +#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> +#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff<< 0)
> +
> +/* TEMP_SENSOR OMAP4460 */
> +#define OMAP4460_BGAP_TEMPSOFF_SHIFT 13
> +#define OMAP4460_BGAP_TEMPSOFF_MASK (1<< 13)
> +#define OMAP4460_BGAP_TEMP_SENSOR_SOC_SHIFT 11
> +#define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK (1<< 11)
> +#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
> +#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK (1<< 10)
> +#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> +#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff<< 0)
> +
> +/* BANDGAP_CTRL */
> +#define OMAP4460_SINGLE_MODE_SHIFT 31
> +#define OMAP4460_SINGLE_MODE_MASK (1<< 31)
> +#define OMAP4460_MASK_HOT_SHIFT 1
> +#define OMAP4460_MASK_HOT_MASK (1<< 1)
> +#define OMAP4460_MASK_COLD_SHIFT 0
> +#define OMAP4460_MASK_COLD_MASK (1<< 0)
> +
> +/* BANDGAP_COUNTER */
> +#define OMAP4460_COUNTER_SHIFT 0
> +#define OMAP4460_COUNTER_MASK (0xffffff<< 0)
> +
> +/* BANDGAP_THRESHOLD */
> +#define OMAP4460_T_HOT_SHIFT 16
> +#define OMAP4460_T_HOT_MASK (0x3ff<< 16)
> +#define OMAP4460_T_COLD_SHIFT 0
> +#define OMAP4460_T_COLD_MASK (0x3ff<< 0)
> +
> +/* TSHUT_THRESHOLD */
> +#define OMAP4460_TSHUT_HOT_SHIFT 16
> +#define OMAP4460_TSHUT_HOT_MASK (0x3ff<< 16)
> +#define OMAP4460_TSHUT_COLD_SHIFT 0
> +#define OMAP4460_TSHUT_COLD_MASK (0x3ff<< 0)
> +
> +/* BANDGAP_STATUS */
> +#define OMAP4460_CLEAN_STOP_SHIFT 3
> +#define OMAP4460_CLEAN_STOP_MASK (1<< 3)
> +#define OMAP4460_BGAP_ALERT_SHIFT 2
> +#define OMAP4460_BGAP_ALERT_MASK (1<< 2)
> +#define OMAP4460_HOT_FLAG_SHIFT 1
> +#define OMAP4460_HOT_FLAG_MASK (1<< 1)
> +#define OMAP4460_COLD_FLAG_SHIFT 0
> +#define OMAP4460_COLD_FLAG_MASK (1<< 0)
> +
> +/* TEMP_SENSOR OMAP5430 */
> +#define OMAP5430_BGAP_TEMP_SENSOR_SOC_SHIFT 12
> +#define OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK (1<< 12)
> +#define OMAP5430_BGAP_TEMPSOFF_SHIFT 11
> +#define OMAP5430_BGAP_TEMPSOFF_MASK (1<< 11)
> +#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
> +#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK (1<< 10)
> +#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> +#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff<< 0)
> +
> +/* BANDGAP_CTRL */
> +#define OMAP5430_MASK_HOT_CORE_SHIFT 5
> +#define OMAP5430_MASK_HOT_CORE_MASK (1<< 5)
> +#define OMAP5430_MASK_COLD_CORE_SHIFT 4
> +#define OMAP5430_MASK_COLD_CORE_MASK (1<< 4)
> +#define OMAP5430_MASK_HOT_MM_SHIFT 3
> +#define OMAP5430_MASK_HOT_MM_MASK (1<< 3)
> +#define OMAP5430_MASK_COLD_MM_SHIFT 2
> +#define OMAP5430_MASK_COLD_MM_MASK (1<< 2)
> +#define OMAP5430_MASK_HOT_MPU_SHIFT 1
> +#define OMAP5430_MASK_HOT_MPU_MASK (1<< 1)
> +#define OMAP5430_MASK_COLD_MPU_SHIFT 0
> +#define OMAP5430_MASK_COLD_MPU_MASK (1<< 0)
> +
> +/* BANDGAP_COUNTER */
> +#define OMAP5430_REPEAT_MODE_SHIFT 31
> +#define OMAP5430_REPEAT_MODE_MASK (1<< 31)
> +#define OMAP5430_COUNTER_SHIFT 0
> +#define OMAP5430_COUNTER_MASK (0xffffff<< 0)
> +
> +/* BANDGAP_THRESHOLD */
> +#define OMAP5430_T_HOT_SHIFT 16
> +#define OMAP5430_T_HOT_MASK (0x3ff<< 16)
> +#define OMAP5430_T_COLD_SHIFT 0
> +#define OMAP5430_T_COLD_MASK (0x3ff<< 0)
> +
> +/* TSHUT_THRESHOLD */
> +#define OMAP5430_TSHUT_HOT_SHIFT 16
> +#define OMAP5430_TSHUT_HOT_MASK (0x3ff<< 16)
> +#define OMAP5430_TSHUT_COLD_SHIFT 0
> +#define OMAP5430_TSHUT_COLD_MASK (0x3ff<< 0)
> +
> +/* BANDGAP_STATUS */
> +#define OMAP5430_BGAP_ALERT_SHIFT 31
> +#define OMAP5430_BGAP_ALERT_MASK (1<< 31)
> +#define OMAP5430_HOT_CORE_FLAG_SHIFT 5
> +#define OMAP5430_HOT_CORE_FLAG_MASK (1<< 5)
> +#define OMAP5430_COLD_CORE_FLAG_SHIFT 4
> +#define OMAP5430_COLD_CORE_FLAG_MASK (1<< 4)
> +#define OMAP5430_HOT_MM_FLAG_SHIFT 3
> +#define OMAP5430_HOT_MM_FLAG_MASK (1<< 3)
> +#define OMAP5430_COLD_MM_FLAG_SHIFT 2
> +#define OMAP5430_COLD_MM_FLAG_MASK (1<< 2)
> +#define OMAP5430_HOT_MPU_FLAG_SHIFT 1
> +#define OMAP5430_HOT_MPU_FLAG_MASK (1<< 1)
> +#define OMAP5430_COLD_MPU_FLAG_SHIFT 0
> +#define OMAP5430_COLD_MPU_FLAG_MASK (1<< 0)
> +
> /* AM35XX only CONTROL_GENERAL register offsets */
> #define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
> #define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 08/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields
@ 2012-05-25 15:13 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-25 15:13 UTC (permalink / raw)
To: linux-arm-kernel
On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> OMAP4460 specific temperature sensor register bit fields are added.
> Existing OMAP4 entries are renamed to OMAP4430.
>
> Signed-off-by: Keerthy<j-keerthy@ti.com>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/include/mach/control.h | 116 ++++++++++++++++++++++++++++
Now that we do have a dedicated driver for the bandgap, I guess it will
be better to put these defines inside the driver directly.
Benoit
> 1 files changed, 116 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/include/mach/control.h b/arch/arm/mach-omap2/include/mach/control.h
> index cf42764..171b504 100644
> --- a/arch/arm/mach-omap2/include/mach/control.h
> +++ b/arch/arm/mach-omap2/include/mach/control.h
> @@ -230,6 +230,122 @@
> /* OMAP44xx control McBSP padconf */
> #define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
>
> +/* TEMP_SENSOR OMAP4430 */
> +#define OMAP4430_BGAP_TEMPSOFF_SHIFT 12
> +#define OMAP4430_BGAP_TEMPSOFF_MASK (1<< 12)
> +#define OMAP4430_BGAP_TSHUT_SHIFT 11
> +#define OMAP4430_BGAP_TSHUT_MASK (1<< 11)
> +#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10
> +#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_MASK (1<< 10)
> +#define OMAP4430_BGAP_TEMP_SENSOR_SOC_SHIFT 9
> +#define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK (1<< 9)
> +#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8
> +#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK (1<< 8)
> +#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> +#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff<< 0)
> +
> +/* TEMP_SENSOR OMAP4460 */
> +#define OMAP4460_BGAP_TEMPSOFF_SHIFT 13
> +#define OMAP4460_BGAP_TEMPSOFF_MASK (1<< 13)
> +#define OMAP4460_BGAP_TEMP_SENSOR_SOC_SHIFT 11
> +#define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK (1<< 11)
> +#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
> +#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK (1<< 10)
> +#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> +#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff<< 0)
> +
> +/* BANDGAP_CTRL */
> +#define OMAP4460_SINGLE_MODE_SHIFT 31
> +#define OMAP4460_SINGLE_MODE_MASK (1<< 31)
> +#define OMAP4460_MASK_HOT_SHIFT 1
> +#define OMAP4460_MASK_HOT_MASK (1<< 1)
> +#define OMAP4460_MASK_COLD_SHIFT 0
> +#define OMAP4460_MASK_COLD_MASK (1<< 0)
> +
> +/* BANDGAP_COUNTER */
> +#define OMAP4460_COUNTER_SHIFT 0
> +#define OMAP4460_COUNTER_MASK (0xffffff<< 0)
> +
> +/* BANDGAP_THRESHOLD */
> +#define OMAP4460_T_HOT_SHIFT 16
> +#define OMAP4460_T_HOT_MASK (0x3ff<< 16)
> +#define OMAP4460_T_COLD_SHIFT 0
> +#define OMAP4460_T_COLD_MASK (0x3ff<< 0)
> +
> +/* TSHUT_THRESHOLD */
> +#define OMAP4460_TSHUT_HOT_SHIFT 16
> +#define OMAP4460_TSHUT_HOT_MASK (0x3ff<< 16)
> +#define OMAP4460_TSHUT_COLD_SHIFT 0
> +#define OMAP4460_TSHUT_COLD_MASK (0x3ff<< 0)
> +
> +/* BANDGAP_STATUS */
> +#define OMAP4460_CLEAN_STOP_SHIFT 3
> +#define OMAP4460_CLEAN_STOP_MASK (1<< 3)
> +#define OMAP4460_BGAP_ALERT_SHIFT 2
> +#define OMAP4460_BGAP_ALERT_MASK (1<< 2)
> +#define OMAP4460_HOT_FLAG_SHIFT 1
> +#define OMAP4460_HOT_FLAG_MASK (1<< 1)
> +#define OMAP4460_COLD_FLAG_SHIFT 0
> +#define OMAP4460_COLD_FLAG_MASK (1<< 0)
> +
> +/* TEMP_SENSOR OMAP5430 */
> +#define OMAP5430_BGAP_TEMP_SENSOR_SOC_SHIFT 12
> +#define OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK (1<< 12)
> +#define OMAP5430_BGAP_TEMPSOFF_SHIFT 11
> +#define OMAP5430_BGAP_TEMPSOFF_MASK (1<< 11)
> +#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
> +#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK (1<< 10)
> +#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> +#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff<< 0)
> +
> +/* BANDGAP_CTRL */
> +#define OMAP5430_MASK_HOT_CORE_SHIFT 5
> +#define OMAP5430_MASK_HOT_CORE_MASK (1<< 5)
> +#define OMAP5430_MASK_COLD_CORE_SHIFT 4
> +#define OMAP5430_MASK_COLD_CORE_MASK (1<< 4)
> +#define OMAP5430_MASK_HOT_MM_SHIFT 3
> +#define OMAP5430_MASK_HOT_MM_MASK (1<< 3)
> +#define OMAP5430_MASK_COLD_MM_SHIFT 2
> +#define OMAP5430_MASK_COLD_MM_MASK (1<< 2)
> +#define OMAP5430_MASK_HOT_MPU_SHIFT 1
> +#define OMAP5430_MASK_HOT_MPU_MASK (1<< 1)
> +#define OMAP5430_MASK_COLD_MPU_SHIFT 0
> +#define OMAP5430_MASK_COLD_MPU_MASK (1<< 0)
> +
> +/* BANDGAP_COUNTER */
> +#define OMAP5430_REPEAT_MODE_SHIFT 31
> +#define OMAP5430_REPEAT_MODE_MASK (1<< 31)
> +#define OMAP5430_COUNTER_SHIFT 0
> +#define OMAP5430_COUNTER_MASK (0xffffff<< 0)
> +
> +/* BANDGAP_THRESHOLD */
> +#define OMAP5430_T_HOT_SHIFT 16
> +#define OMAP5430_T_HOT_MASK (0x3ff<< 16)
> +#define OMAP5430_T_COLD_SHIFT 0
> +#define OMAP5430_T_COLD_MASK (0x3ff<< 0)
> +
> +/* TSHUT_THRESHOLD */
> +#define OMAP5430_TSHUT_HOT_SHIFT 16
> +#define OMAP5430_TSHUT_HOT_MASK (0x3ff<< 16)
> +#define OMAP5430_TSHUT_COLD_SHIFT 0
> +#define OMAP5430_TSHUT_COLD_MASK (0x3ff<< 0)
> +
> +/* BANDGAP_STATUS */
> +#define OMAP5430_BGAP_ALERT_SHIFT 31
> +#define OMAP5430_BGAP_ALERT_MASK (1<< 31)
> +#define OMAP5430_HOT_CORE_FLAG_SHIFT 5
> +#define OMAP5430_HOT_CORE_FLAG_MASK (1<< 5)
> +#define OMAP5430_COLD_CORE_FLAG_SHIFT 4
> +#define OMAP5430_COLD_CORE_FLAG_MASK (1<< 4)
> +#define OMAP5430_HOT_MM_FLAG_SHIFT 3
> +#define OMAP5430_HOT_MM_FLAG_MASK (1<< 3)
> +#define OMAP5430_COLD_MM_FLAG_SHIFT 2
> +#define OMAP5430_COLD_MM_FLAG_MASK (1<< 2)
> +#define OMAP5430_HOT_MPU_FLAG_SHIFT 1
> +#define OMAP5430_HOT_MPU_FLAG_MASK (1<< 1)
> +#define OMAP5430_COLD_MPU_FLAG_SHIFT 0
> +#define OMAP5430_COLD_MPU_FLAG_MASK (1<< 0)
> +
> /* AM35XX only CONTROL_GENERAL register offsets */
> #define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
> #define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 15:49 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-25 15:49 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, balbi, kishon, kbaidarov, Keerthy, linux-pm,
linux-omap, linux-arm-kernel
On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> In the System Control Module, OMAP supplies a voltage reference
> and a temperature sensor feature that are gathered in the band
> gap voltage and temperature sensor (VBGAPTS) module. The band
> gap provides current and voltage reference for its internal
> circuits and other analog IP blocks. The analog-to-digital
> converter (ADC) produces an output value that is proportional
> to the silicon temperature.
>
> This patch provides a platform driver which expose this feature.
> It is moduled as a MFD child of the System Control Module core
> MFD driver.
>
> This driver provides only APIs to access the device properties,
> like temperature, thresholds and update rate.
>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> Signed-off-by: Keerthy<j-keerthy@ti.com>
> ---
> .../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
> drivers/thermal/Kconfig | 13 +
> drivers/thermal/Makefile | 4 +-
> drivers/thermal/omap-bandgap.c | 1601 ++++++++++++++++++++
> drivers/thermal/omap-bandgap.h | 63 +
> 5 files changed, 1707 insertions(+), 1 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> create mode 100644 drivers/thermal/omap-bandgap.c
> create mode 100644 drivers/thermal/omap-bandgap.h
>
> diff --git a/Documentation/devicetree/bindings/thermal/omap_bandgap.txt b/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> new file mode 100644
> index 0000000..430bcf8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> @@ -0,0 +1,27 @@
> +* Texas Instrument OMAP SCM bandgap bindings
> +
> +In the System Control Module, OMAP supplies a voltage reference
> +and a temperature sensor feature that are gathered in the band
> +gap voltage and temperature sensor (VBGAPTS) module. The band
> +gap provides current and voltage reference for its internal
> +circuits and other analog IP blocks. The analog-to-digital
> +converter (ADC) produces an output value that is proportional
> +to the silicon temperature.
> +
> +Required properties:
> +- compatible : Should be:
> + - "ti,omap4460-control-bandgap" : for OMAP4460 bandgap
> + - "ti,omap5430-control-bandgap" : for OMAP5430 bandgap
> +- interrupts : this entry should indicate which interrupt line
> +the talert signal is routed to;
> +Specific:
> +- ti,tshut-gpio : this entry should be used to inform which GPIO
> +line the tshut signal is routed to;
> +
> +Example:
> +
> +bandgap {
> + compatible = "ti,omap4460-control-bandgap";
> + interrupts =<0 126 4>; /* talert */
> + ti,tshut-gpio =<86>;
> +};
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index 514a691..ffdd240 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -26,3 +26,16 @@ config SPEAR_THERMAL
> help
> Enable this to plug the SPEAr thermal sensor driver into the Linux
> thermal framework
> +
> +config OMAP_BANDGAP
> + tristate "Texas Instruments OMAP4+ temperature sensor driver"
> + depends on THERMAL
> + depends on MFD_OMAP_CONTROL
> + help
> + If you say yes here you get support for the Texas Instruments
> + OMAP4460+ on die bandgap temperature sensor support. The register
> + set is part of system control module.
> +
> + This includes alert interrupts generation and also the TSHUT
> + support.
> +
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index a9fff0b..5ff1af1 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -3,4 +3,6 @@
> #
>
> obj-$(CONFIG_THERMAL) += thermal_sys.o
> -obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
> \ No newline at end of file
> +obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
> +obj-$(CONFIG_OMAP_BANDGAP) += omap-thermal.o
> +omap-thermal-y := omap-bandgap.o
> diff --git a/drivers/thermal/omap-bandgap.c b/drivers/thermal/omap-bandgap.c
> new file mode 100644
> index 0000000..3d5a12b
> --- /dev/null
> +++ b/drivers/thermal/omap-bandgap.c
> @@ -0,0 +1,1601 @@
> +/*
> + * OMAP4 Bandgap temperature sensor driver
> + *
> + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> + * Author: J Keerthy<j-keerthy@ti.com>
> + * Author: Moiz Sonasath<m-sonasath@ti.com>
> + * Couple of fixes, DT and MFD adaptation:
> + * Eduardo Valentin<eduardo.valentin@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
> + * 02110-1301 USA
> + *
> + */
> +
> +#include<linux/module.h>
> +#include<linux/export.h>
> +#include<linux/init.h>
> +#include<linux/kernel.h>
> +#include<linux/interrupt.h>
> +#include<linux/clk.h>
> +#include<linux/gpio.h>
> +#include<linux/platform_device.h>
> +#include<linux/err.h>
> +#include<linux/types.h>
> +#include<linux/mutex.h>
> +#include<linux/reboot.h>
> +#include<linux/of_platform.h>
> +#include<linux/of_irq.h>
> +#include<linux/mfd/omap_control.h>
> +
> +#include<mach/control.h>
> +
> +#include "omap-bandgap.h"
> +
> +/* Offsets from the base of temperature sensor registers */
> +
> +#define OMAP4460_TEMP_SENSOR_CTRL_OFFSET 0x32C
> +#define OMAP4460_BGAP_CTRL_OFFSET 0x378
> +#define OMAP4460_BGAP_COUNTER_OFFSET 0x37C
> +#define OMAP4460_BGAP_THRESHOLD_OFFSET 0x380
> +#define OMAP4460_BGAP_TSHUT_OFFSET 0x384
> +#define OMAP4460_BGAP_STATUS_OFFSET 0x388
> +#define OMAP4460_FUSE_OPP_BGAP 0x260
> +
> +#define OMAP5430_TEMP_SENSOR_MPU_OFFSET 0x32C
> +#define OMAP5430_BGAP_CTRL_OFFSET 0x380
> +#define OMAP5430_BGAP_COUNTER_MPU_OFFSET 0x39C
> +#define OMAP5430_BGAP_THRESHOLD_MPU_OFFSET 0x384
> +#define OMAP5430_BGAP_TSHUT_MPU_OFFSET 0x390
> +#define OMAP5430_BGAP_STATUS_OFFSET 0x3A8
> +#define OMAP5430_FUSE_OPP_BGAP_MPU 0x1E4
> +
> +#define OMAP5430_TEMP_SENSOR_GPU_OFFSET 0x330
> +#define OMAP5430_BGAP_COUNTER_GPU_OFFSET 0x3A0
> +#define OMAP5430_BGAP_THRESHOLD_GPU_OFFSET 0x388
> +#define OMAP5430_BGAP_TSHUT_GPU_OFFSET 0x394
> +#define OMAP5430_FUSE_OPP_BGAP_GPU 0x1E0
> +
> +#define OMAP5430_TEMP_SENSOR_CORE_OFFSET 0x334
> +#define OMAP5430_BGAP_COUNTER_CORE_OFFSET 0x3A4
> +#define OMAP5430_BGAP_THRESHOLD_CORE_OFFSET 0x38C
> +#define OMAP5430_BGAP_TSHUT_CORE_OFFSET 0x398
> +#define OMAP5430_FUSE_OPP_BGAP_CORE 0x1E8
> +
> +#define OMAP4460_TSHUT_HOT 900 /* 122 deg C */
> +#define OMAP4460_TSHUT_COLD 895 /* 100 deg C */
> +#define OMAP4460_T_HOT 800 /* 73 deg C */
> +#define OMAP4460_T_COLD 795 /* 71 deg C */
> +#define OMAP4460_MAX_FREQ 1500000
> +#define OMAP4460_MIN_FREQ 1000000
> +#define OMAP4460_MIN_TEMP -40000
> +#define OMAP4460_MAX_TEMP 123000
> +#define OMAP4460_HYST_VAL 5000
> +#define OMAP4460_ADC_START_VALUE 530
> +#define OMAP4460_ADC_END_VALUE 932
> +
> +#define OMAP5430_MPU_TSHUT_HOT 915
> +#define OMAP5430_MPU_TSHUT_COLD 900
> +#define OMAP5430_MPU_T_HOT 800
> +#define OMAP5430_MPU_T_COLD 795
> +#define OMAP5430_MPU_MAX_FREQ 1500000
> +#define OMAP5430_MPU_MIN_FREQ 1000000
> +#define OMAP5430_MPU_MIN_TEMP -40000
> +#define OMAP5430_MPU_MAX_TEMP 125000
> +#define OMAP5430_MPU_HYST_VAL 5000
> +#define OMAP5430_ADC_START_VALUE 532
> +#define OMAP5430_ADC_END_VALUE 934
> +
> +#define OMAP5430_GPU_TSHUT_HOT 915
> +#define OMAP5430_GPU_TSHUT_COLD 900
> +#define OMAP5430_GPU_T_HOT 800
> +#define OMAP5430_GPU_T_COLD 795
> +#define OMAP5430_GPU_MAX_FREQ 1500000
> +#define OMAP5430_GPU_MIN_FREQ 1000000
> +#define OMAP5430_GPU_MIN_TEMP -40000
> +#define OMAP5430_GPU_MAX_TEMP 125000
> +#define OMAP5430_GPU_HYST_VAL 5000
> +
> +#define OMAP5430_CORE_TSHUT_HOT 915
> +#define OMAP5430_CORE_TSHUT_COLD 900
> +#define OMAP5430_CORE_T_HOT 800
> +#define OMAP5430_CORE_T_COLD 795
> +#define OMAP5430_CORE_MAX_FREQ 1500000
> +#define OMAP5430_CORE_MIN_FREQ 1000000
> +#define OMAP5430_CORE_MIN_TEMP -40000
> +#define OMAP5430_CORE_MAX_TEMP 125000
> +#define OMAP5430_CORE_HYST_VAL 5000
> +
> +/**
> + * The register offsets and bit fields might change across
> + * OMAP versions hence populating them in this structure.
> + */
> +
> +struct temp_sensor_registers {
> + u32 temp_sensor_ctrl;
> + u32 bgap_tempsoff_mask;
> + u32 bgap_soc_mask;
> + u32 bgap_eocz_mask;
> + u32 bgap_dtemp_mask;
> +
> + u32 bgap_mask_ctrl;
> + u32 mask_hot_mask;
> + u32 mask_cold_mask;
> +
> + u32 bgap_mode_ctrl;
> + u32 mode_ctrl_mask;
> +
> + u32 bgap_counter;
> + u32 counter_mask;
> +
> + u32 bgap_threshold;
> + u32 threshold_thot_mask;
> + u32 threshold_tcold_mask;
> +
> + u32 tshut_threshold;
> + u32 tshut_hot_mask;
> + u32 tshut_cold_mask;
> +
> + u32 bgap_status;
> + u32 status_clean_stop_mask;
> + u32 status_bgap_alert_mask;
> + u32 status_hot_mask;
> + u32 status_cold_mask;
> +
> + u32 bgap_efuse;
> +};
> +
> +/**
> + * The thresholds and limits for temperature sensors.
> + */
> +struct temp_sensor_data {
> + u32 tshut_hot;
> + u32 tshut_cold;
> + u32 t_hot;
> + u32 t_cold;
> + u32 min_freq;
> + u32 max_freq;
> + int max_temp;
> + int min_temp;
> + int hyst_val;
> + u32 adc_start_val;
> + u32 adc_end_val;
> + u32 update_int1;
> + u32 update_int2;
> +};
> +
> +/**
> + * struct temp_sensor_regval - temperature sensor register values
> + * @bg_mode_ctrl: temp sensor control register value
> + * @bg_ctrl: bandgap ctrl register value
> + * @bg_counter: bandgap counter value
> + * @bg_threshold: bandgap threshold register value
> + * @tshut_threshold: bandgap tshut register value
> + */
> +struct temp_sensor_regval {
> + u32 bg_mode_ctrl;
> + u32 bg_ctrl;
> + u32 bg_counter;
> + u32 bg_threshold;
> + u32 tshut_threshold;
> +};
> +
> +/**
> + * struct omap_temp_sensor - bandgap temperature sensor platform data
> + * @ts_data: pointer to struct with thresholds, limits of temperature sensor
> + * @registers: pointer to the list of register offsets and bitfields
> + * @regval: temperature sensor register values
> + * @domain: the name of the domain where the sensor is located
> + */
> +struct omap_temp_sensor {
> + struct temp_sensor_data *ts_data;
> + struct temp_sensor_registers *registers;
> + struct temp_sensor_regval *regval;
> + char *domain;
> +};
> +
> +/**
> + * struct omap_bandgap_data - bandgap platform data structure
> + * @has_talert: indicates if the chip has talert output line
> + * @has_tshut: indicates if the chip has tshut output line
> + * @conv_table: Pointer to adc to temperature conversion table
> + * @fclock_name: clock name of the functional clock
> + * @div_ck_nme: clock name of the clock divisor
> + * @sensor_count: count of temperature sensor device in scm
> + * @sensors: array of sensors present in this bandgap instance
> + * @expose_sensor: callback to export sensor to thermal API
> + */
> +struct omap_bandgap_data {
> + bool has_talert;
> + bool has_tshut;
> + const int *conv_table;
> + char *fclock_name;
> + char *div_ck_name;
> + int sensor_count;
> + int (*report_temperature)(struct omap_bandgap *bg_ptr, int id);
> + int (*expose_sensor)(struct omap_bandgap *bg_ptr, int id, char *domain);
> +
> + /* this needs to be at the end */
> + struct omap_temp_sensor sensors[];
> +};
> +
> +/* TODO: provide data structures for 4430 */
> +
> +/*
> + * OMAP4460 has one instance of thermal sensor for MPU
> + * need to describe the individual bit fields
> + */
> +static struct temp_sensor_registers
> +omap4460_mpu_temp_sensor_registers = {
> + .temp_sensor_ctrl = OMAP4460_TEMP_SENSOR_CTRL_OFFSET,
> + .bgap_tempsoff_mask = OMAP4460_BGAP_TEMPSOFF_MASK,
> + .bgap_soc_mask = OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK,
> + .bgap_eocz_mask = OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK,
> + .bgap_dtemp_mask = OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK,
> +
> + .bgap_mask_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
> + .mask_hot_mask = OMAP4460_MASK_HOT_MASK,
> + .mask_cold_mask = OMAP4460_MASK_COLD_MASK,
> +
> + .bgap_mode_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
> + .mode_ctrl_mask = OMAP4460_SINGLE_MODE_MASK,
> +
> + .bgap_counter = OMAP4460_BGAP_COUNTER_OFFSET,
> + .counter_mask = OMAP4460_COUNTER_MASK,
> +
> + .bgap_threshold = OMAP4460_BGAP_THRESHOLD_OFFSET,
> + .threshold_thot_mask = OMAP4460_T_HOT_MASK,
> + .threshold_tcold_mask = OMAP4460_T_COLD_MASK,
> +
> + .tshut_threshold = OMAP4460_BGAP_TSHUT_OFFSET,
> + .tshut_hot_mask = OMAP4460_TSHUT_HOT_MASK,
> + .tshut_cold_mask = OMAP4460_TSHUT_COLD_MASK,
> +
> + .bgap_status = OMAP4460_BGAP_STATUS_OFFSET,
> + .status_clean_stop_mask = OMAP4460_CLEAN_STOP_MASK,
> + .status_bgap_alert_mask = OMAP4460_BGAP_ALERT_MASK,
> + .status_hot_mask = OMAP4460_HOT_FLAG_MASK,
> + .status_cold_mask = OMAP4460_COLD_FLAG_MASK,
> +
> + .bgap_efuse = OMAP4460_FUSE_OPP_BGAP,
> +};
> +
> +/*
> + * OMAP4460 has one instance of thermal sensor for MPU
Bad copy paste.
> + * need to describe the individual bit fields
> + */
> +static struct temp_sensor_registers
> +omap5430_mpu_temp_sensor_registers = {
> + .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_MPU_OFFSET,
> + .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
> + .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
> + .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
> + .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
> +
> + .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
> + .mask_hot_mask = OMAP5430_MASK_HOT_MPU_MASK,
> + .mask_cold_mask = OMAP5430_MASK_COLD_MPU_MASK,
> +
> + .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
> + .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
> +
> + .bgap_counter = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
> + .counter_mask = OMAP5430_COUNTER_MASK,
> +
> + .bgap_threshold = OMAP5430_BGAP_THRESHOLD_MPU_OFFSET,
> + .threshold_thot_mask = OMAP5430_T_HOT_MASK,
> + .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
> +
> + .tshut_threshold = OMAP5430_BGAP_TSHUT_MPU_OFFSET,
> + .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
> + .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
> +
> + .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
> + .status_clean_stop_mask = 0x0,
> + .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
> + .status_hot_mask = OMAP5430_HOT_MPU_FLAG_MASK,
> + .status_cold_mask = OMAP5430_COLD_MPU_FLAG_MASK,
> +
> + .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_MPU,
> +};
> +
> +/*
> + * OMAP4460 has one instance of thermal sensor for MPU
> + * need to describe the individual bit fields
> + */
Ditto
> +static struct temp_sensor_registers
> +omap5430_gpu_temp_sensor_registers = {
> + .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_GPU_OFFSET,
> + .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
> + .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
> + .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
> + .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
> +
> + .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
> + .mask_hot_mask = OMAP5430_MASK_HOT_MM_MASK,
> + .mask_cold_mask = OMAP5430_MASK_COLD_MM_MASK,
> +
> + .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
> + .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
> +
> + .bgap_counter = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
> + .counter_mask = OMAP5430_COUNTER_MASK,
> +
> + .bgap_threshold = OMAP5430_BGAP_THRESHOLD_GPU_OFFSET,
> + .threshold_thot_mask = OMAP5430_T_HOT_MASK,
> + .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
> +
> + .tshut_threshold = OMAP5430_BGAP_TSHUT_GPU_OFFSET,
> + .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
> + .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
> +
> + .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
> + .status_clean_stop_mask = 0x0,
> + .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
> + .status_hot_mask = OMAP5430_HOT_MM_FLAG_MASK,
> + .status_cold_mask = OMAP5430_COLD_MM_FLAG_MASK,
> +
> + .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_GPU,
> +};
> +
> +/*
> + * OMAP4460 has one instance of thermal sensor for MPU
> + * need to describe the individual bit fields
> + */
Ditto
> +static struct temp_sensor_registers
> +omap5430_core_temp_sensor_registers = {
> + .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_CORE_OFFSET,
> + .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
> + .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
> + .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
> + .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
> +
> + .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
> + .mask_hot_mask = OMAP5430_MASK_HOT_CORE_MASK,
> + .mask_cold_mask = OMAP5430_MASK_COLD_CORE_MASK,
> +
> + .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
> + .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
> +
> + .bgap_counter = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
> + .counter_mask = OMAP5430_COUNTER_MASK,
> +
> + .bgap_threshold = OMAP5430_BGAP_THRESHOLD_CORE_OFFSET,
> + .threshold_thot_mask = OMAP5430_T_HOT_MASK,
> + .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
> +
> + .tshut_threshold = OMAP5430_BGAP_TSHUT_CORE_OFFSET,
> + .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
> + .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
> +
> + .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
> + .status_clean_stop_mask = 0x0,
> + .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
> + .status_hot_mask = OMAP5430_HOT_CORE_FLAG_MASK,
> + .status_cold_mask = OMAP5430_COLD_CORE_FLAG_MASK,
> +
> + .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_CORE,
> +};
> +
> +/* Thresholds and limits for OMAP4460 MPU temperature sensor */
> +static struct temp_sensor_data omap4460_mpu_temp_sensor_data = {
> + .tshut_hot = OMAP4460_TSHUT_HOT,
> + .tshut_cold = OMAP4460_TSHUT_COLD,
> + .t_hot = OMAP4460_T_HOT,
> + .t_cold = OMAP4460_T_COLD,
> + .min_freq = OMAP4460_MIN_FREQ,
> + .max_freq = OMAP4460_MAX_FREQ,
> + .max_temp = OMAP4460_MAX_TEMP,
> + .min_temp = OMAP4460_MIN_TEMP,
> + .hyst_val = OMAP4460_HYST_VAL,
> + .adc_start_val = OMAP4460_ADC_START_VALUE,
> + .adc_end_val = OMAP4460_ADC_END_VALUE,
> + .update_int1 = 1000,
> + .update_int2 = 2000,
> +};
> +
> +/* Thresholds and limits for OMAP5430 MPU temperature sensor */
> +static struct temp_sensor_data omap5430_mpu_temp_sensor_data = {
> + .tshut_hot = OMAP5430_MPU_TSHUT_HOT,
> + .tshut_cold = OMAP5430_MPU_TSHUT_COLD,
> + .t_hot = OMAP5430_MPU_T_HOT,
> + .t_cold = OMAP5430_MPU_T_COLD,
> + .min_freq = OMAP5430_MPU_MIN_FREQ,
> + .max_freq = OMAP5430_MPU_MAX_FREQ,
> + .max_temp = OMAP5430_MPU_MAX_TEMP,
> + .min_temp = OMAP5430_MPU_MIN_TEMP,
> + .hyst_val = OMAP5430_MPU_HYST_VAL,
> + .adc_start_val = OMAP5430_ADC_START_VALUE,
> + .adc_end_val = OMAP5430_ADC_END_VALUE,
> + .update_int1 = 1000,
> + .update_int2 = 2000,
> +};
> +
> +/* Thresholds and limits for OMAP5430 GPU temperature sensor */
> +static struct temp_sensor_data omap5430_gpu_temp_sensor_data = {
> + .tshut_hot = OMAP5430_GPU_TSHUT_HOT,
> + .tshut_cold = OMAP5430_GPU_TSHUT_COLD,
> + .t_hot = OMAP5430_GPU_T_HOT,
> + .t_cold = OMAP5430_GPU_T_COLD,
> + .min_freq = OMAP5430_GPU_MIN_FREQ,
> + .max_freq = OMAP5430_GPU_MAX_FREQ,
> + .max_temp = OMAP5430_GPU_MAX_TEMP,
> + .min_temp = OMAP5430_GPU_MIN_TEMP,
> + .hyst_val = OMAP5430_GPU_HYST_VAL,
> + .adc_start_val = OMAP5430_ADC_START_VALUE,
> + .adc_end_val = OMAP5430_ADC_END_VALUE,
> + .update_int1 = 1000,
> + .update_int2 = 2000,
> +};
> +
> +/* Thresholds and limits for OMAP5430 CORE temperature sensor */
> +static struct temp_sensor_data omap5430_core_temp_sensor_data = {
> + .tshut_hot = OMAP5430_CORE_TSHUT_HOT,
> + .tshut_cold = OMAP5430_CORE_TSHUT_COLD,
> + .t_hot = OMAP5430_CORE_T_HOT,
> + .t_cold = OMAP5430_CORE_T_COLD,
> + .min_freq = OMAP5430_CORE_MIN_FREQ,
> + .max_freq = OMAP5430_CORE_MAX_FREQ,
> + .max_temp = OMAP5430_CORE_MAX_TEMP,
> + .min_temp = OMAP5430_CORE_MIN_TEMP,
> + .hyst_val = OMAP5430_CORE_HYST_VAL,
> + .adc_start_val = OMAP5430_ADC_START_VALUE,
> + .adc_end_val = OMAP5430_ADC_END_VALUE,
> + .update_int1 = 1000,
> + .update_int2 = 2000,
> +};
> +
> +/*
> + * Temperature values in milli degree celsius
> + * ADC code values from 530 to 923
> + */
> +static const int
> +omap4460_adc_to_temp[OMAP4460_ADC_END_VALUE - OMAP4460_ADC_START_VALUE + 1] = {
> + -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600, -38200,
> + -37800, -37300, -36800, -36400, -36000, -35600, -35200, -34800,
> + -34300, -33800, -33400, -33000, -32600, -32200, -31800, -31300,
> + -30800, -30400, -30000, -29600, -29200, -28700, -28200, -27800,
> + -27400, -27000, -26600, -26200, -25700, -25200, -24800, -24400,
> + -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
> + -20600, -20200, -19700, -19200, -18800, -18400, -18000, -17600,
> + -17200, -16700, -16200, -15800, -15400, -15000, -14600, -14200,
> + -13700, -13200, -12800, -12400, -12000, -11600, -11200, -10700,
> + -10200, -9800, -9400, -9000, -8600, -8200, -7700, -7200, -6800,
> + -6400, -6000, -5600, -5200, -4800, -4300, -3800, -3400, -3000,
> + -2600, -2200, -1800, -1300, -800, -400, 0, 400, 800, 1200, 1600,
> + 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000, 6400,
> + 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10600, 11000,
> + 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800,
> + 15300, 15800, 16200, 16600, 17000, 17400, 17800, 18200, 18700,
> + 19200, 19600, 20000, 20400, 20800, 21200, 21600, 22100, 22600,
> + 23000, 23400, 23800, 24200, 24600, 25000, 25400, 25900, 26400,
> + 26800, 27200, 27600, 28000, 28400, 28800, 29300, 29800, 30200,
> + 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
> + 34400, 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800,
> + 38200, 38600, 39000, 39400, 39800, 40200, 40600, 41100, 41600,
> + 42000, 42400, 42800, 43200, 43600, 44000, 44400, 44800, 45300,
> + 45800, 46200, 46600, 47000, 47400, 47800, 48200, 48600, 49000,
> + 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400, 52800,
> + 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600,
> + 57000, 57400, 57800, 58200, 58700, 59200, 59600, 60000, 60400,
> + 60800, 61200, 61600, 62000, 62400, 62800, 63300, 63800, 64200,
> + 64600, 65000, 65400, 65800, 66200, 66600, 67000, 67400, 67800,
> + 68200, 68700, 69200, 69600, 70000, 70400, 70800, 71200, 71600,
> + 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
> + 75800, 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000,
> + 79400, 79800, 80300, 80800, 81200, 81600, 82000, 82400, 82800,
> + 83200, 83600, 84000, 84400, 84800, 85200, 85600, 86000, 86400,
> + 86800, 87300, 87800, 88200, 88600, 89000, 89400, 89800, 90200,
> + 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400, 93800,
> + 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600,
> + 98000, 98400, 98800, 99200, 99600, 100000, 100400, 100800, 101200,
> + 101600, 102000, 102400, 102800, 103200, 103600, 104000, 104400,
> + 104800, 105200, 105600, 106100, 106600, 107000, 107400, 107800,
> + 108200, 108600, 109000, 109400, 109800, 110200, 110600, 111000,
> + 111400, 111800, 112200, 112600, 113000, 113400, 113800, 114200,
> + 114600, 115000, 115400, 115800, 116200, 116600, 117000, 117400,
> + 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
> + 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
> + 124600, 124900, 125000, 125000, 125000, 125000
> +};
> +
> +static const int
> +omap5430_adc_to_temp[OMAP5430_ADC_END_VALUE - OMAP5430_ADC_START_VALUE + 1] = {
> + -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600,
> + -38200, -37800, -37300, -36800,
> + -36400, -36000, -35600, -35200, -34800, -34300, -33800, -33400, -33000,
> + -32600,
> + -32200, -31800, -31300, -30800, -30400, -30000, -29600, -29200, -28700,
> + -28200, -27800, -27400, -27000, -26600, -26200, -25700, -25200, -24800,
> + -24400, -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
> + -20600, -20200, -19700, -19200, -9300, -18400, -18000, -17600, -17200,
> + -16700, -16200, -15800, -15400, -15000, -14600, -14200, -13700, -13200,
> + -12800, -12400, -12000, -11600, -11200, -10700, -10200, -9800, -9400,
> + -9000,
> + -8600, -8200, -7700, -7200, -6800, -6400, -6000, -5600, -5200, -4800,
> + -4300,
> + -3800, -3400, -3000, -2600, -2200, -1800, -1300, -800, -400, 0, 400,
> + 800,
> + 1200, 1600, 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000,
> + 6400, 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10800,
> + 11100,
> + 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800, 15300,
> + 15800,
> + 16200, 16600, 17000, 17400, 17800, 18200, 18700, 19200, 19600, 20000,
> + 20400,
> + 20800, 21200, 21600, 22100, 22600, 23000, 23400, 23800, 24200, 24600,
> + 25000,
> + 25400, 25900, 26400, 26800, 27200, 27600, 28000, 28400, 28800, 29300,
> + 29800,
> + 30200, 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
> + 34400,
> + 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800, 38200, 38600,
> + 39000,
> + 39400, 39800, 40200, 40600, 41100, 41600, 42000, 42400, 42800, 43200,
> + 43600,
> + 44000, 44400, 44800, 45300, 45800, 46200, 46600, 47000, 47400, 47800,
> + 48200,
> + 48600, 49000, 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400,
> + 52800,
> + 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600, 57000,
> + 57400,
> + 57800, 58200, 58700, 59200, 59600, 60000, 60400, 60800, 61200, 61600,
> + 62000,
> + 62400, 62800, 63300, 63800, 64200, 64600, 65000, 65400, 65800, 66200,
> + 66600,
> + 67000, 67400, 67800, 68200, 68700, 69200, 69600, 70000, 70400, 70800,
> + 71200,
> + 71600, 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
> + 75800,
> + 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000, 79400, 79800,
> + 80300,
> + 80800, 81200, 81600, 82000, 82400, 82800, 83200, 83600, 84000, 84400,
> + 84800,
> + 85200, 85600, 86000, 86400, 86800, 87300, 87800, 88200, 88600, 89000,
> + 89400,
> + 89800, 90200, 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400,
> + 93800,
> + 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600, 98000,
> + 98400,
> + 98800, 99200, 99600, 100000, 100400, 100800, 101200, 101600, 102000,
> + 102400,
> + 102800, 103200, 103600, 104000, 104400, 104800, 105200, 105600, 106100,
> + 106600, 107000, 107400, 107800, 108200, 108600, 109000, 109400, 109800,
> + 110200, 110600, 111000, 111400, 111800, 112200, 112600, 113000, 113400,
> + 113800, 114200, 114600, 115000, 115400, 115800, 116200, 116600, 117000,
> + 117400, 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
> + 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
> + 124600, 124900, 125000, 125000, 125000, 125000,
> +};
It might be good to store the per SoC data in dedicated files or at
least put some #ifdef around to avoid wasting memory for a non-multi
OMAP boot.
> +
> +static irqreturn_t talert_irq_handler(int irq, void *data)
> +{
> + struct omap_bandgap *bg_ptr = data;
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 t_hot = 0, t_cold = 0, temp, ctrl;
> + int i, r;
> +
> + bg_ptr = data;
> + /* Read the status of t_hot */
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> + tsr = bg_ptr->pdata->sensors[i].registers;
> + r = omap_control_readl(cdev, tsr->bgap_status,&t_hot);
> + t_hot&= tsr->status_hot_mask;
> +
> + /* Read the status of t_cold */
> + r |= omap_control_readl(cdev, tsr->bgap_status,&t_cold);
> + t_cold&= tsr->status_cold_mask;
> +
> + if (!t_cold&& !t_hot)
> + continue;
> +
> + r |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,&ctrl);
> + /*
> + * One TALERT interrupt: Two sources
> + * If the interrupt is due to t_hot then mask t_hot and
> + * and unmask t_cold else mask t_cold and unmask t_hot
> + */
> + if (t_hot) {
> + ctrl&= ~tsr->mask_hot_mask;
> + ctrl |= tsr->mask_cold_mask;
> + } else if (t_cold) {
> + ctrl&= ~tsr->mask_cold_mask;
> + ctrl |= tsr->mask_hot_mask;
> + }
> +
> + r |= omap_control_writel(cdev, ctrl, tsr->bgap_mask_ctrl);
> +
> + if (r) {
> + dev_err(bg_ptr->dev, "failed to ack talert interrupt\n");
> + return IRQ_NONE;
> + }
> +
> + /* read temperature */
> + r = omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> + temp&= tsr->bgap_dtemp_mask;
> +
> + /* report temperature to whom may concern */
> + if (bg_ptr->pdata->report_temperature)
> + bg_ptr->pdata->report_temperature(bg_ptr, i);
> + }
> +
> + return IRQ_HANDLED;
> +}
> +
> +static irqreturn_t omap_bandgap_tshut_irq_handler(int irq, void *data)
> +{
> + orderly_poweroff(true);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static
> +int adc_to_temp_conversion(struct omap_bandgap *bg_ptr, int id, int adc_val,
> + int *t)
> +{
> + struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> +
> + /* look up for temperature in the table and return the temperature */
> + if (adc_val< ts_data->adc_start_val || adc_val> ts_data->adc_end_val)
> + return -ERANGE;
> +
> + *t = bg_ptr->conv_table[adc_val - ts_data->adc_start_val];
> +
> + return 0;
> +}
> +
> +static int temp_to_adc_conversion(long temp, struct omap_bandgap *bg_ptr, int i,
> + int *adc)
> +{
> + struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[i].ts_data;
> + int high, low, mid;
> +
> + low = 0;
> + high = ts_data->adc_end_val - ts_data->adc_start_val;
> + mid = (high + low) / 2;
> +
> + if (temp< bg_ptr->conv_table[high] || temp> bg_ptr->conv_table[high])
> + return -EINVAL;
> +
> + while (low< high) {
> + if (temp< bg_ptr->conv_table[mid])
> + high = mid - 1;
> + else
> + low = mid + 1;
> + mid = (low + high) / 2;
> + }
> +
> + *adc = ts_data->adc_start_val + low;
> +
> + return 0;
> +}
> +
> +static int temp_sensor_unmask_interrupts(struct omap_bandgap *bg_ptr, int id,
> + u32 t_hot, u32 t_cold)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 temp, reg_val;
> + int err;
> +
> + /* Read the current on die temperature */
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + err = omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> + temp&= tsr->bgap_dtemp_mask;
> +
> + err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,®_val);
> + if (temp< t_hot)
> + reg_val |= tsr->mask_hot_mask;
> + else
> + reg_val&= ~tsr->mask_hot_mask;
> +
> + if (t_cold< temp)
> + reg_val |= tsr->mask_cold_mask;
> + else
> + reg_val&= ~tsr->mask_cold_mask;
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
> +
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to unmask interrupts\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +static
> +int add_hyst(int adc_val, int hyst_val, struct omap_bandgap *bg_ptr, int i,
> + u32 *sum)
> +{
> + int temp, ret;
> +
> + ret = adc_to_temp_conversion(bg_ptr, i, adc_val,&temp);
> + if (ret< 0)
> + return ret;
> +
> + temp += hyst_val;
> +
> + return temp_to_adc_conversion(temp, bg_ptr, i, sum);
> +}
> +
> +static
> +int temp_sensor_configure_thot(struct omap_bandgap *bg_ptr, int id, int t_hot)
> +{
> + struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 thresh_val, reg_val;
> + int cold, err;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> +
> + /* obtain the T cold value */
> + err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> + cold = (thresh_val& tsr->threshold_tcold_mask)>>
> + __ffs(tsr->threshold_tcold_mask);
> + if (t_hot<= cold) {
> + /* change the t_cold to t_hot - 5000 millidegrees */
> + err |= add_hyst(t_hot, -ts_data->hyst_val, bg_ptr, id,&cold);
> + /* write the new t_cold value */
> + reg_val = thresh_val& (~tsr->threshold_tcold_mask);
> + reg_val |= cold<< __ffs(tsr->threshold_tcold_mask);
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + thresh_val = reg_val;
> + }
> +
> + /* write the new t_hot value */
> + reg_val = thresh_val& ~tsr->threshold_thot_mask;
> + reg_val |= (t_hot<< __ffs(tsr->threshold_thot_mask));
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> + return -EIO;
> + }
> +
> + return temp_sensor_unmask_interrupts(bg_ptr, id, t_hot, cold);
> +}
> +
> +static
> +int temp_sensor_init_talert_thresholds(struct omap_bandgap *bg_ptr, int id,
> + int t_hot, int t_cold)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 reg_val, thresh_val;
> + int err;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> +
> + /* write the new t_cold value */
> + reg_val = thresh_val& ~tsr->threshold_tcold_mask;
> + reg_val |= (t_cold<< __ffs(tsr->threshold_tcold_mask));
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
> + return -EIO;
> + }
> +
> + err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> +
> + /* write the new t_hot value */
> + reg_val = thresh_val& ~tsr->threshold_thot_mask;
> + reg_val |= (t_hot<< __ffs(tsr->threshold_thot_mask));
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> + return -EIO;
> + }
> +
> + err = omap_control_readl(cdev, tsr->bgap_mask_ctrl,®_val);
> + reg_val |= tsr->mask_hot_mask;
> + reg_val |= tsr->mask_cold_mask;
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> + return -EIO;
> + }
> +
> + return err;
> +}
> +
> +static
> +int temp_sensor_configure_tcold(struct omap_bandgap *bg_ptr, int id,
> + int t_cold)
> +{
> + struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 thresh_val, reg_val;
> + int hot, err;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + /* obtain the T cold value */
> + err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> + hot = (thresh_val& tsr->threshold_thot_mask)>>
> + __ffs(tsr->threshold_thot_mask);
> +
> + if (t_cold>= hot) {
> + /* change the t_hot to t_cold + 5000 millidegrees */
> + err |= add_hyst(t_cold, ts_data->hyst_val, bg_ptr, id,&hot);
> + /* write the new t_hot value */
> + reg_val = thresh_val& (~tsr->threshold_thot_mask);
> + reg_val |= hot<< __ffs(tsr->threshold_thot_mask);
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + thresh_val = reg_val;
> + }
> +
> + /* write the new t_cold value */
> + reg_val = thresh_val& ~tsr->threshold_tcold_mask;
> + reg_val |= (t_cold<< __ffs(tsr->threshold_tcold_mask));
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
> + return -EIO;
> + }
> +
> + return temp_sensor_unmask_interrupts(bg_ptr, id, hot, t_cold);
> +}
> +
> +static int temp_sensor_configure_tshut_hot(struct omap_bandgap *bg_ptr,
> + int id, int tshut_hot)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 reg_val;
> + int err;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + err = omap_control_readl(cdev, tsr->tshut_threshold,®_val);
> + reg_val&= ~tsr->tshut_hot_mask;
> + reg_val |= tshut_hot<< __ffs(tsr->tshut_hot_mask);
> + err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram tshut thot\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +static int temp_sensor_configure_tshut_cold(struct omap_bandgap *bg_ptr,
> + int id, int tshut_cold)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 reg_val;
> + int err;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + err = omap_control_readl(cdev, tsr->tshut_threshold,®_val);
> + reg_val&= ~tsr->tshut_cold_mask;
> + reg_val |= tshut_cold<< __ffs(tsr->tshut_cold_mask);
> + err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +static int configure_temp_sensor_counter(struct omap_bandgap *bg_ptr, int id,
> + u32 counter)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 val;
> + int err;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + err = omap_control_readl(cdev, tsr->bgap_counter,&val);
> + val&= ~tsr->counter_mask;
> + val |= counter<< __ffs(tsr->counter_mask);
> + err |= omap_control_writel(cdev, val, tsr->bgap_counter);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +/* Exposed APIs */
> +/**
> + * omap_bandgap_read_thot() - reads sensor current thot
> + * @bg_ptr - pointer to bandgap instance
> + * @id - sensor id
> + * @thot - resulting current thot value
> + *
> + * returns 0 on success or the proper error code
> + */
> +int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id,
> + int *thot)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 temp;
> + int ret;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + ret = omap_control_readl(cdev, tsr->bgap_threshold,&temp);
> + temp = (temp& tsr->threshold_thot_mask)>>
> + __ffs(tsr->threshold_thot_mask);
> + ret |= adc_to_temp_conversion(bg_ptr, id, temp,&temp);
> + if (ret) {
> + dev_err(bg_ptr->dev, "failed to read thot\n");
> + return -EIO;
> + }
> +
> + *thot = temp;
> +
> + return 0;
> +}
> +
> +/**
> + * omap_bandgap_write_thot() - sets sensor current thot
> + * @bg_ptr - pointer to bandgap instance
> + * @id - sensor id
> + * @val - desired thot value
> + *
> + * returns 0 on success or the proper error code
> + */
> +int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val)
> +{
> + struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> + struct temp_sensor_registers *tsr;
> + u32 t_hot;
> + int ret;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> +
> + if (val< ts_data->min_temp + ts_data->hyst_val)
> + return -EINVAL;
> + ret = temp_to_adc_conversion(val, bg_ptr, id,&t_hot);
> + if (ret< 0)
> + return ret;
> +
> + mutex_lock(&bg_ptr->bg_mutex);
> + temp_sensor_configure_thot(bg_ptr, id, t_hot);
> + mutex_unlock(&bg_ptr->bg_mutex);
> +
> + return 0;
> +}
> +
> +/**
> + * omap_bandgap_read_tcold() - reads sensor current tcold
> + * @bg_ptr - pointer to bandgap instance
> + * @id - sensor id
> + * @tcold - resulting current tcold value
> + *
> + * returns 0 on success or the proper error code
> + */
> +int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id,
> + int *tcold)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 temp;
> + int ret;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + ret = omap_control_readl(cdev, tsr->bgap_threshold,&temp);
> + temp = (temp& tsr->threshold_tcold_mask)
> + >> __ffs(tsr->threshold_tcold_mask);
> + ret |= adc_to_temp_conversion(bg_ptr, id, temp,&temp);
> + if (ret)
> + return -EIO;
> +
> + *tcold = temp;
> +
> + return 0;
> +}
> +
> +/**
> + * omap_bandgap_write_tcold() - sets the sensor tcold
> + * @bg_ptr - pointer to bandgap instance
> + * @id - sensor id
> + * @val - desired tcold value
> + *
> + * returns 0 on success or the proper error code
> + */
> +int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val)
> +{
> + struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> + struct temp_sensor_registers *tsr;
> + u32 t_cold;
> + int ret;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + if (val> ts_data->max_temp + ts_data->hyst_val)
> + return -EINVAL;
> +
> + ret = temp_to_adc_conversion(val, bg_ptr, id,&t_cold);
> + if (ret< 0)
> + return ret;
> +
> + mutex_lock(&bg_ptr->bg_mutex);
> + temp_sensor_configure_tcold(bg_ptr, id, t_cold);
> + mutex_unlock(&bg_ptr->bg_mutex);
> +
> + return 0;
> +}
> +
> +/**
> + * omap_bandgap_read_update_interval() - read the sensor update interval
> + * @bg_ptr - pointer to bandgap instance
> + * @id - sensor id
> + * @interval - resulting update interval in miliseconds
> + *
> + * returns 0 on success or the proper error code
> + */
> +int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
> + int *interval)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 time;
> + int ret;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + ret = omap_control_readl(cdev, tsr->bgap_counter,&time);
> + if (ret)
> + return ret;
> + time = (time& tsr->counter_mask)>> __ffs(tsr->counter_mask);
> + time = time * 1000 / bg_ptr->clk_rate;
> +
> + *interval = time;
> +
> + return 0;
> +}
> +
> +/**
> + * omap_bandgap_write_update_interval() - set the update interval
> + * @bg_ptr - pointer to bandgap instance
> + * @id - sensor id
> + * @interval - desired update interval in miliseconds
> + *
> + * returns 0 on success or the proper error code
> + */
> +int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr,
> + int id, u32 interval)
> +{
> + interval = interval * bg_ptr->clk_rate / 1000;
> + mutex_lock(&bg_ptr->bg_mutex);
> + configure_temp_sensor_counter(bg_ptr, id, interval);
> + mutex_unlock(&bg_ptr->bg_mutex);
> +
> + return 0;
> +}
> +
> +/**
> + * omap_bandgap_read_temperature() - report current temperature
> + * @bg_ptr - pointer to bandgap instance
> + * @id - sensor id
> + * @temperature - resulting temperature
> + *
> + * returns 0 on success or the proper error code
> + */
> +int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
> + int *temperature)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 temp;
> + int ret;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + ret = omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> + temp&= tsr->bgap_dtemp_mask;
> +
> + ret |= adc_to_temp_conversion(bg_ptr, id, temp,&temp);
> + if (ret)
> + return -EIO;
> +
> + *temperature = temp;
> +
> + return 0;
> +}
> +
> +/**
> + * enable_continuous_mode() - One time enabling of continuous conversion mode
> + * @bg_ptr - pointer to scm instance
> + */
> +static int enable_continuous_mode(struct omap_bandgap *bg_ptr)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + int i, r;
> + u32 val;
> +
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> + tsr = bg_ptr->pdata->sensors[i].registers;
> + r = omap_control_readl(cdev, tsr->bgap_mode_ctrl,&val);
> + val |= 1<< __ffs(tsr->mode_ctrl_mask);
> + r |= omap_control_writel(cdev, val, tsr->bgap_mode_ctrl);
> + if (r)
> + dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> + }
> +
> + return r ? -EIO : 0;
> +}
> +
> +static int omap_bandgap_tshut_init(struct omap_bandgap *bg_ptr,
> + struct platform_device *pdev)
> +{
> + int gpio_nr = bg_ptr->tshut_gpio;
> + int status;
> +
> + /* Request for gpio_86 line */
> + status = gpio_request(gpio_nr, "tshut");
> + if (status< 0) {
> + dev_err(bg_ptr->dev,
> + "Could not request for TSHUT GPIO:%i\n", 86);
> + return status;
> + }
> + status = gpio_direction_input(gpio_nr);
> + if (status) {
> + dev_err(bg_ptr->dev,
> + "Cannot set input TSHUT GPIO %d\n", gpio_nr);
> + return status;
> + }
> +
> + status = request_irq(gpio_to_irq(gpio_nr),
> + omap_bandgap_tshut_irq_handler,
> + IRQF_TRIGGER_RISING, "tshut",
> + NULL);
> + if (status) {
> + gpio_free(gpio_nr);
> + dev_err(bg_ptr->dev, "request irq failed for TSHUT");
> + }
> +
> + return 0;
> +}
> +
> +static int omap_bandgap_talert_init(struct omap_bandgap *bg_ptr,
> + struct platform_device *pdev)
> +{
> + int ret;
> +
> + bg_ptr->irq = platform_get_irq(pdev, 0);
> + if (bg_ptr->irq< 0) {
> + dev_err(&pdev->dev, "get_irq failed\n");
> + return bg_ptr->irq;
> + }
> + ret = request_threaded_irq(bg_ptr->irq, NULL,
> + talert_irq_handler,
> + IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
> + "talert", bg_ptr);
> + if (ret) {
> + dev_err(&pdev->dev, "Request threaded irq failed.\n");
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static const struct omap_bandgap_data omap4460_data = {
> + .has_talert = true,
> + .has_tshut = true,
> + .fclock_name = "bandgap_ts_fclk",
> + .div_ck_name = "div_ts_ck",
None of these clock data should be there ideally. You should ensure that
the proper device alias will be there using clkdev entries.
Except that with DT, it will not work without the clock DT binding :-(
I think Rob posted a latest update based on CCF... but for the moment we
are stuck :-(
> + .conv_table = omap4460_adc_to_temp,
> + .sensors = {
> + {
> + .registers =&omap4460_mpu_temp_sensor_registers,
> + .ts_data =&omap4460_mpu_temp_sensor_data,
> + .domain = "cpu",
> + },
> + },
> + .sensor_count = 1,
> +};
> +
> +static const struct omap_bandgap_data omap5430_data = {
> + .has_talert = true,
> + .has_tshut = true,
> + .fclock_name = "ts_clk_div_ck",
> + .div_ck_name = "ts_clk_div_ck",
> + .conv_table = omap5430_adc_to_temp,
> + .sensors = {
> + {
> + .registers =&omap5430_mpu_temp_sensor_registers,
> + .ts_data =&omap5430_mpu_temp_sensor_data,
> + .domain = "cpu",
> + },
> + {
> + .registers =&omap5430_gpu_temp_sensor_registers,
> + .ts_data =&omap5430_gpu_temp_sensor_data,
> + .domain = "gpu",
> + },
> + {
> + .registers =&omap5430_core_temp_sensor_registers,
> + .ts_data =&omap5430_core_temp_sensor_data,
> + .domain = "core",
> + },
> + },
> + .sensor_count = 3,
It can probably be replaced by a sizeof.
> +};
> +
> +static const struct of_device_id of_omap_bandgap_match[] = {
> + /*
> + * TODO: Add support to 4430
> + * { .compatible = "ti,omap4430-bandgap", .data = , },
> + */
> + {
> + .compatible = "ti,omap4460-bandgap",
> + .data = (void *)&omap4460_data,
No need to cast toward a void *.
> + },
> + {
> + .compatible = "ti,omap5430-bandgap",
> + .data = (void *)&omap5430_data,
> + },
> + /* Sentinel */
> + { },
> +};
> +
> +static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
> +{
> + struct device_node *node = pdev->dev.of_node;
> + const struct of_device_id *of_id;
> + struct omap_bandgap *bg_ptr;
bg_ptr is not a super name.
> + u32 prop;
> +
> + /* just for the sake */
> + if (!node) {
> + dev_err(&pdev->dev, "no platform information available\n");
> + return ERR_PTR(-EINVAL);
> + }
Not needed, just do the of_match_device here directly.
> +
> + bg_ptr = devm_kzalloc(&pdev->dev, sizeof(struct omap_bandgap),
> + GFP_KERNEL);
> + if (!bg_ptr) {
> + dev_err(&pdev->dev, "Unable to allocate mem for driver ref\n");
> + return ERR_PTR(-ENOMEM);
> + }
> +
> + of_id = of_match_device(of_omap_bandgap_match,&pdev->dev);
> + if (of_id)
> + bg_ptr->pdata = of_id->data;
Nit: This is not really pdata anymore, so you should maybe remove the
"p" to avoid confusion.
> +
> + if (bg_ptr->pdata->has_tshut) {
> + if (of_property_read_u32(node, "ti,tshut-gpio",&prop)< 0) {
> + dev_err(&pdev->dev, "missing tshut gpio in device tree\n");
> + return ERR_PTR(-EINVAL);
> + }
> + bg_ptr->tshut_gpio = prop;
> + if (!gpio_is_valid(bg_ptr->tshut_gpio)) {
> + dev_err(&pdev->dev, "invalid gpio for tshut (%d)\n",
> + bg_ptr->tshut_gpio);
> + return ERR_PTR(-EINVAL);
> + }
> + }
> +
> + return bg_ptr;
> +}
> +
> +static
> +int __devinit omap_bandgap_probe(struct platform_device *pdev)
> +{
> + struct device *cdev = pdev->dev.parent;
> + struct omap_bandgap *bg_ptr;
> + int clk_rate, ret = 0, i;
> +
> + if (!cdev) {
> + dev_err(&pdev->dev, "no omap control ref in our parent\n");
> + return -EINVAL;
> + }
> +
> + bg_ptr = omap_bandgap_build(pdev);
> + if (IS_ERR_OR_NULL(bg_ptr)) {
> + dev_err(&pdev->dev, "failed to fetch platform data\n");
> + return PTR_ERR(bg_ptr);
> + }
> +
> + if (bg_ptr->pdata->has_talert) {
Nit2: Yeah, in fact instead of pdata, "conf" or "settings" seems to be
more representative of what this structure really contain.
> + ret = omap_bandgap_talert_init(bg_ptr, pdev);
> + if (ret) {
> + dev_err(&pdev->dev, "failed to initialize Talert IRQ\n");
> + return ret;
> + }
> + }
> +
> + if (bg_ptr->pdata->has_tshut) {
> + ret = omap_bandgap_tshut_init(bg_ptr, pdev);
> + if (ret) {
> + dev_err(&pdev->dev,
> + "failed to initialize system tshut IRQ\n");
> + goto free_talert;
> + }
> + }
> +
> + bg_ptr->fclock = clk_get(NULL, bg_ptr->pdata->fclock_name);
That's not good to get a clock without using the local dev alias.
But because of lack of clock DT binding yet, I'm not sure we have the
choice.
> + ret = IS_ERR_OR_NULL(bg_ptr->fclock);
> + if (ret) {
> + dev_err(&pdev->dev, "failed to request fclock reference\n");
> + goto free_irqs;
> + }
> +
> + bg_ptr->div_clk = clk_get(NULL, bg_ptr->pdata->div_ck_name);
> + ret = IS_ERR_OR_NULL(bg_ptr->div_clk);
> + if (ret) {
> + dev_err(&pdev->dev,
> + "failed to request div_ts_ck clock ref\n");
> + goto free_irqs;
> + }
> +
> + bg_ptr->conv_table = bg_ptr->pdata->conv_table;
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> + struct temp_sensor_registers *tsr;
> + u32 val;
> +
> + tsr = bg_ptr->pdata->sensors[i].registers;
> + /*
> + * check if the efuse has a non-zero value if not
> + * it is an untrimmed sample and the temperatures
> + * may not be accurate
> + */
> + ret = omap_control_readl(cdev, tsr->bgap_efuse,&val);
> + if (ret || !val)
> + dev_info(&pdev->dev,
> + "Non-trimmed BGAP, Temp not accurate\n");
> + }
> +
> + clk_rate = clk_round_rate(bg_ptr->div_clk,
> + bg_ptr->pdata->sensors[0].ts_data->max_freq);
> + if (clk_rate< bg_ptr->pdata->sensors[0].ts_data->min_freq ||
> + clk_rate == 0xffffffff) {
> + ret = -ENODEV;
> + goto put_clks;
> + }
> +
> + ret = clk_set_rate(bg_ptr->div_clk, clk_rate);
> + if (ret) {
> + dev_err(&pdev->dev, "Cannot set clock rate\n");
> + goto put_clks;
> + }
> +
> + bg_ptr->clk_rate = clk_rate;
> + clk_enable(bg_ptr->fclock);
> +
> + mutex_init(&bg_ptr->bg_mutex);
> + bg_ptr->dev =&pdev->dev;
> + platform_set_drvdata(pdev, bg_ptr);
> +
> + /* 1 clk cycle */
What does that mean exactly?
Regards,
Benoit
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
> + configure_temp_sensor_counter(bg_ptr, i, 1);
> +
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> + struct temp_sensor_data *ts_data;
> +
> + ts_data = bg_ptr->pdata->sensors[i].ts_data;
> +
> + temp_sensor_init_talert_thresholds(bg_ptr, i,
> + ts_data->t_hot,
> + ts_data->t_cold);
> + temp_sensor_configure_tshut_hot(bg_ptr, i,
> + ts_data->tshut_hot);
> + temp_sensor_configure_tshut_cold(bg_ptr, i,
> + ts_data->tshut_cold);
> + }
> +
> + enable_continuous_mode(bg_ptr);
> +
> + /* Set .250 seconds time as default counter */
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
> + configure_temp_sensor_counter(bg_ptr, i,
> + bg_ptr->clk_rate / 4);
> +
> + /* Every thing is good? Then expose the sensors */
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> + char *domain;
> +
> + domain = bg_ptr->pdata->sensors[i].domain;
> + if (bg_ptr->pdata->expose_sensor)
> + bg_ptr->pdata->expose_sensor(bg_ptr, i, domain);
> + }
> +
> + return 0;
> +
> +put_clks:
> + clk_disable(bg_ptr->fclock);
> + clk_put(bg_ptr->fclock);
> + clk_put(bg_ptr->div_clk);
> +free_irqs:
> + free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
> + gpio_free(bg_ptr->tshut_gpio);
> +free_talert:
> + free_irq(bg_ptr->irq, bg_ptr);
> +
> + return ret;
> +}
> +
> +static
> +int __devexit omap_bandgap_remove(struct platform_device *pdev)
> +{
> + struct omap_bandgap *bg_ptr = platform_get_drvdata(pdev);
> +
> + clk_disable(bg_ptr->fclock);
> + clk_put(bg_ptr->fclock);
> + clk_put(bg_ptr->div_clk);
> + free_irq(bg_ptr->irq, bg_ptr);
> + free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
> + gpio_free(bg_ptr->tshut_gpio);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_PM
> +static int omap_bandgap_save_ctxt(struct omap_bandgap *bg_ptr)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + int err = 0;
> + int i;
> +
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> + struct temp_sensor_registers *tsr;
> + struct temp_sensor_regval *rval;
> +
> + rval = bg_ptr->pdata->sensors[i].regval;
> + tsr = bg_ptr->pdata->sensors[i].registers;
> +
> + err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,
> + &rval->bg_mode_ctrl);
> + err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,
> + &rval->bg_ctrl);
> + err |= omap_control_readl(cdev, tsr->bgap_counter,
> + &rval->bg_counter);
> + err |= omap_control_readl(cdev, tsr->bgap_threshold,
> + &rval->bg_threshold);
> + err |= omap_control_readl(cdev, tsr->tshut_threshold,
> + &rval->tshut_threshold);
> +
> + if (err)
> + dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> + }
> +
> + return err ? -EIO : 0;
> +}
> +
> +static int
> +omap_bandgap_force_single_read(struct omap_bandgap *bg_ptr, int id)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 temp = 0, counter = 1000;
> + int err;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + /* Select single conversion mode */
> + err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,&temp);
> + temp&= ~(1<< __ffs(tsr->mode_ctrl_mask));
> + omap_control_writel(cdev, temp, tsr->bgap_mode_ctrl);
> +
> + /* Start of Conversion = 1 */
> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> + temp |= 1<< __ffs(tsr->bgap_soc_mask);
> + omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> + /* Wait until DTEMP is updated */
> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> + temp&= (tsr->bgap_dtemp_mask);
> + while ((temp == 0)&& --counter) {
> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> + temp&= (tsr->bgap_dtemp_mask);
> + }
> + /* Start of Conversion = 0 */
> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> + temp&= ~(1<< __ffs(tsr->bgap_soc_mask));
> + err |= omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> +
> + return err ? -EIO : 0;
> +}
> +
> +static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + int i, err = 0;
> + u32 temp = 0;
> +
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> + struct temp_sensor_registers *tsr;
> + struct temp_sensor_regval *rval;
> + u32 val;
> +
> + rval = bg_ptr->pdata->sensors[i].regval;
> + tsr = bg_ptr->pdata->sensors[i].registers;
> +
> + err = omap_control_readl(cdev, tsr->bgap_counter,&val);
> + if (val == 0) {
> + err |= omap_control_writel(cdev, rval->bg_threshold,
> + tsr->bgap_threshold);
> + err |= omap_control_writel(cdev, rval->tshut_threshold,
> + tsr->tshut_threshold);
> + /* Force immediate temperature measurement and update
> + * of the DTEMP field
> + */
> + omap_bandgap_force_single_read(bg_ptr, i);
> + err |= omap_control_writel(cdev, rval->bg_counter,
> + tsr->bgap_counter);
> + err |= omap_control_writel(cdev, rval->bg_mode_ctrl,
> + tsr->bgap_mode_ctrl);
> + err |= omap_control_writel(cdev, rval->bg_ctrl,
> + tsr->bgap_mask_ctrl);
> + } else {
> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,
> + &temp);
> + temp&= (tsr->bgap_dtemp_mask);
> + if (temp == 0) {
> + omap_bandgap_force_single_read(bg_ptr, i);
> + err |= omap_control_readl(cdev,
> + tsr->bgap_mask_ctrl,
> + &temp);
> + temp |= 1<< __ffs(tsr->mode_ctrl_mask);
> + err |= omap_control_writel(cdev, temp,
> + tsr->bgap_mask_ctrl);
> + }
> + }
> + if (err)
> + dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> + }
> +
> + return err ? -EIO : 0;
> +}
> +
> +static int omap_bandgap_suspend(struct device *dev)
> +{
> + struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
> + int err;
> +
> + err = omap_bandgap_save_ctxt(bg_ptr);
> + clk_disable(bg_ptr->fclock);
> +
> + return err;
> +}
> +
> +static int omap_bandgap_resume(struct device *dev)
> +{
> + struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
> +
> + clk_enable(bg_ptr->fclock);
> +
> + return omap_bandgap_restore_ctxt(bg_ptr);
> +}
> +static const struct dev_pm_ops omap_bandgap_dev_pm_ops = {
> + SET_SYSTEM_SLEEP_PM_OPS(omap_bandgap_suspend,
> + omap_bandgap_resume)
> +};
> +
> +#define DEV_PM_OPS (&omap_bandgap_dev_pm_ops)
> +#else
> +#define DEV_PM_OPS NULL
> +#endif
> +
> +static struct platform_driver omap_bandgap_sensor_driver = {
> + .probe = omap_bandgap_probe,
> + .remove = omap_bandgap_remove,
> + .driver = {
> + .name = "omap-bandgap",
> + .pm = DEV_PM_OPS,
> + .of_match_table = of_omap_bandgap_match,
> + },
> +};
> +
> +module_platform_driver(omap_bandgap_sensor_driver);
> +early_platform_init("early_omap_temperature",&omap_bandgap_sensor_driver);
> +
> +MODULE_DESCRIPTION("OMAP4+ bandgap temperature sensor driver");
> +MODULE_LICENSE("GPL v2");
> +MODULE_ALIAS("platform:omap-bandgap");
> +MODULE_AUTHOR("Texas Instrument Inc.");
> diff --git a/drivers/thermal/omap-bandgap.h b/drivers/thermal/omap-bandgap.h
> new file mode 100644
> index 0000000..12e0d6b
> --- /dev/null
> +++ b/drivers/thermal/omap-bandgap.h
> @@ -0,0 +1,63 @@
> +/*
> + * OMAP4 Bandgap temperature sensor driver
> + *
> + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
> + * Contact:
> + * Eduardo Valentin<eduardo.valentin@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
> + * 02110-1301 USA
> + *
> + */
> +#ifndef __OMAP_BANDGAP_H
> +#define __OMAP_BANDGAP_H
> +
> +struct omap_bandgap_data;
> +
> +/**
> + * struct omap_bandgap - bandgap device structure
> + * @dev: device pointer
> + * @pdata: platform data with sensor data
> + * @fclock: pointer to functional clock of temperature sensor
> + * @div_clk: pointer to parent clock of temperature sensor fclk
> + * @conv_table: Pointer to adc to temperature conversion table
> + * @bg_mutex: Mutex for sysfs, irq and PM
> + * @irq: MPU Irq number for thermal alert
> + * @tshut_gpio: GPIO where Tshut signal is routed
> + * @clk_rate: Holds current clock rate
> + */
> +struct omap_bandgap {
> + struct device *dev;
> + const struct omap_bandgap_data *pdata;
> + struct clk *fclock;
> + struct clk *div_clk;
> + const int *conv_table;
> + struct mutex bg_mutex; /* Mutex for irq and PM */
> + int irq;
> + int tshut_gpio;
> + u32 clk_rate;
> +};
> +
> +int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id, int *thot);
> +int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val);
> +int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id, int *tcold);
> +int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val);
> +int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
> + int *interval);
> +int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr, int id,
> + u32 interval);
> +int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
> + int *temperature);
> +
> +#endif
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
@ 2012-05-25 15:49 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-25 15:49 UTC (permalink / raw)
To: linux-arm-kernel
On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> In the System Control Module, OMAP supplies a voltage reference
> and a temperature sensor feature that are gathered in the band
> gap voltage and temperature sensor (VBGAPTS) module. The band
> gap provides current and voltage reference for its internal
> circuits and other analog IP blocks. The analog-to-digital
> converter (ADC) produces an output value that is proportional
> to the silicon temperature.
>
> This patch provides a platform driver which expose this feature.
> It is moduled as a MFD child of the System Control Module core
> MFD driver.
>
> This driver provides only APIs to access the device properties,
> like temperature, thresholds and update rate.
>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> Signed-off-by: Keerthy<j-keerthy@ti.com>
> ---
> .../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
> drivers/thermal/Kconfig | 13 +
> drivers/thermal/Makefile | 4 +-
> drivers/thermal/omap-bandgap.c | 1601 ++++++++++++++++++++
> drivers/thermal/omap-bandgap.h | 63 +
> 5 files changed, 1707 insertions(+), 1 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> create mode 100644 drivers/thermal/omap-bandgap.c
> create mode 100644 drivers/thermal/omap-bandgap.h
>
> diff --git a/Documentation/devicetree/bindings/thermal/omap_bandgap.txt b/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> new file mode 100644
> index 0000000..430bcf8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> @@ -0,0 +1,27 @@
> +* Texas Instrument OMAP SCM bandgap bindings
> +
> +In the System Control Module, OMAP supplies a voltage reference
> +and a temperature sensor feature that are gathered in the band
> +gap voltage and temperature sensor (VBGAPTS) module. The band
> +gap provides current and voltage reference for its internal
> +circuits and other analog IP blocks. The analog-to-digital
> +converter (ADC) produces an output value that is proportional
> +to the silicon temperature.
> +
> +Required properties:
> +- compatible : Should be:
> + - "ti,omap4460-control-bandgap" : for OMAP4460 bandgap
> + - "ti,omap5430-control-bandgap" : for OMAP5430 bandgap
> +- interrupts : this entry should indicate which interrupt line
> +the talert signal is routed to;
> +Specific:
> +- ti,tshut-gpio : this entry should be used to inform which GPIO
> +line the tshut signal is routed to;
> +
> +Example:
> +
> +bandgap {
> + compatible = "ti,omap4460-control-bandgap";
> + interrupts =<0 126 4>; /* talert */
> + ti,tshut-gpio =<86>;
> +};
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index 514a691..ffdd240 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -26,3 +26,16 @@ config SPEAR_THERMAL
> help
> Enable this to plug the SPEAr thermal sensor driver into the Linux
> thermal framework
> +
> +config OMAP_BANDGAP
> + tristate "Texas Instruments OMAP4+ temperature sensor driver"
> + depends on THERMAL
> + depends on MFD_OMAP_CONTROL
> + help
> + If you say yes here you get support for the Texas Instruments
> + OMAP4460+ on die bandgap temperature sensor support. The register
> + set is part of system control module.
> +
> + This includes alert interrupts generation and also the TSHUT
> + support.
> +
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index a9fff0b..5ff1af1 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -3,4 +3,6 @@
> #
>
> obj-$(CONFIG_THERMAL) += thermal_sys.o
> -obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
> \ No newline at end of file
> +obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
> +obj-$(CONFIG_OMAP_BANDGAP) += omap-thermal.o
> +omap-thermal-y := omap-bandgap.o
> diff --git a/drivers/thermal/omap-bandgap.c b/drivers/thermal/omap-bandgap.c
> new file mode 100644
> index 0000000..3d5a12b
> --- /dev/null
> +++ b/drivers/thermal/omap-bandgap.c
> @@ -0,0 +1,1601 @@
> +/*
> + * OMAP4 Bandgap temperature sensor driver
> + *
> + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> + * Author: J Keerthy<j-keerthy@ti.com>
> + * Author: Moiz Sonasath<m-sonasath@ti.com>
> + * Couple of fixes, DT and MFD adaptation:
> + * Eduardo Valentin<eduardo.valentin@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
> + * 02110-1301 USA
> + *
> + */
> +
> +#include<linux/module.h>
> +#include<linux/export.h>
> +#include<linux/init.h>
> +#include<linux/kernel.h>
> +#include<linux/interrupt.h>
> +#include<linux/clk.h>
> +#include<linux/gpio.h>
> +#include<linux/platform_device.h>
> +#include<linux/err.h>
> +#include<linux/types.h>
> +#include<linux/mutex.h>
> +#include<linux/reboot.h>
> +#include<linux/of_platform.h>
> +#include<linux/of_irq.h>
> +#include<linux/mfd/omap_control.h>
> +
> +#include<mach/control.h>
> +
> +#include "omap-bandgap.h"
> +
> +/* Offsets from the base of temperature sensor registers */
> +
> +#define OMAP4460_TEMP_SENSOR_CTRL_OFFSET 0x32C
> +#define OMAP4460_BGAP_CTRL_OFFSET 0x378
> +#define OMAP4460_BGAP_COUNTER_OFFSET 0x37C
> +#define OMAP4460_BGAP_THRESHOLD_OFFSET 0x380
> +#define OMAP4460_BGAP_TSHUT_OFFSET 0x384
> +#define OMAP4460_BGAP_STATUS_OFFSET 0x388
> +#define OMAP4460_FUSE_OPP_BGAP 0x260
> +
> +#define OMAP5430_TEMP_SENSOR_MPU_OFFSET 0x32C
> +#define OMAP5430_BGAP_CTRL_OFFSET 0x380
> +#define OMAP5430_BGAP_COUNTER_MPU_OFFSET 0x39C
> +#define OMAP5430_BGAP_THRESHOLD_MPU_OFFSET 0x384
> +#define OMAP5430_BGAP_TSHUT_MPU_OFFSET 0x390
> +#define OMAP5430_BGAP_STATUS_OFFSET 0x3A8
> +#define OMAP5430_FUSE_OPP_BGAP_MPU 0x1E4
> +
> +#define OMAP5430_TEMP_SENSOR_GPU_OFFSET 0x330
> +#define OMAP5430_BGAP_COUNTER_GPU_OFFSET 0x3A0
> +#define OMAP5430_BGAP_THRESHOLD_GPU_OFFSET 0x388
> +#define OMAP5430_BGAP_TSHUT_GPU_OFFSET 0x394
> +#define OMAP5430_FUSE_OPP_BGAP_GPU 0x1E0
> +
> +#define OMAP5430_TEMP_SENSOR_CORE_OFFSET 0x334
> +#define OMAP5430_BGAP_COUNTER_CORE_OFFSET 0x3A4
> +#define OMAP5430_BGAP_THRESHOLD_CORE_OFFSET 0x38C
> +#define OMAP5430_BGAP_TSHUT_CORE_OFFSET 0x398
> +#define OMAP5430_FUSE_OPP_BGAP_CORE 0x1E8
> +
> +#define OMAP4460_TSHUT_HOT 900 /* 122 deg C */
> +#define OMAP4460_TSHUT_COLD 895 /* 100 deg C */
> +#define OMAP4460_T_HOT 800 /* 73 deg C */
> +#define OMAP4460_T_COLD 795 /* 71 deg C */
> +#define OMAP4460_MAX_FREQ 1500000
> +#define OMAP4460_MIN_FREQ 1000000
> +#define OMAP4460_MIN_TEMP -40000
> +#define OMAP4460_MAX_TEMP 123000
> +#define OMAP4460_HYST_VAL 5000
> +#define OMAP4460_ADC_START_VALUE 530
> +#define OMAP4460_ADC_END_VALUE 932
> +
> +#define OMAP5430_MPU_TSHUT_HOT 915
> +#define OMAP5430_MPU_TSHUT_COLD 900
> +#define OMAP5430_MPU_T_HOT 800
> +#define OMAP5430_MPU_T_COLD 795
> +#define OMAP5430_MPU_MAX_FREQ 1500000
> +#define OMAP5430_MPU_MIN_FREQ 1000000
> +#define OMAP5430_MPU_MIN_TEMP -40000
> +#define OMAP5430_MPU_MAX_TEMP 125000
> +#define OMAP5430_MPU_HYST_VAL 5000
> +#define OMAP5430_ADC_START_VALUE 532
> +#define OMAP5430_ADC_END_VALUE 934
> +
> +#define OMAP5430_GPU_TSHUT_HOT 915
> +#define OMAP5430_GPU_TSHUT_COLD 900
> +#define OMAP5430_GPU_T_HOT 800
> +#define OMAP5430_GPU_T_COLD 795
> +#define OMAP5430_GPU_MAX_FREQ 1500000
> +#define OMAP5430_GPU_MIN_FREQ 1000000
> +#define OMAP5430_GPU_MIN_TEMP -40000
> +#define OMAP5430_GPU_MAX_TEMP 125000
> +#define OMAP5430_GPU_HYST_VAL 5000
> +
> +#define OMAP5430_CORE_TSHUT_HOT 915
> +#define OMAP5430_CORE_TSHUT_COLD 900
> +#define OMAP5430_CORE_T_HOT 800
> +#define OMAP5430_CORE_T_COLD 795
> +#define OMAP5430_CORE_MAX_FREQ 1500000
> +#define OMAP5430_CORE_MIN_FREQ 1000000
> +#define OMAP5430_CORE_MIN_TEMP -40000
> +#define OMAP5430_CORE_MAX_TEMP 125000
> +#define OMAP5430_CORE_HYST_VAL 5000
> +
> +/**
> + * The register offsets and bit fields might change across
> + * OMAP versions hence populating them in this structure.
> + */
> +
> +struct temp_sensor_registers {
> + u32 temp_sensor_ctrl;
> + u32 bgap_tempsoff_mask;
> + u32 bgap_soc_mask;
> + u32 bgap_eocz_mask;
> + u32 bgap_dtemp_mask;
> +
> + u32 bgap_mask_ctrl;
> + u32 mask_hot_mask;
> + u32 mask_cold_mask;
> +
> + u32 bgap_mode_ctrl;
> + u32 mode_ctrl_mask;
> +
> + u32 bgap_counter;
> + u32 counter_mask;
> +
> + u32 bgap_threshold;
> + u32 threshold_thot_mask;
> + u32 threshold_tcold_mask;
> +
> + u32 tshut_threshold;
> + u32 tshut_hot_mask;
> + u32 tshut_cold_mask;
> +
> + u32 bgap_status;
> + u32 status_clean_stop_mask;
> + u32 status_bgap_alert_mask;
> + u32 status_hot_mask;
> + u32 status_cold_mask;
> +
> + u32 bgap_efuse;
> +};
> +
> +/**
> + * The thresholds and limits for temperature sensors.
> + */
> +struct temp_sensor_data {
> + u32 tshut_hot;
> + u32 tshut_cold;
> + u32 t_hot;
> + u32 t_cold;
> + u32 min_freq;
> + u32 max_freq;
> + int max_temp;
> + int min_temp;
> + int hyst_val;
> + u32 adc_start_val;
> + u32 adc_end_val;
> + u32 update_int1;
> + u32 update_int2;
> +};
> +
> +/**
> + * struct temp_sensor_regval - temperature sensor register values
> + * @bg_mode_ctrl: temp sensor control register value
> + * @bg_ctrl: bandgap ctrl register value
> + * @bg_counter: bandgap counter value
> + * @bg_threshold: bandgap threshold register value
> + * @tshut_threshold: bandgap tshut register value
> + */
> +struct temp_sensor_regval {
> + u32 bg_mode_ctrl;
> + u32 bg_ctrl;
> + u32 bg_counter;
> + u32 bg_threshold;
> + u32 tshut_threshold;
> +};
> +
> +/**
> + * struct omap_temp_sensor - bandgap temperature sensor platform data
> + * @ts_data: pointer to struct with thresholds, limits of temperature sensor
> + * @registers: pointer to the list of register offsets and bitfields
> + * @regval: temperature sensor register values
> + * @domain: the name of the domain where the sensor is located
> + */
> +struct omap_temp_sensor {
> + struct temp_sensor_data *ts_data;
> + struct temp_sensor_registers *registers;
> + struct temp_sensor_regval *regval;
> + char *domain;
> +};
> +
> +/**
> + * struct omap_bandgap_data - bandgap platform data structure
> + * @has_talert: indicates if the chip has talert output line
> + * @has_tshut: indicates if the chip has tshut output line
> + * @conv_table: Pointer to adc to temperature conversion table
> + * @fclock_name: clock name of the functional clock
> + * @div_ck_nme: clock name of the clock divisor
> + * @sensor_count: count of temperature sensor device in scm
> + * @sensors: array of sensors present in this bandgap instance
> + * @expose_sensor: callback to export sensor to thermal API
> + */
> +struct omap_bandgap_data {
> + bool has_talert;
> + bool has_tshut;
> + const int *conv_table;
> + char *fclock_name;
> + char *div_ck_name;
> + int sensor_count;
> + int (*report_temperature)(struct omap_bandgap *bg_ptr, int id);
> + int (*expose_sensor)(struct omap_bandgap *bg_ptr, int id, char *domain);
> +
> + /* this needs to be at the end */
> + struct omap_temp_sensor sensors[];
> +};
> +
> +/* TODO: provide data structures for 4430 */
> +
> +/*
> + * OMAP4460 has one instance of thermal sensor for MPU
> + * need to describe the individual bit fields
> + */
> +static struct temp_sensor_registers
> +omap4460_mpu_temp_sensor_registers = {
> + .temp_sensor_ctrl = OMAP4460_TEMP_SENSOR_CTRL_OFFSET,
> + .bgap_tempsoff_mask = OMAP4460_BGAP_TEMPSOFF_MASK,
> + .bgap_soc_mask = OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK,
> + .bgap_eocz_mask = OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK,
> + .bgap_dtemp_mask = OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK,
> +
> + .bgap_mask_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
> + .mask_hot_mask = OMAP4460_MASK_HOT_MASK,
> + .mask_cold_mask = OMAP4460_MASK_COLD_MASK,
> +
> + .bgap_mode_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
> + .mode_ctrl_mask = OMAP4460_SINGLE_MODE_MASK,
> +
> + .bgap_counter = OMAP4460_BGAP_COUNTER_OFFSET,
> + .counter_mask = OMAP4460_COUNTER_MASK,
> +
> + .bgap_threshold = OMAP4460_BGAP_THRESHOLD_OFFSET,
> + .threshold_thot_mask = OMAP4460_T_HOT_MASK,
> + .threshold_tcold_mask = OMAP4460_T_COLD_MASK,
> +
> + .tshut_threshold = OMAP4460_BGAP_TSHUT_OFFSET,
> + .tshut_hot_mask = OMAP4460_TSHUT_HOT_MASK,
> + .tshut_cold_mask = OMAP4460_TSHUT_COLD_MASK,
> +
> + .bgap_status = OMAP4460_BGAP_STATUS_OFFSET,
> + .status_clean_stop_mask = OMAP4460_CLEAN_STOP_MASK,
> + .status_bgap_alert_mask = OMAP4460_BGAP_ALERT_MASK,
> + .status_hot_mask = OMAP4460_HOT_FLAG_MASK,
> + .status_cold_mask = OMAP4460_COLD_FLAG_MASK,
> +
> + .bgap_efuse = OMAP4460_FUSE_OPP_BGAP,
> +};
> +
> +/*
> + * OMAP4460 has one instance of thermal sensor for MPU
Bad copy paste.
> + * need to describe the individual bit fields
> + */
> +static struct temp_sensor_registers
> +omap5430_mpu_temp_sensor_registers = {
> + .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_MPU_OFFSET,
> + .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
> + .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
> + .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
> + .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
> +
> + .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
> + .mask_hot_mask = OMAP5430_MASK_HOT_MPU_MASK,
> + .mask_cold_mask = OMAP5430_MASK_COLD_MPU_MASK,
> +
> + .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
> + .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
> +
> + .bgap_counter = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
> + .counter_mask = OMAP5430_COUNTER_MASK,
> +
> + .bgap_threshold = OMAP5430_BGAP_THRESHOLD_MPU_OFFSET,
> + .threshold_thot_mask = OMAP5430_T_HOT_MASK,
> + .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
> +
> + .tshut_threshold = OMAP5430_BGAP_TSHUT_MPU_OFFSET,
> + .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
> + .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
> +
> + .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
> + .status_clean_stop_mask = 0x0,
> + .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
> + .status_hot_mask = OMAP5430_HOT_MPU_FLAG_MASK,
> + .status_cold_mask = OMAP5430_COLD_MPU_FLAG_MASK,
> +
> + .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_MPU,
> +};
> +
> +/*
> + * OMAP4460 has one instance of thermal sensor for MPU
> + * need to describe the individual bit fields
> + */
Ditto
> +static struct temp_sensor_registers
> +omap5430_gpu_temp_sensor_registers = {
> + .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_GPU_OFFSET,
> + .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
> + .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
> + .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
> + .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
> +
> + .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
> + .mask_hot_mask = OMAP5430_MASK_HOT_MM_MASK,
> + .mask_cold_mask = OMAP5430_MASK_COLD_MM_MASK,
> +
> + .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
> + .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
> +
> + .bgap_counter = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
> + .counter_mask = OMAP5430_COUNTER_MASK,
> +
> + .bgap_threshold = OMAP5430_BGAP_THRESHOLD_GPU_OFFSET,
> + .threshold_thot_mask = OMAP5430_T_HOT_MASK,
> + .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
> +
> + .tshut_threshold = OMAP5430_BGAP_TSHUT_GPU_OFFSET,
> + .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
> + .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
> +
> + .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
> + .status_clean_stop_mask = 0x0,
> + .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
> + .status_hot_mask = OMAP5430_HOT_MM_FLAG_MASK,
> + .status_cold_mask = OMAP5430_COLD_MM_FLAG_MASK,
> +
> + .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_GPU,
> +};
> +
> +/*
> + * OMAP4460 has one instance of thermal sensor for MPU
> + * need to describe the individual bit fields
> + */
Ditto
> +static struct temp_sensor_registers
> +omap5430_core_temp_sensor_registers = {
> + .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_CORE_OFFSET,
> + .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
> + .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
> + .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
> + .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
> +
> + .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
> + .mask_hot_mask = OMAP5430_MASK_HOT_CORE_MASK,
> + .mask_cold_mask = OMAP5430_MASK_COLD_CORE_MASK,
> +
> + .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
> + .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
> +
> + .bgap_counter = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
> + .counter_mask = OMAP5430_COUNTER_MASK,
> +
> + .bgap_threshold = OMAP5430_BGAP_THRESHOLD_CORE_OFFSET,
> + .threshold_thot_mask = OMAP5430_T_HOT_MASK,
> + .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
> +
> + .tshut_threshold = OMAP5430_BGAP_TSHUT_CORE_OFFSET,
> + .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
> + .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
> +
> + .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
> + .status_clean_stop_mask = 0x0,
> + .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
> + .status_hot_mask = OMAP5430_HOT_CORE_FLAG_MASK,
> + .status_cold_mask = OMAP5430_COLD_CORE_FLAG_MASK,
> +
> + .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_CORE,
> +};
> +
> +/* Thresholds and limits for OMAP4460 MPU temperature sensor */
> +static struct temp_sensor_data omap4460_mpu_temp_sensor_data = {
> + .tshut_hot = OMAP4460_TSHUT_HOT,
> + .tshut_cold = OMAP4460_TSHUT_COLD,
> + .t_hot = OMAP4460_T_HOT,
> + .t_cold = OMAP4460_T_COLD,
> + .min_freq = OMAP4460_MIN_FREQ,
> + .max_freq = OMAP4460_MAX_FREQ,
> + .max_temp = OMAP4460_MAX_TEMP,
> + .min_temp = OMAP4460_MIN_TEMP,
> + .hyst_val = OMAP4460_HYST_VAL,
> + .adc_start_val = OMAP4460_ADC_START_VALUE,
> + .adc_end_val = OMAP4460_ADC_END_VALUE,
> + .update_int1 = 1000,
> + .update_int2 = 2000,
> +};
> +
> +/* Thresholds and limits for OMAP5430 MPU temperature sensor */
> +static struct temp_sensor_data omap5430_mpu_temp_sensor_data = {
> + .tshut_hot = OMAP5430_MPU_TSHUT_HOT,
> + .tshut_cold = OMAP5430_MPU_TSHUT_COLD,
> + .t_hot = OMAP5430_MPU_T_HOT,
> + .t_cold = OMAP5430_MPU_T_COLD,
> + .min_freq = OMAP5430_MPU_MIN_FREQ,
> + .max_freq = OMAP5430_MPU_MAX_FREQ,
> + .max_temp = OMAP5430_MPU_MAX_TEMP,
> + .min_temp = OMAP5430_MPU_MIN_TEMP,
> + .hyst_val = OMAP5430_MPU_HYST_VAL,
> + .adc_start_val = OMAP5430_ADC_START_VALUE,
> + .adc_end_val = OMAP5430_ADC_END_VALUE,
> + .update_int1 = 1000,
> + .update_int2 = 2000,
> +};
> +
> +/* Thresholds and limits for OMAP5430 GPU temperature sensor */
> +static struct temp_sensor_data omap5430_gpu_temp_sensor_data = {
> + .tshut_hot = OMAP5430_GPU_TSHUT_HOT,
> + .tshut_cold = OMAP5430_GPU_TSHUT_COLD,
> + .t_hot = OMAP5430_GPU_T_HOT,
> + .t_cold = OMAP5430_GPU_T_COLD,
> + .min_freq = OMAP5430_GPU_MIN_FREQ,
> + .max_freq = OMAP5430_GPU_MAX_FREQ,
> + .max_temp = OMAP5430_GPU_MAX_TEMP,
> + .min_temp = OMAP5430_GPU_MIN_TEMP,
> + .hyst_val = OMAP5430_GPU_HYST_VAL,
> + .adc_start_val = OMAP5430_ADC_START_VALUE,
> + .adc_end_val = OMAP5430_ADC_END_VALUE,
> + .update_int1 = 1000,
> + .update_int2 = 2000,
> +};
> +
> +/* Thresholds and limits for OMAP5430 CORE temperature sensor */
> +static struct temp_sensor_data omap5430_core_temp_sensor_data = {
> + .tshut_hot = OMAP5430_CORE_TSHUT_HOT,
> + .tshut_cold = OMAP5430_CORE_TSHUT_COLD,
> + .t_hot = OMAP5430_CORE_T_HOT,
> + .t_cold = OMAP5430_CORE_T_COLD,
> + .min_freq = OMAP5430_CORE_MIN_FREQ,
> + .max_freq = OMAP5430_CORE_MAX_FREQ,
> + .max_temp = OMAP5430_CORE_MAX_TEMP,
> + .min_temp = OMAP5430_CORE_MIN_TEMP,
> + .hyst_val = OMAP5430_CORE_HYST_VAL,
> + .adc_start_val = OMAP5430_ADC_START_VALUE,
> + .adc_end_val = OMAP5430_ADC_END_VALUE,
> + .update_int1 = 1000,
> + .update_int2 = 2000,
> +};
> +
> +/*
> + * Temperature values in milli degree celsius
> + * ADC code values from 530 to 923
> + */
> +static const int
> +omap4460_adc_to_temp[OMAP4460_ADC_END_VALUE - OMAP4460_ADC_START_VALUE + 1] = {
> + -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600, -38200,
> + -37800, -37300, -36800, -36400, -36000, -35600, -35200, -34800,
> + -34300, -33800, -33400, -33000, -32600, -32200, -31800, -31300,
> + -30800, -30400, -30000, -29600, -29200, -28700, -28200, -27800,
> + -27400, -27000, -26600, -26200, -25700, -25200, -24800, -24400,
> + -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
> + -20600, -20200, -19700, -19200, -18800, -18400, -18000, -17600,
> + -17200, -16700, -16200, -15800, -15400, -15000, -14600, -14200,
> + -13700, -13200, -12800, -12400, -12000, -11600, -11200, -10700,
> + -10200, -9800, -9400, -9000, -8600, -8200, -7700, -7200, -6800,
> + -6400, -6000, -5600, -5200, -4800, -4300, -3800, -3400, -3000,
> + -2600, -2200, -1800, -1300, -800, -400, 0, 400, 800, 1200, 1600,
> + 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000, 6400,
> + 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10600, 11000,
> + 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800,
> + 15300, 15800, 16200, 16600, 17000, 17400, 17800, 18200, 18700,
> + 19200, 19600, 20000, 20400, 20800, 21200, 21600, 22100, 22600,
> + 23000, 23400, 23800, 24200, 24600, 25000, 25400, 25900, 26400,
> + 26800, 27200, 27600, 28000, 28400, 28800, 29300, 29800, 30200,
> + 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
> + 34400, 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800,
> + 38200, 38600, 39000, 39400, 39800, 40200, 40600, 41100, 41600,
> + 42000, 42400, 42800, 43200, 43600, 44000, 44400, 44800, 45300,
> + 45800, 46200, 46600, 47000, 47400, 47800, 48200, 48600, 49000,
> + 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400, 52800,
> + 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600,
> + 57000, 57400, 57800, 58200, 58700, 59200, 59600, 60000, 60400,
> + 60800, 61200, 61600, 62000, 62400, 62800, 63300, 63800, 64200,
> + 64600, 65000, 65400, 65800, 66200, 66600, 67000, 67400, 67800,
> + 68200, 68700, 69200, 69600, 70000, 70400, 70800, 71200, 71600,
> + 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
> + 75800, 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000,
> + 79400, 79800, 80300, 80800, 81200, 81600, 82000, 82400, 82800,
> + 83200, 83600, 84000, 84400, 84800, 85200, 85600, 86000, 86400,
> + 86800, 87300, 87800, 88200, 88600, 89000, 89400, 89800, 90200,
> + 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400, 93800,
> + 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600,
> + 98000, 98400, 98800, 99200, 99600, 100000, 100400, 100800, 101200,
> + 101600, 102000, 102400, 102800, 103200, 103600, 104000, 104400,
> + 104800, 105200, 105600, 106100, 106600, 107000, 107400, 107800,
> + 108200, 108600, 109000, 109400, 109800, 110200, 110600, 111000,
> + 111400, 111800, 112200, 112600, 113000, 113400, 113800, 114200,
> + 114600, 115000, 115400, 115800, 116200, 116600, 117000, 117400,
> + 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
> + 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
> + 124600, 124900, 125000, 125000, 125000, 125000
> +};
> +
> +static const int
> +omap5430_adc_to_temp[OMAP5430_ADC_END_VALUE - OMAP5430_ADC_START_VALUE + 1] = {
> + -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600,
> + -38200, -37800, -37300, -36800,
> + -36400, -36000, -35600, -35200, -34800, -34300, -33800, -33400, -33000,
> + -32600,
> + -32200, -31800, -31300, -30800, -30400, -30000, -29600, -29200, -28700,
> + -28200, -27800, -27400, -27000, -26600, -26200, -25700, -25200, -24800,
> + -24400, -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
> + -20600, -20200, -19700, -19200, -9300, -18400, -18000, -17600, -17200,
> + -16700, -16200, -15800, -15400, -15000, -14600, -14200, -13700, -13200,
> + -12800, -12400, -12000, -11600, -11200, -10700, -10200, -9800, -9400,
> + -9000,
> + -8600, -8200, -7700, -7200, -6800, -6400, -6000, -5600, -5200, -4800,
> + -4300,
> + -3800, -3400, -3000, -2600, -2200, -1800, -1300, -800, -400, 0, 400,
> + 800,
> + 1200, 1600, 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000,
> + 6400, 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10800,
> + 11100,
> + 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800, 15300,
> + 15800,
> + 16200, 16600, 17000, 17400, 17800, 18200, 18700, 19200, 19600, 20000,
> + 20400,
> + 20800, 21200, 21600, 22100, 22600, 23000, 23400, 23800, 24200, 24600,
> + 25000,
> + 25400, 25900, 26400, 26800, 27200, 27600, 28000, 28400, 28800, 29300,
> + 29800,
> + 30200, 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
> + 34400,
> + 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800, 38200, 38600,
> + 39000,
> + 39400, 39800, 40200, 40600, 41100, 41600, 42000, 42400, 42800, 43200,
> + 43600,
> + 44000, 44400, 44800, 45300, 45800, 46200, 46600, 47000, 47400, 47800,
> + 48200,
> + 48600, 49000, 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400,
> + 52800,
> + 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600, 57000,
> + 57400,
> + 57800, 58200, 58700, 59200, 59600, 60000, 60400, 60800, 61200, 61600,
> + 62000,
> + 62400, 62800, 63300, 63800, 64200, 64600, 65000, 65400, 65800, 66200,
> + 66600,
> + 67000, 67400, 67800, 68200, 68700, 69200, 69600, 70000, 70400, 70800,
> + 71200,
> + 71600, 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
> + 75800,
> + 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000, 79400, 79800,
> + 80300,
> + 80800, 81200, 81600, 82000, 82400, 82800, 83200, 83600, 84000, 84400,
> + 84800,
> + 85200, 85600, 86000, 86400, 86800, 87300, 87800, 88200, 88600, 89000,
> + 89400,
> + 89800, 90200, 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400,
> + 93800,
> + 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600, 98000,
> + 98400,
> + 98800, 99200, 99600, 100000, 100400, 100800, 101200, 101600, 102000,
> + 102400,
> + 102800, 103200, 103600, 104000, 104400, 104800, 105200, 105600, 106100,
> + 106600, 107000, 107400, 107800, 108200, 108600, 109000, 109400, 109800,
> + 110200, 110600, 111000, 111400, 111800, 112200, 112600, 113000, 113400,
> + 113800, 114200, 114600, 115000, 115400, 115800, 116200, 116600, 117000,
> + 117400, 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
> + 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
> + 124600, 124900, 125000, 125000, 125000, 125000,
> +};
It might be good to store the per SoC data in dedicated files or at
least put some #ifdef around to avoid wasting memory for a non-multi
OMAP boot.
> +
> +static irqreturn_t talert_irq_handler(int irq, void *data)
> +{
> + struct omap_bandgap *bg_ptr = data;
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 t_hot = 0, t_cold = 0, temp, ctrl;
> + int i, r;
> +
> + bg_ptr = data;
> + /* Read the status of t_hot */
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> + tsr = bg_ptr->pdata->sensors[i].registers;
> + r = omap_control_readl(cdev, tsr->bgap_status,&t_hot);
> + t_hot&= tsr->status_hot_mask;
> +
> + /* Read the status of t_cold */
> + r |= omap_control_readl(cdev, tsr->bgap_status,&t_cold);
> + t_cold&= tsr->status_cold_mask;
> +
> + if (!t_cold&& !t_hot)
> + continue;
> +
> + r |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,&ctrl);
> + /*
> + * One TALERT interrupt: Two sources
> + * If the interrupt is due to t_hot then mask t_hot and
> + * and unmask t_cold else mask t_cold and unmask t_hot
> + */
> + if (t_hot) {
> + ctrl&= ~tsr->mask_hot_mask;
> + ctrl |= tsr->mask_cold_mask;
> + } else if (t_cold) {
> + ctrl&= ~tsr->mask_cold_mask;
> + ctrl |= tsr->mask_hot_mask;
> + }
> +
> + r |= omap_control_writel(cdev, ctrl, tsr->bgap_mask_ctrl);
> +
> + if (r) {
> + dev_err(bg_ptr->dev, "failed to ack talert interrupt\n");
> + return IRQ_NONE;
> + }
> +
> + /* read temperature */
> + r = omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> + temp&= tsr->bgap_dtemp_mask;
> +
> + /* report temperature to whom may concern */
> + if (bg_ptr->pdata->report_temperature)
> + bg_ptr->pdata->report_temperature(bg_ptr, i);
> + }
> +
> + return IRQ_HANDLED;
> +}
> +
> +static irqreturn_t omap_bandgap_tshut_irq_handler(int irq, void *data)
> +{
> + orderly_poweroff(true);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static
> +int adc_to_temp_conversion(struct omap_bandgap *bg_ptr, int id, int adc_val,
> + int *t)
> +{
> + struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> +
> + /* look up for temperature in the table and return the temperature */
> + if (adc_val< ts_data->adc_start_val || adc_val> ts_data->adc_end_val)
> + return -ERANGE;
> +
> + *t = bg_ptr->conv_table[adc_val - ts_data->adc_start_val];
> +
> + return 0;
> +}
> +
> +static int temp_to_adc_conversion(long temp, struct omap_bandgap *bg_ptr, int i,
> + int *adc)
> +{
> + struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[i].ts_data;
> + int high, low, mid;
> +
> + low = 0;
> + high = ts_data->adc_end_val - ts_data->adc_start_val;
> + mid = (high + low) / 2;
> +
> + if (temp< bg_ptr->conv_table[high] || temp> bg_ptr->conv_table[high])
> + return -EINVAL;
> +
> + while (low< high) {
> + if (temp< bg_ptr->conv_table[mid])
> + high = mid - 1;
> + else
> + low = mid + 1;
> + mid = (low + high) / 2;
> + }
> +
> + *adc = ts_data->adc_start_val + low;
> +
> + return 0;
> +}
> +
> +static int temp_sensor_unmask_interrupts(struct omap_bandgap *bg_ptr, int id,
> + u32 t_hot, u32 t_cold)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 temp, reg_val;
> + int err;
> +
> + /* Read the current on die temperature */
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + err = omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> + temp&= tsr->bgap_dtemp_mask;
> +
> + err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,®_val);
> + if (temp< t_hot)
> + reg_val |= tsr->mask_hot_mask;
> + else
> + reg_val&= ~tsr->mask_hot_mask;
> +
> + if (t_cold< temp)
> + reg_val |= tsr->mask_cold_mask;
> + else
> + reg_val&= ~tsr->mask_cold_mask;
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
> +
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to unmask interrupts\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +static
> +int add_hyst(int adc_val, int hyst_val, struct omap_bandgap *bg_ptr, int i,
> + u32 *sum)
> +{
> + int temp, ret;
> +
> + ret = adc_to_temp_conversion(bg_ptr, i, adc_val,&temp);
> + if (ret< 0)
> + return ret;
> +
> + temp += hyst_val;
> +
> + return temp_to_adc_conversion(temp, bg_ptr, i, sum);
> +}
> +
> +static
> +int temp_sensor_configure_thot(struct omap_bandgap *bg_ptr, int id, int t_hot)
> +{
> + struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 thresh_val, reg_val;
> + int cold, err;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> +
> + /* obtain the T cold value */
> + err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> + cold = (thresh_val& tsr->threshold_tcold_mask)>>
> + __ffs(tsr->threshold_tcold_mask);
> + if (t_hot<= cold) {
> + /* change the t_cold to t_hot - 5000 millidegrees */
> + err |= add_hyst(t_hot, -ts_data->hyst_val, bg_ptr, id,&cold);
> + /* write the new t_cold value */
> + reg_val = thresh_val& (~tsr->threshold_tcold_mask);
> + reg_val |= cold<< __ffs(tsr->threshold_tcold_mask);
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + thresh_val = reg_val;
> + }
> +
> + /* write the new t_hot value */
> + reg_val = thresh_val& ~tsr->threshold_thot_mask;
> + reg_val |= (t_hot<< __ffs(tsr->threshold_thot_mask));
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> + return -EIO;
> + }
> +
> + return temp_sensor_unmask_interrupts(bg_ptr, id, t_hot, cold);
> +}
> +
> +static
> +int temp_sensor_init_talert_thresholds(struct omap_bandgap *bg_ptr, int id,
> + int t_hot, int t_cold)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 reg_val, thresh_val;
> + int err;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> +
> + /* write the new t_cold value */
> + reg_val = thresh_val& ~tsr->threshold_tcold_mask;
> + reg_val |= (t_cold<< __ffs(tsr->threshold_tcold_mask));
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
> + return -EIO;
> + }
> +
> + err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> +
> + /* write the new t_hot value */
> + reg_val = thresh_val& ~tsr->threshold_thot_mask;
> + reg_val |= (t_hot<< __ffs(tsr->threshold_thot_mask));
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> + return -EIO;
> + }
> +
> + err = omap_control_readl(cdev, tsr->bgap_mask_ctrl,®_val);
> + reg_val |= tsr->mask_hot_mask;
> + reg_val |= tsr->mask_cold_mask;
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> + return -EIO;
> + }
> +
> + return err;
> +}
> +
> +static
> +int temp_sensor_configure_tcold(struct omap_bandgap *bg_ptr, int id,
> + int t_cold)
> +{
> + struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 thresh_val, reg_val;
> + int hot, err;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + /* obtain the T cold value */
> + err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> + hot = (thresh_val& tsr->threshold_thot_mask)>>
> + __ffs(tsr->threshold_thot_mask);
> +
> + if (t_cold>= hot) {
> + /* change the t_hot to t_cold + 5000 millidegrees */
> + err |= add_hyst(t_cold, ts_data->hyst_val, bg_ptr, id,&hot);
> + /* write the new t_hot value */
> + reg_val = thresh_val& (~tsr->threshold_thot_mask);
> + reg_val |= hot<< __ffs(tsr->threshold_thot_mask);
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + thresh_val = reg_val;
> + }
> +
> + /* write the new t_cold value */
> + reg_val = thresh_val& ~tsr->threshold_tcold_mask;
> + reg_val |= (t_cold<< __ffs(tsr->threshold_tcold_mask));
> + err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
> + return -EIO;
> + }
> +
> + return temp_sensor_unmask_interrupts(bg_ptr, id, hot, t_cold);
> +}
> +
> +static int temp_sensor_configure_tshut_hot(struct omap_bandgap *bg_ptr,
> + int id, int tshut_hot)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 reg_val;
> + int err;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + err = omap_control_readl(cdev, tsr->tshut_threshold,®_val);
> + reg_val&= ~tsr->tshut_hot_mask;
> + reg_val |= tshut_hot<< __ffs(tsr->tshut_hot_mask);
> + err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram tshut thot\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +static int temp_sensor_configure_tshut_cold(struct omap_bandgap *bg_ptr,
> + int id, int tshut_cold)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 reg_val;
> + int err;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + err = omap_control_readl(cdev, tsr->tshut_threshold,®_val);
> + reg_val&= ~tsr->tshut_cold_mask;
> + reg_val |= tshut_cold<< __ffs(tsr->tshut_cold_mask);
> + err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +static int configure_temp_sensor_counter(struct omap_bandgap *bg_ptr, int id,
> + u32 counter)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 val;
> + int err;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + err = omap_control_readl(cdev, tsr->bgap_counter,&val);
> + val&= ~tsr->counter_mask;
> + val |= counter<< __ffs(tsr->counter_mask);
> + err |= omap_control_writel(cdev, val, tsr->bgap_counter);
> + if (err) {
> + dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +/* Exposed APIs */
> +/**
> + * omap_bandgap_read_thot() - reads sensor current thot
> + * @bg_ptr - pointer to bandgap instance
> + * @id - sensor id
> + * @thot - resulting current thot value
> + *
> + * returns 0 on success or the proper error code
> + */
> +int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id,
> + int *thot)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 temp;
> + int ret;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + ret = omap_control_readl(cdev, tsr->bgap_threshold,&temp);
> + temp = (temp& tsr->threshold_thot_mask)>>
> + __ffs(tsr->threshold_thot_mask);
> + ret |= adc_to_temp_conversion(bg_ptr, id, temp,&temp);
> + if (ret) {
> + dev_err(bg_ptr->dev, "failed to read thot\n");
> + return -EIO;
> + }
> +
> + *thot = temp;
> +
> + return 0;
> +}
> +
> +/**
> + * omap_bandgap_write_thot() - sets sensor current thot
> + * @bg_ptr - pointer to bandgap instance
> + * @id - sensor id
> + * @val - desired thot value
> + *
> + * returns 0 on success or the proper error code
> + */
> +int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val)
> +{
> + struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> + struct temp_sensor_registers *tsr;
> + u32 t_hot;
> + int ret;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> +
> + if (val< ts_data->min_temp + ts_data->hyst_val)
> + return -EINVAL;
> + ret = temp_to_adc_conversion(val, bg_ptr, id,&t_hot);
> + if (ret< 0)
> + return ret;
> +
> + mutex_lock(&bg_ptr->bg_mutex);
> + temp_sensor_configure_thot(bg_ptr, id, t_hot);
> + mutex_unlock(&bg_ptr->bg_mutex);
> +
> + return 0;
> +}
> +
> +/**
> + * omap_bandgap_read_tcold() - reads sensor current tcold
> + * @bg_ptr - pointer to bandgap instance
> + * @id - sensor id
> + * @tcold - resulting current tcold value
> + *
> + * returns 0 on success or the proper error code
> + */
> +int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id,
> + int *tcold)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 temp;
> + int ret;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + ret = omap_control_readl(cdev, tsr->bgap_threshold,&temp);
> + temp = (temp& tsr->threshold_tcold_mask)
> + >> __ffs(tsr->threshold_tcold_mask);
> + ret |= adc_to_temp_conversion(bg_ptr, id, temp,&temp);
> + if (ret)
> + return -EIO;
> +
> + *tcold = temp;
> +
> + return 0;
> +}
> +
> +/**
> + * omap_bandgap_write_tcold() - sets the sensor tcold
> + * @bg_ptr - pointer to bandgap instance
> + * @id - sensor id
> + * @val - desired tcold value
> + *
> + * returns 0 on success or the proper error code
> + */
> +int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val)
> +{
> + struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> + struct temp_sensor_registers *tsr;
> + u32 t_cold;
> + int ret;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + if (val> ts_data->max_temp + ts_data->hyst_val)
> + return -EINVAL;
> +
> + ret = temp_to_adc_conversion(val, bg_ptr, id,&t_cold);
> + if (ret< 0)
> + return ret;
> +
> + mutex_lock(&bg_ptr->bg_mutex);
> + temp_sensor_configure_tcold(bg_ptr, id, t_cold);
> + mutex_unlock(&bg_ptr->bg_mutex);
> +
> + return 0;
> +}
> +
> +/**
> + * omap_bandgap_read_update_interval() - read the sensor update interval
> + * @bg_ptr - pointer to bandgap instance
> + * @id - sensor id
> + * @interval - resulting update interval in miliseconds
> + *
> + * returns 0 on success or the proper error code
> + */
> +int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
> + int *interval)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 time;
> + int ret;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + ret = omap_control_readl(cdev, tsr->bgap_counter,&time);
> + if (ret)
> + return ret;
> + time = (time& tsr->counter_mask)>> __ffs(tsr->counter_mask);
> + time = time * 1000 / bg_ptr->clk_rate;
> +
> + *interval = time;
> +
> + return 0;
> +}
> +
> +/**
> + * omap_bandgap_write_update_interval() - set the update interval
> + * @bg_ptr - pointer to bandgap instance
> + * @id - sensor id
> + * @interval - desired update interval in miliseconds
> + *
> + * returns 0 on success or the proper error code
> + */
> +int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr,
> + int id, u32 interval)
> +{
> + interval = interval * bg_ptr->clk_rate / 1000;
> + mutex_lock(&bg_ptr->bg_mutex);
> + configure_temp_sensor_counter(bg_ptr, id, interval);
> + mutex_unlock(&bg_ptr->bg_mutex);
> +
> + return 0;
> +}
> +
> +/**
> + * omap_bandgap_read_temperature() - report current temperature
> + * @bg_ptr - pointer to bandgap instance
> + * @id - sensor id
> + * @temperature - resulting temperature
> + *
> + * returns 0 on success or the proper error code
> + */
> +int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
> + int *temperature)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 temp;
> + int ret;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + ret = omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> + temp&= tsr->bgap_dtemp_mask;
> +
> + ret |= adc_to_temp_conversion(bg_ptr, id, temp,&temp);
> + if (ret)
> + return -EIO;
> +
> + *temperature = temp;
> +
> + return 0;
> +}
> +
> +/**
> + * enable_continuous_mode() - One time enabling of continuous conversion mode
> + * @bg_ptr - pointer to scm instance
> + */
> +static int enable_continuous_mode(struct omap_bandgap *bg_ptr)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + int i, r;
> + u32 val;
> +
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> + tsr = bg_ptr->pdata->sensors[i].registers;
> + r = omap_control_readl(cdev, tsr->bgap_mode_ctrl,&val);
> + val |= 1<< __ffs(tsr->mode_ctrl_mask);
> + r |= omap_control_writel(cdev, val, tsr->bgap_mode_ctrl);
> + if (r)
> + dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> + }
> +
> + return r ? -EIO : 0;
> +}
> +
> +static int omap_bandgap_tshut_init(struct omap_bandgap *bg_ptr,
> + struct platform_device *pdev)
> +{
> + int gpio_nr = bg_ptr->tshut_gpio;
> + int status;
> +
> + /* Request for gpio_86 line */
> + status = gpio_request(gpio_nr, "tshut");
> + if (status< 0) {
> + dev_err(bg_ptr->dev,
> + "Could not request for TSHUT GPIO:%i\n", 86);
> + return status;
> + }
> + status = gpio_direction_input(gpio_nr);
> + if (status) {
> + dev_err(bg_ptr->dev,
> + "Cannot set input TSHUT GPIO %d\n", gpio_nr);
> + return status;
> + }
> +
> + status = request_irq(gpio_to_irq(gpio_nr),
> + omap_bandgap_tshut_irq_handler,
> + IRQF_TRIGGER_RISING, "tshut",
> + NULL);
> + if (status) {
> + gpio_free(gpio_nr);
> + dev_err(bg_ptr->dev, "request irq failed for TSHUT");
> + }
> +
> + return 0;
> +}
> +
> +static int omap_bandgap_talert_init(struct omap_bandgap *bg_ptr,
> + struct platform_device *pdev)
> +{
> + int ret;
> +
> + bg_ptr->irq = platform_get_irq(pdev, 0);
> + if (bg_ptr->irq< 0) {
> + dev_err(&pdev->dev, "get_irq failed\n");
> + return bg_ptr->irq;
> + }
> + ret = request_threaded_irq(bg_ptr->irq, NULL,
> + talert_irq_handler,
> + IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
> + "talert", bg_ptr);
> + if (ret) {
> + dev_err(&pdev->dev, "Request threaded irq failed.\n");
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static const struct omap_bandgap_data omap4460_data = {
> + .has_talert = true,
> + .has_tshut = true,
> + .fclock_name = "bandgap_ts_fclk",
> + .div_ck_name = "div_ts_ck",
None of these clock data should be there ideally. You should ensure that
the proper device alias will be there using clkdev entries.
Except that with DT, it will not work without the clock DT binding :-(
I think Rob posted a latest update based on CCF... but for the moment we
are stuck :-(
> + .conv_table = omap4460_adc_to_temp,
> + .sensors = {
> + {
> + .registers =&omap4460_mpu_temp_sensor_registers,
> + .ts_data =&omap4460_mpu_temp_sensor_data,
> + .domain = "cpu",
> + },
> + },
> + .sensor_count = 1,
> +};
> +
> +static const struct omap_bandgap_data omap5430_data = {
> + .has_talert = true,
> + .has_tshut = true,
> + .fclock_name = "ts_clk_div_ck",
> + .div_ck_name = "ts_clk_div_ck",
> + .conv_table = omap5430_adc_to_temp,
> + .sensors = {
> + {
> + .registers =&omap5430_mpu_temp_sensor_registers,
> + .ts_data =&omap5430_mpu_temp_sensor_data,
> + .domain = "cpu",
> + },
> + {
> + .registers =&omap5430_gpu_temp_sensor_registers,
> + .ts_data =&omap5430_gpu_temp_sensor_data,
> + .domain = "gpu",
> + },
> + {
> + .registers =&omap5430_core_temp_sensor_registers,
> + .ts_data =&omap5430_core_temp_sensor_data,
> + .domain = "core",
> + },
> + },
> + .sensor_count = 3,
It can probably be replaced by a sizeof.
> +};
> +
> +static const struct of_device_id of_omap_bandgap_match[] = {
> + /*
> + * TODO: Add support to 4430
> + * { .compatible = "ti,omap4430-bandgap", .data = , },
> + */
> + {
> + .compatible = "ti,omap4460-bandgap",
> + .data = (void *)&omap4460_data,
No need to cast toward a void *.
> + },
> + {
> + .compatible = "ti,omap5430-bandgap",
> + .data = (void *)&omap5430_data,
> + },
> + /* Sentinel */
> + { },
> +};
> +
> +static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
> +{
> + struct device_node *node = pdev->dev.of_node;
> + const struct of_device_id *of_id;
> + struct omap_bandgap *bg_ptr;
bg_ptr is not a super name.
> + u32 prop;
> +
> + /* just for the sake */
> + if (!node) {
> + dev_err(&pdev->dev, "no platform information available\n");
> + return ERR_PTR(-EINVAL);
> + }
Not needed, just do the of_match_device here directly.
> +
> + bg_ptr = devm_kzalloc(&pdev->dev, sizeof(struct omap_bandgap),
> + GFP_KERNEL);
> + if (!bg_ptr) {
> + dev_err(&pdev->dev, "Unable to allocate mem for driver ref\n");
> + return ERR_PTR(-ENOMEM);
> + }
> +
> + of_id = of_match_device(of_omap_bandgap_match,&pdev->dev);
> + if (of_id)
> + bg_ptr->pdata = of_id->data;
Nit: This is not really pdata anymore, so you should maybe remove the
"p" to avoid confusion.
> +
> + if (bg_ptr->pdata->has_tshut) {
> + if (of_property_read_u32(node, "ti,tshut-gpio",&prop)< 0) {
> + dev_err(&pdev->dev, "missing tshut gpio in device tree\n");
> + return ERR_PTR(-EINVAL);
> + }
> + bg_ptr->tshut_gpio = prop;
> + if (!gpio_is_valid(bg_ptr->tshut_gpio)) {
> + dev_err(&pdev->dev, "invalid gpio for tshut (%d)\n",
> + bg_ptr->tshut_gpio);
> + return ERR_PTR(-EINVAL);
> + }
> + }
> +
> + return bg_ptr;
> +}
> +
> +static
> +int __devinit omap_bandgap_probe(struct platform_device *pdev)
> +{
> + struct device *cdev = pdev->dev.parent;
> + struct omap_bandgap *bg_ptr;
> + int clk_rate, ret = 0, i;
> +
> + if (!cdev) {
> + dev_err(&pdev->dev, "no omap control ref in our parent\n");
> + return -EINVAL;
> + }
> +
> + bg_ptr = omap_bandgap_build(pdev);
> + if (IS_ERR_OR_NULL(bg_ptr)) {
> + dev_err(&pdev->dev, "failed to fetch platform data\n");
> + return PTR_ERR(bg_ptr);
> + }
> +
> + if (bg_ptr->pdata->has_talert) {
Nit2: Yeah, in fact instead of pdata, "conf" or "settings" seems to be
more representative of what this structure really contain.
> + ret = omap_bandgap_talert_init(bg_ptr, pdev);
> + if (ret) {
> + dev_err(&pdev->dev, "failed to initialize Talert IRQ\n");
> + return ret;
> + }
> + }
> +
> + if (bg_ptr->pdata->has_tshut) {
> + ret = omap_bandgap_tshut_init(bg_ptr, pdev);
> + if (ret) {
> + dev_err(&pdev->dev,
> + "failed to initialize system tshut IRQ\n");
> + goto free_talert;
> + }
> + }
> +
> + bg_ptr->fclock = clk_get(NULL, bg_ptr->pdata->fclock_name);
That's not good to get a clock without using the local dev alias.
But because of lack of clock DT binding yet, I'm not sure we have the
choice.
> + ret = IS_ERR_OR_NULL(bg_ptr->fclock);
> + if (ret) {
> + dev_err(&pdev->dev, "failed to request fclock reference\n");
> + goto free_irqs;
> + }
> +
> + bg_ptr->div_clk = clk_get(NULL, bg_ptr->pdata->div_ck_name);
> + ret = IS_ERR_OR_NULL(bg_ptr->div_clk);
> + if (ret) {
> + dev_err(&pdev->dev,
> + "failed to request div_ts_ck clock ref\n");
> + goto free_irqs;
> + }
> +
> + bg_ptr->conv_table = bg_ptr->pdata->conv_table;
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> + struct temp_sensor_registers *tsr;
> + u32 val;
> +
> + tsr = bg_ptr->pdata->sensors[i].registers;
> + /*
> + * check if the efuse has a non-zero value if not
> + * it is an untrimmed sample and the temperatures
> + * may not be accurate
> + */
> + ret = omap_control_readl(cdev, tsr->bgap_efuse,&val);
> + if (ret || !val)
> + dev_info(&pdev->dev,
> + "Non-trimmed BGAP, Temp not accurate\n");
> + }
> +
> + clk_rate = clk_round_rate(bg_ptr->div_clk,
> + bg_ptr->pdata->sensors[0].ts_data->max_freq);
> + if (clk_rate< bg_ptr->pdata->sensors[0].ts_data->min_freq ||
> + clk_rate == 0xffffffff) {
> + ret = -ENODEV;
> + goto put_clks;
> + }
> +
> + ret = clk_set_rate(bg_ptr->div_clk, clk_rate);
> + if (ret) {
> + dev_err(&pdev->dev, "Cannot set clock rate\n");
> + goto put_clks;
> + }
> +
> + bg_ptr->clk_rate = clk_rate;
> + clk_enable(bg_ptr->fclock);
> +
> + mutex_init(&bg_ptr->bg_mutex);
> + bg_ptr->dev =&pdev->dev;
> + platform_set_drvdata(pdev, bg_ptr);
> +
> + /* 1 clk cycle */
What does that mean exactly?
Regards,
Benoit
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
> + configure_temp_sensor_counter(bg_ptr, i, 1);
> +
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> + struct temp_sensor_data *ts_data;
> +
> + ts_data = bg_ptr->pdata->sensors[i].ts_data;
> +
> + temp_sensor_init_talert_thresholds(bg_ptr, i,
> + ts_data->t_hot,
> + ts_data->t_cold);
> + temp_sensor_configure_tshut_hot(bg_ptr, i,
> + ts_data->tshut_hot);
> + temp_sensor_configure_tshut_cold(bg_ptr, i,
> + ts_data->tshut_cold);
> + }
> +
> + enable_continuous_mode(bg_ptr);
> +
> + /* Set .250 seconds time as default counter */
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
> + configure_temp_sensor_counter(bg_ptr, i,
> + bg_ptr->clk_rate / 4);
> +
> + /* Every thing is good? Then expose the sensors */
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> + char *domain;
> +
> + domain = bg_ptr->pdata->sensors[i].domain;
> + if (bg_ptr->pdata->expose_sensor)
> + bg_ptr->pdata->expose_sensor(bg_ptr, i, domain);
> + }
> +
> + return 0;
> +
> +put_clks:
> + clk_disable(bg_ptr->fclock);
> + clk_put(bg_ptr->fclock);
> + clk_put(bg_ptr->div_clk);
> +free_irqs:
> + free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
> + gpio_free(bg_ptr->tshut_gpio);
> +free_talert:
> + free_irq(bg_ptr->irq, bg_ptr);
> +
> + return ret;
> +}
> +
> +static
> +int __devexit omap_bandgap_remove(struct platform_device *pdev)
> +{
> + struct omap_bandgap *bg_ptr = platform_get_drvdata(pdev);
> +
> + clk_disable(bg_ptr->fclock);
> + clk_put(bg_ptr->fclock);
> + clk_put(bg_ptr->div_clk);
> + free_irq(bg_ptr->irq, bg_ptr);
> + free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
> + gpio_free(bg_ptr->tshut_gpio);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_PM
> +static int omap_bandgap_save_ctxt(struct omap_bandgap *bg_ptr)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + int err = 0;
> + int i;
> +
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> + struct temp_sensor_registers *tsr;
> + struct temp_sensor_regval *rval;
> +
> + rval = bg_ptr->pdata->sensors[i].regval;
> + tsr = bg_ptr->pdata->sensors[i].registers;
> +
> + err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,
> + &rval->bg_mode_ctrl);
> + err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,
> + &rval->bg_ctrl);
> + err |= omap_control_readl(cdev, tsr->bgap_counter,
> + &rval->bg_counter);
> + err |= omap_control_readl(cdev, tsr->bgap_threshold,
> + &rval->bg_threshold);
> + err |= omap_control_readl(cdev, tsr->tshut_threshold,
> + &rval->tshut_threshold);
> +
> + if (err)
> + dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> + }
> +
> + return err ? -EIO : 0;
> +}
> +
> +static int
> +omap_bandgap_force_single_read(struct omap_bandgap *bg_ptr, int id)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + struct temp_sensor_registers *tsr;
> + u32 temp = 0, counter = 1000;
> + int err;
> +
> + tsr = bg_ptr->pdata->sensors[id].registers;
> + /* Select single conversion mode */
> + err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,&temp);
> + temp&= ~(1<< __ffs(tsr->mode_ctrl_mask));
> + omap_control_writel(cdev, temp, tsr->bgap_mode_ctrl);
> +
> + /* Start of Conversion = 1 */
> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> + temp |= 1<< __ffs(tsr->bgap_soc_mask);
> + omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> + /* Wait until DTEMP is updated */
> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> + temp&= (tsr->bgap_dtemp_mask);
> + while ((temp == 0)&& --counter) {
> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> + temp&= (tsr->bgap_dtemp_mask);
> + }
> + /* Start of Conversion = 0 */
> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> + temp&= ~(1<< __ffs(tsr->bgap_soc_mask));
> + err |= omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> +
> + return err ? -EIO : 0;
> +}
> +
> +static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr)
> +{
> + struct device *cdev = bg_ptr->dev->parent;
> + int i, err = 0;
> + u32 temp = 0;
> +
> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> + struct temp_sensor_registers *tsr;
> + struct temp_sensor_regval *rval;
> + u32 val;
> +
> + rval = bg_ptr->pdata->sensors[i].regval;
> + tsr = bg_ptr->pdata->sensors[i].registers;
> +
> + err = omap_control_readl(cdev, tsr->bgap_counter,&val);
> + if (val == 0) {
> + err |= omap_control_writel(cdev, rval->bg_threshold,
> + tsr->bgap_threshold);
> + err |= omap_control_writel(cdev, rval->tshut_threshold,
> + tsr->tshut_threshold);
> + /* Force immediate temperature measurement and update
> + * of the DTEMP field
> + */
> + omap_bandgap_force_single_read(bg_ptr, i);
> + err |= omap_control_writel(cdev, rval->bg_counter,
> + tsr->bgap_counter);
> + err |= omap_control_writel(cdev, rval->bg_mode_ctrl,
> + tsr->bgap_mode_ctrl);
> + err |= omap_control_writel(cdev, rval->bg_ctrl,
> + tsr->bgap_mask_ctrl);
> + } else {
> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,
> + &temp);
> + temp&= (tsr->bgap_dtemp_mask);
> + if (temp == 0) {
> + omap_bandgap_force_single_read(bg_ptr, i);
> + err |= omap_control_readl(cdev,
> + tsr->bgap_mask_ctrl,
> + &temp);
> + temp |= 1<< __ffs(tsr->mode_ctrl_mask);
> + err |= omap_control_writel(cdev, temp,
> + tsr->bgap_mask_ctrl);
> + }
> + }
> + if (err)
> + dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> + }
> +
> + return err ? -EIO : 0;
> +}
> +
> +static int omap_bandgap_suspend(struct device *dev)
> +{
> + struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
> + int err;
> +
> + err = omap_bandgap_save_ctxt(bg_ptr);
> + clk_disable(bg_ptr->fclock);
> +
> + return err;
> +}
> +
> +static int omap_bandgap_resume(struct device *dev)
> +{
> + struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
> +
> + clk_enable(bg_ptr->fclock);
> +
> + return omap_bandgap_restore_ctxt(bg_ptr);
> +}
> +static const struct dev_pm_ops omap_bandgap_dev_pm_ops = {
> + SET_SYSTEM_SLEEP_PM_OPS(omap_bandgap_suspend,
> + omap_bandgap_resume)
> +};
> +
> +#define DEV_PM_OPS (&omap_bandgap_dev_pm_ops)
> +#else
> +#define DEV_PM_OPS NULL
> +#endif
> +
> +static struct platform_driver omap_bandgap_sensor_driver = {
> + .probe = omap_bandgap_probe,
> + .remove = omap_bandgap_remove,
> + .driver = {
> + .name = "omap-bandgap",
> + .pm = DEV_PM_OPS,
> + .of_match_table = of_omap_bandgap_match,
> + },
> +};
> +
> +module_platform_driver(omap_bandgap_sensor_driver);
> +early_platform_init("early_omap_temperature",&omap_bandgap_sensor_driver);
> +
> +MODULE_DESCRIPTION("OMAP4+ bandgap temperature sensor driver");
> +MODULE_LICENSE("GPL v2");
> +MODULE_ALIAS("platform:omap-bandgap");
> +MODULE_AUTHOR("Texas Instrument Inc.");
> diff --git a/drivers/thermal/omap-bandgap.h b/drivers/thermal/omap-bandgap.h
> new file mode 100644
> index 0000000..12e0d6b
> --- /dev/null
> +++ b/drivers/thermal/omap-bandgap.h
> @@ -0,0 +1,63 @@
> +/*
> + * OMAP4 Bandgap temperature sensor driver
> + *
> + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
> + * Contact:
> + * Eduardo Valentin<eduardo.valentin@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
> + * 02110-1301 USA
> + *
> + */
> +#ifndef __OMAP_BANDGAP_H
> +#define __OMAP_BANDGAP_H
> +
> +struct omap_bandgap_data;
> +
> +/**
> + * struct omap_bandgap - bandgap device structure
> + * @dev: device pointer
> + * @pdata: platform data with sensor data
> + * @fclock: pointer to functional clock of temperature sensor
> + * @div_clk: pointer to parent clock of temperature sensor fclk
> + * @conv_table: Pointer to adc to temperature conversion table
> + * @bg_mutex: Mutex for sysfs, irq and PM
> + * @irq: MPU Irq number for thermal alert
> + * @tshut_gpio: GPIO where Tshut signal is routed
> + * @clk_rate: Holds current clock rate
> + */
> +struct omap_bandgap {
> + struct device *dev;
> + const struct omap_bandgap_data *pdata;
> + struct clk *fclock;
> + struct clk *div_clk;
> + const int *conv_table;
> + struct mutex bg_mutex; /* Mutex for irq and PM */
> + int irq;
> + int tshut_gpio;
> + u32 clk_rate;
> +};
> +
> +int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id, int *thot);
> +int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val);
> +int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id, int *tcold);
> +int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val);
> +int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
> + int *interval);
> +int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr, int id,
> + u32 interval);
> +int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
> + int *temperature);
> +
> +#endif
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-25 16:39 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-25 16:39 UTC (permalink / raw)
To: Eduardo Valentin
Cc: b-cousson, kishon, santosh.shilimkar, tony, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Keerthy, Konstantin Baydarov
Hi.
On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
> In the System Control Module, OMAP supplies a voltage reference
> and a temperature sensor feature that are gathered in the band
> gap voltage and temperature sensor (VBGAPTS) module. The band
> gap provides current and voltage reference for its internal
> circuits and other analog IP blocks. The analog-to-digital
> converter (ADC) produces an output value that is proportional
> to the silicon temperature.
>
> This patch provides a platform driver which expose this feature.
> It is moduled as a MFD child of the System Control Module core
> MFD driver.
>
> This driver provides only APIs to access the device properties,
> like temperature, thresholds and update rate.
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
> .../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
> drivers/thermal/Kconfig | 13 +
> drivers/thermal/Makefile | 4 +-
> drivers/thermal/omap-bandgap.c | 1601 ++++++++++++++++++++
> drivers/thermal/omap-bandgap.h | 63 +
> 5 files changed, 1707 insertions(+), 1 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> create mode 100644 drivers/thermal/omap-bandgap.c
> create mode 100644 drivers/thermal/omap-bandgap.h
>
>
Add private spin lock in omap-bandgap driver to prevent blocking of
control module general registers access.
I wasn't able to test - I have panda 4430 board.
TODO:
Prevent over-usage of spin_lock/spin_unlock for sequential calls of
bg_writel().
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Index: omap-thermal/drivers/mfd/omap-control-core.c
===================================================================
--- omap-thermal.orig/drivers/mfd/omap-control-core.c
+++ omap-thermal/drivers/mfd/omap-control-core.c
@@ -67,6 +67,19 @@ EXPORT_SYMBOL_GPL(omap_control_readl);
int omap_control_writel(struct device *dev, u32 val, u32 reg)
{
struct omap_control *omap_control = dev_get_drvdata(dev);
+
+ if (!omap_control)
+ return -EINVAL;
+
+ writel(val, omap_control->base + reg);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(omap_control_writel);
+
+int omap_control_lock_writel(struct device *dev, u32 val, u32 reg)
+{
+ struct omap_control *omap_control = dev_get_drvdata(dev);
unsigned long flags;
if (!omap_control)
@@ -78,7 +91,7 @@ int omap_control_writel(struct device *d
return 0;
}
-EXPORT_SYMBOL_GPL(omap_control_writel);
+EXPORT_SYMBOL_GPL(omap_control_lock_writel);
/**
* omap_control_get: returns the control module device pinter
@@ -136,6 +149,9 @@ static int __devinit omap_control_probe(
struct device_node *np = dev->of_node;
struct omap_control *omap_control;
+ printk("\n\t\t **** omap_control_probe(): enter ");
+ dump_stack();
+
omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
if (!omap_control) {
dev_err(dev, "not enough memory for omap_control\n");
Index: omap-thermal/drivers/thermal/omap-bandgap.c
===================================================================
--- omap-thermal.orig/drivers/thermal/omap-bandgap.c
+++ omap-thermal/drivers/thermal/omap-bandgap.c
@@ -154,6 +154,7 @@ struct temp_sensor_registers {
u32 status_cold_mask;
u32 bgap_efuse;
+ spinlock_t bg_reg_lock;
};
/**
@@ -579,6 +580,17 @@ omap5430_adc_to_temp[OMAP5430_ADC_END_VA
124600, 124900, 125000, 125000, 125000, 125000,
};
+static int bg_writel(struct device *dev, u32 val, u32 reg, spinlock_t *lock)
+{
+ unsigned long flags;
+ int ret;
+
+ spin_lock_irqsave(lock, flags);
+ ret = omap_control_writel(dev, val, reg);
+ spin_unlock_irqrestore(lock, flags);
+ return ret;
+}
+
static irqreturn_t talert_irq_handler(int irq, void *data)
{
struct omap_bandgap *bg_ptr = data;
@@ -615,7 +627,7 @@ static irqreturn_t talert_irq_handler(in
ctrl |= tsr->mask_hot_mask;
}
- r |= omap_control_writel(cdev, ctrl, tsr->bgap_mask_ctrl);
+ r |= bg_writel(cdev, ctrl, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
if (r) {
dev_err(bg_ptr->dev, "failed to ack talert interrupt\n");
@@ -705,7 +717,7 @@ static int temp_sensor_unmask_interrupts
reg_val |= tsr->mask_cold_mask;
else
reg_val &= ~tsr->mask_cold_mask;
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to unmask interrupts\n");
@@ -751,14 +763,14 @@ int temp_sensor_configure_thot(struct om
/* write the new t_cold value */
reg_val = thresh_val & (~tsr->threshold_tcold_mask);
reg_val |= cold << __ffs(tsr->threshold_tcold_mask);
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
thresh_val = reg_val;
}
/* write the new t_hot value */
reg_val = thresh_val & ~tsr->threshold_thot_mask;
reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
return -EIO;
@@ -782,7 +794,7 @@ int temp_sensor_init_talert_thresholds(s
/* write the new t_cold value */
reg_val = thresh_val & ~tsr->threshold_tcold_mask;
reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
return -EIO;
@@ -793,7 +805,7 @@ int temp_sensor_init_talert_thresholds(s
/* write the new t_hot value */
reg_val = thresh_val & ~tsr->threshold_thot_mask;
reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
return -EIO;
@@ -802,7 +814,7 @@ int temp_sensor_init_talert_thresholds(s
err = omap_control_readl(cdev, tsr->bgap_mask_ctrl, ®_val);
reg_val |= tsr->mask_hot_mask;
reg_val |= tsr->mask_cold_mask;
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
return -EIO;
@@ -833,14 +845,14 @@ int temp_sensor_configure_tcold(struct o
/* write the new t_hot value */
reg_val = thresh_val & (~tsr->threshold_thot_mask);
reg_val |= hot << __ffs(tsr->threshold_thot_mask);
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
thresh_val = reg_val;
}
/* write the new t_cold value */
reg_val = thresh_val & ~tsr->threshold_tcold_mask;
reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
return -EIO;
@@ -861,7 +873,7 @@ static int temp_sensor_configure_tshut_h
err = omap_control_readl(cdev, tsr->tshut_threshold, ®_val);
reg_val &= ~tsr->tshut_hot_mask;
reg_val |= tshut_hot << __ffs(tsr->tshut_hot_mask);
- err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->tshut_threshold, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram tshut thot\n");
return -EIO;
@@ -882,7 +894,7 @@ static int temp_sensor_configure_tshut_c
err = omap_control_readl(cdev, tsr->tshut_threshold, ®_val);
reg_val &= ~tsr->tshut_cold_mask;
reg_val |= tshut_cold << __ffs(tsr->tshut_cold_mask);
- err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->tshut_threshold, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
return -EIO;
@@ -903,7 +915,7 @@ static int configure_temp_sensor_counter
err = omap_control_readl(cdev, tsr->bgap_counter, &val);
val &= ~tsr->counter_mask;
val |= counter << __ffs(tsr->counter_mask);
- err |= omap_control_writel(cdev, val, tsr->bgap_counter);
+ err |= bg_writel(cdev, val, tsr->bgap_counter, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
return -EIO;
@@ -1124,7 +1136,7 @@ static int enable_continuous_mode(struct
tsr = bg_ptr->pdata->sensors[i].registers;
r = omap_control_readl(cdev, tsr->bgap_mode_ctrl, &val);
val |= 1 << __ffs(tsr->mode_ctrl_mask);
- r |= omap_control_writel(cdev, val, tsr->bgap_mode_ctrl);
+ r |= bg_writel(cdev, val, tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
if (r)
dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
}
@@ -1342,6 +1354,9 @@ int __devinit omap_bandgap_probe(struct
u32 val;
tsr = bg_ptr->pdata->sensors[i].registers;
+ /* Initialize register lock */
+ spin_lock_init(&tsr->bg_reg_lock);
+
/*
* check if the efuse has a non-zero value if not
* it is an untrimmed sample and the temperatures
@@ -1482,12 +1497,12 @@ omap_bandgap_force_single_read(struct om
/* Select single conversion mode */
err = omap_control_readl(cdev, tsr->bgap_mode_ctrl, &temp);
temp &= ~(1 << __ffs(tsr->mode_ctrl_mask));
- omap_control_writel(cdev, temp, tsr->bgap_mode_ctrl);
+ bg_writel(cdev, temp, tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
/* Start of Conversion = 1 */
err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
temp |= 1 << __ffs(tsr->bgap_soc_mask);
- omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
+ bg_writel(cdev, temp, tsr->temp_sensor_ctrl, &tsr->bg_reg_lock);
/* Wait until DTEMP is updated */
err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
temp &= (tsr->bgap_dtemp_mask);
@@ -1498,7 +1513,7 @@ omap_bandgap_force_single_read(struct om
/* Start of Conversion = 0 */
err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
temp &= ~(1 << __ffs(tsr->bgap_soc_mask));
- err |= omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
+ err |= bg_writel(cdev, temp, tsr->temp_sensor_ctrl, &tsr->bg_reg_lock);
return err ? -EIO : 0;
}
@@ -1519,20 +1534,20 @@ static int omap_bandgap_restore_ctxt(str
err = omap_control_readl(cdev, tsr->bgap_counter, &val);
if (val == 0) {
- err |= omap_control_writel(cdev, rval->bg_threshold,
- tsr->bgap_threshold);
- err |= omap_control_writel(cdev, rval->tshut_threshold,
- tsr->tshut_threshold);
+ err |= bg_writel(cdev, rval->bg_threshold,
+ tsr->bgap_threshold, &tsr->bg_reg_lock);
+ err |= bg_writel(cdev, rval->tshut_threshold,
+ tsr->tshut_threshold, &tsr->bg_reg_lock);
/* Force immediate temperature measurement and update
* of the DTEMP field
*/
omap_bandgap_force_single_read(bg_ptr, i);
- err |= omap_control_writel(cdev, rval->bg_counter,
- tsr->bgap_counter);
- err |= omap_control_writel(cdev, rval->bg_mode_ctrl,
- tsr->bgap_mode_ctrl);
- err |= omap_control_writel(cdev, rval->bg_ctrl,
- tsr->bgap_mask_ctrl);
+ err |= bg_writel(cdev, rval->bg_counter,
+ tsr->bgap_counter, &tsr->bg_reg_lock);
+ err |= bg_writel(cdev, rval->bg_mode_ctrl,
+ tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
+ err |= bg_writel(cdev, rval->bg_ctrl,
+ tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
} else {
err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,
&temp);
@@ -1543,8 +1558,8 @@ static int omap_bandgap_restore_ctxt(str
tsr->bgap_mask_ctrl,
&temp);
temp |= 1 << __ffs(tsr->mode_ctrl_mask);
- err |= omap_control_writel(cdev, temp,
- tsr->bgap_mask_ctrl);
+ err |= bg_writel(cdev, temp,
+ tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
}
}
if (err)
Index: omap-thermal/drivers/usb/otg/omap4-usb-phy.c
===================================================================
--- omap-thermal.orig/drivers/usb/otg/omap4-usb-phy.c
+++ omap-thermal/drivers/usb/otg/omap4-usb-phy.c
@@ -46,13 +46,13 @@ int omap4_usb_phy_power(struct device *d
if (on) {
ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
if (!ret && (val & PHY_PD)) {
- ret = omap_control_writel(dev, ~PHY_PD,
+ ret = omap_control_lock_writel(dev, ~PHY_PD,
CONTROL_DEV_CONF);
/* XXX: add proper documentation for this delay */
mdelay(200);
}
} else {
- ret = omap_control_writel(dev, PHY_PD, CONTROL_DEV_CONF);
+ ret = omap_control_lock_writel(dev, PHY_PD, CONTROL_DEV_CONF);
}
return ret;
@@ -74,7 +74,7 @@ EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
*/
int omap4_usb_phy_mailbox(struct device *dev, u32 val)
{
- return omap_control_writel(dev, val, CONTROL_USBOTGHS_CONTROL);
+ return omap_control_lock_writel(dev, val, CONTROL_USBOTGHS_CONTROL);
}
EXPORT_SYMBOL_GPL(omap4_usb_phy_mailbox);
Index: omap-thermal/include/linux/mfd/omap_control.h
===================================================================
--- omap-thermal.orig/include/linux/mfd/omap_control.h
+++ omap-thermal/include/linux/mfd/omap_control.h
@@ -43,6 +43,7 @@ struct omap_control {
#ifdef CONFIG_MFD_OMAP_CONTROL
extern int omap_control_readl(struct device *dev, u32 reg, u32 *val);
extern int omap_control_writel(struct device *dev, u32 val, u32 reg);
+extern int omap_control_lock_writel(struct device *dev, u32 val, u32 reg);
extern struct device *omap_control_get(void);
extern void omap_control_put(struct device *dev);
#else
@@ -55,6 +56,11 @@ static inline int omap_control_writel(st
{
return 0;
}
+
+static inline int omap_control_lock_writel(struct device *dev, u32 val, u32 reg)
+{
+ return 0;
+}
static inline struct device *omap_control_get(void)
{
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
@ 2012-05-25 16:39 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-25 16:39 UTC (permalink / raw)
To: linux-arm-kernel
Hi.
On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
> In the System Control Module, OMAP supplies a voltage reference
> and a temperature sensor feature that are gathered in the band
> gap voltage and temperature sensor (VBGAPTS) module. The band
> gap provides current and voltage reference for its internal
> circuits and other analog IP blocks. The analog-to-digital
> converter (ADC) produces an output value that is proportional
> to the silicon temperature.
>
> This patch provides a platform driver which expose this feature.
> It is moduled as a MFD child of the System Control Module core
> MFD driver.
>
> This driver provides only APIs to access the device properties,
> like temperature, thresholds and update rate.
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
> .../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
> drivers/thermal/Kconfig | 13 +
> drivers/thermal/Makefile | 4 +-
> drivers/thermal/omap-bandgap.c | 1601 ++++++++++++++++++++
> drivers/thermal/omap-bandgap.h | 63 +
> 5 files changed, 1707 insertions(+), 1 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> create mode 100644 drivers/thermal/omap-bandgap.c
> create mode 100644 drivers/thermal/omap-bandgap.h
>
>
Add private spin lock in omap-bandgap driver to prevent blocking of
control module general registers access.
I wasn't able to test - I have panda 4430 board.
TODO:
Prevent over-usage of spin_lock/spin_unlock for sequential calls of
bg_writel().
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Index: omap-thermal/drivers/mfd/omap-control-core.c
===================================================================
--- omap-thermal.orig/drivers/mfd/omap-control-core.c
+++ omap-thermal/drivers/mfd/omap-control-core.c
@@ -67,6 +67,19 @@ EXPORT_SYMBOL_GPL(omap_control_readl);
int omap_control_writel(struct device *dev, u32 val, u32 reg)
{
struct omap_control *omap_control = dev_get_drvdata(dev);
+
+ if (!omap_control)
+ return -EINVAL;
+
+ writel(val, omap_control->base + reg);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(omap_control_writel);
+
+int omap_control_lock_writel(struct device *dev, u32 val, u32 reg)
+{
+ struct omap_control *omap_control = dev_get_drvdata(dev);
unsigned long flags;
if (!omap_control)
@@ -78,7 +91,7 @@ int omap_control_writel(struct device *d
return 0;
}
-EXPORT_SYMBOL_GPL(omap_control_writel);
+EXPORT_SYMBOL_GPL(omap_control_lock_writel);
/**
* omap_control_get: returns the control module device pinter
@@ -136,6 +149,9 @@ static int __devinit omap_control_probe(
struct device_node *np = dev->of_node;
struct omap_control *omap_control;
+ printk("\n\t\t **** omap_control_probe(): enter ");
+ dump_stack();
+
omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
if (!omap_control) {
dev_err(dev, "not enough memory for omap_control\n");
Index: omap-thermal/drivers/thermal/omap-bandgap.c
===================================================================
--- omap-thermal.orig/drivers/thermal/omap-bandgap.c
+++ omap-thermal/drivers/thermal/omap-bandgap.c
@@ -154,6 +154,7 @@ struct temp_sensor_registers {
u32 status_cold_mask;
u32 bgap_efuse;
+ spinlock_t bg_reg_lock;
};
/**
@@ -579,6 +580,17 @@ omap5430_adc_to_temp[OMAP5430_ADC_END_VA
124600, 124900, 125000, 125000, 125000, 125000,
};
+static int bg_writel(struct device *dev, u32 val, u32 reg, spinlock_t *lock)
+{
+ unsigned long flags;
+ int ret;
+
+ spin_lock_irqsave(lock, flags);
+ ret = omap_control_writel(dev, val, reg);
+ spin_unlock_irqrestore(lock, flags);
+ return ret;
+}
+
static irqreturn_t talert_irq_handler(int irq, void *data)
{
struct omap_bandgap *bg_ptr = data;
@@ -615,7 +627,7 @@ static irqreturn_t talert_irq_handler(in
ctrl |= tsr->mask_hot_mask;
}
- r |= omap_control_writel(cdev, ctrl, tsr->bgap_mask_ctrl);
+ r |= bg_writel(cdev, ctrl, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
if (r) {
dev_err(bg_ptr->dev, "failed to ack talert interrupt\n");
@@ -705,7 +717,7 @@ static int temp_sensor_unmask_interrupts
reg_val |= tsr->mask_cold_mask;
else
reg_val &= ~tsr->mask_cold_mask;
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to unmask interrupts\n");
@@ -751,14 +763,14 @@ int temp_sensor_configure_thot(struct om
/* write the new t_cold value */
reg_val = thresh_val & (~tsr->threshold_tcold_mask);
reg_val |= cold << __ffs(tsr->threshold_tcold_mask);
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
thresh_val = reg_val;
}
/* write the new t_hot value */
reg_val = thresh_val & ~tsr->threshold_thot_mask;
reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
return -EIO;
@@ -782,7 +794,7 @@ int temp_sensor_init_talert_thresholds(s
/* write the new t_cold value */
reg_val = thresh_val & ~tsr->threshold_tcold_mask;
reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
return -EIO;
@@ -793,7 +805,7 @@ int temp_sensor_init_talert_thresholds(s
/* write the new t_hot value */
reg_val = thresh_val & ~tsr->threshold_thot_mask;
reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
return -EIO;
@@ -802,7 +814,7 @@ int temp_sensor_init_talert_thresholds(s
err = omap_control_readl(cdev, tsr->bgap_mask_ctrl, ®_val);
reg_val |= tsr->mask_hot_mask;
reg_val |= tsr->mask_cold_mask;
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
return -EIO;
@@ -833,14 +845,14 @@ int temp_sensor_configure_tcold(struct o
/* write the new t_hot value */
reg_val = thresh_val & (~tsr->threshold_thot_mask);
reg_val |= hot << __ffs(tsr->threshold_thot_mask);
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
thresh_val = reg_val;
}
/* write the new t_cold value */
reg_val = thresh_val & ~tsr->threshold_tcold_mask;
reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
- err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
return -EIO;
@@ -861,7 +873,7 @@ static int temp_sensor_configure_tshut_h
err = omap_control_readl(cdev, tsr->tshut_threshold, ®_val);
reg_val &= ~tsr->tshut_hot_mask;
reg_val |= tshut_hot << __ffs(tsr->tshut_hot_mask);
- err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->tshut_threshold, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram tshut thot\n");
return -EIO;
@@ -882,7 +894,7 @@ static int temp_sensor_configure_tshut_c
err = omap_control_readl(cdev, tsr->tshut_threshold, ®_val);
reg_val &= ~tsr->tshut_cold_mask;
reg_val |= tshut_cold << __ffs(tsr->tshut_cold_mask);
- err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
+ err |= bg_writel(cdev, reg_val, tsr->tshut_threshold, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
return -EIO;
@@ -903,7 +915,7 @@ static int configure_temp_sensor_counter
err = omap_control_readl(cdev, tsr->bgap_counter, &val);
val &= ~tsr->counter_mask;
val |= counter << __ffs(tsr->counter_mask);
- err |= omap_control_writel(cdev, val, tsr->bgap_counter);
+ err |= bg_writel(cdev, val, tsr->bgap_counter, &tsr->bg_reg_lock);
if (err) {
dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
return -EIO;
@@ -1124,7 +1136,7 @@ static int enable_continuous_mode(struct
tsr = bg_ptr->pdata->sensors[i].registers;
r = omap_control_readl(cdev, tsr->bgap_mode_ctrl, &val);
val |= 1 << __ffs(tsr->mode_ctrl_mask);
- r |= omap_control_writel(cdev, val, tsr->bgap_mode_ctrl);
+ r |= bg_writel(cdev, val, tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
if (r)
dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
}
@@ -1342,6 +1354,9 @@ int __devinit omap_bandgap_probe(struct
u32 val;
tsr = bg_ptr->pdata->sensors[i].registers;
+ /* Initialize register lock */
+ spin_lock_init(&tsr->bg_reg_lock);
+
/*
* check if the efuse has a non-zero value if not
* it is an untrimmed sample and the temperatures
@@ -1482,12 +1497,12 @@ omap_bandgap_force_single_read(struct om
/* Select single conversion mode */
err = omap_control_readl(cdev, tsr->bgap_mode_ctrl, &temp);
temp &= ~(1 << __ffs(tsr->mode_ctrl_mask));
- omap_control_writel(cdev, temp, tsr->bgap_mode_ctrl);
+ bg_writel(cdev, temp, tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
/* Start of Conversion = 1 */
err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
temp |= 1 << __ffs(tsr->bgap_soc_mask);
- omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
+ bg_writel(cdev, temp, tsr->temp_sensor_ctrl, &tsr->bg_reg_lock);
/* Wait until DTEMP is updated */
err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
temp &= (tsr->bgap_dtemp_mask);
@@ -1498,7 +1513,7 @@ omap_bandgap_force_single_read(struct om
/* Start of Conversion = 0 */
err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
temp &= ~(1 << __ffs(tsr->bgap_soc_mask));
- err |= omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
+ err |= bg_writel(cdev, temp, tsr->temp_sensor_ctrl, &tsr->bg_reg_lock);
return err ? -EIO : 0;
}
@@ -1519,20 +1534,20 @@ static int omap_bandgap_restore_ctxt(str
err = omap_control_readl(cdev, tsr->bgap_counter, &val);
if (val == 0) {
- err |= omap_control_writel(cdev, rval->bg_threshold,
- tsr->bgap_threshold);
- err |= omap_control_writel(cdev, rval->tshut_threshold,
- tsr->tshut_threshold);
+ err |= bg_writel(cdev, rval->bg_threshold,
+ tsr->bgap_threshold, &tsr->bg_reg_lock);
+ err |= bg_writel(cdev, rval->tshut_threshold,
+ tsr->tshut_threshold, &tsr->bg_reg_lock);
/* Force immediate temperature measurement and update
* of the DTEMP field
*/
omap_bandgap_force_single_read(bg_ptr, i);
- err |= omap_control_writel(cdev, rval->bg_counter,
- tsr->bgap_counter);
- err |= omap_control_writel(cdev, rval->bg_mode_ctrl,
- tsr->bgap_mode_ctrl);
- err |= omap_control_writel(cdev, rval->bg_ctrl,
- tsr->bgap_mask_ctrl);
+ err |= bg_writel(cdev, rval->bg_counter,
+ tsr->bgap_counter, &tsr->bg_reg_lock);
+ err |= bg_writel(cdev, rval->bg_mode_ctrl,
+ tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
+ err |= bg_writel(cdev, rval->bg_ctrl,
+ tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
} else {
err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,
&temp);
@@ -1543,8 +1558,8 @@ static int omap_bandgap_restore_ctxt(str
tsr->bgap_mask_ctrl,
&temp);
temp |= 1 << __ffs(tsr->mode_ctrl_mask);
- err |= omap_control_writel(cdev, temp,
- tsr->bgap_mask_ctrl);
+ err |= bg_writel(cdev, temp,
+ tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
}
}
if (err)
Index: omap-thermal/drivers/usb/otg/omap4-usb-phy.c
===================================================================
--- omap-thermal.orig/drivers/usb/otg/omap4-usb-phy.c
+++ omap-thermal/drivers/usb/otg/omap4-usb-phy.c
@@ -46,13 +46,13 @@ int omap4_usb_phy_power(struct device *d
if (on) {
ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
if (!ret && (val & PHY_PD)) {
- ret = omap_control_writel(dev, ~PHY_PD,
+ ret = omap_control_lock_writel(dev, ~PHY_PD,
CONTROL_DEV_CONF);
/* XXX: add proper documentation for this delay */
mdelay(200);
}
} else {
- ret = omap_control_writel(dev, PHY_PD, CONTROL_DEV_CONF);
+ ret = omap_control_lock_writel(dev, PHY_PD, CONTROL_DEV_CONF);
}
return ret;
@@ -74,7 +74,7 @@ EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
*/
int omap4_usb_phy_mailbox(struct device *dev, u32 val)
{
- return omap_control_writel(dev, val, CONTROL_USBOTGHS_CONTROL);
+ return omap_control_lock_writel(dev, val, CONTROL_USBOTGHS_CONTROL);
}
EXPORT_SYMBOL_GPL(omap4_usb_phy_mailbox);
Index: omap-thermal/include/linux/mfd/omap_control.h
===================================================================
--- omap-thermal.orig/include/linux/mfd/omap_control.h
+++ omap-thermal/include/linux/mfd/omap_control.h
@@ -43,6 +43,7 @@ struct omap_control {
#ifdef CONFIG_MFD_OMAP_CONTROL
extern int omap_control_readl(struct device *dev, u32 reg, u32 *val);
extern int omap_control_writel(struct device *dev, u32 val, u32 reg);
+extern int omap_control_lock_writel(struct device *dev, u32 val, u32 reg);
extern struct device *omap_control_get(void);
extern void omap_control_put(struct device *dev);
#else
@@ -55,6 +56,11 @@ static inline int omap_control_writel(st
{
return 0;
}
+
+static inline int omap_control_lock_writel(struct device *dev, u32 val, u32 reg)
+{
+ return 0;
+}
static inline struct device *omap_control_get(void)
{
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 01/11] ARM: OMAP4: Remove un-used control module headers and defines.
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-28 9:12 ` Shilimkar, Santosh
-1 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 9:12 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, balbi, kishon, kbaidarov, linux-pm, linux-omap,
linux-arm-kernel
On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> From: Santosh Shilimkar <santosh.shilimkar@ti.com>
>
> Most of the OMAP4 control module register defines are not used and
> can be removed. Keep only needed defines and move them to common
> control module header just like other OMAP versions.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
Thanks for picking this up in your series
Regards
Santposh
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 01/11] ARM: OMAP4: Remove un-used control module headers and defines.
@ 2012-05-28 9:12 ` Shilimkar, Santosh
0 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 9:12 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> From: Santosh Shilimkar <santosh.shilimkar@ti.com>
>
> Most of the OMAP4 control module register defines are not used and
> can be removed. Keep only needed defines and move them to common
> control module header just like other OMAP versions.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
Thanks for picking this up in your series
Regards
Santposh
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 02/11] ARM: OMAP: expose control.h to mach area
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-28 9:25 ` Shilimkar, Santosh
-1 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 9:25 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, balbi, kishon, kbaidarov, linux-pm, linux-omap,
linux-arm-kernel
On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> This patch exposes the definitions under control.h to
> drivers outside the machine code.
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
After second thought, this complete header movement needs to avoided.
Drivers should not anyway include something like <mach/control.h>
May be split the control.h header file data into ..
- defines used by mach-omap2/* files which can remain in "control.h"
in existing location.
- common functions/defines used across drivers/*, mach-omap2/*,
plat-omap/*, should
go to include/linux/omap_control.h
- Driver specific defines like thermal, usb etc, should go to
respective drivers file.
What do you think ?
Regards
santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 02/11] ARM: OMAP: expose control.h to mach area
@ 2012-05-28 9:25 ` Shilimkar, Santosh
0 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 9:25 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> This patch exposes the definitions under control.h to
> drivers outside the machine code.
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
After second thought, this complete header movement needs to avoided.
Drivers should not anyway include something like <mach/control.h>
May be split the control.h header file data into ..
- defines used by mach-omap2/* files which can remain in "control.h"
in existing location.
- common functions/defines used across drivers/*, mach-omap2/*,
plat-omap/*, should
go to include/linux/omap_control.h
- Driver specific defines like thermal, usb etc, should go to
respective drivers file.
What do you think ?
Regards
santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 10/11] omap4: thermal: add basic CPU thermal zone
2012-05-25 8:26 ` Eduardo Valentin
@ 2012-05-28 9:33 ` Shilimkar, Santosh
-1 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 9:33 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, balbi, kishon, kbaidarov, linux-pm, linux-omap,
linux-arm-kernel
On Fri, May 25, 2012 at 1:56 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> This patch exposes OMAP4 thermal sensor as a thermal zone
> named "cpu". Only thermal creation is done here.
>
> TODO:
>
> - Add cooling bindings
> - Add extrapolation rules
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> drivers/thermal/Kconfig | 12 ++++++
> drivers/thermal/Makefile | 1 +
> drivers/thermal/omap-bandgap.c | 1 +
> drivers/thermal/omap-bandgap.h | 12 ++++++
> drivers/thermal/omap4-thermal.c | 72 +++++++++++++++++++++++++++++++++++++++
> 5 files changed, 98 insertions(+), 0 deletions(-)
> create mode 100644 drivers/thermal/omap4-thermal.c
>
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index ffdd240..2e82797 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -39,3 +39,15 @@ config OMAP_BANDGAP
> This includes alert interrupts generation and also the TSHUT
> support.
>
> +config OMAP4_THERMAL
> + bool "Texas Instruments OMAP4 thermal support"
> + depends on OMAP_BANDGAP
> + depends on ARCH_OMAP4
> + help
> + If you say yes here you get thermal support for the Texas Instruments
> + OMAP4 SoC family. The current chip supported are:
> + - OMAP4460
> +
It's more of IP feature than OMAP specific, so something like
config HAVE_BANDGAP_THERMAL_SUPPORT
and then let processor's which support enable it. That OMAP varients
in AMXX etc if needed can make use of it.
If you agree, then rest of the driver also can be cleaned to avoid
omap_* in file names and variables.
Apart from this minor comment, rest of the patch looks fine to me.
Regards
Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 10/11] omap4: thermal: add basic CPU thermal zone
@ 2012-05-28 9:33 ` Shilimkar, Santosh
0 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 9:33 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, May 25, 2012 at 1:56 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> This patch exposes OMAP4 thermal sensor as a thermal zone
> named "cpu". Only thermal creation is done here.
>
> TODO:
>
> ?- Add cooling bindings
> ?- Add extrapolation rules
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> ?drivers/thermal/Kconfig ? ? ? ? | ? 12 ++++++
> ?drivers/thermal/Makefile ? ? ? ?| ? ?1 +
> ?drivers/thermal/omap-bandgap.c ?| ? ?1 +
> ?drivers/thermal/omap-bandgap.h ?| ? 12 ++++++
> ?drivers/thermal/omap4-thermal.c | ? 72 +++++++++++++++++++++++++++++++++++++++
> ?5 files changed, 98 insertions(+), 0 deletions(-)
> ?create mode 100644 drivers/thermal/omap4-thermal.c
>
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index ffdd240..2e82797 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -39,3 +39,15 @@ config OMAP_BANDGAP
> ? ? ? ? ?This includes alert interrupts generation and also the TSHUT
> ? ? ? ? ?support.
>
> +config OMAP4_THERMAL
> + ? ? ? bool "Texas Instruments OMAP4 thermal support"
> + ? ? ? depends on OMAP_BANDGAP
> + ? ? ? depends on ARCH_OMAP4
> + ? ? ? help
> + ? ? ? ? If you say yes here you get thermal support for the Texas Instruments
> + ? ? ? ? OMAP4 SoC family. The current chip supported are:
> + ? ? ? ? ?- OMAP4460
> +
It's more of IP feature than OMAP specific, so something like
config HAVE_BANDGAP_THERMAL_SUPPORT
and then let processor's which support enable it. That OMAP varients
in AMXX etc if needed can make use of it.
If you agree, then rest of the driver also can be cleaned to avoid
omap_* in file names and variables.
Apart from this minor comment, rest of the patch looks fine to me.
Regards
Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 10/11] omap4: thermal: add basic CPU thermal zone
2012-05-28 9:33 ` Shilimkar, Santosh
@ 2012-05-28 9:48 ` Felipe Balbi
-1 siblings, 0 replies; 198+ messages in thread
From: Felipe Balbi @ 2012-05-28 9:48 UTC (permalink / raw)
To: Shilimkar, Santosh
Cc: amit.kucheria, kbaidarov, kishon, balbi, linux-pm, linux-omap,
linux-arm-kernel
[-- Attachment #1.1: Type: text/plain, Size: 2108 bytes --]
Hi,
On Mon, May 28, 2012 at 03:03:26PM +0530, Shilimkar, Santosh wrote:
> On Fri, May 25, 2012 at 1:56 PM, Eduardo Valentin
> <eduardo.valentin@ti.com> wrote:
> > This patch exposes OMAP4 thermal sensor as a thermal zone
> > named "cpu". Only thermal creation is done here.
> >
> > TODO:
> >
> > - Add cooling bindings
> > - Add extrapolation rules
> >
> > Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> > ---
> > drivers/thermal/Kconfig | 12 ++++++
> > drivers/thermal/Makefile | 1 +
> > drivers/thermal/omap-bandgap.c | 1 +
> > drivers/thermal/omap-bandgap.h | 12 ++++++
> > drivers/thermal/omap4-thermal.c | 72 +++++++++++++++++++++++++++++++++++++++
> > 5 files changed, 98 insertions(+), 0 deletions(-)
> > create mode 100644 drivers/thermal/omap4-thermal.c
> >
> > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> > index ffdd240..2e82797 100644
> > --- a/drivers/thermal/Kconfig
> > +++ b/drivers/thermal/Kconfig
> > @@ -39,3 +39,15 @@ config OMAP_BANDGAP
> > This includes alert interrupts generation and also the TSHUT
> > support.
> >
> > +config OMAP4_THERMAL
> > + bool "Texas Instruments OMAP4 thermal support"
> > + depends on OMAP_BANDGAP
> > + depends on ARCH_OMAP4
> > + help
> > + If you say yes here you get thermal support for the Texas Instruments
> > + OMAP4 SoC family. The current chip supported are:
> > + - OMAP4460
> > +
> It's more of IP feature than OMAP specific, so something like
>
> config HAVE_BANDGAP_THERMAL_SUPPORT
>
> and then let processor's which support enable it. That OMAP varients
> in AMXX etc if needed can make use of it.
Those are just an OMAP in disguise.
> If you agree, then rest of the driver also can be cleaned to avoid
> omap_* in file names and variables.
>
> Apart from this minor comment, rest of the patch looks fine to me.
Then it will appear as a fully generic bandgap driver, which is not the
case. This is really a TI thing, right ?
--
balbi
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^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 10/11] omap4: thermal: add basic CPU thermal zone
@ 2012-05-28 9:48 ` Felipe Balbi
0 siblings, 0 replies; 198+ messages in thread
From: Felipe Balbi @ 2012-05-28 9:48 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Mon, May 28, 2012 at 03:03:26PM +0530, Shilimkar, Santosh wrote:
> On Fri, May 25, 2012 at 1:56 PM, Eduardo Valentin
> <eduardo.valentin@ti.com> wrote:
> > This patch exposes OMAP4 thermal sensor as a thermal zone
> > named "cpu". Only thermal creation is done here.
> >
> > TODO:
> >
> > ?- Add cooling bindings
> > ?- Add extrapolation rules
> >
> > Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> > ---
> > ?drivers/thermal/Kconfig ? ? ? ? | ? 12 ++++++
> > ?drivers/thermal/Makefile ? ? ? ?| ? ?1 +
> > ?drivers/thermal/omap-bandgap.c ?| ? ?1 +
> > ?drivers/thermal/omap-bandgap.h ?| ? 12 ++++++
> > ?drivers/thermal/omap4-thermal.c | ? 72 +++++++++++++++++++++++++++++++++++++++
> > ?5 files changed, 98 insertions(+), 0 deletions(-)
> > ?create mode 100644 drivers/thermal/omap4-thermal.c
> >
> > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> > index ffdd240..2e82797 100644
> > --- a/drivers/thermal/Kconfig
> > +++ b/drivers/thermal/Kconfig
> > @@ -39,3 +39,15 @@ config OMAP_BANDGAP
> > ? ? ? ? ?This includes alert interrupts generation and also the TSHUT
> > ? ? ? ? ?support.
> >
> > +config OMAP4_THERMAL
> > + ? ? ? bool "Texas Instruments OMAP4 thermal support"
> > + ? ? ? depends on OMAP_BANDGAP
> > + ? ? ? depends on ARCH_OMAP4
> > + ? ? ? help
> > + ? ? ? ? If you say yes here you get thermal support for the Texas Instruments
> > + ? ? ? ? OMAP4 SoC family. The current chip supported are:
> > + ? ? ? ? ?- OMAP4460
> > +
> It's more of IP feature than OMAP specific, so something like
>
> config HAVE_BANDGAP_THERMAL_SUPPORT
>
> and then let processor's which support enable it. That OMAP varients
> in AMXX etc if needed can make use of it.
Those are just an OMAP in disguise.
> If you agree, then rest of the driver also can be cleaned to avoid
> omap_* in file names and variables.
>
> Apart from this minor comment, rest of the patch looks fine to me.
Then it will appear as a fully generic bandgap driver, which is not the
case. This is really a TI thing, right ?
--
balbi
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^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-28 9:54 ` Shilimkar, Santosh
-1 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 9:54 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, balbi, kishon, kbaidarov, J Keerthy, linux-pm,
linux-omap, linux-arm-kernel
On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> This patch introduces a MFD core device driver for
> OMAP system control module.
>
> The control module allows software control of
> various static modes supported by the device. It is
> composed of two control submodules: general control
> module and device (padconfiguration) control
> module.
>
> In this patch, the children defined are for:
> . USB-phy pin control
> . Bangap temperature sensor
>
> Device driver is probed with postcore_initcall.
> However, as some of the APIs exposed by this driver
> may be needed in very early init phase, an early init
> class is also available: "early_omap_control".
>
> Signed-off-by: J Keerthy <j-keerthy@ti.com>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
[..]
> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> index ad95c7a..222dbad 100644
> --- a/arch/arm/plat-omap/Kconfig
> +++ b/arch/arm/plat-omap/Kconfig
> @@ -5,6 +5,9 @@ menu "TI OMAP Common Features"
> config ARCH_OMAP_OTG
> bool
>
> +config ARCH_HAS_CONTROL_MODULE
> + bool
> +
Thanks for getting rid of OMAP CONFIG here.
> choice
> prompt "OMAP System Type"
> default ARCH_OMAP2PLUS
> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> index 11e4438..25a66d8 100644
> --- a/drivers/mfd/Kconfig
> +++ b/drivers/mfd/Kconfig
> @@ -795,6 +795,15 @@ config MFD_WL1273_CORE
> driver connects the radio-wl1273 V4L2 module and the wl1273
> audio codec.
>
> +config MFD_OMAP_CONTROL
> + bool "Texas Instruments OMAP System control module"
> + depends on ARCH_HAS_CONTROL_MODULE
> + help
> + This is the core driver for system control module. This driver
> + is responsible for creating the control module mfd child,
> + like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
> + change for off mode.
> +
> config MFD_OMAP_USB_HOST
> bool "Support OMAP USBHS core driver"
> depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index 05fa538..00f99d6 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -106,6 +106,7 @@ obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
> obj-$(CONFIG_MFD_VX855) += vx855.o
> obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
> obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
> +obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
> obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
> obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
> obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
> diff --git a/drivers/mfd/omap-control-core.c b/drivers/mfd/omap-control-core.c
> new file mode 100644
> index 0000000..7d8d408
> --- /dev/null
> +++ b/drivers/mfd/omap-control-core.c
> @@ -0,0 +1,211 @@
> +/*
> + * OMAP system control module driver file
> + *
> + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> + * Contacts:
> + * Based on original code written by:
> + * J Keerthy <j-keerthy@ti.com>
> + * Moiz Sonasath <m-sonasath@ti.com>
> + * MFD clean up and re-factoring:
> + * Eduardo Valentin <eduardo.valentin@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + *
> + */
> +
> +#include <linux/module.h>
> +#include <linux/export.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/io.h>
> +#include <linux/err.h>
> +#include <linux/of_platform.h>
> +#include <linux/of_address.h>
> +#include <linux/mfd/core.h>
> +#include <linux/mfd/omap_control.h>
> +
> +static struct omap_control *omap_control_module;
> +
> +/**
> + * omap_control_readl: Read a single omap control module register.
> + *
> + * @dev: device to read from.
> + * @reg: register to read.
> + * @val: output with register value.
> + *
> + * returns 0 on success or -EINVAL in case struct device is invalid.
> + */
> +int omap_control_readl(struct device *dev, u32 reg, u32 *val)
> +{
> + struct omap_control *omap_control = dev_get_drvdata(dev);
> +
> + if (!omap_control)
> + return -EINVAL;
> +
> + *val = readl(omap_control->base + reg);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(omap_control_readl);
> +
I might have missed in the last scan, but can you let
function return the register value.
I am guessing, you did this for error case handling. You might
want to stick to read API semantic and just have WARN_ON()
to take care of error case.
> +/**
> + * omap_control_writel: Write a single omap control module register.
> + *
> + * @dev: device to read from.
> + * @val: value to write.
> + * @reg: register to write to.
> + *
> + * returns 0 on success or -EINVAL in case struct device is invalid.
> + */
> +int omap_control_writel(struct device *dev, u32 val, u32 reg)
> +{
> + struct omap_control *omap_control = dev_get_drvdata(dev);
> + unsigned long flags;
> +
> + if (!omap_control)
> + return -EINVAL;
> +
> + spin_lock_irqsave(&omap_control->reg_lock, flags);
> + writel(val, omap_control->base + reg);
> + spin_unlock_irqrestore(&omap_control->reg_lock, flags);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(omap_control_writel);
> +
> +/**
> + * omap_control_get: returns the control module device pinter
> + *
> + * The modules which has to use control module API's to read or write should
> + * call this API to get the control module device pointer.
> + */
> +struct device *omap_control_get(void)
> +{
> + unsigned long flags;
> +
> + if (!omap_control_module)
> + return ERR_PTR(-ENODEV);
> +
> + spin_lock_irqsave(&omap_control_module->reg_lock, flags);
> + omap_control_module->use_count++;
> + spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
> +
> + return omap_control_module->dev;
> +}
> +EXPORT_SYMBOL_GPL(omap_control_get);
> +
> +/**
> + * omap_control_put: returns the control module device pinter
> + *
> + * The modules which has to use control module API's to read or write should
> + * call this API to get the control module device pointer.
> + */
> +void omap_control_put(struct device *dev)
> +{
> + struct omap_control *omap_control = dev_get_drvdata(dev);
> + unsigned long flags;
> +
> + if (!omap_control)
> + return;
> +
> + spin_lock_irqsave(&omap_control->reg_lock, flags);
> + omap_control->use_count--;
> + spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
> +}
> +EXPORT_SYMBOL_GPL(omap_control_put);
> +
> +static const struct of_device_id of_omap_control_match[] = {
> + { .compatible = "ti,omap3-control", },
> + { .compatible = "ti,omap4-control", },
> + { .compatible = "ti,omap5-control", },
> + { },
> +};
> +
> +static int __devinit omap_control_probe(struct platform_device *pdev)
> +{
> + struct resource *res;
> + void __iomem *base;
> + struct device *dev = &pdev->dev;
> + struct device_node *np = dev->of_node;
> + struct omap_control *omap_control;
> +
> + omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
> + if (!omap_control) {
> + dev_err(dev, "not enough memory for omap_control\n");
> + return -ENOMEM;
> + }
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!res) {
> + dev_err(dev, "missing memory base resource\n");
> + return -EINVAL;
> + }
> +
> + base = devm_request_and_ioremap(dev, res);
> + if (!base) {
> + dev_err(dev, "ioremap failed\n");
> + return -EADDRNOTAVAIL;
> + }
> +
> + omap_control->base = base;
> + omap_control->dev = dev;
> + spin_lock_init(&omap_control->reg_lock);
> +
> + platform_set_drvdata(pdev, omap_control);
> + omap_control_module = omap_control;
> +
> + return of_platform_populate(np, of_omap_control_match, NULL, dev);
> +}
> +
Will the probe get called on multiple devices and race ?
> +static int __devexit omap_control_remove(struct platform_device *pdev)
> +{
> + struct omap_control *omap_control = platform_get_drvdata(pdev);
> +
> + spin_lock(&omap_control->reg_lock);
> + if (omap_control->use_count > 0) {
> + spin_unlock(&omap_control->reg_lock);
> + dev_err(&pdev->dev, "device removed while still being used\n");
> + return -EBUSY;
> + }
> + spin_unlock(&omap_control->reg_lock);
> +
Do you really need above lock where you are just doing the
register read. smp_rmb(), should be enough, I guess.
Regards
Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-05-28 9:54 ` Shilimkar, Santosh
0 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 9:54 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> This patch introduces a MFD core device driver for
> OMAP system control module.
>
> The control module allows software control of
> various static modes supported by the device. It is
> composed of two control submodules: general control
> module and device (padconfiguration) control
> module.
>
> In this patch, the children defined are for:
> . USB-phy pin control
> . Bangap temperature sensor
>
> Device driver is probed with postcore_initcall.
> However, as some of the APIs exposed by this driver
> may be needed in very early init phase, an early init
> class is also available: "early_omap_control".
>
> Signed-off-by: J Keerthy <j-keerthy@ti.com>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
[..]
> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> index ad95c7a..222dbad 100644
> --- a/arch/arm/plat-omap/Kconfig
> +++ b/arch/arm/plat-omap/Kconfig
> @@ -5,6 +5,9 @@ menu "TI OMAP Common Features"
> ?config ARCH_OMAP_OTG
> ? ? ? ?bool
>
> +config ARCH_HAS_CONTROL_MODULE
> + ? ? ? bool
> +
Thanks for getting rid of OMAP CONFIG here.
> ?choice
> ? ? ? ?prompt "OMAP System Type"
> ? ? ? ?default ARCH_OMAP2PLUS
> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> index 11e4438..25a66d8 100644
> --- a/drivers/mfd/Kconfig
> +++ b/drivers/mfd/Kconfig
> @@ -795,6 +795,15 @@ config MFD_WL1273_CORE
> ? ? ? ? ?driver connects the radio-wl1273 V4L2 module and the wl1273
> ? ? ? ? ?audio codec.
>
> +config MFD_OMAP_CONTROL
> + ? ? ? bool "Texas Instruments OMAP System control module"
> + ? ? ? depends on ARCH_HAS_CONTROL_MODULE
> + ? ? ? help
> + ? ? ? ? This is the core driver for system control module. This driver
> + ? ? ? ? is responsible for creating the control module mfd child,
> + ? ? ? ? like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
> + ? ? ? ? change for off mode.
> +
> ?config MFD_OMAP_USB_HOST
> ? ? ? ?bool "Support OMAP USBHS core driver"
> ? ? ? ?depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index 05fa538..00f99d6 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -106,6 +106,7 @@ obj-$(CONFIG_MFD_TPS6586X) ?+= tps6586x.o
> ?obj-$(CONFIG_MFD_VX855) ? ? ? ? ? ? ? ?+= vx855.o
> ?obj-$(CONFIG_MFD_WL1273_CORE) ?+= wl1273-core.o
> ?obj-$(CONFIG_MFD_CS5535) ? ? ? += cs5535-mfd.o
> +obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
> ?obj-$(CONFIG_MFD_OMAP_USB_HOST) ? ? ? ?+= omap-usb-host.o
> ?obj-$(CONFIG_MFD_PM8921_CORE) ?+= pm8921-core.o
> ?obj-$(CONFIG_MFD_PM8XXX_IRQ) ? += pm8xxx-irq.o
> diff --git a/drivers/mfd/omap-control-core.c b/drivers/mfd/omap-control-core.c
> new file mode 100644
> index 0000000..7d8d408
> --- /dev/null
> +++ b/drivers/mfd/omap-control-core.c
> @@ -0,0 +1,211 @@
> +/*
> + * OMAP system control module driver file
> + *
> + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> + * Contacts:
> + * Based on original code written by:
> + * ? ?J Keerthy <j-keerthy@ti.com>
> + * ? ?Moiz Sonasath <m-sonasath@ti.com>
> + * MFD clean up and re-factoring:
> + * ? ?Eduardo Valentin <eduardo.valentin@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the GNU
> + * General Public License for more details.
> + *
> + */
> +
> +#include <linux/module.h>
> +#include <linux/export.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/io.h>
> +#include <linux/err.h>
> +#include <linux/of_platform.h>
> +#include <linux/of_address.h>
> +#include <linux/mfd/core.h>
> +#include <linux/mfd/omap_control.h>
> +
> +static struct omap_control *omap_control_module;
> +
> +/**
> + * omap_control_readl: Read a single omap control module register.
> + *
> + * @dev: device to read from.
> + * @reg: register to read.
> + * @val: output with register value.
> + *
> + * returns 0 on success or -EINVAL in case struct device is invalid.
> + */
> +int omap_control_readl(struct device *dev, u32 reg, u32 *val)
> +{
> + ? ? ? struct omap_control *omap_control = dev_get_drvdata(dev);
> +
> + ? ? ? if (!omap_control)
> + ? ? ? ? ? ? ? return -EINVAL;
> +
> + ? ? ? *val = readl(omap_control->base + reg);
> +
> + ? ? ? return 0;
> +}
> +EXPORT_SYMBOL_GPL(omap_control_readl);
> +
I might have missed in the last scan, but can you let
function return the register value.
I am guessing, you did this for error case handling. You might
want to stick to read API semantic and just have WARN_ON()
to take care of error case.
> +/**
> + * omap_control_writel: Write a single omap control module register.
> + *
> + * @dev: device to read from.
> + * @val: value to write.
> + * @reg: register to write to.
> + *
> + * returns 0 on success or -EINVAL in case struct device is invalid.
> + */
> +int omap_control_writel(struct device *dev, u32 val, u32 reg)
> +{
> + ? ? ? struct omap_control *omap_control = dev_get_drvdata(dev);
> + ? ? ? unsigned long flags;
> +
> + ? ? ? if (!omap_control)
> + ? ? ? ? ? ? ? return -EINVAL;
> +
> + ? ? ? spin_lock_irqsave(&omap_control->reg_lock, flags);
> + ? ? ? writel(val, omap_control->base + reg);
> + ? ? ? spin_unlock_irqrestore(&omap_control->reg_lock, flags);
> +
> + ? ? ? return 0;
> +}
> +EXPORT_SYMBOL_GPL(omap_control_writel);
> +
> +/**
> + * omap_control_get: returns the control module device pinter
> + *
> + * The modules which has to use control module API's to read or write should
> + * call this API to get the control module device pointer.
> + */
> +struct device *omap_control_get(void)
> +{
> + ? ? ? unsigned long flags;
> +
> + ? ? ? if (!omap_control_module)
> + ? ? ? ? ? ? ? return ERR_PTR(-ENODEV);
> +
> + ? ? ? spin_lock_irqsave(&omap_control_module->reg_lock, flags);
> + ? ? ? omap_control_module->use_count++;
> + ? ? ? spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
> +
> + ? ? ? return omap_control_module->dev;
> +}
> +EXPORT_SYMBOL_GPL(omap_control_get);
> +
> +/**
> + * omap_control_put: returns the control module device pinter
> + *
> + * The modules which has to use control module API's to read or write should
> + * call this API to get the control module device pointer.
> + */
> +void omap_control_put(struct device *dev)
> +{
> + ? ? ? struct omap_control *omap_control = dev_get_drvdata(dev);
> + ? ? ? unsigned long flags;
> +
> + ? ? ? if (!omap_control)
> + ? ? ? ? ? ? ? return;
> +
> + ? ? ? spin_lock_irqsave(&omap_control->reg_lock, flags);
> + ? ? ? omap_control->use_count--;
> + ? ? ? spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
> +}
> +EXPORT_SYMBOL_GPL(omap_control_put);
> +
> +static const struct of_device_id of_omap_control_match[] = {
> + ? ? ? { .compatible = "ti,omap3-control", },
> + ? ? ? { .compatible = "ti,omap4-control", },
> + ? ? ? { .compatible = "ti,omap5-control", },
> + ? ? ? { },
> +};
> +
> +static int __devinit omap_control_probe(struct platform_device *pdev)
> +{
> + ? ? ? struct resource *res;
> + ? ? ? void __iomem *base;
> + ? ? ? struct device *dev = &pdev->dev;
> + ? ? ? struct device_node *np = dev->of_node;
> + ? ? ? struct omap_control *omap_control;
> +
> + ? ? ? omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
> + ? ? ? if (!omap_control) {
> + ? ? ? ? ? ? ? dev_err(dev, "not enough memory for omap_control\n");
> + ? ? ? ? ? ? ? return -ENOMEM;
> + ? ? ? }
> +
> + ? ? ? res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + ? ? ? if (!res) {
> + ? ? ? ? ? ? ? dev_err(dev, "missing memory base resource\n");
> + ? ? ? ? ? ? ? return -EINVAL;
> + ? ? ? }
> +
> + ? ? ? base = devm_request_and_ioremap(dev, res);
> + ? ? ? if (!base) {
> + ? ? ? ? ? ? ? dev_err(dev, "ioremap failed\n");
> + ? ? ? ? ? ? ? return -EADDRNOTAVAIL;
> + ? ? ? }
> +
> + ? ? ? omap_control->base = base;
> + ? ? ? omap_control->dev = dev;
> + ? ? ? spin_lock_init(&omap_control->reg_lock);
> +
> + ? ? ? platform_set_drvdata(pdev, omap_control);
> + ? ? ? omap_control_module = omap_control;
> +
> + ? ? ? return of_platform_populate(np, of_omap_control_match, NULL, dev);
> +}
> +
Will the probe get called on multiple devices and race ?
> +static int __devexit omap_control_remove(struct platform_device *pdev)
> +{
> + ? ? ? struct omap_control *omap_control = platform_get_drvdata(pdev);
> +
> + ? ? ? spin_lock(&omap_control->reg_lock);
> + ? ? ? if (omap_control->use_count > 0) {
> + ? ? ? ? ? ? ? spin_unlock(&omap_control->reg_lock);
> + ? ? ? ? ? ? ? dev_err(&pdev->dev, "device removed while still being used\n");
> + ? ? ? ? ? ? ? return -EBUSY;
> + ? ? ? }
> + ? ? ? spin_unlock(&omap_control->reg_lock);
> +
Do you really need above lock where you are just doing the
register read. smp_rmb(), should be enough, I guess.
Regards
Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 04/11] OMAP: Add early device for system control module
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-28 9:58 ` Shilimkar, Santosh
-1 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 9:58 UTC (permalink / raw)
To: Eduardo Valentin
Cc: b-cousson, kishon, kbaidarov, tony, paul, balbi, amit.kucheria,
linux-pm, linux-arm-kernel, linux-omap, amit.kachhap
On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> This is a way to add an early device for system control module.
> the code is also requesting for driver registration and probing.
> Done at early_initcall because at that time, ioremapping is possible.
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/devices.c | 29 +++++++++++++++++++++++++++++
> 1 files changed, 29 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> index 9332673..58cc5c3 100644
> --- a/arch/arm/mach-omap2/devices.c
> +++ b/arch/arm/mach-omap2/devices.c
> @@ -40,6 +40,35 @@
> #define L3_MODULES_MAX_LEN 12
> #define L3_MODULES 3
>
> +static struct resource control_resources[] = {
> + [0] = {
> + .start = 0x4a002000,
> + .end = 0x4a0027ff,
> + .flags = IORESOURCE_MEM,
> + },
> +};
> +static struct platform_device control_device = {
> + .name = "omap-control-core",
> + .id = 0,
> + .resource = control_resources,
> + .num_resources = ARRAY_SIZE(control_resources),
> +};
> +
> +static struct platform_device *early_devices[] __initdata = {
> + &control_device,
> +};
> +
> +static int __init plat_early_device_setup(void)
> +{
> + early_platform_add_devices(early_devices,
> + ARRAY_SIZE(early_devices));
> + early_platform_driver_register_all("early_omap_control");
> + early_platform_driver_probe("early_omap_control", 1, false);
> +
> + return 0;
> +}
> +early_initcall(plat_early_device_setup);
> +
> static int omap_init_control(void)
> {
> struct omap_hwmod *oh;
Nice !!
Apart from fix from Konstantin and Benoit's DT comment,
patch looks fine to me.
Regards
Santosh
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^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 04/11] OMAP: Add early device for system control module
@ 2012-05-28 9:58 ` Shilimkar, Santosh
0 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 9:58 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> This is a way to add an early device for system control module.
> the code is also requesting for driver registration and probing.
> Done at early_initcall because at that time, ioremapping is possible.
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> ?arch/arm/mach-omap2/devices.c | ? 29 +++++++++++++++++++++++++++++
> ?1 files changed, 29 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> index 9332673..58cc5c3 100644
> --- a/arch/arm/mach-omap2/devices.c
> +++ b/arch/arm/mach-omap2/devices.c
> @@ -40,6 +40,35 @@
> ?#define L3_MODULES_MAX_LEN 12
> ?#define L3_MODULES 3
>
> +static struct resource control_resources[] = {
> + ? ? ? [0] = {
> + ? ? ? ? ? ? ? .start ?= 0x4a002000,
> + ? ? ? ? ? ? ? .end ? ?= 0x4a0027ff,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_MEM,
> + ? ? ? },
> +};
> +static struct platform_device control_device = {
> + ? ? ? .name ? ? ? ? ? = "omap-control-core",
> + ? ? ? .id ? ? ? ? ? ? = 0,
> + ? ? ? .resource ? ? ? = control_resources,
> + ? ? ? .num_resources ?= ARRAY_SIZE(control_resources),
> +};
> +
> +static struct platform_device *early_devices[] __initdata = {
> + ? ? ? &control_device,
> +};
> +
> +static int __init plat_early_device_setup(void)
> +{
> + ? ? ? early_platform_add_devices(early_devices,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?ARRAY_SIZE(early_devices));
> + ? ? ? early_platform_driver_register_all("early_omap_control");
> + ? ? ? early_platform_driver_probe("early_omap_control", 1, false);
> +
> + ? ? ? return 0;
> +}
> +early_initcall(plat_early_device_setup);
> +
> ?static int omap_init_control(void)
> ?{
> ? ? ? ?struct omap_hwmod ? ? ? ? ? ? ? *oh;
Nice !!
Apart from fix from Konstantin and Benoit's DT comment,
patch looks fine to me.
Regards
Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 06/11] OMAP2+: use control module mfd driver in omap_type
2012-05-25 12:53 ` Cousson, Benoit
@ 2012-05-28 10:02 ` Shilimkar, Santosh
-1 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 10:02 UTC (permalink / raw)
To: Cousson, Benoit
Cc: amit.kucheria, balbi, kishon, kbaidarov, linux-pm, linux-omap,
linux-arm-kernel
On Fri, May 25, 2012 at 6:23 PM, Cousson, Benoit <b-cousson@ti.com> wrote:
> Hi Eduardo,
>
>
> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
>>
>> OMAP system control module can be probed early, then
>> omap_type is safe to use its APIs.
>>
>> TODO: add support for other omap versions
>>
>> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
>> ---
>> arch/arm/mach-omap2/id.c | 16 +++++++++++++++-
>> 1 files changed, 15 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
>> index 5bb9746..acfd698 100644
>> --- a/arch/arm/mach-omap2/id.c
>> +++ b/arch/arm/mach-omap2/id.c
>> @@ -18,6 +18,7 @@
>> #include<linux/kernel.h>
>> #include<linux/init.h>
>> #include<linux/io.h>
>> +#include<linux/mfd/omap_control.h>
>>
>> #include<asm/cputype.h>
>>
>> @@ -40,8 +41,14 @@ EXPORT_SYMBOL(omap_rev);
>>
>> int omap_type(void)
>> {
>> + struct device *scm;
>> + int ret = 0;
>> u32 val = 0;
>>
>> + scm = omap_control_get();
>> + if (IS_ERR_OR_NULL(scm))
>> + return 0;
>> +
>> if (cpu_is_omap24xx()) {
>
>
> OK, not really related to that patch, but the previous cpu_is_omap24xx makes
> me think of that :-)
>
> What about the omap<X>_check_revision used by cpu_is_XXX?
>
> This call is the very first one to require the control module access in
> order to get the ID_CODE inside the control module.
>
> So far it still use that ugly hard coded phys -> virtual address macro that
> is sued for that.
>
Agree with Benoits comment. One way to deal with this is,
store the register offset with init and then just use it here.
That way you can get rid of all cpu_is_XXXX() from this function.
Regards
Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 06/11] OMAP2+: use control module mfd driver in omap_type
@ 2012-05-28 10:02 ` Shilimkar, Santosh
0 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 10:02 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, May 25, 2012 at 6:23 PM, Cousson, Benoit <b-cousson@ti.com> wrote:
> Hi Eduardo,
>
>
> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
>>
>> OMAP system control module can be probed early, then
>> omap_type is safe to use its APIs.
>>
>> TODO: add support for other omap versions
>>
>> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
>> ---
>> ?arch/arm/mach-omap2/id.c | ? 16 +++++++++++++++-
>> ?1 files changed, 15 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
>> index 5bb9746..acfd698 100644
>> --- a/arch/arm/mach-omap2/id.c
>> +++ b/arch/arm/mach-omap2/id.c
>> @@ -18,6 +18,7 @@
>> ?#include<linux/kernel.h>
>> ?#include<linux/init.h>
>> ?#include<linux/io.h>
>> +#include<linux/mfd/omap_control.h>
>>
>> ?#include<asm/cputype.h>
>>
>> @@ -40,8 +41,14 @@ EXPORT_SYMBOL(omap_rev);
>>
>> ?int omap_type(void)
>> ?{
>> + ? ? ? struct device *scm;
>> + ? ? ? int ret = 0;
>> ? ? ? ?u32 val = 0;
>>
>> + ? ? ? scm = omap_control_get();
>> + ? ? ? if (IS_ERR_OR_NULL(scm))
>> + ? ? ? ? ? ? ? return 0;
>> +
>> ? ? ? ?if (cpu_is_omap24xx()) {
>
>
> OK, not really related to that patch, but the previous cpu_is_omap24xx makes
> me think of that :-)
>
> What about the omap<X>_check_revision used by cpu_is_XXX?
>
> This call is the very first one to require the control module access in
> order to get the ID_CODE inside the control module.
>
> So far it still use that ugly hard coded phys -> virtual address macro that
> is sued for that.
>
Agree with Benoits comment. One way to deal with this is,
store the register offset with init and then just use it here.
That way you can get rid of all cpu_is_XXXX() from this function.
Regards
Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 08/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-28 10:04 ` Shilimkar, Santosh
-1 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 10:04 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, balbi, kishon, kbaidarov, Keerthy, linux-pm,
linux-omap, linux-arm-kernel
On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> OMAP4460 specific temperature sensor register bit fields are added.
> Existing OMAP4 entries are renamed to OMAP4430.
>
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
Once you split the header, as mentioned in earlier comment,
you can move those defines in driver file directly.
Regards
Santsoh
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 08/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields
@ 2012-05-28 10:04 ` Shilimkar, Santosh
0 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 10:04 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> OMAP4460 specific temperature sensor register bit fields are added.
> Existing OMAP4 entries are renamed to OMAP4430.
>
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
Once you split the header, as mentioned in earlier comment,
you can move those defines in driver file directly.
Regards
Santsoh
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 10/11] omap4: thermal: add basic CPU thermal zone
2012-05-28 9:48 ` Felipe Balbi
@ 2012-05-28 10:26 ` Valentin, Eduardo
-1 siblings, 0 replies; 198+ messages in thread
From: Valentin, Eduardo @ 2012-05-28 10:26 UTC (permalink / raw)
To: balbi
Cc: Shilimkar, Santosh, b-cousson, kishon, kbaidarov, tony, paul,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap
Hello Santosh,
On Mon, May 28, 2012 at 12:48 PM, Felipe Balbi <balbi@ti.com> wrote:
> Hi,
>
> On Mon, May 28, 2012 at 03:03:26PM +0530, Shilimkar, Santosh wrote:
>> On Fri, May 25, 2012 at 1:56 PM, Eduardo Valentin
>> <eduardo.valentin@ti.com> wrote:
>> > This patch exposes OMAP4 thermal sensor as a thermal zone
>> > named "cpu". Only thermal creation is done here.
>> >
>> > TODO:
>> >
>> > - Add cooling bindings
>> > - Add extrapolation rules
>> >
>> > Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
>> > ---
>> > drivers/thermal/Kconfig | 12 ++++++
>> > drivers/thermal/Makefile | 1 +
>> > drivers/thermal/omap-bandgap.c | 1 +
>> > drivers/thermal/omap-bandgap.h | 12 ++++++
>> > drivers/thermal/omap4-thermal.c | 72 +++++++++++++++++++++++++++++++++++++++
>> > 5 files changed, 98 insertions(+), 0 deletions(-)
>> > create mode 100644 drivers/thermal/omap4-thermal.c
>> >
>> > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
>> > index ffdd240..2e82797 100644
>> > --- a/drivers/thermal/Kconfig
>> > +++ b/drivers/thermal/Kconfig
>> > @@ -39,3 +39,15 @@ config OMAP_BANDGAP
>> > This includes alert interrupts generation and also the TSHUT
>> > support.
>> >
>> > +config OMAP4_THERMAL
>> > + bool "Texas Instruments OMAP4 thermal support"
>> > + depends on OMAP_BANDGAP
>> > + depends on ARCH_OMAP4
>> > + help
>> > + If you say yes here you get thermal support for the Texas Instruments
>> > + OMAP4 SoC family. The current chip supported are:
>> > + - OMAP4460
>> > +
>> It's more of IP feature than OMAP specific, so something like
>>
>> config HAVE_BANDGAP_THERMAL_SUPPORT
>>
>> and then let processor's which support enable it. That OMAP varients
>> in AMXX etc if needed can make use of it.
>
> Those are just an OMAP in disguise.
>
>> If you agree, then rest of the driver also can be cleaned to avoid
>> omap_* in file names and variables.
>>
>> Apart from this minor comment, rest of the patch looks fine to me.
>
> Then it will appear as a fully generic bandgap driver, which is not the
> case. This is really a TI thing, right ?
I have to agree with Felipe here. I do see your point to have a name
which is applicable to AMxx, but having such generic naming is not
helping either :-( as this bandgap driver is not supposed to be
generic.
I though of "ti_bandgap.*", but still seams to be misleading..
I guess same applies to usb_phy and scm.
Again, if you have a name that fits better I won't hesitate to use it :-)
>
> --
> balbi
--
Eduardo Valentin
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^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 10/11] omap4: thermal: add basic CPU thermal zone
@ 2012-05-28 10:26 ` Valentin, Eduardo
0 siblings, 0 replies; 198+ messages in thread
From: Valentin, Eduardo @ 2012-05-28 10:26 UTC (permalink / raw)
To: linux-arm-kernel
Hello Santosh,
On Mon, May 28, 2012 at 12:48 PM, Felipe Balbi <balbi@ti.com> wrote:
> Hi,
>
> On Mon, May 28, 2012 at 03:03:26PM +0530, Shilimkar, Santosh wrote:
>> On Fri, May 25, 2012 at 1:56 PM, Eduardo Valentin
>> <eduardo.valentin@ti.com> wrote:
>> > This patch exposes OMAP4 thermal sensor as a thermal zone
>> > named "cpu". Only thermal creation is done here.
>> >
>> > TODO:
>> >
>> > ?- Add cooling bindings
>> > ?- Add extrapolation rules
>> >
>> > Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
>> > ---
>> > ?drivers/thermal/Kconfig ? ? ? ? | ? 12 ++++++
>> > ?drivers/thermal/Makefile ? ? ? ?| ? ?1 +
>> > ?drivers/thermal/omap-bandgap.c ?| ? ?1 +
>> > ?drivers/thermal/omap-bandgap.h ?| ? 12 ++++++
>> > ?drivers/thermal/omap4-thermal.c | ? 72 +++++++++++++++++++++++++++++++++++++++
>> > ?5 files changed, 98 insertions(+), 0 deletions(-)
>> > ?create mode 100644 drivers/thermal/omap4-thermal.c
>> >
>> > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
>> > index ffdd240..2e82797 100644
>> > --- a/drivers/thermal/Kconfig
>> > +++ b/drivers/thermal/Kconfig
>> > @@ -39,3 +39,15 @@ config OMAP_BANDGAP
>> > ? ? ? ? ?This includes alert interrupts generation and also the TSHUT
>> > ? ? ? ? ?support.
>> >
>> > +config OMAP4_THERMAL
>> > + ? ? ? bool "Texas Instruments OMAP4 thermal support"
>> > + ? ? ? depends on OMAP_BANDGAP
>> > + ? ? ? depends on ARCH_OMAP4
>> > + ? ? ? help
>> > + ? ? ? ? If you say yes here you get thermal support for the Texas Instruments
>> > + ? ? ? ? OMAP4 SoC family. The current chip supported are:
>> > + ? ? ? ? ?- OMAP4460
>> > +
>> It's more of IP feature than OMAP specific, so something like
>>
>> config ?HAVE_BANDGAP_THERMAL_SUPPORT
>>
>> and then let processor's which support enable it. That OMAP varients
>> in AMXX etc if needed can make use of it.
>
> Those are just an OMAP in disguise.
>
>> If you agree, then rest of the driver also can be cleaned to avoid
>> omap_* in file names and variables.
>>
>> Apart from this minor comment, rest of the patch looks fine to me.
>
> Then it will appear as a fully generic bandgap driver, which is not the
> case. This is really a TI thing, right ?
I have to agree with Felipe here. I do see your point to have a name
which is applicable to AMxx, but having such generic naming is not
helping either :-( as this bandgap driver is not supposed to be
generic.
I though of "ti_bandgap.*", but still seams to be misleading..
I guess same applies to usb_phy and scm.
Again, if you have a name that fits better I won't hesitate to use it :-)
>
> --
> balbi
--
Eduardo Valentin
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 02/11] ARM: OMAP: expose control.h to mach area
2012-05-28 9:25 ` Shilimkar, Santosh
@ 2012-05-28 10:30 ` Valentin, Eduardo
-1 siblings, 0 replies; 198+ messages in thread
From: Valentin, Eduardo @ 2012-05-28 10:30 UTC (permalink / raw)
To: Shilimkar, Santosh
Cc: amit.kucheria, balbi, kishon, kbaidarov, linux-pm, linux-omap,
linux-arm-kernel
Hello,
On Mon, May 28, 2012 at 12:25 PM, Shilimkar, Santosh
<santosh.shilimkar@ti.com> wrote:
> On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
> <eduardo.valentin@ti.com> wrote:
>> This patch exposes the definitions under control.h to
>> drivers outside the machine code.
>>
>> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
>> ---
> After second thought, this complete header movement needs to avoided.
> Drivers should not anyway include something like <mach/control.h>
>
> May be split the control.h header file data into ..
> - defines used by mach-omap2/* files which can remain in "control.h"
> in existing location.
OK..
> - common functions/defines used across drivers/*, mach-omap2/*,
> plat-omap/*, should
> go to include/linux/omap_control.h
Right..
> - Driver specific defines like thermal, usb etc, should go to
> respective drivers file.
Indeed.
>
> What do you think ?
I think we are in line. And I believe I saw a similar comment by
Benoit in other email thread.
Having a better thinking of this, it makes sense to have the
definition specific to drivers in the driver scope only, as they are
going to be used only there anyway.
I will drop this patch off and update the remaining changes
accordingly (drop the change in control.h for thermal specific and
move it to omap_bandgap.h).
>
> Regards
> santosh
--
Eduardo Valentin
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 02/11] ARM: OMAP: expose control.h to mach area
@ 2012-05-28 10:30 ` Valentin, Eduardo
0 siblings, 0 replies; 198+ messages in thread
From: Valentin, Eduardo @ 2012-05-28 10:30 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
On Mon, May 28, 2012 at 12:25 PM, Shilimkar, Santosh
<santosh.shilimkar@ti.com> wrote:
> On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
> <eduardo.valentin@ti.com> wrote:
>> This patch exposes the definitions under control.h to
>> drivers outside the machine code.
>>
>> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
>> ---
> After second thought, this complete header movement needs to avoided.
> Drivers should not anyway include something like <mach/control.h>
>
> May be split the control.h header file data into ..
> - defines used by mach-omap2/* files which can remain in "control.h"
> in existing location.
OK..
> - common functions/defines used across drivers/*, mach-omap2/*,
> plat-omap/*, should
> go to include/linux/omap_control.h
Right..
> - Driver specific defines like thermal, usb etc, should go to
> respective drivers file.
Indeed.
>
> What do you think ?
I think we are in line. And I believe I saw a similar comment by
Benoit in other email thread.
Having a better thinking of this, it makes sense to have the
definition specific to drivers in the driver scope only, as they are
going to be used only there anyway.
I will drop this patch off and update the remaining changes
accordingly (drop the change in control.h for thermal specific and
move it to omap_bandgap.h).
>
> Regards
> santosh
--
Eduardo Valentin
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
2012-05-25 16:39 ` Konstantin Baydarov
@ 2012-05-28 10:55 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 10:55 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: Keerthy, balbi, kishon, amit.kucheria, linux-pm, linux-omap,
linux-arm-kernel
Hello Konstantin,
On Fri, May 25, 2012 at 08:39:09PM +0400, Konstantin Baydarov wrote:
> Hi.
> On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
> > In the System Control Module, OMAP supplies a voltage reference
> > and a temperature sensor feature that are gathered in the band
> > gap voltage and temperature sensor (VBGAPTS) module. The band
> > gap provides current and voltage reference for its internal
> > circuits and other analog IP blocks. The analog-to-digital
> > converter (ADC) produces an output value that is proportional
> > to the silicon temperature.
> >
> > This patch provides a platform driver which expose this feature.
> > It is moduled as a MFD child of the System Control Module core
> > MFD driver.
> >
> > This driver provides only APIs to access the device properties,
> > like temperature, thresholds and update rate.
> >
> > Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> > Signed-off-by: Keerthy <j-keerthy@ti.com>
> > ---
> > .../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
> > drivers/thermal/Kconfig | 13 +
> > drivers/thermal/Makefile | 4 +-
> > drivers/thermal/omap-bandgap.c | 1601 ++++++++++++++++++++
> > drivers/thermal/omap-bandgap.h | 63 +
> > 5 files changed, 1707 insertions(+), 1 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> > create mode 100644 drivers/thermal/omap-bandgap.c
> > create mode 100644 drivers/thermal/omap-bandgap.h
> >
> >
> Add private spin lock in omap-bandgap driver to prevent blocking of
> control module general registers access.
Thanks for sending this out. I will rethink these drivers wrt to locking and will
your proposal.
> I wasn't able to test - I have panda 4430 board.
Right, we definetly need to have it probing on 4430, I will check how we can close on that.
>
> TODO:
> Prevent over-usage of spin_lock/spin_unlock for sequential calls of
> bg_writel().
OK...
>
> Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
>
> Index: omap-thermal/drivers/mfd/omap-control-core.c
> ===================================================================
> --- omap-thermal.orig/drivers/mfd/omap-control-core.c
> +++ omap-thermal/drivers/mfd/omap-control-core.c
> @@ -67,6 +67,19 @@ EXPORT_SYMBOL_GPL(omap_control_readl);
> int omap_control_writel(struct device *dev, u32 val, u32 reg)
> {
> struct omap_control *omap_control = dev_get_drvdata(dev);
> +
> + if (!omap_control)
> + return -EINVAL;
> +
> + writel(val, omap_control->base + reg);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(omap_control_writel);
> +
> +int omap_control_lock_writel(struct device *dev, u32 val, u32 reg)
> +{
> + struct omap_control *omap_control = dev_get_drvdata(dev);
> unsigned long flags;
>
> if (!omap_control)
> @@ -78,7 +91,7 @@ int omap_control_writel(struct device *d
>
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_control_writel);
> +EXPORT_SYMBOL_GPL(omap_control_lock_writel);
>
> /**
> * omap_control_get: returns the control module device pinter
> @@ -136,6 +149,9 @@ static int __devinit omap_control_probe(
> struct device_node *np = dev->of_node;
> struct omap_control *omap_control;
>
> + printk("\n\t\t **** omap_control_probe(): enter ");
> + dump_stack();
> +
> omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
> if (!omap_control) {
> dev_err(dev, "not enough memory for omap_control\n");
> Index: omap-thermal/drivers/thermal/omap-bandgap.c
> ===================================================================
> --- omap-thermal.orig/drivers/thermal/omap-bandgap.c
> +++ omap-thermal/drivers/thermal/omap-bandgap.c
> @@ -154,6 +154,7 @@ struct temp_sensor_registers {
> u32 status_cold_mask;
>
> u32 bgap_efuse;
> + spinlock_t bg_reg_lock;
Indeed. I agree we should have this per sensor. Need to revisit the existing mutex as well though.
> };
>
> /**
> @@ -579,6 +580,17 @@ omap5430_adc_to_temp[OMAP5430_ADC_END_VA
> 124600, 124900, 125000, 125000, 125000, 125000,
> };
>
> +static int bg_writel(struct device *dev, u32 val, u32 reg, spinlock_t *lock)
> +{
> + unsigned long flags;
> + int ret;
> +
> + spin_lock_irqsave(lock, flags);
> + ret = omap_control_writel(dev, val, reg);
> + spin_unlock_irqrestore(lock, flags);
In fact this doesn't help much in the bulk writes case. As you have already mentioned,
ideally we should lock, perform the operation, then unlock, instead of several
lock/write/unlock sequences.
> + return ret;
> +}
> +
> static irqreturn_t talert_irq_handler(int irq, void *data)
> {
> struct omap_bandgap *bg_ptr = data;
> @@ -615,7 +627,7 @@ static irqreturn_t talert_irq_handler(in
> ctrl |= tsr->mask_hot_mask;
> }
>
> - r |= omap_control_writel(cdev, ctrl, tsr->bgap_mask_ctrl);
> + r |= bg_writel(cdev, ctrl, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
>
> if (r) {
> dev_err(bg_ptr->dev, "failed to ack talert interrupt\n");
> @@ -705,7 +717,7 @@ static int temp_sensor_unmask_interrupts
> reg_val |= tsr->mask_cold_mask;
> else
> reg_val &= ~tsr->mask_cold_mask;
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
>
> if (err) {
> dev_err(bg_ptr->dev, "failed to unmask interrupts\n");
> @@ -751,14 +763,14 @@ int temp_sensor_configure_thot(struct om
> /* write the new t_cold value */
> reg_val = thresh_val & (~tsr->threshold_tcold_mask);
> reg_val |= cold << __ffs(tsr->threshold_tcold_mask);
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
> thresh_val = reg_val;
> }
>
> /* write the new t_hot value */
> reg_val = thresh_val & ~tsr->threshold_thot_mask;
> reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> return -EIO;
> @@ -782,7 +794,7 @@ int temp_sensor_init_talert_thresholds(s
> /* write the new t_cold value */
> reg_val = thresh_val & ~tsr->threshold_tcold_mask;
> reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
> return -EIO;
> @@ -793,7 +805,7 @@ int temp_sensor_init_talert_thresholds(s
> /* write the new t_hot value */
> reg_val = thresh_val & ~tsr->threshold_thot_mask;
> reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> return -EIO;
> @@ -802,7 +814,7 @@ int temp_sensor_init_talert_thresholds(s
> err = omap_control_readl(cdev, tsr->bgap_mask_ctrl, ®_val);
> reg_val |= tsr->mask_hot_mask;
> reg_val |= tsr->mask_cold_mask;
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> return -EIO;
> @@ -833,14 +845,14 @@ int temp_sensor_configure_tcold(struct o
> /* write the new t_hot value */
> reg_val = thresh_val & (~tsr->threshold_thot_mask);
> reg_val |= hot << __ffs(tsr->threshold_thot_mask);
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
> thresh_val = reg_val;
> }
>
> /* write the new t_cold value */
> reg_val = thresh_val & ~tsr->threshold_tcold_mask;
> reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
> return -EIO;
> @@ -861,7 +873,7 @@ static int temp_sensor_configure_tshut_h
> err = omap_control_readl(cdev, tsr->tshut_threshold, ®_val);
> reg_val &= ~tsr->tshut_hot_mask;
> reg_val |= tshut_hot << __ffs(tsr->tshut_hot_mask);
> - err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->tshut_threshold, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram tshut thot\n");
> return -EIO;
> @@ -882,7 +894,7 @@ static int temp_sensor_configure_tshut_c
> err = omap_control_readl(cdev, tsr->tshut_threshold, ®_val);
> reg_val &= ~tsr->tshut_cold_mask;
> reg_val |= tshut_cold << __ffs(tsr->tshut_cold_mask);
> - err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->tshut_threshold, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
> return -EIO;
> @@ -903,7 +915,7 @@ static int configure_temp_sensor_counter
> err = omap_control_readl(cdev, tsr->bgap_counter, &val);
> val &= ~tsr->counter_mask;
> val |= counter << __ffs(tsr->counter_mask);
> - err |= omap_control_writel(cdev, val, tsr->bgap_counter);
> + err |= bg_writel(cdev, val, tsr->bgap_counter, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
> return -EIO;
> @@ -1124,7 +1136,7 @@ static int enable_continuous_mode(struct
> tsr = bg_ptr->pdata->sensors[i].registers;
> r = omap_control_readl(cdev, tsr->bgap_mode_ctrl, &val);
> val |= 1 << __ffs(tsr->mode_ctrl_mask);
> - r |= omap_control_writel(cdev, val, tsr->bgap_mode_ctrl);
> + r |= bg_writel(cdev, val, tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
> if (r)
> dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> }
> @@ -1342,6 +1354,9 @@ int __devinit omap_bandgap_probe(struct
> u32 val;
>
> tsr = bg_ptr->pdata->sensors[i].registers;
> + /* Initialize register lock */
> + spin_lock_init(&tsr->bg_reg_lock);
> +
> /*
> * check if the efuse has a non-zero value if not
> * it is an untrimmed sample and the temperatures
> @@ -1482,12 +1497,12 @@ omap_bandgap_force_single_read(struct om
> /* Select single conversion mode */
> err = omap_control_readl(cdev, tsr->bgap_mode_ctrl, &temp);
> temp &= ~(1 << __ffs(tsr->mode_ctrl_mask));
> - omap_control_writel(cdev, temp, tsr->bgap_mode_ctrl);
> + bg_writel(cdev, temp, tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
>
> /* Start of Conversion = 1 */
> err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
> temp |= 1 << __ffs(tsr->bgap_soc_mask);
> - omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> + bg_writel(cdev, temp, tsr->temp_sensor_ctrl, &tsr->bg_reg_lock);
> /* Wait until DTEMP is updated */
> err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
> temp &= (tsr->bgap_dtemp_mask);
> @@ -1498,7 +1513,7 @@ omap_bandgap_force_single_read(struct om
> /* Start of Conversion = 0 */
> err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
> temp &= ~(1 << __ffs(tsr->bgap_soc_mask));
> - err |= omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> + err |= bg_writel(cdev, temp, tsr->temp_sensor_ctrl, &tsr->bg_reg_lock);
>
> return err ? -EIO : 0;
> }
> @@ -1519,20 +1534,20 @@ static int omap_bandgap_restore_ctxt(str
>
> err = omap_control_readl(cdev, tsr->bgap_counter, &val);
> if (val == 0) {
> - err |= omap_control_writel(cdev, rval->bg_threshold,
> - tsr->bgap_threshold);
> - err |= omap_control_writel(cdev, rval->tshut_threshold,
> - tsr->tshut_threshold);
> + err |= bg_writel(cdev, rval->bg_threshold,
> + tsr->bgap_threshold, &tsr->bg_reg_lock);
> + err |= bg_writel(cdev, rval->tshut_threshold,
> + tsr->tshut_threshold, &tsr->bg_reg_lock);
> /* Force immediate temperature measurement and update
> * of the DTEMP field
> */
> omap_bandgap_force_single_read(bg_ptr, i);
> - err |= omap_control_writel(cdev, rval->bg_counter,
> - tsr->bgap_counter);
> - err |= omap_control_writel(cdev, rval->bg_mode_ctrl,
> - tsr->bgap_mode_ctrl);
> - err |= omap_control_writel(cdev, rval->bg_ctrl,
> - tsr->bgap_mask_ctrl);
> + err |= bg_writel(cdev, rval->bg_counter,
> + tsr->bgap_counter, &tsr->bg_reg_lock);
> + err |= bg_writel(cdev, rval->bg_mode_ctrl,
> + tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
> + err |= bg_writel(cdev, rval->bg_ctrl,
> + tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
> } else {
> err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,
> &temp);
> @@ -1543,8 +1558,8 @@ static int omap_bandgap_restore_ctxt(str
> tsr->bgap_mask_ctrl,
> &temp);
> temp |= 1 << __ffs(tsr->mode_ctrl_mask);
> - err |= omap_control_writel(cdev, temp,
> - tsr->bgap_mask_ctrl);
> + err |= bg_writel(cdev, temp,
> + tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
> }
> }
> if (err)
> Index: omap-thermal/drivers/usb/otg/omap4-usb-phy.c
> ===================================================================
> --- omap-thermal.orig/drivers/usb/otg/omap4-usb-phy.c
> +++ omap-thermal/drivers/usb/otg/omap4-usb-phy.c
> @@ -46,13 +46,13 @@ int omap4_usb_phy_power(struct device *d
> if (on) {
> ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
> if (!ret && (val & PHY_PD)) {
> - ret = omap_control_writel(dev, ~PHY_PD,
> + ret = omap_control_lock_writel(dev, ~PHY_PD,
> CONTROL_DEV_CONF);
> /* XXX: add proper documentation for this delay */
> mdelay(200);
> }
> } else {
> - ret = omap_control_writel(dev, PHY_PD, CONTROL_DEV_CONF);
> + ret = omap_control_lock_writel(dev, PHY_PD, CONTROL_DEV_CONF);
> }
>
> return ret;
> @@ -74,7 +74,7 @@ EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
> */
> int omap4_usb_phy_mailbox(struct device *dev, u32 val)
> {
> - return omap_control_writel(dev, val, CONTROL_USBOTGHS_CONTROL);
> + return omap_control_lock_writel(dev, val, CONTROL_USBOTGHS_CONTROL);
> }
> EXPORT_SYMBOL_GPL(omap4_usb_phy_mailbox);
>
> Index: omap-thermal/include/linux/mfd/omap_control.h
> ===================================================================
> --- omap-thermal.orig/include/linux/mfd/omap_control.h
> +++ omap-thermal/include/linux/mfd/omap_control.h
> @@ -43,6 +43,7 @@ struct omap_control {
> #ifdef CONFIG_MFD_OMAP_CONTROL
> extern int omap_control_readl(struct device *dev, u32 reg, u32 *val);
> extern int omap_control_writel(struct device *dev, u32 val, u32 reg);
> +extern int omap_control_lock_writel(struct device *dev, u32 val, u32 reg);
> extern struct device *omap_control_get(void);
> extern void omap_control_put(struct device *dev);
> #else
> @@ -55,6 +56,11 @@ static inline int omap_control_writel(st
> {
> return 0;
> }
> +
> +static inline int omap_control_lock_writel(struct device *dev, u32 val, u32 reg)
> +{
> + return 0;
> +}
>
> static inline struct device *omap_control_get(void)
> {
>
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
@ 2012-05-28 10:55 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 10:55 UTC (permalink / raw)
To: linux-arm-kernel
Hello Konstantin,
On Fri, May 25, 2012 at 08:39:09PM +0400, Konstantin Baydarov wrote:
> Hi.
> On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
> > In the System Control Module, OMAP supplies a voltage reference
> > and a temperature sensor feature that are gathered in the band
> > gap voltage and temperature sensor (VBGAPTS) module. The band
> > gap provides current and voltage reference for its internal
> > circuits and other analog IP blocks. The analog-to-digital
> > converter (ADC) produces an output value that is proportional
> > to the silicon temperature.
> >
> > This patch provides a platform driver which expose this feature.
> > It is moduled as a MFD child of the System Control Module core
> > MFD driver.
> >
> > This driver provides only APIs to access the device properties,
> > like temperature, thresholds and update rate.
> >
> > Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> > Signed-off-by: Keerthy <j-keerthy@ti.com>
> > ---
> > .../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
> > drivers/thermal/Kconfig | 13 +
> > drivers/thermal/Makefile | 4 +-
> > drivers/thermal/omap-bandgap.c | 1601 ++++++++++++++++++++
> > drivers/thermal/omap-bandgap.h | 63 +
> > 5 files changed, 1707 insertions(+), 1 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> > create mode 100644 drivers/thermal/omap-bandgap.c
> > create mode 100644 drivers/thermal/omap-bandgap.h
> >
> >
> Add private spin lock in omap-bandgap driver to prevent blocking of
> control module general registers access.
Thanks for sending this out. I will rethink these drivers wrt to locking and will
your proposal.
> I wasn't able to test - I have panda 4430 board.
Right, we definetly need to have it probing on 4430, I will check how we can close on that.
>
> TODO:
> Prevent over-usage of spin_lock/spin_unlock for sequential calls of
> bg_writel().
OK...
>
> Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
>
> Index: omap-thermal/drivers/mfd/omap-control-core.c
> ===================================================================
> --- omap-thermal.orig/drivers/mfd/omap-control-core.c
> +++ omap-thermal/drivers/mfd/omap-control-core.c
> @@ -67,6 +67,19 @@ EXPORT_SYMBOL_GPL(omap_control_readl);
> int omap_control_writel(struct device *dev, u32 val, u32 reg)
> {
> struct omap_control *omap_control = dev_get_drvdata(dev);
> +
> + if (!omap_control)
> + return -EINVAL;
> +
> + writel(val, omap_control->base + reg);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(omap_control_writel);
> +
> +int omap_control_lock_writel(struct device *dev, u32 val, u32 reg)
> +{
> + struct omap_control *omap_control = dev_get_drvdata(dev);
> unsigned long flags;
>
> if (!omap_control)
> @@ -78,7 +91,7 @@ int omap_control_writel(struct device *d
>
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_control_writel);
> +EXPORT_SYMBOL_GPL(omap_control_lock_writel);
>
> /**
> * omap_control_get: returns the control module device pinter
> @@ -136,6 +149,9 @@ static int __devinit omap_control_probe(
> struct device_node *np = dev->of_node;
> struct omap_control *omap_control;
>
> + printk("\n\t\t **** omap_control_probe(): enter ");
> + dump_stack();
> +
> omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
> if (!omap_control) {
> dev_err(dev, "not enough memory for omap_control\n");
> Index: omap-thermal/drivers/thermal/omap-bandgap.c
> ===================================================================
> --- omap-thermal.orig/drivers/thermal/omap-bandgap.c
> +++ omap-thermal/drivers/thermal/omap-bandgap.c
> @@ -154,6 +154,7 @@ struct temp_sensor_registers {
> u32 status_cold_mask;
>
> u32 bgap_efuse;
> + spinlock_t bg_reg_lock;
Indeed. I agree we should have this per sensor. Need to revisit the existing mutex as well though.
> };
>
> /**
> @@ -579,6 +580,17 @@ omap5430_adc_to_temp[OMAP5430_ADC_END_VA
> 124600, 124900, 125000, 125000, 125000, 125000,
> };
>
> +static int bg_writel(struct device *dev, u32 val, u32 reg, spinlock_t *lock)
> +{
> + unsigned long flags;
> + int ret;
> +
> + spin_lock_irqsave(lock, flags);
> + ret = omap_control_writel(dev, val, reg);
> + spin_unlock_irqrestore(lock, flags);
In fact this doesn't help much in the bulk writes case. As you have already mentioned,
ideally we should lock, perform the operation, then unlock, instead of several
lock/write/unlock sequences.
> + return ret;
> +}
> +
> static irqreturn_t talert_irq_handler(int irq, void *data)
> {
> struct omap_bandgap *bg_ptr = data;
> @@ -615,7 +627,7 @@ static irqreturn_t talert_irq_handler(in
> ctrl |= tsr->mask_hot_mask;
> }
>
> - r |= omap_control_writel(cdev, ctrl, tsr->bgap_mask_ctrl);
> + r |= bg_writel(cdev, ctrl, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
>
> if (r) {
> dev_err(bg_ptr->dev, "failed to ack talert interrupt\n");
> @@ -705,7 +717,7 @@ static int temp_sensor_unmask_interrupts
> reg_val |= tsr->mask_cold_mask;
> else
> reg_val &= ~tsr->mask_cold_mask;
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
>
> if (err) {
> dev_err(bg_ptr->dev, "failed to unmask interrupts\n");
> @@ -751,14 +763,14 @@ int temp_sensor_configure_thot(struct om
> /* write the new t_cold value */
> reg_val = thresh_val & (~tsr->threshold_tcold_mask);
> reg_val |= cold << __ffs(tsr->threshold_tcold_mask);
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
> thresh_val = reg_val;
> }
>
> /* write the new t_hot value */
> reg_val = thresh_val & ~tsr->threshold_thot_mask;
> reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> return -EIO;
> @@ -782,7 +794,7 @@ int temp_sensor_init_talert_thresholds(s
> /* write the new t_cold value */
> reg_val = thresh_val & ~tsr->threshold_tcold_mask;
> reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
> return -EIO;
> @@ -793,7 +805,7 @@ int temp_sensor_init_talert_thresholds(s
> /* write the new t_hot value */
> reg_val = thresh_val & ~tsr->threshold_thot_mask;
> reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> return -EIO;
> @@ -802,7 +814,7 @@ int temp_sensor_init_talert_thresholds(s
> err = omap_control_readl(cdev, tsr->bgap_mask_ctrl, ®_val);
> reg_val |= tsr->mask_hot_mask;
> reg_val |= tsr->mask_cold_mask;
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> return -EIO;
> @@ -833,14 +845,14 @@ int temp_sensor_configure_tcold(struct o
> /* write the new t_hot value */
> reg_val = thresh_val & (~tsr->threshold_thot_mask);
> reg_val |= hot << __ffs(tsr->threshold_thot_mask);
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
> thresh_val = reg_val;
> }
>
> /* write the new t_cold value */
> reg_val = thresh_val & ~tsr->threshold_tcold_mask;
> reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
> - err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
> return -EIO;
> @@ -861,7 +873,7 @@ static int temp_sensor_configure_tshut_h
> err = omap_control_readl(cdev, tsr->tshut_threshold, ®_val);
> reg_val &= ~tsr->tshut_hot_mask;
> reg_val |= tshut_hot << __ffs(tsr->tshut_hot_mask);
> - err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->tshut_threshold, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram tshut thot\n");
> return -EIO;
> @@ -882,7 +894,7 @@ static int temp_sensor_configure_tshut_c
> err = omap_control_readl(cdev, tsr->tshut_threshold, ®_val);
> reg_val &= ~tsr->tshut_cold_mask;
> reg_val |= tshut_cold << __ffs(tsr->tshut_cold_mask);
> - err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
> + err |= bg_writel(cdev, reg_val, tsr->tshut_threshold, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
> return -EIO;
> @@ -903,7 +915,7 @@ static int configure_temp_sensor_counter
> err = omap_control_readl(cdev, tsr->bgap_counter, &val);
> val &= ~tsr->counter_mask;
> val |= counter << __ffs(tsr->counter_mask);
> - err |= omap_control_writel(cdev, val, tsr->bgap_counter);
> + err |= bg_writel(cdev, val, tsr->bgap_counter, &tsr->bg_reg_lock);
> if (err) {
> dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
> return -EIO;
> @@ -1124,7 +1136,7 @@ static int enable_continuous_mode(struct
> tsr = bg_ptr->pdata->sensors[i].registers;
> r = omap_control_readl(cdev, tsr->bgap_mode_ctrl, &val);
> val |= 1 << __ffs(tsr->mode_ctrl_mask);
> - r |= omap_control_writel(cdev, val, tsr->bgap_mode_ctrl);
> + r |= bg_writel(cdev, val, tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
> if (r)
> dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> }
> @@ -1342,6 +1354,9 @@ int __devinit omap_bandgap_probe(struct
> u32 val;
>
> tsr = bg_ptr->pdata->sensors[i].registers;
> + /* Initialize register lock */
> + spin_lock_init(&tsr->bg_reg_lock);
> +
> /*
> * check if the efuse has a non-zero value if not
> * it is an untrimmed sample and the temperatures
> @@ -1482,12 +1497,12 @@ omap_bandgap_force_single_read(struct om
> /* Select single conversion mode */
> err = omap_control_readl(cdev, tsr->bgap_mode_ctrl, &temp);
> temp &= ~(1 << __ffs(tsr->mode_ctrl_mask));
> - omap_control_writel(cdev, temp, tsr->bgap_mode_ctrl);
> + bg_writel(cdev, temp, tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
>
> /* Start of Conversion = 1 */
> err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
> temp |= 1 << __ffs(tsr->bgap_soc_mask);
> - omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> + bg_writel(cdev, temp, tsr->temp_sensor_ctrl, &tsr->bg_reg_lock);
> /* Wait until DTEMP is updated */
> err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
> temp &= (tsr->bgap_dtemp_mask);
> @@ -1498,7 +1513,7 @@ omap_bandgap_force_single_read(struct om
> /* Start of Conversion = 0 */
> err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl, &temp);
> temp &= ~(1 << __ffs(tsr->bgap_soc_mask));
> - err |= omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> + err |= bg_writel(cdev, temp, tsr->temp_sensor_ctrl, &tsr->bg_reg_lock);
>
> return err ? -EIO : 0;
> }
> @@ -1519,20 +1534,20 @@ static int omap_bandgap_restore_ctxt(str
>
> err = omap_control_readl(cdev, tsr->bgap_counter, &val);
> if (val == 0) {
> - err |= omap_control_writel(cdev, rval->bg_threshold,
> - tsr->bgap_threshold);
> - err |= omap_control_writel(cdev, rval->tshut_threshold,
> - tsr->tshut_threshold);
> + err |= bg_writel(cdev, rval->bg_threshold,
> + tsr->bgap_threshold, &tsr->bg_reg_lock);
> + err |= bg_writel(cdev, rval->tshut_threshold,
> + tsr->tshut_threshold, &tsr->bg_reg_lock);
> /* Force immediate temperature measurement and update
> * of the DTEMP field
> */
> omap_bandgap_force_single_read(bg_ptr, i);
> - err |= omap_control_writel(cdev, rval->bg_counter,
> - tsr->bgap_counter);
> - err |= omap_control_writel(cdev, rval->bg_mode_ctrl,
> - tsr->bgap_mode_ctrl);
> - err |= omap_control_writel(cdev, rval->bg_ctrl,
> - tsr->bgap_mask_ctrl);
> + err |= bg_writel(cdev, rval->bg_counter,
> + tsr->bgap_counter, &tsr->bg_reg_lock);
> + err |= bg_writel(cdev, rval->bg_mode_ctrl,
> + tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
> + err |= bg_writel(cdev, rval->bg_ctrl,
> + tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
> } else {
> err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,
> &temp);
> @@ -1543,8 +1558,8 @@ static int omap_bandgap_restore_ctxt(str
> tsr->bgap_mask_ctrl,
> &temp);
> temp |= 1 << __ffs(tsr->mode_ctrl_mask);
> - err |= omap_control_writel(cdev, temp,
> - tsr->bgap_mask_ctrl);
> + err |= bg_writel(cdev, temp,
> + tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
> }
> }
> if (err)
> Index: omap-thermal/drivers/usb/otg/omap4-usb-phy.c
> ===================================================================
> --- omap-thermal.orig/drivers/usb/otg/omap4-usb-phy.c
> +++ omap-thermal/drivers/usb/otg/omap4-usb-phy.c
> @@ -46,13 +46,13 @@ int omap4_usb_phy_power(struct device *d
> if (on) {
> ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
> if (!ret && (val & PHY_PD)) {
> - ret = omap_control_writel(dev, ~PHY_PD,
> + ret = omap_control_lock_writel(dev, ~PHY_PD,
> CONTROL_DEV_CONF);
> /* XXX: add proper documentation for this delay */
> mdelay(200);
> }
> } else {
> - ret = omap_control_writel(dev, PHY_PD, CONTROL_DEV_CONF);
> + ret = omap_control_lock_writel(dev, PHY_PD, CONTROL_DEV_CONF);
> }
>
> return ret;
> @@ -74,7 +74,7 @@ EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
> */
> int omap4_usb_phy_mailbox(struct device *dev, u32 val)
> {
> - return omap_control_writel(dev, val, CONTROL_USBOTGHS_CONTROL);
> + return omap_control_lock_writel(dev, val, CONTROL_USBOTGHS_CONTROL);
> }
> EXPORT_SYMBOL_GPL(omap4_usb_phy_mailbox);
>
> Index: omap-thermal/include/linux/mfd/omap_control.h
> ===================================================================
> --- omap-thermal.orig/include/linux/mfd/omap_control.h
> +++ omap-thermal/include/linux/mfd/omap_control.h
> @@ -43,6 +43,7 @@ struct omap_control {
> #ifdef CONFIG_MFD_OMAP_CONTROL
> extern int omap_control_readl(struct device *dev, u32 reg, u32 *val);
> extern int omap_control_writel(struct device *dev, u32 val, u32 reg);
> +extern int omap_control_lock_writel(struct device *dev, u32 val, u32 reg);
> extern struct device *omap_control_get(void);
> extern void omap_control_put(struct device *dev);
> #else
> @@ -55,6 +56,11 @@ static inline int omap_control_writel(st
> {
> return 0;
> }
> +
> +static inline int omap_control_lock_writel(struct device *dev, u32 val, u32 reg)
> +{
> + return 0;
> +}
>
> static inline struct device *omap_control_get(void)
> {
>
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
2012-05-25 15:49 ` Cousson, Benoit
@ 2012-05-28 11:06 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 11:06 UTC (permalink / raw)
To: Cousson, Benoit
Cc: amit.kucheria, kbaidarov, kishon, balbi, Keerthy, linux-pm,
linux-omap, linux-arm-kernel
On Fri, May 25, 2012 at 05:49:44PM +0200, Cousson Benoit wrote:
> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> >In the System Control Module, OMAP supplies a voltage reference
> >and a temperature sensor feature that are gathered in the band
> >gap voltage and temperature sensor (VBGAPTS) module. The band
> >gap provides current and voltage reference for its internal
> >circuits and other analog IP blocks. The analog-to-digital
> >converter (ADC) produces an output value that is proportional
> >to the silicon temperature.
> >
> >This patch provides a platform driver which expose this feature.
> >It is moduled as a MFD child of the System Control Module core
> >MFD driver.
> >
> >This driver provides only APIs to access the device properties,
> >like temperature, thresholds and update rate.
> >
> >Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> >Signed-off-by: Keerthy<j-keerthy@ti.com>
> >---
> > .../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
> > drivers/thermal/Kconfig | 13 +
> > drivers/thermal/Makefile | 4 +-
> > drivers/thermal/omap-bandgap.c | 1601 ++++++++++++++++++++
> > drivers/thermal/omap-bandgap.h | 63 +
> > 5 files changed, 1707 insertions(+), 1 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> > create mode 100644 drivers/thermal/omap-bandgap.c
> > create mode 100644 drivers/thermal/omap-bandgap.h
> >
> >diff --git a/Documentation/devicetree/bindings/thermal/omap_bandgap.txt b/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> >new file mode 100644
> >index 0000000..430bcf8
> >--- /dev/null
> >+++ b/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> >@@ -0,0 +1,27 @@
> >+* Texas Instrument OMAP SCM bandgap bindings
> >+
> >+In the System Control Module, OMAP supplies a voltage reference
> >+and a temperature sensor feature that are gathered in the band
> >+gap voltage and temperature sensor (VBGAPTS) module. The band
> >+gap provides current and voltage reference for its internal
> >+circuits and other analog IP blocks. The analog-to-digital
> >+converter (ADC) produces an output value that is proportional
> >+to the silicon temperature.
> >+
> >+Required properties:
> >+- compatible : Should be:
> >+ - "ti,omap4460-control-bandgap" : for OMAP4460 bandgap
> >+ - "ti,omap5430-control-bandgap" : for OMAP5430 bandgap
> >+- interrupts : this entry should indicate which interrupt line
> >+the talert signal is routed to;
> >+Specific:
> >+- ti,tshut-gpio : this entry should be used to inform which GPIO
> >+line the tshut signal is routed to;
> >+
> >+Example:
> >+
> >+bandgap {
> >+ compatible = "ti,omap4460-control-bandgap";
> >+ interrupts =<0 126 4>; /* talert */
> >+ ti,tshut-gpio =<86>;
> >+};
> >diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> >index 514a691..ffdd240 100644
> >--- a/drivers/thermal/Kconfig
> >+++ b/drivers/thermal/Kconfig
> >@@ -26,3 +26,16 @@ config SPEAR_THERMAL
> > help
> > Enable this to plug the SPEAr thermal sensor driver into the Linux
> > thermal framework
> >+
> >+config OMAP_BANDGAP
> >+ tristate "Texas Instruments OMAP4+ temperature sensor driver"
> >+ depends on THERMAL
> >+ depends on MFD_OMAP_CONTROL
> >+ help
> >+ If you say yes here you get support for the Texas Instruments
> >+ OMAP4460+ on die bandgap temperature sensor support. The register
> >+ set is part of system control module.
> >+
> >+ This includes alert interrupts generation and also the TSHUT
> >+ support.
> >+
> >diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> >index a9fff0b..5ff1af1 100644
> >--- a/drivers/thermal/Makefile
> >+++ b/drivers/thermal/Makefile
> >@@ -3,4 +3,6 @@
> > #
> >
> > obj-$(CONFIG_THERMAL) += thermal_sys.o
> >-obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
> >\ No newline at end of file
> >+obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
> >+obj-$(CONFIG_OMAP_BANDGAP) += omap-thermal.o
> >+omap-thermal-y := omap-bandgap.o
> >diff --git a/drivers/thermal/omap-bandgap.c b/drivers/thermal/omap-bandgap.c
> >new file mode 100644
> >index 0000000..3d5a12b
> >--- /dev/null
> >+++ b/drivers/thermal/omap-bandgap.c
> >@@ -0,0 +1,1601 @@
> >+/*
> >+ * OMAP4 Bandgap temperature sensor driver
> >+ *
> >+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> >+ * Author: J Keerthy<j-keerthy@ti.com>
> >+ * Author: Moiz Sonasath<m-sonasath@ti.com>
> >+ * Couple of fixes, DT and MFD adaptation:
> >+ * Eduardo Valentin<eduardo.valentin@ti.com>
> >+ *
> >+ * This program is free software; you can redistribute it and/or
> >+ * modify it under the terms of the GNU General Public License
> >+ * version 2 as published by the Free Software Foundation.
> >+ *
> >+ * This program is distributed in the hope that it will be useful, but
> >+ * WITHOUT ANY WARRANTY; without even the implied warranty of
> >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> >+ * General Public License for more details.
> >+ *
> >+ * You should have received a copy of the GNU General Public License
> >+ * along with this program; if not, write to the Free Software
> >+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
> >+ * 02110-1301 USA
> >+ *
> >+ */
> >+
> >+#include<linux/module.h>
> >+#include<linux/export.h>
> >+#include<linux/init.h>
> >+#include<linux/kernel.h>
> >+#include<linux/interrupt.h>
> >+#include<linux/clk.h>
> >+#include<linux/gpio.h>
> >+#include<linux/platform_device.h>
> >+#include<linux/err.h>
> >+#include<linux/types.h>
> >+#include<linux/mutex.h>
> >+#include<linux/reboot.h>
> >+#include<linux/of_platform.h>
> >+#include<linux/of_irq.h>
> >+#include<linux/mfd/omap_control.h>
> >+
> >+#include<mach/control.h>
> >+
> >+#include "omap-bandgap.h"
> >+
> >+/* Offsets from the base of temperature sensor registers */
> >+
> >+#define OMAP4460_TEMP_SENSOR_CTRL_OFFSET 0x32C
> >+#define OMAP4460_BGAP_CTRL_OFFSET 0x378
> >+#define OMAP4460_BGAP_COUNTER_OFFSET 0x37C
> >+#define OMAP4460_BGAP_THRESHOLD_OFFSET 0x380
> >+#define OMAP4460_BGAP_TSHUT_OFFSET 0x384
> >+#define OMAP4460_BGAP_STATUS_OFFSET 0x388
> >+#define OMAP4460_FUSE_OPP_BGAP 0x260
> >+
> >+#define OMAP5430_TEMP_SENSOR_MPU_OFFSET 0x32C
> >+#define OMAP5430_BGAP_CTRL_OFFSET 0x380
> >+#define OMAP5430_BGAP_COUNTER_MPU_OFFSET 0x39C
> >+#define OMAP5430_BGAP_THRESHOLD_MPU_OFFSET 0x384
> >+#define OMAP5430_BGAP_TSHUT_MPU_OFFSET 0x390
> >+#define OMAP5430_BGAP_STATUS_OFFSET 0x3A8
> >+#define OMAP5430_FUSE_OPP_BGAP_MPU 0x1E4
> >+
> >+#define OMAP5430_TEMP_SENSOR_GPU_OFFSET 0x330
> >+#define OMAP5430_BGAP_COUNTER_GPU_OFFSET 0x3A0
> >+#define OMAP5430_BGAP_THRESHOLD_GPU_OFFSET 0x388
> >+#define OMAP5430_BGAP_TSHUT_GPU_OFFSET 0x394
> >+#define OMAP5430_FUSE_OPP_BGAP_GPU 0x1E0
> >+
> >+#define OMAP5430_TEMP_SENSOR_CORE_OFFSET 0x334
> >+#define OMAP5430_BGAP_COUNTER_CORE_OFFSET 0x3A4
> >+#define OMAP5430_BGAP_THRESHOLD_CORE_OFFSET 0x38C
> >+#define OMAP5430_BGAP_TSHUT_CORE_OFFSET 0x398
> >+#define OMAP5430_FUSE_OPP_BGAP_CORE 0x1E8
> >+
> >+#define OMAP4460_TSHUT_HOT 900 /* 122 deg C */
> >+#define OMAP4460_TSHUT_COLD 895 /* 100 deg C */
> >+#define OMAP4460_T_HOT 800 /* 73 deg C */
> >+#define OMAP4460_T_COLD 795 /* 71 deg C */
> >+#define OMAP4460_MAX_FREQ 1500000
> >+#define OMAP4460_MIN_FREQ 1000000
> >+#define OMAP4460_MIN_TEMP -40000
> >+#define OMAP4460_MAX_TEMP 123000
> >+#define OMAP4460_HYST_VAL 5000
> >+#define OMAP4460_ADC_START_VALUE 530
> >+#define OMAP4460_ADC_END_VALUE 932
> >+
> >+#define OMAP5430_MPU_TSHUT_HOT 915
> >+#define OMAP5430_MPU_TSHUT_COLD 900
> >+#define OMAP5430_MPU_T_HOT 800
> >+#define OMAP5430_MPU_T_COLD 795
> >+#define OMAP5430_MPU_MAX_FREQ 1500000
> >+#define OMAP5430_MPU_MIN_FREQ 1000000
> >+#define OMAP5430_MPU_MIN_TEMP -40000
> >+#define OMAP5430_MPU_MAX_TEMP 125000
> >+#define OMAP5430_MPU_HYST_VAL 5000
> >+#define OMAP5430_ADC_START_VALUE 532
> >+#define OMAP5430_ADC_END_VALUE 934
> >+
> >+#define OMAP5430_GPU_TSHUT_HOT 915
> >+#define OMAP5430_GPU_TSHUT_COLD 900
> >+#define OMAP5430_GPU_T_HOT 800
> >+#define OMAP5430_GPU_T_COLD 795
> >+#define OMAP5430_GPU_MAX_FREQ 1500000
> >+#define OMAP5430_GPU_MIN_FREQ 1000000
> >+#define OMAP5430_GPU_MIN_TEMP -40000
> >+#define OMAP5430_GPU_MAX_TEMP 125000
> >+#define OMAP5430_GPU_HYST_VAL 5000
> >+
> >+#define OMAP5430_CORE_TSHUT_HOT 915
> >+#define OMAP5430_CORE_TSHUT_COLD 900
> >+#define OMAP5430_CORE_T_HOT 800
> >+#define OMAP5430_CORE_T_COLD 795
> >+#define OMAP5430_CORE_MAX_FREQ 1500000
> >+#define OMAP5430_CORE_MIN_FREQ 1000000
> >+#define OMAP5430_CORE_MIN_TEMP -40000
> >+#define OMAP5430_CORE_MAX_TEMP 125000
> >+#define OMAP5430_CORE_HYST_VAL 5000
> >+
> >+/**
> >+ * The register offsets and bit fields might change across
> >+ * OMAP versions hence populating them in this structure.
> >+ */
> >+
> >+struct temp_sensor_registers {
> >+ u32 temp_sensor_ctrl;
> >+ u32 bgap_tempsoff_mask;
> >+ u32 bgap_soc_mask;
> >+ u32 bgap_eocz_mask;
> >+ u32 bgap_dtemp_mask;
> >+
> >+ u32 bgap_mask_ctrl;
> >+ u32 mask_hot_mask;
> >+ u32 mask_cold_mask;
> >+
> >+ u32 bgap_mode_ctrl;
> >+ u32 mode_ctrl_mask;
> >+
> >+ u32 bgap_counter;
> >+ u32 counter_mask;
> >+
> >+ u32 bgap_threshold;
> >+ u32 threshold_thot_mask;
> >+ u32 threshold_tcold_mask;
> >+
> >+ u32 tshut_threshold;
> >+ u32 tshut_hot_mask;
> >+ u32 tshut_cold_mask;
> >+
> >+ u32 bgap_status;
> >+ u32 status_clean_stop_mask;
> >+ u32 status_bgap_alert_mask;
> >+ u32 status_hot_mask;
> >+ u32 status_cold_mask;
> >+
> >+ u32 bgap_efuse;
> >+};
> >+
> >+/**
> >+ * The thresholds and limits for temperature sensors.
> >+ */
> >+struct temp_sensor_data {
> >+ u32 tshut_hot;
> >+ u32 tshut_cold;
> >+ u32 t_hot;
> >+ u32 t_cold;
> >+ u32 min_freq;
> >+ u32 max_freq;
> >+ int max_temp;
> >+ int min_temp;
> >+ int hyst_val;
> >+ u32 adc_start_val;
> >+ u32 adc_end_val;
> >+ u32 update_int1;
> >+ u32 update_int2;
> >+};
> >+
> >+/**
> >+ * struct temp_sensor_regval - temperature sensor register values
> >+ * @bg_mode_ctrl: temp sensor control register value
> >+ * @bg_ctrl: bandgap ctrl register value
> >+ * @bg_counter: bandgap counter value
> >+ * @bg_threshold: bandgap threshold register value
> >+ * @tshut_threshold: bandgap tshut register value
> >+ */
> >+struct temp_sensor_regval {
> >+ u32 bg_mode_ctrl;
> >+ u32 bg_ctrl;
> >+ u32 bg_counter;
> >+ u32 bg_threshold;
> >+ u32 tshut_threshold;
> >+};
> >+
> >+/**
> >+ * struct omap_temp_sensor - bandgap temperature sensor platform data
> >+ * @ts_data: pointer to struct with thresholds, limits of temperature sensor
> >+ * @registers: pointer to the list of register offsets and bitfields
> >+ * @regval: temperature sensor register values
> >+ * @domain: the name of the domain where the sensor is located
> >+ */
> >+struct omap_temp_sensor {
> >+ struct temp_sensor_data *ts_data;
> >+ struct temp_sensor_registers *registers;
> >+ struct temp_sensor_regval *regval;
> >+ char *domain;
> >+};
> >+
> >+/**
> >+ * struct omap_bandgap_data - bandgap platform data structure
> >+ * @has_talert: indicates if the chip has talert output line
> >+ * @has_tshut: indicates if the chip has tshut output line
> >+ * @conv_table: Pointer to adc to temperature conversion table
> >+ * @fclock_name: clock name of the functional clock
> >+ * @div_ck_nme: clock name of the clock divisor
> >+ * @sensor_count: count of temperature sensor device in scm
> >+ * @sensors: array of sensors present in this bandgap instance
> >+ * @expose_sensor: callback to export sensor to thermal API
> >+ */
> >+struct omap_bandgap_data {
> >+ bool has_talert;
> >+ bool has_tshut;
> >+ const int *conv_table;
> >+ char *fclock_name;
> >+ char *div_ck_name;
> >+ int sensor_count;
> >+ int (*report_temperature)(struct omap_bandgap *bg_ptr, int id);
> >+ int (*expose_sensor)(struct omap_bandgap *bg_ptr, int id, char *domain);
> >+
> >+ /* this needs to be at the end */
> >+ struct omap_temp_sensor sensors[];
> >+};
> >+
> >+/* TODO: provide data structures for 4430 */
> >+
> >+/*
> >+ * OMAP4460 has one instance of thermal sensor for MPU
> >+ * need to describe the individual bit fields
> >+ */
> >+static struct temp_sensor_registers
> >+omap4460_mpu_temp_sensor_registers = {
> >+ .temp_sensor_ctrl = OMAP4460_TEMP_SENSOR_CTRL_OFFSET,
> >+ .bgap_tempsoff_mask = OMAP4460_BGAP_TEMPSOFF_MASK,
> >+ .bgap_soc_mask = OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK,
> >+ .bgap_eocz_mask = OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK,
> >+ .bgap_dtemp_mask = OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK,
> >+
> >+ .bgap_mask_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
> >+ .mask_hot_mask = OMAP4460_MASK_HOT_MASK,
> >+ .mask_cold_mask = OMAP4460_MASK_COLD_MASK,
> >+
> >+ .bgap_mode_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
> >+ .mode_ctrl_mask = OMAP4460_SINGLE_MODE_MASK,
> >+
> >+ .bgap_counter = OMAP4460_BGAP_COUNTER_OFFSET,
> >+ .counter_mask = OMAP4460_COUNTER_MASK,
> >+
> >+ .bgap_threshold = OMAP4460_BGAP_THRESHOLD_OFFSET,
> >+ .threshold_thot_mask = OMAP4460_T_HOT_MASK,
> >+ .threshold_tcold_mask = OMAP4460_T_COLD_MASK,
> >+
> >+ .tshut_threshold = OMAP4460_BGAP_TSHUT_OFFSET,
> >+ .tshut_hot_mask = OMAP4460_TSHUT_HOT_MASK,
> >+ .tshut_cold_mask = OMAP4460_TSHUT_COLD_MASK,
> >+
> >+ .bgap_status = OMAP4460_BGAP_STATUS_OFFSET,
> >+ .status_clean_stop_mask = OMAP4460_CLEAN_STOP_MASK,
> >+ .status_bgap_alert_mask = OMAP4460_BGAP_ALERT_MASK,
> >+ .status_hot_mask = OMAP4460_HOT_FLAG_MASK,
> >+ .status_cold_mask = OMAP4460_COLD_FLAG_MASK,
> >+
> >+ .bgap_efuse = OMAP4460_FUSE_OPP_BGAP,
> >+};
> >+
> >+/*
> >+ * OMAP4460 has one instance of thermal sensor for MPU
>
> Bad copy paste.
>
> >+ * need to describe the individual bit fields
> >+ */
> >+static struct temp_sensor_registers
> >+omap5430_mpu_temp_sensor_registers = {
> >+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_MPU_OFFSET,
> >+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
> >+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
> >+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
> >+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
> >+
> >+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
> >+ .mask_hot_mask = OMAP5430_MASK_HOT_MPU_MASK,
> >+ .mask_cold_mask = OMAP5430_MASK_COLD_MPU_MASK,
> >+
> >+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
> >+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
> >+
> >+ .bgap_counter = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
> >+ .counter_mask = OMAP5430_COUNTER_MASK,
> >+
> >+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_MPU_OFFSET,
> >+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
> >+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
> >+
> >+ .tshut_threshold = OMAP5430_BGAP_TSHUT_MPU_OFFSET,
> >+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
> >+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
> >+
> >+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
> >+ .status_clean_stop_mask = 0x0,
> >+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
> >+ .status_hot_mask = OMAP5430_HOT_MPU_FLAG_MASK,
> >+ .status_cold_mask = OMAP5430_COLD_MPU_FLAG_MASK,
> >+
> >+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_MPU,
> >+};
> >+
> >+/*
> >+ * OMAP4460 has one instance of thermal sensor for MPU
> >+ * need to describe the individual bit fields
> >+ */
>
> Ditto
>
> >+static struct temp_sensor_registers
> >+omap5430_gpu_temp_sensor_registers = {
> >+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_GPU_OFFSET,
> >+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
> >+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
> >+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
> >+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
> >+
> >+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
> >+ .mask_hot_mask = OMAP5430_MASK_HOT_MM_MASK,
> >+ .mask_cold_mask = OMAP5430_MASK_COLD_MM_MASK,
> >+
> >+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
> >+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
> >+
> >+ .bgap_counter = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
> >+ .counter_mask = OMAP5430_COUNTER_MASK,
> >+
> >+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_GPU_OFFSET,
> >+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
> >+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
> >+
> >+ .tshut_threshold = OMAP5430_BGAP_TSHUT_GPU_OFFSET,
> >+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
> >+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
> >+
> >+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
> >+ .status_clean_stop_mask = 0x0,
> >+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
> >+ .status_hot_mask = OMAP5430_HOT_MM_FLAG_MASK,
> >+ .status_cold_mask = OMAP5430_COLD_MM_FLAG_MASK,
> >+
> >+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_GPU,
> >+};
> >+
> >+/*
> >+ * OMAP4460 has one instance of thermal sensor for MPU
> >+ * need to describe the individual bit fields
> >+ */
>
> Ditto
>
> >+static struct temp_sensor_registers
> >+omap5430_core_temp_sensor_registers = {
> >+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_CORE_OFFSET,
> >+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
> >+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
> >+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
> >+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
> >+
> >+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
> >+ .mask_hot_mask = OMAP5430_MASK_HOT_CORE_MASK,
> >+ .mask_cold_mask = OMAP5430_MASK_COLD_CORE_MASK,
> >+
> >+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
> >+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
> >+
> >+ .bgap_counter = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
> >+ .counter_mask = OMAP5430_COUNTER_MASK,
> >+
> >+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_CORE_OFFSET,
> >+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
> >+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
> >+
> >+ .tshut_threshold = OMAP5430_BGAP_TSHUT_CORE_OFFSET,
> >+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
> >+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
> >+
> >+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
> >+ .status_clean_stop_mask = 0x0,
> >+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
> >+ .status_hot_mask = OMAP5430_HOT_CORE_FLAG_MASK,
> >+ .status_cold_mask = OMAP5430_COLD_CORE_FLAG_MASK,
> >+
> >+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_CORE,
> >+};
> >+
> >+/* Thresholds and limits for OMAP4460 MPU temperature sensor */
> >+static struct temp_sensor_data omap4460_mpu_temp_sensor_data = {
> >+ .tshut_hot = OMAP4460_TSHUT_HOT,
> >+ .tshut_cold = OMAP4460_TSHUT_COLD,
> >+ .t_hot = OMAP4460_T_HOT,
> >+ .t_cold = OMAP4460_T_COLD,
> >+ .min_freq = OMAP4460_MIN_FREQ,
> >+ .max_freq = OMAP4460_MAX_FREQ,
> >+ .max_temp = OMAP4460_MAX_TEMP,
> >+ .min_temp = OMAP4460_MIN_TEMP,
> >+ .hyst_val = OMAP4460_HYST_VAL,
> >+ .adc_start_val = OMAP4460_ADC_START_VALUE,
> >+ .adc_end_val = OMAP4460_ADC_END_VALUE,
> >+ .update_int1 = 1000,
> >+ .update_int2 = 2000,
> >+};
> >+
> >+/* Thresholds and limits for OMAP5430 MPU temperature sensor */
> >+static struct temp_sensor_data omap5430_mpu_temp_sensor_data = {
> >+ .tshut_hot = OMAP5430_MPU_TSHUT_HOT,
> >+ .tshut_cold = OMAP5430_MPU_TSHUT_COLD,
> >+ .t_hot = OMAP5430_MPU_T_HOT,
> >+ .t_cold = OMAP5430_MPU_T_COLD,
> >+ .min_freq = OMAP5430_MPU_MIN_FREQ,
> >+ .max_freq = OMAP5430_MPU_MAX_FREQ,
> >+ .max_temp = OMAP5430_MPU_MAX_TEMP,
> >+ .min_temp = OMAP5430_MPU_MIN_TEMP,
> >+ .hyst_val = OMAP5430_MPU_HYST_VAL,
> >+ .adc_start_val = OMAP5430_ADC_START_VALUE,
> >+ .adc_end_val = OMAP5430_ADC_END_VALUE,
> >+ .update_int1 = 1000,
> >+ .update_int2 = 2000,
> >+};
> >+
> >+/* Thresholds and limits for OMAP5430 GPU temperature sensor */
> >+static struct temp_sensor_data omap5430_gpu_temp_sensor_data = {
> >+ .tshut_hot = OMAP5430_GPU_TSHUT_HOT,
> >+ .tshut_cold = OMAP5430_GPU_TSHUT_COLD,
> >+ .t_hot = OMAP5430_GPU_T_HOT,
> >+ .t_cold = OMAP5430_GPU_T_COLD,
> >+ .min_freq = OMAP5430_GPU_MIN_FREQ,
> >+ .max_freq = OMAP5430_GPU_MAX_FREQ,
> >+ .max_temp = OMAP5430_GPU_MAX_TEMP,
> >+ .min_temp = OMAP5430_GPU_MIN_TEMP,
> >+ .hyst_val = OMAP5430_GPU_HYST_VAL,
> >+ .adc_start_val = OMAP5430_ADC_START_VALUE,
> >+ .adc_end_val = OMAP5430_ADC_END_VALUE,
> >+ .update_int1 = 1000,
> >+ .update_int2 = 2000,
> >+};
> >+
> >+/* Thresholds and limits for OMAP5430 CORE temperature sensor */
> >+static struct temp_sensor_data omap5430_core_temp_sensor_data = {
> >+ .tshut_hot = OMAP5430_CORE_TSHUT_HOT,
> >+ .tshut_cold = OMAP5430_CORE_TSHUT_COLD,
> >+ .t_hot = OMAP5430_CORE_T_HOT,
> >+ .t_cold = OMAP5430_CORE_T_COLD,
> >+ .min_freq = OMAP5430_CORE_MIN_FREQ,
> >+ .max_freq = OMAP5430_CORE_MAX_FREQ,
> >+ .max_temp = OMAP5430_CORE_MAX_TEMP,
> >+ .min_temp = OMAP5430_CORE_MIN_TEMP,
> >+ .hyst_val = OMAP5430_CORE_HYST_VAL,
> >+ .adc_start_val = OMAP5430_ADC_START_VALUE,
> >+ .adc_end_val = OMAP5430_ADC_END_VALUE,
> >+ .update_int1 = 1000,
> >+ .update_int2 = 2000,
> >+};
> >+
> >+/*
> >+ * Temperature values in milli degree celsius
> >+ * ADC code values from 530 to 923
> >+ */
> >+static const int
> >+omap4460_adc_to_temp[OMAP4460_ADC_END_VALUE - OMAP4460_ADC_START_VALUE + 1] = {
> >+ -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600, -38200,
> >+ -37800, -37300, -36800, -36400, -36000, -35600, -35200, -34800,
> >+ -34300, -33800, -33400, -33000, -32600, -32200, -31800, -31300,
> >+ -30800, -30400, -30000, -29600, -29200, -28700, -28200, -27800,
> >+ -27400, -27000, -26600, -26200, -25700, -25200, -24800, -24400,
> >+ -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
> >+ -20600, -20200, -19700, -19200, -18800, -18400, -18000, -17600,
> >+ -17200, -16700, -16200, -15800, -15400, -15000, -14600, -14200,
> >+ -13700, -13200, -12800, -12400, -12000, -11600, -11200, -10700,
> >+ -10200, -9800, -9400, -9000, -8600, -8200, -7700, -7200, -6800,
> >+ -6400, -6000, -5600, -5200, -4800, -4300, -3800, -3400, -3000,
> >+ -2600, -2200, -1800, -1300, -800, -400, 0, 400, 800, 1200, 1600,
> >+ 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000, 6400,
> >+ 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10600, 11000,
> >+ 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800,
> >+ 15300, 15800, 16200, 16600, 17000, 17400, 17800, 18200, 18700,
> >+ 19200, 19600, 20000, 20400, 20800, 21200, 21600, 22100, 22600,
> >+ 23000, 23400, 23800, 24200, 24600, 25000, 25400, 25900, 26400,
> >+ 26800, 27200, 27600, 28000, 28400, 28800, 29300, 29800, 30200,
> >+ 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
> >+ 34400, 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800,
> >+ 38200, 38600, 39000, 39400, 39800, 40200, 40600, 41100, 41600,
> >+ 42000, 42400, 42800, 43200, 43600, 44000, 44400, 44800, 45300,
> >+ 45800, 46200, 46600, 47000, 47400, 47800, 48200, 48600, 49000,
> >+ 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400, 52800,
> >+ 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600,
> >+ 57000, 57400, 57800, 58200, 58700, 59200, 59600, 60000, 60400,
> >+ 60800, 61200, 61600, 62000, 62400, 62800, 63300, 63800, 64200,
> >+ 64600, 65000, 65400, 65800, 66200, 66600, 67000, 67400, 67800,
> >+ 68200, 68700, 69200, 69600, 70000, 70400, 70800, 71200, 71600,
> >+ 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
> >+ 75800, 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000,
> >+ 79400, 79800, 80300, 80800, 81200, 81600, 82000, 82400, 82800,
> >+ 83200, 83600, 84000, 84400, 84800, 85200, 85600, 86000, 86400,
> >+ 86800, 87300, 87800, 88200, 88600, 89000, 89400, 89800, 90200,
> >+ 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400, 93800,
> >+ 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600,
> >+ 98000, 98400, 98800, 99200, 99600, 100000, 100400, 100800, 101200,
> >+ 101600, 102000, 102400, 102800, 103200, 103600, 104000, 104400,
> >+ 104800, 105200, 105600, 106100, 106600, 107000, 107400, 107800,
> >+ 108200, 108600, 109000, 109400, 109800, 110200, 110600, 111000,
> >+ 111400, 111800, 112200, 112600, 113000, 113400, 113800, 114200,
> >+ 114600, 115000, 115400, 115800, 116200, 116600, 117000, 117400,
> >+ 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
> >+ 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
> >+ 124600, 124900, 125000, 125000, 125000, 125000
> >+};
> >+
> >+static const int
> >+omap5430_adc_to_temp[OMAP5430_ADC_END_VALUE - OMAP5430_ADC_START_VALUE + 1] = {
> >+ -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600,
> >+ -38200, -37800, -37300, -36800,
> >+ -36400, -36000, -35600, -35200, -34800, -34300, -33800, -33400, -33000,
> >+ -32600,
> >+ -32200, -31800, -31300, -30800, -30400, -30000, -29600, -29200, -28700,
> >+ -28200, -27800, -27400, -27000, -26600, -26200, -25700, -25200, -24800,
> >+ -24400, -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
> >+ -20600, -20200, -19700, -19200, -9300, -18400, -18000, -17600, -17200,
> >+ -16700, -16200, -15800, -15400, -15000, -14600, -14200, -13700, -13200,
> >+ -12800, -12400, -12000, -11600, -11200, -10700, -10200, -9800, -9400,
> >+ -9000,
> >+ -8600, -8200, -7700, -7200, -6800, -6400, -6000, -5600, -5200, -4800,
> >+ -4300,
> >+ -3800, -3400, -3000, -2600, -2200, -1800, -1300, -800, -400, 0, 400,
> >+ 800,
> >+ 1200, 1600, 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000,
> >+ 6400, 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10800,
> >+ 11100,
> >+ 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800, 15300,
> >+ 15800,
> >+ 16200, 16600, 17000, 17400, 17800, 18200, 18700, 19200, 19600, 20000,
> >+ 20400,
> >+ 20800, 21200, 21600, 22100, 22600, 23000, 23400, 23800, 24200, 24600,
> >+ 25000,
> >+ 25400, 25900, 26400, 26800, 27200, 27600, 28000, 28400, 28800, 29300,
> >+ 29800,
> >+ 30200, 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
> >+ 34400,
> >+ 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800, 38200, 38600,
> >+ 39000,
> >+ 39400, 39800, 40200, 40600, 41100, 41600, 42000, 42400, 42800, 43200,
> >+ 43600,
> >+ 44000, 44400, 44800, 45300, 45800, 46200, 46600, 47000, 47400, 47800,
> >+ 48200,
> >+ 48600, 49000, 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400,
> >+ 52800,
> >+ 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600, 57000,
> >+ 57400,
> >+ 57800, 58200, 58700, 59200, 59600, 60000, 60400, 60800, 61200, 61600,
> >+ 62000,
> >+ 62400, 62800, 63300, 63800, 64200, 64600, 65000, 65400, 65800, 66200,
> >+ 66600,
> >+ 67000, 67400, 67800, 68200, 68700, 69200, 69600, 70000, 70400, 70800,
> >+ 71200,
> >+ 71600, 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
> >+ 75800,
> >+ 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000, 79400, 79800,
> >+ 80300,
> >+ 80800, 81200, 81600, 82000, 82400, 82800, 83200, 83600, 84000, 84400,
> >+ 84800,
> >+ 85200, 85600, 86000, 86400, 86800, 87300, 87800, 88200, 88600, 89000,
> >+ 89400,
> >+ 89800, 90200, 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400,
> >+ 93800,
> >+ 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600, 98000,
> >+ 98400,
> >+ 98800, 99200, 99600, 100000, 100400, 100800, 101200, 101600, 102000,
> >+ 102400,
> >+ 102800, 103200, 103600, 104000, 104400, 104800, 105200, 105600, 106100,
> >+ 106600, 107000, 107400, 107800, 108200, 108600, 109000, 109400, 109800,
> >+ 110200, 110600, 111000, 111400, 111800, 112200, 112600, 113000, 113400,
> >+ 113800, 114200, 114600, 115000, 115400, 115800, 116200, 116600, 117000,
> >+ 117400, 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
> >+ 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
> >+ 124600, 124900, 125000, 125000, 125000, 125000,
> >+};
>
> It might be good to store the per SoC data in dedicated files or at
> least put some #ifdef around to avoid wasting memory for a non-multi
> OMAP boot.
Indeed, I was rewriting this stuff with that in mind when I saw your comment :-)
Idea is to move all this arch dependent data structures to specific files.
Here at omap-bandgap.c we would have essentially the pdriver and the local functions
and APIs. The omapX-thermal.c would contain the specific data structures and
the functions related to the thermal zones, and possibly the policy specifics for
each case. Something like:
drivers/thermal/
|- omap-bandgap.c: Bandgap platform driver specific functions and APIs (CONFIG_OMAP_BANDGAP)
|- omap-bandgap.h: Common data structure definition and defines
|- omap4-thermal.c: OMAP4xx data structures needed by the bandgap driver and the thermal zone definitions (CONFIG_OMAP4_THERMAL)
|- omap5-thermal.c: OMAP54xx data structures needed by the bandgap driver and the thermal zone definitions (CONFIG_OMAP5_THERMAL)
|- omap-thermal.ko: Module binary. It would contain the support depending on what has been selected at compile time
> filename: omap-thermal.ko
author: Texas Instrument Inc.
alias: platform:omap-bandgap
license: GPL v2
description: OMAP4+ bandgap temperature sensor driver
srcversion: 937A9F9230A5025A0E9A268
alias: of:N*T*Cti,omap4460-bandgap*
alias: of:N*T*Cti,omap5430-bandgap*
depends:
intree: Y
vermagic: 3.4.0-rc6-12199-g3e31a0c-dirty SMP preempt mod_unload modversions ARMv7 p2v8
There is gonna happen some ifdefery in omap-bandgap.[c,h] in order to compose the
match_id table based on what has been selected for compilation, but I at least don't see
any other way around.
> >+
> >+static irqreturn_t talert_irq_handler(int irq, void *data)
> >+{
> >+ struct omap_bandgap *bg_ptr = data;
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 t_hot = 0, t_cold = 0, temp, ctrl;
> >+ int i, r;
> >+
> >+ bg_ptr = data;
> >+ /* Read the status of t_hot */
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+ r = omap_control_readl(cdev, tsr->bgap_status,&t_hot);
> >+ t_hot&= tsr->status_hot_mask;
> >+
> >+ /* Read the status of t_cold */
> >+ r |= omap_control_readl(cdev, tsr->bgap_status,&t_cold);
> >+ t_cold&= tsr->status_cold_mask;
> >+
> >+ if (!t_cold&& !t_hot)
> >+ continue;
> >+
> >+ r |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,&ctrl);
> >+ /*
> >+ * One TALERT interrupt: Two sources
> >+ * If the interrupt is due to t_hot then mask t_hot and
> >+ * and unmask t_cold else mask t_cold and unmask t_hot
> >+ */
> >+ if (t_hot) {
> >+ ctrl&= ~tsr->mask_hot_mask;
> >+ ctrl |= tsr->mask_cold_mask;
> >+ } else if (t_cold) {
> >+ ctrl&= ~tsr->mask_cold_mask;
> >+ ctrl |= tsr->mask_hot_mask;
> >+ }
> >+
> >+ r |= omap_control_writel(cdev, ctrl, tsr->bgap_mask_ctrl);
> >+
> >+ if (r) {
> >+ dev_err(bg_ptr->dev, "failed to ack talert interrupt\n");
> >+ return IRQ_NONE;
> >+ }
> >+
> >+ /* read temperature */
> >+ r = omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= tsr->bgap_dtemp_mask;
> >+
> >+ /* report temperature to whom may concern */
> >+ if (bg_ptr->pdata->report_temperature)
> >+ bg_ptr->pdata->report_temperature(bg_ptr, i);
> >+ }
> >+
> >+ return IRQ_HANDLED;
> >+}
> >+
> >+static irqreturn_t omap_bandgap_tshut_irq_handler(int irq, void *data)
> >+{
> >+ orderly_poweroff(true);
> >+
> >+ return IRQ_HANDLED;
> >+}
> >+
> >+static
> >+int adc_to_temp_conversion(struct omap_bandgap *bg_ptr, int id, int adc_val,
> >+ int *t)
> >+{
> >+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> >+
> >+ /* look up for temperature in the table and return the temperature */
> >+ if (adc_val< ts_data->adc_start_val || adc_val> ts_data->adc_end_val)
> >+ return -ERANGE;
> >+
> >+ *t = bg_ptr->conv_table[adc_val - ts_data->adc_start_val];
> >+
> >+ return 0;
> >+}
> >+
> >+static int temp_to_adc_conversion(long temp, struct omap_bandgap *bg_ptr, int i,
> >+ int *adc)
> >+{
> >+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[i].ts_data;
> >+ int high, low, mid;
> >+
> >+ low = 0;
> >+ high = ts_data->adc_end_val - ts_data->adc_start_val;
> >+ mid = (high + low) / 2;
> >+
> >+ if (temp< bg_ptr->conv_table[high] || temp> bg_ptr->conv_table[high])
> >+ return -EINVAL;
> >+
> >+ while (low< high) {
> >+ if (temp< bg_ptr->conv_table[mid])
> >+ high = mid - 1;
> >+ else
> >+ low = mid + 1;
> >+ mid = (low + high) / 2;
> >+ }
> >+
> >+ *adc = ts_data->adc_start_val + low;
> >+
> >+ return 0;
> >+}
> >+
> >+static int temp_sensor_unmask_interrupts(struct omap_bandgap *bg_ptr, int id,
> >+ u32 t_hot, u32 t_cold)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 temp, reg_val;
> >+ int err;
> >+
> >+ /* Read the current on die temperature */
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ err = omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= tsr->bgap_dtemp_mask;
> >+
> >+ err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,®_val);
> >+ if (temp< t_hot)
> >+ reg_val |= tsr->mask_hot_mask;
> >+ else
> >+ reg_val&= ~tsr->mask_hot_mask;
> >+
> >+ if (t_cold< temp)
> >+ reg_val |= tsr->mask_cold_mask;
> >+ else
> >+ reg_val&= ~tsr->mask_cold_mask;
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
> >+
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to unmask interrupts\n");
> >+ return -EIO;
> >+ }
> >+
> >+ return 0;
> >+}
> >+
> >+static
> >+int add_hyst(int adc_val, int hyst_val, struct omap_bandgap *bg_ptr, int i,
> >+ u32 *sum)
> >+{
> >+ int temp, ret;
> >+
> >+ ret = adc_to_temp_conversion(bg_ptr, i, adc_val,&temp);
> >+ if (ret< 0)
> >+ return ret;
> >+
> >+ temp += hyst_val;
> >+
> >+ return temp_to_adc_conversion(temp, bg_ptr, i, sum);
> >+}
> >+
> >+static
> >+int temp_sensor_configure_thot(struct omap_bandgap *bg_ptr, int id, int t_hot)
> >+{
> >+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 thresh_val, reg_val;
> >+ int cold, err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+
> >+ /* obtain the T cold value */
> >+ err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> >+ cold = (thresh_val& tsr->threshold_tcold_mask)>>
> >+ __ffs(tsr->threshold_tcold_mask);
> >+ if (t_hot<= cold) {
> >+ /* change the t_cold to t_hot - 5000 millidegrees */
> >+ err |= add_hyst(t_hot, -ts_data->hyst_val, bg_ptr, id,&cold);
> >+ /* write the new t_cold value */
> >+ reg_val = thresh_val& (~tsr->threshold_tcold_mask);
> >+ reg_val |= cold<< __ffs(tsr->threshold_tcold_mask);
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> >+ thresh_val = reg_val;
> >+ }
> >+
> >+ /* write the new t_hot value */
> >+ reg_val = thresh_val& ~tsr->threshold_thot_mask;
> >+ reg_val |= (t_hot<< __ffs(tsr->threshold_thot_mask));
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> >+ return -EIO;
> >+ }
> >+
> >+ return temp_sensor_unmask_interrupts(bg_ptr, id, t_hot, cold);
> >+}
> >+
> >+static
> >+int temp_sensor_init_talert_thresholds(struct omap_bandgap *bg_ptr, int id,
> >+ int t_hot, int t_cold)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 reg_val, thresh_val;
> >+ int err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> >+
> >+ /* write the new t_cold value */
> >+ reg_val = thresh_val& ~tsr->threshold_tcold_mask;
> >+ reg_val |= (t_cold<< __ffs(tsr->threshold_tcold_mask));
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
> >+ return -EIO;
> >+ }
> >+
> >+ err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> >+
> >+ /* write the new t_hot value */
> >+ reg_val = thresh_val& ~tsr->threshold_thot_mask;
> >+ reg_val |= (t_hot<< __ffs(tsr->threshold_thot_mask));
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> >+ return -EIO;
> >+ }
> >+
> >+ err = omap_control_readl(cdev, tsr->bgap_mask_ctrl,®_val);
> >+ reg_val |= tsr->mask_hot_mask;
> >+ reg_val |= tsr->mask_cold_mask;
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> >+ return -EIO;
> >+ }
> >+
> >+ return err;
> >+}
> >+
> >+static
> >+int temp_sensor_configure_tcold(struct omap_bandgap *bg_ptr, int id,
> >+ int t_cold)
> >+{
> >+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 thresh_val, reg_val;
> >+ int hot, err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ /* obtain the T cold value */
> >+ err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> >+ hot = (thresh_val& tsr->threshold_thot_mask)>>
> >+ __ffs(tsr->threshold_thot_mask);
> >+
> >+ if (t_cold>= hot) {
> >+ /* change the t_hot to t_cold + 5000 millidegrees */
> >+ err |= add_hyst(t_cold, ts_data->hyst_val, bg_ptr, id,&hot);
> >+ /* write the new t_hot value */
> >+ reg_val = thresh_val& (~tsr->threshold_thot_mask);
> >+ reg_val |= hot<< __ffs(tsr->threshold_thot_mask);
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> >+ thresh_val = reg_val;
> >+ }
> >+
> >+ /* write the new t_cold value */
> >+ reg_val = thresh_val& ~tsr->threshold_tcold_mask;
> >+ reg_val |= (t_cold<< __ffs(tsr->threshold_tcold_mask));
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
> >+ return -EIO;
> >+ }
> >+
> >+ return temp_sensor_unmask_interrupts(bg_ptr, id, hot, t_cold);
> >+}
> >+
> >+static int temp_sensor_configure_tshut_hot(struct omap_bandgap *bg_ptr,
> >+ int id, int tshut_hot)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 reg_val;
> >+ int err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ err = omap_control_readl(cdev, tsr->tshut_threshold,®_val);
> >+ reg_val&= ~tsr->tshut_hot_mask;
> >+ reg_val |= tshut_hot<< __ffs(tsr->tshut_hot_mask);
> >+ err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram tshut thot\n");
> >+ return -EIO;
> >+ }
> >+
> >+ return 0;
> >+}
> >+
> >+static int temp_sensor_configure_tshut_cold(struct omap_bandgap *bg_ptr,
> >+ int id, int tshut_cold)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 reg_val;
> >+ int err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ err = omap_control_readl(cdev, tsr->tshut_threshold,®_val);
> >+ reg_val&= ~tsr->tshut_cold_mask;
> >+ reg_val |= tshut_cold<< __ffs(tsr->tshut_cold_mask);
> >+ err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
> >+ return -EIO;
> >+ }
> >+
> >+ return 0;
> >+}
> >+
> >+static int configure_temp_sensor_counter(struct omap_bandgap *bg_ptr, int id,
> >+ u32 counter)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 val;
> >+ int err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ err = omap_control_readl(cdev, tsr->bgap_counter,&val);
> >+ val&= ~tsr->counter_mask;
> >+ val |= counter<< __ffs(tsr->counter_mask);
> >+ err |= omap_control_writel(cdev, val, tsr->bgap_counter);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
> >+ return -EIO;
> >+ }
> >+
> >+ return 0;
> >+}
> >+
> >+/* Exposed APIs */
> >+/**
> >+ * omap_bandgap_read_thot() - reads sensor current thot
> >+ * @bg_ptr - pointer to bandgap instance
> >+ * @id - sensor id
> >+ * @thot - resulting current thot value
> >+ *
> >+ * returns 0 on success or the proper error code
> >+ */
> >+int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id,
> >+ int *thot)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 temp;
> >+ int ret;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ ret = omap_control_readl(cdev, tsr->bgap_threshold,&temp);
> >+ temp = (temp& tsr->threshold_thot_mask)>>
> >+ __ffs(tsr->threshold_thot_mask);
> >+ ret |= adc_to_temp_conversion(bg_ptr, id, temp,&temp);
> >+ if (ret) {
> >+ dev_err(bg_ptr->dev, "failed to read thot\n");
> >+ return -EIO;
> >+ }
> >+
> >+ *thot = temp;
> >+
> >+ return 0;
> >+}
> >+
> >+/**
> >+ * omap_bandgap_write_thot() - sets sensor current thot
> >+ * @bg_ptr - pointer to bandgap instance
> >+ * @id - sensor id
> >+ * @val - desired thot value
> >+ *
> >+ * returns 0 on success or the proper error code
> >+ */
> >+int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val)
> >+{
> >+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 t_hot;
> >+ int ret;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+
> >+ if (val< ts_data->min_temp + ts_data->hyst_val)
> >+ return -EINVAL;
> >+ ret = temp_to_adc_conversion(val, bg_ptr, id,&t_hot);
> >+ if (ret< 0)
> >+ return ret;
> >+
> >+ mutex_lock(&bg_ptr->bg_mutex);
> >+ temp_sensor_configure_thot(bg_ptr, id, t_hot);
> >+ mutex_unlock(&bg_ptr->bg_mutex);
> >+
> >+ return 0;
> >+}
> >+
> >+/**
> >+ * omap_bandgap_read_tcold() - reads sensor current tcold
> >+ * @bg_ptr - pointer to bandgap instance
> >+ * @id - sensor id
> >+ * @tcold - resulting current tcold value
> >+ *
> >+ * returns 0 on success or the proper error code
> >+ */
> >+int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id,
> >+ int *tcold)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 temp;
> >+ int ret;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ ret = omap_control_readl(cdev, tsr->bgap_threshold,&temp);
> >+ temp = (temp& tsr->threshold_tcold_mask)
> >+ >> __ffs(tsr->threshold_tcold_mask);
> >+ ret |= adc_to_temp_conversion(bg_ptr, id, temp,&temp);
> >+ if (ret)
> >+ return -EIO;
> >+
> >+ *tcold = temp;
> >+
> >+ return 0;
> >+}
> >+
> >+/**
> >+ * omap_bandgap_write_tcold() - sets the sensor tcold
> >+ * @bg_ptr - pointer to bandgap instance
> >+ * @id - sensor id
> >+ * @val - desired tcold value
> >+ *
> >+ * returns 0 on success or the proper error code
> >+ */
> >+int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val)
> >+{
> >+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 t_cold;
> >+ int ret;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ if (val> ts_data->max_temp + ts_data->hyst_val)
> >+ return -EINVAL;
> >+
> >+ ret = temp_to_adc_conversion(val, bg_ptr, id,&t_cold);
> >+ if (ret< 0)
> >+ return ret;
> >+
> >+ mutex_lock(&bg_ptr->bg_mutex);
> >+ temp_sensor_configure_tcold(bg_ptr, id, t_cold);
> >+ mutex_unlock(&bg_ptr->bg_mutex);
> >+
> >+ return 0;
> >+}
> >+
> >+/**
> >+ * omap_bandgap_read_update_interval() - read the sensor update interval
> >+ * @bg_ptr - pointer to bandgap instance
> >+ * @id - sensor id
> >+ * @interval - resulting update interval in miliseconds
> >+ *
> >+ * returns 0 on success or the proper error code
> >+ */
> >+int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
> >+ int *interval)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 time;
> >+ int ret;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ ret = omap_control_readl(cdev, tsr->bgap_counter,&time);
> >+ if (ret)
> >+ return ret;
> >+ time = (time& tsr->counter_mask)>> __ffs(tsr->counter_mask);
> >+ time = time * 1000 / bg_ptr->clk_rate;
> >+
> >+ *interval = time;
> >+
> >+ return 0;
> >+}
> >+
> >+/**
> >+ * omap_bandgap_write_update_interval() - set the update interval
> >+ * @bg_ptr - pointer to bandgap instance
> >+ * @id - sensor id
> >+ * @interval - desired update interval in miliseconds
> >+ *
> >+ * returns 0 on success or the proper error code
> >+ */
> >+int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr,
> >+ int id, u32 interval)
> >+{
> >+ interval = interval * bg_ptr->clk_rate / 1000;
> >+ mutex_lock(&bg_ptr->bg_mutex);
> >+ configure_temp_sensor_counter(bg_ptr, id, interval);
> >+ mutex_unlock(&bg_ptr->bg_mutex);
> >+
> >+ return 0;
> >+}
> >+
> >+/**
> >+ * omap_bandgap_read_temperature() - report current temperature
> >+ * @bg_ptr - pointer to bandgap instance
> >+ * @id - sensor id
> >+ * @temperature - resulting temperature
> >+ *
> >+ * returns 0 on success or the proper error code
> >+ */
> >+int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
> >+ int *temperature)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 temp;
> >+ int ret;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ ret = omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= tsr->bgap_dtemp_mask;
> >+
> >+ ret |= adc_to_temp_conversion(bg_ptr, id, temp,&temp);
> >+ if (ret)
> >+ return -EIO;
> >+
> >+ *temperature = temp;
> >+
> >+ return 0;
> >+}
> >+
> >+/**
> >+ * enable_continuous_mode() - One time enabling of continuous conversion mode
> >+ * @bg_ptr - pointer to scm instance
> >+ */
> >+static int enable_continuous_mode(struct omap_bandgap *bg_ptr)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ int i, r;
> >+ u32 val;
> >+
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+ r = omap_control_readl(cdev, tsr->bgap_mode_ctrl,&val);
> >+ val |= 1<< __ffs(tsr->mode_ctrl_mask);
> >+ r |= omap_control_writel(cdev, val, tsr->bgap_mode_ctrl);
> >+ if (r)
> >+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> >+ }
> >+
> >+ return r ? -EIO : 0;
> >+}
> >+
> >+static int omap_bandgap_tshut_init(struct omap_bandgap *bg_ptr,
> >+ struct platform_device *pdev)
> >+{
> >+ int gpio_nr = bg_ptr->tshut_gpio;
> >+ int status;
> >+
> >+ /* Request for gpio_86 line */
> >+ status = gpio_request(gpio_nr, "tshut");
> >+ if (status< 0) {
> >+ dev_err(bg_ptr->dev,
> >+ "Could not request for TSHUT GPIO:%i\n", 86);
> >+ return status;
> >+ }
> >+ status = gpio_direction_input(gpio_nr);
> >+ if (status) {
> >+ dev_err(bg_ptr->dev,
> >+ "Cannot set input TSHUT GPIO %d\n", gpio_nr);
> >+ return status;
> >+ }
> >+
> >+ status = request_irq(gpio_to_irq(gpio_nr),
> >+ omap_bandgap_tshut_irq_handler,
> >+ IRQF_TRIGGER_RISING, "tshut",
> >+ NULL);
> >+ if (status) {
> >+ gpio_free(gpio_nr);
> >+ dev_err(bg_ptr->dev, "request irq failed for TSHUT");
> >+ }
> >+
> >+ return 0;
> >+}
> >+
> >+static int omap_bandgap_talert_init(struct omap_bandgap *bg_ptr,
> >+ struct platform_device *pdev)
> >+{
> >+ int ret;
> >+
> >+ bg_ptr->irq = platform_get_irq(pdev, 0);
> >+ if (bg_ptr->irq< 0) {
> >+ dev_err(&pdev->dev, "get_irq failed\n");
> >+ return bg_ptr->irq;
> >+ }
> >+ ret = request_threaded_irq(bg_ptr->irq, NULL,
> >+ talert_irq_handler,
> >+ IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
> >+ "talert", bg_ptr);
> >+ if (ret) {
> >+ dev_err(&pdev->dev, "Request threaded irq failed.\n");
> >+ return ret;
> >+ }
> >+
> >+ return 0;
> >+}
> >+
> >+static const struct omap_bandgap_data omap4460_data = {
> >+ .has_talert = true,
> >+ .has_tshut = true,
> >+ .fclock_name = "bandgap_ts_fclk",
> >+ .div_ck_name = "div_ts_ck",
>
> None of these clock data should be there ideally. You should ensure
> that the proper device alias will be there using clkdev entries.
>
> Except that with DT, it will not work without the clock DT binding :-(
>
> I think Rob posted a latest update based on CCF... but for the
> moment we are stuck :-(
>
> >+ .conv_table = omap4460_adc_to_temp,
> >+ .sensors = {
> >+ {
> >+ .registers =&omap4460_mpu_temp_sensor_registers,
> >+ .ts_data =&omap4460_mpu_temp_sensor_data,
> >+ .domain = "cpu",
> >+ },
> >+ },
> >+ .sensor_count = 1,
> >+};
> >+
> >+static const struct omap_bandgap_data omap5430_data = {
> >+ .has_talert = true,
> >+ .has_tshut = true,
> >+ .fclock_name = "ts_clk_div_ck",
> >+ .div_ck_name = "ts_clk_div_ck",
> >+ .conv_table = omap5430_adc_to_temp,
> >+ .sensors = {
> >+ {
> >+ .registers =&omap5430_mpu_temp_sensor_registers,
> >+ .ts_data =&omap5430_mpu_temp_sensor_data,
> >+ .domain = "cpu",
> >+ },
> >+ {
> >+ .registers =&omap5430_gpu_temp_sensor_registers,
> >+ .ts_data =&omap5430_gpu_temp_sensor_data,
> >+ .domain = "gpu",
> >+ },
> >+ {
> >+ .registers =&omap5430_core_temp_sensor_registers,
> >+ .ts_data =&omap5430_core_temp_sensor_data,
> >+ .domain = "core",
> >+ },
> >+ },
> >+ .sensor_count = 3,
>
> It can probably be replaced by a sizeof.
>
> >+};
> >+
> >+static const struct of_device_id of_omap_bandgap_match[] = {
> >+ /*
> >+ * TODO: Add support to 4430
> >+ * { .compatible = "ti,omap4430-bandgap", .data = , },
> >+ */
> >+ {
> >+ .compatible = "ti,omap4460-bandgap",
> >+ .data = (void *)&omap4460_data,
>
> No need to cast toward a void *.
>
> >+ },
> >+ {
> >+ .compatible = "ti,omap5430-bandgap",
> >+ .data = (void *)&omap5430_data,
> >+ },
> >+ /* Sentinel */
> >+ { },
> >+};
> >+
> >+static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
> >+{
> >+ struct device_node *node = pdev->dev.of_node;
> >+ const struct of_device_id *of_id;
> >+ struct omap_bandgap *bg_ptr;
>
> bg_ptr is not a super name.
>
> >+ u32 prop;
> >+
> >+ /* just for the sake */
> >+ if (!node) {
> >+ dev_err(&pdev->dev, "no platform information available\n");
> >+ return ERR_PTR(-EINVAL);
> >+ }
>
> Not needed, just do the of_match_device here directly.
>
> >+
> >+ bg_ptr = devm_kzalloc(&pdev->dev, sizeof(struct omap_bandgap),
> >+ GFP_KERNEL);
> >+ if (!bg_ptr) {
> >+ dev_err(&pdev->dev, "Unable to allocate mem for driver ref\n");
> >+ return ERR_PTR(-ENOMEM);
> >+ }
> >+
> >+ of_id = of_match_device(of_omap_bandgap_match,&pdev->dev);
> >+ if (of_id)
> >+ bg_ptr->pdata = of_id->data;
>
> Nit: This is not really pdata anymore, so you should maybe remove
> the "p" to avoid confusion.
>
> >+
> >+ if (bg_ptr->pdata->has_tshut) {
> >+ if (of_property_read_u32(node, "ti,tshut-gpio",&prop)< 0) {
> >+ dev_err(&pdev->dev, "missing tshut gpio in device tree\n");
> >+ return ERR_PTR(-EINVAL);
> >+ }
> >+ bg_ptr->tshut_gpio = prop;
> >+ if (!gpio_is_valid(bg_ptr->tshut_gpio)) {
> >+ dev_err(&pdev->dev, "invalid gpio for tshut (%d)\n",
> >+ bg_ptr->tshut_gpio);
> >+ return ERR_PTR(-EINVAL);
> >+ }
> >+ }
> >+
> >+ return bg_ptr;
> >+}
> >+
> >+static
> >+int __devinit omap_bandgap_probe(struct platform_device *pdev)
> >+{
> >+ struct device *cdev = pdev->dev.parent;
> >+ struct omap_bandgap *bg_ptr;
> >+ int clk_rate, ret = 0, i;
> >+
> >+ if (!cdev) {
> >+ dev_err(&pdev->dev, "no omap control ref in our parent\n");
> >+ return -EINVAL;
> >+ }
> >+
> >+ bg_ptr = omap_bandgap_build(pdev);
> >+ if (IS_ERR_OR_NULL(bg_ptr)) {
> >+ dev_err(&pdev->dev, "failed to fetch platform data\n");
> >+ return PTR_ERR(bg_ptr);
> >+ }
> >+
> >+ if (bg_ptr->pdata->has_talert) {
>
> Nit2: Yeah, in fact instead of pdata, "conf" or "settings" seems to
> be more representative of what this structure really contain.
>
> >+ ret = omap_bandgap_talert_init(bg_ptr, pdev);
> >+ if (ret) {
> >+ dev_err(&pdev->dev, "failed to initialize Talert IRQ\n");
> >+ return ret;
> >+ }
> >+ }
> >+
> >+ if (bg_ptr->pdata->has_tshut) {
> >+ ret = omap_bandgap_tshut_init(bg_ptr, pdev);
> >+ if (ret) {
> >+ dev_err(&pdev->dev,
> >+ "failed to initialize system tshut IRQ\n");
> >+ goto free_talert;
> >+ }
> >+ }
> >+
> >+ bg_ptr->fclock = clk_get(NULL, bg_ptr->pdata->fclock_name);
>
> That's not good to get a clock without using the local dev alias.
> But because of lack of clock DT binding yet, I'm not sure we have
> the choice.
>
> >+ ret = IS_ERR_OR_NULL(bg_ptr->fclock);
> >+ if (ret) {
> >+ dev_err(&pdev->dev, "failed to request fclock reference\n");
> >+ goto free_irqs;
> >+ }
> >+
> >+ bg_ptr->div_clk = clk_get(NULL, bg_ptr->pdata->div_ck_name);
> >+ ret = IS_ERR_OR_NULL(bg_ptr->div_clk);
> >+ if (ret) {
> >+ dev_err(&pdev->dev,
> >+ "failed to request div_ts_ck clock ref\n");
> >+ goto free_irqs;
> >+ }
> >+
> >+ bg_ptr->conv_table = bg_ptr->pdata->conv_table;
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_registers *tsr;
> >+ u32 val;
> >+
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+ /*
> >+ * check if the efuse has a non-zero value if not
> >+ * it is an untrimmed sample and the temperatures
> >+ * may not be accurate
> >+ */
> >+ ret = omap_control_readl(cdev, tsr->bgap_efuse,&val);
> >+ if (ret || !val)
> >+ dev_info(&pdev->dev,
> >+ "Non-trimmed BGAP, Temp not accurate\n");
> >+ }
> >+
> >+ clk_rate = clk_round_rate(bg_ptr->div_clk,
> >+ bg_ptr->pdata->sensors[0].ts_data->max_freq);
> >+ if (clk_rate< bg_ptr->pdata->sensors[0].ts_data->min_freq ||
> >+ clk_rate == 0xffffffff) {
> >+ ret = -ENODEV;
> >+ goto put_clks;
> >+ }
> >+
> >+ ret = clk_set_rate(bg_ptr->div_clk, clk_rate);
> >+ if (ret) {
> >+ dev_err(&pdev->dev, "Cannot set clock rate\n");
> >+ goto put_clks;
> >+ }
> >+
> >+ bg_ptr->clk_rate = clk_rate;
> >+ clk_enable(bg_ptr->fclock);
> >+
> >+ mutex_init(&bg_ptr->bg_mutex);
> >+ bg_ptr->dev =&pdev->dev;
> >+ platform_set_drvdata(pdev, bg_ptr);
> >+
> >+ /* 1 clk cycle */
>
> What does that mean exactly?
>
> Regards,
> Benoit
>
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
> >+ configure_temp_sensor_counter(bg_ptr, i, 1);
> >+
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_data *ts_data;
> >+
> >+ ts_data = bg_ptr->pdata->sensors[i].ts_data;
> >+
> >+ temp_sensor_init_talert_thresholds(bg_ptr, i,
> >+ ts_data->t_hot,
> >+ ts_data->t_cold);
> >+ temp_sensor_configure_tshut_hot(bg_ptr, i,
> >+ ts_data->tshut_hot);
> >+ temp_sensor_configure_tshut_cold(bg_ptr, i,
> >+ ts_data->tshut_cold);
> >+ }
> >+
> >+ enable_continuous_mode(bg_ptr);
> >+
> >+ /* Set .250 seconds time as default counter */
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
> >+ configure_temp_sensor_counter(bg_ptr, i,
> >+ bg_ptr->clk_rate / 4);
> >+
> >+ /* Every thing is good? Then expose the sensors */
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ char *domain;
> >+
> >+ domain = bg_ptr->pdata->sensors[i].domain;
> >+ if (bg_ptr->pdata->expose_sensor)
> >+ bg_ptr->pdata->expose_sensor(bg_ptr, i, domain);
> >+ }
> >+
> >+ return 0;
> >+
> >+put_clks:
> >+ clk_disable(bg_ptr->fclock);
> >+ clk_put(bg_ptr->fclock);
> >+ clk_put(bg_ptr->div_clk);
> >+free_irqs:
> >+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
> >+ gpio_free(bg_ptr->tshut_gpio);
> >+free_talert:
> >+ free_irq(bg_ptr->irq, bg_ptr);
> >+
> >+ return ret;
> >+}
> >+
> >+static
> >+int __devexit omap_bandgap_remove(struct platform_device *pdev)
> >+{
> >+ struct omap_bandgap *bg_ptr = platform_get_drvdata(pdev);
> >+
> >+ clk_disable(bg_ptr->fclock);
> >+ clk_put(bg_ptr->fclock);
> >+ clk_put(bg_ptr->div_clk);
> >+ free_irq(bg_ptr->irq, bg_ptr);
> >+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
> >+ gpio_free(bg_ptr->tshut_gpio);
> >+
> >+ return 0;
> >+}
> >+
> >+#ifdef CONFIG_PM
> >+static int omap_bandgap_save_ctxt(struct omap_bandgap *bg_ptr)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ int err = 0;
> >+ int i;
> >+
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_registers *tsr;
> >+ struct temp_sensor_regval *rval;
> >+
> >+ rval = bg_ptr->pdata->sensors[i].regval;
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+
> >+ err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,
> >+ &rval->bg_mode_ctrl);
> >+ err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,
> >+ &rval->bg_ctrl);
> >+ err |= omap_control_readl(cdev, tsr->bgap_counter,
> >+ &rval->bg_counter);
> >+ err |= omap_control_readl(cdev, tsr->bgap_threshold,
> >+ &rval->bg_threshold);
> >+ err |= omap_control_readl(cdev, tsr->tshut_threshold,
> >+ &rval->tshut_threshold);
> >+
> >+ if (err)
> >+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> >+ }
> >+
> >+ return err ? -EIO : 0;
> >+}
> >+
> >+static int
> >+omap_bandgap_force_single_read(struct omap_bandgap *bg_ptr, int id)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 temp = 0, counter = 1000;
> >+ int err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ /* Select single conversion mode */
> >+ err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,&temp);
> >+ temp&= ~(1<< __ffs(tsr->mode_ctrl_mask));
> >+ omap_control_writel(cdev, temp, tsr->bgap_mode_ctrl);
> >+
> >+ /* Start of Conversion = 1 */
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp |= 1<< __ffs(tsr->bgap_soc_mask);
> >+ omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> >+ /* Wait until DTEMP is updated */
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= (tsr->bgap_dtemp_mask);
> >+ while ((temp == 0)&& --counter) {
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= (tsr->bgap_dtemp_mask);
> >+ }
> >+ /* Start of Conversion = 0 */
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= ~(1<< __ffs(tsr->bgap_soc_mask));
> >+ err |= omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> >+
> >+ return err ? -EIO : 0;
> >+}
> >+
> >+static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ int i, err = 0;
> >+ u32 temp = 0;
> >+
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_registers *tsr;
> >+ struct temp_sensor_regval *rval;
> >+ u32 val;
> >+
> >+ rval = bg_ptr->pdata->sensors[i].regval;
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+
> >+ err = omap_control_readl(cdev, tsr->bgap_counter,&val);
> >+ if (val == 0) {
> >+ err |= omap_control_writel(cdev, rval->bg_threshold,
> >+ tsr->bgap_threshold);
> >+ err |= omap_control_writel(cdev, rval->tshut_threshold,
> >+ tsr->tshut_threshold);
> >+ /* Force immediate temperature measurement and update
> >+ * of the DTEMP field
> >+ */
> >+ omap_bandgap_force_single_read(bg_ptr, i);
> >+ err |= omap_control_writel(cdev, rval->bg_counter,
> >+ tsr->bgap_counter);
> >+ err |= omap_control_writel(cdev, rval->bg_mode_ctrl,
> >+ tsr->bgap_mode_ctrl);
> >+ err |= omap_control_writel(cdev, rval->bg_ctrl,
> >+ tsr->bgap_mask_ctrl);
> >+ } else {
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,
> >+ &temp);
> >+ temp&= (tsr->bgap_dtemp_mask);
> >+ if (temp == 0) {
> >+ omap_bandgap_force_single_read(bg_ptr, i);
> >+ err |= omap_control_readl(cdev,
> >+ tsr->bgap_mask_ctrl,
> >+ &temp);
> >+ temp |= 1<< __ffs(tsr->mode_ctrl_mask);
> >+ err |= omap_control_writel(cdev, temp,
> >+ tsr->bgap_mask_ctrl);
> >+ }
> >+ }
> >+ if (err)
> >+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> >+ }
> >+
> >+ return err ? -EIO : 0;
> >+}
> >+
> >+static int omap_bandgap_suspend(struct device *dev)
> >+{
> >+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
> >+ int err;
> >+
> >+ err = omap_bandgap_save_ctxt(bg_ptr);
> >+ clk_disable(bg_ptr->fclock);
> >+
> >+ return err;
> >+}
> >+
> >+static int omap_bandgap_resume(struct device *dev)
> >+{
> >+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
> >+
> >+ clk_enable(bg_ptr->fclock);
> >+
> >+ return omap_bandgap_restore_ctxt(bg_ptr);
> >+}
> >+static const struct dev_pm_ops omap_bandgap_dev_pm_ops = {
> >+ SET_SYSTEM_SLEEP_PM_OPS(omap_bandgap_suspend,
> >+ omap_bandgap_resume)
> >+};
> >+
> >+#define DEV_PM_OPS (&omap_bandgap_dev_pm_ops)
> >+#else
> >+#define DEV_PM_OPS NULL
> >+#endif
> >+
> >+static struct platform_driver omap_bandgap_sensor_driver = {
> >+ .probe = omap_bandgap_probe,
> >+ .remove = omap_bandgap_remove,
> >+ .driver = {
> >+ .name = "omap-bandgap",
> >+ .pm = DEV_PM_OPS,
> >+ .of_match_table = of_omap_bandgap_match,
> >+ },
> >+};
> >+
> >+module_platform_driver(omap_bandgap_sensor_driver);
> >+early_platform_init("early_omap_temperature",&omap_bandgap_sensor_driver);
> >+
> >+MODULE_DESCRIPTION("OMAP4+ bandgap temperature sensor driver");
> >+MODULE_LICENSE("GPL v2");
> >+MODULE_ALIAS("platform:omap-bandgap");
> >+MODULE_AUTHOR("Texas Instrument Inc.");
> >diff --git a/drivers/thermal/omap-bandgap.h b/drivers/thermal/omap-bandgap.h
> >new file mode 100644
> >index 0000000..12e0d6b
> >--- /dev/null
> >+++ b/drivers/thermal/omap-bandgap.h
> >@@ -0,0 +1,63 @@
> >+/*
> >+ * OMAP4 Bandgap temperature sensor driver
> >+ *
> >+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
> >+ * Contact:
> >+ * Eduardo Valentin<eduardo.valentin@ti.com>
> >+ *
> >+ * This program is free software; you can redistribute it and/or
> >+ * modify it under the terms of the GNU General Public License
> >+ * version 2 as published by the Free Software Foundation.
> >+ *
> >+ * This program is distributed in the hope that it will be useful, but
> >+ * WITHOUT ANY WARRANTY; without even the implied warranty of
> >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> >+ * General Public License for more details.
> >+ *
> >+ * You should have received a copy of the GNU General Public License
> >+ * along with this program; if not, write to the Free Software
> >+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
> >+ * 02110-1301 USA
> >+ *
> >+ */
> >+#ifndef __OMAP_BANDGAP_H
> >+#define __OMAP_BANDGAP_H
> >+
> >+struct omap_bandgap_data;
> >+
> >+/**
> >+ * struct omap_bandgap - bandgap device structure
> >+ * @dev: device pointer
> >+ * @pdata: platform data with sensor data
> >+ * @fclock: pointer to functional clock of temperature sensor
> >+ * @div_clk: pointer to parent clock of temperature sensor fclk
> >+ * @conv_table: Pointer to adc to temperature conversion table
> >+ * @bg_mutex: Mutex for sysfs, irq and PM
> >+ * @irq: MPU Irq number for thermal alert
> >+ * @tshut_gpio: GPIO where Tshut signal is routed
> >+ * @clk_rate: Holds current clock rate
> >+ */
> >+struct omap_bandgap {
> >+ struct device *dev;
> >+ const struct omap_bandgap_data *pdata;
> >+ struct clk *fclock;
> >+ struct clk *div_clk;
> >+ const int *conv_table;
> >+ struct mutex bg_mutex; /* Mutex for irq and PM */
> >+ int irq;
> >+ int tshut_gpio;
> >+ u32 clk_rate;
> >+};
> >+
> >+int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id, int *thot);
> >+int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val);
> >+int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id, int *tcold);
> >+int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val);
> >+int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
> >+ int *interval);
> >+int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr, int id,
> >+ u32 interval);
> >+int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
> >+ int *temperature);
> >+
> >+#endif
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
@ 2012-05-28 11:06 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 11:06 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, May 25, 2012 at 05:49:44PM +0200, Cousson Benoit wrote:
> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> >In the System Control Module, OMAP supplies a voltage reference
> >and a temperature sensor feature that are gathered in the band
> >gap voltage and temperature sensor (VBGAPTS) module. The band
> >gap provides current and voltage reference for its internal
> >circuits and other analog IP blocks. The analog-to-digital
> >converter (ADC) produces an output value that is proportional
> >to the silicon temperature.
> >
> >This patch provides a platform driver which expose this feature.
> >It is moduled as a MFD child of the System Control Module core
> >MFD driver.
> >
> >This driver provides only APIs to access the device properties,
> >like temperature, thresholds and update rate.
> >
> >Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> >Signed-off-by: Keerthy<j-keerthy@ti.com>
> >---
> > .../devicetree/bindings/thermal/omap_bandgap.txt | 27 +
> > drivers/thermal/Kconfig | 13 +
> > drivers/thermal/Makefile | 4 +-
> > drivers/thermal/omap-bandgap.c | 1601 ++++++++++++++++++++
> > drivers/thermal/omap-bandgap.h | 63 +
> > 5 files changed, 1707 insertions(+), 1 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> > create mode 100644 drivers/thermal/omap-bandgap.c
> > create mode 100644 drivers/thermal/omap-bandgap.h
> >
> >diff --git a/Documentation/devicetree/bindings/thermal/omap_bandgap.txt b/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> >new file mode 100644
> >index 0000000..430bcf8
> >--- /dev/null
> >+++ b/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> >@@ -0,0 +1,27 @@
> >+* Texas Instrument OMAP SCM bandgap bindings
> >+
> >+In the System Control Module, OMAP supplies a voltage reference
> >+and a temperature sensor feature that are gathered in the band
> >+gap voltage and temperature sensor (VBGAPTS) module. The band
> >+gap provides current and voltage reference for its internal
> >+circuits and other analog IP blocks. The analog-to-digital
> >+converter (ADC) produces an output value that is proportional
> >+to the silicon temperature.
> >+
> >+Required properties:
> >+- compatible : Should be:
> >+ - "ti,omap4460-control-bandgap" : for OMAP4460 bandgap
> >+ - "ti,omap5430-control-bandgap" : for OMAP5430 bandgap
> >+- interrupts : this entry should indicate which interrupt line
> >+the talert signal is routed to;
> >+Specific:
> >+- ti,tshut-gpio : this entry should be used to inform which GPIO
> >+line the tshut signal is routed to;
> >+
> >+Example:
> >+
> >+bandgap {
> >+ compatible = "ti,omap4460-control-bandgap";
> >+ interrupts =<0 126 4>; /* talert */
> >+ ti,tshut-gpio =<86>;
> >+};
> >diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> >index 514a691..ffdd240 100644
> >--- a/drivers/thermal/Kconfig
> >+++ b/drivers/thermal/Kconfig
> >@@ -26,3 +26,16 @@ config SPEAR_THERMAL
> > help
> > Enable this to plug the SPEAr thermal sensor driver into the Linux
> > thermal framework
> >+
> >+config OMAP_BANDGAP
> >+ tristate "Texas Instruments OMAP4+ temperature sensor driver"
> >+ depends on THERMAL
> >+ depends on MFD_OMAP_CONTROL
> >+ help
> >+ If you say yes here you get support for the Texas Instruments
> >+ OMAP4460+ on die bandgap temperature sensor support. The register
> >+ set is part of system control module.
> >+
> >+ This includes alert interrupts generation and also the TSHUT
> >+ support.
> >+
> >diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> >index a9fff0b..5ff1af1 100644
> >--- a/drivers/thermal/Makefile
> >+++ b/drivers/thermal/Makefile
> >@@ -3,4 +3,6 @@
> > #
> >
> > obj-$(CONFIG_THERMAL) += thermal_sys.o
> >-obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
> >\ No newline at end of file
> >+obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
> >+obj-$(CONFIG_OMAP_BANDGAP) += omap-thermal.o
> >+omap-thermal-y := omap-bandgap.o
> >diff --git a/drivers/thermal/omap-bandgap.c b/drivers/thermal/omap-bandgap.c
> >new file mode 100644
> >index 0000000..3d5a12b
> >--- /dev/null
> >+++ b/drivers/thermal/omap-bandgap.c
> >@@ -0,0 +1,1601 @@
> >+/*
> >+ * OMAP4 Bandgap temperature sensor driver
> >+ *
> >+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> >+ * Author: J Keerthy<j-keerthy@ti.com>
> >+ * Author: Moiz Sonasath<m-sonasath@ti.com>
> >+ * Couple of fixes, DT and MFD adaptation:
> >+ * Eduardo Valentin<eduardo.valentin@ti.com>
> >+ *
> >+ * This program is free software; you can redistribute it and/or
> >+ * modify it under the terms of the GNU General Public License
> >+ * version 2 as published by the Free Software Foundation.
> >+ *
> >+ * This program is distributed in the hope that it will be useful, but
> >+ * WITHOUT ANY WARRANTY; without even the implied warranty of
> >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> >+ * General Public License for more details.
> >+ *
> >+ * You should have received a copy of the GNU General Public License
> >+ * along with this program; if not, write to the Free Software
> >+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
> >+ * 02110-1301 USA
> >+ *
> >+ */
> >+
> >+#include<linux/module.h>
> >+#include<linux/export.h>
> >+#include<linux/init.h>
> >+#include<linux/kernel.h>
> >+#include<linux/interrupt.h>
> >+#include<linux/clk.h>
> >+#include<linux/gpio.h>
> >+#include<linux/platform_device.h>
> >+#include<linux/err.h>
> >+#include<linux/types.h>
> >+#include<linux/mutex.h>
> >+#include<linux/reboot.h>
> >+#include<linux/of_platform.h>
> >+#include<linux/of_irq.h>
> >+#include<linux/mfd/omap_control.h>
> >+
> >+#include<mach/control.h>
> >+
> >+#include "omap-bandgap.h"
> >+
> >+/* Offsets from the base of temperature sensor registers */
> >+
> >+#define OMAP4460_TEMP_SENSOR_CTRL_OFFSET 0x32C
> >+#define OMAP4460_BGAP_CTRL_OFFSET 0x378
> >+#define OMAP4460_BGAP_COUNTER_OFFSET 0x37C
> >+#define OMAP4460_BGAP_THRESHOLD_OFFSET 0x380
> >+#define OMAP4460_BGAP_TSHUT_OFFSET 0x384
> >+#define OMAP4460_BGAP_STATUS_OFFSET 0x388
> >+#define OMAP4460_FUSE_OPP_BGAP 0x260
> >+
> >+#define OMAP5430_TEMP_SENSOR_MPU_OFFSET 0x32C
> >+#define OMAP5430_BGAP_CTRL_OFFSET 0x380
> >+#define OMAP5430_BGAP_COUNTER_MPU_OFFSET 0x39C
> >+#define OMAP5430_BGAP_THRESHOLD_MPU_OFFSET 0x384
> >+#define OMAP5430_BGAP_TSHUT_MPU_OFFSET 0x390
> >+#define OMAP5430_BGAP_STATUS_OFFSET 0x3A8
> >+#define OMAP5430_FUSE_OPP_BGAP_MPU 0x1E4
> >+
> >+#define OMAP5430_TEMP_SENSOR_GPU_OFFSET 0x330
> >+#define OMAP5430_BGAP_COUNTER_GPU_OFFSET 0x3A0
> >+#define OMAP5430_BGAP_THRESHOLD_GPU_OFFSET 0x388
> >+#define OMAP5430_BGAP_TSHUT_GPU_OFFSET 0x394
> >+#define OMAP5430_FUSE_OPP_BGAP_GPU 0x1E0
> >+
> >+#define OMAP5430_TEMP_SENSOR_CORE_OFFSET 0x334
> >+#define OMAP5430_BGAP_COUNTER_CORE_OFFSET 0x3A4
> >+#define OMAP5430_BGAP_THRESHOLD_CORE_OFFSET 0x38C
> >+#define OMAP5430_BGAP_TSHUT_CORE_OFFSET 0x398
> >+#define OMAP5430_FUSE_OPP_BGAP_CORE 0x1E8
> >+
> >+#define OMAP4460_TSHUT_HOT 900 /* 122 deg C */
> >+#define OMAP4460_TSHUT_COLD 895 /* 100 deg C */
> >+#define OMAP4460_T_HOT 800 /* 73 deg C */
> >+#define OMAP4460_T_COLD 795 /* 71 deg C */
> >+#define OMAP4460_MAX_FREQ 1500000
> >+#define OMAP4460_MIN_FREQ 1000000
> >+#define OMAP4460_MIN_TEMP -40000
> >+#define OMAP4460_MAX_TEMP 123000
> >+#define OMAP4460_HYST_VAL 5000
> >+#define OMAP4460_ADC_START_VALUE 530
> >+#define OMAP4460_ADC_END_VALUE 932
> >+
> >+#define OMAP5430_MPU_TSHUT_HOT 915
> >+#define OMAP5430_MPU_TSHUT_COLD 900
> >+#define OMAP5430_MPU_T_HOT 800
> >+#define OMAP5430_MPU_T_COLD 795
> >+#define OMAP5430_MPU_MAX_FREQ 1500000
> >+#define OMAP5430_MPU_MIN_FREQ 1000000
> >+#define OMAP5430_MPU_MIN_TEMP -40000
> >+#define OMAP5430_MPU_MAX_TEMP 125000
> >+#define OMAP5430_MPU_HYST_VAL 5000
> >+#define OMAP5430_ADC_START_VALUE 532
> >+#define OMAP5430_ADC_END_VALUE 934
> >+
> >+#define OMAP5430_GPU_TSHUT_HOT 915
> >+#define OMAP5430_GPU_TSHUT_COLD 900
> >+#define OMAP5430_GPU_T_HOT 800
> >+#define OMAP5430_GPU_T_COLD 795
> >+#define OMAP5430_GPU_MAX_FREQ 1500000
> >+#define OMAP5430_GPU_MIN_FREQ 1000000
> >+#define OMAP5430_GPU_MIN_TEMP -40000
> >+#define OMAP5430_GPU_MAX_TEMP 125000
> >+#define OMAP5430_GPU_HYST_VAL 5000
> >+
> >+#define OMAP5430_CORE_TSHUT_HOT 915
> >+#define OMAP5430_CORE_TSHUT_COLD 900
> >+#define OMAP5430_CORE_T_HOT 800
> >+#define OMAP5430_CORE_T_COLD 795
> >+#define OMAP5430_CORE_MAX_FREQ 1500000
> >+#define OMAP5430_CORE_MIN_FREQ 1000000
> >+#define OMAP5430_CORE_MIN_TEMP -40000
> >+#define OMAP5430_CORE_MAX_TEMP 125000
> >+#define OMAP5430_CORE_HYST_VAL 5000
> >+
> >+/**
> >+ * The register offsets and bit fields might change across
> >+ * OMAP versions hence populating them in this structure.
> >+ */
> >+
> >+struct temp_sensor_registers {
> >+ u32 temp_sensor_ctrl;
> >+ u32 bgap_tempsoff_mask;
> >+ u32 bgap_soc_mask;
> >+ u32 bgap_eocz_mask;
> >+ u32 bgap_dtemp_mask;
> >+
> >+ u32 bgap_mask_ctrl;
> >+ u32 mask_hot_mask;
> >+ u32 mask_cold_mask;
> >+
> >+ u32 bgap_mode_ctrl;
> >+ u32 mode_ctrl_mask;
> >+
> >+ u32 bgap_counter;
> >+ u32 counter_mask;
> >+
> >+ u32 bgap_threshold;
> >+ u32 threshold_thot_mask;
> >+ u32 threshold_tcold_mask;
> >+
> >+ u32 tshut_threshold;
> >+ u32 tshut_hot_mask;
> >+ u32 tshut_cold_mask;
> >+
> >+ u32 bgap_status;
> >+ u32 status_clean_stop_mask;
> >+ u32 status_bgap_alert_mask;
> >+ u32 status_hot_mask;
> >+ u32 status_cold_mask;
> >+
> >+ u32 bgap_efuse;
> >+};
> >+
> >+/**
> >+ * The thresholds and limits for temperature sensors.
> >+ */
> >+struct temp_sensor_data {
> >+ u32 tshut_hot;
> >+ u32 tshut_cold;
> >+ u32 t_hot;
> >+ u32 t_cold;
> >+ u32 min_freq;
> >+ u32 max_freq;
> >+ int max_temp;
> >+ int min_temp;
> >+ int hyst_val;
> >+ u32 adc_start_val;
> >+ u32 adc_end_val;
> >+ u32 update_int1;
> >+ u32 update_int2;
> >+};
> >+
> >+/**
> >+ * struct temp_sensor_regval - temperature sensor register values
> >+ * @bg_mode_ctrl: temp sensor control register value
> >+ * @bg_ctrl: bandgap ctrl register value
> >+ * @bg_counter: bandgap counter value
> >+ * @bg_threshold: bandgap threshold register value
> >+ * @tshut_threshold: bandgap tshut register value
> >+ */
> >+struct temp_sensor_regval {
> >+ u32 bg_mode_ctrl;
> >+ u32 bg_ctrl;
> >+ u32 bg_counter;
> >+ u32 bg_threshold;
> >+ u32 tshut_threshold;
> >+};
> >+
> >+/**
> >+ * struct omap_temp_sensor - bandgap temperature sensor platform data
> >+ * @ts_data: pointer to struct with thresholds, limits of temperature sensor
> >+ * @registers: pointer to the list of register offsets and bitfields
> >+ * @regval: temperature sensor register values
> >+ * @domain: the name of the domain where the sensor is located
> >+ */
> >+struct omap_temp_sensor {
> >+ struct temp_sensor_data *ts_data;
> >+ struct temp_sensor_registers *registers;
> >+ struct temp_sensor_regval *regval;
> >+ char *domain;
> >+};
> >+
> >+/**
> >+ * struct omap_bandgap_data - bandgap platform data structure
> >+ * @has_talert: indicates if the chip has talert output line
> >+ * @has_tshut: indicates if the chip has tshut output line
> >+ * @conv_table: Pointer to adc to temperature conversion table
> >+ * @fclock_name: clock name of the functional clock
> >+ * @div_ck_nme: clock name of the clock divisor
> >+ * @sensor_count: count of temperature sensor device in scm
> >+ * @sensors: array of sensors present in this bandgap instance
> >+ * @expose_sensor: callback to export sensor to thermal API
> >+ */
> >+struct omap_bandgap_data {
> >+ bool has_talert;
> >+ bool has_tshut;
> >+ const int *conv_table;
> >+ char *fclock_name;
> >+ char *div_ck_name;
> >+ int sensor_count;
> >+ int (*report_temperature)(struct omap_bandgap *bg_ptr, int id);
> >+ int (*expose_sensor)(struct omap_bandgap *bg_ptr, int id, char *domain);
> >+
> >+ /* this needs to be at the end */
> >+ struct omap_temp_sensor sensors[];
> >+};
> >+
> >+/* TODO: provide data structures for 4430 */
> >+
> >+/*
> >+ * OMAP4460 has one instance of thermal sensor for MPU
> >+ * need to describe the individual bit fields
> >+ */
> >+static struct temp_sensor_registers
> >+omap4460_mpu_temp_sensor_registers = {
> >+ .temp_sensor_ctrl = OMAP4460_TEMP_SENSOR_CTRL_OFFSET,
> >+ .bgap_tempsoff_mask = OMAP4460_BGAP_TEMPSOFF_MASK,
> >+ .bgap_soc_mask = OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK,
> >+ .bgap_eocz_mask = OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK,
> >+ .bgap_dtemp_mask = OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK,
> >+
> >+ .bgap_mask_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
> >+ .mask_hot_mask = OMAP4460_MASK_HOT_MASK,
> >+ .mask_cold_mask = OMAP4460_MASK_COLD_MASK,
> >+
> >+ .bgap_mode_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
> >+ .mode_ctrl_mask = OMAP4460_SINGLE_MODE_MASK,
> >+
> >+ .bgap_counter = OMAP4460_BGAP_COUNTER_OFFSET,
> >+ .counter_mask = OMAP4460_COUNTER_MASK,
> >+
> >+ .bgap_threshold = OMAP4460_BGAP_THRESHOLD_OFFSET,
> >+ .threshold_thot_mask = OMAP4460_T_HOT_MASK,
> >+ .threshold_tcold_mask = OMAP4460_T_COLD_MASK,
> >+
> >+ .tshut_threshold = OMAP4460_BGAP_TSHUT_OFFSET,
> >+ .tshut_hot_mask = OMAP4460_TSHUT_HOT_MASK,
> >+ .tshut_cold_mask = OMAP4460_TSHUT_COLD_MASK,
> >+
> >+ .bgap_status = OMAP4460_BGAP_STATUS_OFFSET,
> >+ .status_clean_stop_mask = OMAP4460_CLEAN_STOP_MASK,
> >+ .status_bgap_alert_mask = OMAP4460_BGAP_ALERT_MASK,
> >+ .status_hot_mask = OMAP4460_HOT_FLAG_MASK,
> >+ .status_cold_mask = OMAP4460_COLD_FLAG_MASK,
> >+
> >+ .bgap_efuse = OMAP4460_FUSE_OPP_BGAP,
> >+};
> >+
> >+/*
> >+ * OMAP4460 has one instance of thermal sensor for MPU
>
> Bad copy paste.
>
> >+ * need to describe the individual bit fields
> >+ */
> >+static struct temp_sensor_registers
> >+omap5430_mpu_temp_sensor_registers = {
> >+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_MPU_OFFSET,
> >+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
> >+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
> >+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
> >+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
> >+
> >+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
> >+ .mask_hot_mask = OMAP5430_MASK_HOT_MPU_MASK,
> >+ .mask_cold_mask = OMAP5430_MASK_COLD_MPU_MASK,
> >+
> >+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
> >+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
> >+
> >+ .bgap_counter = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
> >+ .counter_mask = OMAP5430_COUNTER_MASK,
> >+
> >+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_MPU_OFFSET,
> >+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
> >+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
> >+
> >+ .tshut_threshold = OMAP5430_BGAP_TSHUT_MPU_OFFSET,
> >+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
> >+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
> >+
> >+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
> >+ .status_clean_stop_mask = 0x0,
> >+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
> >+ .status_hot_mask = OMAP5430_HOT_MPU_FLAG_MASK,
> >+ .status_cold_mask = OMAP5430_COLD_MPU_FLAG_MASK,
> >+
> >+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_MPU,
> >+};
> >+
> >+/*
> >+ * OMAP4460 has one instance of thermal sensor for MPU
> >+ * need to describe the individual bit fields
> >+ */
>
> Ditto
>
> >+static struct temp_sensor_registers
> >+omap5430_gpu_temp_sensor_registers = {
> >+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_GPU_OFFSET,
> >+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
> >+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
> >+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
> >+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
> >+
> >+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
> >+ .mask_hot_mask = OMAP5430_MASK_HOT_MM_MASK,
> >+ .mask_cold_mask = OMAP5430_MASK_COLD_MM_MASK,
> >+
> >+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
> >+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
> >+
> >+ .bgap_counter = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
> >+ .counter_mask = OMAP5430_COUNTER_MASK,
> >+
> >+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_GPU_OFFSET,
> >+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
> >+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
> >+
> >+ .tshut_threshold = OMAP5430_BGAP_TSHUT_GPU_OFFSET,
> >+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
> >+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
> >+
> >+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
> >+ .status_clean_stop_mask = 0x0,
> >+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
> >+ .status_hot_mask = OMAP5430_HOT_MM_FLAG_MASK,
> >+ .status_cold_mask = OMAP5430_COLD_MM_FLAG_MASK,
> >+
> >+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_GPU,
> >+};
> >+
> >+/*
> >+ * OMAP4460 has one instance of thermal sensor for MPU
> >+ * need to describe the individual bit fields
> >+ */
>
> Ditto
>
> >+static struct temp_sensor_registers
> >+omap5430_core_temp_sensor_registers = {
> >+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_CORE_OFFSET,
> >+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
> >+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
> >+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
> >+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
> >+
> >+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
> >+ .mask_hot_mask = OMAP5430_MASK_HOT_CORE_MASK,
> >+ .mask_cold_mask = OMAP5430_MASK_COLD_CORE_MASK,
> >+
> >+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
> >+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
> >+
> >+ .bgap_counter = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
> >+ .counter_mask = OMAP5430_COUNTER_MASK,
> >+
> >+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_CORE_OFFSET,
> >+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
> >+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
> >+
> >+ .tshut_threshold = OMAP5430_BGAP_TSHUT_CORE_OFFSET,
> >+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
> >+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
> >+
> >+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
> >+ .status_clean_stop_mask = 0x0,
> >+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
> >+ .status_hot_mask = OMAP5430_HOT_CORE_FLAG_MASK,
> >+ .status_cold_mask = OMAP5430_COLD_CORE_FLAG_MASK,
> >+
> >+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_CORE,
> >+};
> >+
> >+/* Thresholds and limits for OMAP4460 MPU temperature sensor */
> >+static struct temp_sensor_data omap4460_mpu_temp_sensor_data = {
> >+ .tshut_hot = OMAP4460_TSHUT_HOT,
> >+ .tshut_cold = OMAP4460_TSHUT_COLD,
> >+ .t_hot = OMAP4460_T_HOT,
> >+ .t_cold = OMAP4460_T_COLD,
> >+ .min_freq = OMAP4460_MIN_FREQ,
> >+ .max_freq = OMAP4460_MAX_FREQ,
> >+ .max_temp = OMAP4460_MAX_TEMP,
> >+ .min_temp = OMAP4460_MIN_TEMP,
> >+ .hyst_val = OMAP4460_HYST_VAL,
> >+ .adc_start_val = OMAP4460_ADC_START_VALUE,
> >+ .adc_end_val = OMAP4460_ADC_END_VALUE,
> >+ .update_int1 = 1000,
> >+ .update_int2 = 2000,
> >+};
> >+
> >+/* Thresholds and limits for OMAP5430 MPU temperature sensor */
> >+static struct temp_sensor_data omap5430_mpu_temp_sensor_data = {
> >+ .tshut_hot = OMAP5430_MPU_TSHUT_HOT,
> >+ .tshut_cold = OMAP5430_MPU_TSHUT_COLD,
> >+ .t_hot = OMAP5430_MPU_T_HOT,
> >+ .t_cold = OMAP5430_MPU_T_COLD,
> >+ .min_freq = OMAP5430_MPU_MIN_FREQ,
> >+ .max_freq = OMAP5430_MPU_MAX_FREQ,
> >+ .max_temp = OMAP5430_MPU_MAX_TEMP,
> >+ .min_temp = OMAP5430_MPU_MIN_TEMP,
> >+ .hyst_val = OMAP5430_MPU_HYST_VAL,
> >+ .adc_start_val = OMAP5430_ADC_START_VALUE,
> >+ .adc_end_val = OMAP5430_ADC_END_VALUE,
> >+ .update_int1 = 1000,
> >+ .update_int2 = 2000,
> >+};
> >+
> >+/* Thresholds and limits for OMAP5430 GPU temperature sensor */
> >+static struct temp_sensor_data omap5430_gpu_temp_sensor_data = {
> >+ .tshut_hot = OMAP5430_GPU_TSHUT_HOT,
> >+ .tshut_cold = OMAP5430_GPU_TSHUT_COLD,
> >+ .t_hot = OMAP5430_GPU_T_HOT,
> >+ .t_cold = OMAP5430_GPU_T_COLD,
> >+ .min_freq = OMAP5430_GPU_MIN_FREQ,
> >+ .max_freq = OMAP5430_GPU_MAX_FREQ,
> >+ .max_temp = OMAP5430_GPU_MAX_TEMP,
> >+ .min_temp = OMAP5430_GPU_MIN_TEMP,
> >+ .hyst_val = OMAP5430_GPU_HYST_VAL,
> >+ .adc_start_val = OMAP5430_ADC_START_VALUE,
> >+ .adc_end_val = OMAP5430_ADC_END_VALUE,
> >+ .update_int1 = 1000,
> >+ .update_int2 = 2000,
> >+};
> >+
> >+/* Thresholds and limits for OMAP5430 CORE temperature sensor */
> >+static struct temp_sensor_data omap5430_core_temp_sensor_data = {
> >+ .tshut_hot = OMAP5430_CORE_TSHUT_HOT,
> >+ .tshut_cold = OMAP5430_CORE_TSHUT_COLD,
> >+ .t_hot = OMAP5430_CORE_T_HOT,
> >+ .t_cold = OMAP5430_CORE_T_COLD,
> >+ .min_freq = OMAP5430_CORE_MIN_FREQ,
> >+ .max_freq = OMAP5430_CORE_MAX_FREQ,
> >+ .max_temp = OMAP5430_CORE_MAX_TEMP,
> >+ .min_temp = OMAP5430_CORE_MIN_TEMP,
> >+ .hyst_val = OMAP5430_CORE_HYST_VAL,
> >+ .adc_start_val = OMAP5430_ADC_START_VALUE,
> >+ .adc_end_val = OMAP5430_ADC_END_VALUE,
> >+ .update_int1 = 1000,
> >+ .update_int2 = 2000,
> >+};
> >+
> >+/*
> >+ * Temperature values in milli degree celsius
> >+ * ADC code values from 530 to 923
> >+ */
> >+static const int
> >+omap4460_adc_to_temp[OMAP4460_ADC_END_VALUE - OMAP4460_ADC_START_VALUE + 1] = {
> >+ -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600, -38200,
> >+ -37800, -37300, -36800, -36400, -36000, -35600, -35200, -34800,
> >+ -34300, -33800, -33400, -33000, -32600, -32200, -31800, -31300,
> >+ -30800, -30400, -30000, -29600, -29200, -28700, -28200, -27800,
> >+ -27400, -27000, -26600, -26200, -25700, -25200, -24800, -24400,
> >+ -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
> >+ -20600, -20200, -19700, -19200, -18800, -18400, -18000, -17600,
> >+ -17200, -16700, -16200, -15800, -15400, -15000, -14600, -14200,
> >+ -13700, -13200, -12800, -12400, -12000, -11600, -11200, -10700,
> >+ -10200, -9800, -9400, -9000, -8600, -8200, -7700, -7200, -6800,
> >+ -6400, -6000, -5600, -5200, -4800, -4300, -3800, -3400, -3000,
> >+ -2600, -2200, -1800, -1300, -800, -400, 0, 400, 800, 1200, 1600,
> >+ 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000, 6400,
> >+ 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10600, 11000,
> >+ 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800,
> >+ 15300, 15800, 16200, 16600, 17000, 17400, 17800, 18200, 18700,
> >+ 19200, 19600, 20000, 20400, 20800, 21200, 21600, 22100, 22600,
> >+ 23000, 23400, 23800, 24200, 24600, 25000, 25400, 25900, 26400,
> >+ 26800, 27200, 27600, 28000, 28400, 28800, 29300, 29800, 30200,
> >+ 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
> >+ 34400, 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800,
> >+ 38200, 38600, 39000, 39400, 39800, 40200, 40600, 41100, 41600,
> >+ 42000, 42400, 42800, 43200, 43600, 44000, 44400, 44800, 45300,
> >+ 45800, 46200, 46600, 47000, 47400, 47800, 48200, 48600, 49000,
> >+ 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400, 52800,
> >+ 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600,
> >+ 57000, 57400, 57800, 58200, 58700, 59200, 59600, 60000, 60400,
> >+ 60800, 61200, 61600, 62000, 62400, 62800, 63300, 63800, 64200,
> >+ 64600, 65000, 65400, 65800, 66200, 66600, 67000, 67400, 67800,
> >+ 68200, 68700, 69200, 69600, 70000, 70400, 70800, 71200, 71600,
> >+ 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
> >+ 75800, 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000,
> >+ 79400, 79800, 80300, 80800, 81200, 81600, 82000, 82400, 82800,
> >+ 83200, 83600, 84000, 84400, 84800, 85200, 85600, 86000, 86400,
> >+ 86800, 87300, 87800, 88200, 88600, 89000, 89400, 89800, 90200,
> >+ 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400, 93800,
> >+ 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600,
> >+ 98000, 98400, 98800, 99200, 99600, 100000, 100400, 100800, 101200,
> >+ 101600, 102000, 102400, 102800, 103200, 103600, 104000, 104400,
> >+ 104800, 105200, 105600, 106100, 106600, 107000, 107400, 107800,
> >+ 108200, 108600, 109000, 109400, 109800, 110200, 110600, 111000,
> >+ 111400, 111800, 112200, 112600, 113000, 113400, 113800, 114200,
> >+ 114600, 115000, 115400, 115800, 116200, 116600, 117000, 117400,
> >+ 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
> >+ 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
> >+ 124600, 124900, 125000, 125000, 125000, 125000
> >+};
> >+
> >+static const int
> >+omap5430_adc_to_temp[OMAP5430_ADC_END_VALUE - OMAP5430_ADC_START_VALUE + 1] = {
> >+ -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600,
> >+ -38200, -37800, -37300, -36800,
> >+ -36400, -36000, -35600, -35200, -34800, -34300, -33800, -33400, -33000,
> >+ -32600,
> >+ -32200, -31800, -31300, -30800, -30400, -30000, -29600, -29200, -28700,
> >+ -28200, -27800, -27400, -27000, -26600, -26200, -25700, -25200, -24800,
> >+ -24400, -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
> >+ -20600, -20200, -19700, -19200, -9300, -18400, -18000, -17600, -17200,
> >+ -16700, -16200, -15800, -15400, -15000, -14600, -14200, -13700, -13200,
> >+ -12800, -12400, -12000, -11600, -11200, -10700, -10200, -9800, -9400,
> >+ -9000,
> >+ -8600, -8200, -7700, -7200, -6800, -6400, -6000, -5600, -5200, -4800,
> >+ -4300,
> >+ -3800, -3400, -3000, -2600, -2200, -1800, -1300, -800, -400, 0, 400,
> >+ 800,
> >+ 1200, 1600, 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000,
> >+ 6400, 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10800,
> >+ 11100,
> >+ 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800, 15300,
> >+ 15800,
> >+ 16200, 16600, 17000, 17400, 17800, 18200, 18700, 19200, 19600, 20000,
> >+ 20400,
> >+ 20800, 21200, 21600, 22100, 22600, 23000, 23400, 23800, 24200, 24600,
> >+ 25000,
> >+ 25400, 25900, 26400, 26800, 27200, 27600, 28000, 28400, 28800, 29300,
> >+ 29800,
> >+ 30200, 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
> >+ 34400,
> >+ 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800, 38200, 38600,
> >+ 39000,
> >+ 39400, 39800, 40200, 40600, 41100, 41600, 42000, 42400, 42800, 43200,
> >+ 43600,
> >+ 44000, 44400, 44800, 45300, 45800, 46200, 46600, 47000, 47400, 47800,
> >+ 48200,
> >+ 48600, 49000, 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400,
> >+ 52800,
> >+ 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600, 57000,
> >+ 57400,
> >+ 57800, 58200, 58700, 59200, 59600, 60000, 60400, 60800, 61200, 61600,
> >+ 62000,
> >+ 62400, 62800, 63300, 63800, 64200, 64600, 65000, 65400, 65800, 66200,
> >+ 66600,
> >+ 67000, 67400, 67800, 68200, 68700, 69200, 69600, 70000, 70400, 70800,
> >+ 71200,
> >+ 71600, 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
> >+ 75800,
> >+ 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000, 79400, 79800,
> >+ 80300,
> >+ 80800, 81200, 81600, 82000, 82400, 82800, 83200, 83600, 84000, 84400,
> >+ 84800,
> >+ 85200, 85600, 86000, 86400, 86800, 87300, 87800, 88200, 88600, 89000,
> >+ 89400,
> >+ 89800, 90200, 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400,
> >+ 93800,
> >+ 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600, 98000,
> >+ 98400,
> >+ 98800, 99200, 99600, 100000, 100400, 100800, 101200, 101600, 102000,
> >+ 102400,
> >+ 102800, 103200, 103600, 104000, 104400, 104800, 105200, 105600, 106100,
> >+ 106600, 107000, 107400, 107800, 108200, 108600, 109000, 109400, 109800,
> >+ 110200, 110600, 111000, 111400, 111800, 112200, 112600, 113000, 113400,
> >+ 113800, 114200, 114600, 115000, 115400, 115800, 116200, 116600, 117000,
> >+ 117400, 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
> >+ 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
> >+ 124600, 124900, 125000, 125000, 125000, 125000,
> >+};
>
> It might be good to store the per SoC data in dedicated files or at
> least put some #ifdef around to avoid wasting memory for a non-multi
> OMAP boot.
Indeed, I was rewriting this stuff with that in mind when I saw your comment :-)
Idea is to move all this arch dependent data structures to specific files.
Here at omap-bandgap.c we would have essentially the pdriver and the local functions
and APIs. The omapX-thermal.c would contain the specific data structures and
the functions related to the thermal zones, and possibly the policy specifics for
each case. Something like:
drivers/thermal/
|- omap-bandgap.c: Bandgap platform driver specific functions and APIs (CONFIG_OMAP_BANDGAP)
|- omap-bandgap.h: Common data structure definition and defines
|- omap4-thermal.c: OMAP4xx data structures needed by the bandgap driver and the thermal zone definitions (CONFIG_OMAP4_THERMAL)
|- omap5-thermal.c: OMAP54xx data structures needed by the bandgap driver and the thermal zone definitions (CONFIG_OMAP5_THERMAL)
|- omap-thermal.ko: Module binary. It would contain the support depending on what has been selected at compile time
> filename: omap-thermal.ko
author: Texas Instrument Inc.
alias: platform:omap-bandgap
license: GPL v2
description: OMAP4+ bandgap temperature sensor driver
srcversion: 937A9F9230A5025A0E9A268
alias: of:N*T*Cti,omap4460-bandgap*
alias: of:N*T*Cti,omap5430-bandgap*
depends:
intree: Y
vermagic: 3.4.0-rc6-12199-g3e31a0c-dirty SMP preempt mod_unload modversions ARMv7 p2v8
There is gonna happen some ifdefery in omap-bandgap.[c,h] in order to compose the
match_id table based on what has been selected for compilation, but I at least don't see
any other way around.
> >+
> >+static irqreturn_t talert_irq_handler(int irq, void *data)
> >+{
> >+ struct omap_bandgap *bg_ptr = data;
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 t_hot = 0, t_cold = 0, temp, ctrl;
> >+ int i, r;
> >+
> >+ bg_ptr = data;
> >+ /* Read the status of t_hot */
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+ r = omap_control_readl(cdev, tsr->bgap_status,&t_hot);
> >+ t_hot&= tsr->status_hot_mask;
> >+
> >+ /* Read the status of t_cold */
> >+ r |= omap_control_readl(cdev, tsr->bgap_status,&t_cold);
> >+ t_cold&= tsr->status_cold_mask;
> >+
> >+ if (!t_cold&& !t_hot)
> >+ continue;
> >+
> >+ r |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,&ctrl);
> >+ /*
> >+ * One TALERT interrupt: Two sources
> >+ * If the interrupt is due to t_hot then mask t_hot and
> >+ * and unmask t_cold else mask t_cold and unmask t_hot
> >+ */
> >+ if (t_hot) {
> >+ ctrl&= ~tsr->mask_hot_mask;
> >+ ctrl |= tsr->mask_cold_mask;
> >+ } else if (t_cold) {
> >+ ctrl&= ~tsr->mask_cold_mask;
> >+ ctrl |= tsr->mask_hot_mask;
> >+ }
> >+
> >+ r |= omap_control_writel(cdev, ctrl, tsr->bgap_mask_ctrl);
> >+
> >+ if (r) {
> >+ dev_err(bg_ptr->dev, "failed to ack talert interrupt\n");
> >+ return IRQ_NONE;
> >+ }
> >+
> >+ /* read temperature */
> >+ r = omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= tsr->bgap_dtemp_mask;
> >+
> >+ /* report temperature to whom may concern */
> >+ if (bg_ptr->pdata->report_temperature)
> >+ bg_ptr->pdata->report_temperature(bg_ptr, i);
> >+ }
> >+
> >+ return IRQ_HANDLED;
> >+}
> >+
> >+static irqreturn_t omap_bandgap_tshut_irq_handler(int irq, void *data)
> >+{
> >+ orderly_poweroff(true);
> >+
> >+ return IRQ_HANDLED;
> >+}
> >+
> >+static
> >+int adc_to_temp_conversion(struct omap_bandgap *bg_ptr, int id, int adc_val,
> >+ int *t)
> >+{
> >+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> >+
> >+ /* look up for temperature in the table and return the temperature */
> >+ if (adc_val< ts_data->adc_start_val || adc_val> ts_data->adc_end_val)
> >+ return -ERANGE;
> >+
> >+ *t = bg_ptr->conv_table[adc_val - ts_data->adc_start_val];
> >+
> >+ return 0;
> >+}
> >+
> >+static int temp_to_adc_conversion(long temp, struct omap_bandgap *bg_ptr, int i,
> >+ int *adc)
> >+{
> >+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[i].ts_data;
> >+ int high, low, mid;
> >+
> >+ low = 0;
> >+ high = ts_data->adc_end_val - ts_data->adc_start_val;
> >+ mid = (high + low) / 2;
> >+
> >+ if (temp< bg_ptr->conv_table[high] || temp> bg_ptr->conv_table[high])
> >+ return -EINVAL;
> >+
> >+ while (low< high) {
> >+ if (temp< bg_ptr->conv_table[mid])
> >+ high = mid - 1;
> >+ else
> >+ low = mid + 1;
> >+ mid = (low + high) / 2;
> >+ }
> >+
> >+ *adc = ts_data->adc_start_val + low;
> >+
> >+ return 0;
> >+}
> >+
> >+static int temp_sensor_unmask_interrupts(struct omap_bandgap *bg_ptr, int id,
> >+ u32 t_hot, u32 t_cold)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 temp, reg_val;
> >+ int err;
> >+
> >+ /* Read the current on die temperature */
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ err = omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= tsr->bgap_dtemp_mask;
> >+
> >+ err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,®_val);
> >+ if (temp< t_hot)
> >+ reg_val |= tsr->mask_hot_mask;
> >+ else
> >+ reg_val&= ~tsr->mask_hot_mask;
> >+
> >+ if (t_cold< temp)
> >+ reg_val |= tsr->mask_cold_mask;
> >+ else
> >+ reg_val&= ~tsr->mask_cold_mask;
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
> >+
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to unmask interrupts\n");
> >+ return -EIO;
> >+ }
> >+
> >+ return 0;
> >+}
> >+
> >+static
> >+int add_hyst(int adc_val, int hyst_val, struct omap_bandgap *bg_ptr, int i,
> >+ u32 *sum)
> >+{
> >+ int temp, ret;
> >+
> >+ ret = adc_to_temp_conversion(bg_ptr, i, adc_val,&temp);
> >+ if (ret< 0)
> >+ return ret;
> >+
> >+ temp += hyst_val;
> >+
> >+ return temp_to_adc_conversion(temp, bg_ptr, i, sum);
> >+}
> >+
> >+static
> >+int temp_sensor_configure_thot(struct omap_bandgap *bg_ptr, int id, int t_hot)
> >+{
> >+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 thresh_val, reg_val;
> >+ int cold, err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+
> >+ /* obtain the T cold value */
> >+ err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> >+ cold = (thresh_val& tsr->threshold_tcold_mask)>>
> >+ __ffs(tsr->threshold_tcold_mask);
> >+ if (t_hot<= cold) {
> >+ /* change the t_cold to t_hot - 5000 millidegrees */
> >+ err |= add_hyst(t_hot, -ts_data->hyst_val, bg_ptr, id,&cold);
> >+ /* write the new t_cold value */
> >+ reg_val = thresh_val& (~tsr->threshold_tcold_mask);
> >+ reg_val |= cold<< __ffs(tsr->threshold_tcold_mask);
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> >+ thresh_val = reg_val;
> >+ }
> >+
> >+ /* write the new t_hot value */
> >+ reg_val = thresh_val& ~tsr->threshold_thot_mask;
> >+ reg_val |= (t_hot<< __ffs(tsr->threshold_thot_mask));
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> >+ return -EIO;
> >+ }
> >+
> >+ return temp_sensor_unmask_interrupts(bg_ptr, id, t_hot, cold);
> >+}
> >+
> >+static
> >+int temp_sensor_init_talert_thresholds(struct omap_bandgap *bg_ptr, int id,
> >+ int t_hot, int t_cold)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 reg_val, thresh_val;
> >+ int err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> >+
> >+ /* write the new t_cold value */
> >+ reg_val = thresh_val& ~tsr->threshold_tcold_mask;
> >+ reg_val |= (t_cold<< __ffs(tsr->threshold_tcold_mask));
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
> >+ return -EIO;
> >+ }
> >+
> >+ err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> >+
> >+ /* write the new t_hot value */
> >+ reg_val = thresh_val& ~tsr->threshold_thot_mask;
> >+ reg_val |= (t_hot<< __ffs(tsr->threshold_thot_mask));
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> >+ return -EIO;
> >+ }
> >+
> >+ err = omap_control_readl(cdev, tsr->bgap_mask_ctrl,®_val);
> >+ reg_val |= tsr->mask_hot_mask;
> >+ reg_val |= tsr->mask_cold_mask;
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_mask_ctrl);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
> >+ return -EIO;
> >+ }
> >+
> >+ return err;
> >+}
> >+
> >+static
> >+int temp_sensor_configure_tcold(struct omap_bandgap *bg_ptr, int id,
> >+ int t_cold)
> >+{
> >+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 thresh_val, reg_val;
> >+ int hot, err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ /* obtain the T cold value */
> >+ err = omap_control_readl(cdev, tsr->bgap_threshold,&thresh_val);
> >+ hot = (thresh_val& tsr->threshold_thot_mask)>>
> >+ __ffs(tsr->threshold_thot_mask);
> >+
> >+ if (t_cold>= hot) {
> >+ /* change the t_hot to t_cold + 5000 millidegrees */
> >+ err |= add_hyst(t_cold, ts_data->hyst_val, bg_ptr, id,&hot);
> >+ /* write the new t_hot value */
> >+ reg_val = thresh_val& (~tsr->threshold_thot_mask);
> >+ reg_val |= hot<< __ffs(tsr->threshold_thot_mask);
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> >+ thresh_val = reg_val;
> >+ }
> >+
> >+ /* write the new t_cold value */
> >+ reg_val = thresh_val& ~tsr->threshold_tcold_mask;
> >+ reg_val |= (t_cold<< __ffs(tsr->threshold_tcold_mask));
> >+ err |= omap_control_writel(cdev, reg_val, tsr->bgap_threshold);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
> >+ return -EIO;
> >+ }
> >+
> >+ return temp_sensor_unmask_interrupts(bg_ptr, id, hot, t_cold);
> >+}
> >+
> >+static int temp_sensor_configure_tshut_hot(struct omap_bandgap *bg_ptr,
> >+ int id, int tshut_hot)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 reg_val;
> >+ int err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ err = omap_control_readl(cdev, tsr->tshut_threshold,®_val);
> >+ reg_val&= ~tsr->tshut_hot_mask;
> >+ reg_val |= tshut_hot<< __ffs(tsr->tshut_hot_mask);
> >+ err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram tshut thot\n");
> >+ return -EIO;
> >+ }
> >+
> >+ return 0;
> >+}
> >+
> >+static int temp_sensor_configure_tshut_cold(struct omap_bandgap *bg_ptr,
> >+ int id, int tshut_cold)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 reg_val;
> >+ int err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ err = omap_control_readl(cdev, tsr->tshut_threshold,®_val);
> >+ reg_val&= ~tsr->tshut_cold_mask;
> >+ reg_val |= tshut_cold<< __ffs(tsr->tshut_cold_mask);
> >+ err |= omap_control_writel(cdev, reg_val, tsr->tshut_threshold);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
> >+ return -EIO;
> >+ }
> >+
> >+ return 0;
> >+}
> >+
> >+static int configure_temp_sensor_counter(struct omap_bandgap *bg_ptr, int id,
> >+ u32 counter)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 val;
> >+ int err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ err = omap_control_readl(cdev, tsr->bgap_counter,&val);
> >+ val&= ~tsr->counter_mask;
> >+ val |= counter<< __ffs(tsr->counter_mask);
> >+ err |= omap_control_writel(cdev, val, tsr->bgap_counter);
> >+ if (err) {
> >+ dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
> >+ return -EIO;
> >+ }
> >+
> >+ return 0;
> >+}
> >+
> >+/* Exposed APIs */
> >+/**
> >+ * omap_bandgap_read_thot() - reads sensor current thot
> >+ * @bg_ptr - pointer to bandgap instance
> >+ * @id - sensor id
> >+ * @thot - resulting current thot value
> >+ *
> >+ * returns 0 on success or the proper error code
> >+ */
> >+int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id,
> >+ int *thot)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 temp;
> >+ int ret;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ ret = omap_control_readl(cdev, tsr->bgap_threshold,&temp);
> >+ temp = (temp& tsr->threshold_thot_mask)>>
> >+ __ffs(tsr->threshold_thot_mask);
> >+ ret |= adc_to_temp_conversion(bg_ptr, id, temp,&temp);
> >+ if (ret) {
> >+ dev_err(bg_ptr->dev, "failed to read thot\n");
> >+ return -EIO;
> >+ }
> >+
> >+ *thot = temp;
> >+
> >+ return 0;
> >+}
> >+
> >+/**
> >+ * omap_bandgap_write_thot() - sets sensor current thot
> >+ * @bg_ptr - pointer to bandgap instance
> >+ * @id - sensor id
> >+ * @val - desired thot value
> >+ *
> >+ * returns 0 on success or the proper error code
> >+ */
> >+int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val)
> >+{
> >+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 t_hot;
> >+ int ret;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+
> >+ if (val< ts_data->min_temp + ts_data->hyst_val)
> >+ return -EINVAL;
> >+ ret = temp_to_adc_conversion(val, bg_ptr, id,&t_hot);
> >+ if (ret< 0)
> >+ return ret;
> >+
> >+ mutex_lock(&bg_ptr->bg_mutex);
> >+ temp_sensor_configure_thot(bg_ptr, id, t_hot);
> >+ mutex_unlock(&bg_ptr->bg_mutex);
> >+
> >+ return 0;
> >+}
> >+
> >+/**
> >+ * omap_bandgap_read_tcold() - reads sensor current tcold
> >+ * @bg_ptr - pointer to bandgap instance
> >+ * @id - sensor id
> >+ * @tcold - resulting current tcold value
> >+ *
> >+ * returns 0 on success or the proper error code
> >+ */
> >+int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id,
> >+ int *tcold)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 temp;
> >+ int ret;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ ret = omap_control_readl(cdev, tsr->bgap_threshold,&temp);
> >+ temp = (temp& tsr->threshold_tcold_mask)
> >+ >> __ffs(tsr->threshold_tcold_mask);
> >+ ret |= adc_to_temp_conversion(bg_ptr, id, temp,&temp);
> >+ if (ret)
> >+ return -EIO;
> >+
> >+ *tcold = temp;
> >+
> >+ return 0;
> >+}
> >+
> >+/**
> >+ * omap_bandgap_write_tcold() - sets the sensor tcold
> >+ * @bg_ptr - pointer to bandgap instance
> >+ * @id - sensor id
> >+ * @val - desired tcold value
> >+ *
> >+ * returns 0 on success or the proper error code
> >+ */
> >+int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val)
> >+{
> >+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 t_cold;
> >+ int ret;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ if (val> ts_data->max_temp + ts_data->hyst_val)
> >+ return -EINVAL;
> >+
> >+ ret = temp_to_adc_conversion(val, bg_ptr, id,&t_cold);
> >+ if (ret< 0)
> >+ return ret;
> >+
> >+ mutex_lock(&bg_ptr->bg_mutex);
> >+ temp_sensor_configure_tcold(bg_ptr, id, t_cold);
> >+ mutex_unlock(&bg_ptr->bg_mutex);
> >+
> >+ return 0;
> >+}
> >+
> >+/**
> >+ * omap_bandgap_read_update_interval() - read the sensor update interval
> >+ * @bg_ptr - pointer to bandgap instance
> >+ * @id - sensor id
> >+ * @interval - resulting update interval in miliseconds
> >+ *
> >+ * returns 0 on success or the proper error code
> >+ */
> >+int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
> >+ int *interval)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 time;
> >+ int ret;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ ret = omap_control_readl(cdev, tsr->bgap_counter,&time);
> >+ if (ret)
> >+ return ret;
> >+ time = (time& tsr->counter_mask)>> __ffs(tsr->counter_mask);
> >+ time = time * 1000 / bg_ptr->clk_rate;
> >+
> >+ *interval = time;
> >+
> >+ return 0;
> >+}
> >+
> >+/**
> >+ * omap_bandgap_write_update_interval() - set the update interval
> >+ * @bg_ptr - pointer to bandgap instance
> >+ * @id - sensor id
> >+ * @interval - desired update interval in miliseconds
> >+ *
> >+ * returns 0 on success or the proper error code
> >+ */
> >+int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr,
> >+ int id, u32 interval)
> >+{
> >+ interval = interval * bg_ptr->clk_rate / 1000;
> >+ mutex_lock(&bg_ptr->bg_mutex);
> >+ configure_temp_sensor_counter(bg_ptr, id, interval);
> >+ mutex_unlock(&bg_ptr->bg_mutex);
> >+
> >+ return 0;
> >+}
> >+
> >+/**
> >+ * omap_bandgap_read_temperature() - report current temperature
> >+ * @bg_ptr - pointer to bandgap instance
> >+ * @id - sensor id
> >+ * @temperature - resulting temperature
> >+ *
> >+ * returns 0 on success or the proper error code
> >+ */
> >+int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
> >+ int *temperature)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 temp;
> >+ int ret;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ ret = omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= tsr->bgap_dtemp_mask;
> >+
> >+ ret |= adc_to_temp_conversion(bg_ptr, id, temp,&temp);
> >+ if (ret)
> >+ return -EIO;
> >+
> >+ *temperature = temp;
> >+
> >+ return 0;
> >+}
> >+
> >+/**
> >+ * enable_continuous_mode() - One time enabling of continuous conversion mode
> >+ * @bg_ptr - pointer to scm instance
> >+ */
> >+static int enable_continuous_mode(struct omap_bandgap *bg_ptr)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ int i, r;
> >+ u32 val;
> >+
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+ r = omap_control_readl(cdev, tsr->bgap_mode_ctrl,&val);
> >+ val |= 1<< __ffs(tsr->mode_ctrl_mask);
> >+ r |= omap_control_writel(cdev, val, tsr->bgap_mode_ctrl);
> >+ if (r)
> >+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> >+ }
> >+
> >+ return r ? -EIO : 0;
> >+}
> >+
> >+static int omap_bandgap_tshut_init(struct omap_bandgap *bg_ptr,
> >+ struct platform_device *pdev)
> >+{
> >+ int gpio_nr = bg_ptr->tshut_gpio;
> >+ int status;
> >+
> >+ /* Request for gpio_86 line */
> >+ status = gpio_request(gpio_nr, "tshut");
> >+ if (status< 0) {
> >+ dev_err(bg_ptr->dev,
> >+ "Could not request for TSHUT GPIO:%i\n", 86);
> >+ return status;
> >+ }
> >+ status = gpio_direction_input(gpio_nr);
> >+ if (status) {
> >+ dev_err(bg_ptr->dev,
> >+ "Cannot set input TSHUT GPIO %d\n", gpio_nr);
> >+ return status;
> >+ }
> >+
> >+ status = request_irq(gpio_to_irq(gpio_nr),
> >+ omap_bandgap_tshut_irq_handler,
> >+ IRQF_TRIGGER_RISING, "tshut",
> >+ NULL);
> >+ if (status) {
> >+ gpio_free(gpio_nr);
> >+ dev_err(bg_ptr->dev, "request irq failed for TSHUT");
> >+ }
> >+
> >+ return 0;
> >+}
> >+
> >+static int omap_bandgap_talert_init(struct omap_bandgap *bg_ptr,
> >+ struct platform_device *pdev)
> >+{
> >+ int ret;
> >+
> >+ bg_ptr->irq = platform_get_irq(pdev, 0);
> >+ if (bg_ptr->irq< 0) {
> >+ dev_err(&pdev->dev, "get_irq failed\n");
> >+ return bg_ptr->irq;
> >+ }
> >+ ret = request_threaded_irq(bg_ptr->irq, NULL,
> >+ talert_irq_handler,
> >+ IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
> >+ "talert", bg_ptr);
> >+ if (ret) {
> >+ dev_err(&pdev->dev, "Request threaded irq failed.\n");
> >+ return ret;
> >+ }
> >+
> >+ return 0;
> >+}
> >+
> >+static const struct omap_bandgap_data omap4460_data = {
> >+ .has_talert = true,
> >+ .has_tshut = true,
> >+ .fclock_name = "bandgap_ts_fclk",
> >+ .div_ck_name = "div_ts_ck",
>
> None of these clock data should be there ideally. You should ensure
> that the proper device alias will be there using clkdev entries.
>
> Except that with DT, it will not work without the clock DT binding :-(
>
> I think Rob posted a latest update based on CCF... but for the
> moment we are stuck :-(
>
> >+ .conv_table = omap4460_adc_to_temp,
> >+ .sensors = {
> >+ {
> >+ .registers =&omap4460_mpu_temp_sensor_registers,
> >+ .ts_data =&omap4460_mpu_temp_sensor_data,
> >+ .domain = "cpu",
> >+ },
> >+ },
> >+ .sensor_count = 1,
> >+};
> >+
> >+static const struct omap_bandgap_data omap5430_data = {
> >+ .has_talert = true,
> >+ .has_tshut = true,
> >+ .fclock_name = "ts_clk_div_ck",
> >+ .div_ck_name = "ts_clk_div_ck",
> >+ .conv_table = omap5430_adc_to_temp,
> >+ .sensors = {
> >+ {
> >+ .registers =&omap5430_mpu_temp_sensor_registers,
> >+ .ts_data =&omap5430_mpu_temp_sensor_data,
> >+ .domain = "cpu",
> >+ },
> >+ {
> >+ .registers =&omap5430_gpu_temp_sensor_registers,
> >+ .ts_data =&omap5430_gpu_temp_sensor_data,
> >+ .domain = "gpu",
> >+ },
> >+ {
> >+ .registers =&omap5430_core_temp_sensor_registers,
> >+ .ts_data =&omap5430_core_temp_sensor_data,
> >+ .domain = "core",
> >+ },
> >+ },
> >+ .sensor_count = 3,
>
> It can probably be replaced by a sizeof.
>
> >+};
> >+
> >+static const struct of_device_id of_omap_bandgap_match[] = {
> >+ /*
> >+ * TODO: Add support to 4430
> >+ * { .compatible = "ti,omap4430-bandgap", .data = , },
> >+ */
> >+ {
> >+ .compatible = "ti,omap4460-bandgap",
> >+ .data = (void *)&omap4460_data,
>
> No need to cast toward a void *.
>
> >+ },
> >+ {
> >+ .compatible = "ti,omap5430-bandgap",
> >+ .data = (void *)&omap5430_data,
> >+ },
> >+ /* Sentinel */
> >+ { },
> >+};
> >+
> >+static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
> >+{
> >+ struct device_node *node = pdev->dev.of_node;
> >+ const struct of_device_id *of_id;
> >+ struct omap_bandgap *bg_ptr;
>
> bg_ptr is not a super name.
>
> >+ u32 prop;
> >+
> >+ /* just for the sake */
> >+ if (!node) {
> >+ dev_err(&pdev->dev, "no platform information available\n");
> >+ return ERR_PTR(-EINVAL);
> >+ }
>
> Not needed, just do the of_match_device here directly.
>
> >+
> >+ bg_ptr = devm_kzalloc(&pdev->dev, sizeof(struct omap_bandgap),
> >+ GFP_KERNEL);
> >+ if (!bg_ptr) {
> >+ dev_err(&pdev->dev, "Unable to allocate mem for driver ref\n");
> >+ return ERR_PTR(-ENOMEM);
> >+ }
> >+
> >+ of_id = of_match_device(of_omap_bandgap_match,&pdev->dev);
> >+ if (of_id)
> >+ bg_ptr->pdata = of_id->data;
>
> Nit: This is not really pdata anymore, so you should maybe remove
> the "p" to avoid confusion.
>
> >+
> >+ if (bg_ptr->pdata->has_tshut) {
> >+ if (of_property_read_u32(node, "ti,tshut-gpio",&prop)< 0) {
> >+ dev_err(&pdev->dev, "missing tshut gpio in device tree\n");
> >+ return ERR_PTR(-EINVAL);
> >+ }
> >+ bg_ptr->tshut_gpio = prop;
> >+ if (!gpio_is_valid(bg_ptr->tshut_gpio)) {
> >+ dev_err(&pdev->dev, "invalid gpio for tshut (%d)\n",
> >+ bg_ptr->tshut_gpio);
> >+ return ERR_PTR(-EINVAL);
> >+ }
> >+ }
> >+
> >+ return bg_ptr;
> >+}
> >+
> >+static
> >+int __devinit omap_bandgap_probe(struct platform_device *pdev)
> >+{
> >+ struct device *cdev = pdev->dev.parent;
> >+ struct omap_bandgap *bg_ptr;
> >+ int clk_rate, ret = 0, i;
> >+
> >+ if (!cdev) {
> >+ dev_err(&pdev->dev, "no omap control ref in our parent\n");
> >+ return -EINVAL;
> >+ }
> >+
> >+ bg_ptr = omap_bandgap_build(pdev);
> >+ if (IS_ERR_OR_NULL(bg_ptr)) {
> >+ dev_err(&pdev->dev, "failed to fetch platform data\n");
> >+ return PTR_ERR(bg_ptr);
> >+ }
> >+
> >+ if (bg_ptr->pdata->has_talert) {
>
> Nit2: Yeah, in fact instead of pdata, "conf" or "settings" seems to
> be more representative of what this structure really contain.
>
> >+ ret = omap_bandgap_talert_init(bg_ptr, pdev);
> >+ if (ret) {
> >+ dev_err(&pdev->dev, "failed to initialize Talert IRQ\n");
> >+ return ret;
> >+ }
> >+ }
> >+
> >+ if (bg_ptr->pdata->has_tshut) {
> >+ ret = omap_bandgap_tshut_init(bg_ptr, pdev);
> >+ if (ret) {
> >+ dev_err(&pdev->dev,
> >+ "failed to initialize system tshut IRQ\n");
> >+ goto free_talert;
> >+ }
> >+ }
> >+
> >+ bg_ptr->fclock = clk_get(NULL, bg_ptr->pdata->fclock_name);
>
> That's not good to get a clock without using the local dev alias.
> But because of lack of clock DT binding yet, I'm not sure we have
> the choice.
>
> >+ ret = IS_ERR_OR_NULL(bg_ptr->fclock);
> >+ if (ret) {
> >+ dev_err(&pdev->dev, "failed to request fclock reference\n");
> >+ goto free_irqs;
> >+ }
> >+
> >+ bg_ptr->div_clk = clk_get(NULL, bg_ptr->pdata->div_ck_name);
> >+ ret = IS_ERR_OR_NULL(bg_ptr->div_clk);
> >+ if (ret) {
> >+ dev_err(&pdev->dev,
> >+ "failed to request div_ts_ck clock ref\n");
> >+ goto free_irqs;
> >+ }
> >+
> >+ bg_ptr->conv_table = bg_ptr->pdata->conv_table;
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_registers *tsr;
> >+ u32 val;
> >+
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+ /*
> >+ * check if the efuse has a non-zero value if not
> >+ * it is an untrimmed sample and the temperatures
> >+ * may not be accurate
> >+ */
> >+ ret = omap_control_readl(cdev, tsr->bgap_efuse,&val);
> >+ if (ret || !val)
> >+ dev_info(&pdev->dev,
> >+ "Non-trimmed BGAP, Temp not accurate\n");
> >+ }
> >+
> >+ clk_rate = clk_round_rate(bg_ptr->div_clk,
> >+ bg_ptr->pdata->sensors[0].ts_data->max_freq);
> >+ if (clk_rate< bg_ptr->pdata->sensors[0].ts_data->min_freq ||
> >+ clk_rate == 0xffffffff) {
> >+ ret = -ENODEV;
> >+ goto put_clks;
> >+ }
> >+
> >+ ret = clk_set_rate(bg_ptr->div_clk, clk_rate);
> >+ if (ret) {
> >+ dev_err(&pdev->dev, "Cannot set clock rate\n");
> >+ goto put_clks;
> >+ }
> >+
> >+ bg_ptr->clk_rate = clk_rate;
> >+ clk_enable(bg_ptr->fclock);
> >+
> >+ mutex_init(&bg_ptr->bg_mutex);
> >+ bg_ptr->dev =&pdev->dev;
> >+ platform_set_drvdata(pdev, bg_ptr);
> >+
> >+ /* 1 clk cycle */
>
> What does that mean exactly?
>
> Regards,
> Benoit
>
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
> >+ configure_temp_sensor_counter(bg_ptr, i, 1);
> >+
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_data *ts_data;
> >+
> >+ ts_data = bg_ptr->pdata->sensors[i].ts_data;
> >+
> >+ temp_sensor_init_talert_thresholds(bg_ptr, i,
> >+ ts_data->t_hot,
> >+ ts_data->t_cold);
> >+ temp_sensor_configure_tshut_hot(bg_ptr, i,
> >+ ts_data->tshut_hot);
> >+ temp_sensor_configure_tshut_cold(bg_ptr, i,
> >+ ts_data->tshut_cold);
> >+ }
> >+
> >+ enable_continuous_mode(bg_ptr);
> >+
> >+ /* Set .250 seconds time as default counter */
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
> >+ configure_temp_sensor_counter(bg_ptr, i,
> >+ bg_ptr->clk_rate / 4);
> >+
> >+ /* Every thing is good? Then expose the sensors */
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ char *domain;
> >+
> >+ domain = bg_ptr->pdata->sensors[i].domain;
> >+ if (bg_ptr->pdata->expose_sensor)
> >+ bg_ptr->pdata->expose_sensor(bg_ptr, i, domain);
> >+ }
> >+
> >+ return 0;
> >+
> >+put_clks:
> >+ clk_disable(bg_ptr->fclock);
> >+ clk_put(bg_ptr->fclock);
> >+ clk_put(bg_ptr->div_clk);
> >+free_irqs:
> >+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
> >+ gpio_free(bg_ptr->tshut_gpio);
> >+free_talert:
> >+ free_irq(bg_ptr->irq, bg_ptr);
> >+
> >+ return ret;
> >+}
> >+
> >+static
> >+int __devexit omap_bandgap_remove(struct platform_device *pdev)
> >+{
> >+ struct omap_bandgap *bg_ptr = platform_get_drvdata(pdev);
> >+
> >+ clk_disable(bg_ptr->fclock);
> >+ clk_put(bg_ptr->fclock);
> >+ clk_put(bg_ptr->div_clk);
> >+ free_irq(bg_ptr->irq, bg_ptr);
> >+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
> >+ gpio_free(bg_ptr->tshut_gpio);
> >+
> >+ return 0;
> >+}
> >+
> >+#ifdef CONFIG_PM
> >+static int omap_bandgap_save_ctxt(struct omap_bandgap *bg_ptr)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ int err = 0;
> >+ int i;
> >+
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_registers *tsr;
> >+ struct temp_sensor_regval *rval;
> >+
> >+ rval = bg_ptr->pdata->sensors[i].regval;
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+
> >+ err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,
> >+ &rval->bg_mode_ctrl);
> >+ err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,
> >+ &rval->bg_ctrl);
> >+ err |= omap_control_readl(cdev, tsr->bgap_counter,
> >+ &rval->bg_counter);
> >+ err |= omap_control_readl(cdev, tsr->bgap_threshold,
> >+ &rval->bg_threshold);
> >+ err |= omap_control_readl(cdev, tsr->tshut_threshold,
> >+ &rval->tshut_threshold);
> >+
> >+ if (err)
> >+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> >+ }
> >+
> >+ return err ? -EIO : 0;
> >+}
> >+
> >+static int
> >+omap_bandgap_force_single_read(struct omap_bandgap *bg_ptr, int id)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 temp = 0, counter = 1000;
> >+ int err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ /* Select single conversion mode */
> >+ err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,&temp);
> >+ temp&= ~(1<< __ffs(tsr->mode_ctrl_mask));
> >+ omap_control_writel(cdev, temp, tsr->bgap_mode_ctrl);
> >+
> >+ /* Start of Conversion = 1 */
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp |= 1<< __ffs(tsr->bgap_soc_mask);
> >+ omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> >+ /* Wait until DTEMP is updated */
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= (tsr->bgap_dtemp_mask);
> >+ while ((temp == 0)&& --counter) {
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= (tsr->bgap_dtemp_mask);
> >+ }
> >+ /* Start of Conversion = 0 */
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= ~(1<< __ffs(tsr->bgap_soc_mask));
> >+ err |= omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> >+
> >+ return err ? -EIO : 0;
> >+}
> >+
> >+static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ int i, err = 0;
> >+ u32 temp = 0;
> >+
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_registers *tsr;
> >+ struct temp_sensor_regval *rval;
> >+ u32 val;
> >+
> >+ rval = bg_ptr->pdata->sensors[i].regval;
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+
> >+ err = omap_control_readl(cdev, tsr->bgap_counter,&val);
> >+ if (val == 0) {
> >+ err |= omap_control_writel(cdev, rval->bg_threshold,
> >+ tsr->bgap_threshold);
> >+ err |= omap_control_writel(cdev, rval->tshut_threshold,
> >+ tsr->tshut_threshold);
> >+ /* Force immediate temperature measurement and update
> >+ * of the DTEMP field
> >+ */
> >+ omap_bandgap_force_single_read(bg_ptr, i);
> >+ err |= omap_control_writel(cdev, rval->bg_counter,
> >+ tsr->bgap_counter);
> >+ err |= omap_control_writel(cdev, rval->bg_mode_ctrl,
> >+ tsr->bgap_mode_ctrl);
> >+ err |= omap_control_writel(cdev, rval->bg_ctrl,
> >+ tsr->bgap_mask_ctrl);
> >+ } else {
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,
> >+ &temp);
> >+ temp&= (tsr->bgap_dtemp_mask);
> >+ if (temp == 0) {
> >+ omap_bandgap_force_single_read(bg_ptr, i);
> >+ err |= omap_control_readl(cdev,
> >+ tsr->bgap_mask_ctrl,
> >+ &temp);
> >+ temp |= 1<< __ffs(tsr->mode_ctrl_mask);
> >+ err |= omap_control_writel(cdev, temp,
> >+ tsr->bgap_mask_ctrl);
> >+ }
> >+ }
> >+ if (err)
> >+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> >+ }
> >+
> >+ return err ? -EIO : 0;
> >+}
> >+
> >+static int omap_bandgap_suspend(struct device *dev)
> >+{
> >+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
> >+ int err;
> >+
> >+ err = omap_bandgap_save_ctxt(bg_ptr);
> >+ clk_disable(bg_ptr->fclock);
> >+
> >+ return err;
> >+}
> >+
> >+static int omap_bandgap_resume(struct device *dev)
> >+{
> >+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
> >+
> >+ clk_enable(bg_ptr->fclock);
> >+
> >+ return omap_bandgap_restore_ctxt(bg_ptr);
> >+}
> >+static const struct dev_pm_ops omap_bandgap_dev_pm_ops = {
> >+ SET_SYSTEM_SLEEP_PM_OPS(omap_bandgap_suspend,
> >+ omap_bandgap_resume)
> >+};
> >+
> >+#define DEV_PM_OPS (&omap_bandgap_dev_pm_ops)
> >+#else
> >+#define DEV_PM_OPS NULL
> >+#endif
> >+
> >+static struct platform_driver omap_bandgap_sensor_driver = {
> >+ .probe = omap_bandgap_probe,
> >+ .remove = omap_bandgap_remove,
> >+ .driver = {
> >+ .name = "omap-bandgap",
> >+ .pm = DEV_PM_OPS,
> >+ .of_match_table = of_omap_bandgap_match,
> >+ },
> >+};
> >+
> >+module_platform_driver(omap_bandgap_sensor_driver);
> >+early_platform_init("early_omap_temperature",&omap_bandgap_sensor_driver);
> >+
> >+MODULE_DESCRIPTION("OMAP4+ bandgap temperature sensor driver");
> >+MODULE_LICENSE("GPL v2");
> >+MODULE_ALIAS("platform:omap-bandgap");
> >+MODULE_AUTHOR("Texas Instrument Inc.");
> >diff --git a/drivers/thermal/omap-bandgap.h b/drivers/thermal/omap-bandgap.h
> >new file mode 100644
> >index 0000000..12e0d6b
> >--- /dev/null
> >+++ b/drivers/thermal/omap-bandgap.h
> >@@ -0,0 +1,63 @@
> >+/*
> >+ * OMAP4 Bandgap temperature sensor driver
> >+ *
> >+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
> >+ * Contact:
> >+ * Eduardo Valentin<eduardo.valentin@ti.com>
> >+ *
> >+ * This program is free software; you can redistribute it and/or
> >+ * modify it under the terms of the GNU General Public License
> >+ * version 2 as published by the Free Software Foundation.
> >+ *
> >+ * This program is distributed in the hope that it will be useful, but
> >+ * WITHOUT ANY WARRANTY; without even the implied warranty of
> >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> >+ * General Public License for more details.
> >+ *
> >+ * You should have received a copy of the GNU General Public License
> >+ * along with this program; if not, write to the Free Software
> >+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
> >+ * 02110-1301 USA
> >+ *
> >+ */
> >+#ifndef __OMAP_BANDGAP_H
> >+#define __OMAP_BANDGAP_H
> >+
> >+struct omap_bandgap_data;
> >+
> >+/**
> >+ * struct omap_bandgap - bandgap device structure
> >+ * @dev: device pointer
> >+ * @pdata: platform data with sensor data
> >+ * @fclock: pointer to functional clock of temperature sensor
> >+ * @div_clk: pointer to parent clock of temperature sensor fclk
> >+ * @conv_table: Pointer to adc to temperature conversion table
> >+ * @bg_mutex: Mutex for sysfs, irq and PM
> >+ * @irq: MPU Irq number for thermal alert
> >+ * @tshut_gpio: GPIO where Tshut signal is routed
> >+ * @clk_rate: Holds current clock rate
> >+ */
> >+struct omap_bandgap {
> >+ struct device *dev;
> >+ const struct omap_bandgap_data *pdata;
> >+ struct clk *fclock;
> >+ struct clk *div_clk;
> >+ const int *conv_table;
> >+ struct mutex bg_mutex; /* Mutex for irq and PM */
> >+ int irq;
> >+ int tshut_gpio;
> >+ u32 clk_rate;
> >+};
> >+
> >+int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id, int *thot);
> >+int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val);
> >+int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id, int *tcold);
> >+int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val);
> >+int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
> >+ int *interval);
> >+int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr, int id,
> >+ u32 interval);
> >+int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
> >+ int *temperature);
> >+
> >+#endif
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
2012-05-25 15:49 ` Cousson, Benoit
@ 2012-05-28 11:16 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 11:16 UTC (permalink / raw)
To: Cousson, Benoit
Cc: amit.kucheria, kbaidarov, kishon, balbi, Keerthy, linux-pm,
linux-omap, linux-arm-kernel
Hello again,
On Fri, May 25, 2012 at 05:49:44PM +0200, Cousson Benoit wrote:
> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
<big cut>
> >+
> >+static const struct omap_bandgap_data omap4460_data = {
> >+ .has_talert = true,
> >+ .has_tshut = true,
> >+ .fclock_name = "bandgap_ts_fclk",
> >+ .div_ck_name = "div_ts_ck",
>
> None of these clock data should be there ideally. You should ensure
> that the proper device alias will be there using clkdev entries.
In fact, it is a shame that it would be needed to have this entries there :-(
>
> Except that with DT, it will not work without the clock DT binding :-(
>
> I think Rob posted a latest update based on CCF... but for the
> moment we are stuck :-(
OK. But would it work for BG as well as it seams to be a special case?
>
> >+ .conv_table = omap4460_adc_to_temp,
> >+ .sensors = {
> >+ {
> >+ .registers =&omap4460_mpu_temp_sensor_registers,
> >+ .ts_data =&omap4460_mpu_temp_sensor_data,
> >+ .domain = "cpu",
> >+ },
> >+ },
> >+ .sensor_count = 1,
> >+};
> >+
> >+static const struct omap_bandgap_data omap5430_data = {
> >+ .has_talert = true,
> >+ .has_tshut = true,
> >+ .fclock_name = "ts_clk_div_ck",
> >+ .div_ck_name = "ts_clk_div_ck",
> >+ .conv_table = omap5430_adc_to_temp,
> >+ .sensors = {
> >+ {
> >+ .registers =&omap5430_mpu_temp_sensor_registers,
> >+ .ts_data =&omap5430_mpu_temp_sensor_data,
> >+ .domain = "cpu",
> >+ },
> >+ {
> >+ .registers =&omap5430_gpu_temp_sensor_registers,
> >+ .ts_data =&omap5430_gpu_temp_sensor_data,
> >+ .domain = "gpu",
> >+ },
> >+ {
> >+ .registers =&omap5430_core_temp_sensor_registers,
> >+ .ts_data =&omap5430_core_temp_sensor_data,
> >+ .domain = "core",
> >+ },
> >+ },
> >+ .sensor_count = 3,
>
> It can probably be replaced by a sizeof.
ARRAY_SIZE prob, will check.
>
> >+};
> >+
> >+static const struct of_device_id of_omap_bandgap_match[] = {
> >+ /*
> >+ * TODO: Add support to 4430
> >+ * { .compatible = "ti,omap4430-bandgap", .data = , },
> >+ */
> >+ {
> >+ .compatible = "ti,omap4460-bandgap",
> >+ .data = (void *)&omap4460_data,
>
> No need to cast toward a void *.
In this case, there is a need, because the omap4460_data is const but the .data field isn't. So I need to force it.
>
> >+ },
> >+ {
> >+ .compatible = "ti,omap5430-bandgap",
> >+ .data = (void *)&omap5430_data,
> >+ },
> >+ /* Sentinel */
> >+ { },
> >+};
> >+
> >+static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
> >+{
> >+ struct device_node *node = pdev->dev.of_node;
> >+ const struct of_device_id *of_id;
> >+ struct omap_bandgap *bg_ptr;
>
> bg_ptr is not a super name.
Got a better name? Just don't want a long one to avoid code bending at 80th column...
>
> >+ u32 prop;
> >+
> >+ /* just for the sake */
> >+ if (!node) {
> >+ dev_err(&pdev->dev, "no platform information available\n");
> >+ return ERR_PTR(-EINVAL);
> >+ }
>
> Not needed, just do the of_match_device here directly.
Indeed...
>
> >+
> >+ bg_ptr = devm_kzalloc(&pdev->dev, sizeof(struct omap_bandgap),
> >+ GFP_KERNEL);
> >+ if (!bg_ptr) {
> >+ dev_err(&pdev->dev, "Unable to allocate mem for driver ref\n");
> >+ return ERR_PTR(-ENOMEM);
> >+ }
> >+
> >+ of_id = of_match_device(of_omap_bandgap_match,&pdev->dev);
> >+ if (of_id)
> >+ bg_ptr->pdata = of_id->data;
>
> Nit: This is not really pdata anymore, so you should maybe remove
> the "p" to avoid confusion.
OK...
>
> >+
> >+ if (bg_ptr->pdata->has_tshut) {
> >+ if (of_property_read_u32(node, "ti,tshut-gpio",&prop)< 0) {
> >+ dev_err(&pdev->dev, "missing tshut gpio in device tree\n");
> >+ return ERR_PTR(-EINVAL);
> >+ }
> >+ bg_ptr->tshut_gpio = prop;
> >+ if (!gpio_is_valid(bg_ptr->tshut_gpio)) {
> >+ dev_err(&pdev->dev, "invalid gpio for tshut (%d)\n",
> >+ bg_ptr->tshut_gpio);
> >+ return ERR_PTR(-EINVAL);
> >+ }
> >+ }
> >+
> >+ return bg_ptr;
> >+}
> >+
> >+static
> >+int __devinit omap_bandgap_probe(struct platform_device *pdev)
> >+{
> >+ struct device *cdev = pdev->dev.parent;
> >+ struct omap_bandgap *bg_ptr;
> >+ int clk_rate, ret = 0, i;
> >+
> >+ if (!cdev) {
> >+ dev_err(&pdev->dev, "no omap control ref in our parent\n");
> >+ return -EINVAL;
> >+ }
> >+
> >+ bg_ptr = omap_bandgap_build(pdev);
> >+ if (IS_ERR_OR_NULL(bg_ptr)) {
> >+ dev_err(&pdev->dev, "failed to fetch platform data\n");
> >+ return PTR_ERR(bg_ptr);
> >+ }
> >+
> >+ if (bg_ptr->pdata->has_talert) {
>
> Nit2: Yeah, in fact instead of pdata, "conf" or "settings" seems to
> be more representative of what this structure really contain.
conf looks good to me.
>
> >+ ret = omap_bandgap_talert_init(bg_ptr, pdev);
> >+ if (ret) {
> >+ dev_err(&pdev->dev, "failed to initialize Talert IRQ\n");
> >+ return ret;
> >+ }
> >+ }
> >+
> >+ if (bg_ptr->pdata->has_tshut) {
> >+ ret = omap_bandgap_tshut_init(bg_ptr, pdev);
> >+ if (ret) {
> >+ dev_err(&pdev->dev,
> >+ "failed to initialize system tshut IRQ\n");
> >+ goto free_talert;
> >+ }
> >+ }
> >+
> >+ bg_ptr->fclock = clk_get(NULL, bg_ptr->pdata->fclock_name);
>
> That's not good to get a clock without using the local dev alias.
> But because of lack of clock DT binding yet, I'm not sure we have
> the choice.
In fact I didn't touch the clk data on purpose and left the clock handling
as is. On my side I didn't know how the clock struct would look like with DT,
so, I didn't mess with it.
Do you have a reference to check the work in progress for clock DT ?
>
> >+ ret = IS_ERR_OR_NULL(bg_ptr->fclock);
> >+ if (ret) {
> >+ dev_err(&pdev->dev, "failed to request fclock reference\n");
> >+ goto free_irqs;
> >+ }
> >+
> >+ bg_ptr->div_clk = clk_get(NULL, bg_ptr->pdata->div_ck_name);
> >+ ret = IS_ERR_OR_NULL(bg_ptr->div_clk);
> >+ if (ret) {
> >+ dev_err(&pdev->dev,
> >+ "failed to request div_ts_ck clock ref\n");
> >+ goto free_irqs;
> >+ }
> >+
> >+ bg_ptr->conv_table = bg_ptr->pdata->conv_table;
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_registers *tsr;
> >+ u32 val;
> >+
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+ /*
> >+ * check if the efuse has a non-zero value if not
> >+ * it is an untrimmed sample and the temperatures
> >+ * may not be accurate
> >+ */
> >+ ret = omap_control_readl(cdev, tsr->bgap_efuse,&val);
> >+ if (ret || !val)
> >+ dev_info(&pdev->dev,
> >+ "Non-trimmed BGAP, Temp not accurate\n");
> >+ }
> >+
> >+ clk_rate = clk_round_rate(bg_ptr->div_clk,
> >+ bg_ptr->pdata->sensors[0].ts_data->max_freq);
> >+ if (clk_rate< bg_ptr->pdata->sensors[0].ts_data->min_freq ||
> >+ clk_rate == 0xffffffff) {
> >+ ret = -ENODEV;
> >+ goto put_clks;
> >+ }
> >+
> >+ ret = clk_set_rate(bg_ptr->div_clk, clk_rate);
> >+ if (ret) {
> >+ dev_err(&pdev->dev, "Cannot set clock rate\n");
> >+ goto put_clks;
> >+ }
> >+
> >+ bg_ptr->clk_rate = clk_rate;
> >+ clk_enable(bg_ptr->fclock);
> >+
> >+ mutex_init(&bg_ptr->bg_mutex);
> >+ bg_ptr->dev =&pdev->dev;
> >+ platform_set_drvdata(pdev, bg_ptr);
> >+
> >+ /* 1 clk cycle */
>
> What does that mean exactly?
That's indeed a good question. I guess by default we configure the bandgap to
wait only 1 cycle before it goes to the next read round, if in continuous mode.
That should get overwritten when we have, for instance, some policy initialized
and changing the update rate based on the temperature level that the sensor is.
These decisions would go under omapXX-thermal.c, BTW. Check my reply on your
suggestion for data structure split.
>
> Regards,
> Benoit
>
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
> >+ configure_temp_sensor_counter(bg_ptr, i, 1);
> >+
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_data *ts_data;
> >+
> >+ ts_data = bg_ptr->pdata->sensors[i].ts_data;
> >+
> >+ temp_sensor_init_talert_thresholds(bg_ptr, i,
> >+ ts_data->t_hot,
> >+ ts_data->t_cold);
> >+ temp_sensor_configure_tshut_hot(bg_ptr, i,
> >+ ts_data->tshut_hot);
> >+ temp_sensor_configure_tshut_cold(bg_ptr, i,
> >+ ts_data->tshut_cold);
> >+ }
> >+
> >+ enable_continuous_mode(bg_ptr);
> >+
> >+ /* Set .250 seconds time as default counter */
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
> >+ configure_temp_sensor_counter(bg_ptr, i,
> >+ bg_ptr->clk_rate / 4);
> >+
> >+ /* Every thing is good? Then expose the sensors */
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ char *domain;
> >+
> >+ domain = bg_ptr->pdata->sensors[i].domain;
> >+ if (bg_ptr->pdata->expose_sensor)
> >+ bg_ptr->pdata->expose_sensor(bg_ptr, i, domain);
> >+ }
> >+
> >+ return 0;
> >+
> >+put_clks:
> >+ clk_disable(bg_ptr->fclock);
> >+ clk_put(bg_ptr->fclock);
> >+ clk_put(bg_ptr->div_clk);
> >+free_irqs:
> >+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
> >+ gpio_free(bg_ptr->tshut_gpio);
> >+free_talert:
> >+ free_irq(bg_ptr->irq, bg_ptr);
> >+
> >+ return ret;
> >+}
> >+
> >+static
> >+int __devexit omap_bandgap_remove(struct platform_device *pdev)
> >+{
> >+ struct omap_bandgap *bg_ptr = platform_get_drvdata(pdev);
> >+
> >+ clk_disable(bg_ptr->fclock);
> >+ clk_put(bg_ptr->fclock);
> >+ clk_put(bg_ptr->div_clk);
> >+ free_irq(bg_ptr->irq, bg_ptr);
> >+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
> >+ gpio_free(bg_ptr->tshut_gpio);
> >+
> >+ return 0;
> >+}
> >+
> >+#ifdef CONFIG_PM
> >+static int omap_bandgap_save_ctxt(struct omap_bandgap *bg_ptr)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ int err = 0;
> >+ int i;
> >+
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_registers *tsr;
> >+ struct temp_sensor_regval *rval;
> >+
> >+ rval = bg_ptr->pdata->sensors[i].regval;
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+
> >+ err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,
> >+ &rval->bg_mode_ctrl);
> >+ err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,
> >+ &rval->bg_ctrl);
> >+ err |= omap_control_readl(cdev, tsr->bgap_counter,
> >+ &rval->bg_counter);
> >+ err |= omap_control_readl(cdev, tsr->bgap_threshold,
> >+ &rval->bg_threshold);
> >+ err |= omap_control_readl(cdev, tsr->tshut_threshold,
> >+ &rval->tshut_threshold);
> >+
> >+ if (err)
> >+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> >+ }
> >+
> >+ return err ? -EIO : 0;
> >+}
> >+
> >+static int
> >+omap_bandgap_force_single_read(struct omap_bandgap *bg_ptr, int id)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 temp = 0, counter = 1000;
> >+ int err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ /* Select single conversion mode */
> >+ err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,&temp);
> >+ temp&= ~(1<< __ffs(tsr->mode_ctrl_mask));
> >+ omap_control_writel(cdev, temp, tsr->bgap_mode_ctrl);
> >+
> >+ /* Start of Conversion = 1 */
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp |= 1<< __ffs(tsr->bgap_soc_mask);
> >+ omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> >+ /* Wait until DTEMP is updated */
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= (tsr->bgap_dtemp_mask);
> >+ while ((temp == 0)&& --counter) {
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= (tsr->bgap_dtemp_mask);
> >+ }
> >+ /* Start of Conversion = 0 */
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= ~(1<< __ffs(tsr->bgap_soc_mask));
> >+ err |= omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> >+
> >+ return err ? -EIO : 0;
> >+}
> >+
> >+static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ int i, err = 0;
> >+ u32 temp = 0;
> >+
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_registers *tsr;
> >+ struct temp_sensor_regval *rval;
> >+ u32 val;
> >+
> >+ rval = bg_ptr->pdata->sensors[i].regval;
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+
> >+ err = omap_control_readl(cdev, tsr->bgap_counter,&val);
> >+ if (val == 0) {
> >+ err |= omap_control_writel(cdev, rval->bg_threshold,
> >+ tsr->bgap_threshold);
> >+ err |= omap_control_writel(cdev, rval->tshut_threshold,
> >+ tsr->tshut_threshold);
> >+ /* Force immediate temperature measurement and update
> >+ * of the DTEMP field
> >+ */
> >+ omap_bandgap_force_single_read(bg_ptr, i);
> >+ err |= omap_control_writel(cdev, rval->bg_counter,
> >+ tsr->bgap_counter);
> >+ err |= omap_control_writel(cdev, rval->bg_mode_ctrl,
> >+ tsr->bgap_mode_ctrl);
> >+ err |= omap_control_writel(cdev, rval->bg_ctrl,
> >+ tsr->bgap_mask_ctrl);
> >+ } else {
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,
> >+ &temp);
> >+ temp&= (tsr->bgap_dtemp_mask);
> >+ if (temp == 0) {
> >+ omap_bandgap_force_single_read(bg_ptr, i);
> >+ err |= omap_control_readl(cdev,
> >+ tsr->bgap_mask_ctrl,
> >+ &temp);
> >+ temp |= 1<< __ffs(tsr->mode_ctrl_mask);
> >+ err |= omap_control_writel(cdev, temp,
> >+ tsr->bgap_mask_ctrl);
> >+ }
> >+ }
> >+ if (err)
> >+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> >+ }
> >+
> >+ return err ? -EIO : 0;
> >+}
> >+
> >+static int omap_bandgap_suspend(struct device *dev)
> >+{
> >+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
> >+ int err;
> >+
> >+ err = omap_bandgap_save_ctxt(bg_ptr);
> >+ clk_disable(bg_ptr->fclock);
> >+
> >+ return err;
> >+}
> >+
> >+static int omap_bandgap_resume(struct device *dev)
> >+{
> >+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
> >+
> >+ clk_enable(bg_ptr->fclock);
> >+
> >+ return omap_bandgap_restore_ctxt(bg_ptr);
> >+}
> >+static const struct dev_pm_ops omap_bandgap_dev_pm_ops = {
> >+ SET_SYSTEM_SLEEP_PM_OPS(omap_bandgap_suspend,
> >+ omap_bandgap_resume)
> >+};
> >+
> >+#define DEV_PM_OPS (&omap_bandgap_dev_pm_ops)
> >+#else
> >+#define DEV_PM_OPS NULL
> >+#endif
> >+
> >+static struct platform_driver omap_bandgap_sensor_driver = {
> >+ .probe = omap_bandgap_probe,
> >+ .remove = omap_bandgap_remove,
> >+ .driver = {
> >+ .name = "omap-bandgap",
> >+ .pm = DEV_PM_OPS,
> >+ .of_match_table = of_omap_bandgap_match,
> >+ },
> >+};
> >+
> >+module_platform_driver(omap_bandgap_sensor_driver);
> >+early_platform_init("early_omap_temperature",&omap_bandgap_sensor_driver);
> >+
> >+MODULE_DESCRIPTION("OMAP4+ bandgap temperature sensor driver");
> >+MODULE_LICENSE("GPL v2");
> >+MODULE_ALIAS("platform:omap-bandgap");
> >+MODULE_AUTHOR("Texas Instrument Inc.");
> >diff --git a/drivers/thermal/omap-bandgap.h b/drivers/thermal/omap-bandgap.h
> >new file mode 100644
> >index 0000000..12e0d6b
> >--- /dev/null
> >+++ b/drivers/thermal/omap-bandgap.h
> >@@ -0,0 +1,63 @@
> >+/*
> >+ * OMAP4 Bandgap temperature sensor driver
> >+ *
> >+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
> >+ * Contact:
> >+ * Eduardo Valentin<eduardo.valentin@ti.com>
> >+ *
> >+ * This program is free software; you can redistribute it and/or
> >+ * modify it under the terms of the GNU General Public License
> >+ * version 2 as published by the Free Software Foundation.
> >+ *
> >+ * This program is distributed in the hope that it will be useful, but
> >+ * WITHOUT ANY WARRANTY; without even the implied warranty of
> >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> >+ * General Public License for more details.
> >+ *
> >+ * You should have received a copy of the GNU General Public License
> >+ * along with this program; if not, write to the Free Software
> >+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
> >+ * 02110-1301 USA
> >+ *
> >+ */
> >+#ifndef __OMAP_BANDGAP_H
> >+#define __OMAP_BANDGAP_H
> >+
> >+struct omap_bandgap_data;
> >+
> >+/**
> >+ * struct omap_bandgap - bandgap device structure
> >+ * @dev: device pointer
> >+ * @pdata: platform data with sensor data
> >+ * @fclock: pointer to functional clock of temperature sensor
> >+ * @div_clk: pointer to parent clock of temperature sensor fclk
> >+ * @conv_table: Pointer to adc to temperature conversion table
> >+ * @bg_mutex: Mutex for sysfs, irq and PM
> >+ * @irq: MPU Irq number for thermal alert
> >+ * @tshut_gpio: GPIO where Tshut signal is routed
> >+ * @clk_rate: Holds current clock rate
> >+ */
> >+struct omap_bandgap {
> >+ struct device *dev;
> >+ const struct omap_bandgap_data *pdata;
> >+ struct clk *fclock;
> >+ struct clk *div_clk;
> >+ const int *conv_table;
> >+ struct mutex bg_mutex; /* Mutex for irq and PM */
> >+ int irq;
> >+ int tshut_gpio;
> >+ u32 clk_rate;
> >+};
> >+
> >+int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id, int *thot);
> >+int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val);
> >+int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id, int *tcold);
> >+int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val);
> >+int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
> >+ int *interval);
> >+int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr, int id,
> >+ u32 interval);
> >+int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
> >+ int *temperature);
> >+
> >+#endif
>
---
Eduardo
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
@ 2012-05-28 11:16 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 11:16 UTC (permalink / raw)
To: linux-arm-kernel
Hello again,
On Fri, May 25, 2012 at 05:49:44PM +0200, Cousson Benoit wrote:
> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
<big cut>
> >+
> >+static const struct omap_bandgap_data omap4460_data = {
> >+ .has_talert = true,
> >+ .has_tshut = true,
> >+ .fclock_name = "bandgap_ts_fclk",
> >+ .div_ck_name = "div_ts_ck",
>
> None of these clock data should be there ideally. You should ensure
> that the proper device alias will be there using clkdev entries.
In fact, it is a shame that it would be needed to have this entries there :-(
>
> Except that with DT, it will not work without the clock DT binding :-(
>
> I think Rob posted a latest update based on CCF... but for the
> moment we are stuck :-(
OK. But would it work for BG as well as it seams to be a special case?
>
> >+ .conv_table = omap4460_adc_to_temp,
> >+ .sensors = {
> >+ {
> >+ .registers =&omap4460_mpu_temp_sensor_registers,
> >+ .ts_data =&omap4460_mpu_temp_sensor_data,
> >+ .domain = "cpu",
> >+ },
> >+ },
> >+ .sensor_count = 1,
> >+};
> >+
> >+static const struct omap_bandgap_data omap5430_data = {
> >+ .has_talert = true,
> >+ .has_tshut = true,
> >+ .fclock_name = "ts_clk_div_ck",
> >+ .div_ck_name = "ts_clk_div_ck",
> >+ .conv_table = omap5430_adc_to_temp,
> >+ .sensors = {
> >+ {
> >+ .registers =&omap5430_mpu_temp_sensor_registers,
> >+ .ts_data =&omap5430_mpu_temp_sensor_data,
> >+ .domain = "cpu",
> >+ },
> >+ {
> >+ .registers =&omap5430_gpu_temp_sensor_registers,
> >+ .ts_data =&omap5430_gpu_temp_sensor_data,
> >+ .domain = "gpu",
> >+ },
> >+ {
> >+ .registers =&omap5430_core_temp_sensor_registers,
> >+ .ts_data =&omap5430_core_temp_sensor_data,
> >+ .domain = "core",
> >+ },
> >+ },
> >+ .sensor_count = 3,
>
> It can probably be replaced by a sizeof.
ARRAY_SIZE prob, will check.
>
> >+};
> >+
> >+static const struct of_device_id of_omap_bandgap_match[] = {
> >+ /*
> >+ * TODO: Add support to 4430
> >+ * { .compatible = "ti,omap4430-bandgap", .data = , },
> >+ */
> >+ {
> >+ .compatible = "ti,omap4460-bandgap",
> >+ .data = (void *)&omap4460_data,
>
> No need to cast toward a void *.
In this case, there is a need, because the omap4460_data is const but the .data field isn't. So I need to force it.
>
> >+ },
> >+ {
> >+ .compatible = "ti,omap5430-bandgap",
> >+ .data = (void *)&omap5430_data,
> >+ },
> >+ /* Sentinel */
> >+ { },
> >+};
> >+
> >+static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
> >+{
> >+ struct device_node *node = pdev->dev.of_node;
> >+ const struct of_device_id *of_id;
> >+ struct omap_bandgap *bg_ptr;
>
> bg_ptr is not a super name.
Got a better name? Just don't want a long one to avoid code bending at 80th column...
>
> >+ u32 prop;
> >+
> >+ /* just for the sake */
> >+ if (!node) {
> >+ dev_err(&pdev->dev, "no platform information available\n");
> >+ return ERR_PTR(-EINVAL);
> >+ }
>
> Not needed, just do the of_match_device here directly.
Indeed...
>
> >+
> >+ bg_ptr = devm_kzalloc(&pdev->dev, sizeof(struct omap_bandgap),
> >+ GFP_KERNEL);
> >+ if (!bg_ptr) {
> >+ dev_err(&pdev->dev, "Unable to allocate mem for driver ref\n");
> >+ return ERR_PTR(-ENOMEM);
> >+ }
> >+
> >+ of_id = of_match_device(of_omap_bandgap_match,&pdev->dev);
> >+ if (of_id)
> >+ bg_ptr->pdata = of_id->data;
>
> Nit: This is not really pdata anymore, so you should maybe remove
> the "p" to avoid confusion.
OK...
>
> >+
> >+ if (bg_ptr->pdata->has_tshut) {
> >+ if (of_property_read_u32(node, "ti,tshut-gpio",&prop)< 0) {
> >+ dev_err(&pdev->dev, "missing tshut gpio in device tree\n");
> >+ return ERR_PTR(-EINVAL);
> >+ }
> >+ bg_ptr->tshut_gpio = prop;
> >+ if (!gpio_is_valid(bg_ptr->tshut_gpio)) {
> >+ dev_err(&pdev->dev, "invalid gpio for tshut (%d)\n",
> >+ bg_ptr->tshut_gpio);
> >+ return ERR_PTR(-EINVAL);
> >+ }
> >+ }
> >+
> >+ return bg_ptr;
> >+}
> >+
> >+static
> >+int __devinit omap_bandgap_probe(struct platform_device *pdev)
> >+{
> >+ struct device *cdev = pdev->dev.parent;
> >+ struct omap_bandgap *bg_ptr;
> >+ int clk_rate, ret = 0, i;
> >+
> >+ if (!cdev) {
> >+ dev_err(&pdev->dev, "no omap control ref in our parent\n");
> >+ return -EINVAL;
> >+ }
> >+
> >+ bg_ptr = omap_bandgap_build(pdev);
> >+ if (IS_ERR_OR_NULL(bg_ptr)) {
> >+ dev_err(&pdev->dev, "failed to fetch platform data\n");
> >+ return PTR_ERR(bg_ptr);
> >+ }
> >+
> >+ if (bg_ptr->pdata->has_talert) {
>
> Nit2: Yeah, in fact instead of pdata, "conf" or "settings" seems to
> be more representative of what this structure really contain.
conf looks good to me.
>
> >+ ret = omap_bandgap_talert_init(bg_ptr, pdev);
> >+ if (ret) {
> >+ dev_err(&pdev->dev, "failed to initialize Talert IRQ\n");
> >+ return ret;
> >+ }
> >+ }
> >+
> >+ if (bg_ptr->pdata->has_tshut) {
> >+ ret = omap_bandgap_tshut_init(bg_ptr, pdev);
> >+ if (ret) {
> >+ dev_err(&pdev->dev,
> >+ "failed to initialize system tshut IRQ\n");
> >+ goto free_talert;
> >+ }
> >+ }
> >+
> >+ bg_ptr->fclock = clk_get(NULL, bg_ptr->pdata->fclock_name);
>
> That's not good to get a clock without using the local dev alias.
> But because of lack of clock DT binding yet, I'm not sure we have
> the choice.
In fact I didn't touch the clk data on purpose and left the clock handling
as is. On my side I didn't know how the clock struct would look like with DT,
so, I didn't mess with it.
Do you have a reference to check the work in progress for clock DT ?
>
> >+ ret = IS_ERR_OR_NULL(bg_ptr->fclock);
> >+ if (ret) {
> >+ dev_err(&pdev->dev, "failed to request fclock reference\n");
> >+ goto free_irqs;
> >+ }
> >+
> >+ bg_ptr->div_clk = clk_get(NULL, bg_ptr->pdata->div_ck_name);
> >+ ret = IS_ERR_OR_NULL(bg_ptr->div_clk);
> >+ if (ret) {
> >+ dev_err(&pdev->dev,
> >+ "failed to request div_ts_ck clock ref\n");
> >+ goto free_irqs;
> >+ }
> >+
> >+ bg_ptr->conv_table = bg_ptr->pdata->conv_table;
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_registers *tsr;
> >+ u32 val;
> >+
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+ /*
> >+ * check if the efuse has a non-zero value if not
> >+ * it is an untrimmed sample and the temperatures
> >+ * may not be accurate
> >+ */
> >+ ret = omap_control_readl(cdev, tsr->bgap_efuse,&val);
> >+ if (ret || !val)
> >+ dev_info(&pdev->dev,
> >+ "Non-trimmed BGAP, Temp not accurate\n");
> >+ }
> >+
> >+ clk_rate = clk_round_rate(bg_ptr->div_clk,
> >+ bg_ptr->pdata->sensors[0].ts_data->max_freq);
> >+ if (clk_rate< bg_ptr->pdata->sensors[0].ts_data->min_freq ||
> >+ clk_rate == 0xffffffff) {
> >+ ret = -ENODEV;
> >+ goto put_clks;
> >+ }
> >+
> >+ ret = clk_set_rate(bg_ptr->div_clk, clk_rate);
> >+ if (ret) {
> >+ dev_err(&pdev->dev, "Cannot set clock rate\n");
> >+ goto put_clks;
> >+ }
> >+
> >+ bg_ptr->clk_rate = clk_rate;
> >+ clk_enable(bg_ptr->fclock);
> >+
> >+ mutex_init(&bg_ptr->bg_mutex);
> >+ bg_ptr->dev =&pdev->dev;
> >+ platform_set_drvdata(pdev, bg_ptr);
> >+
> >+ /* 1 clk cycle */
>
> What does that mean exactly?
That's indeed a good question. I guess by default we configure the bandgap to
wait only 1 cycle before it goes to the next read round, if in continuous mode.
That should get overwritten when we have, for instance, some policy initialized
and changing the update rate based on the temperature level that the sensor is.
These decisions would go under omapXX-thermal.c, BTW. Check my reply on your
suggestion for data structure split.
>
> Regards,
> Benoit
>
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
> >+ configure_temp_sensor_counter(bg_ptr, i, 1);
> >+
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_data *ts_data;
> >+
> >+ ts_data = bg_ptr->pdata->sensors[i].ts_data;
> >+
> >+ temp_sensor_init_talert_thresholds(bg_ptr, i,
> >+ ts_data->t_hot,
> >+ ts_data->t_cold);
> >+ temp_sensor_configure_tshut_hot(bg_ptr, i,
> >+ ts_data->tshut_hot);
> >+ temp_sensor_configure_tshut_cold(bg_ptr, i,
> >+ ts_data->tshut_cold);
> >+ }
> >+
> >+ enable_continuous_mode(bg_ptr);
> >+
> >+ /* Set .250 seconds time as default counter */
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
> >+ configure_temp_sensor_counter(bg_ptr, i,
> >+ bg_ptr->clk_rate / 4);
> >+
> >+ /* Every thing is good? Then expose the sensors */
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ char *domain;
> >+
> >+ domain = bg_ptr->pdata->sensors[i].domain;
> >+ if (bg_ptr->pdata->expose_sensor)
> >+ bg_ptr->pdata->expose_sensor(bg_ptr, i, domain);
> >+ }
> >+
> >+ return 0;
> >+
> >+put_clks:
> >+ clk_disable(bg_ptr->fclock);
> >+ clk_put(bg_ptr->fclock);
> >+ clk_put(bg_ptr->div_clk);
> >+free_irqs:
> >+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
> >+ gpio_free(bg_ptr->tshut_gpio);
> >+free_talert:
> >+ free_irq(bg_ptr->irq, bg_ptr);
> >+
> >+ return ret;
> >+}
> >+
> >+static
> >+int __devexit omap_bandgap_remove(struct platform_device *pdev)
> >+{
> >+ struct omap_bandgap *bg_ptr = platform_get_drvdata(pdev);
> >+
> >+ clk_disable(bg_ptr->fclock);
> >+ clk_put(bg_ptr->fclock);
> >+ clk_put(bg_ptr->div_clk);
> >+ free_irq(bg_ptr->irq, bg_ptr);
> >+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
> >+ gpio_free(bg_ptr->tshut_gpio);
> >+
> >+ return 0;
> >+}
> >+
> >+#ifdef CONFIG_PM
> >+static int omap_bandgap_save_ctxt(struct omap_bandgap *bg_ptr)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ int err = 0;
> >+ int i;
> >+
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_registers *tsr;
> >+ struct temp_sensor_regval *rval;
> >+
> >+ rval = bg_ptr->pdata->sensors[i].regval;
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+
> >+ err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,
> >+ &rval->bg_mode_ctrl);
> >+ err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,
> >+ &rval->bg_ctrl);
> >+ err |= omap_control_readl(cdev, tsr->bgap_counter,
> >+ &rval->bg_counter);
> >+ err |= omap_control_readl(cdev, tsr->bgap_threshold,
> >+ &rval->bg_threshold);
> >+ err |= omap_control_readl(cdev, tsr->tshut_threshold,
> >+ &rval->tshut_threshold);
> >+
> >+ if (err)
> >+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> >+ }
> >+
> >+ return err ? -EIO : 0;
> >+}
> >+
> >+static int
> >+omap_bandgap_force_single_read(struct omap_bandgap *bg_ptr, int id)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ struct temp_sensor_registers *tsr;
> >+ u32 temp = 0, counter = 1000;
> >+ int err;
> >+
> >+ tsr = bg_ptr->pdata->sensors[id].registers;
> >+ /* Select single conversion mode */
> >+ err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,&temp);
> >+ temp&= ~(1<< __ffs(tsr->mode_ctrl_mask));
> >+ omap_control_writel(cdev, temp, tsr->bgap_mode_ctrl);
> >+
> >+ /* Start of Conversion = 1 */
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp |= 1<< __ffs(tsr->bgap_soc_mask);
> >+ omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> >+ /* Wait until DTEMP is updated */
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= (tsr->bgap_dtemp_mask);
> >+ while ((temp == 0)&& --counter) {
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= (tsr->bgap_dtemp_mask);
> >+ }
> >+ /* Start of Conversion = 0 */
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
> >+ temp&= ~(1<< __ffs(tsr->bgap_soc_mask));
> >+ err |= omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
> >+
> >+ return err ? -EIO : 0;
> >+}
> >+
> >+static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr)
> >+{
> >+ struct device *cdev = bg_ptr->dev->parent;
> >+ int i, err = 0;
> >+ u32 temp = 0;
> >+
> >+ for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
> >+ struct temp_sensor_registers *tsr;
> >+ struct temp_sensor_regval *rval;
> >+ u32 val;
> >+
> >+ rval = bg_ptr->pdata->sensors[i].regval;
> >+ tsr = bg_ptr->pdata->sensors[i].registers;
> >+
> >+ err = omap_control_readl(cdev, tsr->bgap_counter,&val);
> >+ if (val == 0) {
> >+ err |= omap_control_writel(cdev, rval->bg_threshold,
> >+ tsr->bgap_threshold);
> >+ err |= omap_control_writel(cdev, rval->tshut_threshold,
> >+ tsr->tshut_threshold);
> >+ /* Force immediate temperature measurement and update
> >+ * of the DTEMP field
> >+ */
> >+ omap_bandgap_force_single_read(bg_ptr, i);
> >+ err |= omap_control_writel(cdev, rval->bg_counter,
> >+ tsr->bgap_counter);
> >+ err |= omap_control_writel(cdev, rval->bg_mode_ctrl,
> >+ tsr->bgap_mode_ctrl);
> >+ err |= omap_control_writel(cdev, rval->bg_ctrl,
> >+ tsr->bgap_mask_ctrl);
> >+ } else {
> >+ err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,
> >+ &temp);
> >+ temp&= (tsr->bgap_dtemp_mask);
> >+ if (temp == 0) {
> >+ omap_bandgap_force_single_read(bg_ptr, i);
> >+ err |= omap_control_readl(cdev,
> >+ tsr->bgap_mask_ctrl,
> >+ &temp);
> >+ temp |= 1<< __ffs(tsr->mode_ctrl_mask);
> >+ err |= omap_control_writel(cdev, temp,
> >+ tsr->bgap_mask_ctrl);
> >+ }
> >+ }
> >+ if (err)
> >+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
> >+ }
> >+
> >+ return err ? -EIO : 0;
> >+}
> >+
> >+static int omap_bandgap_suspend(struct device *dev)
> >+{
> >+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
> >+ int err;
> >+
> >+ err = omap_bandgap_save_ctxt(bg_ptr);
> >+ clk_disable(bg_ptr->fclock);
> >+
> >+ return err;
> >+}
> >+
> >+static int omap_bandgap_resume(struct device *dev)
> >+{
> >+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
> >+
> >+ clk_enable(bg_ptr->fclock);
> >+
> >+ return omap_bandgap_restore_ctxt(bg_ptr);
> >+}
> >+static const struct dev_pm_ops omap_bandgap_dev_pm_ops = {
> >+ SET_SYSTEM_SLEEP_PM_OPS(omap_bandgap_suspend,
> >+ omap_bandgap_resume)
> >+};
> >+
> >+#define DEV_PM_OPS (&omap_bandgap_dev_pm_ops)
> >+#else
> >+#define DEV_PM_OPS NULL
> >+#endif
> >+
> >+static struct platform_driver omap_bandgap_sensor_driver = {
> >+ .probe = omap_bandgap_probe,
> >+ .remove = omap_bandgap_remove,
> >+ .driver = {
> >+ .name = "omap-bandgap",
> >+ .pm = DEV_PM_OPS,
> >+ .of_match_table = of_omap_bandgap_match,
> >+ },
> >+};
> >+
> >+module_platform_driver(omap_bandgap_sensor_driver);
> >+early_platform_init("early_omap_temperature",&omap_bandgap_sensor_driver);
> >+
> >+MODULE_DESCRIPTION("OMAP4+ bandgap temperature sensor driver");
> >+MODULE_LICENSE("GPL v2");
> >+MODULE_ALIAS("platform:omap-bandgap");
> >+MODULE_AUTHOR("Texas Instrument Inc.");
> >diff --git a/drivers/thermal/omap-bandgap.h b/drivers/thermal/omap-bandgap.h
> >new file mode 100644
> >index 0000000..12e0d6b
> >--- /dev/null
> >+++ b/drivers/thermal/omap-bandgap.h
> >@@ -0,0 +1,63 @@
> >+/*
> >+ * OMAP4 Bandgap temperature sensor driver
> >+ *
> >+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
> >+ * Contact:
> >+ * Eduardo Valentin<eduardo.valentin@ti.com>
> >+ *
> >+ * This program is free software; you can redistribute it and/or
> >+ * modify it under the terms of the GNU General Public License
> >+ * version 2 as published by the Free Software Foundation.
> >+ *
> >+ * This program is distributed in the hope that it will be useful, but
> >+ * WITHOUT ANY WARRANTY; without even the implied warranty of
> >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> >+ * General Public License for more details.
> >+ *
> >+ * You should have received a copy of the GNU General Public License
> >+ * along with this program; if not, write to the Free Software
> >+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
> >+ * 02110-1301 USA
> >+ *
> >+ */
> >+#ifndef __OMAP_BANDGAP_H
> >+#define __OMAP_BANDGAP_H
> >+
> >+struct omap_bandgap_data;
> >+
> >+/**
> >+ * struct omap_bandgap - bandgap device structure
> >+ * @dev: device pointer
> >+ * @pdata: platform data with sensor data
> >+ * @fclock: pointer to functional clock of temperature sensor
> >+ * @div_clk: pointer to parent clock of temperature sensor fclk
> >+ * @conv_table: Pointer to adc to temperature conversion table
> >+ * @bg_mutex: Mutex for sysfs, irq and PM
> >+ * @irq: MPU Irq number for thermal alert
> >+ * @tshut_gpio: GPIO where Tshut signal is routed
> >+ * @clk_rate: Holds current clock rate
> >+ */
> >+struct omap_bandgap {
> >+ struct device *dev;
> >+ const struct omap_bandgap_data *pdata;
> >+ struct clk *fclock;
> >+ struct clk *div_clk;
> >+ const int *conv_table;
> >+ struct mutex bg_mutex; /* Mutex for irq and PM */
> >+ int irq;
> >+ int tshut_gpio;
> >+ u32 clk_rate;
> >+};
> >+
> >+int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id, int *thot);
> >+int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val);
> >+int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id, int *tcold);
> >+int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val);
> >+int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
> >+ int *interval);
> >+int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr, int id,
> >+ u32 interval);
> >+int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
> >+ int *temperature);
> >+
> >+#endif
>
---
Eduardo
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 08/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields
2012-05-25 15:13 ` Cousson, Benoit
@ 2012-05-28 11:17 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 11:17 UTC (permalink / raw)
To: Cousson, Benoit
Cc: amit.kucheria, kbaidarov, kishon, balbi, Keerthy, linux-pm,
linux-omap, linux-arm-kernel
On Fri, May 25, 2012 at 05:13:26PM +0200, Cousson Benoit wrote:
> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> >OMAP4460 specific temperature sensor register bit fields are added.
> >Existing OMAP4 entries are renamed to OMAP4430.
> >
> >Signed-off-by: Keerthy<j-keerthy@ti.com>
> >Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> >---
> > arch/arm/mach-omap2/include/mach/control.h | 116 ++++++++++++++++++++++++++++
>
> Now that we do have a dedicated driver for the bandgap, I guess it
> will be better to put these defines inside the driver directly.
Agreed
>
> Benoit
>
> > 1 files changed, 116 insertions(+), 0 deletions(-)
> >
> >diff --git a/arch/arm/mach-omap2/include/mach/control.h b/arch/arm/mach-omap2/include/mach/control.h
> >index cf42764..171b504 100644
> >--- a/arch/arm/mach-omap2/include/mach/control.h
> >+++ b/arch/arm/mach-omap2/include/mach/control.h
> >@@ -230,6 +230,122 @@
> > /* OMAP44xx control McBSP padconf */
> > #define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
> >
> >+/* TEMP_SENSOR OMAP4430 */
> >+#define OMAP4430_BGAP_TEMPSOFF_SHIFT 12
> >+#define OMAP4430_BGAP_TEMPSOFF_MASK (1<< 12)
> >+#define OMAP4430_BGAP_TSHUT_SHIFT 11
> >+#define OMAP4430_BGAP_TSHUT_MASK (1<< 11)
> >+#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10
> >+#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_MASK (1<< 10)
> >+#define OMAP4430_BGAP_TEMP_SENSOR_SOC_SHIFT 9
> >+#define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK (1<< 9)
> >+#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8
> >+#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK (1<< 8)
> >+#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> >+#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff<< 0)
> >+
> >+/* TEMP_SENSOR OMAP4460 */
> >+#define OMAP4460_BGAP_TEMPSOFF_SHIFT 13
> >+#define OMAP4460_BGAP_TEMPSOFF_MASK (1<< 13)
> >+#define OMAP4460_BGAP_TEMP_SENSOR_SOC_SHIFT 11
> >+#define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK (1<< 11)
> >+#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
> >+#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK (1<< 10)
> >+#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> >+#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff<< 0)
> >+
> >+/* BANDGAP_CTRL */
> >+#define OMAP4460_SINGLE_MODE_SHIFT 31
> >+#define OMAP4460_SINGLE_MODE_MASK (1<< 31)
> >+#define OMAP4460_MASK_HOT_SHIFT 1
> >+#define OMAP4460_MASK_HOT_MASK (1<< 1)
> >+#define OMAP4460_MASK_COLD_SHIFT 0
> >+#define OMAP4460_MASK_COLD_MASK (1<< 0)
> >+
> >+/* BANDGAP_COUNTER */
> >+#define OMAP4460_COUNTER_SHIFT 0
> >+#define OMAP4460_COUNTER_MASK (0xffffff<< 0)
> >+
> >+/* BANDGAP_THRESHOLD */
> >+#define OMAP4460_T_HOT_SHIFT 16
> >+#define OMAP4460_T_HOT_MASK (0x3ff<< 16)
> >+#define OMAP4460_T_COLD_SHIFT 0
> >+#define OMAP4460_T_COLD_MASK (0x3ff<< 0)
> >+
> >+/* TSHUT_THRESHOLD */
> >+#define OMAP4460_TSHUT_HOT_SHIFT 16
> >+#define OMAP4460_TSHUT_HOT_MASK (0x3ff<< 16)
> >+#define OMAP4460_TSHUT_COLD_SHIFT 0
> >+#define OMAP4460_TSHUT_COLD_MASK (0x3ff<< 0)
> >+
> >+/* BANDGAP_STATUS */
> >+#define OMAP4460_CLEAN_STOP_SHIFT 3
> >+#define OMAP4460_CLEAN_STOP_MASK (1<< 3)
> >+#define OMAP4460_BGAP_ALERT_SHIFT 2
> >+#define OMAP4460_BGAP_ALERT_MASK (1<< 2)
> >+#define OMAP4460_HOT_FLAG_SHIFT 1
> >+#define OMAP4460_HOT_FLAG_MASK (1<< 1)
> >+#define OMAP4460_COLD_FLAG_SHIFT 0
> >+#define OMAP4460_COLD_FLAG_MASK (1<< 0)
> >+
> >+/* TEMP_SENSOR OMAP5430 */
> >+#define OMAP5430_BGAP_TEMP_SENSOR_SOC_SHIFT 12
> >+#define OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK (1<< 12)
> >+#define OMAP5430_BGAP_TEMPSOFF_SHIFT 11
> >+#define OMAP5430_BGAP_TEMPSOFF_MASK (1<< 11)
> >+#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
> >+#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK (1<< 10)
> >+#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> >+#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff<< 0)
> >+
> >+/* BANDGAP_CTRL */
> >+#define OMAP5430_MASK_HOT_CORE_SHIFT 5
> >+#define OMAP5430_MASK_HOT_CORE_MASK (1<< 5)
> >+#define OMAP5430_MASK_COLD_CORE_SHIFT 4
> >+#define OMAP5430_MASK_COLD_CORE_MASK (1<< 4)
> >+#define OMAP5430_MASK_HOT_MM_SHIFT 3
> >+#define OMAP5430_MASK_HOT_MM_MASK (1<< 3)
> >+#define OMAP5430_MASK_COLD_MM_SHIFT 2
> >+#define OMAP5430_MASK_COLD_MM_MASK (1<< 2)
> >+#define OMAP5430_MASK_HOT_MPU_SHIFT 1
> >+#define OMAP5430_MASK_HOT_MPU_MASK (1<< 1)
> >+#define OMAP5430_MASK_COLD_MPU_SHIFT 0
> >+#define OMAP5430_MASK_COLD_MPU_MASK (1<< 0)
> >+
> >+/* BANDGAP_COUNTER */
> >+#define OMAP5430_REPEAT_MODE_SHIFT 31
> >+#define OMAP5430_REPEAT_MODE_MASK (1<< 31)
> >+#define OMAP5430_COUNTER_SHIFT 0
> >+#define OMAP5430_COUNTER_MASK (0xffffff<< 0)
> >+
> >+/* BANDGAP_THRESHOLD */
> >+#define OMAP5430_T_HOT_SHIFT 16
> >+#define OMAP5430_T_HOT_MASK (0x3ff<< 16)
> >+#define OMAP5430_T_COLD_SHIFT 0
> >+#define OMAP5430_T_COLD_MASK (0x3ff<< 0)
> >+
> >+/* TSHUT_THRESHOLD */
> >+#define OMAP5430_TSHUT_HOT_SHIFT 16
> >+#define OMAP5430_TSHUT_HOT_MASK (0x3ff<< 16)
> >+#define OMAP5430_TSHUT_COLD_SHIFT 0
> >+#define OMAP5430_TSHUT_COLD_MASK (0x3ff<< 0)
> >+
> >+/* BANDGAP_STATUS */
> >+#define OMAP5430_BGAP_ALERT_SHIFT 31
> >+#define OMAP5430_BGAP_ALERT_MASK (1<< 31)
> >+#define OMAP5430_HOT_CORE_FLAG_SHIFT 5
> >+#define OMAP5430_HOT_CORE_FLAG_MASK (1<< 5)
> >+#define OMAP5430_COLD_CORE_FLAG_SHIFT 4
> >+#define OMAP5430_COLD_CORE_FLAG_MASK (1<< 4)
> >+#define OMAP5430_HOT_MM_FLAG_SHIFT 3
> >+#define OMAP5430_HOT_MM_FLAG_MASK (1<< 3)
> >+#define OMAP5430_COLD_MM_FLAG_SHIFT 2
> >+#define OMAP5430_COLD_MM_FLAG_MASK (1<< 2)
> >+#define OMAP5430_HOT_MPU_FLAG_SHIFT 1
> >+#define OMAP5430_HOT_MPU_FLAG_MASK (1<< 1)
> >+#define OMAP5430_COLD_MPU_FLAG_SHIFT 0
> >+#define OMAP5430_COLD_MPU_FLAG_MASK (1<< 0)
> >+
> > /* AM35XX only CONTROL_GENERAL register offsets */
> > #define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
> > #define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 08/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields
@ 2012-05-28 11:17 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 11:17 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, May 25, 2012 at 05:13:26PM +0200, Cousson Benoit wrote:
> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> >OMAP4460 specific temperature sensor register bit fields are added.
> >Existing OMAP4 entries are renamed to OMAP4430.
> >
> >Signed-off-by: Keerthy<j-keerthy@ti.com>
> >Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> >---
> > arch/arm/mach-omap2/include/mach/control.h | 116 ++++++++++++++++++++++++++++
>
> Now that we do have a dedicated driver for the bandgap, I guess it
> will be better to put these defines inside the driver directly.
Agreed
>
> Benoit
>
> > 1 files changed, 116 insertions(+), 0 deletions(-)
> >
> >diff --git a/arch/arm/mach-omap2/include/mach/control.h b/arch/arm/mach-omap2/include/mach/control.h
> >index cf42764..171b504 100644
> >--- a/arch/arm/mach-omap2/include/mach/control.h
> >+++ b/arch/arm/mach-omap2/include/mach/control.h
> >@@ -230,6 +230,122 @@
> > /* OMAP44xx control McBSP padconf */
> > #define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
> >
> >+/* TEMP_SENSOR OMAP4430 */
> >+#define OMAP4430_BGAP_TEMPSOFF_SHIFT 12
> >+#define OMAP4430_BGAP_TEMPSOFF_MASK (1<< 12)
> >+#define OMAP4430_BGAP_TSHUT_SHIFT 11
> >+#define OMAP4430_BGAP_TSHUT_MASK (1<< 11)
> >+#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10
> >+#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_MASK (1<< 10)
> >+#define OMAP4430_BGAP_TEMP_SENSOR_SOC_SHIFT 9
> >+#define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK (1<< 9)
> >+#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8
> >+#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK (1<< 8)
> >+#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> >+#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff<< 0)
> >+
> >+/* TEMP_SENSOR OMAP4460 */
> >+#define OMAP4460_BGAP_TEMPSOFF_SHIFT 13
> >+#define OMAP4460_BGAP_TEMPSOFF_MASK (1<< 13)
> >+#define OMAP4460_BGAP_TEMP_SENSOR_SOC_SHIFT 11
> >+#define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK (1<< 11)
> >+#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
> >+#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK (1<< 10)
> >+#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> >+#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff<< 0)
> >+
> >+/* BANDGAP_CTRL */
> >+#define OMAP4460_SINGLE_MODE_SHIFT 31
> >+#define OMAP4460_SINGLE_MODE_MASK (1<< 31)
> >+#define OMAP4460_MASK_HOT_SHIFT 1
> >+#define OMAP4460_MASK_HOT_MASK (1<< 1)
> >+#define OMAP4460_MASK_COLD_SHIFT 0
> >+#define OMAP4460_MASK_COLD_MASK (1<< 0)
> >+
> >+/* BANDGAP_COUNTER */
> >+#define OMAP4460_COUNTER_SHIFT 0
> >+#define OMAP4460_COUNTER_MASK (0xffffff<< 0)
> >+
> >+/* BANDGAP_THRESHOLD */
> >+#define OMAP4460_T_HOT_SHIFT 16
> >+#define OMAP4460_T_HOT_MASK (0x3ff<< 16)
> >+#define OMAP4460_T_COLD_SHIFT 0
> >+#define OMAP4460_T_COLD_MASK (0x3ff<< 0)
> >+
> >+/* TSHUT_THRESHOLD */
> >+#define OMAP4460_TSHUT_HOT_SHIFT 16
> >+#define OMAP4460_TSHUT_HOT_MASK (0x3ff<< 16)
> >+#define OMAP4460_TSHUT_COLD_SHIFT 0
> >+#define OMAP4460_TSHUT_COLD_MASK (0x3ff<< 0)
> >+
> >+/* BANDGAP_STATUS */
> >+#define OMAP4460_CLEAN_STOP_SHIFT 3
> >+#define OMAP4460_CLEAN_STOP_MASK (1<< 3)
> >+#define OMAP4460_BGAP_ALERT_SHIFT 2
> >+#define OMAP4460_BGAP_ALERT_MASK (1<< 2)
> >+#define OMAP4460_HOT_FLAG_SHIFT 1
> >+#define OMAP4460_HOT_FLAG_MASK (1<< 1)
> >+#define OMAP4460_COLD_FLAG_SHIFT 0
> >+#define OMAP4460_COLD_FLAG_MASK (1<< 0)
> >+
> >+/* TEMP_SENSOR OMAP5430 */
> >+#define OMAP5430_BGAP_TEMP_SENSOR_SOC_SHIFT 12
> >+#define OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK (1<< 12)
> >+#define OMAP5430_BGAP_TEMPSOFF_SHIFT 11
> >+#define OMAP5430_BGAP_TEMPSOFF_MASK (1<< 11)
> >+#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
> >+#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK (1<< 10)
> >+#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> >+#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff<< 0)
> >+
> >+/* BANDGAP_CTRL */
> >+#define OMAP5430_MASK_HOT_CORE_SHIFT 5
> >+#define OMAP5430_MASK_HOT_CORE_MASK (1<< 5)
> >+#define OMAP5430_MASK_COLD_CORE_SHIFT 4
> >+#define OMAP5430_MASK_COLD_CORE_MASK (1<< 4)
> >+#define OMAP5430_MASK_HOT_MM_SHIFT 3
> >+#define OMAP5430_MASK_HOT_MM_MASK (1<< 3)
> >+#define OMAP5430_MASK_COLD_MM_SHIFT 2
> >+#define OMAP5430_MASK_COLD_MM_MASK (1<< 2)
> >+#define OMAP5430_MASK_HOT_MPU_SHIFT 1
> >+#define OMAP5430_MASK_HOT_MPU_MASK (1<< 1)
> >+#define OMAP5430_MASK_COLD_MPU_SHIFT 0
> >+#define OMAP5430_MASK_COLD_MPU_MASK (1<< 0)
> >+
> >+/* BANDGAP_COUNTER */
> >+#define OMAP5430_REPEAT_MODE_SHIFT 31
> >+#define OMAP5430_REPEAT_MODE_MASK (1<< 31)
> >+#define OMAP5430_COUNTER_SHIFT 0
> >+#define OMAP5430_COUNTER_MASK (0xffffff<< 0)
> >+
> >+/* BANDGAP_THRESHOLD */
> >+#define OMAP5430_T_HOT_SHIFT 16
> >+#define OMAP5430_T_HOT_MASK (0x3ff<< 16)
> >+#define OMAP5430_T_COLD_SHIFT 0
> >+#define OMAP5430_T_COLD_MASK (0x3ff<< 0)
> >+
> >+/* TSHUT_THRESHOLD */
> >+#define OMAP5430_TSHUT_HOT_SHIFT 16
> >+#define OMAP5430_TSHUT_HOT_MASK (0x3ff<< 16)
> >+#define OMAP5430_TSHUT_COLD_SHIFT 0
> >+#define OMAP5430_TSHUT_COLD_MASK (0x3ff<< 0)
> >+
> >+/* BANDGAP_STATUS */
> >+#define OMAP5430_BGAP_ALERT_SHIFT 31
> >+#define OMAP5430_BGAP_ALERT_MASK (1<< 31)
> >+#define OMAP5430_HOT_CORE_FLAG_SHIFT 5
> >+#define OMAP5430_HOT_CORE_FLAG_MASK (1<< 5)
> >+#define OMAP5430_COLD_CORE_FLAG_SHIFT 4
> >+#define OMAP5430_COLD_CORE_FLAG_MASK (1<< 4)
> >+#define OMAP5430_HOT_MM_FLAG_SHIFT 3
> >+#define OMAP5430_HOT_MM_FLAG_MASK (1<< 3)
> >+#define OMAP5430_COLD_MM_FLAG_SHIFT 2
> >+#define OMAP5430_COLD_MM_FLAG_MASK (1<< 2)
> >+#define OMAP5430_HOT_MPU_FLAG_SHIFT 1
> >+#define OMAP5430_HOT_MPU_FLAG_MASK (1<< 1)
> >+#define OMAP5430_COLD_MPU_FLAG_SHIFT 0
> >+#define OMAP5430_COLD_MPU_FLAG_MASK (1<< 0)
> >+
> > /* AM35XX only CONTROL_GENERAL register offsets */
> > #define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
> > #define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 08/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields
2012-05-28 10:04 ` Shilimkar, Santosh
@ 2012-05-28 11:18 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 11:18 UTC (permalink / raw)
To: Shilimkar, Santosh
Cc: Eduardo Valentin, b-cousson, kishon, kbaidarov, tony, paul,
balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Keerthy
On Mon, May 28, 2012 at 03:34:28PM +0530, Shilimkar, Santosh wrote:
> On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
> <eduardo.valentin@ti.com> wrote:
> > OMAP4460 specific temperature sensor register bit fields are added.
> > Existing OMAP4 entries are renamed to OMAP4430.
> >
> > Signed-off-by: Keerthy <j-keerthy@ti.com>
> > Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> > ---
> Once you split the header, as mentioned in earlier comment,
> you can move those defines in driver file directly.
Agreed, this patch is gonna be dropped and the definition will be part of patch introducing the bandgap driver
>
> Regards
> Santsoh
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 08/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields
@ 2012-05-28 11:18 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 11:18 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, May 28, 2012 at 03:34:28PM +0530, Shilimkar, Santosh wrote:
> On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
> <eduardo.valentin@ti.com> wrote:
> > OMAP4460 specific temperature sensor register bit fields are added.
> > Existing OMAP4 entries are renamed to OMAP4430.
> >
> > Signed-off-by: Keerthy <j-keerthy@ti.com>
> > Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> > ---
> Once you split the header, as mentioned in earlier comment,
> you can move those defines in driver file directly.
Agreed, this patch is gonna be dropped and the definition will be part of patch introducing the bandgap driver
>
> Regards
> Santsoh
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 06/11] OMAP2+: use control module mfd driver in omap_type
2012-05-28 10:02 ` Shilimkar, Santosh
@ 2012-05-28 11:24 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 11:24 UTC (permalink / raw)
To: Shilimkar, Santosh
Cc: amit.kucheria, kbaidarov, kishon, balbi, linux-pm, linux-omap,
linux-arm-kernel
Hello,
On Mon, May 28, 2012 at 03:32:50PM +0530, Shilimkar, Santosh wrote:
> On Fri, May 25, 2012 at 6:23 PM, Cousson, Benoit <b-cousson@ti.com> wrote:
> > Hi Eduardo,
> >
> >
> > On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> >>
> >> OMAP system control module can be probed early, then
> >> omap_type is safe to use its APIs.
> >>
> >> TODO: add support for other omap versions
> >>
> >> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> >> ---
> >> arch/arm/mach-omap2/id.c | 16 +++++++++++++++-
> >> 1 files changed, 15 insertions(+), 1 deletions(-)
> >>
> >> diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
> >> index 5bb9746..acfd698 100644
> >> --- a/arch/arm/mach-omap2/id.c
> >> +++ b/arch/arm/mach-omap2/id.c
> >> @@ -18,6 +18,7 @@
> >> #include<linux/kernel.h>
> >> #include<linux/init.h>
> >> #include<linux/io.h>
> >> +#include<linux/mfd/omap_control.h>
> >>
> >> #include<asm/cputype.h>
> >>
> >> @@ -40,8 +41,14 @@ EXPORT_SYMBOL(omap_rev);
> >>
> >> int omap_type(void)
> >> {
> >> + struct device *scm;
> >> + int ret = 0;
> >> u32 val = 0;
> >>
> >> + scm = omap_control_get();
> >> + if (IS_ERR_OR_NULL(scm))
> >> + return 0;
> >> +
> >> if (cpu_is_omap24xx()) {
> >
> >
> > OK, not really related to that patch, but the previous cpu_is_omap24xx makes
> > me think of that :-)
> >
> > What about the omap<X>_check_revision used by cpu_is_XXX?
> >
> > This call is the very first one to require the control module access in
> > order to get the ID_CODE inside the control module.
> >
> > So far it still use that ugly hard coded phys -> virtual address macro that
> > is sued for that.
> >
> Agree with Benoits comment. One way to deal with this is,
> store the register offset with init and then just use it here.
>
> That way you can get rid of all cpu_is_XXXX() from this function.
I see. I need to check how this storing would look like.
Probably we can do the storing when the early device gets probed.
>
> Regards
> Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 06/11] OMAP2+: use control module mfd driver in omap_type
@ 2012-05-28 11:24 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 11:24 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
On Mon, May 28, 2012 at 03:32:50PM +0530, Shilimkar, Santosh wrote:
> On Fri, May 25, 2012 at 6:23 PM, Cousson, Benoit <b-cousson@ti.com> wrote:
> > Hi Eduardo,
> >
> >
> > On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> >>
> >> OMAP system control module can be probed early, then
> >> omap_type is safe to use its APIs.
> >>
> >> TODO: add support for other omap versions
> >>
> >> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> >> ---
> >> ?arch/arm/mach-omap2/id.c | ? 16 +++++++++++++++-
> >> ?1 files changed, 15 insertions(+), 1 deletions(-)
> >>
> >> diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
> >> index 5bb9746..acfd698 100644
> >> --- a/arch/arm/mach-omap2/id.c
> >> +++ b/arch/arm/mach-omap2/id.c
> >> @@ -18,6 +18,7 @@
> >> ?#include<linux/kernel.h>
> >> ?#include<linux/init.h>
> >> ?#include<linux/io.h>
> >> +#include<linux/mfd/omap_control.h>
> >>
> >> ?#include<asm/cputype.h>
> >>
> >> @@ -40,8 +41,14 @@ EXPORT_SYMBOL(omap_rev);
> >>
> >> ?int omap_type(void)
> >> ?{
> >> + ? ? ? struct device *scm;
> >> + ? ? ? int ret = 0;
> >> ? ? ? ?u32 val = 0;
> >>
> >> + ? ? ? scm = omap_control_get();
> >> + ? ? ? if (IS_ERR_OR_NULL(scm))
> >> + ? ? ? ? ? ? ? return 0;
> >> +
> >> ? ? ? ?if (cpu_is_omap24xx()) {
> >
> >
> > OK, not really related to that patch, but the previous cpu_is_omap24xx makes
> > me think of that :-)
> >
> > What about the omap<X>_check_revision used by cpu_is_XXX?
> >
> > This call is the very first one to require the control module access in
> > order to get the ID_CODE inside the control module.
> >
> > So far it still use that ugly hard coded phys -> virtual address macro that
> > is sued for that.
> >
> Agree with Benoits comment. One way to deal with this is,
> store the register offset with init and then just use it here.
>
> That way you can get rid of all cpu_is_XXXX() from this function.
I see. I need to check how this storing would look like.
Probably we can do the storing when the early device gets probed.
>
> Regards
> Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-05-25 12:52 ` Cousson, Benoit
@ 2012-05-28 11:35 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 11:35 UTC (permalink / raw)
To: Cousson, Benoit
Cc: amit.kucheria, kbaidarov, kishon, balbi, J Keerthy, linux-pm,
linux-omap, linux-arm-kernel
Hello,
On Fri, May 25, 2012 at 02:52:08PM +0200, Cousson Benoit wrote:
> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> >This patch introduces a MFD core device driver for
> >OMAP system control module.
> >
> >The control module allows software control of
> >various static modes supported by the device. It is
> >composed of two control submodules: general control
> >module and device (padconfiguration) control
> >module.
> >
> >In this patch, the children defined are for:
> >. USB-phy pin control
> >. Bangap temperature sensor
> >
> >Device driver is probed with postcore_initcall.
> >However, as some of the APIs exposed by this driver
> >may be needed in very early init phase, an early init
> >class is also available: "early_omap_control".
> >
> >Signed-off-by: J Keerthy<j-keerthy@ti.com>
> >Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
> >Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> >---
> > .../devicetree/bindings/mfd/omap_control.txt | 44 ++++
> > arch/arm/mach-omap2/Kconfig | 1 +
> > arch/arm/plat-omap/Kconfig | 3 +
> > drivers/mfd/Kconfig | 9 +
> > drivers/mfd/Makefile | 1 +
> > drivers/mfd/omap-control-core.c | 211 ++++++++++++++++++++
> > include/linux/mfd/omap_control.h | 69 +++++++
> > 7 files changed, 338 insertions(+), 0 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
> > create mode 100644 drivers/mfd/omap-control-core.c
> > create mode 100644 include/linux/mfd/omap_control.h
> >
> >diff --git a/Documentation/devicetree/bindings/mfd/omap_control.txt b/Documentation/devicetree/bindings/mfd/omap_control.txt
> >new file mode 100644
> >index 0000000..46d5e7e
> >--- /dev/null
> >+++ b/Documentation/devicetree/bindings/mfd/omap_control.txt
> >@@ -0,0 +1,44 @@
> >+* Texas Instrument OMAP System Control Module (SCM) bindings
> >+
> >+The control module allows software control of various static modes supported by
> >+the device. The control module controls the settings of various device modules
> >+through register configuration and internal signals. It also controls the pad
> >+configuration, pin functional multiplexing, and the routing of internal signals
> >+(such as PRCM signals or DMA requests) to output pins configured for hardware
> >+observability.
> >+
> >+Required properties:
> >+- compatible : Should be:
> >+ - "ti,omap3-control" for OMAP3 support
> >+ - "ti,omap4-control" for OMAP4 support
> >+ - "ti,omap5-control" for OMAP5 support
> >+
> >+OMAP specific properties:
> >+- ti,hwmods: Name of the hwmod associated to the control module:
> >+ Should be "ctrl_module_core";
> >+
> >+Sub-nodes:
> >+- bandgap : contains the bandgap node
> >+
> >+ The bindings details of individual bandgap device can be found in:
> >+ Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> >+
> >+- usb : contains the usb phy pin control node
> >+
> >+ The only required property for this child is:
> >+ - compatible = "ti,omap4-control-usb";
> >+
> >+Examples:
> >+
> >+ctrl_module_core: ctrl_module_core@4a002000 {
> >+ compatible = "ti,omap4-control";
> >+ ti,hwmods = "ctrl_module_core";
> >+ bandgap {
> >+ compatible = "ti,omap4460-bandgap";
> >+ interrupts =<0 126 4>; /* talert */
> >+ ti,tshut-gpio =<86>; /* tshut */
> >+ };
> >+ usb {
> >+ compatible = "ti,omap4-usb-phy";
> >+ };
> >+};
> >diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
> >index a2b946d..7dfe5e1 100644
> >--- a/arch/arm/mach-omap2/Kconfig
> >+++ b/arch/arm/mach-omap2/Kconfig
> >@@ -52,6 +52,7 @@ config ARCH_OMAP4
> > select PL310_ERRATA_727915
> > select ARM_ERRATA_720789
> > select ARCH_HAS_OPP
> >+ select ARCH_HAS_CONTROL_MODULE
> > select PM_OPP if PM
> > select USB_ARCH_HAS_EHCI if USB_SUPPORT
> > select ARM_CPU_SUSPEND if PM
> >diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> >index ad95c7a..222dbad 100644
> >--- a/arch/arm/plat-omap/Kconfig
> >+++ b/arch/arm/plat-omap/Kconfig
> >@@ -5,6 +5,9 @@ menu "TI OMAP Common Features"
> > config ARCH_OMAP_OTG
> > bool
> >
> >+config ARCH_HAS_CONTROL_MODULE
> >+ bool
> >+
> > choice
> > prompt "OMAP System Type"
> > default ARCH_OMAP2PLUS
> >diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> >index 11e4438..25a66d8 100644
> >--- a/drivers/mfd/Kconfig
> >+++ b/drivers/mfd/Kconfig
> >@@ -795,6 +795,15 @@ config MFD_WL1273_CORE
> > driver connects the radio-wl1273 V4L2 module and the wl1273
> > audio codec.
> >
> >+config MFD_OMAP_CONTROL
> >+ bool "Texas Instruments OMAP System control module"
> >+ depends on ARCH_HAS_CONTROL_MODULE
> >+ help
> >+ This is the core driver for system control module. This driver
> >+ is responsible for creating the control module mfd child,
> >+ like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
> >+ change for off mode.
> >+
> > config MFD_OMAP_USB_HOST
> > bool "Support OMAP USBHS core driver"
> > depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
> >diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> >index 05fa538..00f99d6 100644
> >--- a/drivers/mfd/Makefile
> >+++ b/drivers/mfd/Makefile
> >@@ -106,6 +106,7 @@ obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
> > obj-$(CONFIG_MFD_VX855) += vx855.o
> > obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
> > obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
> >+obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
> > obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
> > obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
> > obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
> >diff --git a/drivers/mfd/omap-control-core.c b/drivers/mfd/omap-control-core.c
> >new file mode 100644
> >index 0000000..7d8d408
> >--- /dev/null
> >+++ b/drivers/mfd/omap-control-core.c
> >@@ -0,0 +1,211 @@
> >+/*
> >+ * OMAP system control module driver file
> >+ *
> >+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> >+ * Contacts:
> >+ * Based on original code written by:
> >+ * J Keerthy<j-keerthy@ti.com>
> >+ * Moiz Sonasath<m-sonasath@ti.com>
> >+ * MFD clean up and re-factoring:
> >+ * Eduardo Valentin<eduardo.valentin@ti.com>
> >+ *
> >+ * This program is free software; you can redistribute it and/or
> >+ * modify it under the terms of the GNU General Public License
> >+ * version 2 as published by the Free Software Foundation.
> >+ *
> >+ * This program is distributed in the hope that it will be useful, but
> >+ * WITHOUT ANY WARRANTY; without even the implied warranty of
> >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> >+ * General Public License for more details.
> >+ *
> >+ */
> >+
> >+#include<linux/module.h>
> >+#include<linux/export.h>
> >+#include<linux/platform_device.h>
> >+#include<linux/slab.h>
> >+#include<linux/io.h>
> >+#include<linux/err.h>
> >+#include<linux/of_platform.h>
> >+#include<linux/of_address.h>
> >+#include<linux/mfd/core.h>
> >+#include<linux/mfd/omap_control.h>
> >+
> >+static struct omap_control *omap_control_module;
>
> Mmm, we can have up to 4 control module instances in OMAP4.
>
> Well, I'm not sure it worth considering them as separate devices. Is
> that your plan as well?
At least for now I was focusing on the ctrl_module_core ...
>
> But since they all have different base address, it will be trick to
> handle them with only a single entry.
Indeed. We can always add the support latter on.
I am not sure what would be the best way to handle those instances though,
and how they are going to expose APIs. Would need to have an instance bound
to API set?
>
> >+
> >+/**
> >+ * omap_control_readl: Read a single omap control module register.
> >+ *
> >+ * @dev: device to read from.
> >+ * @reg: register to read.
> >+ * @val: output with register value.
> >+ *
> >+ * returns 0 on success or -EINVAL in case struct device is invalid.
> >+ */
> >+int omap_control_readl(struct device *dev, u32 reg, u32 *val)
> >+{
> >+ struct omap_control *omap_control = dev_get_drvdata(dev);
> >+
> >+ if (!omap_control)
> >+ return -EINVAL;
> >+
> >+ *val = readl(omap_control->base + reg);
> >+
> >+ return 0;
> >+}
> >+EXPORT_SYMBOL_GPL(omap_control_readl);
> >+
> >+/**
> >+ * omap_control_writel: Write a single omap control module register.
> >+ *
> >+ * @dev: device to read from.
> >+ * @val: value to write.
> >+ * @reg: register to write to.
> >+ *
> >+ * returns 0 on success or -EINVAL in case struct device is invalid.
> >+ */
> >+int omap_control_writel(struct device *dev, u32 val, u32 reg)
> >+{
> >+ struct omap_control *omap_control = dev_get_drvdata(dev);
> >+ unsigned long flags;
> >+
> >+ if (!omap_control)
> >+ return -EINVAL;
> >+
> >+ spin_lock_irqsave(&omap_control->reg_lock, flags);
> >+ writel(val, omap_control->base + reg);
> >+ spin_unlock_irqrestore(&omap_control->reg_lock, flags);
> >+
> >+ return 0;
> >+}
> >+EXPORT_SYMBOL_GPL(omap_control_writel);
> >+
> >+/**
> >+ * omap_control_get: returns the control module device pinter
>
> typo
K
>
> >+ *
> >+ * The modules which has to use control module API's to read or write should
> >+ * call this API to get the control module device pointer.
> >+ */
> >+struct device *omap_control_get(void)
> >+{
> >+ unsigned long flags;
> >+
> >+ if (!omap_control_module)
> >+ return ERR_PTR(-ENODEV);
> >+
> >+ spin_lock_irqsave(&omap_control_module->reg_lock, flags);
> >+ omap_control_module->use_count++;
> >+ spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
>
> Don't we do have some better way to increment atomically a variable
> in Linux.
Yeah we have, atomic API. In general I think the SCM/bangap/phy APIs
need to be revisited WRT locking, in general.
>
> >+
> >+ return omap_control_module->dev;
> >+}
> >+EXPORT_SYMBOL_GPL(omap_control_get);
> >+
> >+/**
> >+ * omap_control_put: returns the control module device pinter
> >+ *
> >+ * The modules which has to use control module API's to read or write should
> >+ * call this API to get the control module device pointer.
> >+ */
> >+void omap_control_put(struct device *dev)
> >+{
> >+ struct omap_control *omap_control = dev_get_drvdata(dev);
> >+ unsigned long flags;
> >+
> >+ if (!omap_control)
> >+ return;
> >+
> >+ spin_lock_irqsave(&omap_control->reg_lock, flags);
> >+ omap_control->use_count--;
> >+ spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
> >+}
> >+EXPORT_SYMBOL_GPL(omap_control_put);
> >+
> >+static const struct of_device_id of_omap_control_match[] = {
> >+ { .compatible = "ti,omap3-control", },
> >+ { .compatible = "ti,omap4-control", },
> >+ { .compatible = "ti,omap5-control", },
> >+ { },
> >+};
> >+
> >+static int __devinit omap_control_probe(struct platform_device *pdev)
> >+{
> >+ struct resource *res;
> >+ void __iomem *base;
> >+ struct device *dev =&pdev->dev;
> >+ struct device_node *np = dev->of_node;
> >+ struct omap_control *omap_control;
>
> Maybe omap_control_data instead? At least if this is drvdata only.
> If this is supposed to be the *handle* to the control module
> instance, it should be fine.
That's suppose to be the phandle :-)
>
> >+
> >+ omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
> >+ if (!omap_control) {
> >+ dev_err(dev, "not enough memory for omap_control\n");
> >+ return -ENOMEM;
> >+ }
> >+
> >+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> >+ if (!res) {
> >+ dev_err(dev, "missing memory base resource\n");
> >+ return -EINVAL;
> >+ }
> >+
> >+ base = devm_request_and_ioremap(dev, res);
> >+ if (!base) {
> >+ dev_err(dev, "ioremap failed\n");
> >+ return -EADDRNOTAVAIL;
> >+ }
> >+
> >+ omap_control->base = base;
> >+ omap_control->dev = dev;
> >+ spin_lock_init(&omap_control->reg_lock);
> >+
> >+ platform_set_drvdata(pdev, omap_control);
> >+ omap_control_module = omap_control;
> >+
> >+ return of_platform_populate(np, of_omap_control_match, NULL, dev);
> >+}
> >+
> >+static int __devexit omap_control_remove(struct platform_device *pdev)
> >+{
> >+ struct omap_control *omap_control = platform_get_drvdata(pdev);
> >+
> >+ spin_lock(&omap_control->reg_lock);
> >+ if (omap_control->use_count> 0) {
> >+ spin_unlock(&omap_control->reg_lock);
> >+ dev_err(&pdev->dev, "device removed while still being used\n");
> >+ return -EBUSY;
> >+ }
> >+ spin_unlock(&omap_control->reg_lock);
> >+
> >+ iounmap(omap_control->base);
> >+ platform_set_drvdata(pdev, NULL);
> >+
> >+ return 0;
> >+}
> >+
> >+static struct platform_driver omap_control_driver = {
> >+ .probe = omap_control_probe,
> >+ .remove = __devexit_p(omap_control_remove),
> >+ .driver = {
> >+ .name = "omap-control-core",
> >+ .owner = THIS_MODULE,
> >+ .of_match_table = of_omap_control_match,
> >+ },
> >+};
> >+
> >+static int __init omap_control_init(void)
> >+{
> >+ return platform_driver_register(&omap_control_driver);
> >+}
> >+postcore_initcall_sync(omap_control_init);
> >+
> >+static void __exit omap_control_exit(void)
> >+{
> >+ platform_driver_unregister(&omap_control_driver);
> >+}
> >+module_exit(omap_control_exit);
> >+early_platform_init("early_omap_control",&omap_control_driver);
> >+
> >+MODULE_DESCRIPTION("OMAP system control module driver");
> >+MODULE_LICENSE("GPL v2");
> >+MODULE_ALIAS("platform:omap-control-core");
> >+MODULE_AUTHOR("Texas Instruments Inc.");
> >diff --git a/include/linux/mfd/omap_control.h b/include/linux/mfd/omap_control.h
> >new file mode 100644
> >index 0000000..7a33eda
> >--- /dev/null
> >+++ b/include/linux/mfd/omap_control.h
> >@@ -0,0 +1,69 @@
> >+/*
> >+ * OMAP system control module header file
> >+ *
> >+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> >+ * Contact:
> >+ * J Keerthy<j-keerthy@ti.com>
> >+ * Moiz Sonasath<m-sonasath@ti.com>
> >+ * Abraham, Kishon Vijay<kishon@ti.com>
> >+ * Eduardo Valentin<eduardo.valentin@ti.com>
> >+ *
> >+ * This program is free software; you can redistribute it and/or
> >+ * modify it under the terms of the GNU General Public License
> >+ * version 2 as published by the Free Software Foundation.
> >+ *
> >+ * This program is distributed in the hope that it will be useful, but
> >+ * WITHOUT ANY WARRANTY; without even the implied warranty of
> >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> >+ * General Public License for more details.
> >+ *
> >+ */
> >+
> >+#ifndef __DRIVERS_OMAP_CONTROL_H
> >+#define __DRIVERS_OMAP_CONTROL_H
> >+
> >+#include<linux/err.h>
> >+
> >+/**
> >+ * struct system control module - scm device structure
> >+ * @dev: device pointer
> >+ * @base: Base of the temp I/O
> >+ * @reg_lock: protect omap_control structure
> >+ * @use_count: track API users
> >+ */
> >+struct omap_control {
> >+ struct device *dev;
>
> Do you really need the dev?
> You API is device based and not omap_control based, so it should not
> be needed.
>
> I guess we should be consistent here. We can store the devices and
> used a device based API or store the omap_control and thus expose a
> omap_control API.
Yeah, this API structure is left over of the previous driver.
The omap_control_get returns the SCM device reference
and the users of SCM use it as parameter for the SCM APIs.
We need to have in mind that, for SCM, the users are:
a. Its children (USB phy, BG, etc)
b. Non children users (mach code)
The refcounting and the locking needs to take care of both I'd say.
The struct dev was just a way to pass the SCM phandle.
>
> Regards,
> Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-05-28 11:35 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 11:35 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
On Fri, May 25, 2012 at 02:52:08PM +0200, Cousson Benoit wrote:
> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> >This patch introduces a MFD core device driver for
> >OMAP system control module.
> >
> >The control module allows software control of
> >various static modes supported by the device. It is
> >composed of two control submodules: general control
> >module and device (padconfiguration) control
> >module.
> >
> >In this patch, the children defined are for:
> >. USB-phy pin control
> >. Bangap temperature sensor
> >
> >Device driver is probed with postcore_initcall.
> >However, as some of the APIs exposed by this driver
> >may be needed in very early init phase, an early init
> >class is also available: "early_omap_control".
> >
> >Signed-off-by: J Keerthy<j-keerthy@ti.com>
> >Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
> >Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> >---
> > .../devicetree/bindings/mfd/omap_control.txt | 44 ++++
> > arch/arm/mach-omap2/Kconfig | 1 +
> > arch/arm/plat-omap/Kconfig | 3 +
> > drivers/mfd/Kconfig | 9 +
> > drivers/mfd/Makefile | 1 +
> > drivers/mfd/omap-control-core.c | 211 ++++++++++++++++++++
> > include/linux/mfd/omap_control.h | 69 +++++++
> > 7 files changed, 338 insertions(+), 0 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
> > create mode 100644 drivers/mfd/omap-control-core.c
> > create mode 100644 include/linux/mfd/omap_control.h
> >
> >diff --git a/Documentation/devicetree/bindings/mfd/omap_control.txt b/Documentation/devicetree/bindings/mfd/omap_control.txt
> >new file mode 100644
> >index 0000000..46d5e7e
> >--- /dev/null
> >+++ b/Documentation/devicetree/bindings/mfd/omap_control.txt
> >@@ -0,0 +1,44 @@
> >+* Texas Instrument OMAP System Control Module (SCM) bindings
> >+
> >+The control module allows software control of various static modes supported by
> >+the device. The control module controls the settings of various device modules
> >+through register configuration and internal signals. It also controls the pad
> >+configuration, pin functional multiplexing, and the routing of internal signals
> >+(such as PRCM signals or DMA requests) to output pins configured for hardware
> >+observability.
> >+
> >+Required properties:
> >+- compatible : Should be:
> >+ - "ti,omap3-control" for OMAP3 support
> >+ - "ti,omap4-control" for OMAP4 support
> >+ - "ti,omap5-control" for OMAP5 support
> >+
> >+OMAP specific properties:
> >+- ti,hwmods: Name of the hwmod associated to the control module:
> >+ Should be "ctrl_module_core";
> >+
> >+Sub-nodes:
> >+- bandgap : contains the bandgap node
> >+
> >+ The bindings details of individual bandgap device can be found in:
> >+ Documentation/devicetree/bindings/thermal/omap_bandgap.txt
> >+
> >+- usb : contains the usb phy pin control node
> >+
> >+ The only required property for this child is:
> >+ - compatible = "ti,omap4-control-usb";
> >+
> >+Examples:
> >+
> >+ctrl_module_core: ctrl_module_core at 4a002000 {
> >+ compatible = "ti,omap4-control";
> >+ ti,hwmods = "ctrl_module_core";
> >+ bandgap {
> >+ compatible = "ti,omap4460-bandgap";
> >+ interrupts =<0 126 4>; /* talert */
> >+ ti,tshut-gpio =<86>; /* tshut */
> >+ };
> >+ usb {
> >+ compatible = "ti,omap4-usb-phy";
> >+ };
> >+};
> >diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
> >index a2b946d..7dfe5e1 100644
> >--- a/arch/arm/mach-omap2/Kconfig
> >+++ b/arch/arm/mach-omap2/Kconfig
> >@@ -52,6 +52,7 @@ config ARCH_OMAP4
> > select PL310_ERRATA_727915
> > select ARM_ERRATA_720789
> > select ARCH_HAS_OPP
> >+ select ARCH_HAS_CONTROL_MODULE
> > select PM_OPP if PM
> > select USB_ARCH_HAS_EHCI if USB_SUPPORT
> > select ARM_CPU_SUSPEND if PM
> >diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> >index ad95c7a..222dbad 100644
> >--- a/arch/arm/plat-omap/Kconfig
> >+++ b/arch/arm/plat-omap/Kconfig
> >@@ -5,6 +5,9 @@ menu "TI OMAP Common Features"
> > config ARCH_OMAP_OTG
> > bool
> >
> >+config ARCH_HAS_CONTROL_MODULE
> >+ bool
> >+
> > choice
> > prompt "OMAP System Type"
> > default ARCH_OMAP2PLUS
> >diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> >index 11e4438..25a66d8 100644
> >--- a/drivers/mfd/Kconfig
> >+++ b/drivers/mfd/Kconfig
> >@@ -795,6 +795,15 @@ config MFD_WL1273_CORE
> > driver connects the radio-wl1273 V4L2 module and the wl1273
> > audio codec.
> >
> >+config MFD_OMAP_CONTROL
> >+ bool "Texas Instruments OMAP System control module"
> >+ depends on ARCH_HAS_CONTROL_MODULE
> >+ help
> >+ This is the core driver for system control module. This driver
> >+ is responsible for creating the control module mfd child,
> >+ like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
> >+ change for off mode.
> >+
> > config MFD_OMAP_USB_HOST
> > bool "Support OMAP USBHS core driver"
> > depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
> >diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> >index 05fa538..00f99d6 100644
> >--- a/drivers/mfd/Makefile
> >+++ b/drivers/mfd/Makefile
> >@@ -106,6 +106,7 @@ obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
> > obj-$(CONFIG_MFD_VX855) += vx855.o
> > obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
> > obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
> >+obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
> > obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
> > obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
> > obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
> >diff --git a/drivers/mfd/omap-control-core.c b/drivers/mfd/omap-control-core.c
> >new file mode 100644
> >index 0000000..7d8d408
> >--- /dev/null
> >+++ b/drivers/mfd/omap-control-core.c
> >@@ -0,0 +1,211 @@
> >+/*
> >+ * OMAP system control module driver file
> >+ *
> >+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> >+ * Contacts:
> >+ * Based on original code written by:
> >+ * J Keerthy<j-keerthy@ti.com>
> >+ * Moiz Sonasath<m-sonasath@ti.com>
> >+ * MFD clean up and re-factoring:
> >+ * Eduardo Valentin<eduardo.valentin@ti.com>
> >+ *
> >+ * This program is free software; you can redistribute it and/or
> >+ * modify it under the terms of the GNU General Public License
> >+ * version 2 as published by the Free Software Foundation.
> >+ *
> >+ * This program is distributed in the hope that it will be useful, but
> >+ * WITHOUT ANY WARRANTY; without even the implied warranty of
> >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> >+ * General Public License for more details.
> >+ *
> >+ */
> >+
> >+#include<linux/module.h>
> >+#include<linux/export.h>
> >+#include<linux/platform_device.h>
> >+#include<linux/slab.h>
> >+#include<linux/io.h>
> >+#include<linux/err.h>
> >+#include<linux/of_platform.h>
> >+#include<linux/of_address.h>
> >+#include<linux/mfd/core.h>
> >+#include<linux/mfd/omap_control.h>
> >+
> >+static struct omap_control *omap_control_module;
>
> Mmm, we can have up to 4 control module instances in OMAP4.
>
> Well, I'm not sure it worth considering them as separate devices. Is
> that your plan as well?
At least for now I was focusing on the ctrl_module_core ...
>
> But since they all have different base address, it will be trick to
> handle them with only a single entry.
Indeed. We can always add the support latter on.
I am not sure what would be the best way to handle those instances though,
and how they are going to expose APIs. Would need to have an instance bound
to API set?
>
> >+
> >+/**
> >+ * omap_control_readl: Read a single omap control module register.
> >+ *
> >+ * @dev: device to read from.
> >+ * @reg: register to read.
> >+ * @val: output with register value.
> >+ *
> >+ * returns 0 on success or -EINVAL in case struct device is invalid.
> >+ */
> >+int omap_control_readl(struct device *dev, u32 reg, u32 *val)
> >+{
> >+ struct omap_control *omap_control = dev_get_drvdata(dev);
> >+
> >+ if (!omap_control)
> >+ return -EINVAL;
> >+
> >+ *val = readl(omap_control->base + reg);
> >+
> >+ return 0;
> >+}
> >+EXPORT_SYMBOL_GPL(omap_control_readl);
> >+
> >+/**
> >+ * omap_control_writel: Write a single omap control module register.
> >+ *
> >+ * @dev: device to read from.
> >+ * @val: value to write.
> >+ * @reg: register to write to.
> >+ *
> >+ * returns 0 on success or -EINVAL in case struct device is invalid.
> >+ */
> >+int omap_control_writel(struct device *dev, u32 val, u32 reg)
> >+{
> >+ struct omap_control *omap_control = dev_get_drvdata(dev);
> >+ unsigned long flags;
> >+
> >+ if (!omap_control)
> >+ return -EINVAL;
> >+
> >+ spin_lock_irqsave(&omap_control->reg_lock, flags);
> >+ writel(val, omap_control->base + reg);
> >+ spin_unlock_irqrestore(&omap_control->reg_lock, flags);
> >+
> >+ return 0;
> >+}
> >+EXPORT_SYMBOL_GPL(omap_control_writel);
> >+
> >+/**
> >+ * omap_control_get: returns the control module device pinter
>
> typo
K
>
> >+ *
> >+ * The modules which has to use control module API's to read or write should
> >+ * call this API to get the control module device pointer.
> >+ */
> >+struct device *omap_control_get(void)
> >+{
> >+ unsigned long flags;
> >+
> >+ if (!omap_control_module)
> >+ return ERR_PTR(-ENODEV);
> >+
> >+ spin_lock_irqsave(&omap_control_module->reg_lock, flags);
> >+ omap_control_module->use_count++;
> >+ spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
>
> Don't we do have some better way to increment atomically a variable
> in Linux.
Yeah we have, atomic API. In general I think the SCM/bangap/phy APIs
need to be revisited WRT locking, in general.
>
> >+
> >+ return omap_control_module->dev;
> >+}
> >+EXPORT_SYMBOL_GPL(omap_control_get);
> >+
> >+/**
> >+ * omap_control_put: returns the control module device pinter
> >+ *
> >+ * The modules which has to use control module API's to read or write should
> >+ * call this API to get the control module device pointer.
> >+ */
> >+void omap_control_put(struct device *dev)
> >+{
> >+ struct omap_control *omap_control = dev_get_drvdata(dev);
> >+ unsigned long flags;
> >+
> >+ if (!omap_control)
> >+ return;
> >+
> >+ spin_lock_irqsave(&omap_control->reg_lock, flags);
> >+ omap_control->use_count--;
> >+ spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
> >+}
> >+EXPORT_SYMBOL_GPL(omap_control_put);
> >+
> >+static const struct of_device_id of_omap_control_match[] = {
> >+ { .compatible = "ti,omap3-control", },
> >+ { .compatible = "ti,omap4-control", },
> >+ { .compatible = "ti,omap5-control", },
> >+ { },
> >+};
> >+
> >+static int __devinit omap_control_probe(struct platform_device *pdev)
> >+{
> >+ struct resource *res;
> >+ void __iomem *base;
> >+ struct device *dev =&pdev->dev;
> >+ struct device_node *np = dev->of_node;
> >+ struct omap_control *omap_control;
>
> Maybe omap_control_data instead? At least if this is drvdata only.
> If this is supposed to be the *handle* to the control module
> instance, it should be fine.
That's suppose to be the phandle :-)
>
> >+
> >+ omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
> >+ if (!omap_control) {
> >+ dev_err(dev, "not enough memory for omap_control\n");
> >+ return -ENOMEM;
> >+ }
> >+
> >+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> >+ if (!res) {
> >+ dev_err(dev, "missing memory base resource\n");
> >+ return -EINVAL;
> >+ }
> >+
> >+ base = devm_request_and_ioremap(dev, res);
> >+ if (!base) {
> >+ dev_err(dev, "ioremap failed\n");
> >+ return -EADDRNOTAVAIL;
> >+ }
> >+
> >+ omap_control->base = base;
> >+ omap_control->dev = dev;
> >+ spin_lock_init(&omap_control->reg_lock);
> >+
> >+ platform_set_drvdata(pdev, omap_control);
> >+ omap_control_module = omap_control;
> >+
> >+ return of_platform_populate(np, of_omap_control_match, NULL, dev);
> >+}
> >+
> >+static int __devexit omap_control_remove(struct platform_device *pdev)
> >+{
> >+ struct omap_control *omap_control = platform_get_drvdata(pdev);
> >+
> >+ spin_lock(&omap_control->reg_lock);
> >+ if (omap_control->use_count> 0) {
> >+ spin_unlock(&omap_control->reg_lock);
> >+ dev_err(&pdev->dev, "device removed while still being used\n");
> >+ return -EBUSY;
> >+ }
> >+ spin_unlock(&omap_control->reg_lock);
> >+
> >+ iounmap(omap_control->base);
> >+ platform_set_drvdata(pdev, NULL);
> >+
> >+ return 0;
> >+}
> >+
> >+static struct platform_driver omap_control_driver = {
> >+ .probe = omap_control_probe,
> >+ .remove = __devexit_p(omap_control_remove),
> >+ .driver = {
> >+ .name = "omap-control-core",
> >+ .owner = THIS_MODULE,
> >+ .of_match_table = of_omap_control_match,
> >+ },
> >+};
> >+
> >+static int __init omap_control_init(void)
> >+{
> >+ return platform_driver_register(&omap_control_driver);
> >+}
> >+postcore_initcall_sync(omap_control_init);
> >+
> >+static void __exit omap_control_exit(void)
> >+{
> >+ platform_driver_unregister(&omap_control_driver);
> >+}
> >+module_exit(omap_control_exit);
> >+early_platform_init("early_omap_control",&omap_control_driver);
> >+
> >+MODULE_DESCRIPTION("OMAP system control module driver");
> >+MODULE_LICENSE("GPL v2");
> >+MODULE_ALIAS("platform:omap-control-core");
> >+MODULE_AUTHOR("Texas Instruments Inc.");
> >diff --git a/include/linux/mfd/omap_control.h b/include/linux/mfd/omap_control.h
> >new file mode 100644
> >index 0000000..7a33eda
> >--- /dev/null
> >+++ b/include/linux/mfd/omap_control.h
> >@@ -0,0 +1,69 @@
> >+/*
> >+ * OMAP system control module header file
> >+ *
> >+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> >+ * Contact:
> >+ * J Keerthy<j-keerthy@ti.com>
> >+ * Moiz Sonasath<m-sonasath@ti.com>
> >+ * Abraham, Kishon Vijay<kishon@ti.com>
> >+ * Eduardo Valentin<eduardo.valentin@ti.com>
> >+ *
> >+ * This program is free software; you can redistribute it and/or
> >+ * modify it under the terms of the GNU General Public License
> >+ * version 2 as published by the Free Software Foundation.
> >+ *
> >+ * This program is distributed in the hope that it will be useful, but
> >+ * WITHOUT ANY WARRANTY; without even the implied warranty of
> >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> >+ * General Public License for more details.
> >+ *
> >+ */
> >+
> >+#ifndef __DRIVERS_OMAP_CONTROL_H
> >+#define __DRIVERS_OMAP_CONTROL_H
> >+
> >+#include<linux/err.h>
> >+
> >+/**
> >+ * struct system control module - scm device structure
> >+ * @dev: device pointer
> >+ * @base: Base of the temp I/O
> >+ * @reg_lock: protect omap_control structure
> >+ * @use_count: track API users
> >+ */
> >+struct omap_control {
> >+ struct device *dev;
>
> Do you really need the dev?
> You API is device based and not omap_control based, so it should not
> be needed.
>
> I guess we should be consistent here. We can store the devices and
> used a device based API or store the omap_control and thus expose a
> omap_control API.
Yeah, this API structure is left over of the previous driver.
The omap_control_get returns the SCM device reference
and the users of SCM use it as parameter for the SCM APIs.
We need to have in mind that, for SCM, the users are:
a. Its children (USB phy, BG, etc)
b. Non children users (mach code)
The refcounting and the locking needs to take care of both I'd say.
The struct dev was just a way to pass the SCM phandle.
>
> Regards,
> Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-05-28 9:54 ` Shilimkar, Santosh
@ 2012-05-28 11:42 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 11:42 UTC (permalink / raw)
To: Shilimkar, Santosh
Cc: amit.kucheria, kbaidarov, kishon, balbi, J Keerthy, linux-pm,
linux-omap, linux-arm-kernel
Hello,
On Mon, May 28, 2012 at 03:24:01PM +0530, Shilimkar, Santosh wrote:
> On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
> <eduardo.valentin@ti.com> wrote:
> > This patch introduces a MFD core device driver for
> > OMAP system control module.
> >
> > The control module allows software control of
> > various static modes supported by the device. It is
> > composed of two control submodules: general control
> > module and device (padconfiguration) control
> > module.
> >
> > In this patch, the children defined are for:
> > . USB-phy pin control
> > . Bangap temperature sensor
> >
> > Device driver is probed with postcore_initcall.
> > However, as some of the APIs exposed by this driver
> > may be needed in very early init phase, an early init
> > class is also available: "early_omap_control".
> >
> > Signed-off-by: J Keerthy <j-keerthy@ti.com>
> > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> > Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> > ---
>
> [..]
> > diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> > index ad95c7a..222dbad 100644
> > --- a/arch/arm/plat-omap/Kconfig
> > +++ b/arch/arm/plat-omap/Kconfig
> > @@ -5,6 +5,9 @@ menu "TI OMAP Common Features"
> > config ARCH_OMAP_OTG
> > bool
> >
> > +config ARCH_HAS_CONTROL_MODULE
> > + bool
> > +
> Thanks for getting rid of OMAP CONFIG here.
OK. ARCH_HAS_CONTROL_MODULE is a bit too generic though..
>
> > choice
> > prompt "OMAP System Type"
> > default ARCH_OMAP2PLUS
> > diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> > index 11e4438..25a66d8 100644
> > --- a/drivers/mfd/Kconfig
> > +++ b/drivers/mfd/Kconfig
> > @@ -795,6 +795,15 @@ config MFD_WL1273_CORE
> > driver connects the radio-wl1273 V4L2 module and the wl1273
> > audio codec.
> >
> > +config MFD_OMAP_CONTROL
> > + bool "Texas Instruments OMAP System control module"
> > + depends on ARCH_HAS_CONTROL_MODULE
> > + help
> > + This is the core driver for system control module. This driver
> > + is responsible for creating the control module mfd child,
> > + like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
> > + change for off mode.
> > +
> > config MFD_OMAP_USB_HOST
> > bool "Support OMAP USBHS core driver"
> > depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
> > diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> > index 05fa538..00f99d6 100644
> > --- a/drivers/mfd/Makefile
> > +++ b/drivers/mfd/Makefile
> > @@ -106,6 +106,7 @@ obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
> > obj-$(CONFIG_MFD_VX855) += vx855.o
> > obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
> > obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
> > +obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
> > obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
> > obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
> > obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
> > diff --git a/drivers/mfd/omap-control-core.c b/drivers/mfd/omap-control-core.c
> > new file mode 100644
> > index 0000000..7d8d408
> > --- /dev/null
> > +++ b/drivers/mfd/omap-control-core.c
> > @@ -0,0 +1,211 @@
> > +/*
> > + * OMAP system control module driver file
> > + *
> > + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> > + * Contacts:
> > + * Based on original code written by:
> > + * J Keerthy <j-keerthy@ti.com>
> > + * Moiz Sonasath <m-sonasath@ti.com>
> > + * MFD clean up and re-factoring:
> > + * Eduardo Valentin <eduardo.valentin@ti.com>
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License
> > + * version 2 as published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope that it will be useful, but
> > + * WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> > + * General Public License for more details.
> > + *
> > + */
> > +
> > +#include <linux/module.h>
> > +#include <linux/export.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/slab.h>
> > +#include <linux/io.h>
> > +#include <linux/err.h>
> > +#include <linux/of_platform.h>
> > +#include <linux/of_address.h>
> > +#include <linux/mfd/core.h>
> > +#include <linux/mfd/omap_control.h>
> > +
> > +static struct omap_control *omap_control_module;
> > +
> > +/**
> > + * omap_control_readl: Read a single omap control module register.
> > + *
> > + * @dev: device to read from.
> > + * @reg: register to read.
> > + * @val: output with register value.
> > + *
> > + * returns 0 on success or -EINVAL in case struct device is invalid.
> > + */
> > +int omap_control_readl(struct device *dev, u32 reg, u32 *val)
> > +{
> > + struct omap_control *omap_control = dev_get_drvdata(dev);
> > +
> > + if (!omap_control)
> > + return -EINVAL;
> > +
> > + *val = readl(omap_control->base + reg);
> > +
> > + return 0;
> > +}
> > +EXPORT_SYMBOL_GPL(omap_control_readl);
> > +
> I might have missed in the last scan, but can you let
> function return the register value.
Why?
>
> I am guessing, you did this for error case handling. You might
> want to stick to read API semantic and just have WARN_ON()
> to take care of error case.
Yeah, that was for error handling and to do not confuse register
values with error values.
>
> > +/**
> > + * omap_control_writel: Write a single omap control module register.
> > + *
> > + * @dev: device to read from.
> > + * @val: value to write.
> > + * @reg: register to write to.
> > + *
> > + * returns 0 on success or -EINVAL in case struct device is invalid.
> > + */
> > +int omap_control_writel(struct device *dev, u32 val, u32 reg)
> > +{
> > + struct omap_control *omap_control = dev_get_drvdata(dev);
> > + unsigned long flags;
> > +
> > + if (!omap_control)
> > + return -EINVAL;
> > +
> > + spin_lock_irqsave(&omap_control->reg_lock, flags);
> > + writel(val, omap_control->base + reg);
> > + spin_unlock_irqrestore(&omap_control->reg_lock, flags);
> > +
> > + return 0;
> > +}
> > +EXPORT_SYMBOL_GPL(omap_control_writel);
> > +
> > +/**
> > + * omap_control_get: returns the control module device pinter
> > + *
> > + * The modules which has to use control module API's to read or write should
> > + * call this API to get the control module device pointer.
> > + */
> > +struct device *omap_control_get(void)
> > +{
> > + unsigned long flags;
> > +
> > + if (!omap_control_module)
> > + return ERR_PTR(-ENODEV);
> > +
> > + spin_lock_irqsave(&omap_control_module->reg_lock, flags);
> > + omap_control_module->use_count++;
> > + spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
> > +
> > + return omap_control_module->dev;
> > +}
> > +EXPORT_SYMBOL_GPL(omap_control_get);
> > +
> > +/**
> > + * omap_control_put: returns the control module device pinter
> > + *
> > + * The modules which has to use control module API's to read or write should
> > + * call this API to get the control module device pointer.
> > + */
> > +void omap_control_put(struct device *dev)
> > +{
> > + struct omap_control *omap_control = dev_get_drvdata(dev);
> > + unsigned long flags;
> > +
> > + if (!omap_control)
> > + return;
> > +
> > + spin_lock_irqsave(&omap_control->reg_lock, flags);
> > + omap_control->use_count--;
> > + spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
> > +}
> > +EXPORT_SYMBOL_GPL(omap_control_put);
> > +
> > +static const struct of_device_id of_omap_control_match[] = {
> > + { .compatible = "ti,omap3-control", },
> > + { .compatible = "ti,omap4-control", },
> > + { .compatible = "ti,omap5-control", },
> > + { },
> > +};
> > +
> > +static int __devinit omap_control_probe(struct platform_device *pdev)
> > +{
> > + struct resource *res;
> > + void __iomem *base;
> > + struct device *dev = &pdev->dev;
> > + struct device_node *np = dev->of_node;
> > + struct omap_control *omap_control;
> > +
> > + omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
> > + if (!omap_control) {
> > + dev_err(dev, "not enough memory for omap_control\n");
> > + return -ENOMEM;
> > + }
> > +
> > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > + if (!res) {
> > + dev_err(dev, "missing memory base resource\n");
> > + return -EINVAL;
> > + }
> > +
> > + base = devm_request_and_ioremap(dev, res);
> > + if (!base) {
> > + dev_err(dev, "ioremap failed\n");
> > + return -EADDRNOTAVAIL;
> > + }
> > +
> > + omap_control->base = base;
> > + omap_control->dev = dev;
> > + spin_lock_init(&omap_control->reg_lock);
> > +
> > + platform_set_drvdata(pdev, omap_control);
> > + omap_control_module = omap_control;
> > +
> > + return of_platform_populate(np, of_omap_control_match, NULL, dev);
> > +}
> > +
>
> Will the probe get called on multiple devices and race ?
It depends. If we decide to have an early device for scm, then the probe will
be called more than once. If not, then only once.
>
> > +static int __devexit omap_control_remove(struct platform_device *pdev)
> > +{
> > + struct omap_control *omap_control = platform_get_drvdata(pdev);
> > +
> > + spin_lock(&omap_control->reg_lock);
> > + if (omap_control->use_count > 0) {
> > + spin_unlock(&omap_control->reg_lock);
> > + dev_err(&pdev->dev, "device removed while still being used\n");
> > + return -EBUSY;
> > + }
> > + spin_unlock(&omap_control->reg_lock);
> > +
> Do you really need above lock where you are just doing the
> register read. smp_rmb(), should be enough, I guess.
It is locking the use counter not a register..
>
> Regards
> Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-05-28 11:42 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-28 11:42 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
On Mon, May 28, 2012 at 03:24:01PM +0530, Shilimkar, Santosh wrote:
> On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
> <eduardo.valentin@ti.com> wrote:
> > This patch introduces a MFD core device driver for
> > OMAP system control module.
> >
> > The control module allows software control of
> > various static modes supported by the device. It is
> > composed of two control submodules: general control
> > module and device (padconfiguration) control
> > module.
> >
> > In this patch, the children defined are for:
> > . USB-phy pin control
> > . Bangap temperature sensor
> >
> > Device driver is probed with postcore_initcall.
> > However, as some of the APIs exposed by this driver
> > may be needed in very early init phase, an early init
> > class is also available: "early_omap_control".
> >
> > Signed-off-by: J Keerthy <j-keerthy@ti.com>
> > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> > Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> > ---
>
> [..]
> > diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> > index ad95c7a..222dbad 100644
> > --- a/arch/arm/plat-omap/Kconfig
> > +++ b/arch/arm/plat-omap/Kconfig
> > @@ -5,6 +5,9 @@ menu "TI OMAP Common Features"
> > ?config ARCH_OMAP_OTG
> > ? ? ? ?bool
> >
> > +config ARCH_HAS_CONTROL_MODULE
> > + ? ? ? bool
> > +
> Thanks for getting rid of OMAP CONFIG here.
OK. ARCH_HAS_CONTROL_MODULE is a bit too generic though..
>
> > ?choice
> > ? ? ? ?prompt "OMAP System Type"
> > ? ? ? ?default ARCH_OMAP2PLUS
> > diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> > index 11e4438..25a66d8 100644
> > --- a/drivers/mfd/Kconfig
> > +++ b/drivers/mfd/Kconfig
> > @@ -795,6 +795,15 @@ config MFD_WL1273_CORE
> > ? ? ? ? ?driver connects the radio-wl1273 V4L2 module and the wl1273
> > ? ? ? ? ?audio codec.
> >
> > +config MFD_OMAP_CONTROL
> > + ? ? ? bool "Texas Instruments OMAP System control module"
> > + ? ? ? depends on ARCH_HAS_CONTROL_MODULE
> > + ? ? ? help
> > + ? ? ? ? This is the core driver for system control module. This driver
> > + ? ? ? ? is responsible for creating the control module mfd child,
> > + ? ? ? ? like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
> > + ? ? ? ? change for off mode.
> > +
> > ?config MFD_OMAP_USB_HOST
> > ? ? ? ?bool "Support OMAP USBHS core driver"
> > ? ? ? ?depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
> > diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> > index 05fa538..00f99d6 100644
> > --- a/drivers/mfd/Makefile
> > +++ b/drivers/mfd/Makefile
> > @@ -106,6 +106,7 @@ obj-$(CONFIG_MFD_TPS6586X) ?+= tps6586x.o
> > ?obj-$(CONFIG_MFD_VX855) ? ? ? ? ? ? ? ?+= vx855.o
> > ?obj-$(CONFIG_MFD_WL1273_CORE) ?+= wl1273-core.o
> > ?obj-$(CONFIG_MFD_CS5535) ? ? ? += cs5535-mfd.o
> > +obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
> > ?obj-$(CONFIG_MFD_OMAP_USB_HOST) ? ? ? ?+= omap-usb-host.o
> > ?obj-$(CONFIG_MFD_PM8921_CORE) ?+= pm8921-core.o
> > ?obj-$(CONFIG_MFD_PM8XXX_IRQ) ? += pm8xxx-irq.o
> > diff --git a/drivers/mfd/omap-control-core.c b/drivers/mfd/omap-control-core.c
> > new file mode 100644
> > index 0000000..7d8d408
> > --- /dev/null
> > +++ b/drivers/mfd/omap-control-core.c
> > @@ -0,0 +1,211 @@
> > +/*
> > + * OMAP system control module driver file
> > + *
> > + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
> > + * Contacts:
> > + * Based on original code written by:
> > + * ? ?J Keerthy <j-keerthy@ti.com>
> > + * ? ?Moiz Sonasath <m-sonasath@ti.com>
> > + * MFD clean up and re-factoring:
> > + * ? ?Eduardo Valentin <eduardo.valentin@ti.com>
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License
> > + * version 2 as published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope that it will be useful, but
> > + * WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the GNU
> > + * General Public License for more details.
> > + *
> > + */
> > +
> > +#include <linux/module.h>
> > +#include <linux/export.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/slab.h>
> > +#include <linux/io.h>
> > +#include <linux/err.h>
> > +#include <linux/of_platform.h>
> > +#include <linux/of_address.h>
> > +#include <linux/mfd/core.h>
> > +#include <linux/mfd/omap_control.h>
> > +
> > +static struct omap_control *omap_control_module;
> > +
> > +/**
> > + * omap_control_readl: Read a single omap control module register.
> > + *
> > + * @dev: device to read from.
> > + * @reg: register to read.
> > + * @val: output with register value.
> > + *
> > + * returns 0 on success or -EINVAL in case struct device is invalid.
> > + */
> > +int omap_control_readl(struct device *dev, u32 reg, u32 *val)
> > +{
> > + ? ? ? struct omap_control *omap_control = dev_get_drvdata(dev);
> > +
> > + ? ? ? if (!omap_control)
> > + ? ? ? ? ? ? ? return -EINVAL;
> > +
> > + ? ? ? *val = readl(omap_control->base + reg);
> > +
> > + ? ? ? return 0;
> > +}
> > +EXPORT_SYMBOL_GPL(omap_control_readl);
> > +
> I might have missed in the last scan, but can you let
> function return the register value.
Why?
>
> I am guessing, you did this for error case handling. You might
> want to stick to read API semantic and just have WARN_ON()
> to take care of error case.
Yeah, that was for error handling and to do not confuse register
values with error values.
>
> > +/**
> > + * omap_control_writel: Write a single omap control module register.
> > + *
> > + * @dev: device to read from.
> > + * @val: value to write.
> > + * @reg: register to write to.
> > + *
> > + * returns 0 on success or -EINVAL in case struct device is invalid.
> > + */
> > +int omap_control_writel(struct device *dev, u32 val, u32 reg)
> > +{
> > + ? ? ? struct omap_control *omap_control = dev_get_drvdata(dev);
> > + ? ? ? unsigned long flags;
> > +
> > + ? ? ? if (!omap_control)
> > + ? ? ? ? ? ? ? return -EINVAL;
> > +
> > + ? ? ? spin_lock_irqsave(&omap_control->reg_lock, flags);
> > + ? ? ? writel(val, omap_control->base + reg);
> > + ? ? ? spin_unlock_irqrestore(&omap_control->reg_lock, flags);
> > +
> > + ? ? ? return 0;
> > +}
> > +EXPORT_SYMBOL_GPL(omap_control_writel);
> > +
> > +/**
> > + * omap_control_get: returns the control module device pinter
> > + *
> > + * The modules which has to use control module API's to read or write should
> > + * call this API to get the control module device pointer.
> > + */
> > +struct device *omap_control_get(void)
> > +{
> > + ? ? ? unsigned long flags;
> > +
> > + ? ? ? if (!omap_control_module)
> > + ? ? ? ? ? ? ? return ERR_PTR(-ENODEV);
> > +
> > + ? ? ? spin_lock_irqsave(&omap_control_module->reg_lock, flags);
> > + ? ? ? omap_control_module->use_count++;
> > + ? ? ? spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
> > +
> > + ? ? ? return omap_control_module->dev;
> > +}
> > +EXPORT_SYMBOL_GPL(omap_control_get);
> > +
> > +/**
> > + * omap_control_put: returns the control module device pinter
> > + *
> > + * The modules which has to use control module API's to read or write should
> > + * call this API to get the control module device pointer.
> > + */
> > +void omap_control_put(struct device *dev)
> > +{
> > + ? ? ? struct omap_control *omap_control = dev_get_drvdata(dev);
> > + ? ? ? unsigned long flags;
> > +
> > + ? ? ? if (!omap_control)
> > + ? ? ? ? ? ? ? return;
> > +
> > + ? ? ? spin_lock_irqsave(&omap_control->reg_lock, flags);
> > + ? ? ? omap_control->use_count--;
> > + ? ? ? spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
> > +}
> > +EXPORT_SYMBOL_GPL(omap_control_put);
> > +
> > +static const struct of_device_id of_omap_control_match[] = {
> > + ? ? ? { .compatible = "ti,omap3-control", },
> > + ? ? ? { .compatible = "ti,omap4-control", },
> > + ? ? ? { .compatible = "ti,omap5-control", },
> > + ? ? ? { },
> > +};
> > +
> > +static int __devinit omap_control_probe(struct platform_device *pdev)
> > +{
> > + ? ? ? struct resource *res;
> > + ? ? ? void __iomem *base;
> > + ? ? ? struct device *dev = &pdev->dev;
> > + ? ? ? struct device_node *np = dev->of_node;
> > + ? ? ? struct omap_control *omap_control;
> > +
> > + ? ? ? omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
> > + ? ? ? if (!omap_control) {
> > + ? ? ? ? ? ? ? dev_err(dev, "not enough memory for omap_control\n");
> > + ? ? ? ? ? ? ? return -ENOMEM;
> > + ? ? ? }
> > +
> > + ? ? ? res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > + ? ? ? if (!res) {
> > + ? ? ? ? ? ? ? dev_err(dev, "missing memory base resource\n");
> > + ? ? ? ? ? ? ? return -EINVAL;
> > + ? ? ? }
> > +
> > + ? ? ? base = devm_request_and_ioremap(dev, res);
> > + ? ? ? if (!base) {
> > + ? ? ? ? ? ? ? dev_err(dev, "ioremap failed\n");
> > + ? ? ? ? ? ? ? return -EADDRNOTAVAIL;
> > + ? ? ? }
> > +
> > + ? ? ? omap_control->base = base;
> > + ? ? ? omap_control->dev = dev;
> > + ? ? ? spin_lock_init(&omap_control->reg_lock);
> > +
> > + ? ? ? platform_set_drvdata(pdev, omap_control);
> > + ? ? ? omap_control_module = omap_control;
> > +
> > + ? ? ? return of_platform_populate(np, of_omap_control_match, NULL, dev);
> > +}
> > +
>
> Will the probe get called on multiple devices and race ?
It depends. If we decide to have an early device for scm, then the probe will
be called more than once. If not, then only once.
>
> > +static int __devexit omap_control_remove(struct platform_device *pdev)
> > +{
> > + ? ? ? struct omap_control *omap_control = platform_get_drvdata(pdev);
> > +
> > + ? ? ? spin_lock(&omap_control->reg_lock);
> > + ? ? ? if (omap_control->use_count > 0) {
> > + ? ? ? ? ? ? ? spin_unlock(&omap_control->reg_lock);
> > + ? ? ? ? ? ? ? dev_err(&pdev->dev, "device removed while still being used\n");
> > + ? ? ? ? ? ? ? return -EBUSY;
> > + ? ? ? }
> > + ? ? ? spin_unlock(&omap_control->reg_lock);
> > +
> Do you really need above lock where you are just doing the
> register read. smp_rmb(), should be enough, I guess.
It is locking the use counter not a register..
>
> Regards
> Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-05-28 11:42 ` Eduardo Valentin
@ 2012-05-28 13:15 ` Shilimkar, Santosh
-1 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 13:15 UTC (permalink / raw)
To: eduardo.valentin
Cc: amit.kucheria, balbi, kishon, kbaidarov, J Keerthy, linux-pm,
linux-omap, linux-arm-kernel
On Mon, May 28, 2012 at 5:12 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> Hello,
>
> On Mon, May 28, 2012 at 03:24:01PM +0530, Shilimkar, Santosh wrote:
>> On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
>> <eduardo.valentin@ti.com> wrote:
>> > This patch introduces a MFD core device driver for
>> > OMAP system control module.
>> >
>> > The control module allows software control of
>> > various static modes supported by the device. It is
>> > composed of two control submodules: general control
>> > module and device (padconfiguration) control
>> > module.
>> >
>> > In this patch, the children defined are for:
>> > . USB-phy pin control
>> > . Bangap temperature sensor
>> >
>> > Device driver is probed with postcore_initcall.
>> > However, as some of the APIs exposed by this driver
>> > may be needed in very early init phase, an early init
>> > class is also available: "early_omap_control".
>> >
>> > Signed-off-by: J Keerthy <j-keerthy@ti.com>
>> > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> > Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
>> > ---
>>
>> [..]
>> > diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
>> > index ad95c7a..222dbad 100644
>> > --- a/arch/arm/plat-omap/Kconfig
>> > +++ b/arch/arm/plat-omap/Kconfig
>> > @@ -5,6 +5,9 @@ menu "TI OMAP Common Features"
>> > config ARCH_OMAP_OTG
>> > bool
>> >
>> > +config ARCH_HAS_CONTROL_MODULE
>> > + bool
>> > +
>> Thanks for getting rid of OMAP CONFIG here.
>
> OK. ARCH_HAS_CONTROL_MODULE is a bit too generic though..
>
>>
>> > choice
>> > prompt "OMAP System Type"
>> > default ARCH_OMAP2PLUS
>> > diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
>> > index 11e4438..25a66d8 100644
>> > --- a/drivers/mfd/Kconfig
>> > +++ b/drivers/mfd/Kconfig
>> > @@ -795,6 +795,15 @@ config MFD_WL1273_CORE
>> > driver connects the radio-wl1273 V4L2 module and the wl1273
>> > audio codec.
>> >
>> > +config MFD_OMAP_CONTROL
>> > + bool "Texas Instruments OMAP System control module"
>> > + depends on ARCH_HAS_CONTROL_MODULE
>> > + help
>> > + This is the core driver for system control module. This driver
>> > + is responsible for creating the control module mfd child,
>> > + like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
>> > + change for off mode.
>> > +
>> > config MFD_OMAP_USB_HOST
>> > bool "Support OMAP USBHS core driver"
>> > depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
>> > diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
>> > index 05fa538..00f99d6 100644
>> > --- a/drivers/mfd/Makefile
>> > +++ b/drivers/mfd/Makefile
>> > @@ -106,6 +106,7 @@ obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
>> > obj-$(CONFIG_MFD_VX855) += vx855.o
>> > obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
>> > obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
>> > +obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
>> > obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
>> > obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
>> > obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
>> > diff --git a/drivers/mfd/omap-control-core.c b/drivers/mfd/omap-control-core.c
>> > new file mode 100644
>> > index 0000000..7d8d408
>> > --- /dev/null
>> > +++ b/drivers/mfd/omap-control-core.c
>> > @@ -0,0 +1,211 @@
>> > +/*
>> > + * OMAP system control module driver file
>> > + *
>> > + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
>> > + * Contacts:
>> > + * Based on original code written by:
>> > + * J Keerthy <j-keerthy@ti.com>
>> > + * Moiz Sonasath <m-sonasath@ti.com>
>> > + * MFD clean up and re-factoring:
>> > + * Eduardo Valentin <eduardo.valentin@ti.com>
>> > + *
>> > + * This program is free software; you can redistribute it and/or
>> > + * modify it under the terms of the GNU General Public License
>> > + * version 2 as published by the Free Software Foundation.
>> > + *
>> > + * This program is distributed in the hope that it will be useful, but
>> > + * WITHOUT ANY WARRANTY; without even the implied warranty of
>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> > + * General Public License for more details.
>> > + *
>> > + */
>> > +
>> > +#include <linux/module.h>
>> > +#include <linux/export.h>
>> > +#include <linux/platform_device.h>
>> > +#include <linux/slab.h>
>> > +#include <linux/io.h>
>> > +#include <linux/err.h>
>> > +#include <linux/of_platform.h>
>> > +#include <linux/of_address.h>
>> > +#include <linux/mfd/core.h>
>> > +#include <linux/mfd/omap_control.h>
>> > +
>> > +static struct omap_control *omap_control_module;
>> > +
>> > +/**
>> > + * omap_control_readl: Read a single omap control module register.
>> > + *
>> > + * @dev: device to read from.
>> > + * @reg: register to read.
>> > + * @val: output with register value.
>> > + *
>> > + * returns 0 on success or -EINVAL in case struct device is invalid.
>> > + */
>> > +int omap_control_readl(struct device *dev, u32 reg, u32 *val)
>> > +{
>> > + struct omap_control *omap_control = dev_get_drvdata(dev);
>> > +
>> > + if (!omap_control)
>> > + return -EINVAL;
>> > +
>> > + *val = readl(omap_control->base + reg);
>> > +
>> > + return 0;
>> > +}
>> > +EXPORT_SYMBOL_GPL(omap_control_readl);
>> > +
>> I might have missed in the last scan, but can you let
>> function return the register value.
>
> Why?
>
Because thats how typical read 1 value kind of functions
look like..
>>
>> I am guessing, you did this for error case handling. You might
>> want to stick to read API semantic and just have WARN_ON()
>> to take care of error case.
>
> Yeah, that was for error handling and to do not confuse register
> values with error values.
>
No strong opinion if you like it that way but it just appeared odd to
me from a caller perspective.
>>
>> > +/**
>> > + * omap_control_writel: Write a single omap control module register.
>> > + *
>> > + * @dev: device to read from.
>> > + * @val: value to write.
>> > + * @reg: register to write to.
>> > + *
>> > + * returns 0 on success or -EINVAL in case struct device is invalid.
>> > + */
>> > +int omap_control_writel(struct device *dev, u32 val, u32 reg)
>> > +{
>> > + struct omap_control *omap_control = dev_get_drvdata(dev);
>> > + unsigned long flags;
>> > +
>> > + if (!omap_control)
>> > + return -EINVAL;
>> > +
>> > + spin_lock_irqsave(&omap_control->reg_lock, flags);
>> > + writel(val, omap_control->base + reg);
>> > + spin_unlock_irqrestore(&omap_control->reg_lock, flags);
>> > +
>> > + return 0;
>> > +}
>> > +EXPORT_SYMBOL_GPL(omap_control_writel);
>> > +
>> > +/**
>> > + * omap_control_get: returns the control module device pinter
>> > + *
>> > + * The modules which has to use control module API's to read or write should
>> > + * call this API to get the control module device pointer.
>> > + */
>> > +struct device *omap_control_get(void)
>> > +{
>> > + unsigned long flags;
>> > +
>> > + if (!omap_control_module)
>> > + return ERR_PTR(-ENODEV);
>> > +
>> > + spin_lock_irqsave(&omap_control_module->reg_lock, flags);
>> > + omap_control_module->use_count++;
>> > + spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
>> > +
>> > + return omap_control_module->dev;
>> > +}
>> > +EXPORT_SYMBOL_GPL(omap_control_get);
>> > +
>> > +/**
>> > + * omap_control_put: returns the control module device pinter
>> > + *
>> > + * The modules which has to use control module API's to read or write should
>> > + * call this API to get the control module device pointer.
>> > + */
>> > +void omap_control_put(struct device *dev)
>> > +{
>> > + struct omap_control *omap_control = dev_get_drvdata(dev);
>> > + unsigned long flags;
>> > +
>> > + if (!omap_control)
>> > + return;
>> > +
>> > + spin_lock_irqsave(&omap_control->reg_lock, flags);
>> > + omap_control->use_count--;
>> > + spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
>> > +}
>> > +EXPORT_SYMBOL_GPL(omap_control_put);
>> > +
>> > +static const struct of_device_id of_omap_control_match[] = {
>> > + { .compatible = "ti,omap3-control", },
>> > + { .compatible = "ti,omap4-control", },
>> > + { .compatible = "ti,omap5-control", },
>> > + { },
>> > +};
>> > +
>> > +static int __devinit omap_control_probe(struct platform_device *pdev)
>> > +{
>> > + struct resource *res;
>> > + void __iomem *base;
>> > + struct device *dev = &pdev->dev;
>> > + struct device_node *np = dev->of_node;
>> > + struct omap_control *omap_control;
>> > +
>> > + omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
>> > + if (!omap_control) {
>> > + dev_err(dev, "not enough memory for omap_control\n");
>> > + return -ENOMEM;
>> > + }
>> > +
>> > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> > + if (!res) {
>> > + dev_err(dev, "missing memory base resource\n");
>> > + return -EINVAL;
>> > + }
>> > +
>> > + base = devm_request_and_ioremap(dev, res);
>> > + if (!base) {
>> > + dev_err(dev, "ioremap failed\n");
>> > + return -EADDRNOTAVAIL;
>> > + }
>> > +
>> > + omap_control->base = base;
>> > + omap_control->dev = dev;
>> > + spin_lock_init(&omap_control->reg_lock);
>> > +
>> > + platform_set_drvdata(pdev, omap_control);
>> > + omap_control_module = omap_control;
>> > +
>> > + return of_platform_populate(np, of_omap_control_match, NULL, dev);
>> > +}
>> > +
>>
>> Will the probe get called on multiple devices and race ?
>
> It depends. If we decide to have an early device for scm, then the probe will
> be called more than once. If not, then only once.
>
OK. But in either case it won't race so that's fine.
>>
>> > +static int __devexit omap_control_remove(struct platform_device *pdev)
>> > +{
>> > + struct omap_control *omap_control = platform_get_drvdata(pdev);
>> > +
>> > + spin_lock(&omap_control->reg_lock);
>> > + if (omap_control->use_count > 0) {
>> > + spin_unlock(&omap_control->reg_lock);
>> > + dev_err(&pdev->dev, "device removed while still being used\n");
>> > + return -EBUSY;
>> > + }
>> > + spin_unlock(&omap_control->reg_lock);
>> > +
>> Do you really need above lock where you are just doing the
>> register read. smp_rmb(), should be enough, I guess.
>
> It is locking the use counter not a register..
>
Yes I know. But is just read and you can do away and
hence you can avoid the lock.
Regards
Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-05-28 13:15 ` Shilimkar, Santosh
0 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-05-28 13:15 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, May 28, 2012 at 5:12 PM, Eduardo Valentin
<eduardo.valentin@ti.com> wrote:
> Hello,
>
> On Mon, May 28, 2012 at 03:24:01PM +0530, Shilimkar, Santosh wrote:
>> On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
>> <eduardo.valentin@ti.com> wrote:
>> > This patch introduces a MFD core device driver for
>> > OMAP system control module.
>> >
>> > The control module allows software control of
>> > various static modes supported by the device. It is
>> > composed of two control submodules: general control
>> > module and device (padconfiguration) control
>> > module.
>> >
>> > In this patch, the children defined are for:
>> > . USB-phy pin control
>> > . Bangap temperature sensor
>> >
>> > Device driver is probed with postcore_initcall.
>> > However, as some of the APIs exposed by this driver
>> > may be needed in very early init phase, an early init
>> > class is also available: "early_omap_control".
>> >
>> > Signed-off-by: J Keerthy <j-keerthy@ti.com>
>> > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> > Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
>> > ---
>>
>> [..]
>> > diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
>> > index ad95c7a..222dbad 100644
>> > --- a/arch/arm/plat-omap/Kconfig
>> > +++ b/arch/arm/plat-omap/Kconfig
>> > @@ -5,6 +5,9 @@ menu "TI OMAP Common Features"
>> > ?config ARCH_OMAP_OTG
>> > ? ? ? ?bool
>> >
>> > +config ARCH_HAS_CONTROL_MODULE
>> > + ? ? ? bool
>> > +
>> Thanks for getting rid of OMAP CONFIG here.
>
> OK. ARCH_HAS_CONTROL_MODULE is a bit too generic though..
>
>>
>> > ?choice
>> > ? ? ? ?prompt "OMAP System Type"
>> > ? ? ? ?default ARCH_OMAP2PLUS
>> > diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
>> > index 11e4438..25a66d8 100644
>> > --- a/drivers/mfd/Kconfig
>> > +++ b/drivers/mfd/Kconfig
>> > @@ -795,6 +795,15 @@ config MFD_WL1273_CORE
>> > ? ? ? ? ?driver connects the radio-wl1273 V4L2 module and the wl1273
>> > ? ? ? ? ?audio codec.
>> >
>> > +config MFD_OMAP_CONTROL
>> > + ? ? ? bool "Texas Instruments OMAP System control module"
>> > + ? ? ? depends on ARCH_HAS_CONTROL_MODULE
>> > + ? ? ? help
>> > + ? ? ? ? This is the core driver for system control module. This driver
>> > + ? ? ? ? is responsible for creating the control module mfd child,
>> > + ? ? ? ? like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
>> > + ? ? ? ? change for off mode.
>> > +
>> > ?config MFD_OMAP_USB_HOST
>> > ? ? ? ?bool "Support OMAP USBHS core driver"
>> > ? ? ? ?depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
>> > diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
>> > index 05fa538..00f99d6 100644
>> > --- a/drivers/mfd/Makefile
>> > +++ b/drivers/mfd/Makefile
>> > @@ -106,6 +106,7 @@ obj-$(CONFIG_MFD_TPS6586X) ?+= tps6586x.o
>> > ?obj-$(CONFIG_MFD_VX855) ? ? ? ? ? ? ? ?+= vx855.o
>> > ?obj-$(CONFIG_MFD_WL1273_CORE) ?+= wl1273-core.o
>> > ?obj-$(CONFIG_MFD_CS5535) ? ? ? += cs5535-mfd.o
>> > +obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
>> > ?obj-$(CONFIG_MFD_OMAP_USB_HOST) ? ? ? ?+= omap-usb-host.o
>> > ?obj-$(CONFIG_MFD_PM8921_CORE) ?+= pm8921-core.o
>> > ?obj-$(CONFIG_MFD_PM8XXX_IRQ) ? += pm8xxx-irq.o
>> > diff --git a/drivers/mfd/omap-control-core.c b/drivers/mfd/omap-control-core.c
>> > new file mode 100644
>> > index 0000000..7d8d408
>> > --- /dev/null
>> > +++ b/drivers/mfd/omap-control-core.c
>> > @@ -0,0 +1,211 @@
>> > +/*
>> > + * OMAP system control module driver file
>> > + *
>> > + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
>> > + * Contacts:
>> > + * Based on original code written by:
>> > + * ? ?J Keerthy <j-keerthy@ti.com>
>> > + * ? ?Moiz Sonasath <m-sonasath@ti.com>
>> > + * MFD clean up and re-factoring:
>> > + * ? ?Eduardo Valentin <eduardo.valentin@ti.com>
>> > + *
>> > + * This program is free software; you can redistribute it and/or
>> > + * modify it under the terms of the GNU General Public License
>> > + * version 2 as published by the Free Software Foundation.
>> > + *
>> > + * This program is distributed in the hope that it will be useful, but
>> > + * WITHOUT ANY WARRANTY; without even the implied warranty of
>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the GNU
>> > + * General Public License for more details.
>> > + *
>> > + */
>> > +
>> > +#include <linux/module.h>
>> > +#include <linux/export.h>
>> > +#include <linux/platform_device.h>
>> > +#include <linux/slab.h>
>> > +#include <linux/io.h>
>> > +#include <linux/err.h>
>> > +#include <linux/of_platform.h>
>> > +#include <linux/of_address.h>
>> > +#include <linux/mfd/core.h>
>> > +#include <linux/mfd/omap_control.h>
>> > +
>> > +static struct omap_control *omap_control_module;
>> > +
>> > +/**
>> > + * omap_control_readl: Read a single omap control module register.
>> > + *
>> > + * @dev: device to read from.
>> > + * @reg: register to read.
>> > + * @val: output with register value.
>> > + *
>> > + * returns 0 on success or -EINVAL in case struct device is invalid.
>> > + */
>> > +int omap_control_readl(struct device *dev, u32 reg, u32 *val)
>> > +{
>> > + ? ? ? struct omap_control *omap_control = dev_get_drvdata(dev);
>> > +
>> > + ? ? ? if (!omap_control)
>> > + ? ? ? ? ? ? ? return -EINVAL;
>> > +
>> > + ? ? ? *val = readl(omap_control->base + reg);
>> > +
>> > + ? ? ? return 0;
>> > +}
>> > +EXPORT_SYMBOL_GPL(omap_control_readl);
>> > +
>> I might have missed in the last scan, but can you let
>> function return the register value.
>
> Why?
>
Because thats how typical read 1 value kind of functions
look like..
>>
>> I am guessing, you did this for error case handling. You might
>> want to stick to read API semantic and just have WARN_ON()
>> to take care of error case.
>
> Yeah, that was for error handling and to do not confuse register
> values with error values.
>
No strong opinion if you like it that way but it just appeared odd to
me from a caller perspective.
>>
>> > +/**
>> > + * omap_control_writel: Write a single omap control module register.
>> > + *
>> > + * @dev: device to read from.
>> > + * @val: value to write.
>> > + * @reg: register to write to.
>> > + *
>> > + * returns 0 on success or -EINVAL in case struct device is invalid.
>> > + */
>> > +int omap_control_writel(struct device *dev, u32 val, u32 reg)
>> > +{
>> > + ? ? ? struct omap_control *omap_control = dev_get_drvdata(dev);
>> > + ? ? ? unsigned long flags;
>> > +
>> > + ? ? ? if (!omap_control)
>> > + ? ? ? ? ? ? ? return -EINVAL;
>> > +
>> > + ? ? ? spin_lock_irqsave(&omap_control->reg_lock, flags);
>> > + ? ? ? writel(val, omap_control->base + reg);
>> > + ? ? ? spin_unlock_irqrestore(&omap_control->reg_lock, flags);
>> > +
>> > + ? ? ? return 0;
>> > +}
>> > +EXPORT_SYMBOL_GPL(omap_control_writel);
>> > +
>> > +/**
>> > + * omap_control_get: returns the control module device pinter
>> > + *
>> > + * The modules which has to use control module API's to read or write should
>> > + * call this API to get the control module device pointer.
>> > + */
>> > +struct device *omap_control_get(void)
>> > +{
>> > + ? ? ? unsigned long flags;
>> > +
>> > + ? ? ? if (!omap_control_module)
>> > + ? ? ? ? ? ? ? return ERR_PTR(-ENODEV);
>> > +
>> > + ? ? ? spin_lock_irqsave(&omap_control_module->reg_lock, flags);
>> > + ? ? ? omap_control_module->use_count++;
>> > + ? ? ? spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
>> > +
>> > + ? ? ? return omap_control_module->dev;
>> > +}
>> > +EXPORT_SYMBOL_GPL(omap_control_get);
>> > +
>> > +/**
>> > + * omap_control_put: returns the control module device pinter
>> > + *
>> > + * The modules which has to use control module API's to read or write should
>> > + * call this API to get the control module device pointer.
>> > + */
>> > +void omap_control_put(struct device *dev)
>> > +{
>> > + ? ? ? struct omap_control *omap_control = dev_get_drvdata(dev);
>> > + ? ? ? unsigned long flags;
>> > +
>> > + ? ? ? if (!omap_control)
>> > + ? ? ? ? ? ? ? return;
>> > +
>> > + ? ? ? spin_lock_irqsave(&omap_control->reg_lock, flags);
>> > + ? ? ? omap_control->use_count--;
>> > + ? ? ? spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
>> > +}
>> > +EXPORT_SYMBOL_GPL(omap_control_put);
>> > +
>> > +static const struct of_device_id of_omap_control_match[] = {
>> > + ? ? ? { .compatible = "ti,omap3-control", },
>> > + ? ? ? { .compatible = "ti,omap4-control", },
>> > + ? ? ? { .compatible = "ti,omap5-control", },
>> > + ? ? ? { },
>> > +};
>> > +
>> > +static int __devinit omap_control_probe(struct platform_device *pdev)
>> > +{
>> > + ? ? ? struct resource *res;
>> > + ? ? ? void __iomem *base;
>> > + ? ? ? struct device *dev = &pdev->dev;
>> > + ? ? ? struct device_node *np = dev->of_node;
>> > + ? ? ? struct omap_control *omap_control;
>> > +
>> > + ? ? ? omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
>> > + ? ? ? if (!omap_control) {
>> > + ? ? ? ? ? ? ? dev_err(dev, "not enough memory for omap_control\n");
>> > + ? ? ? ? ? ? ? return -ENOMEM;
>> > + ? ? ? }
>> > +
>> > + ? ? ? res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> > + ? ? ? if (!res) {
>> > + ? ? ? ? ? ? ? dev_err(dev, "missing memory base resource\n");
>> > + ? ? ? ? ? ? ? return -EINVAL;
>> > + ? ? ? }
>> > +
>> > + ? ? ? base = devm_request_and_ioremap(dev, res);
>> > + ? ? ? if (!base) {
>> > + ? ? ? ? ? ? ? dev_err(dev, "ioremap failed\n");
>> > + ? ? ? ? ? ? ? return -EADDRNOTAVAIL;
>> > + ? ? ? }
>> > +
>> > + ? ? ? omap_control->base = base;
>> > + ? ? ? omap_control->dev = dev;
>> > + ? ? ? spin_lock_init(&omap_control->reg_lock);
>> > +
>> > + ? ? ? platform_set_drvdata(pdev, omap_control);
>> > + ? ? ? omap_control_module = omap_control;
>> > +
>> > + ? ? ? return of_platform_populate(np, of_omap_control_match, NULL, dev);
>> > +}
>> > +
>>
>> Will the probe get called on multiple devices and race ?
>
> It depends. If we decide to have an early device for scm, then the probe will
> be called more than once. If not, then only once.
>
OK. But in either case it won't race so that's fine.
>>
>> > +static int __devexit omap_control_remove(struct platform_device *pdev)
>> > +{
>> > + ? ? ? struct omap_control *omap_control = platform_get_drvdata(pdev);
>> > +
>> > + ? ? ? spin_lock(&omap_control->reg_lock);
>> > + ? ? ? if (omap_control->use_count > 0) {
>> > + ? ? ? ? ? ? ? spin_unlock(&omap_control->reg_lock);
>> > + ? ? ? ? ? ? ? dev_err(&pdev->dev, "device removed while still being used\n");
>> > + ? ? ? ? ? ? ? return -EBUSY;
>> > + ? ? ? }
>> > + ? ? ? spin_unlock(&omap_control->reg_lock);
>> > +
>> Do you really need above lock where you are just doing the
>> register read. smp_rmb(), should be enough, I guess.
>
> It is locking the use counter not a register..
>
Yes I know. But is just read and you can do away and
hence you can avoid the lock.
Regards
Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 03/11] arm: omap: device: create a device for system control module
2012-05-25 12:30 ` Cousson, Benoit
@ 2012-05-29 9:44 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-29 9:44 UTC (permalink / raw)
To: Cousson, Benoit
Cc: amit.kucheria, kbaidarov, kishon, balbi, linux-pm, linux-omap,
linux-arm-kernel
On Fri, May 25, 2012 at 02:30:44PM +0200, Cousson Benoit wrote:
> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> >From: Kishon Vijay Abraham I<kishon@ti.com>
> >
> >Extracts the device data from hwmod database and create a platform device
> >using omap device build.
> >
> >The device build is done during postcore_initcall.
>
> Do you still need that since you are supporting only DT?
> The device will be built automatically in the DT case.
In fact this is not needed for DT only probing. Dropping this one.
>
> Regards,
> Benoit
>
> >
> >Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
> >Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> >---
> > arch/arm/mach-omap2/devices.c | 26 ++++++++++++++++++++++++++
> > 1 files changed, 26 insertions(+), 0 deletions(-)
> >
> >diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> >index 152c266..9332673 100644
> >--- a/arch/arm/mach-omap2/devices.c
> >+++ b/arch/arm/mach-omap2/devices.c
> >@@ -40,6 +40,32 @@
> > #define L3_MODULES_MAX_LEN 12
> > #define L3_MODULES 3
> >
> >+static int omap_init_control(void)
> >+{
> >+ struct omap_hwmod *oh;
> >+ struct platform_device *pdev;
> >+ const char *oh_name, *name;
> >+
> >+ oh_name = "ctrl_module_core";
> >+ name = "omap-control-core";
> >+
> >+ oh = omap_hwmod_lookup(oh_name);
> >+ if (!oh) {
> >+ pr_err("Could not lookup hwmod for %s\n", oh_name);
> >+ return PTR_ERR(oh);
> >+ }
> >+
> >+ pdev = omap_device_build(name, -1, oh, NULL, 0, NULL, 0, true);
> >+ if (IS_ERR(pdev)) {
> >+ pr_err("Could not build omap_device for %s %s\n",
> >+ name, oh_name);
> >+ return PTR_ERR(pdev);
> >+ }
> >+
> >+ return 0;
> >+}
> >+postcore_initcall(omap_init_control);
> >+
> > static int __init omap3_l3_init(void)
> > {
> > struct omap_hwmod *oh;
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 03/11] arm: omap: device: create a device for system control module
@ 2012-05-29 9:44 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-29 9:44 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, May 25, 2012 at 02:30:44PM +0200, Cousson Benoit wrote:
> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
> >From: Kishon Vijay Abraham I<kishon@ti.com>
> >
> >Extracts the device data from hwmod database and create a platform device
> >using omap device build.
> >
> >The device build is done during postcore_initcall.
>
> Do you still need that since you are supporting only DT?
> The device will be built automatically in the DT case.
In fact this is not needed for DT only probing. Dropping this one.
>
> Regards,
> Benoit
>
> >
> >Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
> >Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> >---
> > arch/arm/mach-omap2/devices.c | 26 ++++++++++++++++++++++++++
> > 1 files changed, 26 insertions(+), 0 deletions(-)
> >
> >diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> >index 152c266..9332673 100644
> >--- a/arch/arm/mach-omap2/devices.c
> >+++ b/arch/arm/mach-omap2/devices.c
> >@@ -40,6 +40,32 @@
> > #define L3_MODULES_MAX_LEN 12
> > #define L3_MODULES 3
> >
> >+static int omap_init_control(void)
> >+{
> >+ struct omap_hwmod *oh;
> >+ struct platform_device *pdev;
> >+ const char *oh_name, *name;
> >+
> >+ oh_name = "ctrl_module_core";
> >+ name = "omap-control-core";
> >+
> >+ oh = omap_hwmod_lookup(oh_name);
> >+ if (!oh) {
> >+ pr_err("Could not lookup hwmod for %s\n", oh_name);
> >+ return PTR_ERR(oh);
> >+ }
> >+
> >+ pdev = omap_device_build(name, -1, oh, NULL, 0, NULL, 0, true);
> >+ if (IS_ERR(pdev)) {
> >+ pr_err("Could not build omap_device for %s %s\n",
> >+ name, oh_name);
> >+ return PTR_ERR(pdev);
> >+ }
> >+
> >+ return 0;
> >+}
> >+postcore_initcall(omap_init_control);
> >+
> > static int __init omap3_l3_init(void)
> > {
> > struct omap_hwmod *oh;
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
2012-05-25 8:26 ` Eduardo Valentin
@ 2012-05-29 9:49 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-29 9:49 UTC (permalink / raw)
To: Eduardo Valentin
Cc: b-cousson, kishon, santosh.shilimkar, tony, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap
Hi, Eduardo.
On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
> This patch add device tree entries on OMAP4 based boards
> for System Control Module (SCM).
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> arch/arm/boot/dts/omap4.dtsi | 13 +++++++++++++
> 1 files changed, 13 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
> index 359c497..d2cb392 100644
> --- a/arch/arm/boot/dts/omap4.dtsi
> +++ b/arch/arm/boot/dts/omap4.dtsi
> @@ -272,5 +272,18 @@
> ti,hwmods = "mmc5";
> ti,needs-special-reset;
> };
> +
> + ctrl_module_core: ctrl_module_core@4a002000 {
> + compatible = "ti,omap4-control";
> + ti,hwmods = "ctrl_module_core";
> + bandgap {
> + compatible = "ti,omap4460-bandgap";
> + interrupts = <0 126 4>; /* talert */
> + ti,tshut-gpio = <86>; /* tshut */
> + };
I believe that CPU-specific bandgap definition should be moved to bard specific dts.
BR,
Konstantin Baydarov.
> + usb {
> + compatible = "ti,omap4-usb-phy";
> + };
> + };
> };
> };
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-05-29 9:49 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-29 9:49 UTC (permalink / raw)
To: linux-arm-kernel
Hi, Eduardo.
On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
> This patch add device tree entries on OMAP4 based boards
> for System Control Module (SCM).
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> arch/arm/boot/dts/omap4.dtsi | 13 +++++++++++++
> 1 files changed, 13 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
> index 359c497..d2cb392 100644
> --- a/arch/arm/boot/dts/omap4.dtsi
> +++ b/arch/arm/boot/dts/omap4.dtsi
> @@ -272,5 +272,18 @@
> ti,hwmods = "mmc5";
> ti,needs-special-reset;
> };
> +
> + ctrl_module_core: ctrl_module_core at 4a002000 {
> + compatible = "ti,omap4-control";
> + ti,hwmods = "ctrl_module_core";
> + bandgap {
> + compatible = "ti,omap4460-bandgap";
> + interrupts = <0 126 4>; /* talert */
> + ti,tshut-gpio = <86>; /* tshut */
> + };
I believe that CPU-specific bandgap definition should be moved to bard specific dts.
BR,
Konstantin Baydarov.
> + usb {
> + compatible = "ti,omap4-usb-phy";
> + };
> + };
> };
> };
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 10/11] omap4: thermal: add basic CPU thermal zone
2012-05-28 10:26 ` Valentin, Eduardo
@ 2012-05-29 12:54 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-29 12:54 UTC (permalink / raw)
To: Valentin, Eduardo
Cc: balbi, Shilimkar, Santosh, kishon, kbaidarov, tony, paul,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap
On 5/28/2012 12:26 PM, Valentin, Eduardo wrote:
> Hello Santosh,
>
> On Mon, May 28, 2012 at 12:48 PM, Felipe Balbi<balbi@ti.com> wrote:
>> Hi,
>>
>> On Mon, May 28, 2012 at 03:03:26PM +0530, Shilimkar, Santosh wrote:
>>> On Fri, May 25, 2012 at 1:56 PM, Eduardo Valentin
>>> <eduardo.valentin@ti.com> wrote:
>>>> This patch exposes OMAP4 thermal sensor as a thermal zone
>>>> named "cpu". Only thermal creation is done here.
>>>>
>>>> TODO:
>>>>
>>>> - Add cooling bindings
>>>> - Add extrapolation rules
>>>>
>>>> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
>>>> ---
>>>> drivers/thermal/Kconfig | 12 ++++++
>>>> drivers/thermal/Makefile | 1 +
>>>> drivers/thermal/omap-bandgap.c | 1 +
>>>> drivers/thermal/omap-bandgap.h | 12 ++++++
>>>> drivers/thermal/omap4-thermal.c | 72 +++++++++++++++++++++++++++++++++++++++
>>>> 5 files changed, 98 insertions(+), 0 deletions(-)
>>>> create mode 100644 drivers/thermal/omap4-thermal.c
>>>>
>>>> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
>>>> index ffdd240..2e82797 100644
>>>> --- a/drivers/thermal/Kconfig
>>>> +++ b/drivers/thermal/Kconfig
>>>> @@ -39,3 +39,15 @@ config OMAP_BANDGAP
>>>> This includes alert interrupts generation and also the TSHUT
>>>> support.
>>>>
>>>> +config OMAP4_THERMAL
>>>> + bool "Texas Instruments OMAP4 thermal support"
>>>> + depends on OMAP_BANDGAP
>>>> + depends on ARCH_OMAP4
>>>> + help
>>>> + If you say yes here you get thermal support for the Texas Instruments
>>>> + OMAP4 SoC family. The current chip supported are:
>>>> + - OMAP4460
>>>> +
>>> It's more of IP feature than OMAP specific, so something like
>>>
>>> config HAVE_BANDGAP_THERMAL_SUPPORT
>>>
>>> and then let processor's which support enable it. That OMAP varients
>>> in AMXX etc if needed can make use of it.
>>
>> Those are just an OMAP in disguise.
>>
>>> If you agree, then rest of the driver also can be cleaned to avoid
>>> omap_* in file names and variables.
>>>
>>> Apart from this minor comment, rest of the patch looks fine to me.
>>
>> Then it will appear as a fully generic bandgap driver, which is not the
>> case. This is really a TI thing, right ?
>
> I have to agree with Felipe here. I do see your point to have a name
> which is applicable to AMxx, but having such generic naming is not
> helping either :-( as this bandgap driver is not supposed to be
> generic.
>
> I though of "ti_bandgap.*", but still seams to be misleading..
Yeah, I guess omap_bandgap is good enough. This issues is mainly due to
the version in OMAP4 for my point of view.
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 10/11] omap4: thermal: add basic CPU thermal zone
@ 2012-05-29 12:54 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-29 12:54 UTC (permalink / raw)
To: linux-arm-kernel
On 5/28/2012 12:26 PM, Valentin, Eduardo wrote:
> Hello Santosh,
>
> On Mon, May 28, 2012 at 12:48 PM, Felipe Balbi<balbi@ti.com> wrote:
>> Hi,
>>
>> On Mon, May 28, 2012 at 03:03:26PM +0530, Shilimkar, Santosh wrote:
>>> On Fri, May 25, 2012 at 1:56 PM, Eduardo Valentin
>>> <eduardo.valentin@ti.com> wrote:
>>>> This patch exposes OMAP4 thermal sensor as a thermal zone
>>>> named "cpu". Only thermal creation is done here.
>>>>
>>>> TODO:
>>>>
>>>> - Add cooling bindings
>>>> - Add extrapolation rules
>>>>
>>>> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
>>>> ---
>>>> drivers/thermal/Kconfig | 12 ++++++
>>>> drivers/thermal/Makefile | 1 +
>>>> drivers/thermal/omap-bandgap.c | 1 +
>>>> drivers/thermal/omap-bandgap.h | 12 ++++++
>>>> drivers/thermal/omap4-thermal.c | 72 +++++++++++++++++++++++++++++++++++++++
>>>> 5 files changed, 98 insertions(+), 0 deletions(-)
>>>> create mode 100644 drivers/thermal/omap4-thermal.c
>>>>
>>>> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
>>>> index ffdd240..2e82797 100644
>>>> --- a/drivers/thermal/Kconfig
>>>> +++ b/drivers/thermal/Kconfig
>>>> @@ -39,3 +39,15 @@ config OMAP_BANDGAP
>>>> This includes alert interrupts generation and also the TSHUT
>>>> support.
>>>>
>>>> +config OMAP4_THERMAL
>>>> + bool "Texas Instruments OMAP4 thermal support"
>>>> + depends on OMAP_BANDGAP
>>>> + depends on ARCH_OMAP4
>>>> + help
>>>> + If you say yes here you get thermal support for the Texas Instruments
>>>> + OMAP4 SoC family. The current chip supported are:
>>>> + - OMAP4460
>>>> +
>>> It's more of IP feature than OMAP specific, so something like
>>>
>>> config HAVE_BANDGAP_THERMAL_SUPPORT
>>>
>>> and then let processor's which support enable it. That OMAP varients
>>> in AMXX etc if needed can make use of it.
>>
>> Those are just an OMAP in disguise.
>>
>>> If you agree, then rest of the driver also can be cleaned to avoid
>>> omap_* in file names and variables.
>>>
>>> Apart from this minor comment, rest of the patch looks fine to me.
>>
>> Then it will appear as a fully generic bandgap driver, which is not the
>> case. This is really a TI thing, right ?
>
> I have to agree with Felipe here. I do see your point to have a name
> which is applicable to AMxx, but having such generic naming is not
> helping either :-( as this bandgap driver is not supposed to be
> generic.
>
> I though of "ti_bandgap.*", but still seams to be misleading..
Yeah, I guess omap_bandgap is good enough. This issues is mainly due to
the version in OMAP4 for my point of view.
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
2012-05-28 11:16 ` Eduardo Valentin
@ 2012-05-29 13:14 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-29 13:14 UTC (permalink / raw)
To: eduardo.valentin
Cc: amit.kucheria, balbi, kishon, kbaidarov, Keerthy, linux-pm,
linux-omap, linux-arm-kernel
On 5/28/2012 1:16 PM, Eduardo Valentin wrote:
> Hello again,
>
> On Fri, May 25, 2012 at 05:49:44PM +0200, Cousson Benoit wrote:
>> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
>
> <big cut>
>
>>> +
>>> +static const struct omap_bandgap_data omap4460_data = {
>>> + .has_talert = true,
>>> + .has_tshut = true,
>>> + .fclock_name = "bandgap_ts_fclk",
>>> + .div_ck_name = "div_ts_ck",
>>
>> None of these clock data should be there ideally. You should ensure
>> that the proper device alias will be there using clkdev entries.
>
> In fact, it is a shame that it would be needed to have this entries there :-(
>
>>
>> Except that with DT, it will not work without the clock DT binding :-(
>>
>> I think Rob posted a latest update based on CCF... but for the
>> moment we are stuck :-(
>
> OK. But would it work for BG as well as it seams to be a special case?
>
>>
>>> + .conv_table = omap4460_adc_to_temp,
>>> + .sensors = {
>>> + {
>>> + .registers =&omap4460_mpu_temp_sensor_registers,
>>> + .ts_data =&omap4460_mpu_temp_sensor_data,
>>> + .domain = "cpu",
>>> + },
>>> + },
>>> + .sensor_count = 1,
>>> +};
>>> +
>>> +static const struct omap_bandgap_data omap5430_data = {
>>> + .has_talert = true,
>>> + .has_tshut = true,
>>> + .fclock_name = "ts_clk_div_ck",
>>> + .div_ck_name = "ts_clk_div_ck",
>>> + .conv_table = omap5430_adc_to_temp,
>>> + .sensors = {
>>> + {
>>> + .registers =&omap5430_mpu_temp_sensor_registers,
>>> + .ts_data =&omap5430_mpu_temp_sensor_data,
>>> + .domain = "cpu",
>>> + },
>>> + {
>>> + .registers =&omap5430_gpu_temp_sensor_registers,
>>> + .ts_data =&omap5430_gpu_temp_sensor_data,
>>> + .domain = "gpu",
>>> + },
>>> + {
>>> + .registers =&omap5430_core_temp_sensor_registers,
>>> + .ts_data =&omap5430_core_temp_sensor_data,
>>> + .domain = "core",
>>> + },
>>> + },
>>> + .sensor_count = 3,
>>
>> It can probably be replaced by a sizeof.
>
> ARRAY_SIZE prob, will check.
Ah, yes, that's one... I was looking for it for forgot the name :-)
>>> +};
>>> +
>>> +static const struct of_device_id of_omap_bandgap_match[] = {
>>> + /*
>>> + * TODO: Add support to 4430
>>> + * { .compatible = "ti,omap4430-bandgap", .data = , },
>>> + */
>>> + {
>>> + .compatible = "ti,omap4460-bandgap",
>>> + .data = (void *)&omap4460_data,
>>
>> No need to cast toward a void *.
>
> In this case, there is a need, because the omap4460_data is const but the .data field isn't. So I need to force it.
>
>>
>>> + },
>>> + {
>>> + .compatible = "ti,omap5430-bandgap",
>>> + .data = (void *)&omap5430_data,
>>> + },
>>> + /* Sentinel */
>>> + { },
>>> +};
>>> +
>>> +static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
>>> +{
>>> + struct device_node *node = pdev->dev.of_node;
>>> + const struct of_device_id *of_id;
>>> + struct omap_bandgap *bg_ptr;
>>
>> bg_ptr is not a super name.
>
> Got a better name? Just don't want a long one to avoid code bending at 80th column...
My concern was mainly with the _ptr, it looks like a Hungarian notation.
:-)...
Maybe bg only? Or omap_bg?
>
>>
>>> + u32 prop;
>>> +
>>> + /* just for the sake */
>>> + if (!node) {
>>> + dev_err(&pdev->dev, "no platform information available\n");
>>> + return ERR_PTR(-EINVAL);
>>> + }
>>
>> Not needed, just do the of_match_device here directly.
>
> Indeed...
>
>>
>>> +
>>> + bg_ptr = devm_kzalloc(&pdev->dev, sizeof(struct omap_bandgap),
>>> + GFP_KERNEL);
>>> + if (!bg_ptr) {
>>> + dev_err(&pdev->dev, "Unable to allocate mem for driver ref\n");
>>> + return ERR_PTR(-ENOMEM);
>>> + }
>>> +
>>> + of_id = of_match_device(of_omap_bandgap_match,&pdev->dev);
>>> + if (of_id)
>>> + bg_ptr->pdata = of_id->data;
>>
>> Nit: This is not really pdata anymore, so you should maybe remove
>> the "p" to avoid confusion.
>
> OK...
>
>>
>>> +
>>> + if (bg_ptr->pdata->has_tshut) {
>>> + if (of_property_read_u32(node, "ti,tshut-gpio",&prop)< 0) {
>>> + dev_err(&pdev->dev, "missing tshut gpio in device tree\n");
>>> + return ERR_PTR(-EINVAL);
>>> + }
>>> + bg_ptr->tshut_gpio = prop;
>>> + if (!gpio_is_valid(bg_ptr->tshut_gpio)) {
>>> + dev_err(&pdev->dev, "invalid gpio for tshut (%d)\n",
>>> + bg_ptr->tshut_gpio);
>>> + return ERR_PTR(-EINVAL);
>>> + }
>>> + }
>>> +
>>> + return bg_ptr;
>>> +}
>>> +
>>> +static
>>> +int __devinit omap_bandgap_probe(struct platform_device *pdev)
>>> +{
>>> + struct device *cdev = pdev->dev.parent;
>>> + struct omap_bandgap *bg_ptr;
>>> + int clk_rate, ret = 0, i;
>>> +
>>> + if (!cdev) {
>>> + dev_err(&pdev->dev, "no omap control ref in our parent\n");
>>> + return -EINVAL;
>>> + }
>>> +
>>> + bg_ptr = omap_bandgap_build(pdev);
>>> + if (IS_ERR_OR_NULL(bg_ptr)) {
>>> + dev_err(&pdev->dev, "failed to fetch platform data\n");
>>> + return PTR_ERR(bg_ptr);
>>> + }
>>> +
>>> + if (bg_ptr->pdata->has_talert) {
>>
>> Nit2: Yeah, in fact instead of pdata, "conf" or "settings" seems to
>> be more representative of what this structure really contain.
>
> conf looks good to me.
>
>>
>>> + ret = omap_bandgap_talert_init(bg_ptr, pdev);
>>> + if (ret) {
>>> + dev_err(&pdev->dev, "failed to initialize Talert IRQ\n");
>>> + return ret;
>>> + }
>>> + }
>>> +
>>> + if (bg_ptr->pdata->has_tshut) {
>>> + ret = omap_bandgap_tshut_init(bg_ptr, pdev);
>>> + if (ret) {
>>> + dev_err(&pdev->dev,
>>> + "failed to initialize system tshut IRQ\n");
>>> + goto free_talert;
>>> + }
>>> + }
>>> +
>>> + bg_ptr->fclock = clk_get(NULL, bg_ptr->pdata->fclock_name);
>>
>> That's not good to get a clock without using the local dev alias.
>> But because of lack of clock DT binding yet, I'm not sure we have
>> the choice.
>
> In fact I didn't touch the clk data on purpose and left the clock handling
> as is. On my side I didn't know how the clock struct would look like with DT,
> so, I didn't mess with it.
>
> Do you have a reference to check the work in progress for clock DT ?
Rob sent a pull request, it seems that now it is up to Mike T. :-)
http://lists-archives.com/linux-kernel/27640907-dt-clk-binding-support.html
>
>>
>>> + ret = IS_ERR_OR_NULL(bg_ptr->fclock);
>>> + if (ret) {
>>> + dev_err(&pdev->dev, "failed to request fclock reference\n");
>>> + goto free_irqs;
>>> + }
>>> +
>>> + bg_ptr->div_clk = clk_get(NULL, bg_ptr->pdata->div_ck_name);
>>> + ret = IS_ERR_OR_NULL(bg_ptr->div_clk);
>>> + if (ret) {
>>> + dev_err(&pdev->dev,
>>> + "failed to request div_ts_ck clock ref\n");
>>> + goto free_irqs;
>>> + }
>>> +
>>> + bg_ptr->conv_table = bg_ptr->pdata->conv_table;
>>> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
>>> + struct temp_sensor_registers *tsr;
>>> + u32 val;
>>> +
>>> + tsr = bg_ptr->pdata->sensors[i].registers;
>>> + /*
>>> + * check if the efuse has a non-zero value if not
>>> + * it is an untrimmed sample and the temperatures
>>> + * may not be accurate
>>> + */
>>> + ret = omap_control_readl(cdev, tsr->bgap_efuse,&val);
>>> + if (ret || !val)
>>> + dev_info(&pdev->dev,
>>> + "Non-trimmed BGAP, Temp not accurate\n");
>>> + }
>>> +
>>> + clk_rate = clk_round_rate(bg_ptr->div_clk,
>>> + bg_ptr->pdata->sensors[0].ts_data->max_freq);
>>> + if (clk_rate< bg_ptr->pdata->sensors[0].ts_data->min_freq ||
>>> + clk_rate == 0xffffffff) {
>>> + ret = -ENODEV;
>>> + goto put_clks;
>>> + }
>>> +
>>> + ret = clk_set_rate(bg_ptr->div_clk, clk_rate);
>>> + if (ret) {
>>> + dev_err(&pdev->dev, "Cannot set clock rate\n");
>>> + goto put_clks;
>>> + }
>>> +
>>> + bg_ptr->clk_rate = clk_rate;
>>> + clk_enable(bg_ptr->fclock);
>>> +
>>> + mutex_init(&bg_ptr->bg_mutex);
>>> + bg_ptr->dev =&pdev->dev;
>>> + platform_set_drvdata(pdev, bg_ptr);
>>> +
>>> + /* 1 clk cycle */
>>
>> What does that mean exactly?
>
> That's indeed a good question. I guess by default we configure the bandgap to
> wait only 1 cycle before it goes to the next read round, if in continuous mode.
OK, so some more explanation in that comment are maybe required.
Thanks,
Benoit
>
> That should get overwritten when we have, for instance, some policy initialized
> and changing the update rate based on the temperature level that the sensor is.
>
> These decisions would go under omapXX-thermal.c, BTW. Check my reply on your
> suggestion for data structure split.
>
>>
>> Regards,
>> Benoit
>>
>>> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
>>> + configure_temp_sensor_counter(bg_ptr, i, 1);
>>> +
>>> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
>>> + struct temp_sensor_data *ts_data;
>>> +
>>> + ts_data = bg_ptr->pdata->sensors[i].ts_data;
>>> +
>>> + temp_sensor_init_talert_thresholds(bg_ptr, i,
>>> + ts_data->t_hot,
>>> + ts_data->t_cold);
>>> + temp_sensor_configure_tshut_hot(bg_ptr, i,
>>> + ts_data->tshut_hot);
>>> + temp_sensor_configure_tshut_cold(bg_ptr, i,
>>> + ts_data->tshut_cold);
>>> + }
>>> +
>>> + enable_continuous_mode(bg_ptr);
>>> +
>>> + /* Set .250 seconds time as default counter */
>>> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
>>> + configure_temp_sensor_counter(bg_ptr, i,
>>> + bg_ptr->clk_rate / 4);
>>> +
>>> + /* Every thing is good? Then expose the sensors */
>>> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
>>> + char *domain;
>>> +
>>> + domain = bg_ptr->pdata->sensors[i].domain;
>>> + if (bg_ptr->pdata->expose_sensor)
>>> + bg_ptr->pdata->expose_sensor(bg_ptr, i, domain);
>>> + }
>>> +
>>> + return 0;
>>> +
>>> +put_clks:
>>> + clk_disable(bg_ptr->fclock);
>>> + clk_put(bg_ptr->fclock);
>>> + clk_put(bg_ptr->div_clk);
>>> +free_irqs:
>>> + free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
>>> + gpio_free(bg_ptr->tshut_gpio);
>>> +free_talert:
>>> + free_irq(bg_ptr->irq, bg_ptr);
>>> +
>>> + return ret;
>>> +}
>>> +
>>> +static
>>> +int __devexit omap_bandgap_remove(struct platform_device *pdev)
>>> +{
>>> + struct omap_bandgap *bg_ptr = platform_get_drvdata(pdev);
>>> +
>>> + clk_disable(bg_ptr->fclock);
>>> + clk_put(bg_ptr->fclock);
>>> + clk_put(bg_ptr->div_clk);
>>> + free_irq(bg_ptr->irq, bg_ptr);
>>> + free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
>>> + gpio_free(bg_ptr->tshut_gpio);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +#ifdef CONFIG_PM
>>> +static int omap_bandgap_save_ctxt(struct omap_bandgap *bg_ptr)
>>> +{
>>> + struct device *cdev = bg_ptr->dev->parent;
>>> + int err = 0;
>>> + int i;
>>> +
>>> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
>>> + struct temp_sensor_registers *tsr;
>>> + struct temp_sensor_regval *rval;
>>> +
>>> + rval = bg_ptr->pdata->sensors[i].regval;
>>> + tsr = bg_ptr->pdata->sensors[i].registers;
>>> +
>>> + err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,
>>> + &rval->bg_mode_ctrl);
>>> + err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,
>>> + &rval->bg_ctrl);
>>> + err |= omap_control_readl(cdev, tsr->bgap_counter,
>>> + &rval->bg_counter);
>>> + err |= omap_control_readl(cdev, tsr->bgap_threshold,
>>> + &rval->bg_threshold);
>>> + err |= omap_control_readl(cdev, tsr->tshut_threshold,
>>> + &rval->tshut_threshold);
>>> +
>>> + if (err)
>>> + dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
>>> + }
>>> +
>>> + return err ? -EIO : 0;
>>> +}
>>> +
>>> +static int
>>> +omap_bandgap_force_single_read(struct omap_bandgap *bg_ptr, int id)
>>> +{
>>> + struct device *cdev = bg_ptr->dev->parent;
>>> + struct temp_sensor_registers *tsr;
>>> + u32 temp = 0, counter = 1000;
>>> + int err;
>>> +
>>> + tsr = bg_ptr->pdata->sensors[id].registers;
>>> + /* Select single conversion mode */
>>> + err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,&temp);
>>> + temp&= ~(1<< __ffs(tsr->mode_ctrl_mask));
>>> + omap_control_writel(cdev, temp, tsr->bgap_mode_ctrl);
>>> +
>>> + /* Start of Conversion = 1 */
>>> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
>>> + temp |= 1<< __ffs(tsr->bgap_soc_mask);
>>> + omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
>>> + /* Wait until DTEMP is updated */
>>> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
>>> + temp&= (tsr->bgap_dtemp_mask);
>>> + while ((temp == 0)&& --counter) {
>>> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
>>> + temp&= (tsr->bgap_dtemp_mask);
>>> + }
>>> + /* Start of Conversion = 0 */
>>> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
>>> + temp&= ~(1<< __ffs(tsr->bgap_soc_mask));
>>> + err |= omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
>>> +
>>> + return err ? -EIO : 0;
>>> +}
>>> +
>>> +static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr)
>>> +{
>>> + struct device *cdev = bg_ptr->dev->parent;
>>> + int i, err = 0;
>>> + u32 temp = 0;
>>> +
>>> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
>>> + struct temp_sensor_registers *tsr;
>>> + struct temp_sensor_regval *rval;
>>> + u32 val;
>>> +
>>> + rval = bg_ptr->pdata->sensors[i].regval;
>>> + tsr = bg_ptr->pdata->sensors[i].registers;
>>> +
>>> + err = omap_control_readl(cdev, tsr->bgap_counter,&val);
>>> + if (val == 0) {
>>> + err |= omap_control_writel(cdev, rval->bg_threshold,
>>> + tsr->bgap_threshold);
>>> + err |= omap_control_writel(cdev, rval->tshut_threshold,
>>> + tsr->tshut_threshold);
>>> + /* Force immediate temperature measurement and update
>>> + * of the DTEMP field
>>> + */
>>> + omap_bandgap_force_single_read(bg_ptr, i);
>>> + err |= omap_control_writel(cdev, rval->bg_counter,
>>> + tsr->bgap_counter);
>>> + err |= omap_control_writel(cdev, rval->bg_mode_ctrl,
>>> + tsr->bgap_mode_ctrl);
>>> + err |= omap_control_writel(cdev, rval->bg_ctrl,
>>> + tsr->bgap_mask_ctrl);
>>> + } else {
>>> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,
>>> + &temp);
>>> + temp&= (tsr->bgap_dtemp_mask);
>>> + if (temp == 0) {
>>> + omap_bandgap_force_single_read(bg_ptr, i);
>>> + err |= omap_control_readl(cdev,
>>> + tsr->bgap_mask_ctrl,
>>> + &temp);
>>> + temp |= 1<< __ffs(tsr->mode_ctrl_mask);
>>> + err |= omap_control_writel(cdev, temp,
>>> + tsr->bgap_mask_ctrl);
>>> + }
>>> + }
>>> + if (err)
>>> + dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
>>> + }
>>> +
>>> + return err ? -EIO : 0;
>>> +}
>>> +
>>> +static int omap_bandgap_suspend(struct device *dev)
>>> +{
>>> + struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
>>> + int err;
>>> +
>>> + err = omap_bandgap_save_ctxt(bg_ptr);
>>> + clk_disable(bg_ptr->fclock);
>>> +
>>> + return err;
>>> +}
>>> +
>>> +static int omap_bandgap_resume(struct device *dev)
>>> +{
>>> + struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
>>> +
>>> + clk_enable(bg_ptr->fclock);
>>> +
>>> + return omap_bandgap_restore_ctxt(bg_ptr);
>>> +}
>>> +static const struct dev_pm_ops omap_bandgap_dev_pm_ops = {
>>> + SET_SYSTEM_SLEEP_PM_OPS(omap_bandgap_suspend,
>>> + omap_bandgap_resume)
>>> +};
>>> +
>>> +#define DEV_PM_OPS (&omap_bandgap_dev_pm_ops)
>>> +#else
>>> +#define DEV_PM_OPS NULL
>>> +#endif
>>> +
>>> +static struct platform_driver omap_bandgap_sensor_driver = {
>>> + .probe = omap_bandgap_probe,
>>> + .remove = omap_bandgap_remove,
>>> + .driver = {
>>> + .name = "omap-bandgap",
>>> + .pm = DEV_PM_OPS,
>>> + .of_match_table = of_omap_bandgap_match,
>>> + },
>>> +};
>>> +
>>> +module_platform_driver(omap_bandgap_sensor_driver);
>>> +early_platform_init("early_omap_temperature",&omap_bandgap_sensor_driver);
>>> +
>>> +MODULE_DESCRIPTION("OMAP4+ bandgap temperature sensor driver");
>>> +MODULE_LICENSE("GPL v2");
>>> +MODULE_ALIAS("platform:omap-bandgap");
>>> +MODULE_AUTHOR("Texas Instrument Inc.");
>>> diff --git a/drivers/thermal/omap-bandgap.h b/drivers/thermal/omap-bandgap.h
>>> new file mode 100644
>>> index 0000000..12e0d6b
>>> --- /dev/null
>>> +++ b/drivers/thermal/omap-bandgap.h
>>> @@ -0,0 +1,63 @@
>>> +/*
>>> + * OMAP4 Bandgap temperature sensor driver
>>> + *
>>> + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
>>> + * Contact:
>>> + * Eduardo Valentin<eduardo.valentin@ti.com>
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> + * modify it under the terms of the GNU General Public License
>>> + * version 2 as published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful, but
>>> + * WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>>> + * General Public License for more details.
>>> + *
>>> + * You should have received a copy of the GNU General Public License
>>> + * along with this program; if not, write to the Free Software
>>> + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
>>> + * 02110-1301 USA
>>> + *
>>> + */
>>> +#ifndef __OMAP_BANDGAP_H
>>> +#define __OMAP_BANDGAP_H
>>> +
>>> +struct omap_bandgap_data;
>>> +
>>> +/**
>>> + * struct omap_bandgap - bandgap device structure
>>> + * @dev: device pointer
>>> + * @pdata: platform data with sensor data
>>> + * @fclock: pointer to functional clock of temperature sensor
>>> + * @div_clk: pointer to parent clock of temperature sensor fclk
>>> + * @conv_table: Pointer to adc to temperature conversion table
>>> + * @bg_mutex: Mutex for sysfs, irq and PM
>>> + * @irq: MPU Irq number for thermal alert
>>> + * @tshut_gpio: GPIO where Tshut signal is routed
>>> + * @clk_rate: Holds current clock rate
>>> + */
>>> +struct omap_bandgap {
>>> + struct device *dev;
>>> + const struct omap_bandgap_data *pdata;
>>> + struct clk *fclock;
>>> + struct clk *div_clk;
>>> + const int *conv_table;
>>> + struct mutex bg_mutex; /* Mutex for irq and PM */
>>> + int irq;
>>> + int tshut_gpio;
>>> + u32 clk_rate;
>>> +};
>>> +
>>> +int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id, int *thot);
>>> +int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val);
>>> +int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id, int *tcold);
>>> +int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val);
>>> +int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
>>> + int *interval);
>>> +int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr, int id,
>>> + u32 interval);
>>> +int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
>>> + int *temperature);
>>> +
>>> +#endif
>>
>
> ---
> Eduardo
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
@ 2012-05-29 13:14 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-29 13:14 UTC (permalink / raw)
To: linux-arm-kernel
On 5/28/2012 1:16 PM, Eduardo Valentin wrote:
> Hello again,
>
> On Fri, May 25, 2012 at 05:49:44PM +0200, Cousson Benoit wrote:
>> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
>
> <big cut>
>
>>> +
>>> +static const struct omap_bandgap_data omap4460_data = {
>>> + .has_talert = true,
>>> + .has_tshut = true,
>>> + .fclock_name = "bandgap_ts_fclk",
>>> + .div_ck_name = "div_ts_ck",
>>
>> None of these clock data should be there ideally. You should ensure
>> that the proper device alias will be there using clkdev entries.
>
> In fact, it is a shame that it would be needed to have this entries there :-(
>
>>
>> Except that with DT, it will not work without the clock DT binding :-(
>>
>> I think Rob posted a latest update based on CCF... but for the
>> moment we are stuck :-(
>
> OK. But would it work for BG as well as it seams to be a special case?
>
>>
>>> + .conv_table = omap4460_adc_to_temp,
>>> + .sensors = {
>>> + {
>>> + .registers =&omap4460_mpu_temp_sensor_registers,
>>> + .ts_data =&omap4460_mpu_temp_sensor_data,
>>> + .domain = "cpu",
>>> + },
>>> + },
>>> + .sensor_count = 1,
>>> +};
>>> +
>>> +static const struct omap_bandgap_data omap5430_data = {
>>> + .has_talert = true,
>>> + .has_tshut = true,
>>> + .fclock_name = "ts_clk_div_ck",
>>> + .div_ck_name = "ts_clk_div_ck",
>>> + .conv_table = omap5430_adc_to_temp,
>>> + .sensors = {
>>> + {
>>> + .registers =&omap5430_mpu_temp_sensor_registers,
>>> + .ts_data =&omap5430_mpu_temp_sensor_data,
>>> + .domain = "cpu",
>>> + },
>>> + {
>>> + .registers =&omap5430_gpu_temp_sensor_registers,
>>> + .ts_data =&omap5430_gpu_temp_sensor_data,
>>> + .domain = "gpu",
>>> + },
>>> + {
>>> + .registers =&omap5430_core_temp_sensor_registers,
>>> + .ts_data =&omap5430_core_temp_sensor_data,
>>> + .domain = "core",
>>> + },
>>> + },
>>> + .sensor_count = 3,
>>
>> It can probably be replaced by a sizeof.
>
> ARRAY_SIZE prob, will check.
Ah, yes, that's one... I was looking for it for forgot the name :-)
>>> +};
>>> +
>>> +static const struct of_device_id of_omap_bandgap_match[] = {
>>> + /*
>>> + * TODO: Add support to 4430
>>> + * { .compatible = "ti,omap4430-bandgap", .data = , },
>>> + */
>>> + {
>>> + .compatible = "ti,omap4460-bandgap",
>>> + .data = (void *)&omap4460_data,
>>
>> No need to cast toward a void *.
>
> In this case, there is a need, because the omap4460_data is const but the .data field isn't. So I need to force it.
>
>>
>>> + },
>>> + {
>>> + .compatible = "ti,omap5430-bandgap",
>>> + .data = (void *)&omap5430_data,
>>> + },
>>> + /* Sentinel */
>>> + { },
>>> +};
>>> +
>>> +static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
>>> +{
>>> + struct device_node *node = pdev->dev.of_node;
>>> + const struct of_device_id *of_id;
>>> + struct omap_bandgap *bg_ptr;
>>
>> bg_ptr is not a super name.
>
> Got a better name? Just don't want a long one to avoid code bending at 80th column...
My concern was mainly with the _ptr, it looks like a Hungarian notation.
:-)...
Maybe bg only? Or omap_bg?
>
>>
>>> + u32 prop;
>>> +
>>> + /* just for the sake */
>>> + if (!node) {
>>> + dev_err(&pdev->dev, "no platform information available\n");
>>> + return ERR_PTR(-EINVAL);
>>> + }
>>
>> Not needed, just do the of_match_device here directly.
>
> Indeed...
>
>>
>>> +
>>> + bg_ptr = devm_kzalloc(&pdev->dev, sizeof(struct omap_bandgap),
>>> + GFP_KERNEL);
>>> + if (!bg_ptr) {
>>> + dev_err(&pdev->dev, "Unable to allocate mem for driver ref\n");
>>> + return ERR_PTR(-ENOMEM);
>>> + }
>>> +
>>> + of_id = of_match_device(of_omap_bandgap_match,&pdev->dev);
>>> + if (of_id)
>>> + bg_ptr->pdata = of_id->data;
>>
>> Nit: This is not really pdata anymore, so you should maybe remove
>> the "p" to avoid confusion.
>
> OK...
>
>>
>>> +
>>> + if (bg_ptr->pdata->has_tshut) {
>>> + if (of_property_read_u32(node, "ti,tshut-gpio",&prop)< 0) {
>>> + dev_err(&pdev->dev, "missing tshut gpio in device tree\n");
>>> + return ERR_PTR(-EINVAL);
>>> + }
>>> + bg_ptr->tshut_gpio = prop;
>>> + if (!gpio_is_valid(bg_ptr->tshut_gpio)) {
>>> + dev_err(&pdev->dev, "invalid gpio for tshut (%d)\n",
>>> + bg_ptr->tshut_gpio);
>>> + return ERR_PTR(-EINVAL);
>>> + }
>>> + }
>>> +
>>> + return bg_ptr;
>>> +}
>>> +
>>> +static
>>> +int __devinit omap_bandgap_probe(struct platform_device *pdev)
>>> +{
>>> + struct device *cdev = pdev->dev.parent;
>>> + struct omap_bandgap *bg_ptr;
>>> + int clk_rate, ret = 0, i;
>>> +
>>> + if (!cdev) {
>>> + dev_err(&pdev->dev, "no omap control ref in our parent\n");
>>> + return -EINVAL;
>>> + }
>>> +
>>> + bg_ptr = omap_bandgap_build(pdev);
>>> + if (IS_ERR_OR_NULL(bg_ptr)) {
>>> + dev_err(&pdev->dev, "failed to fetch platform data\n");
>>> + return PTR_ERR(bg_ptr);
>>> + }
>>> +
>>> + if (bg_ptr->pdata->has_talert) {
>>
>> Nit2: Yeah, in fact instead of pdata, "conf" or "settings" seems to
>> be more representative of what this structure really contain.
>
> conf looks good to me.
>
>>
>>> + ret = omap_bandgap_talert_init(bg_ptr, pdev);
>>> + if (ret) {
>>> + dev_err(&pdev->dev, "failed to initialize Talert IRQ\n");
>>> + return ret;
>>> + }
>>> + }
>>> +
>>> + if (bg_ptr->pdata->has_tshut) {
>>> + ret = omap_bandgap_tshut_init(bg_ptr, pdev);
>>> + if (ret) {
>>> + dev_err(&pdev->dev,
>>> + "failed to initialize system tshut IRQ\n");
>>> + goto free_talert;
>>> + }
>>> + }
>>> +
>>> + bg_ptr->fclock = clk_get(NULL, bg_ptr->pdata->fclock_name);
>>
>> That's not good to get a clock without using the local dev alias.
>> But because of lack of clock DT binding yet, I'm not sure we have
>> the choice.
>
> In fact I didn't touch the clk data on purpose and left the clock handling
> as is. On my side I didn't know how the clock struct would look like with DT,
> so, I didn't mess with it.
>
> Do you have a reference to check the work in progress for clock DT ?
Rob sent a pull request, it seems that now it is up to Mike T. :-)
http://lists-archives.com/linux-kernel/27640907-dt-clk-binding-support.html
>
>>
>>> + ret = IS_ERR_OR_NULL(bg_ptr->fclock);
>>> + if (ret) {
>>> + dev_err(&pdev->dev, "failed to request fclock reference\n");
>>> + goto free_irqs;
>>> + }
>>> +
>>> + bg_ptr->div_clk = clk_get(NULL, bg_ptr->pdata->div_ck_name);
>>> + ret = IS_ERR_OR_NULL(bg_ptr->div_clk);
>>> + if (ret) {
>>> + dev_err(&pdev->dev,
>>> + "failed to request div_ts_ck clock ref\n");
>>> + goto free_irqs;
>>> + }
>>> +
>>> + bg_ptr->conv_table = bg_ptr->pdata->conv_table;
>>> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
>>> + struct temp_sensor_registers *tsr;
>>> + u32 val;
>>> +
>>> + tsr = bg_ptr->pdata->sensors[i].registers;
>>> + /*
>>> + * check if the efuse has a non-zero value if not
>>> + * it is an untrimmed sample and the temperatures
>>> + * may not be accurate
>>> + */
>>> + ret = omap_control_readl(cdev, tsr->bgap_efuse,&val);
>>> + if (ret || !val)
>>> + dev_info(&pdev->dev,
>>> + "Non-trimmed BGAP, Temp not accurate\n");
>>> + }
>>> +
>>> + clk_rate = clk_round_rate(bg_ptr->div_clk,
>>> + bg_ptr->pdata->sensors[0].ts_data->max_freq);
>>> + if (clk_rate< bg_ptr->pdata->sensors[0].ts_data->min_freq ||
>>> + clk_rate == 0xffffffff) {
>>> + ret = -ENODEV;
>>> + goto put_clks;
>>> + }
>>> +
>>> + ret = clk_set_rate(bg_ptr->div_clk, clk_rate);
>>> + if (ret) {
>>> + dev_err(&pdev->dev, "Cannot set clock rate\n");
>>> + goto put_clks;
>>> + }
>>> +
>>> + bg_ptr->clk_rate = clk_rate;
>>> + clk_enable(bg_ptr->fclock);
>>> +
>>> + mutex_init(&bg_ptr->bg_mutex);
>>> + bg_ptr->dev =&pdev->dev;
>>> + platform_set_drvdata(pdev, bg_ptr);
>>> +
>>> + /* 1 clk cycle */
>>
>> What does that mean exactly?
>
> That's indeed a good question. I guess by default we configure the bandgap to
> wait only 1 cycle before it goes to the next read round, if in continuous mode.
OK, so some more explanation in that comment are maybe required.
Thanks,
Benoit
>
> That should get overwritten when we have, for instance, some policy initialized
> and changing the update rate based on the temperature level that the sensor is.
>
> These decisions would go under omapXX-thermal.c, BTW. Check my reply on your
> suggestion for data structure split.
>
>>
>> Regards,
>> Benoit
>>
>>> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
>>> + configure_temp_sensor_counter(bg_ptr, i, 1);
>>> +
>>> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
>>> + struct temp_sensor_data *ts_data;
>>> +
>>> + ts_data = bg_ptr->pdata->sensors[i].ts_data;
>>> +
>>> + temp_sensor_init_talert_thresholds(bg_ptr, i,
>>> + ts_data->t_hot,
>>> + ts_data->t_cold);
>>> + temp_sensor_configure_tshut_hot(bg_ptr, i,
>>> + ts_data->tshut_hot);
>>> + temp_sensor_configure_tshut_cold(bg_ptr, i,
>>> + ts_data->tshut_cold);
>>> + }
>>> +
>>> + enable_continuous_mode(bg_ptr);
>>> +
>>> + /* Set .250 seconds time as default counter */
>>> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++)
>>> + configure_temp_sensor_counter(bg_ptr, i,
>>> + bg_ptr->clk_rate / 4);
>>> +
>>> + /* Every thing is good? Then expose the sensors */
>>> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
>>> + char *domain;
>>> +
>>> + domain = bg_ptr->pdata->sensors[i].domain;
>>> + if (bg_ptr->pdata->expose_sensor)
>>> + bg_ptr->pdata->expose_sensor(bg_ptr, i, domain);
>>> + }
>>> +
>>> + return 0;
>>> +
>>> +put_clks:
>>> + clk_disable(bg_ptr->fclock);
>>> + clk_put(bg_ptr->fclock);
>>> + clk_put(bg_ptr->div_clk);
>>> +free_irqs:
>>> + free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
>>> + gpio_free(bg_ptr->tshut_gpio);
>>> +free_talert:
>>> + free_irq(bg_ptr->irq, bg_ptr);
>>> +
>>> + return ret;
>>> +}
>>> +
>>> +static
>>> +int __devexit omap_bandgap_remove(struct platform_device *pdev)
>>> +{
>>> + struct omap_bandgap *bg_ptr = platform_get_drvdata(pdev);
>>> +
>>> + clk_disable(bg_ptr->fclock);
>>> + clk_put(bg_ptr->fclock);
>>> + clk_put(bg_ptr->div_clk);
>>> + free_irq(bg_ptr->irq, bg_ptr);
>>> + free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
>>> + gpio_free(bg_ptr->tshut_gpio);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +#ifdef CONFIG_PM
>>> +static int omap_bandgap_save_ctxt(struct omap_bandgap *bg_ptr)
>>> +{
>>> + struct device *cdev = bg_ptr->dev->parent;
>>> + int err = 0;
>>> + int i;
>>> +
>>> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
>>> + struct temp_sensor_registers *tsr;
>>> + struct temp_sensor_regval *rval;
>>> +
>>> + rval = bg_ptr->pdata->sensors[i].regval;
>>> + tsr = bg_ptr->pdata->sensors[i].registers;
>>> +
>>> + err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,
>>> + &rval->bg_mode_ctrl);
>>> + err |= omap_control_readl(cdev, tsr->bgap_mask_ctrl,
>>> + &rval->bg_ctrl);
>>> + err |= omap_control_readl(cdev, tsr->bgap_counter,
>>> + &rval->bg_counter);
>>> + err |= omap_control_readl(cdev, tsr->bgap_threshold,
>>> + &rval->bg_threshold);
>>> + err |= omap_control_readl(cdev, tsr->tshut_threshold,
>>> + &rval->tshut_threshold);
>>> +
>>> + if (err)
>>> + dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
>>> + }
>>> +
>>> + return err ? -EIO : 0;
>>> +}
>>> +
>>> +static int
>>> +omap_bandgap_force_single_read(struct omap_bandgap *bg_ptr, int id)
>>> +{
>>> + struct device *cdev = bg_ptr->dev->parent;
>>> + struct temp_sensor_registers *tsr;
>>> + u32 temp = 0, counter = 1000;
>>> + int err;
>>> +
>>> + tsr = bg_ptr->pdata->sensors[id].registers;
>>> + /* Select single conversion mode */
>>> + err = omap_control_readl(cdev, tsr->bgap_mode_ctrl,&temp);
>>> + temp&= ~(1<< __ffs(tsr->mode_ctrl_mask));
>>> + omap_control_writel(cdev, temp, tsr->bgap_mode_ctrl);
>>> +
>>> + /* Start of Conversion = 1 */
>>> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
>>> + temp |= 1<< __ffs(tsr->bgap_soc_mask);
>>> + omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
>>> + /* Wait until DTEMP is updated */
>>> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
>>> + temp&= (tsr->bgap_dtemp_mask);
>>> + while ((temp == 0)&& --counter) {
>>> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
>>> + temp&= (tsr->bgap_dtemp_mask);
>>> + }
>>> + /* Start of Conversion = 0 */
>>> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,&temp);
>>> + temp&= ~(1<< __ffs(tsr->bgap_soc_mask));
>>> + err |= omap_control_writel(cdev, temp, tsr->temp_sensor_ctrl);
>>> +
>>> + return err ? -EIO : 0;
>>> +}
>>> +
>>> +static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr)
>>> +{
>>> + struct device *cdev = bg_ptr->dev->parent;
>>> + int i, err = 0;
>>> + u32 temp = 0;
>>> +
>>> + for (i = 0; i< bg_ptr->pdata->sensor_count; i++) {
>>> + struct temp_sensor_registers *tsr;
>>> + struct temp_sensor_regval *rval;
>>> + u32 val;
>>> +
>>> + rval = bg_ptr->pdata->sensors[i].regval;
>>> + tsr = bg_ptr->pdata->sensors[i].registers;
>>> +
>>> + err = omap_control_readl(cdev, tsr->bgap_counter,&val);
>>> + if (val == 0) {
>>> + err |= omap_control_writel(cdev, rval->bg_threshold,
>>> + tsr->bgap_threshold);
>>> + err |= omap_control_writel(cdev, rval->tshut_threshold,
>>> + tsr->tshut_threshold);
>>> + /* Force immediate temperature measurement and update
>>> + * of the DTEMP field
>>> + */
>>> + omap_bandgap_force_single_read(bg_ptr, i);
>>> + err |= omap_control_writel(cdev, rval->bg_counter,
>>> + tsr->bgap_counter);
>>> + err |= omap_control_writel(cdev, rval->bg_mode_ctrl,
>>> + tsr->bgap_mode_ctrl);
>>> + err |= omap_control_writel(cdev, rval->bg_ctrl,
>>> + tsr->bgap_mask_ctrl);
>>> + } else {
>>> + err |= omap_control_readl(cdev, tsr->temp_sensor_ctrl,
>>> + &temp);
>>> + temp&= (tsr->bgap_dtemp_mask);
>>> + if (temp == 0) {
>>> + omap_bandgap_force_single_read(bg_ptr, i);
>>> + err |= omap_control_readl(cdev,
>>> + tsr->bgap_mask_ctrl,
>>> + &temp);
>>> + temp |= 1<< __ffs(tsr->mode_ctrl_mask);
>>> + err |= omap_control_writel(cdev, temp,
>>> + tsr->bgap_mask_ctrl);
>>> + }
>>> + }
>>> + if (err)
>>> + dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
>>> + }
>>> +
>>> + return err ? -EIO : 0;
>>> +}
>>> +
>>> +static int omap_bandgap_suspend(struct device *dev)
>>> +{
>>> + struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
>>> + int err;
>>> +
>>> + err = omap_bandgap_save_ctxt(bg_ptr);
>>> + clk_disable(bg_ptr->fclock);
>>> +
>>> + return err;
>>> +}
>>> +
>>> +static int omap_bandgap_resume(struct device *dev)
>>> +{
>>> + struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
>>> +
>>> + clk_enable(bg_ptr->fclock);
>>> +
>>> + return omap_bandgap_restore_ctxt(bg_ptr);
>>> +}
>>> +static const struct dev_pm_ops omap_bandgap_dev_pm_ops = {
>>> + SET_SYSTEM_SLEEP_PM_OPS(omap_bandgap_suspend,
>>> + omap_bandgap_resume)
>>> +};
>>> +
>>> +#define DEV_PM_OPS (&omap_bandgap_dev_pm_ops)
>>> +#else
>>> +#define DEV_PM_OPS NULL
>>> +#endif
>>> +
>>> +static struct platform_driver omap_bandgap_sensor_driver = {
>>> + .probe = omap_bandgap_probe,
>>> + .remove = omap_bandgap_remove,
>>> + .driver = {
>>> + .name = "omap-bandgap",
>>> + .pm = DEV_PM_OPS,
>>> + .of_match_table = of_omap_bandgap_match,
>>> + },
>>> +};
>>> +
>>> +module_platform_driver(omap_bandgap_sensor_driver);
>>> +early_platform_init("early_omap_temperature",&omap_bandgap_sensor_driver);
>>> +
>>> +MODULE_DESCRIPTION("OMAP4+ bandgap temperature sensor driver");
>>> +MODULE_LICENSE("GPL v2");
>>> +MODULE_ALIAS("platform:omap-bandgap");
>>> +MODULE_AUTHOR("Texas Instrument Inc.");
>>> diff --git a/drivers/thermal/omap-bandgap.h b/drivers/thermal/omap-bandgap.h
>>> new file mode 100644
>>> index 0000000..12e0d6b
>>> --- /dev/null
>>> +++ b/drivers/thermal/omap-bandgap.h
>>> @@ -0,0 +1,63 @@
>>> +/*
>>> + * OMAP4 Bandgap temperature sensor driver
>>> + *
>>> + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
>>> + * Contact:
>>> + * Eduardo Valentin<eduardo.valentin@ti.com>
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> + * modify it under the terms of the GNU General Public License
>>> + * version 2 as published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful, but
>>> + * WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>>> + * General Public License for more details.
>>> + *
>>> + * You should have received a copy of the GNU General Public License
>>> + * along with this program; if not, write to the Free Software
>>> + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
>>> + * 02110-1301 USA
>>> + *
>>> + */
>>> +#ifndef __OMAP_BANDGAP_H
>>> +#define __OMAP_BANDGAP_H
>>> +
>>> +struct omap_bandgap_data;
>>> +
>>> +/**
>>> + * struct omap_bandgap - bandgap device structure
>>> + * @dev: device pointer
>>> + * @pdata: platform data with sensor data
>>> + * @fclock: pointer to functional clock of temperature sensor
>>> + * @div_clk: pointer to parent clock of temperature sensor fclk
>>> + * @conv_table: Pointer to adc to temperature conversion table
>>> + * @bg_mutex: Mutex for sysfs, irq and PM
>>> + * @irq: MPU Irq number for thermal alert
>>> + * @tshut_gpio: GPIO where Tshut signal is routed
>>> + * @clk_rate: Holds current clock rate
>>> + */
>>> +struct omap_bandgap {
>>> + struct device *dev;
>>> + const struct omap_bandgap_data *pdata;
>>> + struct clk *fclock;
>>> + struct clk *div_clk;
>>> + const int *conv_table;
>>> + struct mutex bg_mutex; /* Mutex for irq and PM */
>>> + int irq;
>>> + int tshut_gpio;
>>> + u32 clk_rate;
>>> +};
>>> +
>>> +int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id, int *thot);
>>> +int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val);
>>> +int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id, int *tcold);
>>> +int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val);
>>> +int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
>>> + int *interval);
>>> +int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr, int id,
>>> + u32 interval);
>>> +int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
>>> + int *temperature);
>>> +
>>> +#endif
>>
>
> ---
> Eduardo
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-05-28 11:35 ` Eduardo Valentin
@ 2012-05-29 13:25 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-29 13:25 UTC (permalink / raw)
To: eduardo.valentin
Cc: amit.kucheria, balbi, kishon, kbaidarov, J Keerthy, linux-pm,
linux-omap, linux-arm-kernel
On 5/28/2012 1:35 PM, Eduardo Valentin wrote:
> Hello,
>
> On Fri, May 25, 2012 at 02:52:08PM +0200, Cousson Benoit wrote:
>> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
>>> This patch introduces a MFD core device driver for
>>> OMAP system control module.
>>>
>>> The control module allows software control of
>>> various static modes supported by the device. It is
>>> composed of two control submodules: general control
>>> module and device (padconfiguration) control
>>> module.
>>>
>>> In this patch, the children defined are for:
>>> . USB-phy pin control
>>> . Bangap temperature sensor
>>>
>>> Device driver is probed with postcore_initcall.
>>> However, as some of the APIs exposed by this driver
>>> may be needed in very early init phase, an early init
>>> class is also available: "early_omap_control".
>>>
>>> Signed-off-by: J Keerthy<j-keerthy@ti.com>
>>> Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
>>> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
>>> ---
>>> .../devicetree/bindings/mfd/omap_control.txt | 44 ++++
>>> arch/arm/mach-omap2/Kconfig | 1 +
>>> arch/arm/plat-omap/Kconfig | 3 +
>>> drivers/mfd/Kconfig | 9 +
>>> drivers/mfd/Makefile | 1 +
>>> drivers/mfd/omap-control-core.c | 211 ++++++++++++++++++++
>>> include/linux/mfd/omap_control.h | 69 +++++++
>>> 7 files changed, 338 insertions(+), 0 deletions(-)
>>> create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
>>> create mode 100644 drivers/mfd/omap-control-core.c
>>> create mode 100644 include/linux/mfd/omap_control.h
>>>
>>> diff --git a/Documentation/devicetree/bindings/mfd/omap_control.txt b/Documentation/devicetree/bindings/mfd/omap_control.txt
>>> new file mode 100644
>>> index 0000000..46d5e7e
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/mfd/omap_control.txt
>>> @@ -0,0 +1,44 @@
>>> +* Texas Instrument OMAP System Control Module (SCM) bindings
>>> +
>>> +The control module allows software control of various static modes supported by
>>> +the device. The control module controls the settings of various device modules
>>> +through register configuration and internal signals. It also controls the pad
>>> +configuration, pin functional multiplexing, and the routing of internal signals
>>> +(such as PRCM signals or DMA requests) to output pins configured for hardware
>>> +observability.
>>> +
>>> +Required properties:
>>> +- compatible : Should be:
>>> + - "ti,omap3-control" for OMAP3 support
>>> + - "ti,omap4-control" for OMAP4 support
>>> + - "ti,omap5-control" for OMAP5 support
>>> +
>>> +OMAP specific properties:
>>> +- ti,hwmods: Name of the hwmod associated to the control module:
>>> + Should be "ctrl_module_core";
>>> +
>>> +Sub-nodes:
>>> +- bandgap : contains the bandgap node
>>> +
>>> + The bindings details of individual bandgap device can be found in:
>>> + Documentation/devicetree/bindings/thermal/omap_bandgap.txt
>>> +
>>> +- usb : contains the usb phy pin control node
>>> +
>>> + The only required property for this child is:
>>> + - compatible = "ti,omap4-control-usb";
>>> +
>>> +Examples:
>>> +
>>> +ctrl_module_core: ctrl_module_core@4a002000 {
>>> + compatible = "ti,omap4-control";
>>> + ti,hwmods = "ctrl_module_core";
>>> + bandgap {
>>> + compatible = "ti,omap4460-bandgap";
>>> + interrupts =<0 126 4>; /* talert */
>>> + ti,tshut-gpio =<86>; /* tshut */
>>> + };
>>> + usb {
>>> + compatible = "ti,omap4-usb-phy";
>>> + };
>>> +};
>>> diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
>>> index a2b946d..7dfe5e1 100644
>>> --- a/arch/arm/mach-omap2/Kconfig
>>> +++ b/arch/arm/mach-omap2/Kconfig
>>> @@ -52,6 +52,7 @@ config ARCH_OMAP4
>>> select PL310_ERRATA_727915
>>> select ARM_ERRATA_720789
>>> select ARCH_HAS_OPP
>>> + select ARCH_HAS_CONTROL_MODULE
>>> select PM_OPP if PM
>>> select USB_ARCH_HAS_EHCI if USB_SUPPORT
>>> select ARM_CPU_SUSPEND if PM
>>> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
>>> index ad95c7a..222dbad 100644
>>> --- a/arch/arm/plat-omap/Kconfig
>>> +++ b/arch/arm/plat-omap/Kconfig
>>> @@ -5,6 +5,9 @@ menu "TI OMAP Common Features"
>>> config ARCH_OMAP_OTG
>>> bool
>>>
>>> +config ARCH_HAS_CONTROL_MODULE
>>> + bool
>>> +
>>> choice
>>> prompt "OMAP System Type"
>>> default ARCH_OMAP2PLUS
>>> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
>>> index 11e4438..25a66d8 100644
>>> --- a/drivers/mfd/Kconfig
>>> +++ b/drivers/mfd/Kconfig
>>> @@ -795,6 +795,15 @@ config MFD_WL1273_CORE
>>> driver connects the radio-wl1273 V4L2 module and the wl1273
>>> audio codec.
>>>
>>> +config MFD_OMAP_CONTROL
>>> + bool "Texas Instruments OMAP System control module"
>>> + depends on ARCH_HAS_CONTROL_MODULE
>>> + help
>>> + This is the core driver for system control module. This driver
>>> + is responsible for creating the control module mfd child,
>>> + like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
>>> + change for off mode.
>>> +
>>> config MFD_OMAP_USB_HOST
>>> bool "Support OMAP USBHS core driver"
>>> depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
>>> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
>>> index 05fa538..00f99d6 100644
>>> --- a/drivers/mfd/Makefile
>>> +++ b/drivers/mfd/Makefile
>>> @@ -106,6 +106,7 @@ obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
>>> obj-$(CONFIG_MFD_VX855) += vx855.o
>>> obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
>>> obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
>>> +obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
>>> obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
>>> obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
>>> obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
>>> diff --git a/drivers/mfd/omap-control-core.c b/drivers/mfd/omap-control-core.c
>>> new file mode 100644
>>> index 0000000..7d8d408
>>> --- /dev/null
>>> +++ b/drivers/mfd/omap-control-core.c
>>> @@ -0,0 +1,211 @@
>>> +/*
>>> + * OMAP system control module driver file
>>> + *
>>> + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
>>> + * Contacts:
>>> + * Based on original code written by:
>>> + * J Keerthy<j-keerthy@ti.com>
>>> + * Moiz Sonasath<m-sonasath@ti.com>
>>> + * MFD clean up and re-factoring:
>>> + * Eduardo Valentin<eduardo.valentin@ti.com>
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> + * modify it under the terms of the GNU General Public License
>>> + * version 2 as published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful, but
>>> + * WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>>> + * General Public License for more details.
>>> + *
>>> + */
>>> +
>>> +#include<linux/module.h>
>>> +#include<linux/export.h>
>>> +#include<linux/platform_device.h>
>>> +#include<linux/slab.h>
>>> +#include<linux/io.h>
>>> +#include<linux/err.h>
>>> +#include<linux/of_platform.h>
>>> +#include<linux/of_address.h>
>>> +#include<linux/mfd/core.h>
>>> +#include<linux/mfd/omap_control.h>
>>> +
>>> +static struct omap_control *omap_control_module;
>>
>> Mmm, we can have up to 4 control module instances in OMAP4.
>>
>> Well, I'm not sure it worth considering them as separate devices. Is
>> that your plan as well?
>
> At least for now I was focusing on the ctrl_module_core ...
OK, that's a good start already :-)
>> But since they all have different base address, it will be trick to
>> handle them with only a single entry.
>
> Indeed. We can always add the support latter on.
>
> I am not sure what would be the best way to handle those instances though,
> and how they are going to expose APIs. Would need to have an instance bound
> to API set?
We should not go to that path I guess. We should have an API at children
level independent of the underlying control module partitioning.
Regards,
Benoit
>>> +
>>> +/**
>>> + * omap_control_readl: Read a single omap control module register.
>>> + *
>>> + * @dev: device to read from.
>>> + * @reg: register to read.
>>> + * @val: output with register value.
>>> + *
>>> + * returns 0 on success or -EINVAL in case struct device is invalid.
>>> + */
>>> +int omap_control_readl(struct device *dev, u32 reg, u32 *val)
>>> +{
>>> + struct omap_control *omap_control = dev_get_drvdata(dev);
>>> +
>>> + if (!omap_control)
>>> + return -EINVAL;
>>> +
>>> + *val = readl(omap_control->base + reg);
>>> +
>>> + return 0;
>>> +}
>>> +EXPORT_SYMBOL_GPL(omap_control_readl);
>>> +
>>> +/**
>>> + * omap_control_writel: Write a single omap control module register.
>>> + *
>>> + * @dev: device to read from.
>>> + * @val: value to write.
>>> + * @reg: register to write to.
>>> + *
>>> + * returns 0 on success or -EINVAL in case struct device is invalid.
>>> + */
>>> +int omap_control_writel(struct device *dev, u32 val, u32 reg)
>>> +{
>>> + struct omap_control *omap_control = dev_get_drvdata(dev);
>>> + unsigned long flags;
>>> +
>>> + if (!omap_control)
>>> + return -EINVAL;
>>> +
>>> + spin_lock_irqsave(&omap_control->reg_lock, flags);
>>> + writel(val, omap_control->base + reg);
>>> + spin_unlock_irqrestore(&omap_control->reg_lock, flags);
>>> +
>>> + return 0;
>>> +}
>>> +EXPORT_SYMBOL_GPL(omap_control_writel);
>>> +
>>> +/**
>>> + * omap_control_get: returns the control module device pinter
>>
>> typo
>
> K
>
>>
>>> + *
>>> + * The modules which has to use control module API's to read or write should
>>> + * call this API to get the control module device pointer.
>>> + */
>>> +struct device *omap_control_get(void)
>>> +{
>>> + unsigned long flags;
>>> +
>>> + if (!omap_control_module)
>>> + return ERR_PTR(-ENODEV);
>>> +
>>> + spin_lock_irqsave(&omap_control_module->reg_lock, flags);
>>> + omap_control_module->use_count++;
>>> + spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
>>
>> Don't we do have some better way to increment atomically a variable
>> in Linux.
>
> Yeah we have, atomic API. In general I think the SCM/bangap/phy APIs
> need to be revisited WRT locking, in general.
>
>>
>>> +
>>> + return omap_control_module->dev;
>>> +}
>>> +EXPORT_SYMBOL_GPL(omap_control_get);
>>> +
>>> +/**
>>> + * omap_control_put: returns the control module device pinter
>>> + *
>>> + * The modules which has to use control module API's to read or write should
>>> + * call this API to get the control module device pointer.
>>> + */
>>> +void omap_control_put(struct device *dev)
>>> +{
>>> + struct omap_control *omap_control = dev_get_drvdata(dev);
>>> + unsigned long flags;
>>> +
>>> + if (!omap_control)
>>> + return;
>>> +
>>> + spin_lock_irqsave(&omap_control->reg_lock, flags);
>>> + omap_control->use_count--;
>>> + spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
>>> +}
>>> +EXPORT_SYMBOL_GPL(omap_control_put);
>>> +
>>> +static const struct of_device_id of_omap_control_match[] = {
>>> + { .compatible = "ti,omap3-control", },
>>> + { .compatible = "ti,omap4-control", },
>>> + { .compatible = "ti,omap5-control", },
>>> + { },
>>> +};
>>> +
>>> +static int __devinit omap_control_probe(struct platform_device *pdev)
>>> +{
>>> + struct resource *res;
>>> + void __iomem *base;
>>> + struct device *dev =&pdev->dev;
>>> + struct device_node *np = dev->of_node;
>>> + struct omap_control *omap_control;
>>
>> Maybe omap_control_data instead? At least if this is drvdata only.
>> If this is supposed to be the *handle* to the control module
>> instance, it should be fine.
>
> That's suppose to be the phandle :-)
>
>>
>>> +
>>> + omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
>>> + if (!omap_control) {
>>> + dev_err(dev, "not enough memory for omap_control\n");
>>> + return -ENOMEM;
>>> + }
>>> +
>>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>>> + if (!res) {
>>> + dev_err(dev, "missing memory base resource\n");
>>> + return -EINVAL;
>>> + }
>>> +
>>> + base = devm_request_and_ioremap(dev, res);
>>> + if (!base) {
>>> + dev_err(dev, "ioremap failed\n");
>>> + return -EADDRNOTAVAIL;
>>> + }
>>> +
>>> + omap_control->base = base;
>>> + omap_control->dev = dev;
>>> + spin_lock_init(&omap_control->reg_lock);
>>> +
>>> + platform_set_drvdata(pdev, omap_control);
>>> + omap_control_module = omap_control;
>>> +
>>> + return of_platform_populate(np, of_omap_control_match, NULL, dev);
>>> +}
>>> +
>>> +static int __devexit omap_control_remove(struct platform_device *pdev)
>>> +{
>>> + struct omap_control *omap_control = platform_get_drvdata(pdev);
>>> +
>>> + spin_lock(&omap_control->reg_lock);
>>> + if (omap_control->use_count> 0) {
>>> + spin_unlock(&omap_control->reg_lock);
>>> + dev_err(&pdev->dev, "device removed while still being used\n");
>>> + return -EBUSY;
>>> + }
>>> + spin_unlock(&omap_control->reg_lock);
>>> +
>>> + iounmap(omap_control->base);
>>> + platform_set_drvdata(pdev, NULL);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static struct platform_driver omap_control_driver = {
>>> + .probe = omap_control_probe,
>>> + .remove = __devexit_p(omap_control_remove),
>>> + .driver = {
>>> + .name = "omap-control-core",
>>> + .owner = THIS_MODULE,
>>> + .of_match_table = of_omap_control_match,
>>> + },
>>> +};
>>> +
>>> +static int __init omap_control_init(void)
>>> +{
>>> + return platform_driver_register(&omap_control_driver);
>>> +}
>>> +postcore_initcall_sync(omap_control_init);
>>> +
>>> +static void __exit omap_control_exit(void)
>>> +{
>>> + platform_driver_unregister(&omap_control_driver);
>>> +}
>>> +module_exit(omap_control_exit);
>>> +early_platform_init("early_omap_control",&omap_control_driver);
>>> +
>>> +MODULE_DESCRIPTION("OMAP system control module driver");
>>> +MODULE_LICENSE("GPL v2");
>>> +MODULE_ALIAS("platform:omap-control-core");
>>> +MODULE_AUTHOR("Texas Instruments Inc.");
>>> diff --git a/include/linux/mfd/omap_control.h b/include/linux/mfd/omap_control.h
>>> new file mode 100644
>>> index 0000000..7a33eda
>>> --- /dev/null
>>> +++ b/include/linux/mfd/omap_control.h
>>> @@ -0,0 +1,69 @@
>>> +/*
>>> + * OMAP system control module header file
>>> + *
>>> + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
>>> + * Contact:
>>> + * J Keerthy<j-keerthy@ti.com>
>>> + * Moiz Sonasath<m-sonasath@ti.com>
>>> + * Abraham, Kishon Vijay<kishon@ti.com>
>>> + * Eduardo Valentin<eduardo.valentin@ti.com>
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> + * modify it under the terms of the GNU General Public License
>>> + * version 2 as published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful, but
>>> + * WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>>> + * General Public License for more details.
>>> + *
>>> + */
>>> +
>>> +#ifndef __DRIVERS_OMAP_CONTROL_H
>>> +#define __DRIVERS_OMAP_CONTROL_H
>>> +
>>> +#include<linux/err.h>
>>> +
>>> +/**
>>> + * struct system control module - scm device structure
>>> + * @dev: device pointer
>>> + * @base: Base of the temp I/O
>>> + * @reg_lock: protect omap_control structure
>>> + * @use_count: track API users
>>> + */
>>> +struct omap_control {
>>> + struct device *dev;
>>
>> Do you really need the dev?
>> You API is device based and not omap_control based, so it should not
>> be needed.
>>
>> I guess we should be consistent here. We can store the devices and
>> used a device based API or store the omap_control and thus expose a
>> omap_control API.
>
> Yeah, this API structure is left over of the previous driver.
>
> The omap_control_get returns the SCM device reference
> and the users of SCM use it as parameter for the SCM APIs.
>
> We need to have in mind that, for SCM, the users are:
> a. Its children (USB phy, BG, etc)
> b. Non children users (mach code)
>
> The refcounting and the locking needs to take care of both I'd say.
> The struct dev was just a way to pass the SCM phandle.
>
>>
>> Regards,
>> Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-05-29 13:25 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-29 13:25 UTC (permalink / raw)
To: linux-arm-kernel
On 5/28/2012 1:35 PM, Eduardo Valentin wrote:
> Hello,
>
> On Fri, May 25, 2012 at 02:52:08PM +0200, Cousson Benoit wrote:
>> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
>>> This patch introduces a MFD core device driver for
>>> OMAP system control module.
>>>
>>> The control module allows software control of
>>> various static modes supported by the device. It is
>>> composed of two control submodules: general control
>>> module and device (padconfiguration) control
>>> module.
>>>
>>> In this patch, the children defined are for:
>>> . USB-phy pin control
>>> . Bangap temperature sensor
>>>
>>> Device driver is probed with postcore_initcall.
>>> However, as some of the APIs exposed by this driver
>>> may be needed in very early init phase, an early init
>>> class is also available: "early_omap_control".
>>>
>>> Signed-off-by: J Keerthy<j-keerthy@ti.com>
>>> Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
>>> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
>>> ---
>>> .../devicetree/bindings/mfd/omap_control.txt | 44 ++++
>>> arch/arm/mach-omap2/Kconfig | 1 +
>>> arch/arm/plat-omap/Kconfig | 3 +
>>> drivers/mfd/Kconfig | 9 +
>>> drivers/mfd/Makefile | 1 +
>>> drivers/mfd/omap-control-core.c | 211 ++++++++++++++++++++
>>> include/linux/mfd/omap_control.h | 69 +++++++
>>> 7 files changed, 338 insertions(+), 0 deletions(-)
>>> create mode 100644 Documentation/devicetree/bindings/mfd/omap_control.txt
>>> create mode 100644 drivers/mfd/omap-control-core.c
>>> create mode 100644 include/linux/mfd/omap_control.h
>>>
>>> diff --git a/Documentation/devicetree/bindings/mfd/omap_control.txt b/Documentation/devicetree/bindings/mfd/omap_control.txt
>>> new file mode 100644
>>> index 0000000..46d5e7e
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/mfd/omap_control.txt
>>> @@ -0,0 +1,44 @@
>>> +* Texas Instrument OMAP System Control Module (SCM) bindings
>>> +
>>> +The control module allows software control of various static modes supported by
>>> +the device. The control module controls the settings of various device modules
>>> +through register configuration and internal signals. It also controls the pad
>>> +configuration, pin functional multiplexing, and the routing of internal signals
>>> +(such as PRCM signals or DMA requests) to output pins configured for hardware
>>> +observability.
>>> +
>>> +Required properties:
>>> +- compatible : Should be:
>>> + - "ti,omap3-control" for OMAP3 support
>>> + - "ti,omap4-control" for OMAP4 support
>>> + - "ti,omap5-control" for OMAP5 support
>>> +
>>> +OMAP specific properties:
>>> +- ti,hwmods: Name of the hwmod associated to the control module:
>>> + Should be "ctrl_module_core";
>>> +
>>> +Sub-nodes:
>>> +- bandgap : contains the bandgap node
>>> +
>>> + The bindings details of individual bandgap device can be found in:
>>> + Documentation/devicetree/bindings/thermal/omap_bandgap.txt
>>> +
>>> +- usb : contains the usb phy pin control node
>>> +
>>> + The only required property for this child is:
>>> + - compatible = "ti,omap4-control-usb";
>>> +
>>> +Examples:
>>> +
>>> +ctrl_module_core: ctrl_module_core at 4a002000 {
>>> + compatible = "ti,omap4-control";
>>> + ti,hwmods = "ctrl_module_core";
>>> + bandgap {
>>> + compatible = "ti,omap4460-bandgap";
>>> + interrupts =<0 126 4>; /* talert */
>>> + ti,tshut-gpio =<86>; /* tshut */
>>> + };
>>> + usb {
>>> + compatible = "ti,omap4-usb-phy";
>>> + };
>>> +};
>>> diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
>>> index a2b946d..7dfe5e1 100644
>>> --- a/arch/arm/mach-omap2/Kconfig
>>> +++ b/arch/arm/mach-omap2/Kconfig
>>> @@ -52,6 +52,7 @@ config ARCH_OMAP4
>>> select PL310_ERRATA_727915
>>> select ARM_ERRATA_720789
>>> select ARCH_HAS_OPP
>>> + select ARCH_HAS_CONTROL_MODULE
>>> select PM_OPP if PM
>>> select USB_ARCH_HAS_EHCI if USB_SUPPORT
>>> select ARM_CPU_SUSPEND if PM
>>> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
>>> index ad95c7a..222dbad 100644
>>> --- a/arch/arm/plat-omap/Kconfig
>>> +++ b/arch/arm/plat-omap/Kconfig
>>> @@ -5,6 +5,9 @@ menu "TI OMAP Common Features"
>>> config ARCH_OMAP_OTG
>>> bool
>>>
>>> +config ARCH_HAS_CONTROL_MODULE
>>> + bool
>>> +
>>> choice
>>> prompt "OMAP System Type"
>>> default ARCH_OMAP2PLUS
>>> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
>>> index 11e4438..25a66d8 100644
>>> --- a/drivers/mfd/Kconfig
>>> +++ b/drivers/mfd/Kconfig
>>> @@ -795,6 +795,15 @@ config MFD_WL1273_CORE
>>> driver connects the radio-wl1273 V4L2 module and the wl1273
>>> audio codec.
>>>
>>> +config MFD_OMAP_CONTROL
>>> + bool "Texas Instruments OMAP System control module"
>>> + depends on ARCH_HAS_CONTROL_MODULE
>>> + help
>>> + This is the core driver for system control module. This driver
>>> + is responsible for creating the control module mfd child,
>>> + like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
>>> + change for off mode.
>>> +
>>> config MFD_OMAP_USB_HOST
>>> bool "Support OMAP USBHS core driver"
>>> depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
>>> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
>>> index 05fa538..00f99d6 100644
>>> --- a/drivers/mfd/Makefile
>>> +++ b/drivers/mfd/Makefile
>>> @@ -106,6 +106,7 @@ obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
>>> obj-$(CONFIG_MFD_VX855) += vx855.o
>>> obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
>>> obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
>>> +obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
>>> obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
>>> obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
>>> obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
>>> diff --git a/drivers/mfd/omap-control-core.c b/drivers/mfd/omap-control-core.c
>>> new file mode 100644
>>> index 0000000..7d8d408
>>> --- /dev/null
>>> +++ b/drivers/mfd/omap-control-core.c
>>> @@ -0,0 +1,211 @@
>>> +/*
>>> + * OMAP system control module driver file
>>> + *
>>> + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
>>> + * Contacts:
>>> + * Based on original code written by:
>>> + * J Keerthy<j-keerthy@ti.com>
>>> + * Moiz Sonasath<m-sonasath@ti.com>
>>> + * MFD clean up and re-factoring:
>>> + * Eduardo Valentin<eduardo.valentin@ti.com>
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> + * modify it under the terms of the GNU General Public License
>>> + * version 2 as published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful, but
>>> + * WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>>> + * General Public License for more details.
>>> + *
>>> + */
>>> +
>>> +#include<linux/module.h>
>>> +#include<linux/export.h>
>>> +#include<linux/platform_device.h>
>>> +#include<linux/slab.h>
>>> +#include<linux/io.h>
>>> +#include<linux/err.h>
>>> +#include<linux/of_platform.h>
>>> +#include<linux/of_address.h>
>>> +#include<linux/mfd/core.h>
>>> +#include<linux/mfd/omap_control.h>
>>> +
>>> +static struct omap_control *omap_control_module;
>>
>> Mmm, we can have up to 4 control module instances in OMAP4.
>>
>> Well, I'm not sure it worth considering them as separate devices. Is
>> that your plan as well?
>
> At least for now I was focusing on the ctrl_module_core ...
OK, that's a good start already :-)
>> But since they all have different base address, it will be trick to
>> handle them with only a single entry.
>
> Indeed. We can always add the support latter on.
>
> I am not sure what would be the best way to handle those instances though,
> and how they are going to expose APIs. Would need to have an instance bound
> to API set?
We should not go to that path I guess. We should have an API at children
level independent of the underlying control module partitioning.
Regards,
Benoit
>>> +
>>> +/**
>>> + * omap_control_readl: Read a single omap control module register.
>>> + *
>>> + * @dev: device to read from.
>>> + * @reg: register to read.
>>> + * @val: output with register value.
>>> + *
>>> + * returns 0 on success or -EINVAL in case struct device is invalid.
>>> + */
>>> +int omap_control_readl(struct device *dev, u32 reg, u32 *val)
>>> +{
>>> + struct omap_control *omap_control = dev_get_drvdata(dev);
>>> +
>>> + if (!omap_control)
>>> + return -EINVAL;
>>> +
>>> + *val = readl(omap_control->base + reg);
>>> +
>>> + return 0;
>>> +}
>>> +EXPORT_SYMBOL_GPL(omap_control_readl);
>>> +
>>> +/**
>>> + * omap_control_writel: Write a single omap control module register.
>>> + *
>>> + * @dev: device to read from.
>>> + * @val: value to write.
>>> + * @reg: register to write to.
>>> + *
>>> + * returns 0 on success or -EINVAL in case struct device is invalid.
>>> + */
>>> +int omap_control_writel(struct device *dev, u32 val, u32 reg)
>>> +{
>>> + struct omap_control *omap_control = dev_get_drvdata(dev);
>>> + unsigned long flags;
>>> +
>>> + if (!omap_control)
>>> + return -EINVAL;
>>> +
>>> + spin_lock_irqsave(&omap_control->reg_lock, flags);
>>> + writel(val, omap_control->base + reg);
>>> + spin_unlock_irqrestore(&omap_control->reg_lock, flags);
>>> +
>>> + return 0;
>>> +}
>>> +EXPORT_SYMBOL_GPL(omap_control_writel);
>>> +
>>> +/**
>>> + * omap_control_get: returns the control module device pinter
>>
>> typo
>
> K
>
>>
>>> + *
>>> + * The modules which has to use control module API's to read or write should
>>> + * call this API to get the control module device pointer.
>>> + */
>>> +struct device *omap_control_get(void)
>>> +{
>>> + unsigned long flags;
>>> +
>>> + if (!omap_control_module)
>>> + return ERR_PTR(-ENODEV);
>>> +
>>> + spin_lock_irqsave(&omap_control_module->reg_lock, flags);
>>> + omap_control_module->use_count++;
>>> + spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
>>
>> Don't we do have some better way to increment atomically a variable
>> in Linux.
>
> Yeah we have, atomic API. In general I think the SCM/bangap/phy APIs
> need to be revisited WRT locking, in general.
>
>>
>>> +
>>> + return omap_control_module->dev;
>>> +}
>>> +EXPORT_SYMBOL_GPL(omap_control_get);
>>> +
>>> +/**
>>> + * omap_control_put: returns the control module device pinter
>>> + *
>>> + * The modules which has to use control module API's to read or write should
>>> + * call this API to get the control module device pointer.
>>> + */
>>> +void omap_control_put(struct device *dev)
>>> +{
>>> + struct omap_control *omap_control = dev_get_drvdata(dev);
>>> + unsigned long flags;
>>> +
>>> + if (!omap_control)
>>> + return;
>>> +
>>> + spin_lock_irqsave(&omap_control->reg_lock, flags);
>>> + omap_control->use_count--;
>>> + spin_unlock_irqrestore(&omap_control_module->reg_lock, flags);
>>> +}
>>> +EXPORT_SYMBOL_GPL(omap_control_put);
>>> +
>>> +static const struct of_device_id of_omap_control_match[] = {
>>> + { .compatible = "ti,omap3-control", },
>>> + { .compatible = "ti,omap4-control", },
>>> + { .compatible = "ti,omap5-control", },
>>> + { },
>>> +};
>>> +
>>> +static int __devinit omap_control_probe(struct platform_device *pdev)
>>> +{
>>> + struct resource *res;
>>> + void __iomem *base;
>>> + struct device *dev =&pdev->dev;
>>> + struct device_node *np = dev->of_node;
>>> + struct omap_control *omap_control;
>>
>> Maybe omap_control_data instead? At least if this is drvdata only.
>> If this is supposed to be the *handle* to the control module
>> instance, it should be fine.
>
> That's suppose to be the phandle :-)
>
>>
>>> +
>>> + omap_control = devm_kzalloc(dev, sizeof(*omap_control), GFP_KERNEL);
>>> + if (!omap_control) {
>>> + dev_err(dev, "not enough memory for omap_control\n");
>>> + return -ENOMEM;
>>> + }
>>> +
>>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>>> + if (!res) {
>>> + dev_err(dev, "missing memory base resource\n");
>>> + return -EINVAL;
>>> + }
>>> +
>>> + base = devm_request_and_ioremap(dev, res);
>>> + if (!base) {
>>> + dev_err(dev, "ioremap failed\n");
>>> + return -EADDRNOTAVAIL;
>>> + }
>>> +
>>> + omap_control->base = base;
>>> + omap_control->dev = dev;
>>> + spin_lock_init(&omap_control->reg_lock);
>>> +
>>> + platform_set_drvdata(pdev, omap_control);
>>> + omap_control_module = omap_control;
>>> +
>>> + return of_platform_populate(np, of_omap_control_match, NULL, dev);
>>> +}
>>> +
>>> +static int __devexit omap_control_remove(struct platform_device *pdev)
>>> +{
>>> + struct omap_control *omap_control = platform_get_drvdata(pdev);
>>> +
>>> + spin_lock(&omap_control->reg_lock);
>>> + if (omap_control->use_count> 0) {
>>> + spin_unlock(&omap_control->reg_lock);
>>> + dev_err(&pdev->dev, "device removed while still being used\n");
>>> + return -EBUSY;
>>> + }
>>> + spin_unlock(&omap_control->reg_lock);
>>> +
>>> + iounmap(omap_control->base);
>>> + platform_set_drvdata(pdev, NULL);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static struct platform_driver omap_control_driver = {
>>> + .probe = omap_control_probe,
>>> + .remove = __devexit_p(omap_control_remove),
>>> + .driver = {
>>> + .name = "omap-control-core",
>>> + .owner = THIS_MODULE,
>>> + .of_match_table = of_omap_control_match,
>>> + },
>>> +};
>>> +
>>> +static int __init omap_control_init(void)
>>> +{
>>> + return platform_driver_register(&omap_control_driver);
>>> +}
>>> +postcore_initcall_sync(omap_control_init);
>>> +
>>> +static void __exit omap_control_exit(void)
>>> +{
>>> + platform_driver_unregister(&omap_control_driver);
>>> +}
>>> +module_exit(omap_control_exit);
>>> +early_platform_init("early_omap_control",&omap_control_driver);
>>> +
>>> +MODULE_DESCRIPTION("OMAP system control module driver");
>>> +MODULE_LICENSE("GPL v2");
>>> +MODULE_ALIAS("platform:omap-control-core");
>>> +MODULE_AUTHOR("Texas Instruments Inc.");
>>> diff --git a/include/linux/mfd/omap_control.h b/include/linux/mfd/omap_control.h
>>> new file mode 100644
>>> index 0000000..7a33eda
>>> --- /dev/null
>>> +++ b/include/linux/mfd/omap_control.h
>>> @@ -0,0 +1,69 @@
>>> +/*
>>> + * OMAP system control module header file
>>> + *
>>> + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
>>> + * Contact:
>>> + * J Keerthy<j-keerthy@ti.com>
>>> + * Moiz Sonasath<m-sonasath@ti.com>
>>> + * Abraham, Kishon Vijay<kishon@ti.com>
>>> + * Eduardo Valentin<eduardo.valentin@ti.com>
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> + * modify it under the terms of the GNU General Public License
>>> + * version 2 as published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful, but
>>> + * WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>>> + * General Public License for more details.
>>> + *
>>> + */
>>> +
>>> +#ifndef __DRIVERS_OMAP_CONTROL_H
>>> +#define __DRIVERS_OMAP_CONTROL_H
>>> +
>>> +#include<linux/err.h>
>>> +
>>> +/**
>>> + * struct system control module - scm device structure
>>> + * @dev: device pointer
>>> + * @base: Base of the temp I/O
>>> + * @reg_lock: protect omap_control structure
>>> + * @use_count: track API users
>>> + */
>>> +struct omap_control {
>>> + struct device *dev;
>>
>> Do you really need the dev?
>> You API is device based and not omap_control based, so it should not
>> be needed.
>>
>> I guess we should be consistent here. We can store the devices and
>> used a device based API or store the omap_control and thus expose a
>> omap_control API.
>
> Yeah, this API structure is left over of the previous driver.
>
> The omap_control_get returns the SCM device reference
> and the users of SCM use it as parameter for the SCM APIs.
>
> We need to have in mind that, for SCM, the users are:
> a. Its children (USB phy, BG, etc)
> b. Non children users (mach code)
>
> The refcounting and the locking needs to take care of both I'd say.
> The struct dev was just a way to pass the SCM phandle.
>
>>
>> Regards,
>> Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-05-28 13:15 ` Shilimkar, Santosh
@ 2012-05-29 13:31 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-29 13:31 UTC (permalink / raw)
To: Shilimkar, Santosh
Cc: amit.kucheria, balbi, kishon, kbaidarov, J Keerthy, linux-pm,
linux-omap, linux-arm-kernel
On 5/28/2012 3:15 PM, Shilimkar, Santosh wrote:
> On Mon, May 28, 2012 at 5:12 PM, Eduardo Valentin
[...]
>>>> +/**
>>>> + * omap_control_readl: Read a single omap control module register.
>>>> + *
>>>> + * @dev: device to read from.
>>>> + * @reg: register to read.
>>>> + * @val: output with register value.
>>>> + *
>>>> + * returns 0 on success or -EINVAL in case struct device is invalid.
>>>> + */
>>>> +int omap_control_readl(struct device *dev, u32 reg, u32 *val)
>>>> +{
>>>> + struct omap_control *omap_control = dev_get_drvdata(dev);
>>>> +
>>>> + if (!omap_control)
>>>> + return -EINVAL;
>>>> +
>>>> + *val = readl(omap_control->base + reg);
>>>> +
>>>> + return 0;
>>>> +}
>>>> +EXPORT_SYMBOL_GPL(omap_control_readl);
>>>> +
>>> I might have missed in the last scan, but can you let
>>> function return the register value.
>>
>> Why?
>>
> Because thats how typical read 1 value kind of functions
> look like..
Yeah, I tend to agree with Santosh here as well. I'm expecting such API
to return the value.
Moreover the error handling in that case is really an exception and thus
a WARM is enough since it should never ever happen except if there is a
bug during the probe. And in that case, it should already fail at probe
time.
>>> I am guessing, you did this for error case handling. You might
>>> want to stick to read API semantic and just have WARN_ON()
>>> to take care of error case.
>>
>> Yeah, that was for error handling and to do not confuse register
>> values with error values.
>>
> No strong opinion if you like it that way but it just appeared odd to
> me from a caller perspective.
Yep, I do agree.
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-05-29 13:31 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-29 13:31 UTC (permalink / raw)
To: linux-arm-kernel
On 5/28/2012 3:15 PM, Shilimkar, Santosh wrote:
> On Mon, May 28, 2012 at 5:12 PM, Eduardo Valentin
[...]
>>>> +/**
>>>> + * omap_control_readl: Read a single omap control module register.
>>>> + *
>>>> + * @dev: device to read from.
>>>> + * @reg: register to read.
>>>> + * @val: output with register value.
>>>> + *
>>>> + * returns 0 on success or -EINVAL in case struct device is invalid.
>>>> + */
>>>> +int omap_control_readl(struct device *dev, u32 reg, u32 *val)
>>>> +{
>>>> + struct omap_control *omap_control = dev_get_drvdata(dev);
>>>> +
>>>> + if (!omap_control)
>>>> + return -EINVAL;
>>>> +
>>>> + *val = readl(omap_control->base + reg);
>>>> +
>>>> + return 0;
>>>> +}
>>>> +EXPORT_SYMBOL_GPL(omap_control_readl);
>>>> +
>>> I might have missed in the last scan, but can you let
>>> function return the register value.
>>
>> Why?
>>
> Because thats how typical read 1 value kind of functions
> look like..
Yeah, I tend to agree with Santosh here as well. I'm expecting such API
to return the value.
Moreover the error handling in that case is really an exception and thus
a WARM is enough since it should never ever happen except if there is a
bug during the probe. And in that case, it should already fail at probe
time.
>>> I am guessing, you did this for error case handling. You might
>>> want to stick to read API semantic and just have WARN_ON()
>>> to take care of error case.
>>
>> Yeah, that was for error handling and to do not confuse register
>> values with error values.
>>
> No strong opinion if you like it that way but it just appeared odd to
> me from a caller perspective.
Yep, I do agree.
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 03/11] arm: omap: device: create a device for system control module
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-05-29 13:39 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-29 13:39 UTC (permalink / raw)
To: Eduardo Valentin
Cc: b-cousson, kishon, santosh.shilimkar, tony, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Konstantin Baydarov
Hi.
On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
> From: Kishon Vijay Abraham I <kishon@ti.com>
>
> Extracts the device data from hwmod database and create a platform device
> using omap device build.
>
> The device build is done during postcore_initcall.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/devices.c | 26 ++++++++++++++++++++++++++
> 1 files changed, 26 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> index 152c266..9332673 100644
> --- a/arch/arm/mach-omap2/devices.c
> +++ b/arch/arm/mach-omap2/devices.c
> @@ -40,6 +40,32 @@
> #define L3_MODULES_MAX_LEN 12
> #define L3_MODULES 3
>
> +static int omap_init_control(void)
> +{
> + struct omap_hwmod *oh;
> + struct platform_device *pdev;
> + const char *oh_name, *name;
> +
> + oh_name = "ctrl_module_core";
> + name = "omap-control-core";
> +
> + oh = omap_hwmod_lookup(oh_name);
> + if (!oh) {
> + pr_err("Could not lookup hwmod for %s\n", oh_name);
> + return PTR_ERR(oh);
> + }
> +
> + pdev = omap_device_build(name, -1, oh, NULL, 0, NULL, 0, true);
I noticed that control module omap device is created and configured according to following idle flags:
static struct omap_hwmod_class_sysconfig omap44xx_ctrl_module_sysc = {
.rev_offs = 0x0000,
.sysc_offs = 0x0010,
.sysc_flags = SYSC_HAS_SIDLEMODE,
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
SIDLE_SMART_WKUP),
.sysc_fields = &omap_hwmod_sysc_type2,
};
IIUC, ".idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | SIDLE_SMART_WKUP)" means that CONTROL_GEN_CORE idlemode will be set to
"0x2,0x3: Clock is automatically gated when there is no access to the Control Module through L4-interconnect". See CONTROL_GEN_CORE_SYSCONFIG register.
So IIUC theoretically CONTROL_GEN_CORE module clock can be automatically gated. Recalling that CONTROL_GEN_CORE module has an THERMAL_ALERT interrupt that is used by the bandgap driver, I'm wondering if the THERMAL_ALERT interrupt will be fired when CONTROL_GEN_CORE module clock is gated?
Probably bandgap driver should set CONTROL_GEN_CORE idle mode to SIDLE_NO, to prevent loosing THERMAL_ALERT interrupt?
BR,
Konstantin Baydarov.
> + if (IS_ERR(pdev)) {
> + pr_err("Could not build omap_device for %s %s\n",
> + name, oh_name);
> + return PTR_ERR(pdev);
> + }
> +
> + return 0;
> +}
> +postcore_initcall(omap_init_control);
> +
> static int __init omap3_l3_init(void)
> {
> struct omap_hwmod *oh;
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 03/11] arm: omap: device: create a device for system control module
@ 2012-05-29 13:39 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-29 13:39 UTC (permalink / raw)
To: linux-arm-kernel
Hi.
On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
> From: Kishon Vijay Abraham I <kishon@ti.com>
>
> Extracts the device data from hwmod database and create a platform device
> using omap device build.
>
> The device build is done during postcore_initcall.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/devices.c | 26 ++++++++++++++++++++++++++
> 1 files changed, 26 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> index 152c266..9332673 100644
> --- a/arch/arm/mach-omap2/devices.c
> +++ b/arch/arm/mach-omap2/devices.c
> @@ -40,6 +40,32 @@
> #define L3_MODULES_MAX_LEN 12
> #define L3_MODULES 3
>
> +static int omap_init_control(void)
> +{
> + struct omap_hwmod *oh;
> + struct platform_device *pdev;
> + const char *oh_name, *name;
> +
> + oh_name = "ctrl_module_core";
> + name = "omap-control-core";
> +
> + oh = omap_hwmod_lookup(oh_name);
> + if (!oh) {
> + pr_err("Could not lookup hwmod for %s\n", oh_name);
> + return PTR_ERR(oh);
> + }
> +
> + pdev = omap_device_build(name, -1, oh, NULL, 0, NULL, 0, true);
I noticed that control module omap device is created and configured according to following idle flags:
static struct omap_hwmod_class_sysconfig omap44xx_ctrl_module_sysc = {
.rev_offs = 0x0000,
.sysc_offs = 0x0010,
.sysc_flags = SYSC_HAS_SIDLEMODE,
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
SIDLE_SMART_WKUP),
.sysc_fields = &omap_hwmod_sysc_type2,
};
IIUC, ".idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | SIDLE_SMART_WKUP)" means that CONTROL_GEN_CORE idlemode will be set to
"0x2,0x3: Clock is automatically gated when there is no access to the Control Module through L4-interconnect". See CONTROL_GEN_CORE_SYSCONFIG register.
So IIUC theoretically CONTROL_GEN_CORE module clock can be automatically gated. Recalling that CONTROL_GEN_CORE module has an THERMAL_ALERT interrupt that is used by the bandgap driver, I'm wondering if the THERMAL_ALERT interrupt will be fired when CONTROL_GEN_CORE module clock is gated?
Probably bandgap driver should set CONTROL_GEN_CORE idle mode to SIDLE_NO, to prevent loosing THERMAL_ALERT interrupt?
BR,
Konstantin Baydarov.
> + if (IS_ERR(pdev)) {
> + pr_err("Could not build omap_device for %s %s\n",
> + name, oh_name);
> + return PTR_ERR(pdev);
> + }
> +
> + return 0;
> +}
> +postcore_initcall(omap_init_control);
> +
> static int __init omap3_l3_init(void)
> {
> struct omap_hwmod *oh;
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
2012-05-29 13:14 ` Cousson, Benoit
@ 2012-05-29 17:51 ` Mike Turquette
-1 siblings, 0 replies; 198+ messages in thread
From: Mike Turquette @ 2012-05-29 17:51 UTC (permalink / raw)
To: Cousson, Benoit
Cc: eduardo.valentin, kishon, kbaidarov, santosh.shilimkar, tony,
paul, balbi, amit.kucheria, linux-pm, linux-arm-kernel,
linux-omap, amit.kachhap, Keerthy
On 20120529-15:14, Cousson, Benoit wrote:
> On 5/28/2012 1:16 PM, Eduardo Valentin wrote:
> >In fact I didn't touch the clk data on purpose and left the clock handling
> >as is. On my side I didn't know how the clock struct would look like with DT,
> >so, I didn't mess with it.
> >
> >Do you have a reference to check the work in progress for clock DT ?
>
> Rob sent a pull request, it seems that now it is up to Mike T. :-)
>
> http://lists-archives.com/linux-kernel/27640907-dt-clk-binding-support.html
>
Due to the on-going discussion around those patches I haven't pulled
yet. If everyone agrees once the dust settles then I'll take them in.
Regards,
Mike
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
@ 2012-05-29 17:51 ` Mike Turquette
0 siblings, 0 replies; 198+ messages in thread
From: Mike Turquette @ 2012-05-29 17:51 UTC (permalink / raw)
To: linux-arm-kernel
On 20120529-15:14, Cousson, Benoit wrote:
> On 5/28/2012 1:16 PM, Eduardo Valentin wrote:
> >In fact I didn't touch the clk data on purpose and left the clock handling
> >as is. On my side I didn't know how the clock struct would look like with DT,
> >so, I didn't mess with it.
> >
> >Do you have a reference to check the work in progress for clock DT ?
>
> Rob sent a pull request, it seems that now it is up to Mike T. :-)
>
> http://lists-archives.com/linux-kernel/27640907-dt-clk-binding-support.html
>
Due to the on-going discussion around those patches I haven't pulled
yet. If everyone agrees once the dust settles then I'll take them in.
Regards,
Mike
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
2012-05-29 9:49 ` Konstantin Baydarov
@ 2012-05-30 8:38 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-30 8:38 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: Eduardo Valentin, kishon, santosh.shilimkar, tony, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap
On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
> Hi, Eduardo.
>
> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>> This patch add device tree entries on OMAP4 based boards
>> for System Control Module (SCM).
>>
>> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
>> ---
>> arch/arm/boot/dts/omap4.dtsi | 13 +++++++++++++
>> 1 files changed, 13 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>> index 359c497..d2cb392 100644
>> --- a/arch/arm/boot/dts/omap4.dtsi
>> +++ b/arch/arm/boot/dts/omap4.dtsi
>> @@ -272,5 +272,18 @@
>> ti,hwmods = "mmc5";
>> ti,needs-special-reset;
>> };
>> +
>> + ctrl_module_core: ctrl_module_core@4a002000 {
>> + compatible = "ti,omap4-control";
>> + ti,hwmods = "ctrl_module_core";
>> + bandgap {
>> + compatible = "ti,omap4460-bandgap";
>> + interrupts =<0 126 4>; /* talert */
>> + ti,tshut-gpio =<86>; /* tshut */
>> + };
> I believe that CPU-specific bandgap definition should be moved to bard specific dts.
Mmm, why, since it is CPU specific and not board specific. I has to be
in the SoC file.
Regards,
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-05-30 8:38 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-30 8:38 UTC (permalink / raw)
To: linux-arm-kernel
On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
> Hi, Eduardo.
>
> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>> This patch add device tree entries on OMAP4 based boards
>> for System Control Module (SCM).
>>
>> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
>> ---
>> arch/arm/boot/dts/omap4.dtsi | 13 +++++++++++++
>> 1 files changed, 13 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>> index 359c497..d2cb392 100644
>> --- a/arch/arm/boot/dts/omap4.dtsi
>> +++ b/arch/arm/boot/dts/omap4.dtsi
>> @@ -272,5 +272,18 @@
>> ti,hwmods = "mmc5";
>> ti,needs-special-reset;
>> };
>> +
>> + ctrl_module_core: ctrl_module_core at 4a002000 {
>> + compatible = "ti,omap4-control";
>> + ti,hwmods = "ctrl_module_core";
>> + bandgap {
>> + compatible = "ti,omap4460-bandgap";
>> + interrupts =<0 126 4>; /* talert */
>> + ti,tshut-gpio =<86>; /* tshut */
>> + };
> I believe that CPU-specific bandgap definition should be moved to bard specific dts.
Mmm, why, since it is CPU specific and not board specific. I has to be
in the SoC file.
Regards,
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
2012-05-30 8:38 ` Cousson, Benoit
@ 2012-05-30 9:05 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-30 9:05 UTC (permalink / raw)
To: Cousson, Benoit
Cc: Eduardo Valentin, kishon, santosh.shilimkar, tony, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Konstantin Baydarov
On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>> Hi, Eduardo.
>>
>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>> This patch add device tree entries on OMAP4 based boards
>>> for System Control Module (SCM).
>>>
>>> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
>>> ---
>>> arch/arm/boot/dts/omap4.dtsi | 13 +++++++++++++
>>> 1 files changed, 13 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>>> index 359c497..d2cb392 100644
>>> --- a/arch/arm/boot/dts/omap4.dtsi
>>> +++ b/arch/arm/boot/dts/omap4.dtsi
>>> @@ -272,5 +272,18 @@
>>> ti,hwmods = "mmc5";
>>> ti,needs-special-reset;
>>> };
>>> +
>>> + ctrl_module_core: ctrl_module_core@4a002000 {
>>> + compatible = "ti,omap4-control";
>>> + ti,hwmods = "ctrl_module_core";
>>> + bandgap {
>>> + compatible = "ti,omap4460-bandgap";
>>> + interrupts =<0 126 4>; /* talert */
>>> + ti,tshut-gpio =<86>; /* tshut */
>>> + };
>> I believe that CPU-specific bandgap definition should be moved to bard specific dts.
>
> Mmm, why, since it is CPU specific and not board specific. I has to be in the SoC file.
Speaking about omap4430 - omap4430 bandgap differs from omap4460, so if omap4430 bandgap support will be added to omap-bandgap driver the version of bandgap should specified in dts file. omap4.dtsi is a common for omap4 boards, that is why I'm suggesting to move bandgap description to probably board specific file.
Another solution is to determine bandgap type in driver probe function, but in that case "ti,omap4460-bandgap" in omap4.dtsi should be replaced to "ti,omap4-bandgap".
BR,
Konstantin Baydarov.
> Regards,
> Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-05-30 9:05 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-30 9:05 UTC (permalink / raw)
To: linux-arm-kernel
On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>> Hi, Eduardo.
>>
>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>> This patch add device tree entries on OMAP4 based boards
>>> for System Control Module (SCM).
>>>
>>> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
>>> ---
>>> arch/arm/boot/dts/omap4.dtsi | 13 +++++++++++++
>>> 1 files changed, 13 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>>> index 359c497..d2cb392 100644
>>> --- a/arch/arm/boot/dts/omap4.dtsi
>>> +++ b/arch/arm/boot/dts/omap4.dtsi
>>> @@ -272,5 +272,18 @@
>>> ti,hwmods = "mmc5";
>>> ti,needs-special-reset;
>>> };
>>> +
>>> + ctrl_module_core: ctrl_module_core at 4a002000 {
>>> + compatible = "ti,omap4-control";
>>> + ti,hwmods = "ctrl_module_core";
>>> + bandgap {
>>> + compatible = "ti,omap4460-bandgap";
>>> + interrupts =<0 126 4>; /* talert */
>>> + ti,tshut-gpio =<86>; /* tshut */
>>> + };
>> I believe that CPU-specific bandgap definition should be moved to bard specific dts.
>
> Mmm, why, since it is CPU specific and not board specific. I has to be in the SoC file.
Speaking about omap4430 - omap4430 bandgap differs from omap4460, so if omap4430 bandgap support will be added to omap-bandgap driver the version of bandgap should specified in dts file. omap4.dtsi is a common for omap4 boards, that is why I'm suggesting to move bandgap description to probably board specific file.
Another solution is to determine bandgap type in driver probe function, but in that case "ti,omap4460-bandgap" in omap4.dtsi should be replaced to "ti,omap4-bandgap".
BR,
Konstantin Baydarov.
> Regards,
> Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
2012-05-30 9:05 ` Konstantin Baydarov
@ 2012-05-30 9:26 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-30 9:26 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: balbi, kishon, amit.kucheria, linux-pm, linux-omap, linux-arm-kernel
On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>>> Hi, Eduardo.
>>>
>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>>> This patch add device tree entries on OMAP4 based boards for
>>>> System Control Module (SCM).
...
>>> I believe that CPU-specific bandgap definition should be moved to
>>> bard specific dts.
>>
>> Mmm, why, since it is CPU specific and not board specific. I has to
>> be in the SoC file.
> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
> if omap4430 bandgap support will be added to omap-bandgap driver the
> version of bandgap should specified in dts file. omap4.dtsi is a
> common for omap4 boards, that is why I'm suggesting to move bandgap
> description to probably board specific file.
OK, I got your point, but in that case we could potentially define a
omap4460.dtsi file.
> Another solution is to
> determine bandgap type in driver probe function, but in that case
> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
> "ti,omap4-bandgap".
Yes, this is the best solution, but that assume that we can identify the
control module version from the HW, which is not necessarily true :-(
The IP_REVISION (offset = 0) value are unfortunately not documented, so
we should read it to check if they are different from omap4430 and 4460.
The bitfield layout in that register is:
IP_REV_MAJOR: 8..10
IP_REV_CUSTOM: 6..7
IP_REV_MINOR: 0..5
Regards,
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-05-30 9:26 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-30 9:26 UTC (permalink / raw)
To: linux-arm-kernel
On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>>> Hi, Eduardo.
>>>
>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>>> This patch add device tree entries on OMAP4 based boards for
>>>> System Control Module (SCM).
...
>>> I believe that CPU-specific bandgap definition should be moved to
>>> bard specific dts.
>>
>> Mmm, why, since it is CPU specific and not board specific. I has to
>> be in the SoC file.
> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
> if omap4430 bandgap support will be added to omap-bandgap driver the
> version of bandgap should specified in dts file. omap4.dtsi is a
> common for omap4 boards, that is why I'm suggesting to move bandgap
> description to probably board specific file.
OK, I got your point, but in that case we could potentially define a
omap4460.dtsi file.
> Another solution is to
> determine bandgap type in driver probe function, but in that case
> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
> "ti,omap4-bandgap".
Yes, this is the best solution, but that assume that we can identify the
control module version from the HW, which is not necessarily true :-(
The IP_REVISION (offset = 0) value are unfortunately not documented, so
we should read it to check if they are different from omap4430 and 4460.
The bitfield layout in that register is:
IP_REV_MAJOR: 8..10
IP_REV_CUSTOM: 6..7
IP_REV_MINOR: 0..5
Regards,
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
2012-05-30 9:26 ` Cousson, Benoit
@ 2012-05-30 10:17 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-30 10:17 UTC (permalink / raw)
To: Cousson, Benoit
Cc: Eduardo Valentin, kishon, santosh.shilimkar, tony, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap
Hi.
On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
> On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
>> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
>>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>>>> Hi, Eduardo.
>>>>
>>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>>>> This patch add device tree entries on OMAP4 based boards for
>>>>> System Control Module (SCM).
>
> ...
>
>>>> I believe that CPU-specific bandgap definition should be moved to
>>>> bard specific dts.
>>>
>>> Mmm, why, since it is CPU specific and not board specific. I has to
>>> be in the SoC file.
>> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
>> if omap4430 bandgap support will be added to omap-bandgap driver the
>> version of bandgap should specified in dts file. omap4.dtsi is a
>> common for omap4 boards, that is why I'm suggesting to move bandgap
>> description to probably board specific file.
>
> OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
>
>> Another solution is to
>> determine bandgap type in driver probe function, but in that case
>> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
>> "ti,omap4-bandgap".
>
> Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
>
> The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
>
> The bitfield layout in that register is:
>
> IP_REV_MAJOR: 8..10
> IP_REV_CUSTOM: 6..7
> IP_REV_MINOR: 0..5
Probably, cpu_is_omap443x() and cpu_is_omap446x() can be used in bandgap driver probe function. Actually many drivers use cpu_is_omap*():
drivers/mfd/omap-usb-host.c
drivers/mfd/twl-core.c
BR,
Konstantin Baydarov.
>
> Regards,
> Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-05-30 10:17 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-30 10:17 UTC (permalink / raw)
To: linux-arm-kernel
Hi.
On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
> On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
>> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
>>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>>>> Hi, Eduardo.
>>>>
>>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>>>> This patch add device tree entries on OMAP4 based boards for
>>>>> System Control Module (SCM).
>
> ...
>
>>>> I believe that CPU-specific bandgap definition should be moved to
>>>> bard specific dts.
>>>
>>> Mmm, why, since it is CPU specific and not board specific. I has to
>>> be in the SoC file.
>> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
>> if omap4430 bandgap support will be added to omap-bandgap driver the
>> version of bandgap should specified in dts file. omap4.dtsi is a
>> common for omap4 boards, that is why I'm suggesting to move bandgap
>> description to probably board specific file.
>
> OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
>
>> Another solution is to
>> determine bandgap type in driver probe function, but in that case
>> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
>> "ti,omap4-bandgap".
>
> Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
>
> The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
>
> The bitfield layout in that register is:
>
> IP_REV_MAJOR: 8..10
> IP_REV_CUSTOM: 6..7
> IP_REV_MINOR: 0..5
Probably, cpu_is_omap443x() and cpu_is_omap446x() can be used in bandgap driver probe function. Actually many drivers use cpu_is_omap*():
drivers/mfd/omap-usb-host.c
drivers/mfd/twl-core.c
BR,
Konstantin Baydarov.
>
> Regards,
> Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
2012-05-30 10:17 ` Konstantin Baydarov
@ 2012-05-30 10:22 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-30 10:22 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: balbi, kishon, amit.kucheria, linux-pm, linux-omap, linux-arm-kernel
On 5/30/2012 12:17 PM, Konstantin Baydarov wrote:
> Hi.
> On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
>> On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
>>> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
>>>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>>>>> Hi, Eduardo.
>>>>>
>>>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>>>>> This patch add device tree entries on OMAP4 based boards for
>>>>>> System Control Module (SCM).
>>
>> ...
>>
>>>>> I believe that CPU-specific bandgap definition should be moved to
>>>>> bard specific dts.
>>>>
>>>> Mmm, why, since it is CPU specific and not board specific. I has to
>>>> be in the SoC file.
>>> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
>>> if omap4430 bandgap support will be added to omap-bandgap driver the
>>> version of bandgap should specified in dts file. omap4.dtsi is a
>>> common for omap4 boards, that is why I'm suggesting to move bandgap
>>> description to probably board specific file.
>>
>> OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
>>
>>> Another solution is to
>>> determine bandgap type in driver probe function, but in that case
>>> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
>>> "ti,omap4-bandgap".
>>
>> Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
>>
>> The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
>>
>> The bitfield layout in that register is:
>>
>> IP_REV_MAJOR: 8..10
>> IP_REV_CUSTOM: 6..7
>> IP_REV_MINOR: 0..5
> Probably, cpu_is_omap443x() and cpu_is_omap446x() can be used in bandgap driver probe function. Actually many drivers use cpu_is_omap*():
No, we cannot, we are in the process of getting rid of that.
A driver should only focus on the IP version in theory. The CPU version
is not the proper way of getting that. It will make the driver not
scalable at all for future OMAP revision.
> drivers/mfd/omap-usb-host.c
> drivers/mfd/twl-core.c
Yeah, these are the ones that still need to be fixed...
Regards,
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-05-30 10:22 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-30 10:22 UTC (permalink / raw)
To: linux-arm-kernel
On 5/30/2012 12:17 PM, Konstantin Baydarov wrote:
> Hi.
> On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
>> On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
>>> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
>>>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>>>>> Hi, Eduardo.
>>>>>
>>>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>>>>> This patch add device tree entries on OMAP4 based boards for
>>>>>> System Control Module (SCM).
>>
>> ...
>>
>>>>> I believe that CPU-specific bandgap definition should be moved to
>>>>> bard specific dts.
>>>>
>>>> Mmm, why, since it is CPU specific and not board specific. I has to
>>>> be in the SoC file.
>>> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
>>> if omap4430 bandgap support will be added to omap-bandgap driver the
>>> version of bandgap should specified in dts file. omap4.dtsi is a
>>> common for omap4 boards, that is why I'm suggesting to move bandgap
>>> description to probably board specific file.
>>
>> OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
>>
>>> Another solution is to
>>> determine bandgap type in driver probe function, but in that case
>>> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
>>> "ti,omap4-bandgap".
>>
>> Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
>>
>> The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
>>
>> The bitfield layout in that register is:
>>
>> IP_REV_MAJOR: 8..10
>> IP_REV_CUSTOM: 6..7
>> IP_REV_MINOR: 0..5
> Probably, cpu_is_omap443x() and cpu_is_omap446x() can be used in bandgap driver probe function. Actually many drivers use cpu_is_omap*():
No, we cannot, we are in the process of getting rid of that.
A driver should only focus on the IP version in theory. The CPU version
is not the proper way of getting that. It will make the driver not
scalable at all for future OMAP revision.
> drivers/mfd/omap-usb-host.c
> drivers/mfd/twl-core.c
Yeah, these are the ones that still need to be fixed...
Regards,
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
2012-05-30 10:22 ` Cousson, Benoit
@ 2012-05-30 10:42 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-30 10:42 UTC (permalink / raw)
To: Cousson, Benoit
Cc: Konstantin Baydarov, Eduardo Valentin, kishon, santosh.shilimkar,
tony, paul, balbi, amit.kucheria, linux-pm, linux-arm-kernel,
linux-omap, amit.kachhap
Hello,
On Wed, May 30, 2012 at 12:22:49PM +0200, Cousson Benoit wrote:
> On 5/30/2012 12:17 PM, Konstantin Baydarov wrote:
> > Hi.
> >On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
> >>On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
> >>>On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
> >>>>On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
> >>>>>Hi, Eduardo.
> >>>>>
> >>>>>On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
> >>>>>>This patch add device tree entries on OMAP4 based boards for
> >>>>>>System Control Module (SCM).
> >>
> >>...
> >>
> >>>>>I believe that CPU-specific bandgap definition should be moved to
> >>>>>bard specific dts.
> >>>>
> >>>>Mmm, why, since it is CPU specific and not board specific. I has to
> >>>>be in the SoC file.
> >>>Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
> >>>if omap4430 bandgap support will be added to omap-bandgap driver the
> >>>version of bandgap should specified in dts file. omap4.dtsi is a
> >>>common for omap4 boards, that is why I'm suggesting to move bandgap
> >>>description to probably board specific file.
> >>
> >>OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
> >>
> >>>Another solution is to
> >>>determine bandgap type in driver probe function, but in that case
> >>>"ti,omap4460-bandgap" in omap4.dtsi should be replaced to
> >>>"ti,omap4-bandgap".
> >>
> >>Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
> >>
> >>The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
> >>
> >>The bitfield layout in that register is:
> >>
> >>IP_REV_MAJOR: 8..10
> >>IP_REV_CUSTOM: 6..7
> >>IP_REV_MINOR: 0..5
I have the weird deja vu feeling...
The DT entry I sent, I already knew it would cause troubles :-)
Having it per board it would be really a PITA. Image that every
body doing a 4430 board needs to define a BG entry...
That would work, but still do we want this?
Benoit, I guess you should know my option by now.
Ideally we should rely on revision register to decide what to do in the driver.
And as we discussed, looks like for BG this is somewhat non-existing.
If we go with the SCM revision register, what do we do if the BG goes away from SCM?
If we go with "ti,omap4-bandgap", we still need a way to say if it is 4430, 4460 or 4470.
There are configuration / settings specific for each. Not only on bandgap,
but also wrt to sensor location and hotspot extrapolation rules.
Because we lack a revision register for bandgap, one way to go is to have still the
revisioning on the same way: "ti,omapXXXX-bandgap", but having a omapXXXX.dtsi
per omap revision. But do we want to this only due to bandgap?
BTW, is it only BG which is suffering of this issue?
> >Probably, cpu_is_omap443x() and cpu_is_omap446x() can be used in bandgap driver probe function. Actually many drivers use cpu_is_omap*():
No please! Let's not use that stuff...
>
> No, we cannot, we are in the process of getting rid of that.
> A driver should only focus on the IP version in theory. The CPU
> version is not the proper way of getting that. It will make the
> driver not scalable at all for future OMAP revision.
>
> >drivers/mfd/omap-usb-host.c
> >drivers/mfd/twl-core.c
>
> Yeah, these are the ones that still need to be fixed...
agreed with Benoit here.
>
> Regards,
> Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-05-30 10:42 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-30 10:42 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
On Wed, May 30, 2012 at 12:22:49PM +0200, Cousson Benoit wrote:
> On 5/30/2012 12:17 PM, Konstantin Baydarov wrote:
> > Hi.
> >On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
> >>On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
> >>>On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
> >>>>On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
> >>>>>Hi, Eduardo.
> >>>>>
> >>>>>On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
> >>>>>>This patch add device tree entries on OMAP4 based boards for
> >>>>>>System Control Module (SCM).
> >>
> >>...
> >>
> >>>>>I believe that CPU-specific bandgap definition should be moved to
> >>>>>bard specific dts.
> >>>>
> >>>>Mmm, why, since it is CPU specific and not board specific. I has to
> >>>>be in the SoC file.
> >>>Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
> >>>if omap4430 bandgap support will be added to omap-bandgap driver the
> >>>version of bandgap should specified in dts file. omap4.dtsi is a
> >>>common for omap4 boards, that is why I'm suggesting to move bandgap
> >>>description to probably board specific file.
> >>
> >>OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
> >>
> >>>Another solution is to
> >>>determine bandgap type in driver probe function, but in that case
> >>>"ti,omap4460-bandgap" in omap4.dtsi should be replaced to
> >>>"ti,omap4-bandgap".
> >>
> >>Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
> >>
> >>The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
> >>
> >>The bitfield layout in that register is:
> >>
> >>IP_REV_MAJOR: 8..10
> >>IP_REV_CUSTOM: 6..7
> >>IP_REV_MINOR: 0..5
I have the weird deja vu feeling...
The DT entry I sent, I already knew it would cause troubles :-)
Having it per board it would be really a PITA. Image that every
body doing a 4430 board needs to define a BG entry...
That would work, but still do we want this?
Benoit, I guess you should know my option by now.
Ideally we should rely on revision register to decide what to do in the driver.
And as we discussed, looks like for BG this is somewhat non-existing.
If we go with the SCM revision register, what do we do if the BG goes away from SCM?
If we go with "ti,omap4-bandgap", we still need a way to say if it is 4430, 4460 or 4470.
There are configuration / settings specific for each. Not only on bandgap,
but also wrt to sensor location and hotspot extrapolation rules.
Because we lack a revision register for bandgap, one way to go is to have still the
revisioning on the same way: "ti,omapXXXX-bandgap", but having a omapXXXX.dtsi
per omap revision. But do we want to this only due to bandgap?
BTW, is it only BG which is suffering of this issue?
> >Probably, cpu_is_omap443x() and cpu_is_omap446x() can be used in bandgap driver probe function. Actually many drivers use cpu_is_omap*():
No please! Let's not use that stuff...
>
> No, we cannot, we are in the process of getting rid of that.
> A driver should only focus on the IP version in theory. The CPU
> version is not the proper way of getting that. It will make the
> driver not scalable at all for future OMAP revision.
>
> >drivers/mfd/omap-usb-host.c
> >drivers/mfd/twl-core.c
>
> Yeah, these are the ones that still need to be fixed...
agreed with Benoit here.
>
> Regards,
> Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
2012-05-30 10:42 ` Eduardo Valentin
@ 2012-05-30 12:16 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-30 12:16 UTC (permalink / raw)
To: eduardo.valentin
Cc: amit.kucheria, balbi, kishon, Konstantin Baydarov, linux-pm,
linux-omap, linux-arm-kernel
On 5/30/2012 12:42 PM, Eduardo Valentin wrote:
> Hello,
>
> On Wed, May 30, 2012 at 12:22:49PM +0200, Cousson Benoit wrote:
>> On 5/30/2012 12:17 PM, Konstantin Baydarov wrote:
>>> Hi.
>>> On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
>>>> On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
>>>>> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
>>>>>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>>>>>>> Hi, Eduardo.
>>>>>>>
>>>>>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>>>>>>> This patch add device tree entries on OMAP4 based boards for
>>>>>>>> System Control Module (SCM).
>>>>
>>>> ...
>>>>
>>>>>>> I believe that CPU-specific bandgap definition should be moved to
>>>>>>> bard specific dts.
>>>>>>
>>>>>> Mmm, why, since it is CPU specific and not board specific. I has to
>>>>>> be in the SoC file.
>>>>> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
>>>>> if omap4430 bandgap support will be added to omap-bandgap driver the
>>>>> version of bandgap should specified in dts file. omap4.dtsi is a
>>>>> common for omap4 boards, that is why I'm suggesting to move bandgap
>>>>> description to probably board specific file.
>>>>
>>>> OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
>>>>
>>>>> Another solution is to
>>>>> determine bandgap type in driver probe function, but in that case
>>>>> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
>>>>> "ti,omap4-bandgap".
>>>>
>>>> Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
>>>>
>>>> The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
>>>>
>>>> The bitfield layout in that register is:
>>>>
>>>> IP_REV_MAJOR: 8..10
>>>> IP_REV_CUSTOM: 6..7
>>>> IP_REV_MINOR: 0..5
>
> I have the weird deja vu feeling...
I know :-)
> The DT entry I sent, I already knew it would cause troubles :-)
> Having it per board it would be really a PITA. Image that every
> body doing a 4430 board needs to define a BG entry...
> That would work, but still do we want this?
No, in fact I do not want to do that if we can avoid it.
> Benoit, I guess you should know my option by now.
> Ideally we should rely on revision register to decide what to do in the driver.
> And as we discussed, looks like for BG this is somewhat non-existing.
Oops, sorry I was thinking about the SCM revision :-(
The register seems to be there with the layout detailed before. I just
do not have a clue about the value we should expect. That's why we have
to read it on both 4430 and 4460 to check if some bits are different.
> If we go with the SCM revision register, what do we do if the BG goes away from SCM?
Yeah, good point.
But, if at some point the BG becomes a real IP with an OCP port, then we
will have a TI wrapper on top of it with the proper revision register...
at least in theory :-)
> If we go with "ti,omap4-bandgap", we still need a way to say if it is 4430, 4460 or 4470.
Yeah, so we should check if at least that SCM revision field is meaningful.
> There are configuration / settings specific for each. Not only on bandgap,
> but also wrt to sensor location and hotspot extrapolation rules.
Assuming the SCM version is usable we can extract from that some SW
revision for each sub IP.
But it is still not clear how the children will be aware of the parent
revision :-(
Exported a get_scm_revision is doable potentially.
> Because we lack a revision register for bandgap, one way to go is to have still the
> revisioning on the same way: "ti,omapXXXX-bandgap", but having a omapXXXX.dtsi
> per omap revision. But do we want to this only due to bandgap?
> BTW, is it only BG which is suffering of this issue?
Mmm, probably not, that being said, SCM is probably the worst IP we have
on OMAP :-)
Regards,
Benoit
>>> Probably, cpu_is_omap443x() and cpu_is_omap446x() can be used in bandgap driver probe function. Actually many drivers use cpu_is_omap*():
>
>
> No please! Let's not use that stuff...
>
>>
>> No, we cannot, we are in the process of getting rid of that.
>> A driver should only focus on the IP version in theory. The CPU
>> version is not the proper way of getting that. It will make the
>> driver not scalable at all for future OMAP revision.
>>
>>> drivers/mfd/omap-usb-host.c
>>> drivers/mfd/twl-core.c
>>
>> Yeah, these are the ones that still need to be fixed...
>
> agreed with Benoit here.
>
>>
>> Regards,
>> Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-05-30 12:16 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-30 12:16 UTC (permalink / raw)
To: linux-arm-kernel
On 5/30/2012 12:42 PM, Eduardo Valentin wrote:
> Hello,
>
> On Wed, May 30, 2012 at 12:22:49PM +0200, Cousson Benoit wrote:
>> On 5/30/2012 12:17 PM, Konstantin Baydarov wrote:
>>> Hi.
>>> On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
>>>> On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
>>>>> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
>>>>>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>>>>>>> Hi, Eduardo.
>>>>>>>
>>>>>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>>>>>>> This patch add device tree entries on OMAP4 based boards for
>>>>>>>> System Control Module (SCM).
>>>>
>>>> ...
>>>>
>>>>>>> I believe that CPU-specific bandgap definition should be moved to
>>>>>>> bard specific dts.
>>>>>>
>>>>>> Mmm, why, since it is CPU specific and not board specific. I has to
>>>>>> be in the SoC file.
>>>>> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
>>>>> if omap4430 bandgap support will be added to omap-bandgap driver the
>>>>> version of bandgap should specified in dts file. omap4.dtsi is a
>>>>> common for omap4 boards, that is why I'm suggesting to move bandgap
>>>>> description to probably board specific file.
>>>>
>>>> OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
>>>>
>>>>> Another solution is to
>>>>> determine bandgap type in driver probe function, but in that case
>>>>> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
>>>>> "ti,omap4-bandgap".
>>>>
>>>> Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
>>>>
>>>> The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
>>>>
>>>> The bitfield layout in that register is:
>>>>
>>>> IP_REV_MAJOR: 8..10
>>>> IP_REV_CUSTOM: 6..7
>>>> IP_REV_MINOR: 0..5
>
> I have the weird deja vu feeling...
I know :-)
> The DT entry I sent, I already knew it would cause troubles :-)
> Having it per board it would be really a PITA. Image that every
> body doing a 4430 board needs to define a BG entry...
> That would work, but still do we want this?
No, in fact I do not want to do that if we can avoid it.
> Benoit, I guess you should know my option by now.
> Ideally we should rely on revision register to decide what to do in the driver.
> And as we discussed, looks like for BG this is somewhat non-existing.
Oops, sorry I was thinking about the SCM revision :-(
The register seems to be there with the layout detailed before. I just
do not have a clue about the value we should expect. That's why we have
to read it on both 4430 and 4460 to check if some bits are different.
> If we go with the SCM revision register, what do we do if the BG goes away from SCM?
Yeah, good point.
But, if at some point the BG becomes a real IP with an OCP port, then we
will have a TI wrapper on top of it with the proper revision register...
at least in theory :-)
> If we go with "ti,omap4-bandgap", we still need a way to say if it is 4430, 4460 or 4470.
Yeah, so we should check if at least that SCM revision field is meaningful.
> There are configuration / settings specific for each. Not only on bandgap,
> but also wrt to sensor location and hotspot extrapolation rules.
Assuming the SCM version is usable we can extract from that some SW
revision for each sub IP.
But it is still not clear how the children will be aware of the parent
revision :-(
Exported a get_scm_revision is doable potentially.
> Because we lack a revision register for bandgap, one way to go is to have still the
> revisioning on the same way: "ti,omapXXXX-bandgap", but having a omapXXXX.dtsi
> per omap revision. But do we want to this only due to bandgap?
> BTW, is it only BG which is suffering of this issue?
Mmm, probably not, that being said, SCM is probably the worst IP we have
on OMAP :-)
Regards,
Benoit
>>> Probably, cpu_is_omap443x() and cpu_is_omap446x() can be used in bandgap driver probe function. Actually many drivers use cpu_is_omap*():
>
>
> No please! Let's not use that stuff...
>
>>
>> No, we cannot, we are in the process of getting rid of that.
>> A driver should only focus on the IP version in theory. The CPU
>> version is not the proper way of getting that. It will make the
>> driver not scalable at all for future OMAP revision.
>>
>>> drivers/mfd/omap-usb-host.c
>>> drivers/mfd/twl-core.c
>>
>> Yeah, these are the ones that still need to be fixed...
>
> agreed with Benoit here.
>
>>
>> Regards,
>> Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
2012-05-30 9:26 ` Cousson, Benoit
@ 2012-05-31 12:06 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-31 12:06 UTC (permalink / raw)
To: Cousson, Benoit
Cc: Eduardo Valentin, kishon, santosh.shilimkar, tony, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap
Hi.
On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
> On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
>> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
>>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>>>> Hi, Eduardo.
>>>>
>>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>>>> This patch add device tree entries on OMAP4 based boards for
>>>>> System Control Module (SCM).
>
> ...
>
>>>> I believe that CPU-specific bandgap definition should be moved to
>>>> bard specific dts.
>>>
>>> Mmm, why, since it is CPU specific and not board specific. I has to
>>> be in the SoC file.
>> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
>> if omap4430 bandgap support will be added to omap-bandgap driver the
>> version of bandgap should specified in dts file. omap4.dtsi is a
>> common for omap4 boards, that is why I'm suggesting to move bandgap
>> description to probably board specific file.
>
> OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
>
>> Another solution is to
>> determine bandgap type in driver probe function, but in that case
>> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
>> "ti,omap4-bandgap".
>
> Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
>
> The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
>
> The bitfield layout in that register is:
>
> IP_REV_MAJOR: 8..10
> IP_REV_CUSTOM: 6..7
> IP_REV_MINOR: 0..5
The value of CONTROL_GEN_CORE_REVISION register on my panda board(4430) is:
CONTROL_GEN_CORE_REVISION: 0x40000900
CONTROL_GEN_CORE_HWINFO: 0x0
Eduardo, could you check CONTROL_GEN_CORE_REVISION on your 4460 board.
BR,
Konstantin Baydarov.
>
> Regards,
> Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-05-31 12:06 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-31 12:06 UTC (permalink / raw)
To: linux-arm-kernel
Hi.
On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
> On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
>> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
>>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>>>> Hi, Eduardo.
>>>>
>>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>>>> This patch add device tree entries on OMAP4 based boards for
>>>>> System Control Module (SCM).
>
> ...
>
>>>> I believe that CPU-specific bandgap definition should be moved to
>>>> bard specific dts.
>>>
>>> Mmm, why, since it is CPU specific and not board specific. I has to
>>> be in the SoC file.
>> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
>> if omap4430 bandgap support will be added to omap-bandgap driver the
>> version of bandgap should specified in dts file. omap4.dtsi is a
>> common for omap4 boards, that is why I'm suggesting to move bandgap
>> description to probably board specific file.
>
> OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
>
>> Another solution is to
>> determine bandgap type in driver probe function, but in that case
>> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
>> "ti,omap4-bandgap".
>
> Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
>
> The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
>
> The bitfield layout in that register is:
>
> IP_REV_MAJOR: 8..10
> IP_REV_CUSTOM: 6..7
> IP_REV_MINOR: 0..5
The value of CONTROL_GEN_CORE_REVISION register on my panda board(4430) is:
CONTROL_GEN_CORE_REVISION: 0x40000900
CONTROL_GEN_CORE_HWINFO: 0x0
Eduardo, could you check CONTROL_GEN_CORE_REVISION on your 4460 board.
BR,
Konstantin Baydarov.
>
> Regards,
> Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
2012-05-31 12:06 ` Konstantin Baydarov
@ 2012-05-31 12:49 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-31 12:49 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: balbi, kishon, amit.kucheria, linux-pm, linux-omap, linux-arm-kernel
Hello,
On Thu, May 31, 2012 at 04:06:00PM +0400, Konstantin Baydarov wrote:
> Hi.
>
> On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
> > On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
> >> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
> >>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
> >>>> Hi, Eduardo.
> >>>>
> >>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
> >>>>> This patch add device tree entries on OMAP4 based boards for
> >>>>> System Control Module (SCM).
> >
> > ...
> >
> >>>> I believe that CPU-specific bandgap definition should be moved to
> >>>> bard specific dts.
> >>>
> >>> Mmm, why, since it is CPU specific and not board specific. I has to
> >>> be in the SoC file.
> >> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
> >> if omap4430 bandgap support will be added to omap-bandgap driver the
> >> version of bandgap should specified in dts file. omap4.dtsi is a
> >> common for omap4 boards, that is why I'm suggesting to move bandgap
> >> description to probably board specific file.
> >
> > OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
> >
> >> Another solution is to
> >> determine bandgap type in driver probe function, but in that case
> >> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
> >> "ti,omap4-bandgap".
> >
> > Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
> >
> > The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
> >
> > The bitfield layout in that register is:
> >
> > IP_REV_MAJOR: 8..10
> > IP_REV_CUSTOM: 6..7
> > IP_REV_MINOR: 0..5
> The value of CONTROL_GEN_CORE_REVISION register on my panda board(4430) is:
> CONTROL_GEN_CORE_REVISION: 0x40000900
> CONTROL_GEN_CORE_HWINFO: 0x0
>
> Eduardo, could you check CONTROL_GEN_CORE_REVISION on your 4460 board.
4460:
[root@(none) ~]# omapconf read 0x4A002000
40000A00
[root@(none) ~]# omapconf read 0x4A002004
00000000
4470:
[root@(none) ~]# omapconf read 0x4A002000
40000B00
[root@(none) ~]# omapconf read 0x4A002004
00000000
>
> BR,
> Konstantin Baydarov.
>
> >
> > Regards,
> > Benoit
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-05-31 12:49 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-05-31 12:49 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
On Thu, May 31, 2012 at 04:06:00PM +0400, Konstantin Baydarov wrote:
> Hi.
>
> On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
> > On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
> >> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
> >>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
> >>>> Hi, Eduardo.
> >>>>
> >>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
> >>>>> This patch add device tree entries on OMAP4 based boards for
> >>>>> System Control Module (SCM).
> >
> > ...
> >
> >>>> I believe that CPU-specific bandgap definition should be moved to
> >>>> bard specific dts.
> >>>
> >>> Mmm, why, since it is CPU specific and not board specific. I has to
> >>> be in the SoC file.
> >> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
> >> if omap4430 bandgap support will be added to omap-bandgap driver the
> >> version of bandgap should specified in dts file. omap4.dtsi is a
> >> common for omap4 boards, that is why I'm suggesting to move bandgap
> >> description to probably board specific file.
> >
> > OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
> >
> >> Another solution is to
> >> determine bandgap type in driver probe function, but in that case
> >> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
> >> "ti,omap4-bandgap".
> >
> > Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
> >
> > The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
> >
> > The bitfield layout in that register is:
> >
> > IP_REV_MAJOR: 8..10
> > IP_REV_CUSTOM: 6..7
> > IP_REV_MINOR: 0..5
> The value of CONTROL_GEN_CORE_REVISION register on my panda board(4430) is:
> CONTROL_GEN_CORE_REVISION: 0x40000900
> CONTROL_GEN_CORE_HWINFO: 0x0
>
> Eduardo, could you check CONTROL_GEN_CORE_REVISION on your 4460 board.
4460:
[root@(none) ~]# omapconf read 0x4A002000
40000A00
[root@(none) ~]# omapconf read 0x4A002004
00000000
4470:
[root@(none) ~]# omapconf read 0x4A002000
40000B00
[root@(none) ~]# omapconf read 0x4A002004
00000000
>
> BR,
> Konstantin Baydarov.
>
> >
> > Regards,
> > Benoit
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
2012-05-31 12:49 ` Eduardo Valentin
@ 2012-05-31 12:52 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-31 12:52 UTC (permalink / raw)
To: eduardo.valentin
Cc: amit.kucheria, balbi, kishon, Konstantin Baydarov, linux-pm,
linux-omap, linux-arm-kernel
On 5/31/2012 2:49 PM, Eduardo Valentin wrote:
> Hello,
>
> On Thu, May 31, 2012 at 04:06:00PM +0400, Konstantin Baydarov wrote:
>> Hi.
>>
>> On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
>>> On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
>>>> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
>>>>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>>>>>> Hi, Eduardo.
>>>>>>
>>>>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>>>>>> This patch add device tree entries on OMAP4 based boards for
>>>>>>> System Control Module (SCM).
>>>
>>> ...
>>>
>>>>>> I believe that CPU-specific bandgap definition should be moved to
>>>>>> bard specific dts.
>>>>>
>>>>> Mmm, why, since it is CPU specific and not board specific. I has to
>>>>> be in the SoC file.
>>>> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
>>>> if omap4430 bandgap support will be added to omap-bandgap driver the
>>>> version of bandgap should specified in dts file. omap4.dtsi is a
>>>> common for omap4 boards, that is why I'm suggesting to move bandgap
>>>> description to probably board specific file.
>>>
>>> OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
>>>
>>>> Another solution is to
>>>> determine bandgap type in driver probe function, but in that case
>>>> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
>>>> "ti,omap4-bandgap".
>>>
>>> Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
>>>
>>> The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
>>>
>>> The bitfield layout in that register is:
>>>
>>> IP_REV_MAJOR: 8..10
>>> IP_REV_CUSTOM: 6..7
>>> IP_REV_MINOR: 0..5
>> The value of CONTROL_GEN_CORE_REVISION register on my panda board(4430) is:
>> CONTROL_GEN_CORE_REVISION: 0x40000900
>> CONTROL_GEN_CORE_HWINFO: 0x0
>>
>> Eduardo, could you check CONTROL_GEN_CORE_REVISION on your 4460 board.
>
> 4460:
> [root@(none) ~]# omapconf read 0x4A002000
> 40000A00
> [root@(none) ~]# omapconf read 0x4A002004
> 00000000
>
> 4470:
> [root@(none) ~]# omapconf read 0x4A002000
> 40000B00
> [root@(none) ~]# omapconf read 0x4A002004
> 00000000
Nice! We do have a cool progression 1 -> 2 -> 3 for each revision.
Well at least for the SCM.
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-05-31 12:52 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-05-31 12:52 UTC (permalink / raw)
To: linux-arm-kernel
On 5/31/2012 2:49 PM, Eduardo Valentin wrote:
> Hello,
>
> On Thu, May 31, 2012 at 04:06:00PM +0400, Konstantin Baydarov wrote:
>> Hi.
>>
>> On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
>>> On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
>>>> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
>>>>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>>>>>> Hi, Eduardo.
>>>>>>
>>>>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>>>>>> This patch add device tree entries on OMAP4 based boards for
>>>>>>> System Control Module (SCM).
>>>
>>> ...
>>>
>>>>>> I believe that CPU-specific bandgap definition should be moved to
>>>>>> bard specific dts.
>>>>>
>>>>> Mmm, why, since it is CPU specific and not board specific. I has to
>>>>> be in the SoC file.
>>>> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
>>>> if omap4430 bandgap support will be added to omap-bandgap driver the
>>>> version of bandgap should specified in dts file. omap4.dtsi is a
>>>> common for omap4 boards, that is why I'm suggesting to move bandgap
>>>> description to probably board specific file.
>>>
>>> OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
>>>
>>>> Another solution is to
>>>> determine bandgap type in driver probe function, but in that case
>>>> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
>>>> "ti,omap4-bandgap".
>>>
>>> Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
>>>
>>> The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
>>>
>>> The bitfield layout in that register is:
>>>
>>> IP_REV_MAJOR: 8..10
>>> IP_REV_CUSTOM: 6..7
>>> IP_REV_MINOR: 0..5
>> The value of CONTROL_GEN_CORE_REVISION register on my panda board(4430) is:
>> CONTROL_GEN_CORE_REVISION: 0x40000900
>> CONTROL_GEN_CORE_HWINFO: 0x0
>>
>> Eduardo, could you check CONTROL_GEN_CORE_REVISION on your 4460 board.
>
> 4460:
> [root@(none) ~]# omapconf read 0x4A002000
> 40000A00
> [root@(none) ~]# omapconf read 0x4A002004
> 00000000
>
> 4470:
> [root@(none) ~]# omapconf read 0x4A002000
> 40000B00
> [root@(none) ~]# omapconf read 0x4A002004
> 00000000
Nice! We do have a cool progression 1 -> 2 -> 3 for each revision.
Well at least for the SCM.
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
2012-05-31 12:52 ` Cousson, Benoit
@ 2012-05-31 14:51 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-31 14:51 UTC (permalink / raw)
To: Cousson, Benoit
Cc: eduardo.valentin, kishon, santosh.shilimkar, tony, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Konstantin Baydarov
Hi.
On 05/31/2012 04:52 PM, Cousson, Benoit wrote:
> On 5/31/2012 2:49 PM, Eduardo Valentin wrote:
>> Hello,
>>
>> On Thu, May 31, 2012 at 04:06:00PM +0400, Konstantin Baydarov wrote:
>>> Hi.
>>>
>>> On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
>>>> On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
>>>>> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
>>>>>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>>>>>>> Hi, Eduardo.
>>>>>>>
>>>>>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>>>>>>> This patch add device tree entries on OMAP4 based boards for
>>>>>>>> System Control Module (SCM).
>>>>
>>>> ...
>>>>
>>>>>>> I believe that CPU-specific bandgap definition should be moved to
>>>>>>> bard specific dts.
>>>>>>
>>>>>> Mmm, why, since it is CPU specific and not board specific. I has to
>>>>>> be in the SoC file.
>>>>> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
>>>>> if omap4430 bandgap support will be added to omap-bandgap driver the
>>>>> version of bandgap should specified in dts file. omap4.dtsi is a
>>>>> common for omap4 boards, that is why I'm suggesting to move bandgap
>>>>> description to probably board specific file.
>>>>
>>>> OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
>>>>
>>>>> Another solution is to
>>>>> determine bandgap type in driver probe function, but in that case
>>>>> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
>>>>> "ti,omap4-bandgap".
>>>>
>>>> Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
>>>>
>>>> The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
>>>>
>>>> The bitfield layout in that register is:
>>>>
>>>> IP_REV_MAJOR: 8..10
>>>> IP_REV_CUSTOM: 6..7
>>>> IP_REV_MINOR: 0..5
>>> The value of CONTROL_GEN_CORE_REVISION register on my panda board(4430) is:
>>> CONTROL_GEN_CORE_REVISION: 0x40000900
>>> CONTROL_GEN_CORE_HWINFO: 0x0
>>>
>>> Eduardo, could you check CONTROL_GEN_CORE_REVISION on your 4460 board.
>>
>> 4460:
>> [root@(none) ~]# omapconf read 0x4A002000
>> 40000A00
>> [root@(none) ~]# omapconf read 0x4A002004
>> 00000000
>>
>> 4470:
>> [root@(none) ~]# omapconf read 0x4A002000
>> 40000B00
>> [root@(none) ~]# omapconf read 0x4A002004
>> 00000000
>
> Nice! We do have a cool progression 1 -> 2 -> 3 for each revision.
> Well at least for the SCM.
>
> Benoit
This patch allows checking of bandgap type dynamically in bandgap driver
probe function by reading omap core control module revision register
CONTROL_GEN_CORE_REVISION. It lets bandgap module to be defined in common
omap4.dtsi, because all cpu specific attributes(irq and tshut number)
were moved to driver.
Patch wasn't tested because I have panda 4430 board.
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Index: omap-thermal/arch/arm/boot/dts/omap4.dtsi
===================================================================
--- omap-thermal.orig/arch/arm/boot/dts/omap4.dtsi
+++ omap-thermal/arch/arm/boot/dts/omap4.dtsi
@@ -277,9 +277,7 @@
compatible = "ti,omap4-control";
ti,hwmods = "ctrl_module_core";
bandgap {
- compatible = "ti,omap4460-bandgap";
- interrupts = <0 126 4>; /* talert */
- ti,tshut-gpio = <86>; /* tshut */
+ compatible = "ti,omap4-bandgap";
};
usb {
compatible = "ti,omap4-usb-phy";
Index: omap-thermal/drivers/thermal/omap-bandgap.c
===================================================================
--- omap-thermal.orig/drivers/thermal/omap-bandgap.c
+++ omap-thermal/drivers/thermal/omap-bandgap.c
@@ -219,12 +219,14 @@ struct omap_temp_sensor {
struct omap_bandgap_data {
bool has_talert;
bool has_tshut;
+ int tshut_gpio;
const int *conv_table;
char *fclock_name;
char *div_ck_name;
int sensor_count;
int (*report_temperature)(struct omap_bandgap *bg_ptr, int id);
int (*expose_sensor)(struct omap_bandgap *bg_ptr, int id, char *domain);
+ int irq;
/* this needs to be at the end */
struct omap_temp_sensor sensors[];
@@ -1189,10 +1191,12 @@ static int omap_bandgap_talert_init(stru
static const struct omap_bandgap_data omap4460_data = {
.has_talert = true,
.has_tshut = true,
+ .tshut_gpio = 86,
.fclock_name = "bandgap_ts_fclk",
.div_ck_name = "div_ts_ck",
.conv_table = omap4460_adc_to_temp,
.expose_sensor = omap4_thermal_expose_sensor,
+ .irq = 126,
.sensors = {
{
.registers = &omap4460_mpu_temp_sensor_registers,
@@ -1206,9 +1210,11 @@ static const struct omap_bandgap_data om
static const struct omap_bandgap_data omap5430_data = {
.has_talert = true,
.has_tshut = true,
+ .tshut_gpio = 0, /* TODO. Fill correct tshut_gpio */
.fclock_name = "ts_clk_div_ck",
.div_ck_name = "ts_clk_div_ck",
.conv_table = omap5430_adc_to_temp,
+ .irq = 0, /* TODO. Fill correct irq */
.sensors = {
{
.registers = &omap5430_mpu_temp_sensor_registers,
@@ -1235,12 +1241,7 @@ static const struct of_device_id of_omap
* { .compatible = "ti,omap4430-bandgap", .data = , },
*/
{
- .compatible = "ti,omap4460-bandgap",
- .data = (void *)&omap4460_data,
- },
- {
- .compatible = "ti,omap5430-bandgap",
- .data = (void *)&omap5430_data,
+ .compatible = "ti,omap4-bandgap",
},
/* Sentinel */
{ },
@@ -1249,9 +1250,10 @@ static const struct of_device_id of_omap
static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
{
struct device_node *node = pdev->dev.of_node;
- const struct of_device_id *of_id;
struct omap_bandgap *bg_ptr;
- u32 prop;
+ struct device *scm;
+ u32 val;
+ int ret;
/* just for the sake */
if (!node) {
@@ -1266,16 +1268,34 @@ static struct omap_bandgap *omap_bandgap
return ERR_PTR(-ENOMEM);
}
- of_id = of_match_device(of_omap_bandgap_match, &pdev->dev);
- if (of_id)
- bg_ptr->pdata = of_id->data;
+ scm = omap_control_get();
+ if(!scm)
+ return 0;
+
+ ret = omap_control_readl(scm, 0x0, &val);
+ if(ret)
+ return 0;
+
+ /*
+ * Check omap control core module revision to find out
+ * bandgap type
+ */
+ switch ((val & 0x3ff) >> 8) {
+ case 1:
+ /* 4430 */
+ bg_ptr->pdata = &omap4460_data;
+ break;
+ case 2:
+ /* 4460 */
+ bg_ptr->pdata = &omap4460_data;
+ break;
+ default:
+ /* Unknown omap control core module revision */
+ return 0;
+ }
if (bg_ptr->pdata->has_tshut) {
- if (of_property_read_u32(node, "ti,tshut-gpio", &prop) < 0) {
- dev_err(&pdev->dev, "missing tshut gpio in device tree\n");
- return ERR_PTR(-EINVAL);
- }
- bg_ptr->tshut_gpio = prop;
+ bg_ptr->tshut_gpio = bg_ptr->pdata->tshut_gpio;
if (!gpio_is_valid(bg_ptr->tshut_gpio)) {
dev_err(&pdev->dev, "invalid gpio for tshut (%d)\n",
bg_ptr->tshut_gpio);
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-05-31 14:51 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-05-31 14:51 UTC (permalink / raw)
To: linux-arm-kernel
Hi.
On 05/31/2012 04:52 PM, Cousson, Benoit wrote:
> On 5/31/2012 2:49 PM, Eduardo Valentin wrote:
>> Hello,
>>
>> On Thu, May 31, 2012 at 04:06:00PM +0400, Konstantin Baydarov wrote:
>>> Hi.
>>>
>>> On 05/30/2012 01:26 PM, Cousson, Benoit wrote:
>>>> On 5/30/2012 11:05 AM, Konstantin Baydarov wrote:
>>>>> On 05/30/2012 12:38 PM, Cousson, Benoit wrote:
>>>>>> On 5/29/2012 11:49 AM, Konstantin Baydarov wrote:
>>>>>>> Hi, Eduardo.
>>>>>>>
>>>>>>> On 05/25/2012 12:26 PM, Eduardo Valentin wrote:
>>>>>>>> This patch add device tree entries on OMAP4 based boards for
>>>>>>>> System Control Module (SCM).
>>>>
>>>> ...
>>>>
>>>>>>> I believe that CPU-specific bandgap definition should be moved to
>>>>>>> bard specific dts.
>>>>>>
>>>>>> Mmm, why, since it is CPU specific and not board specific. I has to
>>>>>> be in the SoC file.
>>>>> Speaking about omap4430 - omap4430 bandgap differs from omap4460, so
>>>>> if omap4430 bandgap support will be added to omap-bandgap driver the
>>>>> version of bandgap should specified in dts file. omap4.dtsi is a
>>>>> common for omap4 boards, that is why I'm suggesting to move bandgap
>>>>> description to probably board specific file.
>>>>
>>>> OK, I got your point, but in that case we could potentially define a omap4460.dtsi file.
>>>>
>>>>> Another solution is to
>>>>> determine bandgap type in driver probe function, but in that case
>>>>> "ti,omap4460-bandgap" in omap4.dtsi should be replaced to
>>>>> "ti,omap4-bandgap".
>>>>
>>>> Yes, this is the best solution, but that assume that we can identify the control module version from the HW, which is not necessarily true :-(
>>>>
>>>> The IP_REVISION (offset = 0) value are unfortunately not documented, so we should read it to check if they are different from omap4430 and 4460.
>>>>
>>>> The bitfield layout in that register is:
>>>>
>>>> IP_REV_MAJOR: 8..10
>>>> IP_REV_CUSTOM: 6..7
>>>> IP_REV_MINOR: 0..5
>>> The value of CONTROL_GEN_CORE_REVISION register on my panda board(4430) is:
>>> CONTROL_GEN_CORE_REVISION: 0x40000900
>>> CONTROL_GEN_CORE_HWINFO: 0x0
>>>
>>> Eduardo, could you check CONTROL_GEN_CORE_REVISION on your 4460 board.
>>
>> 4460:
>> [root@(none) ~]# omapconf read 0x4A002000
>> 40000A00
>> [root@(none) ~]# omapconf read 0x4A002004
>> 00000000
>>
>> 4470:
>> [root@(none) ~]# omapconf read 0x4A002000
>> 40000B00
>> [root@(none) ~]# omapconf read 0x4A002004
>> 00000000
>
> Nice! We do have a cool progression 1 -> 2 -> 3 for each revision.
> Well at least for the SCM.
>
> Benoit
This patch allows checking of bandgap type dynamically in bandgap driver
probe function by reading omap core control module revision register
CONTROL_GEN_CORE_REVISION. It lets bandgap module to be defined in common
omap4.dtsi, because all cpu specific attributes(irq and tshut number)
were moved to driver.
Patch wasn't tested because I have panda 4430 board.
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Index: omap-thermal/arch/arm/boot/dts/omap4.dtsi
===================================================================
--- omap-thermal.orig/arch/arm/boot/dts/omap4.dtsi
+++ omap-thermal/arch/arm/boot/dts/omap4.dtsi
@@ -277,9 +277,7 @@
compatible = "ti,omap4-control";
ti,hwmods = "ctrl_module_core";
bandgap {
- compatible = "ti,omap4460-bandgap";
- interrupts = <0 126 4>; /* talert */
- ti,tshut-gpio = <86>; /* tshut */
+ compatible = "ti,omap4-bandgap";
};
usb {
compatible = "ti,omap4-usb-phy";
Index: omap-thermal/drivers/thermal/omap-bandgap.c
===================================================================
--- omap-thermal.orig/drivers/thermal/omap-bandgap.c
+++ omap-thermal/drivers/thermal/omap-bandgap.c
@@ -219,12 +219,14 @@ struct omap_temp_sensor {
struct omap_bandgap_data {
bool has_talert;
bool has_tshut;
+ int tshut_gpio;
const int *conv_table;
char *fclock_name;
char *div_ck_name;
int sensor_count;
int (*report_temperature)(struct omap_bandgap *bg_ptr, int id);
int (*expose_sensor)(struct omap_bandgap *bg_ptr, int id, char *domain);
+ int irq;
/* this needs to be at the end */
struct omap_temp_sensor sensors[];
@@ -1189,10 +1191,12 @@ static int omap_bandgap_talert_init(stru
static const struct omap_bandgap_data omap4460_data = {
.has_talert = true,
.has_tshut = true,
+ .tshut_gpio = 86,
.fclock_name = "bandgap_ts_fclk",
.div_ck_name = "div_ts_ck",
.conv_table = omap4460_adc_to_temp,
.expose_sensor = omap4_thermal_expose_sensor,
+ .irq = 126,
.sensors = {
{
.registers = &omap4460_mpu_temp_sensor_registers,
@@ -1206,9 +1210,11 @@ static const struct omap_bandgap_data om
static const struct omap_bandgap_data omap5430_data = {
.has_talert = true,
.has_tshut = true,
+ .tshut_gpio = 0, /* TODO. Fill correct tshut_gpio */
.fclock_name = "ts_clk_div_ck",
.div_ck_name = "ts_clk_div_ck",
.conv_table = omap5430_adc_to_temp,
+ .irq = 0, /* TODO. Fill correct irq */
.sensors = {
{
.registers = &omap5430_mpu_temp_sensor_registers,
@@ -1235,12 +1241,7 @@ static const struct of_device_id of_omap
* { .compatible = "ti,omap4430-bandgap", .data = , },
*/
{
- .compatible = "ti,omap4460-bandgap",
- .data = (void *)&omap4460_data,
- },
- {
- .compatible = "ti,omap5430-bandgap",
- .data = (void *)&omap5430_data,
+ .compatible = "ti,omap4-bandgap",
},
/* Sentinel */
{ },
@@ -1249,9 +1250,10 @@ static const struct of_device_id of_omap
static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
{
struct device_node *node = pdev->dev.of_node;
- const struct of_device_id *of_id;
struct omap_bandgap *bg_ptr;
- u32 prop;
+ struct device *scm;
+ u32 val;
+ int ret;
/* just for the sake */
if (!node) {
@@ -1266,16 +1268,34 @@ static struct omap_bandgap *omap_bandgap
return ERR_PTR(-ENOMEM);
}
- of_id = of_match_device(of_omap_bandgap_match, &pdev->dev);
- if (of_id)
- bg_ptr->pdata = of_id->data;
+ scm = omap_control_get();
+ if(!scm)
+ return 0;
+
+ ret = omap_control_readl(scm, 0x0, &val);
+ if(ret)
+ return 0;
+
+ /*
+ * Check omap control core module revision to find out
+ * bandgap type
+ */
+ switch ((val & 0x3ff) >> 8) {
+ case 1:
+ /* 4430 */
+ bg_ptr->pdata = &omap4460_data;
+ break;
+ case 2:
+ /* 4460 */
+ bg_ptr->pdata = &omap4460_data;
+ break;
+ default:
+ /* Unknown omap control core module revision */
+ return 0;
+ }
if (bg_ptr->pdata->has_tshut) {
- if (of_property_read_u32(node, "ti,tshut-gpio", &prop) < 0) {
- dev_err(&pdev->dev, "missing tshut gpio in device tree\n");
- return ERR_PTR(-EINVAL);
- }
- bg_ptr->tshut_gpio = prop;
+ bg_ptr->tshut_gpio = bg_ptr->pdata->tshut_gpio;
if (!gpio_is_valid(bg_ptr->tshut_gpio)) {
dev_err(&pdev->dev, "invalid gpio for tshut (%d)\n",
bg_ptr->tshut_gpio);
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [linux-pm] [RFC PATCH 00/11] OMAP System Control Module
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-06-01 0:12 ` Kevin Hilman
-1 siblings, 0 replies; 198+ messages in thread
From: Kevin Hilman @ 2012-06-01 0:12 UTC (permalink / raw)
To: Eduardo Valentin
Cc: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul,
amit.kucheria, balbi, linux-pm, linux-omap, linux-arm-kernel
Hi Eduardo,
Eduardo Valentin <eduardo.valentin@ti.com> writes:
> Hello Paul and Tony,
>
> This is a series of patches adding a basic support for system control module,
> on OMAP4+ context. It is a working in progress, but I wanted to share already
> to get your feedback.
This is a great start, thanks for working on this. We have been needing
to do this for awhile now so I'm glad to see you working on it.
> I've modeled the driver as an MFD. You will see in this series:
> . A rework of the system control module header (patch from Santosh, picked from the list)
> . Device creation for control module core
> . Early device creation for control module core
> . The MFD core driver for system control module
> . The MFD child for usb-phy pin control
> . The MFD child for bandgap sensor
> . Very early exposure of OMAP4 thermal zone
> . All added drivers are only supporting DT probing
> . The series is based on linux-omap master, as it has the hwmod entries for SCM.
>
> The overall idea of this series is to put in place the infrastructure. It is
> not touching nor removing the existing APIs under mach-omap2/control.c for now.
> But the target is to have these APIs moved to the MFD core driver.
IMO, the best time to create the APIs is when the new MFD children are
created.
The goal should be that none of these drivers should be doing direct
read/writes to the control module.
Kevin
^ permalink raw reply [flat|nested] 198+ messages in thread
* [linux-pm] [RFC PATCH 00/11] OMAP System Control Module
@ 2012-06-01 0:12 ` Kevin Hilman
0 siblings, 0 replies; 198+ messages in thread
From: Kevin Hilman @ 2012-06-01 0:12 UTC (permalink / raw)
To: linux-arm-kernel
Hi Eduardo,
Eduardo Valentin <eduardo.valentin@ti.com> writes:
> Hello Paul and Tony,
>
> This is a series of patches adding a basic support for system control module,
> on OMAP4+ context. It is a working in progress, but I wanted to share already
> to get your feedback.
This is a great start, thanks for working on this. We have been needing
to do this for awhile now so I'm glad to see you working on it.
> I've modeled the driver as an MFD. You will see in this series:
> . A rework of the system control module header (patch from Santosh, picked from the list)
> . Device creation for control module core
> . Early device creation for control module core
> . The MFD core driver for system control module
> . The MFD child for usb-phy pin control
> . The MFD child for bandgap sensor
> . Very early exposure of OMAP4 thermal zone
> . All added drivers are only supporting DT probing
> . The series is based on linux-omap master, as it has the hwmod entries for SCM.
>
> The overall idea of this series is to put in place the infrastructure. It is
> not touching nor removing the existing APIs under mach-omap2/control.c for now.
> But the target is to have these APIs moved to the MFD core driver.
IMO, the best time to create the APIs is when the new MFD children are
created.
The goal should be that none of these drivers should be doing direct
read/writes to the control module.
Kevin
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 02/11] ARM: OMAP: expose control.h to mach area
2012-05-28 10:30 ` Valentin, Eduardo
@ 2012-06-01 11:19 ` Tony Lindgren
-1 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 11:19 UTC (permalink / raw)
To: Valentin, Eduardo
Cc: Shilimkar, Santosh, b-cousson, kishon, kbaidarov, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap
* Valentin, Eduardo <eduardo.valentin@ti.com> [120528 03:34]:
> Hello,
>
> On Mon, May 28, 2012 at 12:25 PM, Shilimkar, Santosh
> <santosh.shilimkar@ti.com> wrote:
> > On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
> > <eduardo.valentin@ti.com> wrote:
> >> This patch exposes the definitions under control.h to
> >> drivers outside the machine code.
> >>
> >> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> >> ---
> > After second thought, this complete header movement needs to avoided.
> > Drivers should not anyway include something like <mach/control.h>
> >
> > May be split the control.h header file data into ..
> > - defines used by mach-omap2/* files which can remain in "control.h"
> > in existing location.
>
> OK..
>
> > - common functions/defines used across drivers/*, mach-omap2/*,
> > plat-omap/*, should
> > go to include/linux/omap_control.h
>
> Right..
>
> > - Driver specific defines like thermal, usb etc, should go to
> > respective drivers file.
>
> Indeed.
>
> >
> > What do you think ?
>
> I think we are in line. And I believe I saw a similar comment by
> Benoit in other email thread.
>
> Having a better thinking of this, it makes sense to have the
> definition specific to drivers in the driver scope only, as they are
> going to be used only there anyway.
>
> I will drop this patch off and update the remaining changes
> accordingly (drop the change in control.h for thermal specific and
> move it to omap_bandgap.h).
Yes good, we should not expose these to the other drivers, that will
lead into misuse of these defines from various other drivers that we
may not notice until it's too late.
Regards,
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 02/11] ARM: OMAP: expose control.h to mach area
@ 2012-06-01 11:19 ` Tony Lindgren
0 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 11:19 UTC (permalink / raw)
To: linux-arm-kernel
* Valentin, Eduardo <eduardo.valentin@ti.com> [120528 03:34]:
> Hello,
>
> On Mon, May 28, 2012 at 12:25 PM, Shilimkar, Santosh
> <santosh.shilimkar@ti.com> wrote:
> > On Fri, May 25, 2012 at 1:55 PM, Eduardo Valentin
> > <eduardo.valentin@ti.com> wrote:
> >> This patch exposes the definitions under control.h to
> >> drivers outside the machine code.
> >>
> >> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> >> ---
> > After second thought, this complete header movement needs to avoided.
> > Drivers should not anyway include something like <mach/control.h>
> >
> > May be split the control.h header file data into ..
> > - defines used by mach-omap2/* files which can remain in "control.h"
> > in existing location.
>
> OK..
>
> > - common functions/defines used across drivers/*, mach-omap2/*,
> > plat-omap/*, should
> > go to include/linux/omap_control.h
>
> Right..
>
> > - Driver specific defines like thermal, usb etc, should go to
> > respective drivers file.
>
> Indeed.
>
> >
> > What do you think ?
>
> I think we are in line. And I believe I saw a similar comment by
> Benoit in other email thread.
>
> Having a better thinking of this, it makes sense to have the
> definition specific to drivers in the driver scope only, as they are
> going to be used only there anyway.
>
> I will drop this patch off and update the remaining changes
> accordingly (drop the change in control.h for thermal specific and
> move it to omap_bandgap.h).
Yes good, we should not expose these to the other drivers, that will
lead into misuse of these defines from various other drivers that we
may not notice until it's too late.
Regards,
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-05-29 13:25 ` Cousson, Benoit
@ 2012-06-01 11:29 ` Tony Lindgren
-1 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 11:29 UTC (permalink / raw)
To: Cousson, Benoit
Cc: amit.kucheria, balbi, kishon, J Keerthy, linux-pm, linux-omap,
linux-arm-kernel
* Cousson, Benoit <b-cousson@ti.com> [120529 06:29]:
> On 5/28/2012 1:35 PM, Eduardo Valentin wrote:
> >>
> >>Mmm, we can have up to 4 control module instances in OMAP4.
> >>
> >>Well, I'm not sure it worth considering them as separate devices. Is
> >>that your plan as well?
> >
> >At least for now I was focusing on the ctrl_module_core ...
>
> OK, that's a good start already :-)
>
> >>But since they all have different base address, it will be trick to
> >>handle them with only a single entry.
> >
> >Indeed. We can always add the support latter on.
> >
> >I am not sure what would be the best way to handle those instances though,
> >and how they are going to expose APIs. Would need to have an instance bound
> >to API set?
>
> We should not go to that path I guess. We should have an API at
> children level independent of the underlying control module
> partitioning.
These should be separate driver instances for the control modules.
And then the ioremapped area should ignore at least the padconf
registers so drivers/pinctrl/pinctrl-simple can handle those. There
should not be any dependencies to the SCM driver from pinctrl-simple,
the core SCM driver can manage the clocks and trigger the save of
padconf regs.
Also we should allow MMC driver handle the MMC specific registers
and USB driver(s) handle the USB specific registers if possible. Those
should not live under drivers/mfd unless there are some dependencies
other than trying to ioremap the whole SCM module instead of ioremapping
in each driver.
We can have a static map for the SCM, so ioremapping each driver
individually should not be an issue.
Regards,
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-06-01 11:29 ` Tony Lindgren
0 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 11:29 UTC (permalink / raw)
To: linux-arm-kernel
* Cousson, Benoit <b-cousson@ti.com> [120529 06:29]:
> On 5/28/2012 1:35 PM, Eduardo Valentin wrote:
> >>
> >>Mmm, we can have up to 4 control module instances in OMAP4.
> >>
> >>Well, I'm not sure it worth considering them as separate devices. Is
> >>that your plan as well?
> >
> >At least for now I was focusing on the ctrl_module_core ...
>
> OK, that's a good start already :-)
>
> >>But since they all have different base address, it will be trick to
> >>handle them with only a single entry.
> >
> >Indeed. We can always add the support latter on.
> >
> >I am not sure what would be the best way to handle those instances though,
> >and how they are going to expose APIs. Would need to have an instance bound
> >to API set?
>
> We should not go to that path I guess. We should have an API at
> children level independent of the underlying control module
> partitioning.
These should be separate driver instances for the control modules.
And then the ioremapped area should ignore at least the padconf
registers so drivers/pinctrl/pinctrl-simple can handle those. There
should not be any dependencies to the SCM driver from pinctrl-simple,
the core SCM driver can manage the clocks and trigger the save of
padconf regs.
Also we should allow MMC driver handle the MMC specific registers
and USB driver(s) handle the USB specific registers if possible. Those
should not live under drivers/mfd unless there are some dependencies
other than trying to ioremap the whole SCM module instead of ioremapping
in each driver.
We can have a static map for the SCM, so ioremapping each driver
individually should not be an issue.
Regards,
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 06/11] OMAP2+: use control module mfd driver in omap_type
2012-05-28 11:24 ` Eduardo Valentin
@ 2012-06-01 11:35 ` Tony Lindgren
-1 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 11:35 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, balbi, kishon, linux-pm, linux-omap, linux-arm-kernel
* Eduardo Valentin <eduardo.valentin@ti.com> [120528 04:28]:
> On Mon, May 28, 2012 at 03:32:50PM +0530, Shilimkar, Santosh wrote:
> > On Fri, May 25, 2012 at 6:23 PM, Cousson, Benoit <b-cousson@ti.com> wrote:
> > >
> > > OK, not really related to that patch, but the previous cpu_is_omap24xx makes
> > > me think of that :-)
> > >
> > > What about the omap<X>_check_revision used by cpu_is_XXX?
> > >
> > > This call is the very first one to require the control module access in
> > > order to get the ID_CODE inside the control module.
> > >
> > > So far it still use that ugly hard coded phys -> virtual address macro that
> > > is sued for that.
> > >
> > Agree with Benoits comment. One way to deal with this is,
> > store the register offset with init and then just use it here.
> >
> > That way you can get rid of all cpu_is_XXXX() from this function.
>
> I see. I need to check how this storing would look like.
> Probably we can do the storing when the early device gets probed.
As this needs to be initialized very early I'd rather avoid dependencies
to drivers for this. Maybe that register can be read and saved when the
device gets built? It's ioremapped anyways at that point.
That is assuming we don't need to export it to drivers or constantly
read it..
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 06/11] OMAP2+: use control module mfd driver in omap_type
@ 2012-06-01 11:35 ` Tony Lindgren
0 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 11:35 UTC (permalink / raw)
To: linux-arm-kernel
* Eduardo Valentin <eduardo.valentin@ti.com> [120528 04:28]:
> On Mon, May 28, 2012 at 03:32:50PM +0530, Shilimkar, Santosh wrote:
> > On Fri, May 25, 2012 at 6:23 PM, Cousson, Benoit <b-cousson@ti.com> wrote:
> > >
> > > OK, not really related to that patch, but the previous cpu_is_omap24xx makes
> > > me think of that :-)
> > >
> > > What about the omap<X>_check_revision used by cpu_is_XXX?
> > >
> > > This call is the very first one to require the control module access in
> > > order to get the ID_CODE inside the control module.
> > >
> > > So far it still use that ugly hard coded phys -> virtual address macro that
> > > is sued for that.
> > >
> > Agree with Benoits comment. One way to deal with this is,
> > store the register offset with init and then just use it here.
> >
> > That way you can get rid of all cpu_is_XXXX() from this function.
>
> I see. I need to check how this storing would look like.
> Probably we can do the storing when the early device gets probed.
As this needs to be initialized very early I'd rather avoid dependencies
to drivers for this. Maybe that register can be read and saved when the
device gets built? It's ioremapped anyways at that point.
That is assuming we don't need to export it to drivers or constantly
read it..
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-06-01 11:38 ` Tony Lindgren
-1 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 11:38 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, balbi, kishon, linux-pm, linux-omap, linux-arm-kernel
* Eduardo Valentin <eduardo.valentin@ti.com> [120525 01:31]:
> +int omap4_usb_phy_power(struct device *dev, int on)
> +{
> + u32 val;
> + int ret;
> +
> + if (on) {
> + ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
> + if (!ret && (val & PHY_PD)) {
> + ret = omap_control_writel(dev, ~PHY_PD,
> + CONTROL_DEV_CONF);
> + /* XXX: add proper documentation for this delay */
> + mdelay(200);
> + }
> + } else {
> + ret = omap_control_writel(dev, PHY_PD, CONTROL_DEV_CONF);
> + }
> +
> + return ret;
> +}
> +EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
I'm not quite convinced that we should export omap_control_read/write
to drivers. If there's a clear register area this USB phy driver can
manage, then ioremaping it separately makes sense. If it's just one
register, then exporting something like omap_control_usb_phy_set()
might be better for ensuring that drivers don't mess up things for
other drivers.
Regards,
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
@ 2012-06-01 11:38 ` Tony Lindgren
0 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 11:38 UTC (permalink / raw)
To: linux-arm-kernel
* Eduardo Valentin <eduardo.valentin@ti.com> [120525 01:31]:
> +int omap4_usb_phy_power(struct device *dev, int on)
> +{
> + u32 val;
> + int ret;
> +
> + if (on) {
> + ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
> + if (!ret && (val & PHY_PD)) {
> + ret = omap_control_writel(dev, ~PHY_PD,
> + CONTROL_DEV_CONF);
> + /* XXX: add proper documentation for this delay */
> + mdelay(200);
> + }
> + } else {
> + ret = omap_control_writel(dev, PHY_PD, CONTROL_DEV_CONF);
> + }
> +
> + return ret;
> +}
> +EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
I'm not quite convinced that we should export omap_control_read/write
to drivers. If there's a clear register area this USB phy driver can
manage, then ioremaping it separately makes sense. If it's just one
register, then exporting something like omap_control_usb_phy_set()
might be better for ensuring that drivers don't mess up things for
other drivers.
Regards,
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-06-01 11:42 ` Tony Lindgren
-1 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 11:42 UTC (permalink / raw)
To: Eduardo Valentin
Cc: b-cousson, kishon, kbaidarov, santosh.shilimkar, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Keerthy
* Eduardo Valentin <eduardo.valentin@ti.com> [120525 01:31]:
> In the System Control Module, OMAP supplies a voltage reference
> and a temperature sensor feature that are gathered in the band
> gap voltage and temperature sensor (VBGAPTS) module. The band
> gap provides current and voltage reference for its internal
> circuits and other analog IP blocks. The analog-to-digital
> converter (ADC) produces an output value that is proportional
> to the silicon temperature.
>
> This patch provides a platform driver which expose this feature.
> It is moduled as a MFD child of the System Control Module core
> MFD driver.
>
> This driver provides only APIs to access the device properties,
> like temperature, thresholds and update rate.
Here too you a better long term solution is probably to ioremap
the temp sensor registers for the driver. That way alloc_mem_region()
provides some checks so the driver won't stomp over other registers.
If you need to use omap_ctrl_read/write here, then we should at
least clearly understand and document why it needs to be done that
way instead of following standard ioremap + readl/writel.
Regards,
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
@ 2012-06-01 11:42 ` Tony Lindgren
0 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 11:42 UTC (permalink / raw)
To: linux-arm-kernel
* Eduardo Valentin <eduardo.valentin@ti.com> [120525 01:31]:
> In the System Control Module, OMAP supplies a voltage reference
> and a temperature sensor feature that are gathered in the band
> gap voltage and temperature sensor (VBGAPTS) module. The band
> gap provides current and voltage reference for its internal
> circuits and other analog IP blocks. The analog-to-digital
> converter (ADC) produces an output value that is proportional
> to the silicon temperature.
>
> This patch provides a platform driver which expose this feature.
> It is moduled as a MFD child of the System Control Module core
> MFD driver.
>
> This driver provides only APIs to access the device properties,
> like temperature, thresholds and update rate.
Here too you a better long term solution is probably to ioremap
the temp sensor registers for the driver. That way alloc_mem_region()
provides some checks so the driver won't stomp over other registers.
If you need to use omap_ctrl_read/write here, then we should at
least clearly understand and document why it needs to be done that
way instead of following standard ioremap + readl/writel.
Regards,
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-06-01 11:29 ` Tony Lindgren
@ 2012-06-01 12:30 ` Shilimkar, Santosh
-1 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-06-01 12:30 UTC (permalink / raw)
To: Tony Lindgren
Cc: Cousson, Benoit, eduardo.valentin, kishon, kbaidarov, paul,
balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, J Keerthy
On Fri, Jun 1, 2012 at 7:29 PM, Tony Lindgren <tony@atomide.com> wrote:
> * Cousson, Benoit <b-cousson@ti.com> [120529 06:29]:
>> On 5/28/2012 1:35 PM, Eduardo Valentin wrote:
>> >>
>> >>Mmm, we can have up to 4 control module instances in OMAP4.
>> >>
>> >>Well, I'm not sure it worth considering them as separate devices. Is
>> >>that your plan as well?
>> >
>> >At least for now I was focusing on the ctrl_module_core ...
>>
>> OK, that's a good start already :-)
>>
>> >>But since they all have different base address, it will be trick to
>> >>handle them with only a single entry.
>> >
>> >Indeed. We can always add the support latter on.
>> >
>> >I am not sure what would be the best way to handle those instances though,
>> >and how they are going to expose APIs. Would need to have an instance bound
>> >to API set?
>>
>> We should not go to that path I guess. We should have an API at
>> children level independent of the underlying control module
>> partitioning.
>
> These should be separate driver instances for the control modules.
>
> And then the ioremapped area should ignore at least the padconf
> registers so drivers/pinctrl/pinctrl-simple can handle those. There
> should not be any dependencies to the SCM driver from pinctrl-simple,
> the core SCM driver can manage the clocks and trigger the save of
> padconf regs.
>
> Also we should allow MMC driver handle the MMC specific registers
> and USB driver(s) handle the USB specific registers if possible. Those
> should not live under drivers/mfd unless there are some dependencies
> other than trying to ioremap the whole SCM module instead of ioremapping
> in each driver.
>
> We can have a static map for the SCM, so ioremapping each driver
> individually should not be an issue.
>
This sounds a good idea. With this we may not even need a core control
module drivers if all the individual drivers take care of the registers they
care. Mapping shouldn't be a problem as you mentioned.
Regards
Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-06-01 12:30 ` Shilimkar, Santosh
0 siblings, 0 replies; 198+ messages in thread
From: Shilimkar, Santosh @ 2012-06-01 12:30 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jun 1, 2012 at 7:29 PM, Tony Lindgren <tony@atomide.com> wrote:
> * Cousson, Benoit <b-cousson@ti.com> [120529 06:29]:
>> On 5/28/2012 1:35 PM, Eduardo Valentin wrote:
>> >>
>> >>Mmm, we can have up to 4 control module instances in OMAP4.
>> >>
>> >>Well, I'm not sure it worth considering them as separate devices. Is
>> >>that your plan as well?
>> >
>> >At least for now I was focusing on the ctrl_module_core ...
>>
>> OK, that's a good start already :-)
>>
>> >>But since they all have different base address, it will be trick to
>> >>handle them with only a single entry.
>> >
>> >Indeed. We can always add the support latter on.
>> >
>> >I am not sure what would be the best way to handle those instances though,
>> >and how they are going to expose APIs. Would need to have an instance bound
>> >to API set?
>>
>> We should not go to that path I guess. We should have an API at
>> children level independent of the underlying control module
>> partitioning.
>
> These should be separate driver instances for the control modules.
>
> And then the ioremapped area should ignore at least the padconf
> registers so drivers/pinctrl/pinctrl-simple can handle those. There
> should not be any dependencies to the SCM driver from pinctrl-simple,
> the core SCM driver can manage the clocks and trigger the save of
> padconf regs.
>
> Also we should allow MMC driver handle the MMC specific registers
> and USB driver(s) handle the USB specific registers if possible. Those
> should not live under drivers/mfd unless there are some dependencies
> other than trying to ioremap the whole SCM module instead of ioremapping
> in each driver.
>
> We can have a static map for the SCM, so ioremapping each driver
> individually should not be an issue.
>
This sounds a good idea. With this we may not even need a core control
module drivers if all the individual drivers take care of the registers they
care. Mapping shouldn't be a problem as you mentioned.
Regards
Santosh
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-06-01 12:30 ` Shilimkar, Santosh
@ 2012-06-01 12:43 ` Cousson, Benoit
-1 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-06-01 12:43 UTC (permalink / raw)
To: Shilimkar, Santosh
Cc: amit.kucheria, balbi, kishon, J Keerthy, linux-pm, linux-omap,
linux-arm-kernel
On 6/1/2012 2:30 PM, Shilimkar, Santosh wrote:
> On Fri, Jun 1, 2012 at 7:29 PM, Tony Lindgren<tony@atomide.com> wrote:
>> * Cousson, Benoit<b-cousson@ti.com> [120529 06:29]:
>>> On 5/28/2012 1:35 PM, Eduardo Valentin wrote:
>>>>>
>>>>> Mmm, we can have up to 4 control module instances in OMAP4.
>>>>>
>>>>> Well, I'm not sure it worth considering them as separate devices. Is
>>>>> that your plan as well?
>>>>
>>>> At least for now I was focusing on the ctrl_module_core ...
>>>
>>> OK, that's a good start already :-)
>>>
>>>>> But since they all have different base address, it will be trick to
>>>>> handle them with only a single entry.
>>>>
>>>> Indeed. We can always add the support latter on.
>>>>
>>>> I am not sure what would be the best way to handle those instances though,
>>>> and how they are going to expose APIs. Would need to have an instance bound
>>>> to API set?
>>>
>>> We should not go to that path I guess. We should have an API at
>>> children level independent of the underlying control module
>>> partitioning.
>>
>> These should be separate driver instances for the control modules.
>>
>> And then the ioremapped area should ignore at least the padconf
>> registers so drivers/pinctrl/pinctrl-simple can handle those. There
>> should not be any dependencies to the SCM driver from pinctrl-simple,
>> the core SCM driver can manage the clocks and trigger the save of
>> padconf regs.
>>
>> Also we should allow MMC driver handle the MMC specific registers
>> and USB driver(s) handle the USB specific registers if possible. Those
>> should not live under drivers/mfd unless there are some dependencies
>> other than trying to ioremap the whole SCM module instead of ioremapping
>> in each driver.
>>
>> We can have a static map for the SCM, so ioremapping each driver
>> individually should not be an issue.
>>
> This sounds a good idea. With this we may not even need a core control
> module drivers if all the individual drivers take care of the registers they
> care. Mapping shouldn't be a problem as you mentioned.
We should keep the MFD for PM / OCP single port correctness. Other than
that it will be mostly useless, indeed.
Regards,
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-06-01 12:43 ` Cousson, Benoit
0 siblings, 0 replies; 198+ messages in thread
From: Cousson, Benoit @ 2012-06-01 12:43 UTC (permalink / raw)
To: linux-arm-kernel
On 6/1/2012 2:30 PM, Shilimkar, Santosh wrote:
> On Fri, Jun 1, 2012 at 7:29 PM, Tony Lindgren<tony@atomide.com> wrote:
>> * Cousson, Benoit<b-cousson@ti.com> [120529 06:29]:
>>> On 5/28/2012 1:35 PM, Eduardo Valentin wrote:
>>>>>
>>>>> Mmm, we can have up to 4 control module instances in OMAP4.
>>>>>
>>>>> Well, I'm not sure it worth considering them as separate devices. Is
>>>>> that your plan as well?
>>>>
>>>> At least for now I was focusing on the ctrl_module_core ...
>>>
>>> OK, that's a good start already :-)
>>>
>>>>> But since they all have different base address, it will be trick to
>>>>> handle them with only a single entry.
>>>>
>>>> Indeed. We can always add the support latter on.
>>>>
>>>> I am not sure what would be the best way to handle those instances though,
>>>> and how they are going to expose APIs. Would need to have an instance bound
>>>> to API set?
>>>
>>> We should not go to that path I guess. We should have an API at
>>> children level independent of the underlying control module
>>> partitioning.
>>
>> These should be separate driver instances for the control modules.
>>
>> And then the ioremapped area should ignore at least the padconf
>> registers so drivers/pinctrl/pinctrl-simple can handle those. There
>> should not be any dependencies to the SCM driver from pinctrl-simple,
>> the core SCM driver can manage the clocks and trigger the save of
>> padconf regs.
>>
>> Also we should allow MMC driver handle the MMC specific registers
>> and USB driver(s) handle the USB specific registers if possible. Those
>> should not live under drivers/mfd unless there are some dependencies
>> other than trying to ioremap the whole SCM module instead of ioremapping
>> in each driver.
>>
>> We can have a static map for the SCM, so ioremapping each driver
>> individually should not be an issue.
>>
> This sounds a good idea. With this we may not even need a core control
> module drivers if all the individual drivers take care of the registers they
> care. Mapping shouldn't be a problem as you mentioned.
We should keep the MFD for PM / OCP single port correctness. Other than
that it will be mostly useless, indeed.
Regards,
Benoit
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [linux-pm] [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
2012-06-01 11:38 ` Tony Lindgren
@ 2012-06-01 13:20 ` Tony Lindgren
-1 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 13:20 UTC (permalink / raw)
To: Eduardo Valentin
Cc: amit.kucheria, balbi, kishon, linux-pm, linux-omap,
linux-arm-kernel, Kevin Hilman
* Tony Lindgren <tony@atomide.com> [120601 04:43]:
> * Eduardo Valentin <eduardo.valentin@ti.com> [120525 01:31]:
> > +int omap4_usb_phy_power(struct device *dev, int on)
> > +{
> > + u32 val;
> > + int ret;
> > +
> > + if (on) {
> > + ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
> > + if (!ret && (val & PHY_PD)) {
> > + ret = omap_control_writel(dev, ~PHY_PD,
> > + CONTROL_DEV_CONF);
> > + /* XXX: add proper documentation for this delay */
> > + mdelay(200);
> > + }
> > + } else {
> > + ret = omap_control_writel(dev, PHY_PD, CONTROL_DEV_CONF);
> > + }
> > +
> > + return ret;
> > +}
> > +EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
>
> I'm not quite convinced that we should export omap_control_read/write
> to drivers. If there's a clear register area this USB phy driver can
> manage, then ioremaping it separately makes sense. If it's just one
> register, then exporting something like omap_control_usb_phy_set()
> might be better for ensuring that drivers don't mess up things for
> other drivers.
After chatting with Benoit a bit we came to the conclusion that the
clock and powerdomain state needs to be managed for the children by
the SCM core driver so the children can't be completely independent.
But rather than exporting omap_control_read/write, maybe you can
register the usb/bandgap whatever children with SCM core driver,
then have the runtime PM calls from children be passthrough calls
to the parent?
Maybe Kevin has some better ideas here?
Regards,
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* [linux-pm] [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
@ 2012-06-01 13:20 ` Tony Lindgren
0 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 13:20 UTC (permalink / raw)
To: linux-arm-kernel
* Tony Lindgren <tony@atomide.com> [120601 04:43]:
> * Eduardo Valentin <eduardo.valentin@ti.com> [120525 01:31]:
> > +int omap4_usb_phy_power(struct device *dev, int on)
> > +{
> > + u32 val;
> > + int ret;
> > +
> > + if (on) {
> > + ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
> > + if (!ret && (val & PHY_PD)) {
> > + ret = omap_control_writel(dev, ~PHY_PD,
> > + CONTROL_DEV_CONF);
> > + /* XXX: add proper documentation for this delay */
> > + mdelay(200);
> > + }
> > + } else {
> > + ret = omap_control_writel(dev, PHY_PD, CONTROL_DEV_CONF);
> > + }
> > +
> > + return ret;
> > +}
> > +EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
>
> I'm not quite convinced that we should export omap_control_read/write
> to drivers. If there's a clear register area this USB phy driver can
> manage, then ioremaping it separately makes sense. If it's just one
> register, then exporting something like omap_control_usb_phy_set()
> might be better for ensuring that drivers don't mess up things for
> other drivers.
After chatting with Benoit a bit we came to the conclusion that the
clock and powerdomain state needs to be managed for the children by
the SCM core driver so the children can't be completely independent.
But rather than exporting omap_control_read/write, maybe you can
register the usb/bandgap whatever children with SCM core driver,
then have the runtime PM calls from children be passthrough calls
to the parent?
Maybe Kevin has some better ideas here?
Regards,
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-06-01 11:29 ` Tony Lindgren
@ 2012-06-01 13:40 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-01 13:40 UTC (permalink / raw)
To: Tony Lindgren
Cc: Cousson, Benoit, paul, amit.kucheria, balbi, kishon,
eduardo.valentin, santosh.shilimkar, J Keerthy, linux-pm,
linux-omap, linux-arm-kernel, amit.kachhap
Hi, Tony.
On 06/01/2012 03:29 PM, Tony Lindgren wrote:
> * Cousson, Benoit <b-cousson@ti.com> [120529 06:29]:
>> On 5/28/2012 1:35 PM, Eduardo Valentin wrote:
>>>> Mmm, we can have up to 4 control module instances in OMAP4.
>>>>
>>>> Well, I'm not sure it worth considering them as separate devices. Is
>>>> that your plan as well?
>>> At least for now I was focusing on the ctrl_module_core ...
>> OK, that's a good start already :-)
>>
>>>> But since they all have different base address, it will be trick to
>>>> handle them with only a single entry.
>>> Indeed. We can always add the support latter on.
>>>
>>> I am not sure what would be the best way to handle those instances though,
>>> and how they are going to expose APIs. Would need to have an instance bound
>>> to API set?
>> We should not go to that path I guess. We should have an API at
>> children level independent of the underlying control module
>> partitioning.
> These should be separate driver instances for the control modules.
>
> And then the ioremapped area should ignore at least the padconf
> registers so drivers/pinctrl/pinctrl-simple can handle those. There
> should not be any dependencies to the SCM driver from pinctrl-simple,
> the core SCM driver can manage the clocks and trigger the save of
> padconf regs.
>
> Also we should allow MMC driver handle the MMC specific registers
> and USB driver(s) handle the USB specific registers if possible. Those
> should not live under drivers/mfd unless there are some dependencies
> other than trying to ioremap the whole SCM module instead of ioremapping
> in each driver.
>
> We can have a static map for the SCM, so ioremapping each driver
> individually should not be an issue.
Actually SCM registers window is mapped statically. Mapping is defined in omap44xx_io_desc[] in arch/arm/mach-omap2/io.c:
...
.virtual = L4_44XX_VIRT,
.pfn = __phys_to_pfn(L4_44XX_PHYS),
.length = L4_44XX_SIZE,
.type = MT_DEVICE,
...
So ioremap() always returns same virtual address (0xfc002000).
BR,
Konstantin Baydarov.
>
> Regards,
>
> Tony
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-06-01 13:40 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-01 13:40 UTC (permalink / raw)
To: linux-arm-kernel
Hi, Tony.
On 06/01/2012 03:29 PM, Tony Lindgren wrote:
> * Cousson, Benoit <b-cousson@ti.com> [120529 06:29]:
>> On 5/28/2012 1:35 PM, Eduardo Valentin wrote:
>>>> Mmm, we can have up to 4 control module instances in OMAP4.
>>>>
>>>> Well, I'm not sure it worth considering them as separate devices. Is
>>>> that your plan as well?
>>> At least for now I was focusing on the ctrl_module_core ...
>> OK, that's a good start already :-)
>>
>>>> But since they all have different base address, it will be trick to
>>>> handle them with only a single entry.
>>> Indeed. We can always add the support latter on.
>>>
>>> I am not sure what would be the best way to handle those instances though,
>>> and how they are going to expose APIs. Would need to have an instance bound
>>> to API set?
>> We should not go to that path I guess. We should have an API at
>> children level independent of the underlying control module
>> partitioning.
> These should be separate driver instances for the control modules.
>
> And then the ioremapped area should ignore at least the padconf
> registers so drivers/pinctrl/pinctrl-simple can handle those. There
> should not be any dependencies to the SCM driver from pinctrl-simple,
> the core SCM driver can manage the clocks and trigger the save of
> padconf regs.
>
> Also we should allow MMC driver handle the MMC specific registers
> and USB driver(s) handle the USB specific registers if possible. Those
> should not live under drivers/mfd unless there are some dependencies
> other than trying to ioremap the whole SCM module instead of ioremapping
> in each driver.
>
> We can have a static map for the SCM, so ioremapping each driver
> individually should not be an issue.
Actually SCM registers window is mapped statically. Mapping is defined in omap44xx_io_desc[] in arch/arm/mach-omap2/io.c:
...
.virtual = L4_44XX_VIRT,
.pfn = __phys_to_pfn(L4_44XX_PHYS),
.length = L4_44XX_SIZE,
.type = MT_DEVICE,
...
So ioremap() always returns same virtual address (0xfc002000).
BR,
Konstantin Baydarov.
>
> Regards,
>
> Tony
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [linux-pm] [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
2012-06-01 13:20 ` Tony Lindgren
@ 2012-06-01 14:07 ` Kevin Hilman
-1 siblings, 0 replies; 198+ messages in thread
From: Kevin Hilman @ 2012-06-01 14:07 UTC (permalink / raw)
To: Tony Lindgren
Cc: Eduardo Valentin, balbi, kishon, amit.kucheria, linux-pm,
linux-omap, linux-arm-kernel
Tony Lindgren <tony@atomide.com> writes:
> * Tony Lindgren <tony@atomide.com> [120601 04:43]:
>> * Eduardo Valentin <eduardo.valentin@ti.com> [120525 01:31]:
>> > +int omap4_usb_phy_power(struct device *dev, int on)
>> > +{
>> > + u32 val;
>> > + int ret;
>> > +
>> > + if (on) {
>> > + ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
>> > + if (!ret && (val & PHY_PD)) {
>> > + ret = omap_control_writel(dev, ~PHY_PD,
>> > + CONTROL_DEV_CONF);
>> > + /* XXX: add proper documentation for this delay */
>> > + mdelay(200);
>> > + }
>> > + } else {
>> > + ret = omap_control_writel(dev, PHY_PD, CONTROL_DEV_CONF);
>> > + }
>> > +
>> > + return ret;
>> > +}
>> > +EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
>>
>> I'm not quite convinced that we should export omap_control_read/write
>> to drivers. If there's a clear register area this USB phy driver can
>> manage, then ioremaping it separately makes sense. If it's just one
>> register, then exporting something like omap_control_usb_phy_set()
>> might be better for ensuring that drivers don't mess up things for
>> other drivers.
>
> After chatting with Benoit a bit we came to the conclusion that the
> clock and powerdomain state needs to be managed for the children by
> the SCM core driver so the children can't be completely independent.
>
> But rather than exporting omap_control_read/write, maybe you can
> register the usb/bandgap whatever children with SCM core driver,
> then have the runtime PM calls from children be passthrough calls
> to the parent?
>
> Maybe Kevin has some better ideas here?
Handling this with parent/child relationships is the way to go for
runtime PM.
In MFD, are all sub-devices always children of the core device in the
LDM? If so, it seems relatively easy to handle. If the parent/child
relationships are modeled correctly in the LDM, then the children do not
have to know anything about their parent, the runtime PM core will handle
this (parent will not be runtime suspended until all the children are.)
Kevin
^ permalink raw reply [flat|nested] 198+ messages in thread
* [linux-pm] [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
@ 2012-06-01 14:07 ` Kevin Hilman
0 siblings, 0 replies; 198+ messages in thread
From: Kevin Hilman @ 2012-06-01 14:07 UTC (permalink / raw)
To: linux-arm-kernel
Tony Lindgren <tony@atomide.com> writes:
> * Tony Lindgren <tony@atomide.com> [120601 04:43]:
>> * Eduardo Valentin <eduardo.valentin@ti.com> [120525 01:31]:
>> > +int omap4_usb_phy_power(struct device *dev, int on)
>> > +{
>> > + u32 val;
>> > + int ret;
>> > +
>> > + if (on) {
>> > + ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
>> > + if (!ret && (val & PHY_PD)) {
>> > + ret = omap_control_writel(dev, ~PHY_PD,
>> > + CONTROL_DEV_CONF);
>> > + /* XXX: add proper documentation for this delay */
>> > + mdelay(200);
>> > + }
>> > + } else {
>> > + ret = omap_control_writel(dev, PHY_PD, CONTROL_DEV_CONF);
>> > + }
>> > +
>> > + return ret;
>> > +}
>> > +EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
>>
>> I'm not quite convinced that we should export omap_control_read/write
>> to drivers. If there's a clear register area this USB phy driver can
>> manage, then ioremaping it separately makes sense. If it's just one
>> register, then exporting something like omap_control_usb_phy_set()
>> might be better for ensuring that drivers don't mess up things for
>> other drivers.
>
> After chatting with Benoit a bit we came to the conclusion that the
> clock and powerdomain state needs to be managed for the children by
> the SCM core driver so the children can't be completely independent.
>
> But rather than exporting omap_control_read/write, maybe you can
> register the usb/bandgap whatever children with SCM core driver,
> then have the runtime PM calls from children be passthrough calls
> to the parent?
>
> Maybe Kevin has some better ideas here?
Handling this with parent/child relationships is the way to go for
runtime PM.
In MFD, are all sub-devices always children of the core device in the
LDM? If so, it seems relatively easy to handle. If the parent/child
relationships are modeled correctly in the LDM, then the children do not
have to know anything about their parent, the runtime PM core will handle
this (parent will not be runtime suspended until all the children are.)
Kevin
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-06-01 13:40 ` Konstantin Baydarov
@ 2012-06-01 14:13 ` Tony Lindgren
-1 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 14:13 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: Cousson, Benoit, paul, amit.kucheria, balbi, kishon,
eduardo.valentin, santosh.shilimkar, J Keerthy, linux-pm,
linux-omap, linux-arm-kernel, amit.kachhap
* Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120601 06:44]:
> On 06/01/2012 03:29 PM, Tony Lindgren wrote:
> >
> > We can have a static map for the SCM, so ioremapping each driver
> > individually should not be an issue.
> Actually SCM registers window is mapped statically. Mapping is defined in omap44xx_io_desc[] in arch/arm/mach-omap2/io.c:
>
> ...
> .virtual = L4_44XX_VIRT,
> .pfn = __phys_to_pfn(L4_44XX_PHYS),
> .length = L4_44XX_SIZE,
> .type = MT_DEVICE,
> ...
>
>
> So ioremap() always returns same virtual address (0xfc002000).
Hmm I guess you mean L4_44XX_VIRT + offset. Otherwise drivers
would not work at all.. Or else I don't follow you.
Regards,
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-06-01 14:13 ` Tony Lindgren
0 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 14:13 UTC (permalink / raw)
To: linux-arm-kernel
* Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120601 06:44]:
> On 06/01/2012 03:29 PM, Tony Lindgren wrote:
> >
> > We can have a static map for the SCM, so ioremapping each driver
> > individually should not be an issue.
> Actually SCM registers window is mapped statically. Mapping is defined in omap44xx_io_desc[] in arch/arm/mach-omap2/io.c:
>
> ...
> .virtual = L4_44XX_VIRT,
> .pfn = __phys_to_pfn(L4_44XX_PHYS),
> .length = L4_44XX_SIZE,
> .type = MT_DEVICE,
> ...
>
>
> So ioremap() always returns same virtual address (0xfc002000).
Hmm I guess you mean L4_44XX_VIRT + offset. Otherwise drivers
would not work at all.. Or else I don't follow you.
Regards,
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [linux-pm] [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
2012-06-01 14:07 ` Kevin Hilman
@ 2012-06-01 14:15 ` Tony Lindgren
-1 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 14:15 UTC (permalink / raw)
To: Kevin Hilman
Cc: Eduardo Valentin, balbi, kishon, amit.kucheria, linux-pm,
linux-omap, linux-arm-kernel
* Kevin Hilman <khilman@ti.com> [120601 07:11]:
> Tony Lindgren <tony@atomide.com> writes:
>
> > * Tony Lindgren <tony@atomide.com> [120601 04:43]:
> >> * Eduardo Valentin <eduardo.valentin@ti.com> [120525 01:31]:
> >> > +int omap4_usb_phy_power(struct device *dev, int on)
> >> > +{
> >> > + u32 val;
> >> > + int ret;
> >> > +
> >> > + if (on) {
> >> > + ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
> >> > + if (!ret && (val & PHY_PD)) {
> >> > + ret = omap_control_writel(dev, ~PHY_PD,
> >> > + CONTROL_DEV_CONF);
> >> > + /* XXX: add proper documentation for this delay */
> >> > + mdelay(200);
> >> > + }
> >> > + } else {
> >> > + ret = omap_control_writel(dev, PHY_PD, CONTROL_DEV_CONF);
> >> > + }
> >> > +
> >> > + return ret;
> >> > +}
> >> > +EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
> >>
> >> I'm not quite convinced that we should export omap_control_read/write
> >> to drivers. If there's a clear register area this USB phy driver can
> >> manage, then ioremaping it separately makes sense. If it's just one
> >> register, then exporting something like omap_control_usb_phy_set()
> >> might be better for ensuring that drivers don't mess up things for
> >> other drivers.
> >
> > After chatting with Benoit a bit we came to the conclusion that the
> > clock and powerdomain state needs to be managed for the children by
> > the SCM core driver so the children can't be completely independent.
> >
> > But rather than exporting omap_control_read/write, maybe you can
> > register the usb/bandgap whatever children with SCM core driver,
> > then have the runtime PM calls from children be passthrough calls
> > to the parent?
> >
> > Maybe Kevin has some better ideas here?
>
> Handling this with parent/child relationships is the way to go for
> runtime PM.
>
> In MFD, are all sub-devices always children of the core device in the
> LDM? If so, it seems relatively easy to handle. If the parent/child
> relationships are modeled correctly in the LDM, then the children do not
> have to know anything about their parent, the runtime PM core will handle
> this (parent will not be runtime suspended until all the children are.)
OK, so the parent-child relationship is there for DT case, but how do
we set it for non-DT case? Call something like this from children:
omap_scm_register(dev, OMAP_SCM_USB_PHY) that then does device_move?
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* [linux-pm] [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
@ 2012-06-01 14:15 ` Tony Lindgren
0 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-01 14:15 UTC (permalink / raw)
To: linux-arm-kernel
* Kevin Hilman <khilman@ti.com> [120601 07:11]:
> Tony Lindgren <tony@atomide.com> writes:
>
> > * Tony Lindgren <tony@atomide.com> [120601 04:43]:
> >> * Eduardo Valentin <eduardo.valentin@ti.com> [120525 01:31]:
> >> > +int omap4_usb_phy_power(struct device *dev, int on)
> >> > +{
> >> > + u32 val;
> >> > + int ret;
> >> > +
> >> > + if (on) {
> >> > + ret = omap_control_readl(dev, CONTROL_DEV_CONF, &val);
> >> > + if (!ret && (val & PHY_PD)) {
> >> > + ret = omap_control_writel(dev, ~PHY_PD,
> >> > + CONTROL_DEV_CONF);
> >> > + /* XXX: add proper documentation for this delay */
> >> > + mdelay(200);
> >> > + }
> >> > + } else {
> >> > + ret = omap_control_writel(dev, PHY_PD, CONTROL_DEV_CONF);
> >> > + }
> >> > +
> >> > + return ret;
> >> > +}
> >> > +EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
> >>
> >> I'm not quite convinced that we should export omap_control_read/write
> >> to drivers. If there's a clear register area this USB phy driver can
> >> manage, then ioremaping it separately makes sense. If it's just one
> >> register, then exporting something like omap_control_usb_phy_set()
> >> might be better for ensuring that drivers don't mess up things for
> >> other drivers.
> >
> > After chatting with Benoit a bit we came to the conclusion that the
> > clock and powerdomain state needs to be managed for the children by
> > the SCM core driver so the children can't be completely independent.
> >
> > But rather than exporting omap_control_read/write, maybe you can
> > register the usb/bandgap whatever children with SCM core driver,
> > then have the runtime PM calls from children be passthrough calls
> > to the parent?
> >
> > Maybe Kevin has some better ideas here?
>
> Handling this with parent/child relationships is the way to go for
> runtime PM.
>
> In MFD, are all sub-devices always children of the core device in the
> LDM? If so, it seems relatively easy to handle. If the parent/child
> relationships are modeled correctly in the LDM, then the children do not
> have to know anything about their parent, the runtime PM core will handle
> this (parent will not be runtime suspended until all the children are.)
OK, so the parent-child relationship is there for DT case, but how do
we set it for non-DT case? Call something like this from children:
omap_scm_register(dev, OMAP_SCM_USB_PHY) that then does device_move?
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-06-01 14:13 ` Tony Lindgren
@ 2012-06-01 14:26 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-01 14:26 UTC (permalink / raw)
To: Tony Lindgren
Cc: Cousson, Benoit, paul, amit.kucheria, balbi, kishon,
eduardo.valentin, santosh.shilimkar, J Keerthy, linux-pm,
linux-omap, linux-arm-kernel, amit.kachhap
On 06/01/2012 06:13 PM, Tony Lindgren wrote:
> * Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120601 06:44]:
>> On 06/01/2012 03:29 PM, Tony Lindgren wrote:
>>> We can have a static map for the SCM, so ioremapping each driver
>>> individually should not be an issue.
>> Actually SCM registers window is mapped statically. Mapping is defined in omap44xx_io_desc[] in arch/arm/mach-omap2/io.c:
>>
>> ...
>> .virtual = L4_44XX_VIRT,
>> .pfn = __phys_to_pfn(L4_44XX_PHYS),
>> .length = L4_44XX_SIZE,
>> .type = MT_DEVICE,
>> ...
>>
>>
>> So ioremap() always returns same virtual address (0xfc002000).
> Hmm I guess you mean L4_44XX_VIRT + offset. Otherwise drivers
> would not work at all.. Or else I don't follow you.
Right. I mean when 0x4A00 2000(scm base) is remapped in scm driver, ioremap() always returns same virtual address (0xfc002000).
> Regards,
>
> Tony
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-06-01 14:26 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-01 14:26 UTC (permalink / raw)
To: linux-arm-kernel
On 06/01/2012 06:13 PM, Tony Lindgren wrote:
> * Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120601 06:44]:
>> On 06/01/2012 03:29 PM, Tony Lindgren wrote:
>>> We can have a static map for the SCM, so ioremapping each driver
>>> individually should not be an issue.
>> Actually SCM registers window is mapped statically. Mapping is defined in omap44xx_io_desc[] in arch/arm/mach-omap2/io.c:
>>
>> ...
>> .virtual = L4_44XX_VIRT,
>> .pfn = __phys_to_pfn(L4_44XX_PHYS),
>> .length = L4_44XX_SIZE,
>> .type = MT_DEVICE,
>> ...
>>
>>
>> So ioremap() always returns same virtual address (0xfc002000).
> Hmm I guess you mean L4_44XX_VIRT + offset. Otherwise drivers
> would not work at all.. Or else I don't follow you.
Right. I mean when 0x4A00 2000(scm base) is remapped in scm driver, ioremap() always returns same virtual address (0xfc002000).
> Regards,
>
> Tony
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 05/11] mfd: omap: control: core system control driver
2012-06-01 12:43 ` Cousson, Benoit
@ 2012-06-01 17:19 ` Eduardo Valentin
-1 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-06-01 17:19 UTC (permalink / raw)
To: Cousson, Benoit
Cc: amit.kucheria, kbaidarov, kishon, balbi, J Keerthy, linux-pm,
linux-omap, linux-arm-kernel
Hello,
On Fri, Jun 01, 2012 at 02:43:54PM +0200, Cousson Benoit wrote:
> On 6/1/2012 2:30 PM, Shilimkar, Santosh wrote:
> >On Fri, Jun 1, 2012 at 7:29 PM, Tony Lindgren<tony@atomide.com> wrote:
> >>* Cousson, Benoit<b-cousson@ti.com> [120529 06:29]:
> >>>On 5/28/2012 1:35 PM, Eduardo Valentin wrote:
> >>>>>
> >>>>>Mmm, we can have up to 4 control module instances in OMAP4.
> >>>>>
> >>>>>Well, I'm not sure it worth considering them as separate devices. Is
> >>>>>that your plan as well?
> >>>>
> >>>>At least for now I was focusing on the ctrl_module_core ...
> >>>
> >>>OK, that's a good start already :-)
> >>>
> >>>>>But since they all have different base address, it will be trick to
> >>>>>handle them with only a single entry.
> >>>>
> >>>>Indeed. We can always add the support latter on.
> >>>>
> >>>>I am not sure what would be the best way to handle those instances though,
> >>>>and how they are going to expose APIs. Would need to have an instance bound
> >>>>to API set?
> >>>
> >>>We should not go to that path I guess. We should have an API at
> >>>children level independent of the underlying control module
> >>>partitioning.
> >>
> >>These should be separate driver instances for the control modules.
> >>
> >>And then the ioremapped area should ignore at least the padconf
> >>registers so drivers/pinctrl/pinctrl-simple can handle those. There
> >>should not be any dependencies to the SCM driver from pinctrl-simple,
> >>the core SCM driver can manage the clocks and trigger the save of
> >>padconf regs.
> >>
> >>Also we should allow MMC driver handle the MMC specific registers
> >>and USB driver(s) handle the USB specific registers if possible. Those
> >>should not live under drivers/mfd unless there are some dependencies
> >>other than trying to ioremap the whole SCM module instead of ioremapping
> >>in each driver.
> >>
> >>We can have a static map for the SCM, so ioremapping each driver
> >>individually should not be an issue.
Within this series I kept the original MFD setup in the original driver
found in the TI Android tree. But in fact, I agree with Tony here.
In general, ideally it would be good if we could setup this driver
family, having for each driver their respective resources;
a separated individual io area, IRQs, locking, APIs, etc.
But, the issue is to avoid having hard coded io areas in the code,
and move them to auto generated data, DT/hwmod.
> >>
> >This sounds a good idea. With this we may not even need a core control
> >module drivers if all the individual drivers take care of the registers they
> >care. Mapping shouldn't be a problem as you mentioned.
>
> We should keep the MFD for PM / OCP single port correctness. Other
> than that it will be mostly useless, indeed.
Then, I guess the idea of having 1 static mapping for the MFD core, either in DT or hwmod,
is to maintain the single OCP port we have today for SCM.
But, Benoit, IIRC, from our previous discussions, we won't have the io area for children
autogenerated anyway, as they don't have any OCP. I suppose this applies also for
clock data?
If children data won't be autogenerated, assuming we are relying on the autogenerated
data, it means that SCM core area is the boundary that will be ioremapped and protected.
But then we still have a flaw because children can still stomp between each other.
Not to mention non-children users and the pin ctrl simple.
That said, if we want to have these io areas properly assigned to their drivers,
we either have children area autogenerated, in DT / hwmod. Or we have them in the code.
Assuming you still want to have the MFD core, for matching w/ the OCP single port,
it would still need to have the resources for its children in the driver code.
Or we hack them in the DT entries. Like I already did in this series for the thermal IRQ :-)
>
> Regards,
> Benoit
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 05/11] mfd: omap: control: core system control driver
@ 2012-06-01 17:19 ` Eduardo Valentin
0 siblings, 0 replies; 198+ messages in thread
From: Eduardo Valentin @ 2012-06-01 17:19 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
On Fri, Jun 01, 2012 at 02:43:54PM +0200, Cousson Benoit wrote:
> On 6/1/2012 2:30 PM, Shilimkar, Santosh wrote:
> >On Fri, Jun 1, 2012 at 7:29 PM, Tony Lindgren<tony@atomide.com> wrote:
> >>* Cousson, Benoit<b-cousson@ti.com> [120529 06:29]:
> >>>On 5/28/2012 1:35 PM, Eduardo Valentin wrote:
> >>>>>
> >>>>>Mmm, we can have up to 4 control module instances in OMAP4.
> >>>>>
> >>>>>Well, I'm not sure it worth considering them as separate devices. Is
> >>>>>that your plan as well?
> >>>>
> >>>>At least for now I was focusing on the ctrl_module_core ...
> >>>
> >>>OK, that's a good start already :-)
> >>>
> >>>>>But since they all have different base address, it will be trick to
> >>>>>handle them with only a single entry.
> >>>>
> >>>>Indeed. We can always add the support latter on.
> >>>>
> >>>>I am not sure what would be the best way to handle those instances though,
> >>>>and how they are going to expose APIs. Would need to have an instance bound
> >>>>to API set?
> >>>
> >>>We should not go to that path I guess. We should have an API at
> >>>children level independent of the underlying control module
> >>>partitioning.
> >>
> >>These should be separate driver instances for the control modules.
> >>
> >>And then the ioremapped area should ignore at least the padconf
> >>registers so drivers/pinctrl/pinctrl-simple can handle those. There
> >>should not be any dependencies to the SCM driver from pinctrl-simple,
> >>the core SCM driver can manage the clocks and trigger the save of
> >>padconf regs.
> >>
> >>Also we should allow MMC driver handle the MMC specific registers
> >>and USB driver(s) handle the USB specific registers if possible. Those
> >>should not live under drivers/mfd unless there are some dependencies
> >>other than trying to ioremap the whole SCM module instead of ioremapping
> >>in each driver.
> >>
> >>We can have a static map for the SCM, so ioremapping each driver
> >>individually should not be an issue.
Within this series I kept the original MFD setup in the original driver
found in the TI Android tree. But in fact, I agree with Tony here.
In general, ideally it would be good if we could setup this driver
family, having for each driver their respective resources;
a separated individual io area, IRQs, locking, APIs, etc.
But, the issue is to avoid having hard coded io areas in the code,
and move them to auto generated data, DT/hwmod.
> >>
> >This sounds a good idea. With this we may not even need a core control
> >module drivers if all the individual drivers take care of the registers they
> >care. Mapping shouldn't be a problem as you mentioned.
>
> We should keep the MFD for PM / OCP single port correctness. Other
> than that it will be mostly useless, indeed.
Then, I guess the idea of having 1 static mapping for the MFD core, either in DT or hwmod,
is to maintain the single OCP port we have today for SCM.
But, Benoit, IIRC, from our previous discussions, we won't have the io area for children
autogenerated anyway, as they don't have any OCP. I suppose this applies also for
clock data?
If children data won't be autogenerated, assuming we are relying on the autogenerated
data, it means that SCM core area is the boundary that will be ioremapped and protected.
But then we still have a flaw because children can still stomp between each other.
Not to mention non-children users and the pin ctrl simple.
That said, if we want to have these io areas properly assigned to their drivers,
we either have children area autogenerated, in DT / hwmod. Or we have them in the code.
Assuming you still want to have the MFD core, for matching w/ the OCP single port,
it would still need to have the resources for its children in the driver code.
Or we hack them in the DT entries. Like I already did in this series for the thermal IRQ :-)
>
> Regards,
> Benoit
>
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 03/11] arm: omap: device: create a device for system control module
2012-05-29 9:44 ` Eduardo Valentin
@ 2012-06-14 13:50 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-14 13:50 UTC (permalink / raw)
To: eduardo.valentin
Cc: Cousson, Benoit, kishon, santosh.shilimkar, tony, paul, balbi,
amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap
Hi.
On 05/29/2012 01:44 PM, Eduardo Valentin wrote:
> On Fri, May 25, 2012 at 02:30:44PM +0200, Cousson Benoit wrote:
>> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
>>> From: Kishon Vijay Abraham I<kishon@ti.com>
>>>
>>> Extracts the device data from hwmod database and create a platform device
>>> using omap device build.
>>>
>>> The device build is done during postcore_initcall.
>> Do you still need that since you are supporting only DT?
>> The device will be built automatically in the DT case.
> In fact this is not needed for DT only probing. Dropping this one.
Yes, platform device(struct platform_device) will be built automatically, but omap device(struct omap_device) will not be built.
Also when omap device is allocated(omap_device_alloc) hwmod_clocks are registered, but in case of ctrl_module_core device - no new clock are registered.
So, is it fine to drop omap device and skip omap_device_build() call?
BR,
Konstantin Baydarov.
>
>> Regards,
>> Benoit
>>
>>> Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
>>> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
>>> ---
>>> arch/arm/mach-omap2/devices.c | 26 ++++++++++++++++++++++++++
>>> 1 files changed, 26 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
>>> index 152c266..9332673 100644
>>> --- a/arch/arm/mach-omap2/devices.c
>>> +++ b/arch/arm/mach-omap2/devices.c
>>> @@ -40,6 +40,32 @@
>>> #define L3_MODULES_MAX_LEN 12
>>> #define L3_MODULES 3
>>>
>>> +static int omap_init_control(void)
>>> +{
>>> + struct omap_hwmod *oh;
>>> + struct platform_device *pdev;
>>> + const char *oh_name, *name;
>>> +
>>> + oh_name = "ctrl_module_core";
>>> + name = "omap-control-core";
>>> +
>>> + oh = omap_hwmod_lookup(oh_name);
>>> + if (!oh) {
>>> + pr_err("Could not lookup hwmod for %s\n", oh_name);
>>> + return PTR_ERR(oh);
>>> + }
>>> +
>>> + pdev = omap_device_build(name, -1, oh, NULL, 0, NULL, 0, true);
>>> + if (IS_ERR(pdev)) {
>>> + pr_err("Could not build omap_device for %s %s\n",
>>> + name, oh_name);
>>> + return PTR_ERR(pdev);
>>> + }
>>> +
>>> + return 0;
>>> +}
>>> +postcore_initcall(omap_init_control);
>>> +
>>> static int __init omap3_l3_init(void)
>>> {
>>> struct omap_hwmod *oh;
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 03/11] arm: omap: device: create a device for system control module
@ 2012-06-14 13:50 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-14 13:50 UTC (permalink / raw)
To: linux-arm-kernel
Hi.
On 05/29/2012 01:44 PM, Eduardo Valentin wrote:
> On Fri, May 25, 2012 at 02:30:44PM +0200, Cousson Benoit wrote:
>> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
>>> From: Kishon Vijay Abraham I<kishon@ti.com>
>>>
>>> Extracts the device data from hwmod database and create a platform device
>>> using omap device build.
>>>
>>> The device build is done during postcore_initcall.
>> Do you still need that since you are supporting only DT?
>> The device will be built automatically in the DT case.
> In fact this is not needed for DT only probing. Dropping this one.
Yes, platform device(struct platform_device) will be built automatically, but omap device(struct omap_device) will not be built.
Also when omap device is allocated(omap_device_alloc) hwmod_clocks are registered, but in case of ctrl_module_core device - no new clock are registered.
So, is it fine to drop omap device and skip omap_device_build() call?
BR,
Konstantin Baydarov.
>
>> Regards,
>> Benoit
>>
>>> Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
>>> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
>>> ---
>>> arch/arm/mach-omap2/devices.c | 26 ++++++++++++++++++++++++++
>>> 1 files changed, 26 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
>>> index 152c266..9332673 100644
>>> --- a/arch/arm/mach-omap2/devices.c
>>> +++ b/arch/arm/mach-omap2/devices.c
>>> @@ -40,6 +40,32 @@
>>> #define L3_MODULES_MAX_LEN 12
>>> #define L3_MODULES 3
>>>
>>> +static int omap_init_control(void)
>>> +{
>>> + struct omap_hwmod *oh;
>>> + struct platform_device *pdev;
>>> + const char *oh_name, *name;
>>> +
>>> + oh_name = "ctrl_module_core";
>>> + name = "omap-control-core";
>>> +
>>> + oh = omap_hwmod_lookup(oh_name);
>>> + if (!oh) {
>>> + pr_err("Could not lookup hwmod for %s\n", oh_name);
>>> + return PTR_ERR(oh);
>>> + }
>>> +
>>> + pdev = omap_device_build(name, -1, oh, NULL, 0, NULL, 0, true);
>>> + if (IS_ERR(pdev)) {
>>> + pr_err("Could not build omap_device for %s %s\n",
>>> + name, oh_name);
>>> + return PTR_ERR(pdev);
>>> + }
>>> +
>>> + return 0;
>>> +}
>>> +postcore_initcall(omap_init_control);
>>> +
>>> static int __init omap3_l3_init(void)
>>> {
>>> struct omap_hwmod *oh;
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH 03/11] arm: omap: device: create a device for system control module
2012-06-14 13:50 ` Konstantin Baydarov
@ 2012-06-15 9:22 ` Valentin, Eduardo
-1 siblings, 0 replies; 198+ messages in thread
From: Valentin, Eduardo @ 2012-06-15 9:22 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: balbi, kishon, amit.kucheria, linux-pm, linux-omap, linux-arm-kernel
Hello Konstantin,
Sorry for the delayed reply.
On Thu, Jun 14, 2012 at 4:50 PM, Konstantin Baydarov
<kbaidarov@dev.rtsoft.ru> wrote:
> Hi.
>
> On 05/29/2012 01:44 PM, Eduardo Valentin wrote:
>> On Fri, May 25, 2012 at 02:30:44PM +0200, Cousson Benoit wrote:
>>> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
>>>> From: Kishon Vijay Abraham I<kishon@ti.com>
>>>>
>>>> Extracts the device data from hwmod database and create a platform device
>>>> using omap device build.
>>>>
>>>> The device build is done during postcore_initcall.
>>> Do you still need that since you are supporting only DT?
>>> The device will be built automatically in the DT case.
>> In fact this is not needed for DT only probing. Dropping this one.
> Yes, platform device(struct platform_device) will be built automatically, but omap device(struct omap_device) will not be built.
The platform_device will be built as well as the omap_device. There
are hooks at the platform_device creation that will proceed with the
omap_device deployment. Please check:
arch/arm/plat-omap/omap_device.c: _omap_device_notifier_call and
omap_device_build_from_dt
> Also when omap device is allocated(omap_device_alloc) hwmod_clocks are registered, but in case of ctrl_module_core device - no new clock are registered.
> So, is it fine to drop omap device and skip omap_device_build() call?
As explained above, when booting with DT, you will get both, pdev and omap_dev.
>
> BR,
> Konstantin Baydarov.
All best,
Eduardo
>
>>
>>> Regards,
>>> Benoit
>>>
>>>> Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
>>>> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
>>>> ---
>>>> arch/arm/mach-omap2/devices.c | 26 ++++++++++++++++++++++++++
>>>> 1 files changed, 26 insertions(+), 0 deletions(-)
>>>>
>>>> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
>>>> index 152c266..9332673 100644
>>>> --- a/arch/arm/mach-omap2/devices.c
>>>> +++ b/arch/arm/mach-omap2/devices.c
>>>> @@ -40,6 +40,32 @@
>>>> #define L3_MODULES_MAX_LEN 12
>>>> #define L3_MODULES 3
>>>>
>>>> +static int omap_init_control(void)
>>>> +{
>>>> + struct omap_hwmod *oh;
>>>> + struct platform_device *pdev;
>>>> + const char *oh_name, *name;
>>>> +
>>>> + oh_name = "ctrl_module_core";
>>>> + name = "omap-control-core";
>>>> +
>>>> + oh = omap_hwmod_lookup(oh_name);
>>>> + if (!oh) {
>>>> + pr_err("Could not lookup hwmod for %s\n", oh_name);
>>>> + return PTR_ERR(oh);
>>>> + }
>>>> +
>>>> + pdev = omap_device_build(name, -1, oh, NULL, 0, NULL, 0, true);
>>>> + if (IS_ERR(pdev)) {
>>>> + pr_err("Could not build omap_device for %s %s\n",
>>>> + name, oh_name);
>>>> + return PTR_ERR(pdev);
>>>> + }
>>>> +
>>>> + return 0;
>>>> +}
>>>> +postcore_initcall(omap_init_control);
>>>> +
>>>> static int __init omap3_l3_init(void)
>>>> {
>>>> struct omap_hwmod *oh;
>
--
Eduardo Valentin
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH 03/11] arm: omap: device: create a device for system control module
@ 2012-06-15 9:22 ` Valentin, Eduardo
0 siblings, 0 replies; 198+ messages in thread
From: Valentin, Eduardo @ 2012-06-15 9:22 UTC (permalink / raw)
To: linux-arm-kernel
Hello Konstantin,
Sorry for the delayed reply.
On Thu, Jun 14, 2012 at 4:50 PM, Konstantin Baydarov
<kbaidarov@dev.rtsoft.ru> wrote:
> ?Hi.
>
> On 05/29/2012 01:44 PM, Eduardo Valentin wrote:
>> On Fri, May 25, 2012 at 02:30:44PM +0200, Cousson Benoit wrote:
>>> On 5/25/2012 10:25 AM, Eduardo Valentin wrote:
>>>> From: Kishon Vijay Abraham I<kishon@ti.com>
>>>>
>>>> Extracts the device data from hwmod database and create a platform device
>>>> using omap device build.
>>>>
>>>> The device build is done during postcore_initcall.
>>> Do you still need that since you are supporting only DT?
>>> The device will be built automatically in the DT case.
>> In fact this is not needed for DT only probing. Dropping this one.
> Yes, platform device(struct platform_device) will be built automatically, but omap device(struct omap_device) will not be built.
The platform_device will be built as well as the omap_device. There
are hooks at the platform_device creation that will proceed with the
omap_device deployment. Please check:
arch/arm/plat-omap/omap_device.c: _omap_device_notifier_call and
omap_device_build_from_dt
> Also when omap device is allocated(omap_device_alloc) hwmod_clocks are registered, but in case of ctrl_module_core device - no new clock are registered.
> So, is it fine to drop omap device and skip omap_device_build() call?
As explained above, when booting with DT, you will get both, pdev and omap_dev.
>
> ?BR,
> ? ?Konstantin Baydarov.
All best,
Eduardo
>
>>
>>> Regards,
>>> Benoit
>>>
>>>> Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
>>>> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
>>>> ---
>>>> ?arch/arm/mach-omap2/devices.c | ? 26 ++++++++++++++++++++++++++
>>>> ?1 files changed, 26 insertions(+), 0 deletions(-)
>>>>
>>>> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
>>>> index 152c266..9332673 100644
>>>> --- a/arch/arm/mach-omap2/devices.c
>>>> +++ b/arch/arm/mach-omap2/devices.c
>>>> @@ -40,6 +40,32 @@
>>>> ?#define L3_MODULES_MAX_LEN 12
>>>> ?#define L3_MODULES 3
>>>>
>>>> +static int omap_init_control(void)
>>>> +{
>>>> + ? struct omap_hwmod ? ? ? ? ? ? ? *oh;
>>>> + ? struct platform_device ? ? ? ? ?*pdev;
>>>> + ? const char ? ? ? ? ? ? ? ? ? ? ?*oh_name, *name;
>>>> +
>>>> + ? oh_name = "ctrl_module_core";
>>>> + ? name = "omap-control-core";
>>>> +
>>>> + ? oh = omap_hwmod_lookup(oh_name);
>>>> + ? if (!oh) {
>>>> + ? ? ? ? ? pr_err("Could not lookup hwmod for %s\n", oh_name);
>>>> + ? ? ? ? ? return PTR_ERR(oh);
>>>> + ? }
>>>> +
>>>> + ? pdev = omap_device_build(name, -1, oh, NULL, 0, NULL, 0, true);
>>>> + ? if (IS_ERR(pdev)) {
>>>> + ? ? ? ? ? pr_err("Could not build omap_device for %s %s\n",
>>>> + ? ? ? ? ? ? ? ? ?name, oh_name);
>>>> + ? ? ? ? ? return PTR_ERR(pdev);
>>>> + ? }
>>>> +
>>>> + ? return 0;
>>>> +}
>>>> +postcore_initcall(omap_init_control);
>>>> +
>>>> ?static int __init omap3_l3_init(void)
>>>> ?{
>>>> ? ? struct omap_hwmod *oh;
>
--
Eduardo Valentin
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 01/11] ARM: OMAP4: Remove un-used control module headers and defines.
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-06-18 11:32 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: amit.kucheria, Eduardo Valentin, balbi, linux-pm, linux-omap,
linux-arm-kernel, amit.kachhap
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
Most of the OMAP4 control module register defines are not used and
can be removed. Keep only needed defines and move them to common
control module header just like other OMAP versions.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/control.h | 45 +-
.../include/mach/ctrl_module_core_44xx.h | 391 ------
.../include/mach/ctrl_module_pad_core_44xx.h | 1409 --------------------
.../include/mach/ctrl_module_pad_wkup_44xx.h | 236 ----
.../include/mach/ctrl_module_wkup_44xx.h | 92 --
5 files changed, 40 insertions(+), 2133 deletions(-)
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index a406fd0..dad2903 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -16,11 +16,6 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H
#define __ARCH_ARM_MACH_OMAP2_CONTROL_H
-#include <mach/ctrl_module_core_44xx.h>
-#include <mach/ctrl_module_wkup_44xx.h>
-#include <mach/ctrl_module_pad_core_44xx.h>
-#include <mach/ctrl_module_pad_wkup_44xx.h>
-
#ifndef __ASSEMBLY__
#define OMAP242X_CTRL_REGADDR(reg) \
OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
@@ -183,6 +178,43 @@
#define OMAP3630_CONTROL_FUSE_OPP50_VDD2 (OMAP2_CONTROL_GENERAL + 0x0128)
#define OMAP3630_CONTROL_FUSE_OPP100_VDD2 (OMAP2_CONTROL_GENERAL + 0x012C)
+/* OMAP4 IDCODE CONTROL */
+#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1 0x0218
+#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4
+
+/* CONTROL_I2C_1 */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1 0x0624
+#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK (1 << 28)
+#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK (1 << 24)
+
+/* DSI CONTROL_DSIPHY */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY 0x0618
+#define OMAP4_DSI2_LANEENABLE_SHIFT 29
+#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29)
+#define OMAP4_DSI1_LANEENABLE_SHIFT 24
+#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24)
+#define OMAP4_DSI1_PIPD_SHIFT 19
+#define OMAP4_DSI1_PIPD_MASK (0x1f << 19)
+#define OMAP4_DSI2_PIPD_SHIFT 14
+#define OMAP4_DSI2_PIPD_MASK (0x1f << 14)
+
+/* CONTROL_PBIASLITE */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PBIASLITE 0x0600
+#define OMAP4_MMC1_PWRDNZ_MASK (1 << 26)
+#define OMAP4_MMC1_PBIASLITE_VMODE_MASK (1 << 21)
+#define OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK (1 << 22)
+#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK (1 << 23)
+
+/* CONTROL_MMC1 */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC1 0x0628
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_MASK (1 << 31)
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK (1 << 30)
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK (1 << 29)
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK (1 << 28)
+#define OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK (1 << 27)
+#define OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK (1 << 26)
+#define OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK (1 << 25)
+
/* OMAP44xx control efuse offsets */
#define OMAP44XX_CONTROL_FUSE_IVA_OPP50 0x22C
#define OMAP44XX_CONTROL_FUSE_IVA_OPP100 0x22F
@@ -195,6 +227,9 @@
#define OMAP44XX_CONTROL_FUSE_CORE_OPP50 0x254
#define OMAP44XX_CONTROL_FUSE_CORE_OPP100 0x257
+/* OMAP44xx control McBSP padconf */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
+
/* AM35XX only CONTROL_GENERAL register offsets */
#define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
#define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
deleted file mode 100644
index 2f7ac70..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
+++ /dev/null
@@ -1,391 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_CORE registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson@ti.com)
- * Santosh Shilimkar (santosh.shilimkar@ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_CORE_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_CORE_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_CORE 0x4a002000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_CORE_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_CORE_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_CORE_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_0 0x0200
-#define OMAP4_CTRL_MODULE_CORE_ID_CODE 0x0204
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_1 0x0208
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_2 0x020c
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_3 0x0210
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_0 0x0214
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1 0x0218
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_USB_CONF 0x021c
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_VDD_WKUP 0x0228
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_BGAP 0x0260
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_0 0x0264
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268
-#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4
-#define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300
-#define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314
-#define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318
-#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320
-#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_MPU_VOLTAGE_CTRL 0x0324
-#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_CORE_VOLTAGE_CTRL 0x0328
-#define OMAP4_CTRL_MODULE_CORE_TEMP_SENSOR 0x032c
-#define OMAP4_CTRL_MODULE_CORE_DPLL_NWELL_TRIM_0 0x0330
-#define OMAP4_CTRL_MODULE_CORE_DPLL_NWELL_TRIM_1 0x0334
-#define OMAP4_CTRL_MODULE_CORE_USBOTGHS_CONTROL 0x033c
-#define OMAP4_CTRL_MODULE_CORE_DSS_CONTROL 0x0340
-#define OMAP4_CTRL_MODULE_CORE_HWOBS_CONTROL 0x0350
-#define OMAP4_CTRL_MODULE_CORE_DEBOBS_FINAL_MUX_SEL 0x0400
-#define OMAP4_CTRL_MODULE_CORE_DEBOBS_MMR_MPU 0x0408
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL0 0x042c
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL1 0x0430
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL2 0x0434
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL3 0x0438
-#define OMAP4_CTRL_MODULE_CORE_CONF_CLK_SEL0 0x0440
-#define OMAP4_CTRL_MODULE_CORE_CONF_CLK_SEL1 0x0444
-#define OMAP4_CTRL_MODULE_CORE_CONF_CLK_SEL2 0x0448
-#define OMAP4_CTRL_MODULE_CORE_CONF_DPLL_FREQLOCK_SEL 0x044c
-#define OMAP4_CTRL_MODULE_CORE_CONF_DPLL_TINITZ_SEL 0x0450
-#define OMAP4_CTRL_MODULE_CORE_CONF_DPLL_PHASELOCK_SEL 0x0454
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_0 0x0480
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_1 0x0484
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_2 0x0488
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_3 0x048c
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_4 0x0490
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_5 0x0494
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_6 0x0498
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_7 0x049c
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_8 0x04a0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_9 0x04a4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_10 0x04a8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_11 0x04ac
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_12 0x04b0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_13 0x04b4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_14 0x04b8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_15 0x04bc
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_16 0x04c0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_17 0x04c4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_18 0x04c8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_19 0x04cc
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_20 0x04d0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_21 0x04d4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_22 0x04d8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_23 0x04dc
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_24 0x04e0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_25 0x04e4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_26 0x04e8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_27 0x04ec
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_28 0x04f0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_29 0x04f4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_30 0x04f8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_31 0x04fc
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* STD_FUSE_DIE_ID_0 */
-#define OMAP4_STD_FUSE_DIE_ID_0_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_0_MASK (0xffffffff << 0)
-
-/* ID_CODE */
-#define OMAP4_STD_FUSE_IDCODE_SHIFT 0
-#define OMAP4_STD_FUSE_IDCODE_MASK (0xffffffff << 0)
-
-/* STD_FUSE_DIE_ID_1 */
-#define OMAP4_STD_FUSE_DIE_ID_1_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_1_MASK (0xffffffff << 0)
-
-/* STD_FUSE_DIE_ID_2 */
-#define OMAP4_STD_FUSE_DIE_ID_2_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_2_MASK (0xffffffff << 0)
-
-/* STD_FUSE_DIE_ID_3 */
-#define OMAP4_STD_FUSE_DIE_ID_3_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_3_MASK (0xffffffff << 0)
-
-/* STD_FUSE_PROD_ID_0 */
-#define OMAP4_STD_FUSE_PROD_ID_0_SHIFT 0
-#define OMAP4_STD_FUSE_PROD_ID_0_MASK (0xffffffff << 0)
-
-/* STD_FUSE_PROD_ID_1 */
-#define OMAP4_STD_FUSE_PROD_ID_1_SHIFT 0
-#define OMAP4_STD_FUSE_PROD_ID_1_MASK (0xffffffff << 0)
-
-/* STD_FUSE_USB_CONF */
-#define OMAP4_USB_PROD_ID_SHIFT 16
-#define OMAP4_USB_PROD_ID_MASK (0xffff << 16)
-#define OMAP4_USB_VENDOR_ID_SHIFT 0
-#define OMAP4_USB_VENDOR_ID_MASK (0xffff << 0)
-
-/* STD_FUSE_OPP_VDD_WKUP */
-#define OMAP4_STD_FUSE_OPP_VDD_WKUP_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_VDD_WKUP_MASK (0xffffffff << 0)
-
-/* STD_FUSE_OPP_BGAP */
-#define OMAP4_STD_FUSE_OPP_BGAP_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_BGAP_MASK (0xffffffff << 0)
-
-/* STD_FUSE_OPP_DPLL_0 */
-#define OMAP4_STD_FUSE_OPP_DPLL_0_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_DPLL_0_MASK (0xffffffff << 0)
-
-/* STD_FUSE_OPP_DPLL_1 */
-#define OMAP4_STD_FUSE_OPP_DPLL_1_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_DPLL_1_MASK (0xffffffff << 0)
-
-/* STATUS */
-#define OMAP4_ATTILA_CONF_SHIFT 11
-#define OMAP4_ATTILA_CONF_MASK (0x3 << 11)
-#define OMAP4_DEVICE_TYPE_SHIFT 8
-#define OMAP4_DEVICE_TYPE_MASK (0x7 << 8)
-#define OMAP4_SYS_BOOT_SHIFT 0
-#define OMAP4_SYS_BOOT_MASK (0xff << 0)
-
-/* DEV_CONF */
-#define OMAP4_DEV_CONF_SHIFT 1
-#define OMAP4_DEV_CONF_MASK (0x7fffffff << 1)
-#define OMAP4_USBPHY_PD_SHIFT 0
-#define OMAP4_USBPHY_PD_MASK (1 << 0)
-
-/* LDOVBB_IVA_VOLTAGE_CTRL */
-#define OMAP4_LDOVBBIVA_RBB_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOVBBIVA_RBB_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOVBBIVA_RBB_VSET_IN_SHIFT 21
-#define OMAP4_LDOVBBIVA_RBB_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOVBBIVA_RBB_VSET_OUT_SHIFT 16
-#define OMAP4_LDOVBBIVA_RBB_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOVBBIVA_FBB_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOVBBIVA_FBB_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOVBBIVA_FBB_VSET_IN_SHIFT 5
-#define OMAP4_LDOVBBIVA_FBB_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOVBBIVA_FBB_VSET_OUT_SHIFT 0
-#define OMAP4_LDOVBBIVA_FBB_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOVBB_MPU_VOLTAGE_CTRL */
-#define OMAP4_LDOVBBMPU_RBB_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOVBBMPU_RBB_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOVBBMPU_RBB_VSET_IN_SHIFT 21
-#define OMAP4_LDOVBBMPU_RBB_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOVBBMPU_RBB_VSET_OUT_SHIFT 16
-#define OMAP4_LDOVBBMPU_RBB_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOVBBMPU_FBB_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOVBBMPU_FBB_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOVBBMPU_FBB_VSET_IN_SHIFT 5
-#define OMAP4_LDOVBBMPU_FBB_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOVBBMPU_FBB_VSET_OUT_SHIFT 0
-#define OMAP4_LDOVBBMPU_FBB_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOSRAM_IVA_VOLTAGE_CTRL */
-#define OMAP4_LDOSRAMIVA_RETMODE_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOSRAMIVA_RETMODE_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_IN_SHIFT 21
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_OUT_SHIFT 16
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOSRAMIVA_ACTMODE_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOSRAMIVA_ACTMODE_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_IN_SHIFT 5
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_OUT_SHIFT 0
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOSRAM_MPU_VOLTAGE_CTRL */
-#define OMAP4_LDOSRAMMPU_RETMODE_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOSRAMMPU_RETMODE_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_IN_SHIFT 21
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_OUT_SHIFT 16
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOSRAMMPU_ACTMODE_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOSRAMMPU_ACTMODE_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_IN_SHIFT 5
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_OUT_SHIFT 0
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOSRAM_CORE_VOLTAGE_CTRL */
-#define OMAP4_LDOSRAMCORE_RETMODE_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOSRAMCORE_RETMODE_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_IN_SHIFT 21
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_OUT_SHIFT 16
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOSRAMCORE_ACTMODE_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOSRAMCORE_ACTMODE_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_IN_SHIFT 5
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_OUT_SHIFT 0
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_OUT_MASK (0x1f << 0)
-
-/* TEMP_SENSOR */
-#define OMAP4_BGAP_TEMPSOFF_SHIFT 12
-#define OMAP4_BGAP_TEMPSOFF_MASK (1 << 12)
-#define OMAP4_BGAP_TSHUT_SHIFT 11
-#define OMAP4_BGAP_TSHUT_MASK (1 << 11)
-#define OMAP4_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10
-#define OMAP4_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10)
-#define OMAP4_BGAP_TEMP_SENSOR_SOC_SHIFT 9
-#define OMAP4_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9)
-#define OMAP4_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8
-#define OMAP4_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8)
-#define OMAP4_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
-#define OMAP4_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0)
-
-/* DPLL_NWELL_TRIM_0 */
-#define OMAP4_DPLL_ABE_NWELL_TRIM_MUX_CTRL_SHIFT 29
-#define OMAP4_DPLL_ABE_NWELL_TRIM_MUX_CTRL_MASK (1 << 29)
-#define OMAP4_DPLL_ABE_NWELL_TRIM_SHIFT 24
-#define OMAP4_DPLL_ABE_NWELL_TRIM_MASK (0x1f << 24)
-#define OMAP4_DPLL_PER_NWELL_TRIM_MUX_CTRL_SHIFT 23
-#define OMAP4_DPLL_PER_NWELL_TRIM_MUX_CTRL_MASK (1 << 23)
-#define OMAP4_DPLL_PER_NWELL_TRIM_SHIFT 18
-#define OMAP4_DPLL_PER_NWELL_TRIM_MASK (0x1f << 18)
-#define OMAP4_DPLL_CORE_NWELL_TRIM_MUX_CTRL_SHIFT 17
-#define OMAP4_DPLL_CORE_NWELL_TRIM_MUX_CTRL_MASK (1 << 17)
-#define OMAP4_DPLL_CORE_NWELL_TRIM_SHIFT 12
-#define OMAP4_DPLL_CORE_NWELL_TRIM_MASK (0x1f << 12)
-#define OMAP4_DPLL_IVA_NWELL_TRIM_MUX_CTRL_SHIFT 11
-#define OMAP4_DPLL_IVA_NWELL_TRIM_MUX_CTRL_MASK (1 << 11)
-#define OMAP4_DPLL_IVA_NWELL_TRIM_SHIFT 6
-#define OMAP4_DPLL_IVA_NWELL_TRIM_MASK (0x1f << 6)
-#define OMAP4_DPLL_MPU_NWELL_TRIM_MUX_CTRL_SHIFT 5
-#define OMAP4_DPLL_MPU_NWELL_TRIM_MUX_CTRL_MASK (1 << 5)
-#define OMAP4_DPLL_MPU_NWELL_TRIM_SHIFT 0
-#define OMAP4_DPLL_MPU_NWELL_TRIM_MASK (0x1f << 0)
-
-/* DPLL_NWELL_TRIM_1 */
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_MUX_CTRL_SHIFT 29
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_MUX_CTRL_MASK (1 << 29)
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_SHIFT 24
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_MASK (0x1f << 24)
-#define OMAP4_DPLL_USB_NWELL_TRIM_MUX_CTRL_SHIFT 23
-#define OMAP4_DPLL_USB_NWELL_TRIM_MUX_CTRL_MASK (1 << 23)
-#define OMAP4_DPLL_USB_NWELL_TRIM_SHIFT 18
-#define OMAP4_DPLL_USB_NWELL_TRIM_MASK (0x1f << 18)
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_MUX_CTRL_SHIFT 17
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_MUX_CTRL_MASK (1 << 17)
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_SHIFT 12
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_MASK (0x1f << 12)
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_MUX_CTRL_SHIFT 11
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_MUX_CTRL_MASK (1 << 11)
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_SHIFT 6
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_MASK (0x1f << 6)
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_MUX_CTRL_SHIFT 5
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_MUX_CTRL_MASK (1 << 5)
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_SHIFT 0
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_MASK (0x1f << 0)
-
-/* USBOTGHS_CONTROL */
-#define OMAP4_DISCHRGVBUS_SHIFT 8
-#define OMAP4_DISCHRGVBUS_MASK (1 << 8)
-#define OMAP4_CHRGVBUS_SHIFT 7
-#define OMAP4_CHRGVBUS_MASK (1 << 7)
-#define OMAP4_DRVVBUS_SHIFT 6
-#define OMAP4_DRVVBUS_MASK (1 << 6)
-#define OMAP4_IDPULLUP_SHIFT 5
-#define OMAP4_IDPULLUP_MASK (1 << 5)
-#define OMAP4_IDDIG_SHIFT 4
-#define OMAP4_IDDIG_MASK (1 << 4)
-#define OMAP4_SESSEND_SHIFT 3
-#define OMAP4_SESSEND_MASK (1 << 3)
-#define OMAP4_VBUSVALID_SHIFT 2
-#define OMAP4_VBUSVALID_MASK (1 << 2)
-#define OMAP4_BVALID_SHIFT 1
-#define OMAP4_BVALID_MASK (1 << 1)
-#define OMAP4_AVALID_SHIFT 0
-#define OMAP4_AVALID_MASK (1 << 0)
-
-/* DSS_CONTROL */
-#define OMAP4_DSS_MUX6_SELECT_SHIFT 0
-#define OMAP4_DSS_MUX6_SELECT_MASK (1 << 0)
-
-/* HWOBS_CONTROL */
-#define OMAP4_HWOBS_CLKDIV_SEL_SHIFT 3
-#define OMAP4_HWOBS_CLKDIV_SEL_MASK (0x1f << 3)
-#define OMAP4_HWOBS_ALL_ZERO_MODE_SHIFT 2
-#define OMAP4_HWOBS_ALL_ZERO_MODE_MASK (1 << 2)
-#define OMAP4_HWOBS_ALL_ONE_MODE_SHIFT 1
-#define OMAP4_HWOBS_ALL_ONE_MODE_MASK (1 << 1)
-#define OMAP4_HWOBS_MACRO_ENABLE_SHIFT 0
-#define OMAP4_HWOBS_MACRO_ENABLE_MASK (1 << 0)
-
-/* DEBOBS_FINAL_MUX_SEL */
-#define OMAP4_SELECT_SHIFT 0
-#define OMAP4_SELECT_MASK (0xffffffff << 0)
-
-/* DEBOBS_MMR_MPU */
-#define OMAP4_SELECT_DEBOBS_MMR_MPU_SHIFT 0
-#define OMAP4_SELECT_DEBOBS_MMR_MPU_MASK (0xf << 0)
-
-/* CONF_SDMA_REQ_SEL0 */
-#define OMAP4_MULT_SHIFT 0
-#define OMAP4_MULT_MASK (0x7f << 0)
-
-/* CONF_CLK_SEL0 */
-#define OMAP4_MULT_CONF_CLK_SEL0_SHIFT 0
-#define OMAP4_MULT_CONF_CLK_SEL0_MASK (0x7 << 0)
-
-/* CONF_CLK_SEL1 */
-#define OMAP4_MULT_CONF_CLK_SEL1_SHIFT 0
-#define OMAP4_MULT_CONF_CLK_SEL1_MASK (0x7 << 0)
-
-/* CONF_CLK_SEL2 */
-#define OMAP4_MULT_CONF_CLK_SEL2_SHIFT 0
-#define OMAP4_MULT_CONF_CLK_SEL2_MASK (0x7 << 0)
-
-/* CONF_DPLL_FREQLOCK_SEL */
-#define OMAP4_MULT_CONF_DPLL_FREQLOCK_SEL_SHIFT 0
-#define OMAP4_MULT_CONF_DPLL_FREQLOCK_SEL_MASK (0x7 << 0)
-
-/* CONF_DPLL_TINITZ_SEL */
-#define OMAP4_MULT_CONF_DPLL_TINITZ_SEL_SHIFT 0
-#define OMAP4_MULT_CONF_DPLL_TINITZ_SEL_MASK (0x7 << 0)
-
-/* CONF_DPLL_PHASELOCK_SEL */
-#define OMAP4_MULT_CONF_DPLL_PHASELOCK_SEL_SHIFT 0
-#define OMAP4_MULT_CONF_DPLL_PHASELOCK_SEL_MASK (0x7 << 0)
-
-/* CONF_DEBUG_SEL_TST_0 */
-#define OMAP4_MODE_SHIFT 0
-#define OMAP4_MODE_MASK (0xf << 0)
-
-#endif
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
deleted file mode 100644
index c88420d..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
+++ /dev/null
@@ -1,1409 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_PAD_CORE registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson@ti.com)
- * Santosh Shilimkar (santosh.shilimkar@ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_CORE_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_CORE_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_PAD_CORE 0x4a100000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_PAD_CORE_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_PAD_CORE_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_PAD_CORE_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_0 0x01d8
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_1 0x01dc
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_2 0x01e0
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_3 0x01e4
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_4 0x01e8
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_5 0x01ec
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_6 0x01f0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PADCONF_GLOBAL 0x05a0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PADCONF_MODE 0x05a4
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART1IO_PADCONF_0 0x05a8
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART1IO_PADCONF_1 0x05ac
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_0 0x05b0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_1 0x05b4
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_0 0x05b8
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_1 0x05bc
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_2 0x05c0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USBB_HSIC 0x05c4
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SLIMBUS 0x05c8
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PBIASLITE 0x0600
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_0 0x0604
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_CAMERA_RX 0x0608
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_AVDAC 0x060c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HDMI_TX_PHY 0x0610
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC2 0x0614
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY 0x0618
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USB2PHYCORE 0x0620
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1 0x0624
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC1 0x0628
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HSI 0x062c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USB 0x0630
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HDQ 0x0634
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_0 0x0638
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_1 0x063c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_2 0x0640
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_3 0x0644
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_0 0x0648
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_1 0x064c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_2 0x0650
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_3 0x0654
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_BUS_HOLD 0x0658
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_C2C 0x065c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_RW 0x0660
-#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_R 0x0664
-#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_R_C0 0x0668
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_1 0x0700
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_2 0x0704
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_3 0x0708
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_4 0x070c
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* PADCONF_WAKEUPEVENT_0 */
-#define OMAP4_GPMC_CLK_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_GPMC_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_GPMC_NWP_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_GPMC_NWP_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_GPMC_NCS3_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_GPMC_NCS3_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_GPMC_NCS2_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_GPMC_NCS2_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_GPMC_NCS1_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_GPMC_NCS1_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_GPMC_NCS0_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_GPMC_NCS0_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_GPMC_A25_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_GPMC_A25_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_GPMC_A24_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_GPMC_A24_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_GPMC_A23_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_GPMC_A23_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_GPMC_A22_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_GPMC_A22_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_GPMC_A21_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_GPMC_A21_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_GPMC_A20_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_GPMC_A20_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_GPMC_A19_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_GPMC_A19_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_GPMC_A18_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_GPMC_A18_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_GPMC_A17_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_GPMC_A17_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_GPMC_A16_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_GPMC_A16_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_GPMC_AD15_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_GPMC_AD15_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_GPMC_AD14_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_GPMC_AD14_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_GPMC_AD13_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_GPMC_AD13_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_GPMC_AD12_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_GPMC_AD12_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_GPMC_AD11_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_GPMC_AD11_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_GPMC_AD10_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_GPMC_AD10_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_GPMC_AD9_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_GPMC_AD9_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_GPMC_AD8_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_GPMC_AD8_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_GPMC_AD7_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_GPMC_AD7_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_GPMC_AD6_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_GPMC_AD6_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_GPMC_AD5_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_GPMC_AD5_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_GPMC_AD4_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_GPMC_AD4_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_GPMC_AD3_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_GPMC_AD3_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_GPMC_AD2_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_GPMC_AD2_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_GPMC_AD1_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_GPMC_AD1_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_GPMC_AD0_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_GPMC_AD0_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_1 */
-#define OMAP4_CAM_STROBE_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_CAM_STROBE_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_CAM_SHUTTER_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_CAM_SHUTTER_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_CSI22_DY1_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_CSI22_DY1_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_CSI22_DX1_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_CSI22_DX1_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_CSI22_DY0_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_CSI22_DY0_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_CSI22_DX0_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_CSI22_DX0_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_CSI21_DY4_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_CSI21_DY4_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_CSI21_DX4_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_CSI21_DX4_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_CSI21_DY3_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_CSI21_DY3_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_CSI21_DX3_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_CSI21_DX3_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_CSI21_DY2_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_CSI21_DY2_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_CSI21_DX2_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_CSI21_DX2_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_CSI21_DY1_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_CSI21_DY1_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_CSI21_DX1_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_CSI21_DX1_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_CSI21_DY0_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_CSI21_DY0_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_CSI21_DX0_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_CSI21_DX0_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_HDMI_DDC_SDA_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_HDMI_DDC_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_HDMI_DDC_SCL_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_HDMI_DDC_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_HDMI_CEC_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_HDMI_CEC_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_HDMI_HPD_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_HDMI_HPD_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_C2C_DATA15_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_C2C_DATA15_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_C2C_DATA14_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_C2C_DATA14_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_C2C_DATA13_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_C2C_DATA13_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_C2C_DATA12_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_C2C_DATA12_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_C2C_DATA11_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_C2C_DATA11_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_GPMC_WAIT1_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_GPMC_WAIT1_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_GPMC_WAIT0_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_GPMC_WAIT0_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_GPMC_NBE1_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_GPMC_NBE1_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_GPMC_NBE0_CLE_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_GPMC_NBE0_CLE_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_GPMC_NWE_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_GPMC_NWE_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_GPMC_NOE_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_GPMC_NOE_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_GPMC_NADV_ALE_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_GPMC_NADV_ALE_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_2 */
-#define OMAP4_ABE_MCBSP1_CLKX_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_ABE_MCBSP1_CLKX_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_ABE_MCBSP2_FSX_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_ABE_MCBSP2_FSX_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_ABE_MCBSP2_DX_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_ABE_MCBSP2_DX_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_ABE_MCBSP2_DR_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_ABE_MCBSP2_DR_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_ABE_MCBSP2_CLKX_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_ABE_MCBSP2_CLKX_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_SDMMC1_DAT7_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_SDMMC1_DAT7_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_SDMMC1_DAT6_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_SDMMC1_DAT6_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_SDMMC1_DAT5_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_SDMMC1_DAT5_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_SDMMC1_DAT4_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_SDMMC1_DAT4_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_SDMMC1_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_SDMMC1_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_SDMMC1_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_SDMMC1_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_SDMMC1_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_SDMMC1_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_SDMMC1_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_SDMMC1_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_SDMMC1_CMD_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_SDMMC1_CMD_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_SDMMC1_CLK_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_SDMMC1_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_USBC1_ICUSB_DM_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_USBC1_ICUSB_DM_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_USBC1_ICUSB_DP_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_USBC1_ICUSB_DP_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_USBB1_HSIC_STROBE_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_USBB1_HSIC_STROBE_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_USBB1_HSIC_DATA_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_USBB1_HSIC_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_USBB1_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_USBB1_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_USBB1_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_USBB1_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_USBB1_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_USBB1_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_USBB1_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_USBB1_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_USBB1_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_USBB1_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_USBB1_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_USBB1_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_USBB1_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_USBB1_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_USBB1_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_USBB1_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_USBB1_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_USBB1_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_USBB1_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_USBB1_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_USBB1_ULPITLL_STP_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_USBB1_ULPITLL_STP_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_USBB1_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_USBB1_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_CAM_GLOBALRESET_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_CAM_GLOBALRESET_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_3 */
-#define OMAP4_MCSPI1_CS3_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_MCSPI1_CS3_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_MCSPI1_CS2_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_MCSPI1_CS2_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_MCSPI1_CS1_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_MCSPI1_CS1_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_MCSPI1_CS0_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_MCSPI1_CS0_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_MCSPI1_SIMO_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_MCSPI1_SIMO_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_MCSPI1_SOMI_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_MCSPI1_SOMI_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_MCSPI1_CLK_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_MCSPI1_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_I2C4_SDA_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_I2C4_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_I2C4_SCL_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_I2C4_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_I2C3_SDA_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_I2C3_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_I2C3_SCL_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_I2C3_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_I2C2_SDA_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_I2C2_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_I2C2_SCL_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_I2C2_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_I2C1_SDA_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_I2C1_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_I2C1_SCL_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_I2C1_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_HDQ_SIO_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_HDQ_SIO_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_UART2_TX_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_UART2_TX_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_UART2_RX_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_UART2_RX_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_UART2_RTS_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_UART2_RTS_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_UART2_CTS_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_UART2_CTS_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_ABE_DMIC_DIN3_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_ABE_DMIC_DIN3_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_ABE_DMIC_DIN2_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_ABE_DMIC_DIN2_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_ABE_DMIC_DIN1_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_ABE_DMIC_DIN1_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_ABE_DMIC_CLK1_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_ABE_DMIC_CLK1_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_ABE_CLKS_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_ABE_CLKS_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_ABE_PDM_LB_CLK_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_ABE_PDM_LB_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_ABE_PDM_FRAME_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_ABE_PDM_FRAME_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_ABE_PDM_DL_DATA_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_ABE_PDM_DL_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_ABE_PDM_UL_DATA_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_ABE_PDM_UL_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_ABE_MCBSP1_FSX_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_ABE_MCBSP1_FSX_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_ABE_MCBSP1_DX_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_ABE_MCBSP1_DX_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_ABE_MCBSP1_DR_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_ABE_MCBSP1_DR_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_4 */
-#define OMAP4_UNIPRO_TY0_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_UNIPRO_TY0_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_UNIPRO_TX0_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_UNIPRO_TX0_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_USBB2_HSIC_STROBE_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_USBB2_HSIC_STROBE_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_USBB2_HSIC_DATA_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_USBB2_HSIC_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_USBB2_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_USBB2_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_USBB2_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_USBB2_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_USBB2_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_USBB2_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_USBB2_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_USBB2_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_USBB2_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_USBB2_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_USBB2_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_USBB2_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_USBB2_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_USBB2_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_USBB2_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_USBB2_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_USBB2_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_USBB2_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_USBB2_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_USBB2_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_USBB2_ULPITLL_STP_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_USBB2_ULPITLL_STP_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_USBB2_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_USBB2_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_UART4_TX_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_UART4_TX_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_UART4_RX_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_UART4_RX_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_MCSPI4_CS0_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_MCSPI4_CS0_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_MCSPI4_SOMI_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_MCSPI4_SOMI_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_MCSPI4_SIMO_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_MCSPI4_SIMO_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_MCSPI4_CLK_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_MCSPI4_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_SDMMC5_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_SDMMC5_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_SDMMC5_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_SDMMC5_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_SDMMC5_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_SDMMC5_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_SDMMC5_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_SDMMC5_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_SDMMC5_CMD_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_SDMMC5_CMD_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_SDMMC5_CLK_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_SDMMC5_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_UART3_TX_IRTX_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_UART3_TX_IRTX_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_UART3_RX_IRRX_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_UART3_RX_IRRX_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_UART3_RTS_SD_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_UART3_RTS_SD_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_UART3_CTS_RCTX_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_UART3_CTS_RCTX_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_5 */
-#define OMAP4_DPM_EMU11_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_DPM_EMU11_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_DPM_EMU10_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_DPM_EMU10_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_DPM_EMU9_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_DPM_EMU9_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_DPM_EMU8_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_DPM_EMU8_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_DPM_EMU7_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_DPM_EMU7_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_DPM_EMU6_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_DPM_EMU6_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_DPM_EMU5_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_DPM_EMU5_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_DPM_EMU4_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_DPM_EMU4_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_DPM_EMU3_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_DPM_EMU3_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_DPM_EMU2_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_DPM_EMU2_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_DPM_EMU1_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_DPM_EMU1_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_DPM_EMU0_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_DPM_EMU0_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_SYS_BOOT5_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_SYS_BOOT5_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_SYS_BOOT4_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_SYS_BOOT4_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_SYS_BOOT3_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_SYS_BOOT3_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_SYS_BOOT2_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_SYS_BOOT2_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_SYS_BOOT1_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_SYS_BOOT1_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_SYS_BOOT0_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_SYS_BOOT0_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_SYS_NIRQ2_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_SYS_NIRQ2_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_SYS_NIRQ1_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_SYS_NIRQ1_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_FREF_CLK2_OUT_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_FREF_CLK2_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_FREF_CLK1_OUT_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_FREF_CLK1_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_UNIPRO_RY2_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_UNIPRO_RY2_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_UNIPRO_RX2_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_UNIPRO_RX2_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_UNIPRO_RY1_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_UNIPRO_RY1_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_UNIPRO_RX1_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_UNIPRO_RX1_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_UNIPRO_RY0_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_UNIPRO_RY0_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_UNIPRO_RX0_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_UNIPRO_RX0_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_UNIPRO_TY2_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_UNIPRO_TY2_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_UNIPRO_TX2_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_UNIPRO_TX2_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_UNIPRO_TY1_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_UNIPRO_TY1_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_UNIPRO_TX1_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_UNIPRO_TX1_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_6 */
-#define OMAP4_DPM_EMU19_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_DPM_EMU19_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_DPM_EMU18_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_DPM_EMU18_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_DPM_EMU17_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_DPM_EMU17_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_DPM_EMU16_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_DPM_EMU16_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_DPM_EMU15_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_DPM_EMU15_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_DPM_EMU14_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_DPM_EMU14_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_DPM_EMU13_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_DPM_EMU13_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_DPM_EMU12_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_DPM_EMU12_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* CONTROL_PADCONF_GLOBAL */
-#define OMAP4_FORCE_OFFMODE_EN_SHIFT 31
-#define OMAP4_FORCE_OFFMODE_EN_MASK (1 << 31)
-
-/* CONTROL_PADCONF_MODE */
-#define OMAP4_VDDS_DV_BANK0_SHIFT 31
-#define OMAP4_VDDS_DV_BANK0_MASK (1 << 31)
-#define OMAP4_VDDS_DV_BANK1_SHIFT 30
-#define OMAP4_VDDS_DV_BANK1_MASK (1 << 30)
-#define OMAP4_VDDS_DV_BANK3_SHIFT 29
-#define OMAP4_VDDS_DV_BANK3_MASK (1 << 29)
-#define OMAP4_VDDS_DV_BANK4_SHIFT 28
-#define OMAP4_VDDS_DV_BANK4_MASK (1 << 28)
-#define OMAP4_VDDS_DV_BANK5_SHIFT 27
-#define OMAP4_VDDS_DV_BANK5_MASK (1 << 27)
-#define OMAP4_VDDS_DV_BANK6_SHIFT 26
-#define OMAP4_VDDS_DV_BANK6_MASK (1 << 26)
-#define OMAP4_VDDS_DV_C2C_SHIFT 25
-#define OMAP4_VDDS_DV_C2C_MASK (1 << 25)
-#define OMAP4_VDDS_DV_CAM_SHIFT 24
-#define OMAP4_VDDS_DV_CAM_MASK (1 << 24)
-#define OMAP4_VDDS_DV_GPMC_SHIFT 23
-#define OMAP4_VDDS_DV_GPMC_MASK (1 << 23)
-#define OMAP4_VDDS_DV_SDMMC2_SHIFT 22
-#define OMAP4_VDDS_DV_SDMMC2_MASK (1 << 22)
-
-/* CONTROL_SMART1IO_PADCONF_0 */
-#define OMAP4_ABE_DR0_SC_SHIFT 30
-#define OMAP4_ABE_DR0_SC_MASK (0x3 << 30)
-#define OMAP4_CAM_DR0_SC_SHIFT 28
-#define OMAP4_CAM_DR0_SC_MASK (0x3 << 28)
-#define OMAP4_FREF_DR2_SC_SHIFT 26
-#define OMAP4_FREF_DR2_SC_MASK (0x3 << 26)
-#define OMAP4_FREF_DR3_SC_SHIFT 24
-#define OMAP4_FREF_DR3_SC_MASK (0x3 << 24)
-#define OMAP4_GPIO_DR8_SC_SHIFT 22
-#define OMAP4_GPIO_DR8_SC_MASK (0x3 << 22)
-#define OMAP4_GPIO_DR9_SC_SHIFT 20
-#define OMAP4_GPIO_DR9_SC_MASK (0x3 << 20)
-#define OMAP4_GPMC_DR2_SC_SHIFT 18
-#define OMAP4_GPMC_DR2_SC_MASK (0x3 << 18)
-#define OMAP4_GPMC_DR3_SC_SHIFT 16
-#define OMAP4_GPMC_DR3_SC_MASK (0x3 << 16)
-#define OMAP4_GPMC_DR6_SC_SHIFT 14
-#define OMAP4_GPMC_DR6_SC_MASK (0x3 << 14)
-#define OMAP4_HDMI_DR0_SC_SHIFT 12
-#define OMAP4_HDMI_DR0_SC_MASK (0x3 << 12)
-#define OMAP4_MCSPI1_DR0_SC_SHIFT 10
-#define OMAP4_MCSPI1_DR0_SC_MASK (0x3 << 10)
-#define OMAP4_UART1_DR0_SC_SHIFT 8
-#define OMAP4_UART1_DR0_SC_MASK (0x3 << 8)
-#define OMAP4_UART3_DR0_SC_SHIFT 6
-#define OMAP4_UART3_DR0_SC_MASK (0x3 << 6)
-#define OMAP4_UART3_DR1_SC_SHIFT 4
-#define OMAP4_UART3_DR1_SC_MASK (0x3 << 4)
-#define OMAP4_UNIPRO_DR0_SC_SHIFT 2
-#define OMAP4_UNIPRO_DR0_SC_MASK (0x3 << 2)
-#define OMAP4_UNIPRO_DR1_SC_SHIFT 0
-#define OMAP4_UNIPRO_DR1_SC_MASK (0x3 << 0)
-
-/* CONTROL_SMART1IO_PADCONF_1 */
-#define OMAP4_ABE_DR0_LB_SHIFT 30
-#define OMAP4_ABE_DR0_LB_MASK (0x3 << 30)
-#define OMAP4_CAM_DR0_LB_SHIFT 28
-#define OMAP4_CAM_DR0_LB_MASK (0x3 << 28)
-#define OMAP4_FREF_DR2_LB_SHIFT 26
-#define OMAP4_FREF_DR2_LB_MASK (0x3 << 26)
-#define OMAP4_FREF_DR3_LB_SHIFT 24
-#define OMAP4_FREF_DR3_LB_MASK (0x3 << 24)
-#define OMAP4_GPIO_DR8_LB_SHIFT 22
-#define OMAP4_GPIO_DR8_LB_MASK (0x3 << 22)
-#define OMAP4_GPIO_DR9_LB_SHIFT 20
-#define OMAP4_GPIO_DR9_LB_MASK (0x3 << 20)
-#define OMAP4_GPMC_DR2_LB_SHIFT 18
-#define OMAP4_GPMC_DR2_LB_MASK (0x3 << 18)
-#define OMAP4_GPMC_DR3_LB_SHIFT 16
-#define OMAP4_GPMC_DR3_LB_MASK (0x3 << 16)
-#define OMAP4_GPMC_DR6_LB_SHIFT 14
-#define OMAP4_GPMC_DR6_LB_MASK (0x3 << 14)
-#define OMAP4_HDMI_DR0_LB_SHIFT 12
-#define OMAP4_HDMI_DR0_LB_MASK (0x3 << 12)
-#define OMAP4_MCSPI1_DR0_LB_SHIFT 10
-#define OMAP4_MCSPI1_DR0_LB_MASK (0x3 << 10)
-#define OMAP4_UART1_DR0_LB_SHIFT 8
-#define OMAP4_UART1_DR0_LB_MASK (0x3 << 8)
-#define OMAP4_UART3_DR0_LB_SHIFT 6
-#define OMAP4_UART3_DR0_LB_MASK (0x3 << 6)
-#define OMAP4_UART3_DR1_LB_SHIFT 4
-#define OMAP4_UART3_DR1_LB_MASK (0x3 << 4)
-#define OMAP4_UNIPRO_DR0_LB_SHIFT 2
-#define OMAP4_UNIPRO_DR0_LB_MASK (0x3 << 2)
-#define OMAP4_UNIPRO_DR1_LB_SHIFT 0
-#define OMAP4_UNIPRO_DR1_LB_MASK (0x3 << 0)
-
-/* CONTROL_SMART2IO_PADCONF_0 */
-#define OMAP4_C2C_DR0_LB_SHIFT 31
-#define OMAP4_C2C_DR0_LB_MASK (1 << 31)
-#define OMAP4_DPM_DR1_LB_SHIFT 30
-#define OMAP4_DPM_DR1_LB_MASK (1 << 30)
-#define OMAP4_DPM_DR2_LB_SHIFT 29
-#define OMAP4_DPM_DR2_LB_MASK (1 << 29)
-#define OMAP4_DPM_DR3_LB_SHIFT 28
-#define OMAP4_DPM_DR3_LB_MASK (1 << 28)
-#define OMAP4_GPIO_DR0_LB_SHIFT 27
-#define OMAP4_GPIO_DR0_LB_MASK (1 << 27)
-#define OMAP4_GPIO_DR1_LB_SHIFT 26
-#define OMAP4_GPIO_DR1_LB_MASK (1 << 26)
-#define OMAP4_GPIO_DR10_LB_SHIFT 25
-#define OMAP4_GPIO_DR10_LB_MASK (1 << 25)
-#define OMAP4_GPIO_DR2_LB_SHIFT 24
-#define OMAP4_GPIO_DR2_LB_MASK (1 << 24)
-#define OMAP4_GPMC_DR0_LB_SHIFT 23
-#define OMAP4_GPMC_DR0_LB_MASK (1 << 23)
-#define OMAP4_GPMC_DR1_LB_SHIFT 22
-#define OMAP4_GPMC_DR1_LB_MASK (1 << 22)
-#define OMAP4_GPMC_DR4_LB_SHIFT 21
-#define OMAP4_GPMC_DR4_LB_MASK (1 << 21)
-#define OMAP4_GPMC_DR5_LB_SHIFT 20
-#define OMAP4_GPMC_DR5_LB_MASK (1 << 20)
-#define OMAP4_GPMC_DR7_LB_SHIFT 19
-#define OMAP4_GPMC_DR7_LB_MASK (1 << 19)
-#define OMAP4_HSI2_DR0_LB_SHIFT 18
-#define OMAP4_HSI2_DR0_LB_MASK (1 << 18)
-#define OMAP4_HSI2_DR1_LB_SHIFT 17
-#define OMAP4_HSI2_DR1_LB_MASK (1 << 17)
-#define OMAP4_HSI2_DR2_LB_SHIFT 16
-#define OMAP4_HSI2_DR2_LB_MASK (1 << 16)
-#define OMAP4_KPD_DR0_LB_SHIFT 15
-#define OMAP4_KPD_DR0_LB_MASK (1 << 15)
-#define OMAP4_KPD_DR1_LB_SHIFT 14
-#define OMAP4_KPD_DR1_LB_MASK (1 << 14)
-#define OMAP4_PDM_DR0_LB_SHIFT 13
-#define OMAP4_PDM_DR0_LB_MASK (1 << 13)
-#define OMAP4_SDMMC2_DR0_LB_SHIFT 12
-#define OMAP4_SDMMC2_DR0_LB_MASK (1 << 12)
-#define OMAP4_SDMMC3_DR0_LB_SHIFT 11
-#define OMAP4_SDMMC3_DR0_LB_MASK (1 << 11)
-#define OMAP4_SDMMC4_DR0_LB_SHIFT 10
-#define OMAP4_SDMMC4_DR0_LB_MASK (1 << 10)
-#define OMAP4_SDMMC4_DR1_LB_SHIFT 9
-#define OMAP4_SDMMC4_DR1_LB_MASK (1 << 9)
-#define OMAP4_SPI3_DR0_LB_SHIFT 8
-#define OMAP4_SPI3_DR0_LB_MASK (1 << 8)
-#define OMAP4_SPI3_DR1_LB_SHIFT 7
-#define OMAP4_SPI3_DR1_LB_MASK (1 << 7)
-#define OMAP4_UART3_DR2_LB_SHIFT 6
-#define OMAP4_UART3_DR2_LB_MASK (1 << 6)
-#define OMAP4_UART3_DR3_LB_SHIFT 5
-#define OMAP4_UART3_DR3_LB_MASK (1 << 5)
-#define OMAP4_UART3_DR4_LB_SHIFT 4
-#define OMAP4_UART3_DR4_LB_MASK (1 << 4)
-#define OMAP4_UART3_DR5_LB_SHIFT 3
-#define OMAP4_UART3_DR5_LB_MASK (1 << 3)
-#define OMAP4_USBA0_DR1_LB_SHIFT 2
-#define OMAP4_USBA0_DR1_LB_MASK (1 << 2)
-#define OMAP4_USBA_DR2_LB_SHIFT 1
-#define OMAP4_USBA_DR2_LB_MASK (1 << 1)
-
-/* CONTROL_SMART2IO_PADCONF_1 */
-#define OMAP4_USBB1_DR0_LB_SHIFT 31
-#define OMAP4_USBB1_DR0_LB_MASK (1 << 31)
-#define OMAP4_USBB2_DR0_LB_SHIFT 30
-#define OMAP4_USBB2_DR0_LB_MASK (1 << 30)
-#define OMAP4_USBA0_DR0_LB_SHIFT 29
-#define OMAP4_USBA0_DR0_LB_MASK (1 << 29)
-
-/* CONTROL_SMART3IO_PADCONF_0 */
-#define OMAP4_DMIC_DR0_MB_SHIFT 30
-#define OMAP4_DMIC_DR0_MB_MASK (0x3 << 30)
-#define OMAP4_GPIO_DR3_MB_SHIFT 28
-#define OMAP4_GPIO_DR3_MB_MASK (0x3 << 28)
-#define OMAP4_GPIO_DR4_MB_SHIFT 26
-#define OMAP4_GPIO_DR4_MB_MASK (0x3 << 26)
-#define OMAP4_GPIO_DR5_MB_SHIFT 24
-#define OMAP4_GPIO_DR5_MB_MASK (0x3 << 24)
-#define OMAP4_GPIO_DR6_MB_SHIFT 22
-#define OMAP4_GPIO_DR6_MB_MASK (0x3 << 22)
-#define OMAP4_HSI_DR1_MB_SHIFT 20
-#define OMAP4_HSI_DR1_MB_MASK (0x3 << 20)
-#define OMAP4_HSI_DR2_MB_SHIFT 18
-#define OMAP4_HSI_DR2_MB_MASK (0x3 << 18)
-#define OMAP4_HSI_DR3_MB_SHIFT 16
-#define OMAP4_HSI_DR3_MB_MASK (0x3 << 16)
-#define OMAP4_MCBSP2_DR0_MB_SHIFT 14
-#define OMAP4_MCBSP2_DR0_MB_MASK (0x3 << 14)
-#define OMAP4_MCSPI4_DR0_MB_SHIFT 12
-#define OMAP4_MCSPI4_DR0_MB_MASK (0x3 << 12)
-#define OMAP4_MCSPI4_DR1_MB_SHIFT 10
-#define OMAP4_MCSPI4_DR1_MB_MASK (0x3 << 10)
-#define OMAP4_SDMMC3_DR0_MB_SHIFT 8
-#define OMAP4_SDMMC3_DR0_MB_MASK (0x3 << 8)
-#define OMAP4_SPI2_DR0_MB_SHIFT 0
-#define OMAP4_SPI2_DR0_MB_MASK (0x3 << 0)
-
-/* CONTROL_SMART3IO_PADCONF_1 */
-#define OMAP4_SPI2_DR1_MB_SHIFT 30
-#define OMAP4_SPI2_DR1_MB_MASK (0x3 << 30)
-#define OMAP4_SPI2_DR2_MB_SHIFT 28
-#define OMAP4_SPI2_DR2_MB_MASK (0x3 << 28)
-#define OMAP4_UART2_DR0_MB_SHIFT 26
-#define OMAP4_UART2_DR0_MB_MASK (0x3 << 26)
-#define OMAP4_UART2_DR1_MB_SHIFT 24
-#define OMAP4_UART2_DR1_MB_MASK (0x3 << 24)
-#define OMAP4_UART4_DR0_MB_SHIFT 22
-#define OMAP4_UART4_DR0_MB_MASK (0x3 << 22)
-#define OMAP4_HSI_DR0_MB_SHIFT 20
-#define OMAP4_HSI_DR0_MB_MASK (0x3 << 20)
-
-/* CONTROL_SMART3IO_PADCONF_2 */
-#define OMAP4_DMIC_DR0_LB_SHIFT 31
-#define OMAP4_DMIC_DR0_LB_MASK (1 << 31)
-#define OMAP4_GPIO_DR3_LB_SHIFT 30
-#define OMAP4_GPIO_DR3_LB_MASK (1 << 30)
-#define OMAP4_GPIO_DR4_LB_SHIFT 29
-#define OMAP4_GPIO_DR4_LB_MASK (1 << 29)
-#define OMAP4_GPIO_DR5_LB_SHIFT 28
-#define OMAP4_GPIO_DR5_LB_MASK (1 << 28)
-#define OMAP4_GPIO_DR6_LB_SHIFT 27
-#define OMAP4_GPIO_DR6_LB_MASK (1 << 27)
-#define OMAP4_HSI_DR1_LB_SHIFT 26
-#define OMAP4_HSI_DR1_LB_MASK (1 << 26)
-#define OMAP4_HSI_DR2_LB_SHIFT 25
-#define OMAP4_HSI_DR2_LB_MASK (1 << 25)
-#define OMAP4_HSI_DR3_LB_SHIFT 24
-#define OMAP4_HSI_DR3_LB_MASK (1 << 24)
-#define OMAP4_MCBSP2_DR0_LB_SHIFT 23
-#define OMAP4_MCBSP2_DR0_LB_MASK (1 << 23)
-#define OMAP4_MCSPI4_DR0_LB_SHIFT 22
-#define OMAP4_MCSPI4_DR0_LB_MASK (1 << 22)
-#define OMAP4_MCSPI4_DR1_LB_SHIFT 21
-#define OMAP4_MCSPI4_DR1_LB_MASK (1 << 21)
-#define OMAP4_SLIMBUS2_DR0_LB_SHIFT 18
-#define OMAP4_SLIMBUS2_DR0_LB_MASK (1 << 18)
-#define OMAP4_SPI2_DR0_LB_SHIFT 16
-#define OMAP4_SPI2_DR0_LB_MASK (1 << 16)
-#define OMAP4_SPI2_DR1_LB_SHIFT 15
-#define OMAP4_SPI2_DR1_LB_MASK (1 << 15)
-#define OMAP4_SPI2_DR2_LB_SHIFT 14
-#define OMAP4_SPI2_DR2_LB_MASK (1 << 14)
-#define OMAP4_UART2_DR0_LB_SHIFT 13
-#define OMAP4_UART2_DR0_LB_MASK (1 << 13)
-#define OMAP4_UART2_DR1_LB_SHIFT 12
-#define OMAP4_UART2_DR1_LB_MASK (1 << 12)
-#define OMAP4_UART4_DR0_LB_SHIFT 11
-#define OMAP4_UART4_DR0_LB_MASK (1 << 11)
-#define OMAP4_HSI_DR0_LB_SHIFT 10
-#define OMAP4_HSI_DR0_LB_MASK (1 << 10)
-
-/* CONTROL_USBB_HSIC */
-#define OMAP4_USBB2_DR1_SR_SHIFT 30
-#define OMAP4_USBB2_DR1_SR_MASK (0x3 << 30)
-#define OMAP4_USBB2_DR1_I_SHIFT 27
-#define OMAP4_USBB2_DR1_I_MASK (0x7 << 27)
-#define OMAP4_USBB1_DR1_SR_SHIFT 25
-#define OMAP4_USBB1_DR1_SR_MASK (0x3 << 25)
-#define OMAP4_USBB1_DR1_I_SHIFT 22
-#define OMAP4_USBB1_DR1_I_MASK (0x7 << 22)
-#define OMAP4_USBB1_HSIC_DATA_WD_SHIFT 20
-#define OMAP4_USBB1_HSIC_DATA_WD_MASK (0x3 << 20)
-#define OMAP4_USBB1_HSIC_STROBE_WD_SHIFT 18
-#define OMAP4_USBB1_HSIC_STROBE_WD_MASK (0x3 << 18)
-#define OMAP4_USBB2_HSIC_DATA_WD_SHIFT 16
-#define OMAP4_USBB2_HSIC_DATA_WD_MASK (0x3 << 16)
-#define OMAP4_USBB2_HSIC_STROBE_WD_SHIFT 14
-#define OMAP4_USBB2_HSIC_STROBE_WD_MASK (0x3 << 14)
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_ENABLE_SHIFT 13
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_ENABLE_MASK (1 << 13)
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_SHIFT 11
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_MASK (0x3 << 11)
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_ENABLE_SHIFT 10
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_ENABLE_MASK (1 << 10)
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_SHIFT 8
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_MASK (0x3 << 8)
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_ENABLE_SHIFT 7
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_ENABLE_MASK (1 << 7)
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_SHIFT 5
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_MASK (0x3 << 5)
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_ENABLE_SHIFT 4
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_ENABLE_MASK (1 << 4)
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_SHIFT 2
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_MASK (0x3 << 2)
-
-/* CONTROL_SLIMBUS */
-#define OMAP4_SLIMBUS1_DR0_MB_SHIFT 30
-#define OMAP4_SLIMBUS1_DR0_MB_MASK (0x3 << 30)
-#define OMAP4_SLIMBUS1_DR1_MB_SHIFT 28
-#define OMAP4_SLIMBUS1_DR1_MB_MASK (0x3 << 28)
-#define OMAP4_SLIMBUS2_DR0_MB_SHIFT 26
-#define OMAP4_SLIMBUS2_DR0_MB_MASK (0x3 << 26)
-#define OMAP4_SLIMBUS2_DR1_MB_SHIFT 24
-#define OMAP4_SLIMBUS2_DR1_MB_MASK (0x3 << 24)
-#define OMAP4_SLIMBUS2_DR2_MB_SHIFT 22
-#define OMAP4_SLIMBUS2_DR2_MB_MASK (0x3 << 22)
-#define OMAP4_SLIMBUS2_DR3_MB_SHIFT 20
-#define OMAP4_SLIMBUS2_DR3_MB_MASK (0x3 << 20)
-#define OMAP4_SLIMBUS1_DR0_LB_SHIFT 19
-#define OMAP4_SLIMBUS1_DR0_LB_MASK (1 << 19)
-#define OMAP4_SLIMBUS2_DR1_LB_SHIFT 18
-#define OMAP4_SLIMBUS2_DR1_LB_MASK (1 << 18)
-
-/* CONTROL_PBIASLITE */
-#define OMAP4_USIM_PBIASLITE_HIZ_MODE_SHIFT 31
-#define OMAP4_USIM_PBIASLITE_HIZ_MODE_MASK (1 << 31)
-#define OMAP4_USIM_PBIASLITE_SUPPLY_HI_OUT_SHIFT 30
-#define OMAP4_USIM_PBIASLITE_SUPPLY_HI_OUT_MASK (1 << 30)
-#define OMAP4_USIM_PBIASLITE_VMODE_ERROR_SHIFT 29
-#define OMAP4_USIM_PBIASLITE_VMODE_ERROR_MASK (1 << 29)
-#define OMAP4_USIM_PBIASLITE_PWRDNZ_SHIFT 28
-#define OMAP4_USIM_PBIASLITE_PWRDNZ_MASK (1 << 28)
-#define OMAP4_USIM_PBIASLITE_VMODE_SHIFT 27
-#define OMAP4_USIM_PBIASLITE_VMODE_MASK (1 << 27)
-#define OMAP4_MMC1_PWRDNZ_SHIFT 26
-#define OMAP4_MMC1_PWRDNZ_MASK (1 << 26)
-#define OMAP4_MMC1_PBIASLITE_HIZ_MODE_SHIFT 25
-#define OMAP4_MMC1_PBIASLITE_HIZ_MODE_MASK (1 << 25)
-#define OMAP4_MMC1_PBIASLITE_SUPPLY_HI_OUT_SHIFT 24
-#define OMAP4_MMC1_PBIASLITE_SUPPLY_HI_OUT_MASK (1 << 24)
-#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_SHIFT 23
-#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK (1 << 23)
-#define OMAP4_MMC1_PBIASLITE_PWRDNZ_SHIFT 22
-#define OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK (1 << 22)
-#define OMAP4_MMC1_PBIASLITE_VMODE_SHIFT 21
-#define OMAP4_MMC1_PBIASLITE_VMODE_MASK (1 << 21)
-#define OMAP4_USBC1_ICUSB_PWRDNZ_SHIFT 20
-#define OMAP4_USBC1_ICUSB_PWRDNZ_MASK (1 << 20)
-
-/* CONTROL_I2C_0 */
-#define OMAP4_I2C4_SDA_GLFENB_SHIFT 31
-#define OMAP4_I2C4_SDA_GLFENB_MASK (1 << 31)
-#define OMAP4_I2C4_SDA_LOAD_BITS_SHIFT 29
-#define OMAP4_I2C4_SDA_LOAD_BITS_MASK (0x3 << 29)
-#define OMAP4_I2C4_SDA_PULLUPRESX_SHIFT 28
-#define OMAP4_I2C4_SDA_PULLUPRESX_MASK (1 << 28)
-#define OMAP4_I2C3_SDA_GLFENB_SHIFT 27
-#define OMAP4_I2C3_SDA_GLFENB_MASK (1 << 27)
-#define OMAP4_I2C3_SDA_LOAD_BITS_SHIFT 25
-#define OMAP4_I2C3_SDA_LOAD_BITS_MASK (0x3 << 25)
-#define OMAP4_I2C3_SDA_PULLUPRESX_SHIFT 24
-#define OMAP4_I2C3_SDA_PULLUPRESX_MASK (1 << 24)
-#define OMAP4_I2C2_SDA_GLFENB_SHIFT 23
-#define OMAP4_I2C2_SDA_GLFENB_MASK (1 << 23)
-#define OMAP4_I2C2_SDA_LOAD_BITS_SHIFT 21
-#define OMAP4_I2C2_SDA_LOAD_BITS_MASK (0x3 << 21)
-#define OMAP4_I2C2_SDA_PULLUPRESX_SHIFT 20
-#define OMAP4_I2C2_SDA_PULLUPRESX_MASK (1 << 20)
-#define OMAP4_I2C1_SDA_GLFENB_SHIFT 19
-#define OMAP4_I2C1_SDA_GLFENB_MASK (1 << 19)
-#define OMAP4_I2C1_SDA_LOAD_BITS_SHIFT 17
-#define OMAP4_I2C1_SDA_LOAD_BITS_MASK (0x3 << 17)
-#define OMAP4_I2C1_SDA_PULLUPRESX_SHIFT 16
-#define OMAP4_I2C1_SDA_PULLUPRESX_MASK (1 << 16)
-#define OMAP4_I2C4_SCL_GLFENB_SHIFT 15
-#define OMAP4_I2C4_SCL_GLFENB_MASK (1 << 15)
-#define OMAP4_I2C4_SCL_LOAD_BITS_SHIFT 13
-#define OMAP4_I2C4_SCL_LOAD_BITS_MASK (0x3 << 13)
-#define OMAP4_I2C4_SCL_PULLUPRESX_SHIFT 12
-#define OMAP4_I2C4_SCL_PULLUPRESX_MASK (1 << 12)
-#define OMAP4_I2C3_SCL_GLFENB_SHIFT 11
-#define OMAP4_I2C3_SCL_GLFENB_MASK (1 << 11)
-#define OMAP4_I2C3_SCL_LOAD_BITS_SHIFT 9
-#define OMAP4_I2C3_SCL_LOAD_BITS_MASK (0x3 << 9)
-#define OMAP4_I2C3_SCL_PULLUPRESX_SHIFT 8
-#define OMAP4_I2C3_SCL_PULLUPRESX_MASK (1 << 8)
-#define OMAP4_I2C2_SCL_GLFENB_SHIFT 7
-#define OMAP4_I2C2_SCL_GLFENB_MASK (1 << 7)
-#define OMAP4_I2C2_SCL_LOAD_BITS_SHIFT 5
-#define OMAP4_I2C2_SCL_LOAD_BITS_MASK (0x3 << 5)
-#define OMAP4_I2C2_SCL_PULLUPRESX_SHIFT 4
-#define OMAP4_I2C2_SCL_PULLUPRESX_MASK (1 << 4)
-#define OMAP4_I2C1_SCL_GLFENB_SHIFT 3
-#define OMAP4_I2C1_SCL_GLFENB_MASK (1 << 3)
-#define OMAP4_I2C1_SCL_LOAD_BITS_SHIFT 1
-#define OMAP4_I2C1_SCL_LOAD_BITS_MASK (0x3 << 1)
-#define OMAP4_I2C1_SCL_PULLUPRESX_SHIFT 0
-#define OMAP4_I2C1_SCL_PULLUPRESX_MASK (1 << 0)
-
-/* CONTROL_CAMERA_RX */
-#define OMAP4_CAMERARX_UNIPRO_CTRLCLKEN_SHIFT 31
-#define OMAP4_CAMERARX_UNIPRO_CTRLCLKEN_MASK (1 << 31)
-#define OMAP4_CAMERARX_CSI22_LANEENABLE_SHIFT 29
-#define OMAP4_CAMERARX_CSI22_LANEENABLE_MASK (0x3 << 29)
-#define OMAP4_CAMERARX_CSI21_LANEENABLE_SHIFT 24
-#define OMAP4_CAMERARX_CSI21_LANEENABLE_MASK (0x1f << 24)
-#define OMAP4_CAMERARX_UNIPRO_CAMMODE_SHIFT 22
-#define OMAP4_CAMERARX_UNIPRO_CAMMODE_MASK (0x3 << 22)
-#define OMAP4_CAMERARX_CSI22_CTRLCLKEN_SHIFT 21
-#define OMAP4_CAMERARX_CSI22_CTRLCLKEN_MASK (1 << 21)
-#define OMAP4_CAMERARX_CSI22_CAMMODE_SHIFT 19
-#define OMAP4_CAMERARX_CSI22_CAMMODE_MASK (0x3 << 19)
-#define OMAP4_CAMERARX_CSI21_CTRLCLKEN_SHIFT 18
-#define OMAP4_CAMERARX_CSI21_CTRLCLKEN_MASK (1 << 18)
-#define OMAP4_CAMERARX_CSI21_CAMMODE_SHIFT 16
-#define OMAP4_CAMERARX_CSI21_CAMMODE_MASK (0x3 << 16)
-
-/* CONTROL_AVDAC */
-#define OMAP4_AVDAC_ACEN_SHIFT 31
-#define OMAP4_AVDAC_ACEN_MASK (1 << 31)
-#define OMAP4_AVDAC_TVOUTBYPASS_SHIFT 30
-#define OMAP4_AVDAC_TVOUTBYPASS_MASK (1 << 30)
-#define OMAP4_AVDAC_INPUTINV_SHIFT 29
-#define OMAP4_AVDAC_INPUTINV_MASK (1 << 29)
-#define OMAP4_AVDAC_CTL_SHIFT 13
-#define OMAP4_AVDAC_CTL_MASK (0xffff << 13)
-#define OMAP4_AVDAC_CTL_WR_ACK_SHIFT 12
-#define OMAP4_AVDAC_CTL_WR_ACK_MASK (1 << 12)
-
-/* CONTROL_HDMI_TX_PHY */
-#define OMAP4_HDMITXPHY_PADORDER_SHIFT 31
-#define OMAP4_HDMITXPHY_PADORDER_MASK (1 << 31)
-#define OMAP4_HDMITXPHY_TXVALID_SHIFT 30
-#define OMAP4_HDMITXPHY_TXVALID_MASK (1 << 30)
-#define OMAP4_HDMITXPHY_ENBYPASSCLK_SHIFT 29
-#define OMAP4_HDMITXPHY_ENBYPASSCLK_MASK (1 << 29)
-#define OMAP4_HDMITXPHY_PD_PULLUPDET_SHIFT 28
-#define OMAP4_HDMITXPHY_PD_PULLUPDET_MASK (1 << 28)
-
-/* CONTROL_MMC2 */
-#define OMAP4_MMC2_FEEDBACK_CLK_SEL_SHIFT 31
-#define OMAP4_MMC2_FEEDBACK_CLK_SEL_MASK (1 << 31)
-
-/* CONTROL_DSIPHY */
-#define OMAP4_DSI2_LANEENABLE_SHIFT 29
-#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29)
-#define OMAP4_DSI1_LANEENABLE_SHIFT 24
-#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24)
-#define OMAP4_DSI1_PIPD_SHIFT 19
-#define OMAP4_DSI1_PIPD_MASK (0x1f << 19)
-#define OMAP4_DSI2_PIPD_SHIFT 14
-#define OMAP4_DSI2_PIPD_MASK (0x1f << 14)
-
-/* CONTROL_MCBSPLP */
-#define OMAP4_ALBCTRLRX_FSX_SHIFT 31
-#define OMAP4_ALBCTRLRX_FSX_MASK (1 << 31)
-#define OMAP4_ALBCTRLRX_CLKX_SHIFT 30
-#define OMAP4_ALBCTRLRX_CLKX_MASK (1 << 30)
-#define OMAP4_ABE_MCBSP1_DR_EN_SHIFT 29
-#define OMAP4_ABE_MCBSP1_DR_EN_MASK (1 << 29)
-
-/* CONTROL_USB2PHYCORE */
-#define OMAP4_USB2PHY_AUTORESUME_EN_SHIFT 31
-#define OMAP4_USB2PHY_AUTORESUME_EN_MASK (1 << 31)
-#define OMAP4_USB2PHY_DISCHGDET_SHIFT 30
-#define OMAP4_USB2PHY_DISCHGDET_MASK (1 << 30)
-#define OMAP4_USB2PHY_GPIOMODE_SHIFT 29
-#define OMAP4_USB2PHY_GPIOMODE_MASK (1 << 29)
-#define OMAP4_USB2PHY_CHG_DET_EXT_CTL_SHIFT 28
-#define OMAP4_USB2PHY_CHG_DET_EXT_CTL_MASK (1 << 28)
-#define OMAP4_USB2PHY_RDM_PD_CHGDET_EN_SHIFT 27
-#define OMAP4_USB2PHY_RDM_PD_CHGDET_EN_MASK (1 << 27)
-#define OMAP4_USB2PHY_RDP_PU_CHGDET_EN_SHIFT 26
-#define OMAP4_USB2PHY_RDP_PU_CHGDET_EN_MASK (1 << 26)
-#define OMAP4_USB2PHY_CHG_VSRC_EN_SHIFT 25
-#define OMAP4_USB2PHY_CHG_VSRC_EN_MASK (1 << 25)
-#define OMAP4_USB2PHY_CHG_ISINK_EN_SHIFT 24
-#define OMAP4_USB2PHY_CHG_ISINK_EN_MASK (1 << 24)
-#define OMAP4_USB2PHY_CHG_DET_STATUS_SHIFT 21
-#define OMAP4_USB2PHY_CHG_DET_STATUS_MASK (0x7 << 21)
-#define OMAP4_USB2PHY_CHG_DET_DM_COMP_SHIFT 20
-#define OMAP4_USB2PHY_CHG_DET_DM_COMP_MASK (1 << 20)
-#define OMAP4_USB2PHY_CHG_DET_DP_COMP_SHIFT 19
-#define OMAP4_USB2PHY_CHG_DET_DP_COMP_MASK (1 << 19)
-#define OMAP4_USB2PHY_DATADET_SHIFT 18
-#define OMAP4_USB2PHY_DATADET_MASK (1 << 18)
-#define OMAP4_USB2PHY_SINKONDP_SHIFT 17
-#define OMAP4_USB2PHY_SINKONDP_MASK (1 << 17)
-#define OMAP4_USB2PHY_SRCONDM_SHIFT 16
-#define OMAP4_USB2PHY_SRCONDM_MASK (1 << 16)
-#define OMAP4_USB2PHY_RESTARTCHGDET_SHIFT 15
-#define OMAP4_USB2PHY_RESTARTCHGDET_MASK (1 << 15)
-#define OMAP4_USB2PHY_CHGDETDONE_SHIFT 14
-#define OMAP4_USB2PHY_CHGDETDONE_MASK (1 << 14)
-#define OMAP4_USB2PHY_CHGDETECTED_SHIFT 13
-#define OMAP4_USB2PHY_CHGDETECTED_MASK (1 << 13)
-#define OMAP4_USB2PHY_MCPCPUEN_SHIFT 12
-#define OMAP4_USB2PHY_MCPCPUEN_MASK (1 << 12)
-#define OMAP4_USB2PHY_MCPCMODEEN_SHIFT 11
-#define OMAP4_USB2PHY_MCPCMODEEN_MASK (1 << 11)
-#define OMAP4_USB2PHY_RESETDONEMCLK_SHIFT 10
-#define OMAP4_USB2PHY_RESETDONEMCLK_MASK (1 << 10)
-#define OMAP4_USB2PHY_UTMIRESETDONE_SHIFT 9
-#define OMAP4_USB2PHY_UTMIRESETDONE_MASK (1 << 9)
-#define OMAP4_USB2PHY_TXBITSTUFFENABLE_SHIFT 8
-#define OMAP4_USB2PHY_TXBITSTUFFENABLE_MASK (1 << 8)
-#define OMAP4_USB2PHY_DATAPOLARITYN_SHIFT 7
-#define OMAP4_USB2PHY_DATAPOLARITYN_MASK (1 << 7)
-#define OMAP4_USBDPLL_FREQLOCK_SHIFT 6
-#define OMAP4_USBDPLL_FREQLOCK_MASK (1 << 6)
-#define OMAP4_USB2PHY_RESETDONETCLK_SHIFT 5
-#define OMAP4_USB2PHY_RESETDONETCLK_MASK (1 << 5)
-
-/* CONTROL_I2C_1 */
-#define OMAP4_HDMI_DDC_SDA_GLFENB_SHIFT 31
-#define OMAP4_HDMI_DDC_SDA_GLFENB_MASK (1 << 31)
-#define OMAP4_HDMI_DDC_SDA_LOAD_BITS_SHIFT 29
-#define OMAP4_HDMI_DDC_SDA_LOAD_BITS_MASK (0x3 << 29)
-#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_SHIFT 28
-#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK (1 << 28)
-#define OMAP4_HDMI_DDC_SCL_GLFENB_SHIFT 27
-#define OMAP4_HDMI_DDC_SCL_GLFENB_MASK (1 << 27)
-#define OMAP4_HDMI_DDC_SCL_LOAD_BITS_SHIFT 25
-#define OMAP4_HDMI_DDC_SCL_LOAD_BITS_MASK (0x3 << 25)
-#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_SHIFT 24
-#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK (1 << 24)
-#define OMAP4_HDMI_DDC_SDA_HSMODE_SHIFT 23
-#define OMAP4_HDMI_DDC_SDA_HSMODE_MASK (1 << 23)
-#define OMAP4_HDMI_DDC_SDA_NMODE_SHIFT 22
-#define OMAP4_HDMI_DDC_SDA_NMODE_MASK (1 << 22)
-#define OMAP4_HDMI_DDC_SCL_HSMODE_SHIFT 21
-#define OMAP4_HDMI_DDC_SCL_HSMODE_MASK (1 << 21)
-#define OMAP4_HDMI_DDC_SCL_NMODE_SHIFT 20
-#define OMAP4_HDMI_DDC_SCL_NMODE_MASK (1 << 20)
-
-/* CONTROL_MMC1 */
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_SHIFT 31
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_MASK (1 << 31)
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_SHIFT 30
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK (1 << 30)
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_SHIFT 29
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK (1 << 29)
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_SHIFT 28
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK (1 << 28)
-#define OMAP4_SDMMC1_DR0_SPEEDCTRL_SHIFT 27
-#define OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK (1 << 27)
-#define OMAP4_SDMMC1_DR1_SPEEDCTRL_SHIFT 26
-#define OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK (1 << 26)
-#define OMAP4_SDMMC1_DR2_SPEEDCTRL_SHIFT 25
-#define OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK (1 << 25)
-#define OMAP4_USBC1_DR0_SPEEDCTRL_SHIFT 24
-#define OMAP4_USBC1_DR0_SPEEDCTRL_MASK (1 << 24)
-#define OMAP4_USB_FD_CDEN_SHIFT 23
-#define OMAP4_USB_FD_CDEN_MASK (1 << 23)
-#define OMAP4_USBC1_ICUSB_DP_PDDIS_SHIFT 22
-#define OMAP4_USBC1_ICUSB_DP_PDDIS_MASK (1 << 22)
-#define OMAP4_USBC1_ICUSB_DM_PDDIS_SHIFT 21
-#define OMAP4_USBC1_ICUSB_DM_PDDIS_MASK (1 << 21)
-
-/* CONTROL_HSI */
-#define OMAP4_HSI1_CALLOOP_SEL_SHIFT 31
-#define OMAP4_HSI1_CALLOOP_SEL_MASK (1 << 31)
-#define OMAP4_HSI1_CALMUX_SEL_SHIFT 30
-#define OMAP4_HSI1_CALMUX_SEL_MASK (1 << 30)
-#define OMAP4_HSI2_CALLOOP_SEL_SHIFT 29
-#define OMAP4_HSI2_CALLOOP_SEL_MASK (1 << 29)
-#define OMAP4_HSI2_CALMUX_SEL_SHIFT 28
-#define OMAP4_HSI2_CALMUX_SEL_MASK (1 << 28)
-
-/* CONTROL_USB */
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT0_AUTO_EN_SHIFT 31
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT0_AUTO_EN_MASK (1 << 31)
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT1_AUTO_EN_SHIFT 30
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT1_AUTO_EN_MASK (1 << 30)
-
-/* CONTROL_HDQ */
-#define OMAP4_HDQ_SIO_PWRDNZ_SHIFT 31
-#define OMAP4_HDQ_SIO_PWRDNZ_MASK (1 << 31)
-
-/* CONTROL_LPDDR2IO1_0 */
-#define OMAP4_LPDDR2IO1_GR4_SR_SHIFT 30
-#define OMAP4_LPDDR2IO1_GR4_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO1_GR4_I_SHIFT 27
-#define OMAP4_LPDDR2IO1_GR4_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO1_GR4_WD_SHIFT 25
-#define OMAP4_LPDDR2IO1_GR4_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO1_GR3_SR_SHIFT 22
-#define OMAP4_LPDDR2IO1_GR3_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO1_GR3_I_SHIFT 19
-#define OMAP4_LPDDR2IO1_GR3_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO1_GR3_WD_SHIFT 17
-#define OMAP4_LPDDR2IO1_GR3_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO1_GR2_SR_SHIFT 14
-#define OMAP4_LPDDR2IO1_GR2_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO1_GR2_I_SHIFT 11
-#define OMAP4_LPDDR2IO1_GR2_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO1_GR2_WD_SHIFT 9
-#define OMAP4_LPDDR2IO1_GR2_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO1_GR1_SR_SHIFT 6
-#define OMAP4_LPDDR2IO1_GR1_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO1_GR1_I_SHIFT 3
-#define OMAP4_LPDDR2IO1_GR1_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO1_GR1_WD_SHIFT 1
-#define OMAP4_LPDDR2IO1_GR1_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO1_1 */
-#define OMAP4_LPDDR2IO1_GR8_SR_SHIFT 30
-#define OMAP4_LPDDR2IO1_GR8_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO1_GR8_I_SHIFT 27
-#define OMAP4_LPDDR2IO1_GR8_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO1_GR8_WD_SHIFT 25
-#define OMAP4_LPDDR2IO1_GR8_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO1_GR7_SR_SHIFT 22
-#define OMAP4_LPDDR2IO1_GR7_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO1_GR7_I_SHIFT 19
-#define OMAP4_LPDDR2IO1_GR7_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO1_GR7_WD_SHIFT 17
-#define OMAP4_LPDDR2IO1_GR7_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO1_GR6_SR_SHIFT 14
-#define OMAP4_LPDDR2IO1_GR6_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO1_GR6_I_SHIFT 11
-#define OMAP4_LPDDR2IO1_GR6_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO1_GR6_WD_SHIFT 9
-#define OMAP4_LPDDR2IO1_GR6_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO1_GR5_SR_SHIFT 6
-#define OMAP4_LPDDR2IO1_GR5_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO1_GR5_I_SHIFT 3
-#define OMAP4_LPDDR2IO1_GR5_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO1_GR5_WD_SHIFT 1
-#define OMAP4_LPDDR2IO1_GR5_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO1_2 */
-#define OMAP4_LPDDR2IO1_GR11_SR_SHIFT 30
-#define OMAP4_LPDDR2IO1_GR11_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO1_GR11_I_SHIFT 27
-#define OMAP4_LPDDR2IO1_GR11_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO1_GR11_WD_SHIFT 25
-#define OMAP4_LPDDR2IO1_GR11_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO1_GR10_SR_SHIFT 22
-#define OMAP4_LPDDR2IO1_GR10_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO1_GR10_I_SHIFT 19
-#define OMAP4_LPDDR2IO1_GR10_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO1_GR10_WD_SHIFT 17
-#define OMAP4_LPDDR2IO1_GR10_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO1_GR9_SR_SHIFT 14
-#define OMAP4_LPDDR2IO1_GR9_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO1_GR9_I_SHIFT 11
-#define OMAP4_LPDDR2IO1_GR9_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO1_GR9_WD_SHIFT 9
-#define OMAP4_LPDDR2IO1_GR9_WD_MASK (0x3 << 9)
-
-/* CONTROL_LPDDR2IO1_3 */
-#define OMAP4_LPDDR21_VREF_CA_CCAP0_SHIFT 31
-#define OMAP4_LPDDR21_VREF_CA_CCAP0_MASK (1 << 31)
-#define OMAP4_LPDDR21_VREF_CA_CCAP1_SHIFT 30
-#define OMAP4_LPDDR21_VREF_CA_CCAP1_MASK (1 << 30)
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP0_SHIFT 29
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP0_MASK (1 << 29)
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP1_SHIFT 28
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP1_MASK (1 << 28)
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP0_SHIFT 27
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP0_MASK (1 << 27)
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP1_SHIFT 26
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP1_MASK (1 << 26)
-#define OMAP4_LPDDR21_VREF_CA_TAP0_SHIFT 25
-#define OMAP4_LPDDR21_VREF_CA_TAP0_MASK (1 << 25)
-#define OMAP4_LPDDR21_VREF_CA_TAP1_SHIFT 24
-#define OMAP4_LPDDR21_VREF_CA_TAP1_MASK (1 << 24)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP0_SHIFT 23
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP0_MASK (1 << 23)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP1_SHIFT 22
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP1_MASK (1 << 22)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP0_SHIFT 21
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP0_MASK (1 << 21)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP1_SHIFT 20
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP1_MASK (1 << 20)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP0_SHIFT 19
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP0_MASK (1 << 19)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP1_SHIFT 18
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP1_MASK (1 << 18)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP0_SHIFT 17
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP0_MASK (1 << 17)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP1_SHIFT 16
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP1_MASK (1 << 16)
-#define OMAP4_LPDDR21_VREF_DQ_CCAP0_SHIFT 15
-#define OMAP4_LPDDR21_VREF_DQ_CCAP0_MASK (1 << 15)
-#define OMAP4_LPDDR21_VREF_DQ_CCAP1_SHIFT 14
-#define OMAP4_LPDDR21_VREF_DQ_CCAP1_MASK (1 << 14)
-#define OMAP4_LPDDR21_VREF_DQ_TAP0_SHIFT 13
-#define OMAP4_LPDDR21_VREF_DQ_TAP0_MASK (1 << 13)
-#define OMAP4_LPDDR21_VREF_DQ_TAP1_SHIFT 12
-#define OMAP4_LPDDR21_VREF_DQ_TAP1_MASK (1 << 12)
-
-/* CONTROL_LPDDR2IO2_0 */
-#define OMAP4_LPDDR2IO2_GR4_SR_SHIFT 30
-#define OMAP4_LPDDR2IO2_GR4_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO2_GR4_I_SHIFT 27
-#define OMAP4_LPDDR2IO2_GR4_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO2_GR4_WD_SHIFT 25
-#define OMAP4_LPDDR2IO2_GR4_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO2_GR3_SR_SHIFT 22
-#define OMAP4_LPDDR2IO2_GR3_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO2_GR3_I_SHIFT 19
-#define OMAP4_LPDDR2IO2_GR3_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO2_GR3_WD_SHIFT 17
-#define OMAP4_LPDDR2IO2_GR3_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO2_GR2_SR_SHIFT 14
-#define OMAP4_LPDDR2IO2_GR2_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO2_GR2_I_SHIFT 11
-#define OMAP4_LPDDR2IO2_GR2_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO2_GR2_WD_SHIFT 9
-#define OMAP4_LPDDR2IO2_GR2_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO2_GR1_SR_SHIFT 6
-#define OMAP4_LPDDR2IO2_GR1_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO2_GR1_I_SHIFT 3
-#define OMAP4_LPDDR2IO2_GR1_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO2_GR1_WD_SHIFT 1
-#define OMAP4_LPDDR2IO2_GR1_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO2_1 */
-#define OMAP4_LPDDR2IO2_GR8_SR_SHIFT 30
-#define OMAP4_LPDDR2IO2_GR8_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO2_GR8_I_SHIFT 27
-#define OMAP4_LPDDR2IO2_GR8_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO2_GR8_WD_SHIFT 25
-#define OMAP4_LPDDR2IO2_GR8_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO2_GR7_SR_SHIFT 22
-#define OMAP4_LPDDR2IO2_GR7_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO2_GR7_I_SHIFT 19
-#define OMAP4_LPDDR2IO2_GR7_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO2_GR7_WD_SHIFT 17
-#define OMAP4_LPDDR2IO2_GR7_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO2_GR6_SR_SHIFT 14
-#define OMAP4_LPDDR2IO2_GR6_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO2_GR6_I_SHIFT 11
-#define OMAP4_LPDDR2IO2_GR6_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO2_GR6_WD_SHIFT 9
-#define OMAP4_LPDDR2IO2_GR6_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO2_GR5_SR_SHIFT 6
-#define OMAP4_LPDDR2IO2_GR5_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO2_GR5_I_SHIFT 3
-#define OMAP4_LPDDR2IO2_GR5_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO2_GR5_WD_SHIFT 1
-#define OMAP4_LPDDR2IO2_GR5_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO2_2 */
-#define OMAP4_LPDDR2IO2_GR11_SR_SHIFT 30
-#define OMAP4_LPDDR2IO2_GR11_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO2_GR11_I_SHIFT 27
-#define OMAP4_LPDDR2IO2_GR11_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO2_GR11_WD_SHIFT 25
-#define OMAP4_LPDDR2IO2_GR11_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO2_GR10_SR_SHIFT 22
-#define OMAP4_LPDDR2IO2_GR10_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO2_GR10_I_SHIFT 19
-#define OMAP4_LPDDR2IO2_GR10_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO2_GR10_WD_SHIFT 17
-#define OMAP4_LPDDR2IO2_GR10_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO2_GR9_SR_SHIFT 14
-#define OMAP4_LPDDR2IO2_GR9_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO2_GR9_I_SHIFT 11
-#define OMAP4_LPDDR2IO2_GR9_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO2_GR9_WD_SHIFT 9
-#define OMAP4_LPDDR2IO2_GR9_WD_MASK (0x3 << 9)
-
-/* CONTROL_LPDDR2IO2_3 */
-#define OMAP4_LPDDR22_VREF_CA_CCAP0_SHIFT 31
-#define OMAP4_LPDDR22_VREF_CA_CCAP0_MASK (1 << 31)
-#define OMAP4_LPDDR22_VREF_CA_CCAP1_SHIFT 30
-#define OMAP4_LPDDR22_VREF_CA_CCAP1_MASK (1 << 30)
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP0_SHIFT 29
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP0_MASK (1 << 29)
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP1_SHIFT 28
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP1_MASK (1 << 28)
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP0_SHIFT 27
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP0_MASK (1 << 27)
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP1_SHIFT 26
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP1_MASK (1 << 26)
-#define OMAP4_LPDDR22_VREF_CA_TAP0_SHIFT 25
-#define OMAP4_LPDDR22_VREF_CA_TAP0_MASK (1 << 25)
-#define OMAP4_LPDDR22_VREF_CA_TAP1_SHIFT 24
-#define OMAP4_LPDDR22_VREF_CA_TAP1_MASK (1 << 24)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP0_SHIFT 23
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP0_MASK (1 << 23)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP1_SHIFT 22
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP1_MASK (1 << 22)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP0_SHIFT 21
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP0_MASK (1 << 21)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP1_SHIFT 20
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP1_MASK (1 << 20)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP0_SHIFT 19
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP0_MASK (1 << 19)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP1_SHIFT 18
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP1_MASK (1 << 18)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP0_SHIFT 17
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP0_MASK (1 << 17)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP1_SHIFT 16
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP1_MASK (1 << 16)
-#define OMAP4_LPDDR22_VREF_DQ_CCAP0_SHIFT 15
-#define OMAP4_LPDDR22_VREF_DQ_CCAP0_MASK (1 << 15)
-#define OMAP4_LPDDR22_VREF_DQ_CCAP1_SHIFT 14
-#define OMAP4_LPDDR22_VREF_DQ_CCAP1_MASK (1 << 14)
-#define OMAP4_LPDDR22_VREF_DQ_TAP0_SHIFT 13
-#define OMAP4_LPDDR22_VREF_DQ_TAP0_MASK (1 << 13)
-#define OMAP4_LPDDR22_VREF_DQ_TAP1_SHIFT 12
-#define OMAP4_LPDDR22_VREF_DQ_TAP1_MASK (1 << 12)
-
-/* CONTROL_BUS_HOLD */
-#define OMAP4_ABE_DMIC_DIN3_EN_SHIFT 31
-#define OMAP4_ABE_DMIC_DIN3_EN_MASK (1 << 31)
-#define OMAP4_MCSPI1_CS3_EN_SHIFT 30
-#define OMAP4_MCSPI1_CS3_EN_MASK (1 << 30)
-
-/* CONTROL_C2C */
-#define OMAP4_MIRROR_MODE_EN_SHIFT 31
-#define OMAP4_MIRROR_MODE_EN_MASK (1 << 31)
-#define OMAP4_C2C_SPARE_SHIFT 24
-#define OMAP4_C2C_SPARE_MASK (0x7f << 24)
-
-/* CORE_CONTROL_SPARE_RW */
-#define OMAP4_CORE_CONTROL_SPARE_RW_SHIFT 0
-#define OMAP4_CORE_CONTROL_SPARE_RW_MASK (0xffffffff << 0)
-
-/* CORE_CONTROL_SPARE_R */
-#define OMAP4_CORE_CONTROL_SPARE_R_SHIFT 0
-#define OMAP4_CORE_CONTROL_SPARE_R_MASK (0xffffffff << 0)
-
-/* CORE_CONTROL_SPARE_R_C0 */
-#define OMAP4_CORE_CONTROL_SPARE_R_C0_SHIFT 31
-#define OMAP4_CORE_CONTROL_SPARE_R_C0_MASK (1 << 31)
-#define OMAP4_CORE_CONTROL_SPARE_R_C1_SHIFT 30
-#define OMAP4_CORE_CONTROL_SPARE_R_C1_MASK (1 << 30)
-#define OMAP4_CORE_CONTROL_SPARE_R_C2_SHIFT 29
-#define OMAP4_CORE_CONTROL_SPARE_R_C2_MASK (1 << 29)
-#define OMAP4_CORE_CONTROL_SPARE_R_C3_SHIFT 28
-#define OMAP4_CORE_CONTROL_SPARE_R_C3_MASK (1 << 28)
-#define OMAP4_CORE_CONTROL_SPARE_R_C4_SHIFT 27
-#define OMAP4_CORE_CONTROL_SPARE_R_C4_MASK (1 << 27)
-#define OMAP4_CORE_CONTROL_SPARE_R_C5_SHIFT 26
-#define OMAP4_CORE_CONTROL_SPARE_R_C5_MASK (1 << 26)
-#define OMAP4_CORE_CONTROL_SPARE_R_C6_SHIFT 25
-#define OMAP4_CORE_CONTROL_SPARE_R_C6_MASK (1 << 25)
-#define OMAP4_CORE_CONTROL_SPARE_R_C7_SHIFT 24
-#define OMAP4_CORE_CONTROL_SPARE_R_C7_MASK (1 << 24)
-
-/* CONTROL_EFUSE_1 */
-#define OMAP4_AVDAC_TRIM_BYTE3_SHIFT 24
-#define OMAP4_AVDAC_TRIM_BYTE3_MASK (0x7f << 24)
-#define OMAP4_AVDAC_TRIM_BYTE2_SHIFT 16
-#define OMAP4_AVDAC_TRIM_BYTE2_MASK (0xff << 16)
-#define OMAP4_AVDAC_TRIM_BYTE1_SHIFT 8
-#define OMAP4_AVDAC_TRIM_BYTE1_MASK (0xff << 8)
-#define OMAP4_AVDAC_TRIM_BYTE0_SHIFT 0
-#define OMAP4_AVDAC_TRIM_BYTE0_MASK (0xff << 0)
-
-/* CONTROL_EFUSE_2 */
-#define OMAP4_EFUSE_SMART2TEST_P0_SHIFT 31
-#define OMAP4_EFUSE_SMART2TEST_P0_MASK (1 << 31)
-#define OMAP4_EFUSE_SMART2TEST_P1_SHIFT 30
-#define OMAP4_EFUSE_SMART2TEST_P1_MASK (1 << 30)
-#define OMAP4_EFUSE_SMART2TEST_P2_SHIFT 29
-#define OMAP4_EFUSE_SMART2TEST_P2_MASK (1 << 29)
-#define OMAP4_EFUSE_SMART2TEST_P3_SHIFT 28
-#define OMAP4_EFUSE_SMART2TEST_P3_MASK (1 << 28)
-#define OMAP4_EFUSE_SMART2TEST_N0_SHIFT 27
-#define OMAP4_EFUSE_SMART2TEST_N0_MASK (1 << 27)
-#define OMAP4_EFUSE_SMART2TEST_N1_SHIFT 26
-#define OMAP4_EFUSE_SMART2TEST_N1_MASK (1 << 26)
-#define OMAP4_EFUSE_SMART2TEST_N2_SHIFT 25
-#define OMAP4_EFUSE_SMART2TEST_N2_MASK (1 << 25)
-#define OMAP4_EFUSE_SMART2TEST_N3_SHIFT 24
-#define OMAP4_EFUSE_SMART2TEST_N3_MASK (1 << 24)
-#define OMAP4_LPDDR2_PTV_N1_SHIFT 23
-#define OMAP4_LPDDR2_PTV_N1_MASK (1 << 23)
-#define OMAP4_LPDDR2_PTV_N2_SHIFT 22
-#define OMAP4_LPDDR2_PTV_N2_MASK (1 << 22)
-#define OMAP4_LPDDR2_PTV_N3_SHIFT 21
-#define OMAP4_LPDDR2_PTV_N3_MASK (1 << 21)
-#define OMAP4_LPDDR2_PTV_N4_SHIFT 20
-#define OMAP4_LPDDR2_PTV_N4_MASK (1 << 20)
-#define OMAP4_LPDDR2_PTV_N5_SHIFT 19
-#define OMAP4_LPDDR2_PTV_N5_MASK (1 << 19)
-#define OMAP4_LPDDR2_PTV_P1_SHIFT 18
-#define OMAP4_LPDDR2_PTV_P1_MASK (1 << 18)
-#define OMAP4_LPDDR2_PTV_P2_SHIFT 17
-#define OMAP4_LPDDR2_PTV_P2_MASK (1 << 17)
-#define OMAP4_LPDDR2_PTV_P3_SHIFT 16
-#define OMAP4_LPDDR2_PTV_P3_MASK (1 << 16)
-#define OMAP4_LPDDR2_PTV_P4_SHIFT 15
-#define OMAP4_LPDDR2_PTV_P4_MASK (1 << 15)
-#define OMAP4_LPDDR2_PTV_P5_SHIFT 14
-#define OMAP4_LPDDR2_PTV_P5_MASK (1 << 14)
-
-/* CONTROL_EFUSE_3 */
-#define OMAP4_STD_FUSE_SPARE_1_SHIFT 24
-#define OMAP4_STD_FUSE_SPARE_1_MASK (0xff << 24)
-#define OMAP4_STD_FUSE_SPARE_2_SHIFT 16
-#define OMAP4_STD_FUSE_SPARE_2_MASK (0xff << 16)
-#define OMAP4_STD_FUSE_SPARE_3_SHIFT 8
-#define OMAP4_STD_FUSE_SPARE_3_MASK (0xff << 8)
-#define OMAP4_STD_FUSE_SPARE_4_SHIFT 0
-#define OMAP4_STD_FUSE_SPARE_4_MASK (0xff << 0)
-
-/* CONTROL_EFUSE_4 */
-#define OMAP4_STD_FUSE_SPARE_5_SHIFT 24
-#define OMAP4_STD_FUSE_SPARE_5_MASK (0xff << 24)
-#define OMAP4_STD_FUSE_SPARE_6_SHIFT 16
-#define OMAP4_STD_FUSE_SPARE_6_MASK (0xff << 16)
-#define OMAP4_STD_FUSE_SPARE_7_SHIFT 8
-#define OMAP4_STD_FUSE_SPARE_7_MASK (0xff << 8)
-#define OMAP4_STD_FUSE_SPARE_8_SHIFT 0
-#define OMAP4_STD_FUSE_SPARE_8_MASK (0xff << 0)
-
-#endif
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
deleted file mode 100644
index 17c9b37..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
+++ /dev/null
@@ -1,236 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_PAD_WKUP registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson@ti.com)
- * Santosh Shilimkar (santosh.shilimkar@ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_WKUP_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_WKUP_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_PAD_WKUP 0x4a31e000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_PAD_WKUP_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_PAD_WKUP_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_PAD_WKUP_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_PAD_WKUP_PADCONF_WAKEUPEVENT_0 0x007c
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_SMART1NOPMIO_PADCONF_0 0x05a0
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_SMART1NOPMIO_PADCONF_1 0x05a4
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_PADCONF_MODE 0x05a8
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_XTAL_OSCILLATOR 0x05ac
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_USIMIO 0x0600
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_I2C_2 0x0604
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_JTAG 0x0608
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_SYS 0x060c
-#define OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_RW 0x0614
-#define OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_R 0x0618
-#define OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_R_C0 0x061c
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* PADCONF_WAKEUPEVENT_0 */
-#define OMAP4_JTAG_TDO_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_JTAG_TDO_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_JTAG_TDI_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_JTAG_TDI_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_JTAG_TMS_TMSC_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_JTAG_TMS_TMSC_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_JTAG_RTCK_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_JTAG_RTCK_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_JTAG_TCK_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_JTAG_TCK_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_JTAG_NTRST_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_JTAG_NTRST_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_SYS_BOOT7_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_SYS_BOOT7_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_SYS_BOOT6_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_SYS_BOOT6_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_SYS_PWRON_RESET_OUT_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_SYS_PWRON_RESET_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_SYS_PWR_REQ_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_SYS_PWR_REQ_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_SYS_NRESWARM_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_SYS_NRESWARM_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_SYS_32K_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_SYS_32K_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_FREF_CLK4_OUT_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_FREF_CLK4_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_FREF_CLK4_REQ_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_FREF_CLK4_REQ_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_FREF_CLK3_OUT_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_FREF_CLK3_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_FREF_CLK3_REQ_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_FREF_CLK3_REQ_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_FREF_CLK0_OUT_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_FREF_CLK0_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_FREF_CLK_IOREQ_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_FREF_CLK_IOREQ_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_SR_SDA_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_SR_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_SR_SCL_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_SR_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_SIM_PWRCTRL_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_SIM_PWRCTRL_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_SIM_CD_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_SIM_CD_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_SIM_RESET_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_SIM_RESET_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_SIM_CLK_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_SIM_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_SIM_IO_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_SIM_IO_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* CONTROL_SMART1NOPMIO_PADCONF_0 */
-#define OMAP4_FREF_DR0_SC_SHIFT 30
-#define OMAP4_FREF_DR0_SC_MASK (0x3 << 30)
-#define OMAP4_FREF_DR1_SC_SHIFT 28
-#define OMAP4_FREF_DR1_SC_MASK (0x3 << 28)
-#define OMAP4_FREF_DR4_SC_SHIFT 26
-#define OMAP4_FREF_DR4_SC_MASK (0x3 << 26)
-#define OMAP4_FREF_DR5_SC_SHIFT 24
-#define OMAP4_FREF_DR5_SC_MASK (0x3 << 24)
-#define OMAP4_FREF_DR6_SC_SHIFT 22
-#define OMAP4_FREF_DR6_SC_MASK (0x3 << 22)
-#define OMAP4_FREF_DR7_SC_SHIFT 20
-#define OMAP4_FREF_DR7_SC_MASK (0x3 << 20)
-#define OMAP4_GPIO_DR7_SC_SHIFT 18
-#define OMAP4_GPIO_DR7_SC_MASK (0x3 << 18)
-#define OMAP4_DPM_DR0_SC_SHIFT 14
-#define OMAP4_DPM_DR0_SC_MASK (0x3 << 14)
-#define OMAP4_SIM_DR0_SC_SHIFT 12
-#define OMAP4_SIM_DR0_SC_MASK (0x3 << 12)
-
-/* CONTROL_SMART1NOPMIO_PADCONF_1 */
-#define OMAP4_FREF_DR0_LB_SHIFT 30
-#define OMAP4_FREF_DR0_LB_MASK (0x3 << 30)
-#define OMAP4_FREF_DR1_LB_SHIFT 28
-#define OMAP4_FREF_DR1_LB_MASK (0x3 << 28)
-#define OMAP4_FREF_DR4_LB_SHIFT 26
-#define OMAP4_FREF_DR4_LB_MASK (0x3 << 26)
-#define OMAP4_FREF_DR5_LB_SHIFT 24
-#define OMAP4_FREF_DR5_LB_MASK (0x3 << 24)
-#define OMAP4_FREF_DR6_LB_SHIFT 22
-#define OMAP4_FREF_DR6_LB_MASK (0x3 << 22)
-#define OMAP4_FREF_DR7_LB_SHIFT 20
-#define OMAP4_FREF_DR7_LB_MASK (0x3 << 20)
-#define OMAP4_GPIO_DR7_LB_SHIFT 18
-#define OMAP4_GPIO_DR7_LB_MASK (0x3 << 18)
-#define OMAP4_DPM_DR0_LB_SHIFT 14
-#define OMAP4_DPM_DR0_LB_MASK (0x3 << 14)
-#define OMAP4_SIM_DR0_LB_SHIFT 12
-#define OMAP4_SIM_DR0_LB_MASK (0x3 << 12)
-
-/* CONTROL_PADCONF_MODE */
-#define OMAP4_VDDS_DV_FREF_SHIFT 31
-#define OMAP4_VDDS_DV_FREF_MASK (1 << 31)
-#define OMAP4_VDDS_DV_BANK2_SHIFT 30
-#define OMAP4_VDDS_DV_BANK2_MASK (1 << 30)
-
-/* CONTROL_XTAL_OSCILLATOR */
-#define OMAP4_OSCILLATOR_BOOST_SHIFT 31
-#define OMAP4_OSCILLATOR_BOOST_MASK (1 << 31)
-#define OMAP4_OSCILLATOR_OS_OUT_SHIFT 30
-#define OMAP4_OSCILLATOR_OS_OUT_MASK (1 << 30)
-
-/* CONTROL_USIMIO */
-#define OMAP4_PAD_USIM_CLK_LOW_SHIFT 31
-#define OMAP4_PAD_USIM_CLK_LOW_MASK (1 << 31)
-#define OMAP4_PAD_USIM_RST_LOW_SHIFT 29
-#define OMAP4_PAD_USIM_RST_LOW_MASK (1 << 29)
-#define OMAP4_USIM_PWRDNZ_SHIFT 28
-#define OMAP4_USIM_PWRDNZ_MASK (1 << 28)
-
-/* CONTROL_I2C_2 */
-#define OMAP4_SR_SDA_GLFENB_SHIFT 31
-#define OMAP4_SR_SDA_GLFENB_MASK (1 << 31)
-#define OMAP4_SR_SDA_LOAD_BITS_SHIFT 29
-#define OMAP4_SR_SDA_LOAD_BITS_MASK (0x3 << 29)
-#define OMAP4_SR_SDA_PULLUPRESX_SHIFT 28
-#define OMAP4_SR_SDA_PULLUPRESX_MASK (1 << 28)
-#define OMAP4_SR_SCL_GLFENB_SHIFT 27
-#define OMAP4_SR_SCL_GLFENB_MASK (1 << 27)
-#define OMAP4_SR_SCL_LOAD_BITS_SHIFT 25
-#define OMAP4_SR_SCL_LOAD_BITS_MASK (0x3 << 25)
-#define OMAP4_SR_SCL_PULLUPRESX_SHIFT 24
-#define OMAP4_SR_SCL_PULLUPRESX_MASK (1 << 24)
-
-/* CONTROL_JTAG */
-#define OMAP4_JTAG_NTRST_EN_SHIFT 31
-#define OMAP4_JTAG_NTRST_EN_MASK (1 << 31)
-#define OMAP4_JTAG_TCK_EN_SHIFT 30
-#define OMAP4_JTAG_TCK_EN_MASK (1 << 30)
-#define OMAP4_JTAG_RTCK_EN_SHIFT 29
-#define OMAP4_JTAG_RTCK_EN_MASK (1 << 29)
-#define OMAP4_JTAG_TDI_EN_SHIFT 28
-#define OMAP4_JTAG_TDI_EN_MASK (1 << 28)
-#define OMAP4_JTAG_TDO_EN_SHIFT 27
-#define OMAP4_JTAG_TDO_EN_MASK (1 << 27)
-
-/* CONTROL_SYS */
-#define OMAP4_SYS_NRESWARM_PIPU_SHIFT 31
-#define OMAP4_SYS_NRESWARM_PIPU_MASK (1 << 31)
-
-/* WKUP_CONTROL_SPARE_RW */
-#define OMAP4_WKUP_CONTROL_SPARE_RW_SHIFT 0
-#define OMAP4_WKUP_CONTROL_SPARE_RW_MASK (0xffffffff << 0)
-
-/* WKUP_CONTROL_SPARE_R */
-#define OMAP4_WKUP_CONTROL_SPARE_R_SHIFT 0
-#define OMAP4_WKUP_CONTROL_SPARE_R_MASK (0xffffffff << 0)
-
-/* WKUP_CONTROL_SPARE_R_C0 */
-#define OMAP4_WKUP_CONTROL_SPARE_R_C0_SHIFT 31
-#define OMAP4_WKUP_CONTROL_SPARE_R_C0_MASK (1 << 31)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C1_SHIFT 30
-#define OMAP4_WKUP_CONTROL_SPARE_R_C1_MASK (1 << 30)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C2_SHIFT 29
-#define OMAP4_WKUP_CONTROL_SPARE_R_C2_MASK (1 << 29)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C3_SHIFT 28
-#define OMAP4_WKUP_CONTROL_SPARE_R_C3_MASK (1 << 28)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C4_SHIFT 27
-#define OMAP4_WKUP_CONTROL_SPARE_R_C4_MASK (1 << 27)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C5_SHIFT 26
-#define OMAP4_WKUP_CONTROL_SPARE_R_C5_MASK (1 << 26)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C6_SHIFT 25
-#define OMAP4_WKUP_CONTROL_SPARE_R_C6_MASK (1 << 25)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C7_SHIFT 24
-#define OMAP4_WKUP_CONTROL_SPARE_R_C7_MASK (1 << 24)
-
-#endif
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
deleted file mode 100644
index a0af9ba..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_WKUP registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson@ti.com)
- * Santosh Shilimkar (santosh.shilimkar@ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_WKUP_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_WKUP_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_WKUP 0x4a30c000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_WKUP_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_WKUP_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_WKUP_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_0 0x0460
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_1 0x0464
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_2 0x0468
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_3 0x046c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_4 0x0470
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_5 0x0474
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_6 0x0478
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_7 0x047c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_8 0x0480
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_9 0x0484
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_10 0x0488
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_11 0x048c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_12 0x0490
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_13 0x0494
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_14 0x0498
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_15 0x049c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_16 0x04a0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_17 0x04a4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_18 0x04a8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_19 0x04ac
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_20 0x04b0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_21 0x04b4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_22 0x04b8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_23 0x04bc
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_24 0x04c0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_25 0x04c4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_26 0x04c8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_27 0x04cc
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_28 0x04d0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_29 0x04d4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_30 0x04d8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_31 0x04dc
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* CONF_DEBUG_SEL_TST_0 */
-#define OMAP4_WKUP_MODE_SHIFT 0
-#define OMAP4_WKUP_MODE_MASK (1 << 0)
-
-#endif
-- 1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH v2 01/11] ARM: OMAP4: Remove un-used control module headers and defines.
@ 2012-06-18 11:32 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
Most of the OMAP4 control module register defines are not used and
can be removed. Keep only needed defines and move them to common
control module header just like other OMAP versions.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/control.h | 45 +-
.../include/mach/ctrl_module_core_44xx.h | 391 ------
.../include/mach/ctrl_module_pad_core_44xx.h | 1409 --------------------
.../include/mach/ctrl_module_pad_wkup_44xx.h | 236 ----
.../include/mach/ctrl_module_wkup_44xx.h | 92 --
5 files changed, 40 insertions(+), 2133 deletions(-)
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
delete mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index a406fd0..dad2903 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -16,11 +16,6 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H
#define __ARCH_ARM_MACH_OMAP2_CONTROL_H
-#include <mach/ctrl_module_core_44xx.h>
-#include <mach/ctrl_module_wkup_44xx.h>
-#include <mach/ctrl_module_pad_core_44xx.h>
-#include <mach/ctrl_module_pad_wkup_44xx.h>
-
#ifndef __ASSEMBLY__
#define OMAP242X_CTRL_REGADDR(reg) \
OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
@@ -183,6 +178,43 @@
#define OMAP3630_CONTROL_FUSE_OPP50_VDD2 (OMAP2_CONTROL_GENERAL + 0x0128)
#define OMAP3630_CONTROL_FUSE_OPP100_VDD2 (OMAP2_CONTROL_GENERAL + 0x012C)
+/* OMAP4 IDCODE CONTROL */
+#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1 0x0218
+#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4
+
+/* CONTROL_I2C_1 */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1 0x0624
+#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK (1 << 28)
+#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK (1 << 24)
+
+/* DSI CONTROL_DSIPHY */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY 0x0618
+#define OMAP4_DSI2_LANEENABLE_SHIFT 29
+#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29)
+#define OMAP4_DSI1_LANEENABLE_SHIFT 24
+#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24)
+#define OMAP4_DSI1_PIPD_SHIFT 19
+#define OMAP4_DSI1_PIPD_MASK (0x1f << 19)
+#define OMAP4_DSI2_PIPD_SHIFT 14
+#define OMAP4_DSI2_PIPD_MASK (0x1f << 14)
+
+/* CONTROL_PBIASLITE */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PBIASLITE 0x0600
+#define OMAP4_MMC1_PWRDNZ_MASK (1 << 26)
+#define OMAP4_MMC1_PBIASLITE_VMODE_MASK (1 << 21)
+#define OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK (1 << 22)
+#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK (1 << 23)
+
+/* CONTROL_MMC1 */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC1 0x0628
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_MASK (1 << 31)
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK (1 << 30)
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK (1 << 29)
+#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK (1 << 28)
+#define OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK (1 << 27)
+#define OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK (1 << 26)
+#define OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK (1 << 25)
+
/* OMAP44xx control efuse offsets */
#define OMAP44XX_CONTROL_FUSE_IVA_OPP50 0x22C
#define OMAP44XX_CONTROL_FUSE_IVA_OPP100 0x22F
@@ -195,6 +227,9 @@
#define OMAP44XX_CONTROL_FUSE_CORE_OPP50 0x254
#define OMAP44XX_CONTROL_FUSE_CORE_OPP100 0x257
+/* OMAP44xx control McBSP padconf */
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
+
/* AM35XX only CONTROL_GENERAL register offsets */
#define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
#define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
deleted file mode 100644
index 2f7ac70..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
+++ /dev/null
@@ -1,391 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_CORE registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson at ti.com)
- * Santosh Shilimkar (santosh.shilimkar at ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap at vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_CORE_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_CORE_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_CORE 0x4a002000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_CORE_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_CORE_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_CORE_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_0 0x0200
-#define OMAP4_CTRL_MODULE_CORE_ID_CODE 0x0204
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_1 0x0208
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_2 0x020c
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_DIE_ID_3 0x0210
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_0 0x0214
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1 0x0218
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_USB_CONF 0x021c
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_VDD_WKUP 0x0228
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_BGAP 0x0260
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_0 0x0264
-#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268
-#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4
-#define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300
-#define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314
-#define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318
-#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320
-#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_MPU_VOLTAGE_CTRL 0x0324
-#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_CORE_VOLTAGE_CTRL 0x0328
-#define OMAP4_CTRL_MODULE_CORE_TEMP_SENSOR 0x032c
-#define OMAP4_CTRL_MODULE_CORE_DPLL_NWELL_TRIM_0 0x0330
-#define OMAP4_CTRL_MODULE_CORE_DPLL_NWELL_TRIM_1 0x0334
-#define OMAP4_CTRL_MODULE_CORE_USBOTGHS_CONTROL 0x033c
-#define OMAP4_CTRL_MODULE_CORE_DSS_CONTROL 0x0340
-#define OMAP4_CTRL_MODULE_CORE_HWOBS_CONTROL 0x0350
-#define OMAP4_CTRL_MODULE_CORE_DEBOBS_FINAL_MUX_SEL 0x0400
-#define OMAP4_CTRL_MODULE_CORE_DEBOBS_MMR_MPU 0x0408
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL0 0x042c
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL1 0x0430
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL2 0x0434
-#define OMAP4_CTRL_MODULE_CORE_CONF_SDMA_REQ_SEL3 0x0438
-#define OMAP4_CTRL_MODULE_CORE_CONF_CLK_SEL0 0x0440
-#define OMAP4_CTRL_MODULE_CORE_CONF_CLK_SEL1 0x0444
-#define OMAP4_CTRL_MODULE_CORE_CONF_CLK_SEL2 0x0448
-#define OMAP4_CTRL_MODULE_CORE_CONF_DPLL_FREQLOCK_SEL 0x044c
-#define OMAP4_CTRL_MODULE_CORE_CONF_DPLL_TINITZ_SEL 0x0450
-#define OMAP4_CTRL_MODULE_CORE_CONF_DPLL_PHASELOCK_SEL 0x0454
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_0 0x0480
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_1 0x0484
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_2 0x0488
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_3 0x048c
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_4 0x0490
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_5 0x0494
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_6 0x0498
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_7 0x049c
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_8 0x04a0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_9 0x04a4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_10 0x04a8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_11 0x04ac
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_12 0x04b0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_13 0x04b4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_14 0x04b8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_15 0x04bc
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_16 0x04c0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_17 0x04c4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_18 0x04c8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_19 0x04cc
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_20 0x04d0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_21 0x04d4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_22 0x04d8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_23 0x04dc
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_24 0x04e0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_25 0x04e4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_26 0x04e8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_27 0x04ec
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_28 0x04f0
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_29 0x04f4
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_30 0x04f8
-#define OMAP4_CTRL_MODULE_CORE_CONF_DEBUG_SEL_TST_31 0x04fc
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* STD_FUSE_DIE_ID_0 */
-#define OMAP4_STD_FUSE_DIE_ID_0_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_0_MASK (0xffffffff << 0)
-
-/* ID_CODE */
-#define OMAP4_STD_FUSE_IDCODE_SHIFT 0
-#define OMAP4_STD_FUSE_IDCODE_MASK (0xffffffff << 0)
-
-/* STD_FUSE_DIE_ID_1 */
-#define OMAP4_STD_FUSE_DIE_ID_1_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_1_MASK (0xffffffff << 0)
-
-/* STD_FUSE_DIE_ID_2 */
-#define OMAP4_STD_FUSE_DIE_ID_2_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_2_MASK (0xffffffff << 0)
-
-/* STD_FUSE_DIE_ID_3 */
-#define OMAP4_STD_FUSE_DIE_ID_3_SHIFT 0
-#define OMAP4_STD_FUSE_DIE_ID_3_MASK (0xffffffff << 0)
-
-/* STD_FUSE_PROD_ID_0 */
-#define OMAP4_STD_FUSE_PROD_ID_0_SHIFT 0
-#define OMAP4_STD_FUSE_PROD_ID_0_MASK (0xffffffff << 0)
-
-/* STD_FUSE_PROD_ID_1 */
-#define OMAP4_STD_FUSE_PROD_ID_1_SHIFT 0
-#define OMAP4_STD_FUSE_PROD_ID_1_MASK (0xffffffff << 0)
-
-/* STD_FUSE_USB_CONF */
-#define OMAP4_USB_PROD_ID_SHIFT 16
-#define OMAP4_USB_PROD_ID_MASK (0xffff << 16)
-#define OMAP4_USB_VENDOR_ID_SHIFT 0
-#define OMAP4_USB_VENDOR_ID_MASK (0xffff << 0)
-
-/* STD_FUSE_OPP_VDD_WKUP */
-#define OMAP4_STD_FUSE_OPP_VDD_WKUP_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_VDD_WKUP_MASK (0xffffffff << 0)
-
-/* STD_FUSE_OPP_BGAP */
-#define OMAP4_STD_FUSE_OPP_BGAP_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_BGAP_MASK (0xffffffff << 0)
-
-/* STD_FUSE_OPP_DPLL_0 */
-#define OMAP4_STD_FUSE_OPP_DPLL_0_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_DPLL_0_MASK (0xffffffff << 0)
-
-/* STD_FUSE_OPP_DPLL_1 */
-#define OMAP4_STD_FUSE_OPP_DPLL_1_SHIFT 0
-#define OMAP4_STD_FUSE_OPP_DPLL_1_MASK (0xffffffff << 0)
-
-/* STATUS */
-#define OMAP4_ATTILA_CONF_SHIFT 11
-#define OMAP4_ATTILA_CONF_MASK (0x3 << 11)
-#define OMAP4_DEVICE_TYPE_SHIFT 8
-#define OMAP4_DEVICE_TYPE_MASK (0x7 << 8)
-#define OMAP4_SYS_BOOT_SHIFT 0
-#define OMAP4_SYS_BOOT_MASK (0xff << 0)
-
-/* DEV_CONF */
-#define OMAP4_DEV_CONF_SHIFT 1
-#define OMAP4_DEV_CONF_MASK (0x7fffffff << 1)
-#define OMAP4_USBPHY_PD_SHIFT 0
-#define OMAP4_USBPHY_PD_MASK (1 << 0)
-
-/* LDOVBB_IVA_VOLTAGE_CTRL */
-#define OMAP4_LDOVBBIVA_RBB_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOVBBIVA_RBB_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOVBBIVA_RBB_VSET_IN_SHIFT 21
-#define OMAP4_LDOVBBIVA_RBB_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOVBBIVA_RBB_VSET_OUT_SHIFT 16
-#define OMAP4_LDOVBBIVA_RBB_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOVBBIVA_FBB_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOVBBIVA_FBB_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOVBBIVA_FBB_VSET_IN_SHIFT 5
-#define OMAP4_LDOVBBIVA_FBB_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOVBBIVA_FBB_VSET_OUT_SHIFT 0
-#define OMAP4_LDOVBBIVA_FBB_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOVBB_MPU_VOLTAGE_CTRL */
-#define OMAP4_LDOVBBMPU_RBB_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOVBBMPU_RBB_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOVBBMPU_RBB_VSET_IN_SHIFT 21
-#define OMAP4_LDOVBBMPU_RBB_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOVBBMPU_RBB_VSET_OUT_SHIFT 16
-#define OMAP4_LDOVBBMPU_RBB_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOVBBMPU_FBB_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOVBBMPU_FBB_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOVBBMPU_FBB_VSET_IN_SHIFT 5
-#define OMAP4_LDOVBBMPU_FBB_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOVBBMPU_FBB_VSET_OUT_SHIFT 0
-#define OMAP4_LDOVBBMPU_FBB_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOSRAM_IVA_VOLTAGE_CTRL */
-#define OMAP4_LDOSRAMIVA_RETMODE_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOSRAMIVA_RETMODE_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_IN_SHIFT 21
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_OUT_SHIFT 16
-#define OMAP4_LDOSRAMIVA_RETMODE_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOSRAMIVA_ACTMODE_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOSRAMIVA_ACTMODE_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_IN_SHIFT 5
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_OUT_SHIFT 0
-#define OMAP4_LDOSRAMIVA_ACTMODE_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOSRAM_MPU_VOLTAGE_CTRL */
-#define OMAP4_LDOSRAMMPU_RETMODE_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOSRAMMPU_RETMODE_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_IN_SHIFT 21
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_OUT_SHIFT 16
-#define OMAP4_LDOSRAMMPU_RETMODE_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOSRAMMPU_ACTMODE_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOSRAMMPU_ACTMODE_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_IN_SHIFT 5
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_OUT_SHIFT 0
-#define OMAP4_LDOSRAMMPU_ACTMODE_VSET_OUT_MASK (0x1f << 0)
-
-/* LDOSRAM_CORE_VOLTAGE_CTRL */
-#define OMAP4_LDOSRAMCORE_RETMODE_MUX_CTRL_SHIFT 26
-#define OMAP4_LDOSRAMCORE_RETMODE_MUX_CTRL_MASK (1 << 26)
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_IN_SHIFT 21
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_IN_MASK (0x1f << 21)
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_OUT_SHIFT 16
-#define OMAP4_LDOSRAMCORE_RETMODE_VSET_OUT_MASK (0x1f << 16)
-#define OMAP4_LDOSRAMCORE_ACTMODE_MUX_CTRL_SHIFT 10
-#define OMAP4_LDOSRAMCORE_ACTMODE_MUX_CTRL_MASK (1 << 10)
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_IN_SHIFT 5
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_IN_MASK (0x1f << 5)
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_OUT_SHIFT 0
-#define OMAP4_LDOSRAMCORE_ACTMODE_VSET_OUT_MASK (0x1f << 0)
-
-/* TEMP_SENSOR */
-#define OMAP4_BGAP_TEMPSOFF_SHIFT 12
-#define OMAP4_BGAP_TEMPSOFF_MASK (1 << 12)
-#define OMAP4_BGAP_TSHUT_SHIFT 11
-#define OMAP4_BGAP_TSHUT_MASK (1 << 11)
-#define OMAP4_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10
-#define OMAP4_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10)
-#define OMAP4_BGAP_TEMP_SENSOR_SOC_SHIFT 9
-#define OMAP4_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9)
-#define OMAP4_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8
-#define OMAP4_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8)
-#define OMAP4_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
-#define OMAP4_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0)
-
-/* DPLL_NWELL_TRIM_0 */
-#define OMAP4_DPLL_ABE_NWELL_TRIM_MUX_CTRL_SHIFT 29
-#define OMAP4_DPLL_ABE_NWELL_TRIM_MUX_CTRL_MASK (1 << 29)
-#define OMAP4_DPLL_ABE_NWELL_TRIM_SHIFT 24
-#define OMAP4_DPLL_ABE_NWELL_TRIM_MASK (0x1f << 24)
-#define OMAP4_DPLL_PER_NWELL_TRIM_MUX_CTRL_SHIFT 23
-#define OMAP4_DPLL_PER_NWELL_TRIM_MUX_CTRL_MASK (1 << 23)
-#define OMAP4_DPLL_PER_NWELL_TRIM_SHIFT 18
-#define OMAP4_DPLL_PER_NWELL_TRIM_MASK (0x1f << 18)
-#define OMAP4_DPLL_CORE_NWELL_TRIM_MUX_CTRL_SHIFT 17
-#define OMAP4_DPLL_CORE_NWELL_TRIM_MUX_CTRL_MASK (1 << 17)
-#define OMAP4_DPLL_CORE_NWELL_TRIM_SHIFT 12
-#define OMAP4_DPLL_CORE_NWELL_TRIM_MASK (0x1f << 12)
-#define OMAP4_DPLL_IVA_NWELL_TRIM_MUX_CTRL_SHIFT 11
-#define OMAP4_DPLL_IVA_NWELL_TRIM_MUX_CTRL_MASK (1 << 11)
-#define OMAP4_DPLL_IVA_NWELL_TRIM_SHIFT 6
-#define OMAP4_DPLL_IVA_NWELL_TRIM_MASK (0x1f << 6)
-#define OMAP4_DPLL_MPU_NWELL_TRIM_MUX_CTRL_SHIFT 5
-#define OMAP4_DPLL_MPU_NWELL_TRIM_MUX_CTRL_MASK (1 << 5)
-#define OMAP4_DPLL_MPU_NWELL_TRIM_SHIFT 0
-#define OMAP4_DPLL_MPU_NWELL_TRIM_MASK (0x1f << 0)
-
-/* DPLL_NWELL_TRIM_1 */
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_MUX_CTRL_SHIFT 29
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_MUX_CTRL_MASK (1 << 29)
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_SHIFT 24
-#define OMAP4_DPLL_UNIPRO_NWELL_TRIM_MASK (0x1f << 24)
-#define OMAP4_DPLL_USB_NWELL_TRIM_MUX_CTRL_SHIFT 23
-#define OMAP4_DPLL_USB_NWELL_TRIM_MUX_CTRL_MASK (1 << 23)
-#define OMAP4_DPLL_USB_NWELL_TRIM_SHIFT 18
-#define OMAP4_DPLL_USB_NWELL_TRIM_MASK (0x1f << 18)
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_MUX_CTRL_SHIFT 17
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_MUX_CTRL_MASK (1 << 17)
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_SHIFT 12
-#define OMAP4_DPLL_HDMI_NWELL_TRIM_MASK (0x1f << 12)
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_MUX_CTRL_SHIFT 11
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_MUX_CTRL_MASK (1 << 11)
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_SHIFT 6
-#define OMAP4_DPLL_DSI2_NWELL_TRIM_MASK (0x1f << 6)
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_MUX_CTRL_SHIFT 5
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_MUX_CTRL_MASK (1 << 5)
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_SHIFT 0
-#define OMAP4_DPLL_DSI1_NWELL_TRIM_MASK (0x1f << 0)
-
-/* USBOTGHS_CONTROL */
-#define OMAP4_DISCHRGVBUS_SHIFT 8
-#define OMAP4_DISCHRGVBUS_MASK (1 << 8)
-#define OMAP4_CHRGVBUS_SHIFT 7
-#define OMAP4_CHRGVBUS_MASK (1 << 7)
-#define OMAP4_DRVVBUS_SHIFT 6
-#define OMAP4_DRVVBUS_MASK (1 << 6)
-#define OMAP4_IDPULLUP_SHIFT 5
-#define OMAP4_IDPULLUP_MASK (1 << 5)
-#define OMAP4_IDDIG_SHIFT 4
-#define OMAP4_IDDIG_MASK (1 << 4)
-#define OMAP4_SESSEND_SHIFT 3
-#define OMAP4_SESSEND_MASK (1 << 3)
-#define OMAP4_VBUSVALID_SHIFT 2
-#define OMAP4_VBUSVALID_MASK (1 << 2)
-#define OMAP4_BVALID_SHIFT 1
-#define OMAP4_BVALID_MASK (1 << 1)
-#define OMAP4_AVALID_SHIFT 0
-#define OMAP4_AVALID_MASK (1 << 0)
-
-/* DSS_CONTROL */
-#define OMAP4_DSS_MUX6_SELECT_SHIFT 0
-#define OMAP4_DSS_MUX6_SELECT_MASK (1 << 0)
-
-/* HWOBS_CONTROL */
-#define OMAP4_HWOBS_CLKDIV_SEL_SHIFT 3
-#define OMAP4_HWOBS_CLKDIV_SEL_MASK (0x1f << 3)
-#define OMAP4_HWOBS_ALL_ZERO_MODE_SHIFT 2
-#define OMAP4_HWOBS_ALL_ZERO_MODE_MASK (1 << 2)
-#define OMAP4_HWOBS_ALL_ONE_MODE_SHIFT 1
-#define OMAP4_HWOBS_ALL_ONE_MODE_MASK (1 << 1)
-#define OMAP4_HWOBS_MACRO_ENABLE_SHIFT 0
-#define OMAP4_HWOBS_MACRO_ENABLE_MASK (1 << 0)
-
-/* DEBOBS_FINAL_MUX_SEL */
-#define OMAP4_SELECT_SHIFT 0
-#define OMAP4_SELECT_MASK (0xffffffff << 0)
-
-/* DEBOBS_MMR_MPU */
-#define OMAP4_SELECT_DEBOBS_MMR_MPU_SHIFT 0
-#define OMAP4_SELECT_DEBOBS_MMR_MPU_MASK (0xf << 0)
-
-/* CONF_SDMA_REQ_SEL0 */
-#define OMAP4_MULT_SHIFT 0
-#define OMAP4_MULT_MASK (0x7f << 0)
-
-/* CONF_CLK_SEL0 */
-#define OMAP4_MULT_CONF_CLK_SEL0_SHIFT 0
-#define OMAP4_MULT_CONF_CLK_SEL0_MASK (0x7 << 0)
-
-/* CONF_CLK_SEL1 */
-#define OMAP4_MULT_CONF_CLK_SEL1_SHIFT 0
-#define OMAP4_MULT_CONF_CLK_SEL1_MASK (0x7 << 0)
-
-/* CONF_CLK_SEL2 */
-#define OMAP4_MULT_CONF_CLK_SEL2_SHIFT 0
-#define OMAP4_MULT_CONF_CLK_SEL2_MASK (0x7 << 0)
-
-/* CONF_DPLL_FREQLOCK_SEL */
-#define OMAP4_MULT_CONF_DPLL_FREQLOCK_SEL_SHIFT 0
-#define OMAP4_MULT_CONF_DPLL_FREQLOCK_SEL_MASK (0x7 << 0)
-
-/* CONF_DPLL_TINITZ_SEL */
-#define OMAP4_MULT_CONF_DPLL_TINITZ_SEL_SHIFT 0
-#define OMAP4_MULT_CONF_DPLL_TINITZ_SEL_MASK (0x7 << 0)
-
-/* CONF_DPLL_PHASELOCK_SEL */
-#define OMAP4_MULT_CONF_DPLL_PHASELOCK_SEL_SHIFT 0
-#define OMAP4_MULT_CONF_DPLL_PHASELOCK_SEL_MASK (0x7 << 0)
-
-/* CONF_DEBUG_SEL_TST_0 */
-#define OMAP4_MODE_SHIFT 0
-#define OMAP4_MODE_MASK (0xf << 0)
-
-#endif
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
deleted file mode 100644
index c88420d..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
+++ /dev/null
@@ -1,1409 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_PAD_CORE registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson at ti.com)
- * Santosh Shilimkar (santosh.shilimkar at ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap at vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_CORE_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_CORE_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_PAD_CORE 0x4a100000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_PAD_CORE_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_PAD_CORE_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_PAD_CORE_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_0 0x01d8
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_1 0x01dc
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_2 0x01e0
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_3 0x01e4
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_4 0x01e8
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_5 0x01ec
-#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_6 0x01f0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PADCONF_GLOBAL 0x05a0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PADCONF_MODE 0x05a4
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART1IO_PADCONF_0 0x05a8
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART1IO_PADCONF_1 0x05ac
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_0 0x05b0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_1 0x05b4
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_0 0x05b8
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_1 0x05bc
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_2 0x05c0
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USBB_HSIC 0x05c4
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SLIMBUS 0x05c8
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PBIASLITE 0x0600
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_0 0x0604
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_CAMERA_RX 0x0608
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_AVDAC 0x060c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HDMI_TX_PHY 0x0610
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC2 0x0614
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY 0x0618
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USB2PHYCORE 0x0620
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1 0x0624
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC1 0x0628
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HSI 0x062c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USB 0x0630
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HDQ 0x0634
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_0 0x0638
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_1 0x063c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_2 0x0640
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_3 0x0644
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_0 0x0648
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_1 0x064c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_2 0x0650
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_3 0x0654
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_BUS_HOLD 0x0658
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_C2C 0x065c
-#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_RW 0x0660
-#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_R 0x0664
-#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_R_C0 0x0668
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_1 0x0700
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_2 0x0704
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_3 0x0708
-#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_4 0x070c
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* PADCONF_WAKEUPEVENT_0 */
-#define OMAP4_GPMC_CLK_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_GPMC_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_GPMC_NWP_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_GPMC_NWP_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_GPMC_NCS3_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_GPMC_NCS3_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_GPMC_NCS2_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_GPMC_NCS2_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_GPMC_NCS1_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_GPMC_NCS1_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_GPMC_NCS0_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_GPMC_NCS0_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_GPMC_A25_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_GPMC_A25_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_GPMC_A24_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_GPMC_A24_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_GPMC_A23_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_GPMC_A23_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_GPMC_A22_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_GPMC_A22_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_GPMC_A21_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_GPMC_A21_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_GPMC_A20_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_GPMC_A20_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_GPMC_A19_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_GPMC_A19_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_GPMC_A18_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_GPMC_A18_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_GPMC_A17_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_GPMC_A17_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_GPMC_A16_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_GPMC_A16_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_GPMC_AD15_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_GPMC_AD15_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_GPMC_AD14_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_GPMC_AD14_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_GPMC_AD13_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_GPMC_AD13_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_GPMC_AD12_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_GPMC_AD12_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_GPMC_AD11_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_GPMC_AD11_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_GPMC_AD10_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_GPMC_AD10_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_GPMC_AD9_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_GPMC_AD9_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_GPMC_AD8_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_GPMC_AD8_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_GPMC_AD7_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_GPMC_AD7_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_GPMC_AD6_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_GPMC_AD6_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_GPMC_AD5_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_GPMC_AD5_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_GPMC_AD4_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_GPMC_AD4_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_GPMC_AD3_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_GPMC_AD3_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_GPMC_AD2_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_GPMC_AD2_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_GPMC_AD1_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_GPMC_AD1_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_GPMC_AD0_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_GPMC_AD0_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_1 */
-#define OMAP4_CAM_STROBE_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_CAM_STROBE_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_CAM_SHUTTER_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_CAM_SHUTTER_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_CSI22_DY1_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_CSI22_DY1_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_CSI22_DX1_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_CSI22_DX1_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_CSI22_DY0_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_CSI22_DY0_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_CSI22_DX0_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_CSI22_DX0_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_CSI21_DY4_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_CSI21_DY4_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_CSI21_DX4_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_CSI21_DX4_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_CSI21_DY3_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_CSI21_DY3_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_CSI21_DX3_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_CSI21_DX3_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_CSI21_DY2_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_CSI21_DY2_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_CSI21_DX2_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_CSI21_DX2_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_CSI21_DY1_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_CSI21_DY1_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_CSI21_DX1_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_CSI21_DX1_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_CSI21_DY0_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_CSI21_DY0_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_CSI21_DX0_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_CSI21_DX0_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_HDMI_DDC_SDA_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_HDMI_DDC_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_HDMI_DDC_SCL_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_HDMI_DDC_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_HDMI_CEC_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_HDMI_CEC_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_HDMI_HPD_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_HDMI_HPD_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_C2C_DATA15_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_C2C_DATA15_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_C2C_DATA14_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_C2C_DATA14_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_C2C_DATA13_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_C2C_DATA13_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_C2C_DATA12_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_C2C_DATA12_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_C2C_DATA11_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_C2C_DATA11_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_GPMC_WAIT1_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_GPMC_WAIT1_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_GPMC_WAIT0_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_GPMC_WAIT0_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_GPMC_NBE1_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_GPMC_NBE1_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_GPMC_NBE0_CLE_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_GPMC_NBE0_CLE_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_GPMC_NWE_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_GPMC_NWE_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_GPMC_NOE_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_GPMC_NOE_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_GPMC_NADV_ALE_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_GPMC_NADV_ALE_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_2 */
-#define OMAP4_ABE_MCBSP1_CLKX_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_ABE_MCBSP1_CLKX_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_ABE_MCBSP2_FSX_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_ABE_MCBSP2_FSX_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_ABE_MCBSP2_DX_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_ABE_MCBSP2_DX_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_ABE_MCBSP2_DR_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_ABE_MCBSP2_DR_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_ABE_MCBSP2_CLKX_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_ABE_MCBSP2_CLKX_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_SDMMC1_DAT7_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_SDMMC1_DAT7_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_SDMMC1_DAT6_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_SDMMC1_DAT6_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_SDMMC1_DAT5_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_SDMMC1_DAT5_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_SDMMC1_DAT4_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_SDMMC1_DAT4_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_SDMMC1_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_SDMMC1_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_SDMMC1_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_SDMMC1_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_SDMMC1_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_SDMMC1_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_SDMMC1_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_SDMMC1_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_SDMMC1_CMD_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_SDMMC1_CMD_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_SDMMC1_CLK_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_SDMMC1_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_USBC1_ICUSB_DM_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_USBC1_ICUSB_DM_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_USBC1_ICUSB_DP_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_USBC1_ICUSB_DP_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_USBB1_HSIC_STROBE_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_USBB1_HSIC_STROBE_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_USBB1_HSIC_DATA_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_USBB1_HSIC_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_USBB1_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_USBB1_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_USBB1_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_USBB1_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_USBB1_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_USBB1_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_USBB1_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_USBB1_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_USBB1_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_USBB1_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_USBB1_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_USBB1_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_USBB1_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_USBB1_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_USBB1_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_USBB1_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_USBB1_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_USBB1_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_USBB1_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_USBB1_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_USBB1_ULPITLL_STP_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_USBB1_ULPITLL_STP_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_USBB1_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_USBB1_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_CAM_GLOBALRESET_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_CAM_GLOBALRESET_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_3 */
-#define OMAP4_MCSPI1_CS3_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_MCSPI1_CS3_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_MCSPI1_CS2_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_MCSPI1_CS2_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_MCSPI1_CS1_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_MCSPI1_CS1_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_MCSPI1_CS0_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_MCSPI1_CS0_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_MCSPI1_SIMO_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_MCSPI1_SIMO_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_MCSPI1_SOMI_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_MCSPI1_SOMI_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_MCSPI1_CLK_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_MCSPI1_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_I2C4_SDA_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_I2C4_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_I2C4_SCL_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_I2C4_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_I2C3_SDA_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_I2C3_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_I2C3_SCL_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_I2C3_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_I2C2_SDA_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_I2C2_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_I2C2_SCL_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_I2C2_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_I2C1_SDA_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_I2C1_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_I2C1_SCL_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_I2C1_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_HDQ_SIO_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_HDQ_SIO_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_UART2_TX_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_UART2_TX_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_UART2_RX_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_UART2_RX_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_UART2_RTS_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_UART2_RTS_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_UART2_CTS_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_UART2_CTS_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_ABE_DMIC_DIN3_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_ABE_DMIC_DIN3_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_ABE_DMIC_DIN2_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_ABE_DMIC_DIN2_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_ABE_DMIC_DIN1_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_ABE_DMIC_DIN1_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_ABE_DMIC_CLK1_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_ABE_DMIC_CLK1_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_ABE_CLKS_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_ABE_CLKS_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_ABE_PDM_LB_CLK_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_ABE_PDM_LB_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_ABE_PDM_FRAME_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_ABE_PDM_FRAME_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_ABE_PDM_DL_DATA_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_ABE_PDM_DL_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_ABE_PDM_UL_DATA_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_ABE_PDM_UL_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_ABE_MCBSP1_FSX_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_ABE_MCBSP1_FSX_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_ABE_MCBSP1_DX_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_ABE_MCBSP1_DX_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_ABE_MCBSP1_DR_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_ABE_MCBSP1_DR_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_4 */
-#define OMAP4_UNIPRO_TY0_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_UNIPRO_TY0_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_UNIPRO_TX0_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_UNIPRO_TX0_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_USBB2_HSIC_STROBE_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_USBB2_HSIC_STROBE_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_USBB2_HSIC_DATA_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_USBB2_HSIC_DATA_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_USBB2_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_USBB2_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_USBB2_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_USBB2_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_USBB2_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_USBB2_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_USBB2_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_USBB2_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_USBB2_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_USBB2_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_USBB2_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_USBB2_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_USBB2_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_USBB2_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_USBB2_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_USBB2_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_USBB2_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_USBB2_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_USBB2_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_USBB2_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_USBB2_ULPITLL_STP_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_USBB2_ULPITLL_STP_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_USBB2_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_USBB2_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_UART4_TX_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_UART4_TX_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_UART4_RX_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_UART4_RX_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_MCSPI4_CS0_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_MCSPI4_CS0_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_MCSPI4_SOMI_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_MCSPI4_SOMI_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_MCSPI4_SIMO_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_MCSPI4_SIMO_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_MCSPI4_CLK_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_MCSPI4_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_SDMMC5_DAT3_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_SDMMC5_DAT3_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_SDMMC5_DAT2_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_SDMMC5_DAT2_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_SDMMC5_DAT1_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_SDMMC5_DAT1_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_SDMMC5_DAT0_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_SDMMC5_DAT0_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_SDMMC5_CMD_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_SDMMC5_CMD_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_SDMMC5_CLK_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_SDMMC5_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_UART3_TX_IRTX_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_UART3_TX_IRTX_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_UART3_RX_IRRX_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_UART3_RX_IRRX_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_UART3_RTS_SD_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_UART3_RTS_SD_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_UART3_CTS_RCTX_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_UART3_CTS_RCTX_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_5 */
-#define OMAP4_DPM_EMU11_DUPLICATEWAKEUPEVENT_SHIFT 31
-#define OMAP4_DPM_EMU11_DUPLICATEWAKEUPEVENT_MASK (1 << 31)
-#define OMAP4_DPM_EMU10_DUPLICATEWAKEUPEVENT_SHIFT 30
-#define OMAP4_DPM_EMU10_DUPLICATEWAKEUPEVENT_MASK (1 << 30)
-#define OMAP4_DPM_EMU9_DUPLICATEWAKEUPEVENT_SHIFT 29
-#define OMAP4_DPM_EMU9_DUPLICATEWAKEUPEVENT_MASK (1 << 29)
-#define OMAP4_DPM_EMU8_DUPLICATEWAKEUPEVENT_SHIFT 28
-#define OMAP4_DPM_EMU8_DUPLICATEWAKEUPEVENT_MASK (1 << 28)
-#define OMAP4_DPM_EMU7_DUPLICATEWAKEUPEVENT_SHIFT 27
-#define OMAP4_DPM_EMU7_DUPLICATEWAKEUPEVENT_MASK (1 << 27)
-#define OMAP4_DPM_EMU6_DUPLICATEWAKEUPEVENT_SHIFT 26
-#define OMAP4_DPM_EMU6_DUPLICATEWAKEUPEVENT_MASK (1 << 26)
-#define OMAP4_DPM_EMU5_DUPLICATEWAKEUPEVENT_SHIFT 25
-#define OMAP4_DPM_EMU5_DUPLICATEWAKEUPEVENT_MASK (1 << 25)
-#define OMAP4_DPM_EMU4_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_DPM_EMU4_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_DPM_EMU3_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_DPM_EMU3_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_DPM_EMU2_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_DPM_EMU2_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_DPM_EMU1_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_DPM_EMU1_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_DPM_EMU0_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_DPM_EMU0_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_SYS_BOOT5_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_SYS_BOOT5_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_SYS_BOOT4_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_SYS_BOOT4_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_SYS_BOOT3_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_SYS_BOOT3_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_SYS_BOOT2_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_SYS_BOOT2_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_SYS_BOOT1_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_SYS_BOOT1_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_SYS_BOOT0_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_SYS_BOOT0_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_SYS_NIRQ2_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_SYS_NIRQ2_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_SYS_NIRQ1_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_SYS_NIRQ1_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_FREF_CLK2_OUT_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_FREF_CLK2_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_FREF_CLK1_OUT_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_FREF_CLK1_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_UNIPRO_RY2_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_UNIPRO_RY2_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_UNIPRO_RX2_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_UNIPRO_RX2_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_UNIPRO_RY1_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_UNIPRO_RY1_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_UNIPRO_RX1_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_UNIPRO_RX1_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_UNIPRO_RY0_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_UNIPRO_RY0_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_UNIPRO_RX0_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_UNIPRO_RX0_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_UNIPRO_TY2_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_UNIPRO_TY2_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_UNIPRO_TX2_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_UNIPRO_TX2_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_UNIPRO_TY1_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_UNIPRO_TY1_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_UNIPRO_TX1_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_UNIPRO_TX1_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* PADCONF_WAKEUPEVENT_6 */
-#define OMAP4_DPM_EMU19_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_DPM_EMU19_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_DPM_EMU18_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_DPM_EMU18_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_DPM_EMU17_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_DPM_EMU17_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_DPM_EMU16_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_DPM_EMU16_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_DPM_EMU15_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_DPM_EMU15_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_DPM_EMU14_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_DPM_EMU14_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_DPM_EMU13_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_DPM_EMU13_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_DPM_EMU12_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_DPM_EMU12_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* CONTROL_PADCONF_GLOBAL */
-#define OMAP4_FORCE_OFFMODE_EN_SHIFT 31
-#define OMAP4_FORCE_OFFMODE_EN_MASK (1 << 31)
-
-/* CONTROL_PADCONF_MODE */
-#define OMAP4_VDDS_DV_BANK0_SHIFT 31
-#define OMAP4_VDDS_DV_BANK0_MASK (1 << 31)
-#define OMAP4_VDDS_DV_BANK1_SHIFT 30
-#define OMAP4_VDDS_DV_BANK1_MASK (1 << 30)
-#define OMAP4_VDDS_DV_BANK3_SHIFT 29
-#define OMAP4_VDDS_DV_BANK3_MASK (1 << 29)
-#define OMAP4_VDDS_DV_BANK4_SHIFT 28
-#define OMAP4_VDDS_DV_BANK4_MASK (1 << 28)
-#define OMAP4_VDDS_DV_BANK5_SHIFT 27
-#define OMAP4_VDDS_DV_BANK5_MASK (1 << 27)
-#define OMAP4_VDDS_DV_BANK6_SHIFT 26
-#define OMAP4_VDDS_DV_BANK6_MASK (1 << 26)
-#define OMAP4_VDDS_DV_C2C_SHIFT 25
-#define OMAP4_VDDS_DV_C2C_MASK (1 << 25)
-#define OMAP4_VDDS_DV_CAM_SHIFT 24
-#define OMAP4_VDDS_DV_CAM_MASK (1 << 24)
-#define OMAP4_VDDS_DV_GPMC_SHIFT 23
-#define OMAP4_VDDS_DV_GPMC_MASK (1 << 23)
-#define OMAP4_VDDS_DV_SDMMC2_SHIFT 22
-#define OMAP4_VDDS_DV_SDMMC2_MASK (1 << 22)
-
-/* CONTROL_SMART1IO_PADCONF_0 */
-#define OMAP4_ABE_DR0_SC_SHIFT 30
-#define OMAP4_ABE_DR0_SC_MASK (0x3 << 30)
-#define OMAP4_CAM_DR0_SC_SHIFT 28
-#define OMAP4_CAM_DR0_SC_MASK (0x3 << 28)
-#define OMAP4_FREF_DR2_SC_SHIFT 26
-#define OMAP4_FREF_DR2_SC_MASK (0x3 << 26)
-#define OMAP4_FREF_DR3_SC_SHIFT 24
-#define OMAP4_FREF_DR3_SC_MASK (0x3 << 24)
-#define OMAP4_GPIO_DR8_SC_SHIFT 22
-#define OMAP4_GPIO_DR8_SC_MASK (0x3 << 22)
-#define OMAP4_GPIO_DR9_SC_SHIFT 20
-#define OMAP4_GPIO_DR9_SC_MASK (0x3 << 20)
-#define OMAP4_GPMC_DR2_SC_SHIFT 18
-#define OMAP4_GPMC_DR2_SC_MASK (0x3 << 18)
-#define OMAP4_GPMC_DR3_SC_SHIFT 16
-#define OMAP4_GPMC_DR3_SC_MASK (0x3 << 16)
-#define OMAP4_GPMC_DR6_SC_SHIFT 14
-#define OMAP4_GPMC_DR6_SC_MASK (0x3 << 14)
-#define OMAP4_HDMI_DR0_SC_SHIFT 12
-#define OMAP4_HDMI_DR0_SC_MASK (0x3 << 12)
-#define OMAP4_MCSPI1_DR0_SC_SHIFT 10
-#define OMAP4_MCSPI1_DR0_SC_MASK (0x3 << 10)
-#define OMAP4_UART1_DR0_SC_SHIFT 8
-#define OMAP4_UART1_DR0_SC_MASK (0x3 << 8)
-#define OMAP4_UART3_DR0_SC_SHIFT 6
-#define OMAP4_UART3_DR0_SC_MASK (0x3 << 6)
-#define OMAP4_UART3_DR1_SC_SHIFT 4
-#define OMAP4_UART3_DR1_SC_MASK (0x3 << 4)
-#define OMAP4_UNIPRO_DR0_SC_SHIFT 2
-#define OMAP4_UNIPRO_DR0_SC_MASK (0x3 << 2)
-#define OMAP4_UNIPRO_DR1_SC_SHIFT 0
-#define OMAP4_UNIPRO_DR1_SC_MASK (0x3 << 0)
-
-/* CONTROL_SMART1IO_PADCONF_1 */
-#define OMAP4_ABE_DR0_LB_SHIFT 30
-#define OMAP4_ABE_DR0_LB_MASK (0x3 << 30)
-#define OMAP4_CAM_DR0_LB_SHIFT 28
-#define OMAP4_CAM_DR0_LB_MASK (0x3 << 28)
-#define OMAP4_FREF_DR2_LB_SHIFT 26
-#define OMAP4_FREF_DR2_LB_MASK (0x3 << 26)
-#define OMAP4_FREF_DR3_LB_SHIFT 24
-#define OMAP4_FREF_DR3_LB_MASK (0x3 << 24)
-#define OMAP4_GPIO_DR8_LB_SHIFT 22
-#define OMAP4_GPIO_DR8_LB_MASK (0x3 << 22)
-#define OMAP4_GPIO_DR9_LB_SHIFT 20
-#define OMAP4_GPIO_DR9_LB_MASK (0x3 << 20)
-#define OMAP4_GPMC_DR2_LB_SHIFT 18
-#define OMAP4_GPMC_DR2_LB_MASK (0x3 << 18)
-#define OMAP4_GPMC_DR3_LB_SHIFT 16
-#define OMAP4_GPMC_DR3_LB_MASK (0x3 << 16)
-#define OMAP4_GPMC_DR6_LB_SHIFT 14
-#define OMAP4_GPMC_DR6_LB_MASK (0x3 << 14)
-#define OMAP4_HDMI_DR0_LB_SHIFT 12
-#define OMAP4_HDMI_DR0_LB_MASK (0x3 << 12)
-#define OMAP4_MCSPI1_DR0_LB_SHIFT 10
-#define OMAP4_MCSPI1_DR0_LB_MASK (0x3 << 10)
-#define OMAP4_UART1_DR0_LB_SHIFT 8
-#define OMAP4_UART1_DR0_LB_MASK (0x3 << 8)
-#define OMAP4_UART3_DR0_LB_SHIFT 6
-#define OMAP4_UART3_DR0_LB_MASK (0x3 << 6)
-#define OMAP4_UART3_DR1_LB_SHIFT 4
-#define OMAP4_UART3_DR1_LB_MASK (0x3 << 4)
-#define OMAP4_UNIPRO_DR0_LB_SHIFT 2
-#define OMAP4_UNIPRO_DR0_LB_MASK (0x3 << 2)
-#define OMAP4_UNIPRO_DR1_LB_SHIFT 0
-#define OMAP4_UNIPRO_DR1_LB_MASK (0x3 << 0)
-
-/* CONTROL_SMART2IO_PADCONF_0 */
-#define OMAP4_C2C_DR0_LB_SHIFT 31
-#define OMAP4_C2C_DR0_LB_MASK (1 << 31)
-#define OMAP4_DPM_DR1_LB_SHIFT 30
-#define OMAP4_DPM_DR1_LB_MASK (1 << 30)
-#define OMAP4_DPM_DR2_LB_SHIFT 29
-#define OMAP4_DPM_DR2_LB_MASK (1 << 29)
-#define OMAP4_DPM_DR3_LB_SHIFT 28
-#define OMAP4_DPM_DR3_LB_MASK (1 << 28)
-#define OMAP4_GPIO_DR0_LB_SHIFT 27
-#define OMAP4_GPIO_DR0_LB_MASK (1 << 27)
-#define OMAP4_GPIO_DR1_LB_SHIFT 26
-#define OMAP4_GPIO_DR1_LB_MASK (1 << 26)
-#define OMAP4_GPIO_DR10_LB_SHIFT 25
-#define OMAP4_GPIO_DR10_LB_MASK (1 << 25)
-#define OMAP4_GPIO_DR2_LB_SHIFT 24
-#define OMAP4_GPIO_DR2_LB_MASK (1 << 24)
-#define OMAP4_GPMC_DR0_LB_SHIFT 23
-#define OMAP4_GPMC_DR0_LB_MASK (1 << 23)
-#define OMAP4_GPMC_DR1_LB_SHIFT 22
-#define OMAP4_GPMC_DR1_LB_MASK (1 << 22)
-#define OMAP4_GPMC_DR4_LB_SHIFT 21
-#define OMAP4_GPMC_DR4_LB_MASK (1 << 21)
-#define OMAP4_GPMC_DR5_LB_SHIFT 20
-#define OMAP4_GPMC_DR5_LB_MASK (1 << 20)
-#define OMAP4_GPMC_DR7_LB_SHIFT 19
-#define OMAP4_GPMC_DR7_LB_MASK (1 << 19)
-#define OMAP4_HSI2_DR0_LB_SHIFT 18
-#define OMAP4_HSI2_DR0_LB_MASK (1 << 18)
-#define OMAP4_HSI2_DR1_LB_SHIFT 17
-#define OMAP4_HSI2_DR1_LB_MASK (1 << 17)
-#define OMAP4_HSI2_DR2_LB_SHIFT 16
-#define OMAP4_HSI2_DR2_LB_MASK (1 << 16)
-#define OMAP4_KPD_DR0_LB_SHIFT 15
-#define OMAP4_KPD_DR0_LB_MASK (1 << 15)
-#define OMAP4_KPD_DR1_LB_SHIFT 14
-#define OMAP4_KPD_DR1_LB_MASK (1 << 14)
-#define OMAP4_PDM_DR0_LB_SHIFT 13
-#define OMAP4_PDM_DR0_LB_MASK (1 << 13)
-#define OMAP4_SDMMC2_DR0_LB_SHIFT 12
-#define OMAP4_SDMMC2_DR0_LB_MASK (1 << 12)
-#define OMAP4_SDMMC3_DR0_LB_SHIFT 11
-#define OMAP4_SDMMC3_DR0_LB_MASK (1 << 11)
-#define OMAP4_SDMMC4_DR0_LB_SHIFT 10
-#define OMAP4_SDMMC4_DR0_LB_MASK (1 << 10)
-#define OMAP4_SDMMC4_DR1_LB_SHIFT 9
-#define OMAP4_SDMMC4_DR1_LB_MASK (1 << 9)
-#define OMAP4_SPI3_DR0_LB_SHIFT 8
-#define OMAP4_SPI3_DR0_LB_MASK (1 << 8)
-#define OMAP4_SPI3_DR1_LB_SHIFT 7
-#define OMAP4_SPI3_DR1_LB_MASK (1 << 7)
-#define OMAP4_UART3_DR2_LB_SHIFT 6
-#define OMAP4_UART3_DR2_LB_MASK (1 << 6)
-#define OMAP4_UART3_DR3_LB_SHIFT 5
-#define OMAP4_UART3_DR3_LB_MASK (1 << 5)
-#define OMAP4_UART3_DR4_LB_SHIFT 4
-#define OMAP4_UART3_DR4_LB_MASK (1 << 4)
-#define OMAP4_UART3_DR5_LB_SHIFT 3
-#define OMAP4_UART3_DR5_LB_MASK (1 << 3)
-#define OMAP4_USBA0_DR1_LB_SHIFT 2
-#define OMAP4_USBA0_DR1_LB_MASK (1 << 2)
-#define OMAP4_USBA_DR2_LB_SHIFT 1
-#define OMAP4_USBA_DR2_LB_MASK (1 << 1)
-
-/* CONTROL_SMART2IO_PADCONF_1 */
-#define OMAP4_USBB1_DR0_LB_SHIFT 31
-#define OMAP4_USBB1_DR0_LB_MASK (1 << 31)
-#define OMAP4_USBB2_DR0_LB_SHIFT 30
-#define OMAP4_USBB2_DR0_LB_MASK (1 << 30)
-#define OMAP4_USBA0_DR0_LB_SHIFT 29
-#define OMAP4_USBA0_DR0_LB_MASK (1 << 29)
-
-/* CONTROL_SMART3IO_PADCONF_0 */
-#define OMAP4_DMIC_DR0_MB_SHIFT 30
-#define OMAP4_DMIC_DR0_MB_MASK (0x3 << 30)
-#define OMAP4_GPIO_DR3_MB_SHIFT 28
-#define OMAP4_GPIO_DR3_MB_MASK (0x3 << 28)
-#define OMAP4_GPIO_DR4_MB_SHIFT 26
-#define OMAP4_GPIO_DR4_MB_MASK (0x3 << 26)
-#define OMAP4_GPIO_DR5_MB_SHIFT 24
-#define OMAP4_GPIO_DR5_MB_MASK (0x3 << 24)
-#define OMAP4_GPIO_DR6_MB_SHIFT 22
-#define OMAP4_GPIO_DR6_MB_MASK (0x3 << 22)
-#define OMAP4_HSI_DR1_MB_SHIFT 20
-#define OMAP4_HSI_DR1_MB_MASK (0x3 << 20)
-#define OMAP4_HSI_DR2_MB_SHIFT 18
-#define OMAP4_HSI_DR2_MB_MASK (0x3 << 18)
-#define OMAP4_HSI_DR3_MB_SHIFT 16
-#define OMAP4_HSI_DR3_MB_MASK (0x3 << 16)
-#define OMAP4_MCBSP2_DR0_MB_SHIFT 14
-#define OMAP4_MCBSP2_DR0_MB_MASK (0x3 << 14)
-#define OMAP4_MCSPI4_DR0_MB_SHIFT 12
-#define OMAP4_MCSPI4_DR0_MB_MASK (0x3 << 12)
-#define OMAP4_MCSPI4_DR1_MB_SHIFT 10
-#define OMAP4_MCSPI4_DR1_MB_MASK (0x3 << 10)
-#define OMAP4_SDMMC3_DR0_MB_SHIFT 8
-#define OMAP4_SDMMC3_DR0_MB_MASK (0x3 << 8)
-#define OMAP4_SPI2_DR0_MB_SHIFT 0
-#define OMAP4_SPI2_DR0_MB_MASK (0x3 << 0)
-
-/* CONTROL_SMART3IO_PADCONF_1 */
-#define OMAP4_SPI2_DR1_MB_SHIFT 30
-#define OMAP4_SPI2_DR1_MB_MASK (0x3 << 30)
-#define OMAP4_SPI2_DR2_MB_SHIFT 28
-#define OMAP4_SPI2_DR2_MB_MASK (0x3 << 28)
-#define OMAP4_UART2_DR0_MB_SHIFT 26
-#define OMAP4_UART2_DR0_MB_MASK (0x3 << 26)
-#define OMAP4_UART2_DR1_MB_SHIFT 24
-#define OMAP4_UART2_DR1_MB_MASK (0x3 << 24)
-#define OMAP4_UART4_DR0_MB_SHIFT 22
-#define OMAP4_UART4_DR0_MB_MASK (0x3 << 22)
-#define OMAP4_HSI_DR0_MB_SHIFT 20
-#define OMAP4_HSI_DR0_MB_MASK (0x3 << 20)
-
-/* CONTROL_SMART3IO_PADCONF_2 */
-#define OMAP4_DMIC_DR0_LB_SHIFT 31
-#define OMAP4_DMIC_DR0_LB_MASK (1 << 31)
-#define OMAP4_GPIO_DR3_LB_SHIFT 30
-#define OMAP4_GPIO_DR3_LB_MASK (1 << 30)
-#define OMAP4_GPIO_DR4_LB_SHIFT 29
-#define OMAP4_GPIO_DR4_LB_MASK (1 << 29)
-#define OMAP4_GPIO_DR5_LB_SHIFT 28
-#define OMAP4_GPIO_DR5_LB_MASK (1 << 28)
-#define OMAP4_GPIO_DR6_LB_SHIFT 27
-#define OMAP4_GPIO_DR6_LB_MASK (1 << 27)
-#define OMAP4_HSI_DR1_LB_SHIFT 26
-#define OMAP4_HSI_DR1_LB_MASK (1 << 26)
-#define OMAP4_HSI_DR2_LB_SHIFT 25
-#define OMAP4_HSI_DR2_LB_MASK (1 << 25)
-#define OMAP4_HSI_DR3_LB_SHIFT 24
-#define OMAP4_HSI_DR3_LB_MASK (1 << 24)
-#define OMAP4_MCBSP2_DR0_LB_SHIFT 23
-#define OMAP4_MCBSP2_DR0_LB_MASK (1 << 23)
-#define OMAP4_MCSPI4_DR0_LB_SHIFT 22
-#define OMAP4_MCSPI4_DR0_LB_MASK (1 << 22)
-#define OMAP4_MCSPI4_DR1_LB_SHIFT 21
-#define OMAP4_MCSPI4_DR1_LB_MASK (1 << 21)
-#define OMAP4_SLIMBUS2_DR0_LB_SHIFT 18
-#define OMAP4_SLIMBUS2_DR0_LB_MASK (1 << 18)
-#define OMAP4_SPI2_DR0_LB_SHIFT 16
-#define OMAP4_SPI2_DR0_LB_MASK (1 << 16)
-#define OMAP4_SPI2_DR1_LB_SHIFT 15
-#define OMAP4_SPI2_DR1_LB_MASK (1 << 15)
-#define OMAP4_SPI2_DR2_LB_SHIFT 14
-#define OMAP4_SPI2_DR2_LB_MASK (1 << 14)
-#define OMAP4_UART2_DR0_LB_SHIFT 13
-#define OMAP4_UART2_DR0_LB_MASK (1 << 13)
-#define OMAP4_UART2_DR1_LB_SHIFT 12
-#define OMAP4_UART2_DR1_LB_MASK (1 << 12)
-#define OMAP4_UART4_DR0_LB_SHIFT 11
-#define OMAP4_UART4_DR0_LB_MASK (1 << 11)
-#define OMAP4_HSI_DR0_LB_SHIFT 10
-#define OMAP4_HSI_DR0_LB_MASK (1 << 10)
-
-/* CONTROL_USBB_HSIC */
-#define OMAP4_USBB2_DR1_SR_SHIFT 30
-#define OMAP4_USBB2_DR1_SR_MASK (0x3 << 30)
-#define OMAP4_USBB2_DR1_I_SHIFT 27
-#define OMAP4_USBB2_DR1_I_MASK (0x7 << 27)
-#define OMAP4_USBB1_DR1_SR_SHIFT 25
-#define OMAP4_USBB1_DR1_SR_MASK (0x3 << 25)
-#define OMAP4_USBB1_DR1_I_SHIFT 22
-#define OMAP4_USBB1_DR1_I_MASK (0x7 << 22)
-#define OMAP4_USBB1_HSIC_DATA_WD_SHIFT 20
-#define OMAP4_USBB1_HSIC_DATA_WD_MASK (0x3 << 20)
-#define OMAP4_USBB1_HSIC_STROBE_WD_SHIFT 18
-#define OMAP4_USBB1_HSIC_STROBE_WD_MASK (0x3 << 18)
-#define OMAP4_USBB2_HSIC_DATA_WD_SHIFT 16
-#define OMAP4_USBB2_HSIC_DATA_WD_MASK (0x3 << 16)
-#define OMAP4_USBB2_HSIC_STROBE_WD_SHIFT 14
-#define OMAP4_USBB2_HSIC_STROBE_WD_MASK (0x3 << 14)
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_ENABLE_SHIFT 13
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_ENABLE_MASK (1 << 13)
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_SHIFT 11
-#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_MASK (0x3 << 11)
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_ENABLE_SHIFT 10
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_ENABLE_MASK (1 << 10)
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_SHIFT 8
-#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_MASK (0x3 << 8)
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_ENABLE_SHIFT 7
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_ENABLE_MASK (1 << 7)
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_SHIFT 5
-#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_MASK (0x3 << 5)
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_ENABLE_SHIFT 4
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_ENABLE_MASK (1 << 4)
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_SHIFT 2
-#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_MASK (0x3 << 2)
-
-/* CONTROL_SLIMBUS */
-#define OMAP4_SLIMBUS1_DR0_MB_SHIFT 30
-#define OMAP4_SLIMBUS1_DR0_MB_MASK (0x3 << 30)
-#define OMAP4_SLIMBUS1_DR1_MB_SHIFT 28
-#define OMAP4_SLIMBUS1_DR1_MB_MASK (0x3 << 28)
-#define OMAP4_SLIMBUS2_DR0_MB_SHIFT 26
-#define OMAP4_SLIMBUS2_DR0_MB_MASK (0x3 << 26)
-#define OMAP4_SLIMBUS2_DR1_MB_SHIFT 24
-#define OMAP4_SLIMBUS2_DR1_MB_MASK (0x3 << 24)
-#define OMAP4_SLIMBUS2_DR2_MB_SHIFT 22
-#define OMAP4_SLIMBUS2_DR2_MB_MASK (0x3 << 22)
-#define OMAP4_SLIMBUS2_DR3_MB_SHIFT 20
-#define OMAP4_SLIMBUS2_DR3_MB_MASK (0x3 << 20)
-#define OMAP4_SLIMBUS1_DR0_LB_SHIFT 19
-#define OMAP4_SLIMBUS1_DR0_LB_MASK (1 << 19)
-#define OMAP4_SLIMBUS2_DR1_LB_SHIFT 18
-#define OMAP4_SLIMBUS2_DR1_LB_MASK (1 << 18)
-
-/* CONTROL_PBIASLITE */
-#define OMAP4_USIM_PBIASLITE_HIZ_MODE_SHIFT 31
-#define OMAP4_USIM_PBIASLITE_HIZ_MODE_MASK (1 << 31)
-#define OMAP4_USIM_PBIASLITE_SUPPLY_HI_OUT_SHIFT 30
-#define OMAP4_USIM_PBIASLITE_SUPPLY_HI_OUT_MASK (1 << 30)
-#define OMAP4_USIM_PBIASLITE_VMODE_ERROR_SHIFT 29
-#define OMAP4_USIM_PBIASLITE_VMODE_ERROR_MASK (1 << 29)
-#define OMAP4_USIM_PBIASLITE_PWRDNZ_SHIFT 28
-#define OMAP4_USIM_PBIASLITE_PWRDNZ_MASK (1 << 28)
-#define OMAP4_USIM_PBIASLITE_VMODE_SHIFT 27
-#define OMAP4_USIM_PBIASLITE_VMODE_MASK (1 << 27)
-#define OMAP4_MMC1_PWRDNZ_SHIFT 26
-#define OMAP4_MMC1_PWRDNZ_MASK (1 << 26)
-#define OMAP4_MMC1_PBIASLITE_HIZ_MODE_SHIFT 25
-#define OMAP4_MMC1_PBIASLITE_HIZ_MODE_MASK (1 << 25)
-#define OMAP4_MMC1_PBIASLITE_SUPPLY_HI_OUT_SHIFT 24
-#define OMAP4_MMC1_PBIASLITE_SUPPLY_HI_OUT_MASK (1 << 24)
-#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_SHIFT 23
-#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK (1 << 23)
-#define OMAP4_MMC1_PBIASLITE_PWRDNZ_SHIFT 22
-#define OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK (1 << 22)
-#define OMAP4_MMC1_PBIASLITE_VMODE_SHIFT 21
-#define OMAP4_MMC1_PBIASLITE_VMODE_MASK (1 << 21)
-#define OMAP4_USBC1_ICUSB_PWRDNZ_SHIFT 20
-#define OMAP4_USBC1_ICUSB_PWRDNZ_MASK (1 << 20)
-
-/* CONTROL_I2C_0 */
-#define OMAP4_I2C4_SDA_GLFENB_SHIFT 31
-#define OMAP4_I2C4_SDA_GLFENB_MASK (1 << 31)
-#define OMAP4_I2C4_SDA_LOAD_BITS_SHIFT 29
-#define OMAP4_I2C4_SDA_LOAD_BITS_MASK (0x3 << 29)
-#define OMAP4_I2C4_SDA_PULLUPRESX_SHIFT 28
-#define OMAP4_I2C4_SDA_PULLUPRESX_MASK (1 << 28)
-#define OMAP4_I2C3_SDA_GLFENB_SHIFT 27
-#define OMAP4_I2C3_SDA_GLFENB_MASK (1 << 27)
-#define OMAP4_I2C3_SDA_LOAD_BITS_SHIFT 25
-#define OMAP4_I2C3_SDA_LOAD_BITS_MASK (0x3 << 25)
-#define OMAP4_I2C3_SDA_PULLUPRESX_SHIFT 24
-#define OMAP4_I2C3_SDA_PULLUPRESX_MASK (1 << 24)
-#define OMAP4_I2C2_SDA_GLFENB_SHIFT 23
-#define OMAP4_I2C2_SDA_GLFENB_MASK (1 << 23)
-#define OMAP4_I2C2_SDA_LOAD_BITS_SHIFT 21
-#define OMAP4_I2C2_SDA_LOAD_BITS_MASK (0x3 << 21)
-#define OMAP4_I2C2_SDA_PULLUPRESX_SHIFT 20
-#define OMAP4_I2C2_SDA_PULLUPRESX_MASK (1 << 20)
-#define OMAP4_I2C1_SDA_GLFENB_SHIFT 19
-#define OMAP4_I2C1_SDA_GLFENB_MASK (1 << 19)
-#define OMAP4_I2C1_SDA_LOAD_BITS_SHIFT 17
-#define OMAP4_I2C1_SDA_LOAD_BITS_MASK (0x3 << 17)
-#define OMAP4_I2C1_SDA_PULLUPRESX_SHIFT 16
-#define OMAP4_I2C1_SDA_PULLUPRESX_MASK (1 << 16)
-#define OMAP4_I2C4_SCL_GLFENB_SHIFT 15
-#define OMAP4_I2C4_SCL_GLFENB_MASK (1 << 15)
-#define OMAP4_I2C4_SCL_LOAD_BITS_SHIFT 13
-#define OMAP4_I2C4_SCL_LOAD_BITS_MASK (0x3 << 13)
-#define OMAP4_I2C4_SCL_PULLUPRESX_SHIFT 12
-#define OMAP4_I2C4_SCL_PULLUPRESX_MASK (1 << 12)
-#define OMAP4_I2C3_SCL_GLFENB_SHIFT 11
-#define OMAP4_I2C3_SCL_GLFENB_MASK (1 << 11)
-#define OMAP4_I2C3_SCL_LOAD_BITS_SHIFT 9
-#define OMAP4_I2C3_SCL_LOAD_BITS_MASK (0x3 << 9)
-#define OMAP4_I2C3_SCL_PULLUPRESX_SHIFT 8
-#define OMAP4_I2C3_SCL_PULLUPRESX_MASK (1 << 8)
-#define OMAP4_I2C2_SCL_GLFENB_SHIFT 7
-#define OMAP4_I2C2_SCL_GLFENB_MASK (1 << 7)
-#define OMAP4_I2C2_SCL_LOAD_BITS_SHIFT 5
-#define OMAP4_I2C2_SCL_LOAD_BITS_MASK (0x3 << 5)
-#define OMAP4_I2C2_SCL_PULLUPRESX_SHIFT 4
-#define OMAP4_I2C2_SCL_PULLUPRESX_MASK (1 << 4)
-#define OMAP4_I2C1_SCL_GLFENB_SHIFT 3
-#define OMAP4_I2C1_SCL_GLFENB_MASK (1 << 3)
-#define OMAP4_I2C1_SCL_LOAD_BITS_SHIFT 1
-#define OMAP4_I2C1_SCL_LOAD_BITS_MASK (0x3 << 1)
-#define OMAP4_I2C1_SCL_PULLUPRESX_SHIFT 0
-#define OMAP4_I2C1_SCL_PULLUPRESX_MASK (1 << 0)
-
-/* CONTROL_CAMERA_RX */
-#define OMAP4_CAMERARX_UNIPRO_CTRLCLKEN_SHIFT 31
-#define OMAP4_CAMERARX_UNIPRO_CTRLCLKEN_MASK (1 << 31)
-#define OMAP4_CAMERARX_CSI22_LANEENABLE_SHIFT 29
-#define OMAP4_CAMERARX_CSI22_LANEENABLE_MASK (0x3 << 29)
-#define OMAP4_CAMERARX_CSI21_LANEENABLE_SHIFT 24
-#define OMAP4_CAMERARX_CSI21_LANEENABLE_MASK (0x1f << 24)
-#define OMAP4_CAMERARX_UNIPRO_CAMMODE_SHIFT 22
-#define OMAP4_CAMERARX_UNIPRO_CAMMODE_MASK (0x3 << 22)
-#define OMAP4_CAMERARX_CSI22_CTRLCLKEN_SHIFT 21
-#define OMAP4_CAMERARX_CSI22_CTRLCLKEN_MASK (1 << 21)
-#define OMAP4_CAMERARX_CSI22_CAMMODE_SHIFT 19
-#define OMAP4_CAMERARX_CSI22_CAMMODE_MASK (0x3 << 19)
-#define OMAP4_CAMERARX_CSI21_CTRLCLKEN_SHIFT 18
-#define OMAP4_CAMERARX_CSI21_CTRLCLKEN_MASK (1 << 18)
-#define OMAP4_CAMERARX_CSI21_CAMMODE_SHIFT 16
-#define OMAP4_CAMERARX_CSI21_CAMMODE_MASK (0x3 << 16)
-
-/* CONTROL_AVDAC */
-#define OMAP4_AVDAC_ACEN_SHIFT 31
-#define OMAP4_AVDAC_ACEN_MASK (1 << 31)
-#define OMAP4_AVDAC_TVOUTBYPASS_SHIFT 30
-#define OMAP4_AVDAC_TVOUTBYPASS_MASK (1 << 30)
-#define OMAP4_AVDAC_INPUTINV_SHIFT 29
-#define OMAP4_AVDAC_INPUTINV_MASK (1 << 29)
-#define OMAP4_AVDAC_CTL_SHIFT 13
-#define OMAP4_AVDAC_CTL_MASK (0xffff << 13)
-#define OMAP4_AVDAC_CTL_WR_ACK_SHIFT 12
-#define OMAP4_AVDAC_CTL_WR_ACK_MASK (1 << 12)
-
-/* CONTROL_HDMI_TX_PHY */
-#define OMAP4_HDMITXPHY_PADORDER_SHIFT 31
-#define OMAP4_HDMITXPHY_PADORDER_MASK (1 << 31)
-#define OMAP4_HDMITXPHY_TXVALID_SHIFT 30
-#define OMAP4_HDMITXPHY_TXVALID_MASK (1 << 30)
-#define OMAP4_HDMITXPHY_ENBYPASSCLK_SHIFT 29
-#define OMAP4_HDMITXPHY_ENBYPASSCLK_MASK (1 << 29)
-#define OMAP4_HDMITXPHY_PD_PULLUPDET_SHIFT 28
-#define OMAP4_HDMITXPHY_PD_PULLUPDET_MASK (1 << 28)
-
-/* CONTROL_MMC2 */
-#define OMAP4_MMC2_FEEDBACK_CLK_SEL_SHIFT 31
-#define OMAP4_MMC2_FEEDBACK_CLK_SEL_MASK (1 << 31)
-
-/* CONTROL_DSIPHY */
-#define OMAP4_DSI2_LANEENABLE_SHIFT 29
-#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29)
-#define OMAP4_DSI1_LANEENABLE_SHIFT 24
-#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24)
-#define OMAP4_DSI1_PIPD_SHIFT 19
-#define OMAP4_DSI1_PIPD_MASK (0x1f << 19)
-#define OMAP4_DSI2_PIPD_SHIFT 14
-#define OMAP4_DSI2_PIPD_MASK (0x1f << 14)
-
-/* CONTROL_MCBSPLP */
-#define OMAP4_ALBCTRLRX_FSX_SHIFT 31
-#define OMAP4_ALBCTRLRX_FSX_MASK (1 << 31)
-#define OMAP4_ALBCTRLRX_CLKX_SHIFT 30
-#define OMAP4_ALBCTRLRX_CLKX_MASK (1 << 30)
-#define OMAP4_ABE_MCBSP1_DR_EN_SHIFT 29
-#define OMAP4_ABE_MCBSP1_DR_EN_MASK (1 << 29)
-
-/* CONTROL_USB2PHYCORE */
-#define OMAP4_USB2PHY_AUTORESUME_EN_SHIFT 31
-#define OMAP4_USB2PHY_AUTORESUME_EN_MASK (1 << 31)
-#define OMAP4_USB2PHY_DISCHGDET_SHIFT 30
-#define OMAP4_USB2PHY_DISCHGDET_MASK (1 << 30)
-#define OMAP4_USB2PHY_GPIOMODE_SHIFT 29
-#define OMAP4_USB2PHY_GPIOMODE_MASK (1 << 29)
-#define OMAP4_USB2PHY_CHG_DET_EXT_CTL_SHIFT 28
-#define OMAP4_USB2PHY_CHG_DET_EXT_CTL_MASK (1 << 28)
-#define OMAP4_USB2PHY_RDM_PD_CHGDET_EN_SHIFT 27
-#define OMAP4_USB2PHY_RDM_PD_CHGDET_EN_MASK (1 << 27)
-#define OMAP4_USB2PHY_RDP_PU_CHGDET_EN_SHIFT 26
-#define OMAP4_USB2PHY_RDP_PU_CHGDET_EN_MASK (1 << 26)
-#define OMAP4_USB2PHY_CHG_VSRC_EN_SHIFT 25
-#define OMAP4_USB2PHY_CHG_VSRC_EN_MASK (1 << 25)
-#define OMAP4_USB2PHY_CHG_ISINK_EN_SHIFT 24
-#define OMAP4_USB2PHY_CHG_ISINK_EN_MASK (1 << 24)
-#define OMAP4_USB2PHY_CHG_DET_STATUS_SHIFT 21
-#define OMAP4_USB2PHY_CHG_DET_STATUS_MASK (0x7 << 21)
-#define OMAP4_USB2PHY_CHG_DET_DM_COMP_SHIFT 20
-#define OMAP4_USB2PHY_CHG_DET_DM_COMP_MASK (1 << 20)
-#define OMAP4_USB2PHY_CHG_DET_DP_COMP_SHIFT 19
-#define OMAP4_USB2PHY_CHG_DET_DP_COMP_MASK (1 << 19)
-#define OMAP4_USB2PHY_DATADET_SHIFT 18
-#define OMAP4_USB2PHY_DATADET_MASK (1 << 18)
-#define OMAP4_USB2PHY_SINKONDP_SHIFT 17
-#define OMAP4_USB2PHY_SINKONDP_MASK (1 << 17)
-#define OMAP4_USB2PHY_SRCONDM_SHIFT 16
-#define OMAP4_USB2PHY_SRCONDM_MASK (1 << 16)
-#define OMAP4_USB2PHY_RESTARTCHGDET_SHIFT 15
-#define OMAP4_USB2PHY_RESTARTCHGDET_MASK (1 << 15)
-#define OMAP4_USB2PHY_CHGDETDONE_SHIFT 14
-#define OMAP4_USB2PHY_CHGDETDONE_MASK (1 << 14)
-#define OMAP4_USB2PHY_CHGDETECTED_SHIFT 13
-#define OMAP4_USB2PHY_CHGDETECTED_MASK (1 << 13)
-#define OMAP4_USB2PHY_MCPCPUEN_SHIFT 12
-#define OMAP4_USB2PHY_MCPCPUEN_MASK (1 << 12)
-#define OMAP4_USB2PHY_MCPCMODEEN_SHIFT 11
-#define OMAP4_USB2PHY_MCPCMODEEN_MASK (1 << 11)
-#define OMAP4_USB2PHY_RESETDONEMCLK_SHIFT 10
-#define OMAP4_USB2PHY_RESETDONEMCLK_MASK (1 << 10)
-#define OMAP4_USB2PHY_UTMIRESETDONE_SHIFT 9
-#define OMAP4_USB2PHY_UTMIRESETDONE_MASK (1 << 9)
-#define OMAP4_USB2PHY_TXBITSTUFFENABLE_SHIFT 8
-#define OMAP4_USB2PHY_TXBITSTUFFENABLE_MASK (1 << 8)
-#define OMAP4_USB2PHY_DATAPOLARITYN_SHIFT 7
-#define OMAP4_USB2PHY_DATAPOLARITYN_MASK (1 << 7)
-#define OMAP4_USBDPLL_FREQLOCK_SHIFT 6
-#define OMAP4_USBDPLL_FREQLOCK_MASK (1 << 6)
-#define OMAP4_USB2PHY_RESETDONETCLK_SHIFT 5
-#define OMAP4_USB2PHY_RESETDONETCLK_MASK (1 << 5)
-
-/* CONTROL_I2C_1 */
-#define OMAP4_HDMI_DDC_SDA_GLFENB_SHIFT 31
-#define OMAP4_HDMI_DDC_SDA_GLFENB_MASK (1 << 31)
-#define OMAP4_HDMI_DDC_SDA_LOAD_BITS_SHIFT 29
-#define OMAP4_HDMI_DDC_SDA_LOAD_BITS_MASK (0x3 << 29)
-#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_SHIFT 28
-#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK (1 << 28)
-#define OMAP4_HDMI_DDC_SCL_GLFENB_SHIFT 27
-#define OMAP4_HDMI_DDC_SCL_GLFENB_MASK (1 << 27)
-#define OMAP4_HDMI_DDC_SCL_LOAD_BITS_SHIFT 25
-#define OMAP4_HDMI_DDC_SCL_LOAD_BITS_MASK (0x3 << 25)
-#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_SHIFT 24
-#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK (1 << 24)
-#define OMAP4_HDMI_DDC_SDA_HSMODE_SHIFT 23
-#define OMAP4_HDMI_DDC_SDA_HSMODE_MASK (1 << 23)
-#define OMAP4_HDMI_DDC_SDA_NMODE_SHIFT 22
-#define OMAP4_HDMI_DDC_SDA_NMODE_MASK (1 << 22)
-#define OMAP4_HDMI_DDC_SCL_HSMODE_SHIFT 21
-#define OMAP4_HDMI_DDC_SCL_HSMODE_MASK (1 << 21)
-#define OMAP4_HDMI_DDC_SCL_NMODE_SHIFT 20
-#define OMAP4_HDMI_DDC_SCL_NMODE_MASK (1 << 20)
-
-/* CONTROL_MMC1 */
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_SHIFT 31
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_MASK (1 << 31)
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_SHIFT 30
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK (1 << 30)
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_SHIFT 29
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK (1 << 29)
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_SHIFT 28
-#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK (1 << 28)
-#define OMAP4_SDMMC1_DR0_SPEEDCTRL_SHIFT 27
-#define OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK (1 << 27)
-#define OMAP4_SDMMC1_DR1_SPEEDCTRL_SHIFT 26
-#define OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK (1 << 26)
-#define OMAP4_SDMMC1_DR2_SPEEDCTRL_SHIFT 25
-#define OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK (1 << 25)
-#define OMAP4_USBC1_DR0_SPEEDCTRL_SHIFT 24
-#define OMAP4_USBC1_DR0_SPEEDCTRL_MASK (1 << 24)
-#define OMAP4_USB_FD_CDEN_SHIFT 23
-#define OMAP4_USB_FD_CDEN_MASK (1 << 23)
-#define OMAP4_USBC1_ICUSB_DP_PDDIS_SHIFT 22
-#define OMAP4_USBC1_ICUSB_DP_PDDIS_MASK (1 << 22)
-#define OMAP4_USBC1_ICUSB_DM_PDDIS_SHIFT 21
-#define OMAP4_USBC1_ICUSB_DM_PDDIS_MASK (1 << 21)
-
-/* CONTROL_HSI */
-#define OMAP4_HSI1_CALLOOP_SEL_SHIFT 31
-#define OMAP4_HSI1_CALLOOP_SEL_MASK (1 << 31)
-#define OMAP4_HSI1_CALMUX_SEL_SHIFT 30
-#define OMAP4_HSI1_CALMUX_SEL_MASK (1 << 30)
-#define OMAP4_HSI2_CALLOOP_SEL_SHIFT 29
-#define OMAP4_HSI2_CALLOOP_SEL_MASK (1 << 29)
-#define OMAP4_HSI2_CALMUX_SEL_SHIFT 28
-#define OMAP4_HSI2_CALMUX_SEL_MASK (1 << 28)
-
-/* CONTROL_USB */
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT0_AUTO_EN_SHIFT 31
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT0_AUTO_EN_MASK (1 << 31)
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT1_AUTO_EN_SHIFT 30
-#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT1_AUTO_EN_MASK (1 << 30)
-
-/* CONTROL_HDQ */
-#define OMAP4_HDQ_SIO_PWRDNZ_SHIFT 31
-#define OMAP4_HDQ_SIO_PWRDNZ_MASK (1 << 31)
-
-/* CONTROL_LPDDR2IO1_0 */
-#define OMAP4_LPDDR2IO1_GR4_SR_SHIFT 30
-#define OMAP4_LPDDR2IO1_GR4_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO1_GR4_I_SHIFT 27
-#define OMAP4_LPDDR2IO1_GR4_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO1_GR4_WD_SHIFT 25
-#define OMAP4_LPDDR2IO1_GR4_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO1_GR3_SR_SHIFT 22
-#define OMAP4_LPDDR2IO1_GR3_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO1_GR3_I_SHIFT 19
-#define OMAP4_LPDDR2IO1_GR3_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO1_GR3_WD_SHIFT 17
-#define OMAP4_LPDDR2IO1_GR3_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO1_GR2_SR_SHIFT 14
-#define OMAP4_LPDDR2IO1_GR2_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO1_GR2_I_SHIFT 11
-#define OMAP4_LPDDR2IO1_GR2_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO1_GR2_WD_SHIFT 9
-#define OMAP4_LPDDR2IO1_GR2_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO1_GR1_SR_SHIFT 6
-#define OMAP4_LPDDR2IO1_GR1_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO1_GR1_I_SHIFT 3
-#define OMAP4_LPDDR2IO1_GR1_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO1_GR1_WD_SHIFT 1
-#define OMAP4_LPDDR2IO1_GR1_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO1_1 */
-#define OMAP4_LPDDR2IO1_GR8_SR_SHIFT 30
-#define OMAP4_LPDDR2IO1_GR8_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO1_GR8_I_SHIFT 27
-#define OMAP4_LPDDR2IO1_GR8_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO1_GR8_WD_SHIFT 25
-#define OMAP4_LPDDR2IO1_GR8_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO1_GR7_SR_SHIFT 22
-#define OMAP4_LPDDR2IO1_GR7_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO1_GR7_I_SHIFT 19
-#define OMAP4_LPDDR2IO1_GR7_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO1_GR7_WD_SHIFT 17
-#define OMAP4_LPDDR2IO1_GR7_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO1_GR6_SR_SHIFT 14
-#define OMAP4_LPDDR2IO1_GR6_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO1_GR6_I_SHIFT 11
-#define OMAP4_LPDDR2IO1_GR6_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO1_GR6_WD_SHIFT 9
-#define OMAP4_LPDDR2IO1_GR6_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO1_GR5_SR_SHIFT 6
-#define OMAP4_LPDDR2IO1_GR5_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO1_GR5_I_SHIFT 3
-#define OMAP4_LPDDR2IO1_GR5_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO1_GR5_WD_SHIFT 1
-#define OMAP4_LPDDR2IO1_GR5_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO1_2 */
-#define OMAP4_LPDDR2IO1_GR11_SR_SHIFT 30
-#define OMAP4_LPDDR2IO1_GR11_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO1_GR11_I_SHIFT 27
-#define OMAP4_LPDDR2IO1_GR11_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO1_GR11_WD_SHIFT 25
-#define OMAP4_LPDDR2IO1_GR11_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO1_GR10_SR_SHIFT 22
-#define OMAP4_LPDDR2IO1_GR10_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO1_GR10_I_SHIFT 19
-#define OMAP4_LPDDR2IO1_GR10_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO1_GR10_WD_SHIFT 17
-#define OMAP4_LPDDR2IO1_GR10_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO1_GR9_SR_SHIFT 14
-#define OMAP4_LPDDR2IO1_GR9_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO1_GR9_I_SHIFT 11
-#define OMAP4_LPDDR2IO1_GR9_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO1_GR9_WD_SHIFT 9
-#define OMAP4_LPDDR2IO1_GR9_WD_MASK (0x3 << 9)
-
-/* CONTROL_LPDDR2IO1_3 */
-#define OMAP4_LPDDR21_VREF_CA_CCAP0_SHIFT 31
-#define OMAP4_LPDDR21_VREF_CA_CCAP0_MASK (1 << 31)
-#define OMAP4_LPDDR21_VREF_CA_CCAP1_SHIFT 30
-#define OMAP4_LPDDR21_VREF_CA_CCAP1_MASK (1 << 30)
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP0_SHIFT 29
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP0_MASK (1 << 29)
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP1_SHIFT 28
-#define OMAP4_LPDDR21_VREF_CA_INT_CCAP1_MASK (1 << 28)
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP0_SHIFT 27
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP0_MASK (1 << 27)
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP1_SHIFT 26
-#define OMAP4_LPDDR21_VREF_CA_INT_TAP1_MASK (1 << 26)
-#define OMAP4_LPDDR21_VREF_CA_TAP0_SHIFT 25
-#define OMAP4_LPDDR21_VREF_CA_TAP0_MASK (1 << 25)
-#define OMAP4_LPDDR21_VREF_CA_TAP1_SHIFT 24
-#define OMAP4_LPDDR21_VREF_CA_TAP1_MASK (1 << 24)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP0_SHIFT 23
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP0_MASK (1 << 23)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP1_SHIFT 22
-#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP1_MASK (1 << 22)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP0_SHIFT 21
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP0_MASK (1 << 21)
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP1_SHIFT 20
-#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP1_MASK (1 << 20)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP0_SHIFT 19
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP0_MASK (1 << 19)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP1_SHIFT 18
-#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP1_MASK (1 << 18)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP0_SHIFT 17
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP0_MASK (1 << 17)
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP1_SHIFT 16
-#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP1_MASK (1 << 16)
-#define OMAP4_LPDDR21_VREF_DQ_CCAP0_SHIFT 15
-#define OMAP4_LPDDR21_VREF_DQ_CCAP0_MASK (1 << 15)
-#define OMAP4_LPDDR21_VREF_DQ_CCAP1_SHIFT 14
-#define OMAP4_LPDDR21_VREF_DQ_CCAP1_MASK (1 << 14)
-#define OMAP4_LPDDR21_VREF_DQ_TAP0_SHIFT 13
-#define OMAP4_LPDDR21_VREF_DQ_TAP0_MASK (1 << 13)
-#define OMAP4_LPDDR21_VREF_DQ_TAP1_SHIFT 12
-#define OMAP4_LPDDR21_VREF_DQ_TAP1_MASK (1 << 12)
-
-/* CONTROL_LPDDR2IO2_0 */
-#define OMAP4_LPDDR2IO2_GR4_SR_SHIFT 30
-#define OMAP4_LPDDR2IO2_GR4_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO2_GR4_I_SHIFT 27
-#define OMAP4_LPDDR2IO2_GR4_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO2_GR4_WD_SHIFT 25
-#define OMAP4_LPDDR2IO2_GR4_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO2_GR3_SR_SHIFT 22
-#define OMAP4_LPDDR2IO2_GR3_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO2_GR3_I_SHIFT 19
-#define OMAP4_LPDDR2IO2_GR3_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO2_GR3_WD_SHIFT 17
-#define OMAP4_LPDDR2IO2_GR3_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO2_GR2_SR_SHIFT 14
-#define OMAP4_LPDDR2IO2_GR2_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO2_GR2_I_SHIFT 11
-#define OMAP4_LPDDR2IO2_GR2_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO2_GR2_WD_SHIFT 9
-#define OMAP4_LPDDR2IO2_GR2_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO2_GR1_SR_SHIFT 6
-#define OMAP4_LPDDR2IO2_GR1_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO2_GR1_I_SHIFT 3
-#define OMAP4_LPDDR2IO2_GR1_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO2_GR1_WD_SHIFT 1
-#define OMAP4_LPDDR2IO2_GR1_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO2_1 */
-#define OMAP4_LPDDR2IO2_GR8_SR_SHIFT 30
-#define OMAP4_LPDDR2IO2_GR8_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO2_GR8_I_SHIFT 27
-#define OMAP4_LPDDR2IO2_GR8_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO2_GR8_WD_SHIFT 25
-#define OMAP4_LPDDR2IO2_GR8_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO2_GR7_SR_SHIFT 22
-#define OMAP4_LPDDR2IO2_GR7_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO2_GR7_I_SHIFT 19
-#define OMAP4_LPDDR2IO2_GR7_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO2_GR7_WD_SHIFT 17
-#define OMAP4_LPDDR2IO2_GR7_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO2_GR6_SR_SHIFT 14
-#define OMAP4_LPDDR2IO2_GR6_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO2_GR6_I_SHIFT 11
-#define OMAP4_LPDDR2IO2_GR6_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO2_GR6_WD_SHIFT 9
-#define OMAP4_LPDDR2IO2_GR6_WD_MASK (0x3 << 9)
-#define OMAP4_LPDDR2IO2_GR5_SR_SHIFT 6
-#define OMAP4_LPDDR2IO2_GR5_SR_MASK (0x3 << 6)
-#define OMAP4_LPDDR2IO2_GR5_I_SHIFT 3
-#define OMAP4_LPDDR2IO2_GR5_I_MASK (0x7 << 3)
-#define OMAP4_LPDDR2IO2_GR5_WD_SHIFT 1
-#define OMAP4_LPDDR2IO2_GR5_WD_MASK (0x3 << 1)
-
-/* CONTROL_LPDDR2IO2_2 */
-#define OMAP4_LPDDR2IO2_GR11_SR_SHIFT 30
-#define OMAP4_LPDDR2IO2_GR11_SR_MASK (0x3 << 30)
-#define OMAP4_LPDDR2IO2_GR11_I_SHIFT 27
-#define OMAP4_LPDDR2IO2_GR11_I_MASK (0x7 << 27)
-#define OMAP4_LPDDR2IO2_GR11_WD_SHIFT 25
-#define OMAP4_LPDDR2IO2_GR11_WD_MASK (0x3 << 25)
-#define OMAP4_LPDDR2IO2_GR10_SR_SHIFT 22
-#define OMAP4_LPDDR2IO2_GR10_SR_MASK (0x3 << 22)
-#define OMAP4_LPDDR2IO2_GR10_I_SHIFT 19
-#define OMAP4_LPDDR2IO2_GR10_I_MASK (0x7 << 19)
-#define OMAP4_LPDDR2IO2_GR10_WD_SHIFT 17
-#define OMAP4_LPDDR2IO2_GR10_WD_MASK (0x3 << 17)
-#define OMAP4_LPDDR2IO2_GR9_SR_SHIFT 14
-#define OMAP4_LPDDR2IO2_GR9_SR_MASK (0x3 << 14)
-#define OMAP4_LPDDR2IO2_GR9_I_SHIFT 11
-#define OMAP4_LPDDR2IO2_GR9_I_MASK (0x7 << 11)
-#define OMAP4_LPDDR2IO2_GR9_WD_SHIFT 9
-#define OMAP4_LPDDR2IO2_GR9_WD_MASK (0x3 << 9)
-
-/* CONTROL_LPDDR2IO2_3 */
-#define OMAP4_LPDDR22_VREF_CA_CCAP0_SHIFT 31
-#define OMAP4_LPDDR22_VREF_CA_CCAP0_MASK (1 << 31)
-#define OMAP4_LPDDR22_VREF_CA_CCAP1_SHIFT 30
-#define OMAP4_LPDDR22_VREF_CA_CCAP1_MASK (1 << 30)
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP0_SHIFT 29
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP0_MASK (1 << 29)
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP1_SHIFT 28
-#define OMAP4_LPDDR22_VREF_CA_INT_CCAP1_MASK (1 << 28)
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP0_SHIFT 27
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP0_MASK (1 << 27)
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP1_SHIFT 26
-#define OMAP4_LPDDR22_VREF_CA_INT_TAP1_MASK (1 << 26)
-#define OMAP4_LPDDR22_VREF_CA_TAP0_SHIFT 25
-#define OMAP4_LPDDR22_VREF_CA_TAP0_MASK (1 << 25)
-#define OMAP4_LPDDR22_VREF_CA_TAP1_SHIFT 24
-#define OMAP4_LPDDR22_VREF_CA_TAP1_MASK (1 << 24)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP0_SHIFT 23
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP0_MASK (1 << 23)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP1_SHIFT 22
-#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP1_MASK (1 << 22)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP0_SHIFT 21
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP0_MASK (1 << 21)
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP1_SHIFT 20
-#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP1_MASK (1 << 20)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP0_SHIFT 19
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP0_MASK (1 << 19)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP1_SHIFT 18
-#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP1_MASK (1 << 18)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP0_SHIFT 17
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP0_MASK (1 << 17)
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP1_SHIFT 16
-#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP1_MASK (1 << 16)
-#define OMAP4_LPDDR22_VREF_DQ_CCAP0_SHIFT 15
-#define OMAP4_LPDDR22_VREF_DQ_CCAP0_MASK (1 << 15)
-#define OMAP4_LPDDR22_VREF_DQ_CCAP1_SHIFT 14
-#define OMAP4_LPDDR22_VREF_DQ_CCAP1_MASK (1 << 14)
-#define OMAP4_LPDDR22_VREF_DQ_TAP0_SHIFT 13
-#define OMAP4_LPDDR22_VREF_DQ_TAP0_MASK (1 << 13)
-#define OMAP4_LPDDR22_VREF_DQ_TAP1_SHIFT 12
-#define OMAP4_LPDDR22_VREF_DQ_TAP1_MASK (1 << 12)
-
-/* CONTROL_BUS_HOLD */
-#define OMAP4_ABE_DMIC_DIN3_EN_SHIFT 31
-#define OMAP4_ABE_DMIC_DIN3_EN_MASK (1 << 31)
-#define OMAP4_MCSPI1_CS3_EN_SHIFT 30
-#define OMAP4_MCSPI1_CS3_EN_MASK (1 << 30)
-
-/* CONTROL_C2C */
-#define OMAP4_MIRROR_MODE_EN_SHIFT 31
-#define OMAP4_MIRROR_MODE_EN_MASK (1 << 31)
-#define OMAP4_C2C_SPARE_SHIFT 24
-#define OMAP4_C2C_SPARE_MASK (0x7f << 24)
-
-/* CORE_CONTROL_SPARE_RW */
-#define OMAP4_CORE_CONTROL_SPARE_RW_SHIFT 0
-#define OMAP4_CORE_CONTROL_SPARE_RW_MASK (0xffffffff << 0)
-
-/* CORE_CONTROL_SPARE_R */
-#define OMAP4_CORE_CONTROL_SPARE_R_SHIFT 0
-#define OMAP4_CORE_CONTROL_SPARE_R_MASK (0xffffffff << 0)
-
-/* CORE_CONTROL_SPARE_R_C0 */
-#define OMAP4_CORE_CONTROL_SPARE_R_C0_SHIFT 31
-#define OMAP4_CORE_CONTROL_SPARE_R_C0_MASK (1 << 31)
-#define OMAP4_CORE_CONTROL_SPARE_R_C1_SHIFT 30
-#define OMAP4_CORE_CONTROL_SPARE_R_C1_MASK (1 << 30)
-#define OMAP4_CORE_CONTROL_SPARE_R_C2_SHIFT 29
-#define OMAP4_CORE_CONTROL_SPARE_R_C2_MASK (1 << 29)
-#define OMAP4_CORE_CONTROL_SPARE_R_C3_SHIFT 28
-#define OMAP4_CORE_CONTROL_SPARE_R_C3_MASK (1 << 28)
-#define OMAP4_CORE_CONTROL_SPARE_R_C4_SHIFT 27
-#define OMAP4_CORE_CONTROL_SPARE_R_C4_MASK (1 << 27)
-#define OMAP4_CORE_CONTROL_SPARE_R_C5_SHIFT 26
-#define OMAP4_CORE_CONTROL_SPARE_R_C5_MASK (1 << 26)
-#define OMAP4_CORE_CONTROL_SPARE_R_C6_SHIFT 25
-#define OMAP4_CORE_CONTROL_SPARE_R_C6_MASK (1 << 25)
-#define OMAP4_CORE_CONTROL_SPARE_R_C7_SHIFT 24
-#define OMAP4_CORE_CONTROL_SPARE_R_C7_MASK (1 << 24)
-
-/* CONTROL_EFUSE_1 */
-#define OMAP4_AVDAC_TRIM_BYTE3_SHIFT 24
-#define OMAP4_AVDAC_TRIM_BYTE3_MASK (0x7f << 24)
-#define OMAP4_AVDAC_TRIM_BYTE2_SHIFT 16
-#define OMAP4_AVDAC_TRIM_BYTE2_MASK (0xff << 16)
-#define OMAP4_AVDAC_TRIM_BYTE1_SHIFT 8
-#define OMAP4_AVDAC_TRIM_BYTE1_MASK (0xff << 8)
-#define OMAP4_AVDAC_TRIM_BYTE0_SHIFT 0
-#define OMAP4_AVDAC_TRIM_BYTE0_MASK (0xff << 0)
-
-/* CONTROL_EFUSE_2 */
-#define OMAP4_EFUSE_SMART2TEST_P0_SHIFT 31
-#define OMAP4_EFUSE_SMART2TEST_P0_MASK (1 << 31)
-#define OMAP4_EFUSE_SMART2TEST_P1_SHIFT 30
-#define OMAP4_EFUSE_SMART2TEST_P1_MASK (1 << 30)
-#define OMAP4_EFUSE_SMART2TEST_P2_SHIFT 29
-#define OMAP4_EFUSE_SMART2TEST_P2_MASK (1 << 29)
-#define OMAP4_EFUSE_SMART2TEST_P3_SHIFT 28
-#define OMAP4_EFUSE_SMART2TEST_P3_MASK (1 << 28)
-#define OMAP4_EFUSE_SMART2TEST_N0_SHIFT 27
-#define OMAP4_EFUSE_SMART2TEST_N0_MASK (1 << 27)
-#define OMAP4_EFUSE_SMART2TEST_N1_SHIFT 26
-#define OMAP4_EFUSE_SMART2TEST_N1_MASK (1 << 26)
-#define OMAP4_EFUSE_SMART2TEST_N2_SHIFT 25
-#define OMAP4_EFUSE_SMART2TEST_N2_MASK (1 << 25)
-#define OMAP4_EFUSE_SMART2TEST_N3_SHIFT 24
-#define OMAP4_EFUSE_SMART2TEST_N3_MASK (1 << 24)
-#define OMAP4_LPDDR2_PTV_N1_SHIFT 23
-#define OMAP4_LPDDR2_PTV_N1_MASK (1 << 23)
-#define OMAP4_LPDDR2_PTV_N2_SHIFT 22
-#define OMAP4_LPDDR2_PTV_N2_MASK (1 << 22)
-#define OMAP4_LPDDR2_PTV_N3_SHIFT 21
-#define OMAP4_LPDDR2_PTV_N3_MASK (1 << 21)
-#define OMAP4_LPDDR2_PTV_N4_SHIFT 20
-#define OMAP4_LPDDR2_PTV_N4_MASK (1 << 20)
-#define OMAP4_LPDDR2_PTV_N5_SHIFT 19
-#define OMAP4_LPDDR2_PTV_N5_MASK (1 << 19)
-#define OMAP4_LPDDR2_PTV_P1_SHIFT 18
-#define OMAP4_LPDDR2_PTV_P1_MASK (1 << 18)
-#define OMAP4_LPDDR2_PTV_P2_SHIFT 17
-#define OMAP4_LPDDR2_PTV_P2_MASK (1 << 17)
-#define OMAP4_LPDDR2_PTV_P3_SHIFT 16
-#define OMAP4_LPDDR2_PTV_P3_MASK (1 << 16)
-#define OMAP4_LPDDR2_PTV_P4_SHIFT 15
-#define OMAP4_LPDDR2_PTV_P4_MASK (1 << 15)
-#define OMAP4_LPDDR2_PTV_P5_SHIFT 14
-#define OMAP4_LPDDR2_PTV_P5_MASK (1 << 14)
-
-/* CONTROL_EFUSE_3 */
-#define OMAP4_STD_FUSE_SPARE_1_SHIFT 24
-#define OMAP4_STD_FUSE_SPARE_1_MASK (0xff << 24)
-#define OMAP4_STD_FUSE_SPARE_2_SHIFT 16
-#define OMAP4_STD_FUSE_SPARE_2_MASK (0xff << 16)
-#define OMAP4_STD_FUSE_SPARE_3_SHIFT 8
-#define OMAP4_STD_FUSE_SPARE_3_MASK (0xff << 8)
-#define OMAP4_STD_FUSE_SPARE_4_SHIFT 0
-#define OMAP4_STD_FUSE_SPARE_4_MASK (0xff << 0)
-
-/* CONTROL_EFUSE_4 */
-#define OMAP4_STD_FUSE_SPARE_5_SHIFT 24
-#define OMAP4_STD_FUSE_SPARE_5_MASK (0xff << 24)
-#define OMAP4_STD_FUSE_SPARE_6_SHIFT 16
-#define OMAP4_STD_FUSE_SPARE_6_MASK (0xff << 16)
-#define OMAP4_STD_FUSE_SPARE_7_SHIFT 8
-#define OMAP4_STD_FUSE_SPARE_7_MASK (0xff << 8)
-#define OMAP4_STD_FUSE_SPARE_8_SHIFT 0
-#define OMAP4_STD_FUSE_SPARE_8_MASK (0xff << 0)
-
-#endif
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
deleted file mode 100644
index 17c9b37..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h
+++ /dev/null
@@ -1,236 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_PAD_WKUP registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson at ti.com)
- * Santosh Shilimkar (santosh.shilimkar at ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap at vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_WKUP_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_PAD_WKUP_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_PAD_WKUP 0x4a31e000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_PAD_WKUP_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_PAD_WKUP_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_PAD_WKUP_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_PAD_WKUP_PADCONF_WAKEUPEVENT_0 0x007c
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_SMART1NOPMIO_PADCONF_0 0x05a0
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_SMART1NOPMIO_PADCONF_1 0x05a4
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_PADCONF_MODE 0x05a8
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_XTAL_OSCILLATOR 0x05ac
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_USIMIO 0x0600
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_I2C_2 0x0604
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_JTAG 0x0608
-#define OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_SYS 0x060c
-#define OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_RW 0x0614
-#define OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_R 0x0618
-#define OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_R_C0 0x061c
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* PADCONF_WAKEUPEVENT_0 */
-#define OMAP4_JTAG_TDO_DUPLICATEWAKEUPEVENT_SHIFT 24
-#define OMAP4_JTAG_TDO_DUPLICATEWAKEUPEVENT_MASK (1 << 24)
-#define OMAP4_JTAG_TDI_DUPLICATEWAKEUPEVENT_SHIFT 23
-#define OMAP4_JTAG_TDI_DUPLICATEWAKEUPEVENT_MASK (1 << 23)
-#define OMAP4_JTAG_TMS_TMSC_DUPLICATEWAKEUPEVENT_SHIFT 22
-#define OMAP4_JTAG_TMS_TMSC_DUPLICATEWAKEUPEVENT_MASK (1 << 22)
-#define OMAP4_JTAG_RTCK_DUPLICATEWAKEUPEVENT_SHIFT 21
-#define OMAP4_JTAG_RTCK_DUPLICATEWAKEUPEVENT_MASK (1 << 21)
-#define OMAP4_JTAG_TCK_DUPLICATEWAKEUPEVENT_SHIFT 20
-#define OMAP4_JTAG_TCK_DUPLICATEWAKEUPEVENT_MASK (1 << 20)
-#define OMAP4_JTAG_NTRST_DUPLICATEWAKEUPEVENT_SHIFT 19
-#define OMAP4_JTAG_NTRST_DUPLICATEWAKEUPEVENT_MASK (1 << 19)
-#define OMAP4_SYS_BOOT7_DUPLICATEWAKEUPEVENT_SHIFT 18
-#define OMAP4_SYS_BOOT7_DUPLICATEWAKEUPEVENT_MASK (1 << 18)
-#define OMAP4_SYS_BOOT6_DUPLICATEWAKEUPEVENT_SHIFT 17
-#define OMAP4_SYS_BOOT6_DUPLICATEWAKEUPEVENT_MASK (1 << 17)
-#define OMAP4_SYS_PWRON_RESET_OUT_DUPLICATEWAKEUPEVENT_SHIFT 16
-#define OMAP4_SYS_PWRON_RESET_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 16)
-#define OMAP4_SYS_PWR_REQ_DUPLICATEWAKEUPEVENT_SHIFT 15
-#define OMAP4_SYS_PWR_REQ_DUPLICATEWAKEUPEVENT_MASK (1 << 15)
-#define OMAP4_SYS_NRESWARM_DUPLICATEWAKEUPEVENT_SHIFT 14
-#define OMAP4_SYS_NRESWARM_DUPLICATEWAKEUPEVENT_MASK (1 << 14)
-#define OMAP4_SYS_32K_DUPLICATEWAKEUPEVENT_SHIFT 13
-#define OMAP4_SYS_32K_DUPLICATEWAKEUPEVENT_MASK (1 << 13)
-#define OMAP4_FREF_CLK4_OUT_DUPLICATEWAKEUPEVENT_SHIFT 12
-#define OMAP4_FREF_CLK4_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 12)
-#define OMAP4_FREF_CLK4_REQ_DUPLICATEWAKEUPEVENT_SHIFT 11
-#define OMAP4_FREF_CLK4_REQ_DUPLICATEWAKEUPEVENT_MASK (1 << 11)
-#define OMAP4_FREF_CLK3_OUT_DUPLICATEWAKEUPEVENT_SHIFT 10
-#define OMAP4_FREF_CLK3_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 10)
-#define OMAP4_FREF_CLK3_REQ_DUPLICATEWAKEUPEVENT_SHIFT 9
-#define OMAP4_FREF_CLK3_REQ_DUPLICATEWAKEUPEVENT_MASK (1 << 9)
-#define OMAP4_FREF_CLK0_OUT_DUPLICATEWAKEUPEVENT_SHIFT 8
-#define OMAP4_FREF_CLK0_OUT_DUPLICATEWAKEUPEVENT_MASK (1 << 8)
-#define OMAP4_FREF_CLK_IOREQ_DUPLICATEWAKEUPEVENT_SHIFT 7
-#define OMAP4_FREF_CLK_IOREQ_DUPLICATEWAKEUPEVENT_MASK (1 << 7)
-#define OMAP4_SR_SDA_DUPLICATEWAKEUPEVENT_SHIFT 6
-#define OMAP4_SR_SDA_DUPLICATEWAKEUPEVENT_MASK (1 << 6)
-#define OMAP4_SR_SCL_DUPLICATEWAKEUPEVENT_SHIFT 5
-#define OMAP4_SR_SCL_DUPLICATEWAKEUPEVENT_MASK (1 << 5)
-#define OMAP4_SIM_PWRCTRL_DUPLICATEWAKEUPEVENT_SHIFT 4
-#define OMAP4_SIM_PWRCTRL_DUPLICATEWAKEUPEVENT_MASK (1 << 4)
-#define OMAP4_SIM_CD_DUPLICATEWAKEUPEVENT_SHIFT 3
-#define OMAP4_SIM_CD_DUPLICATEWAKEUPEVENT_MASK (1 << 3)
-#define OMAP4_SIM_RESET_DUPLICATEWAKEUPEVENT_SHIFT 2
-#define OMAP4_SIM_RESET_DUPLICATEWAKEUPEVENT_MASK (1 << 2)
-#define OMAP4_SIM_CLK_DUPLICATEWAKEUPEVENT_SHIFT 1
-#define OMAP4_SIM_CLK_DUPLICATEWAKEUPEVENT_MASK (1 << 1)
-#define OMAP4_SIM_IO_DUPLICATEWAKEUPEVENT_SHIFT 0
-#define OMAP4_SIM_IO_DUPLICATEWAKEUPEVENT_MASK (1 << 0)
-
-/* CONTROL_SMART1NOPMIO_PADCONF_0 */
-#define OMAP4_FREF_DR0_SC_SHIFT 30
-#define OMAP4_FREF_DR0_SC_MASK (0x3 << 30)
-#define OMAP4_FREF_DR1_SC_SHIFT 28
-#define OMAP4_FREF_DR1_SC_MASK (0x3 << 28)
-#define OMAP4_FREF_DR4_SC_SHIFT 26
-#define OMAP4_FREF_DR4_SC_MASK (0x3 << 26)
-#define OMAP4_FREF_DR5_SC_SHIFT 24
-#define OMAP4_FREF_DR5_SC_MASK (0x3 << 24)
-#define OMAP4_FREF_DR6_SC_SHIFT 22
-#define OMAP4_FREF_DR6_SC_MASK (0x3 << 22)
-#define OMAP4_FREF_DR7_SC_SHIFT 20
-#define OMAP4_FREF_DR7_SC_MASK (0x3 << 20)
-#define OMAP4_GPIO_DR7_SC_SHIFT 18
-#define OMAP4_GPIO_DR7_SC_MASK (0x3 << 18)
-#define OMAP4_DPM_DR0_SC_SHIFT 14
-#define OMAP4_DPM_DR0_SC_MASK (0x3 << 14)
-#define OMAP4_SIM_DR0_SC_SHIFT 12
-#define OMAP4_SIM_DR0_SC_MASK (0x3 << 12)
-
-/* CONTROL_SMART1NOPMIO_PADCONF_1 */
-#define OMAP4_FREF_DR0_LB_SHIFT 30
-#define OMAP4_FREF_DR0_LB_MASK (0x3 << 30)
-#define OMAP4_FREF_DR1_LB_SHIFT 28
-#define OMAP4_FREF_DR1_LB_MASK (0x3 << 28)
-#define OMAP4_FREF_DR4_LB_SHIFT 26
-#define OMAP4_FREF_DR4_LB_MASK (0x3 << 26)
-#define OMAP4_FREF_DR5_LB_SHIFT 24
-#define OMAP4_FREF_DR5_LB_MASK (0x3 << 24)
-#define OMAP4_FREF_DR6_LB_SHIFT 22
-#define OMAP4_FREF_DR6_LB_MASK (0x3 << 22)
-#define OMAP4_FREF_DR7_LB_SHIFT 20
-#define OMAP4_FREF_DR7_LB_MASK (0x3 << 20)
-#define OMAP4_GPIO_DR7_LB_SHIFT 18
-#define OMAP4_GPIO_DR7_LB_MASK (0x3 << 18)
-#define OMAP4_DPM_DR0_LB_SHIFT 14
-#define OMAP4_DPM_DR0_LB_MASK (0x3 << 14)
-#define OMAP4_SIM_DR0_LB_SHIFT 12
-#define OMAP4_SIM_DR0_LB_MASK (0x3 << 12)
-
-/* CONTROL_PADCONF_MODE */
-#define OMAP4_VDDS_DV_FREF_SHIFT 31
-#define OMAP4_VDDS_DV_FREF_MASK (1 << 31)
-#define OMAP4_VDDS_DV_BANK2_SHIFT 30
-#define OMAP4_VDDS_DV_BANK2_MASK (1 << 30)
-
-/* CONTROL_XTAL_OSCILLATOR */
-#define OMAP4_OSCILLATOR_BOOST_SHIFT 31
-#define OMAP4_OSCILLATOR_BOOST_MASK (1 << 31)
-#define OMAP4_OSCILLATOR_OS_OUT_SHIFT 30
-#define OMAP4_OSCILLATOR_OS_OUT_MASK (1 << 30)
-
-/* CONTROL_USIMIO */
-#define OMAP4_PAD_USIM_CLK_LOW_SHIFT 31
-#define OMAP4_PAD_USIM_CLK_LOW_MASK (1 << 31)
-#define OMAP4_PAD_USIM_RST_LOW_SHIFT 29
-#define OMAP4_PAD_USIM_RST_LOW_MASK (1 << 29)
-#define OMAP4_USIM_PWRDNZ_SHIFT 28
-#define OMAP4_USIM_PWRDNZ_MASK (1 << 28)
-
-/* CONTROL_I2C_2 */
-#define OMAP4_SR_SDA_GLFENB_SHIFT 31
-#define OMAP4_SR_SDA_GLFENB_MASK (1 << 31)
-#define OMAP4_SR_SDA_LOAD_BITS_SHIFT 29
-#define OMAP4_SR_SDA_LOAD_BITS_MASK (0x3 << 29)
-#define OMAP4_SR_SDA_PULLUPRESX_SHIFT 28
-#define OMAP4_SR_SDA_PULLUPRESX_MASK (1 << 28)
-#define OMAP4_SR_SCL_GLFENB_SHIFT 27
-#define OMAP4_SR_SCL_GLFENB_MASK (1 << 27)
-#define OMAP4_SR_SCL_LOAD_BITS_SHIFT 25
-#define OMAP4_SR_SCL_LOAD_BITS_MASK (0x3 << 25)
-#define OMAP4_SR_SCL_PULLUPRESX_SHIFT 24
-#define OMAP4_SR_SCL_PULLUPRESX_MASK (1 << 24)
-
-/* CONTROL_JTAG */
-#define OMAP4_JTAG_NTRST_EN_SHIFT 31
-#define OMAP4_JTAG_NTRST_EN_MASK (1 << 31)
-#define OMAP4_JTAG_TCK_EN_SHIFT 30
-#define OMAP4_JTAG_TCK_EN_MASK (1 << 30)
-#define OMAP4_JTAG_RTCK_EN_SHIFT 29
-#define OMAP4_JTAG_RTCK_EN_MASK (1 << 29)
-#define OMAP4_JTAG_TDI_EN_SHIFT 28
-#define OMAP4_JTAG_TDI_EN_MASK (1 << 28)
-#define OMAP4_JTAG_TDO_EN_SHIFT 27
-#define OMAP4_JTAG_TDO_EN_MASK (1 << 27)
-
-/* CONTROL_SYS */
-#define OMAP4_SYS_NRESWARM_PIPU_SHIFT 31
-#define OMAP4_SYS_NRESWARM_PIPU_MASK (1 << 31)
-
-/* WKUP_CONTROL_SPARE_RW */
-#define OMAP4_WKUP_CONTROL_SPARE_RW_SHIFT 0
-#define OMAP4_WKUP_CONTROL_SPARE_RW_MASK (0xffffffff << 0)
-
-/* WKUP_CONTROL_SPARE_R */
-#define OMAP4_WKUP_CONTROL_SPARE_R_SHIFT 0
-#define OMAP4_WKUP_CONTROL_SPARE_R_MASK (0xffffffff << 0)
-
-/* WKUP_CONTROL_SPARE_R_C0 */
-#define OMAP4_WKUP_CONTROL_SPARE_R_C0_SHIFT 31
-#define OMAP4_WKUP_CONTROL_SPARE_R_C0_MASK (1 << 31)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C1_SHIFT 30
-#define OMAP4_WKUP_CONTROL_SPARE_R_C1_MASK (1 << 30)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C2_SHIFT 29
-#define OMAP4_WKUP_CONTROL_SPARE_R_C2_MASK (1 << 29)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C3_SHIFT 28
-#define OMAP4_WKUP_CONTROL_SPARE_R_C3_MASK (1 << 28)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C4_SHIFT 27
-#define OMAP4_WKUP_CONTROL_SPARE_R_C4_MASK (1 << 27)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C5_SHIFT 26
-#define OMAP4_WKUP_CONTROL_SPARE_R_C5_MASK (1 << 26)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C6_SHIFT 25
-#define OMAP4_WKUP_CONTROL_SPARE_R_C6_MASK (1 << 25)
-#define OMAP4_WKUP_CONTROL_SPARE_R_C7_SHIFT 24
-#define OMAP4_WKUP_CONTROL_SPARE_R_C7_MASK (1 << 24)
-
-#endif
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
deleted file mode 100644
index a0af9ba..0000000
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * OMAP44xx CTRL_MODULE_WKUP registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson at ti.com)
- * Santosh Shilimkar (santosh.shilimkar at ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_WKUP_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CTRL_MODULE_WKUP_44XX_H
-
-
-/* Base address */
-#define OMAP4_CTRL_MODULE_WKUP 0x4a30c000
-
-/* Registers offset */
-#define OMAP4_CTRL_MODULE_WKUP_IP_REVISION 0x0000
-#define OMAP4_CTRL_MODULE_WKUP_IP_HWINFO 0x0004
-#define OMAP4_CTRL_MODULE_WKUP_IP_SYSCONFIG 0x0010
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_0 0x0460
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_1 0x0464
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_2 0x0468
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_3 0x046c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_4 0x0470
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_5 0x0474
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_6 0x0478
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_7 0x047c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_8 0x0480
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_9 0x0484
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_10 0x0488
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_11 0x048c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_12 0x0490
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_13 0x0494
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_14 0x0498
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_15 0x049c
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_16 0x04a0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_17 0x04a4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_18 0x04a8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_19 0x04ac
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_20 0x04b0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_21 0x04b4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_22 0x04b8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_23 0x04bc
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_24 0x04c0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_25 0x04c4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_26 0x04c8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_27 0x04cc
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_28 0x04d0
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_29 0x04d4
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_30 0x04d8
-#define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_31 0x04dc
-
-/* Registers shifts and masks */
-
-/* IP_REVISION */
-#define OMAP4_IP_REV_SCHEME_SHIFT 30
-#define OMAP4_IP_REV_SCHEME_MASK (0x3 << 30)
-#define OMAP4_IP_REV_FUNC_SHIFT 16
-#define OMAP4_IP_REV_FUNC_MASK (0xfff << 16)
-#define OMAP4_IP_REV_RTL_SHIFT 11
-#define OMAP4_IP_REV_RTL_MASK (0x1f << 11)
-#define OMAP4_IP_REV_MAJOR_SHIFT 8
-#define OMAP4_IP_REV_MAJOR_MASK (0x7 << 8)
-#define OMAP4_IP_REV_CUSTOM_SHIFT 6
-#define OMAP4_IP_REV_CUSTOM_MASK (0x3 << 6)
-#define OMAP4_IP_REV_MINOR_SHIFT 0
-#define OMAP4_IP_REV_MINOR_MASK (0x3f << 0)
-
-/* IP_HWINFO */
-#define OMAP4_IP_HWINFO_SHIFT 0
-#define OMAP4_IP_HWINFO_MASK (0xffffffff << 0)
-
-/* IP_SYSCONFIG */
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT 2
-#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK (0x3 << 2)
-
-/* CONF_DEBUG_SEL_TST_0 */
-#define OMAP4_WKUP_MODE_SHIFT 0
-#define OMAP4_WKUP_MODE_MASK (1 << 0)
-
-#endif
-- 1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH v2 02/11] ARM: OMAP: expose control.h to mach area
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-06-18 11:32 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin
This patch exposes the definitions under control.h to
drivers outside the machine code.
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/am35xx-emac.c | 2 +-
arch/arm/mach-omap2/board-3430sdp.c | 2 +-
arch/arm/mach-omap2/board-4430sdp.c | 2 +-
arch/arm/mach-omap2/board-am3517crane.c | 2 +-
arch/arm/mach-omap2/board-am3517evm.c | 2 +-
arch/arm/mach-omap2/board-apollon.c | 2 +-
arch/arm/mach-omap2/board-cm-t3517.c | 2 +-
arch/arm/mach-omap2/board-h4.c | 2 +-
arch/arm/mach-omap2/board-igep0020.c | 2 +-
arch/arm/mach-omap2/board-ldp.c | 2 +-
arch/arm/mach-omap2/board-omap3logic.c | 2 +-
arch/arm/mach-omap2/board-omap4panda.c | 2 +-
arch/arm/mach-omap2/board-omap4pcm049.c | 2 +-
arch/arm/mach-omap2/clock2420_data.c | 2 +-
arch/arm/mach-omap2/clock2430_data.c | 2 +-
arch/arm/mach-omap2/clock3xxx_data.c | 2 +-
arch/arm/mach-omap2/clock44xx_data.c | 2 +-
arch/arm/mach-omap2/common.c | 2 +-
arch/arm/mach-omap2/control.c | 2 +-
arch/arm/mach-omap2/cpuidle34xx.c | 2 +-
arch/arm/mach-omap2/devices.c | 2 +-
arch/arm/mach-omap2/display.c | 2 +-
arch/arm/mach-omap2/hsmmc.c | 2 +-
arch/arm/mach-omap2/id.c | 2 +-
arch/arm/mach-omap2/{ => include/mach}/control.h | 2 +-
arch/arm/mach-omap2/mcbsp.c | 2 +-
arch/arm/mach-omap2/mux.c | 2 +-
arch/arm/mach-omap2/omap_phy_internal.c | 2 +-
arch/arm/mach-omap2/opp3xxx_data.c | 2 +-
arch/arm/mach-omap2/opp4xxx_data.c | 2 +-
arch/arm/mach-omap2/pm24xx.c | 2 +-
arch/arm/mach-omap2/pm34xx.c | 2 +-
arch/arm/mach-omap2/prcm.c | 2 +-
arch/arm/mach-omap2/serial.c | 2 +-
arch/arm/mach-omap2/sleep34xx.S | 2 +-
arch/arm/mach-omap2/sr_device.c | 2 +-
arch/arm/mach-omap2/usb-fs.c | 2 +-
arch/arm/mach-omap2/voltage.c | 2 +-
38 files changed, 38 insertions(+), 38 deletions(-)
rename arch/arm/mach-omap2/{ => include/mach}/control.h (99%)
diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c
index 447682c..c3da28a 100644
--- a/arch/arm/mach-omap2/am35xx-emac.c
+++ b/arch/arm/mach-omap2/am35xx-emac.c
@@ -21,7 +21,7 @@
#include <plat/irqs.h>
#include <mach/am35xx.h>
-#include "control.h"
+#include <mach/control.h>
static struct mdio_platform_data am35xx_emac_mdio_pdata;
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 37abb0d..ad1132b 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -46,7 +46,7 @@
#include "sdram-qimonda-hyb18m512160af-6.h"
#include "hsmmc.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#define CONFIG_DISABLE_HFCLK 1
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 94af6cd..8f7f76b 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -47,7 +47,7 @@
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#define ETH_KS8851_IRQ 34
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 3b8a53c..2ad514d 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -32,7 +32,7 @@
#include "am35xx-emac.h"
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#define GPIO_USB_POWER 35
#define GPIO_USB_NRESET 38
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 99790eb..bef6586 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -41,7 +41,7 @@
#include "am35xx-emac.h"
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "hsmmc.h"
#define LCD_PANEL_PWR 176
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 768ece2..bd04fe2 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -44,7 +44,7 @@
#include <video/omap-panel-generic-dpi.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
/* LED & Switch macros */
#define LED0_GPIO13 13
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 9e66e16..1d2b7a3 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -47,7 +47,7 @@
#include <mach/am35xx.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#include "am35xx-emac.h"
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 0bbbabe..623a231 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -43,7 +43,7 @@
#include <video/omap-panel-generic-dpi.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#define H4_FLASH_CS 0
#define H4_SMC91X_CS 1
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 7a27409..ebef044 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -42,7 +42,7 @@
#include "sdram-numonyx-m65kxxxxam.h"
#include "common-board-devices.h"
#include "board-flash.h"
-#include "control.h"
+#include <mach/control.h>
#define IGEP2_SMSC911X_CS 5
#define IGEP2_SMSC911X_GPIO 176
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 1b60495..6383a76 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -50,7 +50,7 @@
#include "board-flash.h"
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#define LDP_SMSC911X_CS 1
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index c008bf8..ca3e075 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -37,7 +37,7 @@
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#include <plat/mux.h>
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 847a857..b1c8517 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -45,7 +45,7 @@
#include <video/omap-panel-tfp410.h>
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#include "common-board-devices.h"
diff --git a/arch/arm/mach-omap2/board-omap4pcm049.c b/arch/arm/mach-omap2/board-omap4pcm049.c
index a95f426..101e984 100644
--- a/arch/arm/mach-omap2/board-omap4pcm049.c
+++ b/arch/arm/mach-omap2/board-omap4pcm049.c
@@ -48,7 +48,7 @@
#include "common.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#include "common-board-devices.h"
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index bace930..f350e96 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -30,7 +30,7 @@
#include "prm-regbits-24xx.h"
#include "cm-regbits-24xx.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
#define OMAP_CM_REGADDR OMAP2420_CM_REGADDR
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 3b4d09a..dd08bcb 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -29,7 +29,7 @@
#include "prm-regbits-24xx.h"
#include "cm-regbits-24xx.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
#define OMAP_CM_REGADDR OMAP2430_CM_REGADDR
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 4e1a3b0..694625f 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -34,7 +34,7 @@
#include "cm-regbits-34xx.h"
#include "prm2xxx_3xxx.h"
#include "prm-regbits-34xx.h"
-#include "control.h"
+#include <mach/control.h>
/*
* clocks
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 2172f66..ce11ee4 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -39,7 +39,7 @@
#include "cm-regbits-44xx.h"
#include "prm44xx.h"
#include "prm-regbits-44xx.h"
-#include "control.h"
+#include <mach/control.h>
#include "scrm44xx.h"
/* OMAP4 modulemode control */
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 8a6953a..3dc94d0 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -25,7 +25,7 @@
#include "iomap.h"
#include "common.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
/* Global address base setup code */
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 08e674b..92e35bf 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -26,7 +26,7 @@
#include "cm2xxx_3xxx.h"
#include "sdrc.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
/* Used by omap3_ctrl_save_padconf() */
#define START_PADCONF_SAVE 0x2
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 207bc1c..7d82c6bb 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -33,7 +33,7 @@
#include "clockdomain.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
#include "common.h"
#ifdef CONFIG_CPU_IDLE
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 7b4b932..152c266 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -34,7 +34,7 @@
#include <plat/omap4-keypad.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "devices.h"
#define L3_MODULES_MAX_LEN 12
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index db5a88a..0681407 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -32,7 +32,7 @@
#include "iomap.h"
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "display.h"
#define DISPC_CONTROL 0x0040
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index be697d4..33b3d62 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -22,7 +22,7 @@
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 0389b32..5bb9746 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -26,7 +26,7 @@
#include <mach/id.h>
-#include "control.h"
+#include <mach/control.h>
static unsigned int omap_revision;
static const char *cpu_rev;
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/include/mach/control.h
similarity index 99%
rename from arch/arm/mach-omap2/control.h
rename to arch/arm/mach-omap2/include/mach/control.h
index dad2903..cf42764 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/include/mach/control.h
@@ -1,5 +1,5 @@
/*
- * arch/arm/mach-omap2/control.h
+ * arch/arm/mach-omap2/include/mach/control.h
*
* OMAP2/3/4 System Control Module definitions
*
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 577cb77..0367035 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -25,7 +25,7 @@
#include <plat/omap_device.h>
#include <linux/pm_runtime.h>
-#include "control.h"
+#include <mach/control.h>
/*
* FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 3268ee2..f23e6618 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -38,7 +38,7 @@
#include <plat/omap_hwmod.h>
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#include "prm.h"
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 4c90477..b2c9253 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -29,7 +29,7 @@
#include <linux/usb.h>
#include <plat/usb.h>
-#include "control.h"
+#include <mach/control.h>
/* OMAP control module register for UTMI PHY */
#define CONTROL_DEV_CONF 0x300
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c
index d95f3f9..6dafdbb 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -21,7 +21,7 @@
#include <plat/cpu.h>
-#include "control.h"
+#include <mach/control.h>
#include "omap_opp_data.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c
index 2293ba2..27f823c 100644
--- a/arch/arm/mach-omap2/opp4xxx_data.c
+++ b/arch/arm/mach-omap2/opp4xxx_data.c
@@ -22,7 +22,7 @@
#include <plat/cpu.h>
-#include "control.h"
+#include <mach/control.h>
#include "omap_opp_data.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index facfffc..7ebca30 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -49,7 +49,7 @@
#include "cm-regbits-24xx.h"
#include "sdrc.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
#include "powerdomain.h"
#include "clockdomain.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 8b43aef..1d2a51c 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -49,7 +49,7 @@
#include "prm2xxx_3xxx.h"
#include "pm.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
/* pm34xx errata defined in pm.h */
u16 pm34xx_errata;
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 480f40a..fff0b09 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -37,7 +37,7 @@
#include "prminst44xx.h"
#include "prm-regbits-24xx.h"
#include "prm-regbits-44xx.h"
-#include "control.h"
+#include <mach/control.h>
void __iomem *prm_base;
void __iomem *cm_base;
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 678dd1d..97b09da5 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -39,7 +39,7 @@
#include "pm.h"
#include "cm2xxx_3xxx.h"
#include "prm-regbits-34xx.h"
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
/*
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 1f62f23..b3f6bfc 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -33,7 +33,7 @@
#include "cm2xxx_3xxx.h"
#include "prm2xxx_3xxx.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
/*
* Registers access definitions
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index a503e1e..48a01f6 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -26,7 +26,7 @@
#include "smartreflex.h"
#include "voltage.h"
-#include "control.h"
+#include <mach/control.h>
#include "pm.h"
static bool sr_enable_on_init;
diff --git a/arch/arm/mach-omap2/usb-fs.c b/arch/arm/mach-omap2/usb-fs.c
index 1481078..94d471c 100644
--- a/arch/arm/mach-omap2/usb-fs.c
+++ b/arch/arm/mach-omap2/usb-fs.c
@@ -32,7 +32,7 @@
#include <plat/usb.h>
#include <plat/board.h>
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 4dc60e8..d2f0644 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -34,7 +34,7 @@
#include "prm44xx.h"
#include "prcm44xx.h"
#include "prminst44xx.h"
-#include "control.h"
+#include <mach/control.h>
#include "voltage.h"
#include "powerdomain.h"
-- 1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH v2 02/11] ARM: OMAP: expose control.h to mach area
@ 2012-06-18 11:32 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: linux-arm-kernel
This patch exposes the definitions under control.h to
drivers outside the machine code.
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/am35xx-emac.c | 2 +-
arch/arm/mach-omap2/board-3430sdp.c | 2 +-
arch/arm/mach-omap2/board-4430sdp.c | 2 +-
arch/arm/mach-omap2/board-am3517crane.c | 2 +-
arch/arm/mach-omap2/board-am3517evm.c | 2 +-
arch/arm/mach-omap2/board-apollon.c | 2 +-
arch/arm/mach-omap2/board-cm-t3517.c | 2 +-
arch/arm/mach-omap2/board-h4.c | 2 +-
arch/arm/mach-omap2/board-igep0020.c | 2 +-
arch/arm/mach-omap2/board-ldp.c | 2 +-
arch/arm/mach-omap2/board-omap3logic.c | 2 +-
arch/arm/mach-omap2/board-omap4panda.c | 2 +-
arch/arm/mach-omap2/board-omap4pcm049.c | 2 +-
arch/arm/mach-omap2/clock2420_data.c | 2 +-
arch/arm/mach-omap2/clock2430_data.c | 2 +-
arch/arm/mach-omap2/clock3xxx_data.c | 2 +-
arch/arm/mach-omap2/clock44xx_data.c | 2 +-
arch/arm/mach-omap2/common.c | 2 +-
arch/arm/mach-omap2/control.c | 2 +-
arch/arm/mach-omap2/cpuidle34xx.c | 2 +-
arch/arm/mach-omap2/devices.c | 2 +-
arch/arm/mach-omap2/display.c | 2 +-
arch/arm/mach-omap2/hsmmc.c | 2 +-
arch/arm/mach-omap2/id.c | 2 +-
arch/arm/mach-omap2/{ => include/mach}/control.h | 2 +-
arch/arm/mach-omap2/mcbsp.c | 2 +-
arch/arm/mach-omap2/mux.c | 2 +-
arch/arm/mach-omap2/omap_phy_internal.c | 2 +-
arch/arm/mach-omap2/opp3xxx_data.c | 2 +-
arch/arm/mach-omap2/opp4xxx_data.c | 2 +-
arch/arm/mach-omap2/pm24xx.c | 2 +-
arch/arm/mach-omap2/pm34xx.c | 2 +-
arch/arm/mach-omap2/prcm.c | 2 +-
arch/arm/mach-omap2/serial.c | 2 +-
arch/arm/mach-omap2/sleep34xx.S | 2 +-
arch/arm/mach-omap2/sr_device.c | 2 +-
arch/arm/mach-omap2/usb-fs.c | 2 +-
arch/arm/mach-omap2/voltage.c | 2 +-
38 files changed, 38 insertions(+), 38 deletions(-)
rename arch/arm/mach-omap2/{ => include/mach}/control.h (99%)
diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c
index 447682c..c3da28a 100644
--- a/arch/arm/mach-omap2/am35xx-emac.c
+++ b/arch/arm/mach-omap2/am35xx-emac.c
@@ -21,7 +21,7 @@
#include <plat/irqs.h>
#include <mach/am35xx.h>
-#include "control.h"
+#include <mach/control.h>
static struct mdio_platform_data am35xx_emac_mdio_pdata;
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 37abb0d..ad1132b 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -46,7 +46,7 @@
#include "sdram-qimonda-hyb18m512160af-6.h"
#include "hsmmc.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#define CONFIG_DISABLE_HFCLK 1
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 94af6cd..8f7f76b 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -47,7 +47,7 @@
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#define ETH_KS8851_IRQ 34
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 3b8a53c..2ad514d 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -32,7 +32,7 @@
#include "am35xx-emac.h"
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#define GPIO_USB_POWER 35
#define GPIO_USB_NRESET 38
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 99790eb..bef6586 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -41,7 +41,7 @@
#include "am35xx-emac.h"
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "hsmmc.h"
#define LCD_PANEL_PWR 176
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 768ece2..bd04fe2 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -44,7 +44,7 @@
#include <video/omap-panel-generic-dpi.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
/* LED & Switch macros */
#define LED0_GPIO13 13
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 9e66e16..1d2b7a3 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -47,7 +47,7 @@
#include <mach/am35xx.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#include "am35xx-emac.h"
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 0bbbabe..623a231 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -43,7 +43,7 @@
#include <video/omap-panel-generic-dpi.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#define H4_FLASH_CS 0
#define H4_SMC91X_CS 1
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 7a27409..ebef044 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -42,7 +42,7 @@
#include "sdram-numonyx-m65kxxxxam.h"
#include "common-board-devices.h"
#include "board-flash.h"
-#include "control.h"
+#include <mach/control.h>
#define IGEP2_SMSC911X_CS 5
#define IGEP2_SMSC911X_GPIO 176
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 1b60495..6383a76 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -50,7 +50,7 @@
#include "board-flash.h"
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#define LDP_SMSC911X_CS 1
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index c008bf8..ca3e075 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -37,7 +37,7 @@
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "common-board-devices.h"
#include <plat/mux.h>
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 847a857..b1c8517 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -45,7 +45,7 @@
#include <video/omap-panel-tfp410.h>
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#include "common-board-devices.h"
diff --git a/arch/arm/mach-omap2/board-omap4pcm049.c b/arch/arm/mach-omap2/board-omap4pcm049.c
index a95f426..101e984 100644
--- a/arch/arm/mach-omap2/board-omap4pcm049.c
+++ b/arch/arm/mach-omap2/board-omap4pcm049.c
@@ -48,7 +48,7 @@
#include "common.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#include "common-board-devices.h"
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index bace930..f350e96 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -30,7 +30,7 @@
#include "prm-regbits-24xx.h"
#include "cm-regbits-24xx.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
#define OMAP_CM_REGADDR OMAP2420_CM_REGADDR
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 3b4d09a..dd08bcb 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -29,7 +29,7 @@
#include "prm-regbits-24xx.h"
#include "cm-regbits-24xx.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
#define OMAP_CM_REGADDR OMAP2430_CM_REGADDR
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 4e1a3b0..694625f 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -34,7 +34,7 @@
#include "cm-regbits-34xx.h"
#include "prm2xxx_3xxx.h"
#include "prm-regbits-34xx.h"
-#include "control.h"
+#include <mach/control.h>
/*
* clocks
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 2172f66..ce11ee4 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -39,7 +39,7 @@
#include "cm-regbits-44xx.h"
#include "prm44xx.h"
#include "prm-regbits-44xx.h"
-#include "control.h"
+#include <mach/control.h>
#include "scrm44xx.h"
/* OMAP4 modulemode control */
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 8a6953a..3dc94d0 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -25,7 +25,7 @@
#include "iomap.h"
#include "common.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
/* Global address base setup code */
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 08e674b..92e35bf 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -26,7 +26,7 @@
#include "cm2xxx_3xxx.h"
#include "sdrc.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
/* Used by omap3_ctrl_save_padconf() */
#define START_PADCONF_SAVE 0x2
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 207bc1c..7d82c6bb 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -33,7 +33,7 @@
#include "clockdomain.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
#include "common.h"
#ifdef CONFIG_CPU_IDLE
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 7b4b932..152c266 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -34,7 +34,7 @@
#include <plat/omap4-keypad.h>
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "devices.h"
#define L3_MODULES_MAX_LEN 12
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index db5a88a..0681407 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -32,7 +32,7 @@
#include "iomap.h"
#include "mux.h"
-#include "control.h"
+#include <mach/control.h>
#include "display.h"
#define DISPC_CONTROL 0x0040
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index be697d4..33b3d62 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -22,7 +22,7 @@
#include "mux.h"
#include "hsmmc.h"
-#include "control.h"
+#include <mach/control.h>
#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 0389b32..5bb9746 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -26,7 +26,7 @@
#include <mach/id.h>
-#include "control.h"
+#include <mach/control.h>
static unsigned int omap_revision;
static const char *cpu_rev;
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/include/mach/control.h
similarity index 99%
rename from arch/arm/mach-omap2/control.h
rename to arch/arm/mach-omap2/include/mach/control.h
index dad2903..cf42764 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/include/mach/control.h
@@ -1,5 +1,5 @@
/*
- * arch/arm/mach-omap2/control.h
+ * arch/arm/mach-omap2/include/mach/control.h
*
* OMAP2/3/4 System Control Module definitions
*
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 577cb77..0367035 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -25,7 +25,7 @@
#include <plat/omap_device.h>
#include <linux/pm_runtime.h>
-#include "control.h"
+#include <mach/control.h>
/*
* FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 3268ee2..f23e6618 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -38,7 +38,7 @@
#include <plat/omap_hwmod.h>
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#include "prm.h"
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 4c90477..b2c9253 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -29,7 +29,7 @@
#include <linux/usb.h>
#include <plat/usb.h>
-#include "control.h"
+#include <mach/control.h>
/* OMAP control module register for UTMI PHY */
#define CONTROL_DEV_CONF 0x300
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c
index d95f3f9..6dafdbb 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -21,7 +21,7 @@
#include <plat/cpu.h>
-#include "control.h"
+#include <mach/control.h>
#include "omap_opp_data.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c
index 2293ba2..27f823c 100644
--- a/arch/arm/mach-omap2/opp4xxx_data.c
+++ b/arch/arm/mach-omap2/opp4xxx_data.c
@@ -22,7 +22,7 @@
#include <plat/cpu.h>
-#include "control.h"
+#include <mach/control.h>
#include "omap_opp_data.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index facfffc..7ebca30 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -49,7 +49,7 @@
#include "cm-regbits-24xx.h"
#include "sdrc.h"
#include "pm.h"
-#include "control.h"
+#include <mach/control.h>
#include "powerdomain.h"
#include "clockdomain.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 8b43aef..1d2a51c 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -49,7 +49,7 @@
#include "prm2xxx_3xxx.h"
#include "pm.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
/* pm34xx errata defined in pm.h */
u16 pm34xx_errata;
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 480f40a..fff0b09 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -37,7 +37,7 @@
#include "prminst44xx.h"
#include "prm-regbits-24xx.h"
#include "prm-regbits-44xx.h"
-#include "control.h"
+#include <mach/control.h>
void __iomem *prm_base;
void __iomem *cm_base;
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 678dd1d..97b09da5 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -39,7 +39,7 @@
#include "pm.h"
#include "cm2xxx_3xxx.h"
#include "prm-regbits-34xx.h"
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
/*
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 1f62f23..b3f6bfc 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -33,7 +33,7 @@
#include "cm2xxx_3xxx.h"
#include "prm2xxx_3xxx.h"
#include "sdrc.h"
-#include "control.h"
+#include <mach/control.h>
/*
* Registers access definitions
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index a503e1e..48a01f6 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -26,7 +26,7 @@
#include "smartreflex.h"
#include "voltage.h"
-#include "control.h"
+#include <mach/control.h>
#include "pm.h"
static bool sr_enable_on_init;
diff --git a/arch/arm/mach-omap2/usb-fs.c b/arch/arm/mach-omap2/usb-fs.c
index 1481078..94d471c 100644
--- a/arch/arm/mach-omap2/usb-fs.c
+++ b/arch/arm/mach-omap2/usb-fs.c
@@ -32,7 +32,7 @@
#include <plat/usb.h>
#include <plat/board.h>
-#include "control.h"
+#include <mach/control.h>
#include "mux.h"
#define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 4dc60e8..d2f0644 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -34,7 +34,7 @@
#include "prm44xx.h"
#include "prcm44xx.h"
#include "prminst44xx.h"
-#include "control.h"
+#include <mach/control.h>
#include "voltage.h"
#include "powerdomain.h"
-- 1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH v2 03/11] mfd: omap: control: core system control driver
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-06-18 11:32 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin, J Keerthy
This patch introduces a MFD core device driver for
OMAP system control module.
The control module allows software control of
various static modes supported by the device. It is
composed of two control submodules: general control
module and device (padconfiguration) control
module.
Changes since previous version:
- omap-control-core: driver is basically the same as arch/arm/mach-omap2/control.c, but resources aren't hardcoded, they are specified in dts file.
- omap-control-core: Control module is a built-in driver - added control module select to ARCH_HAS_CONTROL_MODULE and ARCH_OMAP4.
Probably, no configuration option is required!
- omap-control-core: Added early init call that ioremaps control module IOMEM window, this allows
omap-control-core.c API to be called very early, for example from omap_type()
- omap-control-core: Removed device pointer from omap-control-core API arguments, becuase there can be only one instance control
module device.
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
Documentation/devicetree/bindings/mfd/omap_control.txt | 44 +++++
arch/arm/mach-omap2/Kconfig | 1
arch/arm/plat-omap/Kconfig | 4
drivers/mfd/Kconfig | 9 +
drivers/mfd/Makefile | 1
drivers/mfd/omap-control-core.c | 141 +++++++++++++++++
include/linux/mfd/omap_control.h | 70 ++++++++
7 files changed, 270 insertions(+)
Index: linux-2.6/Documentation/devicetree/bindings/mfd/omap_control.txt
===================================================================
--- /dev/null
+++ linux-2.6/Documentation/devicetree/bindings/mfd/omap_control.txt
@@ -0,0 +1,44 @@
+* Texas Instrument OMAP System Control Module (SCM) bindings
+
+The control module allows software control of various static modes supported by
+the device. The control module controls the settings of various device modules
+through register configuration and internal signals. It also controls the pad
+configuration, pin functional multiplexing, and the routing of internal signals
+(such as PRCM signals or DMA requests) to output pins configured for hardware
+observability.
+
+Required properties:
+- compatible : Should be:
+ - "ti,omap3-control" for OMAP3 support
+ - "ti,omap4-control" for OMAP4 support
+ - "ti,omap5-control" for OMAP5 support
+
+OMAP specific properties:
+- ti,hwmods: Name of the hwmod associated to the control module:
+ Should be "ctrl_module_core";
+
+Sub-nodes:
+- bandgap : contains the bandgap node
+
+ The bindings details of individual bandgap device can be found in:
+ Documentation/devicetree/bindings/thermal/omap_bandgap.txt
+
+- usb : contains the usb phy pin control node
+
+ The only required property for this child is:
+ - compatible = "ti,omap4-control-usb";
+
+Examples:
+
+ctrl_module_core: ctrl_module_core@4a002000 {
+ compatible = "ti,omap4-control";
+ ti,hwmods = "ctrl_module_core";
+ bandgap {
+ compatible = "ti,omap4460-bandgap";
+ interrupts = <0 126 4>; /* talert */
+ ti,tshut-gpio = <86>; /* tshut */
+ };
+ usb {
+ compatible = "ti,omap4-usb-phy";
+ };
+};
Index: linux-2.6/arch/arm/mach-omap2/Kconfig
===================================================================
--- linux-2.6.orig/arch/arm/mach-omap2/Kconfig
+++ linux-2.6/arch/arm/mach-omap2/Kconfig
@@ -52,6 +52,7 @@ config ARCH_OMAP4
select PL310_ERRATA_727915
select ARM_ERRATA_720789
select ARCH_HAS_OPP
+ select ARCH_HAS_CONTROL_MODULE
select PM_OPP if PM
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select ARM_CPU_SUSPEND if PM
Index: linux-2.6/arch/arm/plat-omap/Kconfig
===================================================================
--- linux-2.6.orig/arch/arm/plat-omap/Kconfig
+++ linux-2.6/arch/arm/plat-omap/Kconfig
@@ -5,6 +5,10 @@ menu "TI OMAP Common Features"
config ARCH_OMAP_OTG
bool
+config ARCH_HAS_CONTROL_MODULE
+ bool
+ select MFD_OMAP_CONTROL
+
choice
prompt "OMAP System Type"
default ARCH_OMAP2PLUS
Index: linux-2.6/drivers/mfd/Kconfig
===================================================================
--- linux-2.6.orig/drivers/mfd/Kconfig
+++ linux-2.6/drivers/mfd/Kconfig
@@ -822,6 +822,15 @@ config MFD_WL1273_CORE
driver connects the radio-wl1273 V4L2 module and the wl1273
audio codec.
+config MFD_OMAP_CONTROL
+ bool "Texas Instruments OMAP System control module"
+ depends on ARCH_HAS_CONTROL_MODULE
+ help
+ This is the core driver for system control module. This driver
+ is responsible for creating the control module mfd child,
+ like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
+ change for off mode.
+
config MFD_OMAP_USB_HOST
bool "Support OMAP USBHS core driver"
depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
Index: linux-2.6/drivers/mfd/Makefile
===================================================================
--- linux-2.6.orig/drivers/mfd/Makefile
+++ linux-2.6/drivers/mfd/Makefile
@@ -107,6 +107,7 @@ obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
obj-$(CONFIG_MFD_VX855) += vx855.o
obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
+obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
Index: linux-2.6/drivers/mfd/omap-control-core.c
===================================================================
--- /dev/null
+++ linux-2.6/drivers/mfd/omap-control-core.c
@@ -0,0 +1,141 @@
+/*
+ * OMAP system control module driver file
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Contacts:
+ * Based on original code written by:
+ * J Keerthy <j-keerthy@ti.com>
+ * Moiz Sonasath <m-sonasath@ti.com>
+ * MFD clean up and re-factoring:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/export.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/err.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/omap_control.h>
+
+#include <linux/of.h>
+#include <linux/of_address.h>
+
+void __iomem *omap_control_base;
+
+void __iomem *omap_control_get(void)
+{
+ return omap_control_base;
+}
+
+u32 omap_control_readl(u16 offset)
+{
+ return __raw_readl(omap_control_base + (offset));
+}
+
+void omap_control_writel(u32 val, u16 offset)
+{
+ __raw_writel(val, omap_control_base + (offset));
+}
+
+static const struct of_device_id of_omap_control_match[] = {
+ { .compatible = "ti,omap3-control", },
+ { .compatible = "ti,omap4-control", },
+ { .compatible = "ti,omap5-control", },
+ { },
+};
+
+static int __devinit omap_control_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+
+ /*
+ * Build child defvices of ctrl_module_core
+ */
+ return of_platform_populate(np, of_omap_control_match, NULL, dev);
+}
+
+
+static struct platform_driver omap_control_driver = {
+ .probe = omap_control_probe,
+ .driver = {
+ .name = "omap-control-core",
+ .owner = THIS_MODULE,
+ .of_match_table = of_omap_control_match,
+ },
+};
+
+int __init omap_control_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ struct resource res;
+
+ if (WARN_ON(!node))
+ return -ENODEV;
+
+ if (of_address_to_resource(node, 0, &res)) {
+ WARN(1, "unable to get intc registers\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+void __init of_omap_control_init(const struct of_device_id *matches)
+{
+ struct device_node *np;
+ struct property *pp = 0;
+ unsigned long phys_base = 0;
+ size_t mapsize = 0;
+
+ for_each_matching_node(np, matches) {
+
+ pp = of_find_property(np, "reg", NULL);
+ if(pp) {
+ phys_base = (unsigned long)be32_to_cpup(pp->value);
+ mapsize = (size_t)be32_to_cpup( (void*)((char*)pp->value + 4) );
+ omap_control_base = ioremap(phys_base, mapsize);
+ }
+ }
+}
+
+static int __init
+omap_control_early_initcall(void)
+{
+ of_omap_control_init(of_omap_control_match);
+
+ return 0;
+}
+early_initcall(omap_control_early_initcall);
+
+static int __init omap_control_init(void)
+{
+ return platform_driver_register(&omap_control_driver);
+}
+postcore_initcall_sync(omap_control_init);
+
+static void __exit omap_control_exit(void)
+{
+ platform_driver_unregister(&omap_control_driver);
+}
+module_exit(omap_control_exit);
+early_platform_init("early_omap_control", &omap_control_driver);
+
+MODULE_DESCRIPTION("OMAP system control module driver");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:omap-control-core");
+MODULE_AUTHOR("Texas Instruments Inc.");
Index: linux-2.6/include/linux/mfd/omap_control.h
===================================================================
--- /dev/null
+++ linux-2.6/include/linux/mfd/omap_control.h
@@ -0,0 +1,70 @@
+/*
+ * OMAP system control module header file
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Contact:
+ * J Keerthy <j-keerthy@ti.com>
+ * Moiz Sonasath <m-sonasath@ti.com>
+ * Abraham, Kishon Vijay <kishon@ti.com>
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ */
+
+#ifndef __DRIVERS_OMAP_CONTROL_H
+#define __DRIVERS_OMAP_CONTROL_H
+
+#include <linux/err.h>
+
+/**
+ * struct system control module - scm device structure
+ * @dev: device pointer
+ * @base: Base of the temp I/O
+ * @reg_lock: protect omap_control structure
+ * @use_count: track API users
+ */
+struct omap_control {
+ struct device *dev;
+ void __iomem *base;
+ /* protect this data structure and register access */
+ spinlock_t reg_lock;
+ int use_count;
+};
+
+/* TODO: Add helpers for 16bit and byte access */
+#ifdef CONFIG_MFD_OMAP_CONTROL
+void __iomem *omap_control_get(void);
+u32 omap_control_readl(u16 offset);
+void omap_control_writel(u32 val, u16 offset);
+
+extern void omap_control_put(struct device *dev);
+#else
+static inline int omap_control_readl(struct device *dev, u32 reg, u32 *val)
+{
+ return 0;
+}
+
+static inline int omap_control_writel(struct device *dev, u32 val, u32 reg)
+{
+ return 0;
+}
+
+static inline struct device *omap_control_get(void)
+{
+ return ERR_PTR(-EINVAL);
+}
+
+static inline void omap_control_put(struct device *dev)
+{
+}
+#endif
+
+#endif /* __DRIVERS_OMAP_CONTROL_H */
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 03/11] mfd: omap: control: core system control driver
@ 2012-06-18 11:32 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: linux-arm-kernel
This patch introduces a MFD core device driver for
OMAP system control module.
The control module allows software control of
various static modes supported by the device. It is
composed of two control submodules: general control
module and device (padconfiguration) control
module.
Changes since previous version:
- omap-control-core: driver is basically the same as arch/arm/mach-omap2/control.c, but resources aren't hardcoded, they are specified in dts file.
- omap-control-core: Control module is a built-in driver - added control module select to ARCH_HAS_CONTROL_MODULE and ARCH_OMAP4.
Probably, no configuration option is required!
- omap-control-core: Added early init call that ioremaps control module IOMEM window, this allows
omap-control-core.c API to be called very early, for example from omap_type()
- omap-control-core: Removed device pointer from omap-control-core API arguments, becuase there can be only one instance control
module device.
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
Documentation/devicetree/bindings/mfd/omap_control.txt | 44 +++++
arch/arm/mach-omap2/Kconfig | 1
arch/arm/plat-omap/Kconfig | 4
drivers/mfd/Kconfig | 9 +
drivers/mfd/Makefile | 1
drivers/mfd/omap-control-core.c | 141 +++++++++++++++++
include/linux/mfd/omap_control.h | 70 ++++++++
7 files changed, 270 insertions(+)
Index: linux-2.6/Documentation/devicetree/bindings/mfd/omap_control.txt
===================================================================
--- /dev/null
+++ linux-2.6/Documentation/devicetree/bindings/mfd/omap_control.txt
@@ -0,0 +1,44 @@
+* Texas Instrument OMAP System Control Module (SCM) bindings
+
+The control module allows software control of various static modes supported by
+the device. The control module controls the settings of various device modules
+through register configuration and internal signals. It also controls the pad
+configuration, pin functional multiplexing, and the routing of internal signals
+(such as PRCM signals or DMA requests) to output pins configured for hardware
+observability.
+
+Required properties:
+- compatible : Should be:
+ - "ti,omap3-control" for OMAP3 support
+ - "ti,omap4-control" for OMAP4 support
+ - "ti,omap5-control" for OMAP5 support
+
+OMAP specific properties:
+- ti,hwmods: Name of the hwmod associated to the control module:
+ Should be "ctrl_module_core";
+
+Sub-nodes:
+- bandgap : contains the bandgap node
+
+ The bindings details of individual bandgap device can be found in:
+ Documentation/devicetree/bindings/thermal/omap_bandgap.txt
+
+- usb : contains the usb phy pin control node
+
+ The only required property for this child is:
+ - compatible = "ti,omap4-control-usb";
+
+Examples:
+
+ctrl_module_core: ctrl_module_core at 4a002000 {
+ compatible = "ti,omap4-control";
+ ti,hwmods = "ctrl_module_core";
+ bandgap {
+ compatible = "ti,omap4460-bandgap";
+ interrupts = <0 126 4>; /* talert */
+ ti,tshut-gpio = <86>; /* tshut */
+ };
+ usb {
+ compatible = "ti,omap4-usb-phy";
+ };
+};
Index: linux-2.6/arch/arm/mach-omap2/Kconfig
===================================================================
--- linux-2.6.orig/arch/arm/mach-omap2/Kconfig
+++ linux-2.6/arch/arm/mach-omap2/Kconfig
@@ -52,6 +52,7 @@ config ARCH_OMAP4
select PL310_ERRATA_727915
select ARM_ERRATA_720789
select ARCH_HAS_OPP
+ select ARCH_HAS_CONTROL_MODULE
select PM_OPP if PM
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select ARM_CPU_SUSPEND if PM
Index: linux-2.6/arch/arm/plat-omap/Kconfig
===================================================================
--- linux-2.6.orig/arch/arm/plat-omap/Kconfig
+++ linux-2.6/arch/arm/plat-omap/Kconfig
@@ -5,6 +5,10 @@ menu "TI OMAP Common Features"
config ARCH_OMAP_OTG
bool
+config ARCH_HAS_CONTROL_MODULE
+ bool
+ select MFD_OMAP_CONTROL
+
choice
prompt "OMAP System Type"
default ARCH_OMAP2PLUS
Index: linux-2.6/drivers/mfd/Kconfig
===================================================================
--- linux-2.6.orig/drivers/mfd/Kconfig
+++ linux-2.6/drivers/mfd/Kconfig
@@ -822,6 +822,15 @@ config MFD_WL1273_CORE
driver connects the radio-wl1273 V4L2 module and the wl1273
audio codec.
+config MFD_OMAP_CONTROL
+ bool "Texas Instruments OMAP System control module"
+ depends on ARCH_HAS_CONTROL_MODULE
+ help
+ This is the core driver for system control module. This driver
+ is responsible for creating the control module mfd child,
+ like USB-pin control, pin muxing, MMC-pbias and DDR IO dynamic
+ change for off mode.
+
config MFD_OMAP_USB_HOST
bool "Support OMAP USBHS core driver"
depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
Index: linux-2.6/drivers/mfd/Makefile
===================================================================
--- linux-2.6.orig/drivers/mfd/Makefile
+++ linux-2.6/drivers/mfd/Makefile
@@ -107,6 +107,7 @@ obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
obj-$(CONFIG_MFD_VX855) += vx855.o
obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
+obj-$(CONFIG_MFD_OMAP_CONTROL) += omap-control-core.o
obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
Index: linux-2.6/drivers/mfd/omap-control-core.c
===================================================================
--- /dev/null
+++ linux-2.6/drivers/mfd/omap-control-core.c
@@ -0,0 +1,141 @@
+/*
+ * OMAP system control module driver file
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Contacts:
+ * Based on original code written by:
+ * J Keerthy <j-keerthy@ti.com>
+ * Moiz Sonasath <m-sonasath@ti.com>
+ * MFD clean up and re-factoring:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/export.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/err.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/omap_control.h>
+
+#include <linux/of.h>
+#include <linux/of_address.h>
+
+void __iomem *omap_control_base;
+
+void __iomem *omap_control_get(void)
+{
+ return omap_control_base;
+}
+
+u32 omap_control_readl(u16 offset)
+{
+ return __raw_readl(omap_control_base + (offset));
+}
+
+void omap_control_writel(u32 val, u16 offset)
+{
+ __raw_writel(val, omap_control_base + (offset));
+}
+
+static const struct of_device_id of_omap_control_match[] = {
+ { .compatible = "ti,omap3-control", },
+ { .compatible = "ti,omap4-control", },
+ { .compatible = "ti,omap5-control", },
+ { },
+};
+
+static int __devinit omap_control_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+
+ /*
+ * Build child defvices of ctrl_module_core
+ */
+ return of_platform_populate(np, of_omap_control_match, NULL, dev);
+}
+
+
+static struct platform_driver omap_control_driver = {
+ .probe = omap_control_probe,
+ .driver = {
+ .name = "omap-control-core",
+ .owner = THIS_MODULE,
+ .of_match_table = of_omap_control_match,
+ },
+};
+
+int __init omap_control_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ struct resource res;
+
+ if (WARN_ON(!node))
+ return -ENODEV;
+
+ if (of_address_to_resource(node, 0, &res)) {
+ WARN(1, "unable to get intc registers\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+void __init of_omap_control_init(const struct of_device_id *matches)
+{
+ struct device_node *np;
+ struct property *pp = 0;
+ unsigned long phys_base = 0;
+ size_t mapsize = 0;
+
+ for_each_matching_node(np, matches) {
+
+ pp = of_find_property(np, "reg", NULL);
+ if(pp) {
+ phys_base = (unsigned long)be32_to_cpup(pp->value);
+ mapsize = (size_t)be32_to_cpup( (void*)((char*)pp->value + 4) );
+ omap_control_base = ioremap(phys_base, mapsize);
+ }
+ }
+}
+
+static int __init
+omap_control_early_initcall(void)
+{
+ of_omap_control_init(of_omap_control_match);
+
+ return 0;
+}
+early_initcall(omap_control_early_initcall);
+
+static int __init omap_control_init(void)
+{
+ return platform_driver_register(&omap_control_driver);
+}
+postcore_initcall_sync(omap_control_init);
+
+static void __exit omap_control_exit(void)
+{
+ platform_driver_unregister(&omap_control_driver);
+}
+module_exit(omap_control_exit);
+early_platform_init("early_omap_control", &omap_control_driver);
+
+MODULE_DESCRIPTION("OMAP system control module driver");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:omap-control-core");
+MODULE_AUTHOR("Texas Instruments Inc.");
Index: linux-2.6/include/linux/mfd/omap_control.h
===================================================================
--- /dev/null
+++ linux-2.6/include/linux/mfd/omap_control.h
@@ -0,0 +1,70 @@
+/*
+ * OMAP system control module header file
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Contact:
+ * J Keerthy <j-keerthy@ti.com>
+ * Moiz Sonasath <m-sonasath@ti.com>
+ * Abraham, Kishon Vijay <kishon@ti.com>
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ */
+
+#ifndef __DRIVERS_OMAP_CONTROL_H
+#define __DRIVERS_OMAP_CONTROL_H
+
+#include <linux/err.h>
+
+/**
+ * struct system control module - scm device structure
+ * @dev: device pointer
+ * @base: Base of the temp I/O
+ * @reg_lock: protect omap_control structure
+ * @use_count: track API users
+ */
+struct omap_control {
+ struct device *dev;
+ void __iomem *base;
+ /* protect this data structure and register access */
+ spinlock_t reg_lock;
+ int use_count;
+};
+
+/* TODO: Add helpers for 16bit and byte access */
+#ifdef CONFIG_MFD_OMAP_CONTROL
+void __iomem *omap_control_get(void);
+u32 omap_control_readl(u16 offset);
+void omap_control_writel(u32 val, u16 offset);
+
+extern void omap_control_put(struct device *dev);
+#else
+static inline int omap_control_readl(struct device *dev, u32 reg, u32 *val)
+{
+ return 0;
+}
+
+static inline int omap_control_writel(struct device *dev, u32 val, u32 reg)
+{
+ return 0;
+}
+
+static inline struct device *omap_control_get(void)
+{
+ return ERR_PTR(-EINVAL);
+}
+
+static inline void omap_control_put(struct device *dev)
+{
+}
+#endif
+
+#endif /* __DRIVERS_OMAP_CONTROL_H */
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 04/11] OMAP2+: use control module mfd driver in omap_type
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-06-18 11:32 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin
OMAP system control module can be probed early, then
omap_type is safe to use its APIs.
TODO: add support for other omap versions
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
---
arch/arm/mach-omap2/id.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
Index: linux-2.6/arch/arm/mach-omap2/id.c
===================================================================
--- linux-2.6.orig/arch/arm/mach-omap2/id.c
+++ linux-2.6/arch/arm/mach-omap2/id.c
@@ -18,6 +18,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
+#include <linux/mfd/omap_control.h>
#include <asm/cputype.h>
@@ -38,6 +39,8 @@ unsigned int omap_rev(void)
}
EXPORT_SYMBOL(omap_rev);
+u32 omap_control_readl(u16 offset);
+
int omap_type(void)
{
u32 val = 0;
@@ -49,7 +52,7 @@ int omap_type(void)
} else if (cpu_is_omap34xx()) {
val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
} else if (cpu_is_omap44xx()) {
- val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
+ val = omap_control_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
} else {
pr_err("Cannot detect omap type!\n");
goto out;
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 04/11] OMAP2+: use control module mfd driver in omap_type
@ 2012-06-18 11:32 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: linux-arm-kernel
OMAP system control module can be probed early, then
omap_type is safe to use its APIs.
TODO: add support for other omap versions
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
---
arch/arm/mach-omap2/id.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
Index: linux-2.6/arch/arm/mach-omap2/id.c
===================================================================
--- linux-2.6.orig/arch/arm/mach-omap2/id.c
+++ linux-2.6/arch/arm/mach-omap2/id.c
@@ -18,6 +18,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
+#include <linux/mfd/omap_control.h>
#include <asm/cputype.h>
@@ -38,6 +39,8 @@ unsigned int omap_rev(void)
}
EXPORT_SYMBOL(omap_rev);
+u32 omap_control_readl(u16 offset);
+
int omap_type(void)
{
u32 val = 0;
@@ -49,7 +52,7 @@ int omap_type(void)
} else if (cpu_is_omap34xx()) {
val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
} else if (cpu_is_omap44xx()) {
- val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
+ val = omap_control_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
} else {
pr_err("Cannot detect omap type!\n");
goto out;
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 05/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-06-18 11:32 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin
Created a new platform driver for the platform device created by the
control module mfd core, wrt usb. This driver has API's to power on/off
the phy and the API's to write to musb mailbox.
Changes since previous version:
- Bandgap and usb phy: drivers are now independent from control module driver, they use their own API functions.
Dependency was removed from Kconfig.
- Bandgap and usb phy: Added private spinlocks for bandgap and usb drivers.
(p.s. the mailbox for musb in omap4 is present in system control
module)
[kishon@ti.com: wrote the original API's related to USB functions]
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
drivers/usb/otg/Kconfig | 12 ++
drivers/usb/otg/Makefile | 1
drivers/usb/otg/omap4-usb-phy.c | 167 ++++++++++++++++++++++++++++++++++++++
include/linux/usb/omap4_usb_phy.h | 53 ++++++++++++
4 files changed, 233 insertions(+)
Index: linux-2.6/drivers/usb/otg/Kconfig
===================================================================
--- linux-2.6.orig/drivers/usb/otg/Kconfig
+++ linux-2.6/drivers/usb/otg/Kconfig
@@ -78,6 +78,18 @@ config TWL6030_USB
are hooked to this driver through platform_data structure.
The definition of internal PHY APIs are in the mach-omap2 layer.
+config OMAP4_USB_PHY
+ tristate "Texas Instruments OMAP4+ USB pin control driver"
+ help
+ If you say yes here you get support for the Texas Instruments
+ OMAP4+ USB pin control driver. The register set is part of system
+ control module.
+
+ USB phy in OMAP configures control module register for powering on
+ the phy, configuring VBUSVALID, AVALID, IDDIG and SESSEND. For
+ performing the above mentioned configuration, API's are added in
+ by this children of the control module driver.
+
config NOP_USB_XCEIV
tristate "NOP USB Transceiver Driver"
select USB_OTG_UTILS
Index: linux-2.6/drivers/usb/otg/Makefile
===================================================================
--- linux-2.6.orig/drivers/usb/otg/Makefile
+++ linux-2.6/drivers/usb/otg/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_USB_GPIO_VBUS) += gpio_vbus
obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o
obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o
obj-$(CONFIG_TWL6030_USB) += twl6030-usb.o
+obj-$(CONFIG_OMAP4_USB_PHY) += omap4-usb-phy.o
obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o
obj-$(CONFIG_USB_ULPI) += ulpi.o
obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi_viewport.o
Index: linux-2.6/drivers/usb/otg/omap4-usb-phy.c
===================================================================
--- /dev/null
+++ linux-2.6/drivers/usb/otg/omap4-usb-phy.c
@@ -0,0 +1,167 @@
+/*
+ * OMAP4 system control module driver, USB control children
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Contact:
+ * Kishon Vijay Abraham I <kishon@ti.com>
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/usb/omap4_usb_phy.h>
+
+void __iomem *omap_usb_phy_base;
+spinlock_t omap_usb_phy_lock;
+
+static int omap_usb_phy_readl(u32 reg, u32 *val)
+{
+ if (!omap_usb_phy_base)
+ return -EINVAL;
+
+ *val = __raw_readl(omap_usb_phy_base + reg);
+ return 0;
+}
+
+/*
+ * TODO: Get rid from omap_usb_phy_writel() return value -
+ * It's useless.
+ */
+static int omap_usb_phy_writel(u32 val, u32 reg)
+{
+ unsigned long flags;
+
+ if (!omap_usb_phy_base)
+ return -EINVAL;
+
+ spin_lock_irqsave(&omap_usb_phy_lock, flags);
+ __raw_writel(val, omap_usb_phy_base + reg);
+ spin_unlock_irqrestore(&omap_usb_phy_lock, flags);
+ return 0;
+}
+
+/**
+ * omap4_usb_phy_power - power on/off the phy using control module reg
+ * @dev: struct device *
+ * @on: 0 or 1, based on powering on or off the PHY
+ *
+ * omap_usb2 can call this API to power on or off the PHY.
+ */
+int omap4_usb_phy_power(struct device *dev, int on)
+{
+ u32 val;
+ int ret;
+
+ if (on) {
+ ret = omap_usb_phy_readl(CONTROL_DEV_CONF, &val);
+ if (!ret && (val & PHY_PD)) {
+ ret = omap_usb_phy_writel(~PHY_PD,
+ CONTROL_DEV_CONF);
+ /* XXX: add proper documentation for this delay */
+ mdelay(200);
+ }
+ } else
+ ret = omap_usb_phy_writel(PHY_PD, CONTROL_DEV_CONF);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
+
+/**
+ * omap4_usb_phy_mailbox - write to usb otg mailbox
+ * @dev: struct device *
+ * @val: the value to be written to the mailbox
+ *
+ * On detection of a device (ID pin is grounded), the phy should call this API
+ * to set AVALID, VBUSVALID and ID pin is grounded.
+ *
+ * When OMAP is connected to a host (OMAP in device mode), the phy should call
+ * this API to set AVALID, VBUSVALID and ID pin in high impedance.
+ *
+ * The phy should call this API, if OMAP is disconnected from host or device.
+ */
+int omap4_usb_phy_mailbox(struct device *dev, u32 val)
+{
+ return omap_usb_phy_writel(val, CONTROL_USBOTGHS_CONTROL);
+}
+EXPORT_SYMBOL_GPL(omap4_usb_phy_mailbox);
+
+static int __devinit omap_usb_phy_probe(struct platform_device *pdev)
+{
+ struct resource *io_res;
+
+// printk("\n\t\t **** omap_usb_phy_probe(): enter ");
+
+ io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!io_res)
+ return -ENOENT;
+
+// printk("\n\t\t **** omap_usb_phy_probe(): start %x ", io_res->start);
+// printk("\n\t\t **** omap_usb_phy_probe(): size %x ", resource_size(io_res));
+ omap_usb_phy_base = ioremap(io_res->start, resource_size(io_res));
+// printk("\n\t\t **** omap_usb_phy_probe(): omap_usb_phy_base %x ", omap_usb_phy_base);
+ if (!omap_usb_phy_base)
+ return -ENOMEM;
+
+ /* Initialize register lock */
+ spin_lock_init(&omap_usb_phy_lock);
+
+ return 0;
+}
+
+static int __devexit omap_usb_phy_remove(struct platform_device *pdev)
+{
+ return 0;
+}
+
+static const struct of_device_id of_omap_usb_phy_match[] = {
+ { .compatible = "ti,omap4-usb-phy", },
+ { },
+};
+
+static struct platform_driver omap_usb_phy_driver = {
+ .probe = omap_usb_phy_probe,
+ .remove = __devexit_p(omap_usb_phy_remove),
+ .driver = {
+ .name = "omap4-usb-phy",
+ .owner = THIS_MODULE,
+ .of_match_table = of_omap_usb_phy_match,
+ },
+};
+
+static int __init omap_usb_phy_init(void)
+{
+ return platform_driver_register(&omap_usb_phy_driver);
+}
+postcore_initcall(omap_usb_phy_init);
+
+static void __exit omap_usb_phy_exit(void)
+{
+ platform_driver_unregister(&omap_usb_phy_driver);
+}
+module_exit(omap_usb_phy_exit);
+
+MODULE_DESCRIPTION("OMAP4+ USB-phy driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform: omap4-usb-phy");
+MODULE_AUTHOR("Texas Instrument Inc.");
Index: linux-2.6/include/linux/usb/omap4_usb_phy.h
===================================================================
--- /dev/null
+++ linux-2.6/include/linux/usb/omap4_usb_phy.h
@@ -0,0 +1,53 @@
+/*
+ * OMAP4 USB-phy
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Contact:
+ * Kishon Vijay Abraham I <kishon@ti.com>
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#ifndef __OMAP4_USB_PHY_H
+#define __OMAP4_USB_PHY_H
+
+#define PHY_PD 0x1
+#define AVALID BIT(0)
+#define BVALID BIT(1)
+#define VBUSVALID BIT(2)
+#define SESSEND BIT(3)
+#define IDDIG BIT(4)
+#define CONTROL_DEV_CONF 0x00000300
+#define CONTROL_USBOTGHS_CONTROL 0x0000033C
+
+/* USB-PHY helpers */
+#if (defined(CONFIG_OMAP4_USB_PHY)) || (defined(CONFIG_OMAP4_USB_PHY_MODULE))
+extern int omap4_usb_phy_mailbox(struct device *dev, u32 val);
+extern int omap4_usb_phy_power(struct device *dev, int on);
+#else
+static inline int omap4_usb_phy_mailbox(struct device *dev, u32 val)
+{
+ return 0;
+}
+static inline int omap4_usb_phy_power(struct device *dev, int on)
+{
+ return 0;
+}
+#endif
+
+#endif
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 05/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver
@ 2012-06-18 11:32 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: linux-arm-kernel
Created a new platform driver for the platform device created by the
control module mfd core, wrt usb. This driver has API's to power on/off
the phy and the API's to write to musb mailbox.
Changes since previous version:
- Bandgap and usb phy: drivers are now independent from control module driver, they use their own API functions.
Dependency was removed from Kconfig.
- Bandgap and usb phy: Added private spinlocks for bandgap and usb drivers.
(p.s. the mailbox for musb in omap4 is present in system control
module)
[kishon at ti.com: wrote the original API's related to USB functions]
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
drivers/usb/otg/Kconfig | 12 ++
drivers/usb/otg/Makefile | 1
drivers/usb/otg/omap4-usb-phy.c | 167 ++++++++++++++++++++++++++++++++++++++
include/linux/usb/omap4_usb_phy.h | 53 ++++++++++++
4 files changed, 233 insertions(+)
Index: linux-2.6/drivers/usb/otg/Kconfig
===================================================================
--- linux-2.6.orig/drivers/usb/otg/Kconfig
+++ linux-2.6/drivers/usb/otg/Kconfig
@@ -78,6 +78,18 @@ config TWL6030_USB
are hooked to this driver through platform_data structure.
The definition of internal PHY APIs are in the mach-omap2 layer.
+config OMAP4_USB_PHY
+ tristate "Texas Instruments OMAP4+ USB pin control driver"
+ help
+ If you say yes here you get support for the Texas Instruments
+ OMAP4+ USB pin control driver. The register set is part of system
+ control module.
+
+ USB phy in OMAP configures control module register for powering on
+ the phy, configuring VBUSVALID, AVALID, IDDIG and SESSEND. For
+ performing the above mentioned configuration, API's are added in
+ by this children of the control module driver.
+
config NOP_USB_XCEIV
tristate "NOP USB Transceiver Driver"
select USB_OTG_UTILS
Index: linux-2.6/drivers/usb/otg/Makefile
===================================================================
--- linux-2.6.orig/drivers/usb/otg/Makefile
+++ linux-2.6/drivers/usb/otg/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_USB_GPIO_VBUS) += gpio_vbus
obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o
obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o
obj-$(CONFIG_TWL6030_USB) += twl6030-usb.o
+obj-$(CONFIG_OMAP4_USB_PHY) += omap4-usb-phy.o
obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o
obj-$(CONFIG_USB_ULPI) += ulpi.o
obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi_viewport.o
Index: linux-2.6/drivers/usb/otg/omap4-usb-phy.c
===================================================================
--- /dev/null
+++ linux-2.6/drivers/usb/otg/omap4-usb-phy.c
@@ -0,0 +1,167 @@
+/*
+ * OMAP4 system control module driver, USB control children
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Contact:
+ * Kishon Vijay Abraham I <kishon@ti.com>
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/usb/omap4_usb_phy.h>
+
+void __iomem *omap_usb_phy_base;
+spinlock_t omap_usb_phy_lock;
+
+static int omap_usb_phy_readl(u32 reg, u32 *val)
+{
+ if (!omap_usb_phy_base)
+ return -EINVAL;
+
+ *val = __raw_readl(omap_usb_phy_base + reg);
+ return 0;
+}
+
+/*
+ * TODO: Get rid from omap_usb_phy_writel() return value -
+ * It's useless.
+ */
+static int omap_usb_phy_writel(u32 val, u32 reg)
+{
+ unsigned long flags;
+
+ if (!omap_usb_phy_base)
+ return -EINVAL;
+
+ spin_lock_irqsave(&omap_usb_phy_lock, flags);
+ __raw_writel(val, omap_usb_phy_base + reg);
+ spin_unlock_irqrestore(&omap_usb_phy_lock, flags);
+ return 0;
+}
+
+/**
+ * omap4_usb_phy_power - power on/off the phy using control module reg
+ * @dev: struct device *
+ * @on: 0 or 1, based on powering on or off the PHY
+ *
+ * omap_usb2 can call this API to power on or off the PHY.
+ */
+int omap4_usb_phy_power(struct device *dev, int on)
+{
+ u32 val;
+ int ret;
+
+ if (on) {
+ ret = omap_usb_phy_readl(CONTROL_DEV_CONF, &val);
+ if (!ret && (val & PHY_PD)) {
+ ret = omap_usb_phy_writel(~PHY_PD,
+ CONTROL_DEV_CONF);
+ /* XXX: add proper documentation for this delay */
+ mdelay(200);
+ }
+ } else
+ ret = omap_usb_phy_writel(PHY_PD, CONTROL_DEV_CONF);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(omap4_usb_phy_power);
+
+/**
+ * omap4_usb_phy_mailbox - write to usb otg mailbox
+ * @dev: struct device *
+ * @val: the value to be written to the mailbox
+ *
+ * On detection of a device (ID pin is grounded), the phy should call this API
+ * to set AVALID, VBUSVALID and ID pin is grounded.
+ *
+ * When OMAP is connected to a host (OMAP in device mode), the phy should call
+ * this API to set AVALID, VBUSVALID and ID pin in high impedance.
+ *
+ * The phy should call this API, if OMAP is disconnected from host or device.
+ */
+int omap4_usb_phy_mailbox(struct device *dev, u32 val)
+{
+ return omap_usb_phy_writel(val, CONTROL_USBOTGHS_CONTROL);
+}
+EXPORT_SYMBOL_GPL(omap4_usb_phy_mailbox);
+
+static int __devinit omap_usb_phy_probe(struct platform_device *pdev)
+{
+ struct resource *io_res;
+
+// printk("\n\t\t **** omap_usb_phy_probe(): enter ");
+
+ io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!io_res)
+ return -ENOENT;
+
+// printk("\n\t\t **** omap_usb_phy_probe(): start %x ", io_res->start);
+// printk("\n\t\t **** omap_usb_phy_probe(): size %x ", resource_size(io_res));
+ omap_usb_phy_base = ioremap(io_res->start, resource_size(io_res));
+// printk("\n\t\t **** omap_usb_phy_probe(): omap_usb_phy_base %x ", omap_usb_phy_base);
+ if (!omap_usb_phy_base)
+ return -ENOMEM;
+
+ /* Initialize register lock */
+ spin_lock_init(&omap_usb_phy_lock);
+
+ return 0;
+}
+
+static int __devexit omap_usb_phy_remove(struct platform_device *pdev)
+{
+ return 0;
+}
+
+static const struct of_device_id of_omap_usb_phy_match[] = {
+ { .compatible = "ti,omap4-usb-phy", },
+ { },
+};
+
+static struct platform_driver omap_usb_phy_driver = {
+ .probe = omap_usb_phy_probe,
+ .remove = __devexit_p(omap_usb_phy_remove),
+ .driver = {
+ .name = "omap4-usb-phy",
+ .owner = THIS_MODULE,
+ .of_match_table = of_omap_usb_phy_match,
+ },
+};
+
+static int __init omap_usb_phy_init(void)
+{
+ return platform_driver_register(&omap_usb_phy_driver);
+}
+postcore_initcall(omap_usb_phy_init);
+
+static void __exit omap_usb_phy_exit(void)
+{
+ platform_driver_unregister(&omap_usb_phy_driver);
+}
+module_exit(omap_usb_phy_exit);
+
+MODULE_DESCRIPTION("OMAP4+ USB-phy driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform: omap4-usb-phy");
+MODULE_AUTHOR("Texas Instrument Inc.");
Index: linux-2.6/include/linux/usb/omap4_usb_phy.h
===================================================================
--- /dev/null
+++ linux-2.6/include/linux/usb/omap4_usb_phy.h
@@ -0,0 +1,53 @@
+/*
+ * OMAP4 USB-phy
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Contact:
+ * Kishon Vijay Abraham I <kishon@ti.com>
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#ifndef __OMAP4_USB_PHY_H
+#define __OMAP4_USB_PHY_H
+
+#define PHY_PD 0x1
+#define AVALID BIT(0)
+#define BVALID BIT(1)
+#define VBUSVALID BIT(2)
+#define SESSEND BIT(3)
+#define IDDIG BIT(4)
+#define CONTROL_DEV_CONF 0x00000300
+#define CONTROL_USBOTGHS_CONTROL 0x0000033C
+
+/* USB-PHY helpers */
+#if (defined(CONFIG_OMAP4_USB_PHY)) || (defined(CONFIG_OMAP4_USB_PHY_MODULE))
+extern int omap4_usb_phy_mailbox(struct device *dev, u32 val);
+extern int omap4_usb_phy_power(struct device *dev, int on);
+#else
+static inline int omap4_usb_phy_mailbox(struct device *dev, u32 val)
+{
+ return 0;
+}
+static inline int omap4_usb_phy_power(struct device *dev, int on)
+{
+ return 0;
+}
+#endif
+
+#endif
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 06/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-06-18 11:32 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin, Keerthy
OMAP4460 specific temperature sensor register bit fields are added.
Existing OMAP4 entries are renamed to OMAP4430.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/include/mach/control.h | 116 ++++++++++++++++++++++++++++
1 files changed, 116 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/include/mach/control.h b/arch/arm/mach-omap2/include/mach/control.h
index cf42764..171b504 100644
--- a/arch/arm/mach-omap2/include/mach/control.h
+++ b/arch/arm/mach-omap2/include/mach/control.h
@@ -230,6 +230,122 @@
/* OMAP44xx control McBSP padconf */
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
+/* TEMP_SENSOR OMAP4430 */
+#define OMAP4430_BGAP_TEMPSOFF_SHIFT 12
+#define OMAP4430_BGAP_TEMPSOFF_MASK (1 << 12)
+#define OMAP4430_BGAP_TSHUT_SHIFT 11
+#define OMAP4430_BGAP_TSHUT_MASK (1 << 11)
+#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10
+#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10)
+#define OMAP4430_BGAP_TEMP_SENSOR_SOC_SHIFT 9
+#define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9)
+#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8
+#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8)
+#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
+#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0)
+
+/* TEMP_SENSOR OMAP4460 */
+#define OMAP4460_BGAP_TEMPSOFF_SHIFT 13
+#define OMAP4460_BGAP_TEMPSOFF_MASK (1 << 13)
+#define OMAP4460_BGAP_TEMP_SENSOR_SOC_SHIFT 11
+#define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK (1 << 11)
+#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
+#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 10)
+#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
+#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0)
+
+/* BANDGAP_CTRL */
+#define OMAP4460_SINGLE_MODE_SHIFT 31
+#define OMAP4460_SINGLE_MODE_MASK (1 << 31)
+#define OMAP4460_MASK_HOT_SHIFT 1
+#define OMAP4460_MASK_HOT_MASK (1 << 1)
+#define OMAP4460_MASK_COLD_SHIFT 0
+#define OMAP4460_MASK_COLD_MASK (1 << 0)
+
+/* BANDGAP_COUNTER */
+#define OMAP4460_COUNTER_SHIFT 0
+#define OMAP4460_COUNTER_MASK (0xffffff << 0)
+
+/* BANDGAP_THRESHOLD */
+#define OMAP4460_T_HOT_SHIFT 16
+#define OMAP4460_T_HOT_MASK (0x3ff << 16)
+#define OMAP4460_T_COLD_SHIFT 0
+#define OMAP4460_T_COLD_MASK (0x3ff << 0)
+
+/* TSHUT_THRESHOLD */
+#define OMAP4460_TSHUT_HOT_SHIFT 16
+#define OMAP4460_TSHUT_HOT_MASK (0x3ff << 16)
+#define OMAP4460_TSHUT_COLD_SHIFT 0
+#define OMAP4460_TSHUT_COLD_MASK (0x3ff << 0)
+
+/* BANDGAP_STATUS */
+#define OMAP4460_CLEAN_STOP_SHIFT 3
+#define OMAP4460_CLEAN_STOP_MASK (1 << 3)
+#define OMAP4460_BGAP_ALERT_SHIFT 2
+#define OMAP4460_BGAP_ALERT_MASK (1 << 2)
+#define OMAP4460_HOT_FLAG_SHIFT 1
+#define OMAP4460_HOT_FLAG_MASK (1 << 1)
+#define OMAP4460_COLD_FLAG_SHIFT 0
+#define OMAP4460_COLD_FLAG_MASK (1 << 0)
+
+/* TEMP_SENSOR OMAP5430 */
+#define OMAP5430_BGAP_TEMP_SENSOR_SOC_SHIFT 12
+#define OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK (1 << 12)
+#define OMAP5430_BGAP_TEMPSOFF_SHIFT 11
+#define OMAP5430_BGAP_TEMPSOFF_MASK (1 << 11)
+#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
+#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 10)
+#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
+#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0)
+
+/* BANDGAP_CTRL */
+#define OMAP5430_MASK_HOT_CORE_SHIFT 5
+#define OMAP5430_MASK_HOT_CORE_MASK (1 << 5)
+#define OMAP5430_MASK_COLD_CORE_SHIFT 4
+#define OMAP5430_MASK_COLD_CORE_MASK (1 << 4)
+#define OMAP5430_MASK_HOT_MM_SHIFT 3
+#define OMAP5430_MASK_HOT_MM_MASK (1 << 3)
+#define OMAP5430_MASK_COLD_MM_SHIFT 2
+#define OMAP5430_MASK_COLD_MM_MASK (1 << 2)
+#define OMAP5430_MASK_HOT_MPU_SHIFT 1
+#define OMAP5430_MASK_HOT_MPU_MASK (1 << 1)
+#define OMAP5430_MASK_COLD_MPU_SHIFT 0
+#define OMAP5430_MASK_COLD_MPU_MASK (1 << 0)
+
+/* BANDGAP_COUNTER */
+#define OMAP5430_REPEAT_MODE_SHIFT 31
+#define OMAP5430_REPEAT_MODE_MASK (1 << 31)
+#define OMAP5430_COUNTER_SHIFT 0
+#define OMAP5430_COUNTER_MASK (0xffffff << 0)
+
+/* BANDGAP_THRESHOLD */
+#define OMAP5430_T_HOT_SHIFT 16
+#define OMAP5430_T_HOT_MASK (0x3ff << 16)
+#define OMAP5430_T_COLD_SHIFT 0
+#define OMAP5430_T_COLD_MASK (0x3ff << 0)
+
+/* TSHUT_THRESHOLD */
+#define OMAP5430_TSHUT_HOT_SHIFT 16
+#define OMAP5430_TSHUT_HOT_MASK (0x3ff << 16)
+#define OMAP5430_TSHUT_COLD_SHIFT 0
+#define OMAP5430_TSHUT_COLD_MASK (0x3ff << 0)
+
+/* BANDGAP_STATUS */
+#define OMAP5430_BGAP_ALERT_SHIFT 31
+#define OMAP5430_BGAP_ALERT_MASK (1 << 31)
+#define OMAP5430_HOT_CORE_FLAG_SHIFT 5
+#define OMAP5430_HOT_CORE_FLAG_MASK (1 << 5)
+#define OMAP5430_COLD_CORE_FLAG_SHIFT 4
+#define OMAP5430_COLD_CORE_FLAG_MASK (1 << 4)
+#define OMAP5430_HOT_MM_FLAG_SHIFT 3
+#define OMAP5430_HOT_MM_FLAG_MASK (1 << 3)
+#define OMAP5430_COLD_MM_FLAG_SHIFT 2
+#define OMAP5430_COLD_MM_FLAG_MASK (1 << 2)
+#define OMAP5430_HOT_MPU_FLAG_SHIFT 1
+#define OMAP5430_HOT_MPU_FLAG_MASK (1 << 1)
+#define OMAP5430_COLD_MPU_FLAG_SHIFT 0
+#define OMAP5430_COLD_MPU_FLAG_MASK (1 << 0)
+
/* AM35XX only CONTROL_GENERAL register offsets */
#define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
#define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH v2 06/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields
@ 2012-06-18 11:32 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: linux-arm-kernel
OMAP4460 specific temperature sensor register bit fields are added.
Existing OMAP4 entries are renamed to OMAP4430.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/mach-omap2/include/mach/control.h | 116 ++++++++++++++++++++++++++++
1 files changed, 116 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/include/mach/control.h b/arch/arm/mach-omap2/include/mach/control.h
index cf42764..171b504 100644
--- a/arch/arm/mach-omap2/include/mach/control.h
+++ b/arch/arm/mach-omap2/include/mach/control.h
@@ -230,6 +230,122 @@
/* OMAP44xx control McBSP padconf */
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
+/* TEMP_SENSOR OMAP4430 */
+#define OMAP4430_BGAP_TEMPSOFF_SHIFT 12
+#define OMAP4430_BGAP_TEMPSOFF_MASK (1 << 12)
+#define OMAP4430_BGAP_TSHUT_SHIFT 11
+#define OMAP4430_BGAP_TSHUT_MASK (1 << 11)
+#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10
+#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10)
+#define OMAP4430_BGAP_TEMP_SENSOR_SOC_SHIFT 9
+#define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9)
+#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8
+#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8)
+#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
+#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0)
+
+/* TEMP_SENSOR OMAP4460 */
+#define OMAP4460_BGAP_TEMPSOFF_SHIFT 13
+#define OMAP4460_BGAP_TEMPSOFF_MASK (1 << 13)
+#define OMAP4460_BGAP_TEMP_SENSOR_SOC_SHIFT 11
+#define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK (1 << 11)
+#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
+#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 10)
+#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
+#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0)
+
+/* BANDGAP_CTRL */
+#define OMAP4460_SINGLE_MODE_SHIFT 31
+#define OMAP4460_SINGLE_MODE_MASK (1 << 31)
+#define OMAP4460_MASK_HOT_SHIFT 1
+#define OMAP4460_MASK_HOT_MASK (1 << 1)
+#define OMAP4460_MASK_COLD_SHIFT 0
+#define OMAP4460_MASK_COLD_MASK (1 << 0)
+
+/* BANDGAP_COUNTER */
+#define OMAP4460_COUNTER_SHIFT 0
+#define OMAP4460_COUNTER_MASK (0xffffff << 0)
+
+/* BANDGAP_THRESHOLD */
+#define OMAP4460_T_HOT_SHIFT 16
+#define OMAP4460_T_HOT_MASK (0x3ff << 16)
+#define OMAP4460_T_COLD_SHIFT 0
+#define OMAP4460_T_COLD_MASK (0x3ff << 0)
+
+/* TSHUT_THRESHOLD */
+#define OMAP4460_TSHUT_HOT_SHIFT 16
+#define OMAP4460_TSHUT_HOT_MASK (0x3ff << 16)
+#define OMAP4460_TSHUT_COLD_SHIFT 0
+#define OMAP4460_TSHUT_COLD_MASK (0x3ff << 0)
+
+/* BANDGAP_STATUS */
+#define OMAP4460_CLEAN_STOP_SHIFT 3
+#define OMAP4460_CLEAN_STOP_MASK (1 << 3)
+#define OMAP4460_BGAP_ALERT_SHIFT 2
+#define OMAP4460_BGAP_ALERT_MASK (1 << 2)
+#define OMAP4460_HOT_FLAG_SHIFT 1
+#define OMAP4460_HOT_FLAG_MASK (1 << 1)
+#define OMAP4460_COLD_FLAG_SHIFT 0
+#define OMAP4460_COLD_FLAG_MASK (1 << 0)
+
+/* TEMP_SENSOR OMAP5430 */
+#define OMAP5430_BGAP_TEMP_SENSOR_SOC_SHIFT 12
+#define OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK (1 << 12)
+#define OMAP5430_BGAP_TEMPSOFF_SHIFT 11
+#define OMAP5430_BGAP_TEMPSOFF_MASK (1 << 11)
+#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
+#define OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 10)
+#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
+#define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0)
+
+/* BANDGAP_CTRL */
+#define OMAP5430_MASK_HOT_CORE_SHIFT 5
+#define OMAP5430_MASK_HOT_CORE_MASK (1 << 5)
+#define OMAP5430_MASK_COLD_CORE_SHIFT 4
+#define OMAP5430_MASK_COLD_CORE_MASK (1 << 4)
+#define OMAP5430_MASK_HOT_MM_SHIFT 3
+#define OMAP5430_MASK_HOT_MM_MASK (1 << 3)
+#define OMAP5430_MASK_COLD_MM_SHIFT 2
+#define OMAP5430_MASK_COLD_MM_MASK (1 << 2)
+#define OMAP5430_MASK_HOT_MPU_SHIFT 1
+#define OMAP5430_MASK_HOT_MPU_MASK (1 << 1)
+#define OMAP5430_MASK_COLD_MPU_SHIFT 0
+#define OMAP5430_MASK_COLD_MPU_MASK (1 << 0)
+
+/* BANDGAP_COUNTER */
+#define OMAP5430_REPEAT_MODE_SHIFT 31
+#define OMAP5430_REPEAT_MODE_MASK (1 << 31)
+#define OMAP5430_COUNTER_SHIFT 0
+#define OMAP5430_COUNTER_MASK (0xffffff << 0)
+
+/* BANDGAP_THRESHOLD */
+#define OMAP5430_T_HOT_SHIFT 16
+#define OMAP5430_T_HOT_MASK (0x3ff << 16)
+#define OMAP5430_T_COLD_SHIFT 0
+#define OMAP5430_T_COLD_MASK (0x3ff << 0)
+
+/* TSHUT_THRESHOLD */
+#define OMAP5430_TSHUT_HOT_SHIFT 16
+#define OMAP5430_TSHUT_HOT_MASK (0x3ff << 16)
+#define OMAP5430_TSHUT_COLD_SHIFT 0
+#define OMAP5430_TSHUT_COLD_MASK (0x3ff << 0)
+
+/* BANDGAP_STATUS */
+#define OMAP5430_BGAP_ALERT_SHIFT 31
+#define OMAP5430_BGAP_ALERT_MASK (1 << 31)
+#define OMAP5430_HOT_CORE_FLAG_SHIFT 5
+#define OMAP5430_HOT_CORE_FLAG_MASK (1 << 5)
+#define OMAP5430_COLD_CORE_FLAG_SHIFT 4
+#define OMAP5430_COLD_CORE_FLAG_MASK (1 << 4)
+#define OMAP5430_HOT_MM_FLAG_SHIFT 3
+#define OMAP5430_HOT_MM_FLAG_MASK (1 << 3)
+#define OMAP5430_COLD_MM_FLAG_SHIFT 2
+#define OMAP5430_COLD_MM_FLAG_MASK (1 << 2)
+#define OMAP5430_HOT_MPU_FLAG_SHIFT 1
+#define OMAP5430_HOT_MPU_FLAG_MASK (1 << 1)
+#define OMAP5430_COLD_MPU_FLAG_SHIFT 0
+#define OMAP5430_COLD_MPU_FLAG_MASK (1 << 0)
+
/* AM35XX only CONTROL_GENERAL register offsets */
#define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
#define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
--
1.7.7.1.488.ge8e1c
^ permalink raw reply related [flat|nested] 198+ messages in thread
* [RFC PATCH v2 07/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-06-18 11:32 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin, Keerthy
In the System Control Module, OMAP supplies a voltage reference
and a temperature sensor feature that are gathered in the band
gap voltage and temperature sensor (VBGAPTS) module. The band
gap provides current and voltage reference for its internal
circuits and other analog IP blocks. The analog-to-digital
converter (ADC) produces an output value that is proportional
to the silicon temperature.
This patch provides a platform driver which expose this feature.
It is moduled as a MFD child of the System Control Module core
MFD driver.
This driver provides only APIs to access the device properties,
like temperature, thresholds and update rate.
Changes since previous version:
- Bandgap and usb phy: drivers are now independent from control module driver, they use their own API functions.
- Bandgap and usb phy: Added private spinlocks for bandgap and usb drivers.
- Bandgap: Check the type of bandgap dynamically in bandgap driver probe function by reading
omap core control module revision register CONTROL_GEN_CORE_REVISION.
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
Documentation/devicetree/bindings/thermal/omap_bandgap.txt | 27
drivers/thermal/Kconfig | 12
drivers/thermal/Makefile | 4
drivers/thermal/omap-bandgap.c | 1654 +++++++++++++
drivers/thermal/omap-bandgap.h | 64
5 files changed, 1760 insertions(+), 1 deletion(-)
Index: linux-2.6/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
===================================================================
--- /dev/null
+++ linux-2.6/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
@@ -0,0 +1,27 @@
+* Texas Instrument OMAP SCM bandgap bindings
+
+In the System Control Module, OMAP supplies a voltage reference
+and a temperature sensor feature that are gathered in the band
+gap voltage and temperature sensor (VBGAPTS) module. The band
+gap provides current and voltage reference for its internal
+circuits and other analog IP blocks. The analog-to-digital
+converter (ADC) produces an output value that is proportional
+to the silicon temperature.
+
+Required properties:
+- compatible : Should be:
+ - "ti,omap4460-control-bandgap" : for OMAP4460 bandgap
+ - "ti,omap5430-control-bandgap" : for OMAP5430 bandgap
+- interrupts : this entry should indicate which interrupt line
+the talert signal is routed to;
+Specific:
+- ti,tshut-gpio : this entry should be used to inform which GPIO
+line the tshut signal is routed to;
+
+Example:
+
+bandgap {
+ compatible = "ti,omap4460-control-bandgap";
+ interrupts = <0 126 4>; /* talert */
+ ti,tshut-gpio = <86>;
+};
Index: linux-2.6/drivers/thermal/Kconfig
===================================================================
--- linux-2.6.orig/drivers/thermal/Kconfig
+++ linux-2.6/drivers/thermal/Kconfig
@@ -26,3 +26,15 @@ config SPEAR_THERMAL
help
Enable this to plug the SPEAr thermal sensor driver into the Linux
thermal framework
+
+config OMAP_BANDGAP
+ tristate "Texas Instruments OMAP4+ temperature sensor driver"
+ depends on THERMAL
+ help
+ If you say yes here you get support for the Texas Instruments
+ OMAP4460+ on die bandgap temperature sensor support. The register
+ set is part of system control module.
+
+ This includes alert interrupts generation and also the TSHUT
+ support.
+
Index: linux-2.6/drivers/thermal/Makefile
===================================================================
--- linux-2.6.orig/drivers/thermal/Makefile
+++ linux-2.6/drivers/thermal/Makefile
@@ -3,4 +3,6 @@
#
obj-$(CONFIG_THERMAL) += thermal_sys.o
-obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
\ No newline at end of file
+obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
+obj-$(CONFIG_OMAP_BANDGAP) += omap-thermal.o
+omap-thermal-y := omap-bandgap.o
Index: linux-2.6/drivers/thermal/omap-bandgap.c
===================================================================
--- /dev/null
+++ linux-2.6/drivers/thermal/omap-bandgap.c
@@ -0,0 +1,1654 @@
+/*
+ * OMAP4 Bandgap temperature sensor driver
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Author: J Keerthy <j-keerthy@ti.com>
+ * Author: Moiz Sonasath <m-sonasath@ti.com>
+ * Couple of fixes, DT and MFD adaptation:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/export.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/clk.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/types.h>
+#include <linux/mutex.h>
+#include <linux/reboot.h>
+#include <linux/of_platform.h>
+#include <linux/of_irq.h>
+
+#include <mach/control.h>
+
+#include "omap-bandgap.h"
+
+/* Offsets from the base of temperature sensor registers */
+
+#define OMAP4460_TEMP_SENSOR_CTRL_OFFSET 0x32C
+#define OMAP4460_BGAP_CTRL_OFFSET 0x378
+#define OMAP4460_BGAP_COUNTER_OFFSET 0x37C
+#define OMAP4460_BGAP_THRESHOLD_OFFSET 0x380
+#define OMAP4460_BGAP_TSHUT_OFFSET 0x384
+#define OMAP4460_BGAP_STATUS_OFFSET 0x388
+#define OMAP4460_FUSE_OPP_BGAP 0x260
+
+#define OMAP5430_TEMP_SENSOR_MPU_OFFSET 0x32C
+#define OMAP5430_BGAP_CTRL_OFFSET 0x380
+#define OMAP5430_BGAP_COUNTER_MPU_OFFSET 0x39C
+#define OMAP5430_BGAP_THRESHOLD_MPU_OFFSET 0x384
+#define OMAP5430_BGAP_TSHUT_MPU_OFFSET 0x390
+#define OMAP5430_BGAP_STATUS_OFFSET 0x3A8
+#define OMAP5430_FUSE_OPP_BGAP_MPU 0x1E4
+
+#define OMAP5430_TEMP_SENSOR_GPU_OFFSET 0x330
+#define OMAP5430_BGAP_COUNTER_GPU_OFFSET 0x3A0
+#define OMAP5430_BGAP_THRESHOLD_GPU_OFFSET 0x388
+#define OMAP5430_BGAP_TSHUT_GPU_OFFSET 0x394
+#define OMAP5430_FUSE_OPP_BGAP_GPU 0x1E0
+
+#define OMAP5430_TEMP_SENSOR_CORE_OFFSET 0x334
+#define OMAP5430_BGAP_COUNTER_CORE_OFFSET 0x3A4
+#define OMAP5430_BGAP_THRESHOLD_CORE_OFFSET 0x38C
+#define OMAP5430_BGAP_TSHUT_CORE_OFFSET 0x398
+#define OMAP5430_FUSE_OPP_BGAP_CORE 0x1E8
+
+#define OMAP4460_TSHUT_HOT 900 /* 122 deg C */
+#define OMAP4460_TSHUT_COLD 895 /* 100 deg C */
+#define OMAP4460_T_HOT 800 /* 73 deg C */
+#define OMAP4460_T_COLD 795 /* 71 deg C */
+#define OMAP4460_MAX_FREQ 1500000
+#define OMAP4460_MIN_FREQ 1000000
+#define OMAP4460_MIN_TEMP -40000
+#define OMAP4460_MAX_TEMP 123000
+#define OMAP4460_HYST_VAL 5000
+#define OMAP4460_ADC_START_VALUE 530
+#define OMAP4460_ADC_END_VALUE 932
+
+#define OMAP5430_MPU_TSHUT_HOT 915
+#define OMAP5430_MPU_TSHUT_COLD 900
+#define OMAP5430_MPU_T_HOT 800
+#define OMAP5430_MPU_T_COLD 795
+#define OMAP5430_MPU_MAX_FREQ 1500000
+#define OMAP5430_MPU_MIN_FREQ 1000000
+#define OMAP5430_MPU_MIN_TEMP -40000
+#define OMAP5430_MPU_MAX_TEMP 125000
+#define OMAP5430_MPU_HYST_VAL 5000
+#define OMAP5430_ADC_START_VALUE 532
+#define OMAP5430_ADC_END_VALUE 934
+
+#define OMAP5430_GPU_TSHUT_HOT 915
+#define OMAP5430_GPU_TSHUT_COLD 900
+#define OMAP5430_GPU_T_HOT 800
+#define OMAP5430_GPU_T_COLD 795
+#define OMAP5430_GPU_MAX_FREQ 1500000
+#define OMAP5430_GPU_MIN_FREQ 1000000
+#define OMAP5430_GPU_MIN_TEMP -40000
+#define OMAP5430_GPU_MAX_TEMP 125000
+#define OMAP5430_GPU_HYST_VAL 5000
+
+#define OMAP5430_CORE_TSHUT_HOT 915
+#define OMAP5430_CORE_TSHUT_COLD 900
+#define OMAP5430_CORE_T_HOT 800
+#define OMAP5430_CORE_T_COLD 795
+#define OMAP5430_CORE_MAX_FREQ 1500000
+#define OMAP5430_CORE_MIN_FREQ 1000000
+#define OMAP5430_CORE_MIN_TEMP -40000
+#define OMAP5430_CORE_MAX_TEMP 125000
+#define OMAP5430_CORE_HYST_VAL 5000
+
+/**
+ * The register offsets and bit fields might change across
+ * OMAP versions hence populating them in this structure.
+ */
+
+struct temp_sensor_registers {
+ u32 temp_sensor_ctrl;
+ u32 bgap_tempsoff_mask;
+ u32 bgap_soc_mask;
+ u32 bgap_eocz_mask;
+ u32 bgap_dtemp_mask;
+
+ u32 bgap_mask_ctrl;
+ u32 mask_hot_mask;
+ u32 mask_cold_mask;
+
+ u32 bgap_mode_ctrl;
+ u32 mode_ctrl_mask;
+
+ u32 bgap_counter;
+ u32 counter_mask;
+
+ u32 bgap_threshold;
+ u32 threshold_thot_mask;
+ u32 threshold_tcold_mask;
+
+ u32 tshut_threshold;
+ u32 tshut_hot_mask;
+ u32 tshut_cold_mask;
+
+ u32 bgap_status;
+ u32 status_clean_stop_mask;
+ u32 status_bgap_alert_mask;
+ u32 status_hot_mask;
+ u32 status_cold_mask;
+
+ u32 bgap_efuse;
+ spinlock_t bg_reg_lock;
+};
+
+/**
+ * The thresholds and limits for temperature sensors.
+ */
+struct temp_sensor_data {
+ u32 tshut_hot;
+ u32 tshut_cold;
+ u32 t_hot;
+ u32 t_cold;
+ u32 min_freq;
+ u32 max_freq;
+ int max_temp;
+ int min_temp;
+ int hyst_val;
+ u32 adc_start_val;
+ u32 adc_end_val;
+ u32 update_int1;
+ u32 update_int2;
+};
+
+/**
+ * struct temp_sensor_regval - temperature sensor register values
+ * @bg_mode_ctrl: temp sensor control register value
+ * @bg_ctrl: bandgap ctrl register value
+ * @bg_counter: bandgap counter value
+ * @bg_threshold: bandgap threshold register value
+ * @tshut_threshold: bandgap tshut register value
+ */
+struct temp_sensor_regval {
+ u32 bg_mode_ctrl;
+ u32 bg_ctrl;
+ u32 bg_counter;
+ u32 bg_threshold;
+ u32 tshut_threshold;
+};
+
+/**
+ * struct omap_temp_sensor - bandgap temperature sensor platform data
+ * @ts_data: pointer to struct with thresholds, limits of temperature sensor
+ * @registers: pointer to the list of register offsets and bitfields
+ * @regval: temperature sensor register values
+ * @domain: the name of the domain where the sensor is located
+ */
+struct omap_temp_sensor {
+ struct temp_sensor_data *ts_data;
+ struct temp_sensor_registers *registers;
+ struct temp_sensor_regval *regval;
+ char *domain;
+};
+
+/**
+ * struct omap_bandgap_data - bandgap platform data structure
+ * @has_talert: indicates if the chip has talert output line
+ * @has_tshut: indicates if the chip has tshut output line
+ * @conv_table: Pointer to adc to temperature conversion table
+ * @fclock_name: clock name of the functional clock
+ * @div_ck_nme: clock name of the clock divisor
+ * @sensor_count: count of temperature sensor device in scm
+ * @sensors: array of sensors present in this bandgap instance
+ * @expose_sensor: callback to export sensor to thermal API
+ */
+struct omap_bandgap_data {
+ bool has_talert;
+ bool has_tshut;
+ int tshut_gpio;
+ const int *conv_table;
+ char *fclock_name;
+ char *div_ck_name;
+ int sensor_count;
+ int (*report_temperature)(struct omap_bandgap *bg_ptr, int id);
+ int (*expose_sensor)(struct omap_bandgap *bg_ptr, int id, char *domain);
+ int irq;
+
+ /* this needs to be at the end */
+ struct omap_temp_sensor sensors[];
+};
+
+/* TODO: provide data structures for 4430 */
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap4460_mpu_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP4460_TEMP_SENSOR_CTRL_OFFSET,
+ .bgap_tempsoff_mask = OMAP4460_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP4460_MASK_HOT_MASK,
+ .mask_cold_mask = OMAP4460_MASK_COLD_MASK,
+
+ .bgap_mode_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
+ .mode_ctrl_mask = OMAP4460_SINGLE_MODE_MASK,
+
+ .bgap_counter = OMAP4460_BGAP_COUNTER_OFFSET,
+ .counter_mask = OMAP4460_COUNTER_MASK,
+
+ .bgap_threshold = OMAP4460_BGAP_THRESHOLD_OFFSET,
+ .threshold_thot_mask = OMAP4460_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP4460_T_COLD_MASK,
+
+ .tshut_threshold = OMAP4460_BGAP_TSHUT_OFFSET,
+ .tshut_hot_mask = OMAP4460_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP4460_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP4460_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = OMAP4460_CLEAN_STOP_MASK,
+ .status_bgap_alert_mask = OMAP4460_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP4460_HOT_FLAG_MASK,
+ .status_cold_mask = OMAP4460_COLD_FLAG_MASK,
+
+ .bgap_efuse = OMAP4460_FUSE_OPP_BGAP,
+};
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap5430_mpu_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_MPU_OFFSET,
+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP5430_MASK_HOT_MPU_MASK,
+ .mask_cold_mask = OMAP5430_MASK_COLD_MPU_MASK,
+
+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
+
+ .bgap_counter = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
+ .counter_mask = OMAP5430_COUNTER_MASK,
+
+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_MPU_OFFSET,
+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
+
+ .tshut_threshold = OMAP5430_BGAP_TSHUT_MPU_OFFSET,
+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = 0x0,
+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP5430_HOT_MPU_FLAG_MASK,
+ .status_cold_mask = OMAP5430_COLD_MPU_FLAG_MASK,
+
+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_MPU,
+};
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap5430_gpu_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_GPU_OFFSET,
+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP5430_MASK_HOT_MM_MASK,
+ .mask_cold_mask = OMAP5430_MASK_COLD_MM_MASK,
+
+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
+
+ .bgap_counter = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
+ .counter_mask = OMAP5430_COUNTER_MASK,
+
+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_GPU_OFFSET,
+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
+
+ .tshut_threshold = OMAP5430_BGAP_TSHUT_GPU_OFFSET,
+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = 0x0,
+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP5430_HOT_MM_FLAG_MASK,
+ .status_cold_mask = OMAP5430_COLD_MM_FLAG_MASK,
+
+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_GPU,
+};
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap5430_core_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_CORE_OFFSET,
+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP5430_MASK_HOT_CORE_MASK,
+ .mask_cold_mask = OMAP5430_MASK_COLD_CORE_MASK,
+
+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
+
+ .bgap_counter = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
+ .counter_mask = OMAP5430_COUNTER_MASK,
+
+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_CORE_OFFSET,
+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
+
+ .tshut_threshold = OMAP5430_BGAP_TSHUT_CORE_OFFSET,
+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = 0x0,
+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP5430_HOT_CORE_FLAG_MASK,
+ .status_cold_mask = OMAP5430_COLD_CORE_FLAG_MASK,
+
+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_CORE,
+};
+
+/* Thresholds and limits for OMAP4460 MPU temperature sensor */
+static struct temp_sensor_data omap4460_mpu_temp_sensor_data = {
+ .tshut_hot = OMAP4460_TSHUT_HOT,
+ .tshut_cold = OMAP4460_TSHUT_COLD,
+ .t_hot = OMAP4460_T_HOT,
+ .t_cold = OMAP4460_T_COLD,
+ .min_freq = OMAP4460_MIN_FREQ,
+ .max_freq = OMAP4460_MAX_FREQ,
+ .max_temp = OMAP4460_MAX_TEMP,
+ .min_temp = OMAP4460_MIN_TEMP,
+ .hyst_val = OMAP4460_HYST_VAL,
+ .adc_start_val = OMAP4460_ADC_START_VALUE,
+ .adc_end_val = OMAP4460_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/* Thresholds and limits for OMAP5430 MPU temperature sensor */
+static struct temp_sensor_data omap5430_mpu_temp_sensor_data = {
+ .tshut_hot = OMAP5430_MPU_TSHUT_HOT,
+ .tshut_cold = OMAP5430_MPU_TSHUT_COLD,
+ .t_hot = OMAP5430_MPU_T_HOT,
+ .t_cold = OMAP5430_MPU_T_COLD,
+ .min_freq = OMAP5430_MPU_MIN_FREQ,
+ .max_freq = OMAP5430_MPU_MAX_FREQ,
+ .max_temp = OMAP5430_MPU_MAX_TEMP,
+ .min_temp = OMAP5430_MPU_MIN_TEMP,
+ .hyst_val = OMAP5430_MPU_HYST_VAL,
+ .adc_start_val = OMAP5430_ADC_START_VALUE,
+ .adc_end_val = OMAP5430_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/* Thresholds and limits for OMAP5430 GPU temperature sensor */
+static struct temp_sensor_data omap5430_gpu_temp_sensor_data = {
+ .tshut_hot = OMAP5430_GPU_TSHUT_HOT,
+ .tshut_cold = OMAP5430_GPU_TSHUT_COLD,
+ .t_hot = OMAP5430_GPU_T_HOT,
+ .t_cold = OMAP5430_GPU_T_COLD,
+ .min_freq = OMAP5430_GPU_MIN_FREQ,
+ .max_freq = OMAP5430_GPU_MAX_FREQ,
+ .max_temp = OMAP5430_GPU_MAX_TEMP,
+ .min_temp = OMAP5430_GPU_MIN_TEMP,
+ .hyst_val = OMAP5430_GPU_HYST_VAL,
+ .adc_start_val = OMAP5430_ADC_START_VALUE,
+ .adc_end_val = OMAP5430_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/* Thresholds and limits for OMAP5430 CORE temperature sensor */
+static struct temp_sensor_data omap5430_core_temp_sensor_data = {
+ .tshut_hot = OMAP5430_CORE_TSHUT_HOT,
+ .tshut_cold = OMAP5430_CORE_TSHUT_COLD,
+ .t_hot = OMAP5430_CORE_T_HOT,
+ .t_cold = OMAP5430_CORE_T_COLD,
+ .min_freq = OMAP5430_CORE_MIN_FREQ,
+ .max_freq = OMAP5430_CORE_MAX_FREQ,
+ .max_temp = OMAP5430_CORE_MAX_TEMP,
+ .min_temp = OMAP5430_CORE_MIN_TEMP,
+ .hyst_val = OMAP5430_CORE_HYST_VAL,
+ .adc_start_val = OMAP5430_ADC_START_VALUE,
+ .adc_end_val = OMAP5430_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/*
+ * Temperature values in milli degree celsius
+ * ADC code values from 530 to 923
+ */
+static const int
+omap4460_adc_to_temp[OMAP4460_ADC_END_VALUE - OMAP4460_ADC_START_VALUE + 1] = {
+ -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600, -38200,
+ -37800, -37300, -36800, -36400, -36000, -35600, -35200, -34800,
+ -34300, -33800, -33400, -33000, -32600, -32200, -31800, -31300,
+ -30800, -30400, -30000, -29600, -29200, -28700, -28200, -27800,
+ -27400, -27000, -26600, -26200, -25700, -25200, -24800, -24400,
+ -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
+ -20600, -20200, -19700, -19200, -18800, -18400, -18000, -17600,
+ -17200, -16700, -16200, -15800, -15400, -15000, -14600, -14200,
+ -13700, -13200, -12800, -12400, -12000, -11600, -11200, -10700,
+ -10200, -9800, -9400, -9000, -8600, -8200, -7700, -7200, -6800,
+ -6400, -6000, -5600, -5200, -4800, -4300, -3800, -3400, -3000,
+ -2600, -2200, -1800, -1300, -800, -400, 0, 400, 800, 1200, 1600,
+ 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000, 6400,
+ 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10600, 11000,
+ 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800,
+ 15300, 15800, 16200, 16600, 17000, 17400, 17800, 18200, 18700,
+ 19200, 19600, 20000, 20400, 20800, 21200, 21600, 22100, 22600,
+ 23000, 23400, 23800, 24200, 24600, 25000, 25400, 25900, 26400,
+ 26800, 27200, 27600, 28000, 28400, 28800, 29300, 29800, 30200,
+ 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
+ 34400, 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800,
+ 38200, 38600, 39000, 39400, 39800, 40200, 40600, 41100, 41600,
+ 42000, 42400, 42800, 43200, 43600, 44000, 44400, 44800, 45300,
+ 45800, 46200, 46600, 47000, 47400, 47800, 48200, 48600, 49000,
+ 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400, 52800,
+ 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600,
+ 57000, 57400, 57800, 58200, 58700, 59200, 59600, 60000, 60400,
+ 60800, 61200, 61600, 62000, 62400, 62800, 63300, 63800, 64200,
+ 64600, 65000, 65400, 65800, 66200, 66600, 67000, 67400, 67800,
+ 68200, 68700, 69200, 69600, 70000, 70400, 70800, 71200, 71600,
+ 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
+ 75800, 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000,
+ 79400, 79800, 80300, 80800, 81200, 81600, 82000, 82400, 82800,
+ 83200, 83600, 84000, 84400, 84800, 85200, 85600, 86000, 86400,
+ 86800, 87300, 87800, 88200, 88600, 89000, 89400, 89800, 90200,
+ 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400, 93800,
+ 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600,
+ 98000, 98400, 98800, 99200, 99600, 100000, 100400, 100800, 101200,
+ 101600, 102000, 102400, 102800, 103200, 103600, 104000, 104400,
+ 104800, 105200, 105600, 106100, 106600, 107000, 107400, 107800,
+ 108200, 108600, 109000, 109400, 109800, 110200, 110600, 111000,
+ 111400, 111800, 112200, 112600, 113000, 113400, 113800, 114200,
+ 114600, 115000, 115400, 115800, 116200, 116600, 117000, 117400,
+ 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
+ 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
+ 124600, 124900, 125000, 125000, 125000, 125000
+};
+
+static const int
+omap5430_adc_to_temp[OMAP5430_ADC_END_VALUE - OMAP5430_ADC_START_VALUE + 1] = {
+ -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600,
+ -38200, -37800, -37300, -36800,
+ -36400, -36000, -35600, -35200, -34800, -34300, -33800, -33400, -33000,
+ -32600,
+ -32200, -31800, -31300, -30800, -30400, -30000, -29600, -29200, -28700,
+ -28200, -27800, -27400, -27000, -26600, -26200, -25700, -25200, -24800,
+ -24400, -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
+ -20600, -20200, -19700, -19200, -9300, -18400, -18000, -17600, -17200,
+ -16700, -16200, -15800, -15400, -15000, -14600, -14200, -13700, -13200,
+ -12800, -12400, -12000, -11600, -11200, -10700, -10200, -9800, -9400,
+ -9000,
+ -8600, -8200, -7700, -7200, -6800, -6400, -6000, -5600, -5200, -4800,
+ -4300,
+ -3800, -3400, -3000, -2600, -2200, -1800, -1300, -800, -400, 0, 400,
+ 800,
+ 1200, 1600, 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000,
+ 6400, 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10800,
+ 11100,
+ 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800, 15300,
+ 15800,
+ 16200, 16600, 17000, 17400, 17800, 18200, 18700, 19200, 19600, 20000,
+ 20400,
+ 20800, 21200, 21600, 22100, 22600, 23000, 23400, 23800, 24200, 24600,
+ 25000,
+ 25400, 25900, 26400, 26800, 27200, 27600, 28000, 28400, 28800, 29300,
+ 29800,
+ 30200, 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
+ 34400,
+ 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800, 38200, 38600,
+ 39000,
+ 39400, 39800, 40200, 40600, 41100, 41600, 42000, 42400, 42800, 43200,
+ 43600,
+ 44000, 44400, 44800, 45300, 45800, 46200, 46600, 47000, 47400, 47800,
+ 48200,
+ 48600, 49000, 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400,
+ 52800,
+ 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600, 57000,
+ 57400,
+ 57800, 58200, 58700, 59200, 59600, 60000, 60400, 60800, 61200, 61600,
+ 62000,
+ 62400, 62800, 63300, 63800, 64200, 64600, 65000, 65400, 65800, 66200,
+ 66600,
+ 67000, 67400, 67800, 68200, 68700, 69200, 69600, 70000, 70400, 70800,
+ 71200,
+ 71600, 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
+ 75800,
+ 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000, 79400, 79800,
+ 80300,
+ 80800, 81200, 81600, 82000, 82400, 82800, 83200, 83600, 84000, 84400,
+ 84800,
+ 85200, 85600, 86000, 86400, 86800, 87300, 87800, 88200, 88600, 89000,
+ 89400,
+ 89800, 90200, 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400,
+ 93800,
+ 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600, 98000,
+ 98400,
+ 98800, 99200, 99600, 100000, 100400, 100800, 101200, 101600, 102000,
+ 102400,
+ 102800, 103200, 103600, 104000, 104400, 104800, 105200, 105600, 106100,
+ 106600, 107000, 107400, 107800, 108200, 108600, 109000, 109400, 109800,
+ 110200, 110600, 111000, 111400, 111800, 112200, 112600, 113000, 113400,
+ 113800, 114200, 114600, 115000, 115400, 115800, 116200, 116600, 117000,
+ 117400, 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
+ 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
+ 124600, 124900, 125000, 125000, 125000, 125000,
+};
+
+/*
+ * TODO: Get rid from bg_readl() return value -
+ * It's useless.
+ */
+
+static int bg_readl(struct omap_bandgap *bg_ptr, u32 reg, u32 *val)
+{
+ if (!bg_ptr)
+ return -EINVAL;
+
+ *val = __raw_readl(bg_ptr->bg_base + reg);
+ return 0;
+}
+
+/*
+ * TODO: Get rid from bg_writel() return value -
+ * It's useless.
+ */
+static int bg_writel(struct omap_bandgap *bg_ptr, u32 val, u32 reg, spinlock_t *lock)
+{
+ unsigned long flags;
+
+ if (!bg_ptr)
+ return -EINVAL;
+
+ spin_lock_irqsave(lock, flags);
+ __raw_writel(val, bg_ptr->bg_base + reg);
+ spin_unlock_irqrestore(lock, flags);
+ return 0;
+}
+
+static irqreturn_t talert_irq_handler(int irq, void *data)
+{
+ struct omap_bandgap *bg_ptr = data;
+ struct temp_sensor_registers *tsr;
+ u32 t_hot = 0, t_cold = 0, temp, ctrl = 0;
+ int i, r;
+
+ bg_ptr = data;
+ /* Read the status of t_hot */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ tsr = bg_ptr->pdata->sensors[i].registers;
+ r = bg_readl(bg_ptr, tsr->bgap_status, &t_hot);
+ t_hot &= tsr->status_hot_mask;
+
+ /* Read the status of t_cold */
+ r |= bg_readl(bg_ptr, tsr->bgap_status, &t_cold);
+ t_cold &= tsr->status_cold_mask;
+
+ if (!t_cold && !t_hot)
+ continue;
+
+ r |= bg_readl(bg_ptr, tsr->bgap_mask_ctrl, &ctrl);
+ /*
+ * One TALERT interrupt: Two sources
+ * If the interrupt is due to t_hot then mask t_hot and
+ * and unmask t_cold else mask t_cold and unmask t_hot
+ */
+ if (t_hot) {
+ ctrl &= ~tsr->mask_hot_mask;
+ ctrl |= tsr->mask_cold_mask;
+ } else if (t_cold) {
+ ctrl &= ~tsr->mask_cold_mask;
+ ctrl |= tsr->mask_hot_mask;
+ }
+
+ r |= bg_writel(bg_ptr, ctrl, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
+
+ if (r) {
+ dev_err(bg_ptr->dev, "failed to ack talert interrupt\n");
+ return IRQ_NONE;
+ }
+
+ /* read temperature */
+ r = bg_readl(bg_ptr, tsr->temp_sensor_ctrl, &temp);
+ temp &= tsr->bgap_dtemp_mask;
+
+ /* report temperature to whom may concern */
+ if (bg_ptr->pdata->report_temperature)
+ bg_ptr->pdata->report_temperature(bg_ptr, i);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t omap_bandgap_tshut_irq_handler(int irq, void *data)
+{
+ orderly_poweroff(true);
+
+ return IRQ_HANDLED;
+}
+
+static
+int adc_to_temp_conversion(struct omap_bandgap *bg_ptr, int id, int adc_val,
+ int *t)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+
+ /* look up for temperature in the table and return the temperature */
+ if (adc_val < ts_data->adc_start_val || adc_val > ts_data->adc_end_val)
+ return -ERANGE;
+
+ *t = bg_ptr->conv_table[adc_val - ts_data->adc_start_val];
+
+ return 0;
+}
+
+static int temp_to_adc_conversion(long temp, struct omap_bandgap *bg_ptr, int i,
+ int *adc)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[i].ts_data;
+ int high, low, mid;
+
+ low = 0;
+ high = ts_data->adc_end_val - ts_data->adc_start_val;
+ mid = (high + low) / 2;
+
+ if (temp < bg_ptr->conv_table[high] || temp > bg_ptr->conv_table[high])
+ return -EINVAL;
+
+ while (low < high) {
+ if (temp < bg_ptr->conv_table[mid])
+ high = mid - 1;
+ else
+ low = mid + 1;
+ mid = (low + high) / 2;
+ }
+
+ *adc = ts_data->adc_start_val + low;
+
+ return 0;
+}
+
+static int temp_sensor_unmask_interrupts(struct omap_bandgap *bg_ptr, int id,
+ u32 t_hot, u32 t_cold)
+{
+ struct temp_sensor_registers *tsr;
+ u32 temp = 0, reg_val = 0;
+ int err;
+
+ /* Read the current on die temperature */
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = bg_readl(bg_ptr, tsr->temp_sensor_ctrl, &temp);
+ temp &= tsr->bgap_dtemp_mask;
+
+ err |= bg_readl(bg_ptr, tsr->bgap_mask_ctrl, ®_val);
+ if (temp < t_hot)
+ reg_val |= tsr->mask_hot_mask;
+ else
+ reg_val &= ~tsr->mask_hot_mask;
+
+ if (t_cold < temp)
+ reg_val |= tsr->mask_cold_mask;
+ else
+ reg_val &= ~tsr->mask_cold_mask;
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
+
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to unmask interrupts\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static
+int add_hyst(int adc_val, int hyst_val, struct omap_bandgap *bg_ptr, int i,
+ u32 *sum)
+{
+ int temp, ret;
+
+ ret = adc_to_temp_conversion(bg_ptr, i, adc_val, &temp);
+ if (ret < 0)
+ return ret;
+
+ temp += hyst_val;
+
+ return temp_to_adc_conversion(temp, bg_ptr, i, sum);
+}
+
+static
+int temp_sensor_configure_thot(struct omap_bandgap *bg_ptr, int id, int t_hot)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct temp_sensor_registers *tsr;
+ u32 thresh_val = 0, reg_val;
+ int cold, err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+
+ /* obtain the T cold value */
+ err = bg_readl(bg_ptr, tsr->bgap_threshold, &thresh_val);
+ cold = (thresh_val & tsr->threshold_tcold_mask) >>
+ __ffs(tsr->threshold_tcold_mask);
+ if (t_hot <= cold) {
+ /* change the t_cold to t_hot - 5000 millidegrees */
+ err |= add_hyst(t_hot, -ts_data->hyst_val, bg_ptr, id, &cold);
+ /* write the new t_cold value */
+ reg_val = thresh_val & (~tsr->threshold_tcold_mask);
+ reg_val |= cold << __ffs(tsr->threshold_tcold_mask);
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
+ thresh_val = reg_val;
+ }
+
+ /* write the new t_hot value */
+ reg_val = thresh_val & ~tsr->threshold_thot_mask;
+ reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
+ return -EIO;
+ }
+
+ return temp_sensor_unmask_interrupts(bg_ptr, id, t_hot, cold);
+}
+
+static
+int temp_sensor_init_talert_thresholds(struct omap_bandgap *bg_ptr, int id,
+ int t_hot, int t_cold)
+{
+ struct temp_sensor_registers *tsr;
+ u32 reg_val, thresh_val;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = bg_readl(bg_ptr, tsr->bgap_threshold, &thresh_val);
+
+ /* write the new t_cold value */
+ reg_val = thresh_val & ~tsr->threshold_tcold_mask;
+ reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
+ return -EIO;
+ }
+
+ err = bg_readl(bg_ptr, tsr->bgap_threshold, &thresh_val);
+
+ /* write the new t_hot value */
+ reg_val = thresh_val & ~tsr->threshold_thot_mask;
+ reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
+ return -EIO;
+ }
+
+ err = bg_readl(bg_ptr, tsr->bgap_mask_ctrl, ®_val);
+ reg_val |= tsr->mask_hot_mask;
+ reg_val |= tsr->mask_cold_mask;
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
+ return -EIO;
+ }
+
+ return err;
+}
+
+static
+int temp_sensor_configure_tcold(struct omap_bandgap *bg_ptr, int id,
+ int t_cold)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct temp_sensor_registers *tsr;
+ u32 thresh_val = 0, reg_val;
+ int hot, err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ /* obtain the T cold value */
+ err = bg_readl(bg_ptr, tsr->bgap_threshold, &thresh_val);
+ hot = (thresh_val & tsr->threshold_thot_mask) >>
+ __ffs(tsr->threshold_thot_mask);
+
+ if (t_cold >= hot) {
+ /* change the t_hot to t_cold + 5000 millidegrees */
+ err |= add_hyst(t_cold, ts_data->hyst_val, bg_ptr, id, &hot);
+ /* write the new t_hot value */
+ reg_val = thresh_val & (~tsr->threshold_thot_mask);
+ reg_val |= hot << __ffs(tsr->threshold_thot_mask);
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
+ thresh_val = reg_val;
+ }
+
+ /* write the new t_cold value */
+ reg_val = thresh_val & ~tsr->threshold_tcold_mask;
+ reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
+ return -EIO;
+ }
+
+ return temp_sensor_unmask_interrupts(bg_ptr, id, hot, t_cold);
+}
+
+static int temp_sensor_configure_tshut_hot(struct omap_bandgap *bg_ptr,
+ int id, int tshut_hot)
+{
+ struct temp_sensor_registers *tsr;
+ u32 reg_val;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = bg_readl(bg_ptr, tsr->tshut_threshold, ®_val);
+ reg_val &= ~tsr->tshut_hot_mask;
+ reg_val |= tshut_hot << __ffs(tsr->tshut_hot_mask);
+ err |= bg_writel(bg_ptr, reg_val, tsr->tshut_threshold, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tshut thot\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int temp_sensor_configure_tshut_cold(struct omap_bandgap *bg_ptr,
+ int id, int tshut_cold)
+{
+ struct temp_sensor_registers *tsr;
+ u32 reg_val;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = bg_readl(bg_ptr, tsr->tshut_threshold, ®_val);
+ reg_val &= ~tsr->tshut_cold_mask;
+ reg_val |= tshut_cold << __ffs(tsr->tshut_cold_mask);
+ err |= bg_writel(bg_ptr, reg_val, tsr->tshut_threshold, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int configure_temp_sensor_counter(struct omap_bandgap *bg_ptr, int id,
+ u32 counter)
+{
+ struct temp_sensor_registers *tsr;
+ u32 val = 0;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = bg_readl(bg_ptr, tsr->bgap_counter, &val);
+ val &= ~tsr->counter_mask;
+ val |= counter << __ffs(tsr->counter_mask);
+ err |= bg_writel(bg_ptr, val, tsr->bgap_counter, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+/* Exposed APIs */
+/**
+ * omap_bandgap_read_thot() - reads sensor current thot
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @thot - resulting current thot value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id,
+ int *thot)
+{
+ struct temp_sensor_registers *tsr;
+ u32 temp;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = bg_readl(bg_ptr, tsr->bgap_threshold, &temp);
+ temp = (temp & tsr->threshold_thot_mask) >>
+ __ffs(tsr->threshold_thot_mask);
+ ret |= adc_to_temp_conversion(bg_ptr, id, temp, &temp);
+ if (ret) {
+ dev_err(bg_ptr->dev, "failed to read thot\n");
+ return -EIO;
+ }
+
+ *thot = temp;
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_write_thot() - sets sensor current thot
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @val - desired thot value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct temp_sensor_registers *tsr;
+ u32 t_hot;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+
+ if (val < ts_data->min_temp + ts_data->hyst_val)
+ return -EINVAL;
+ ret = temp_to_adc_conversion(val, bg_ptr, id, &t_hot);
+ if (ret < 0)
+ return ret;
+
+ mutex_lock(&bg_ptr->bg_mutex);
+ temp_sensor_configure_thot(bg_ptr, id, t_hot);
+ mutex_unlock(&bg_ptr->bg_mutex);
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_read_tcold() - reads sensor current tcold
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @tcold - resulting current tcold value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id,
+ int *tcold)
+{
+ struct temp_sensor_registers *tsr;
+ u32 temp;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = bg_readl(bg_ptr, tsr->bgap_threshold, &temp);
+ temp = (temp & tsr->threshold_tcold_mask)
+ >> __ffs(tsr->threshold_tcold_mask);
+ ret |= adc_to_temp_conversion(bg_ptr, id, temp, &temp);
+ if (ret)
+ return -EIO;
+
+ *tcold = temp;
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_write_tcold() - sets the sensor tcold
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @val - desired tcold value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct temp_sensor_registers *tsr;
+ u32 t_cold;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ if (val > ts_data->max_temp + ts_data->hyst_val)
+ return -EINVAL;
+
+ ret = temp_to_adc_conversion(val, bg_ptr, id, &t_cold);
+ if (ret < 0)
+ return ret;
+
+ mutex_lock(&bg_ptr->bg_mutex);
+ temp_sensor_configure_tcold(bg_ptr, id, t_cold);
+ mutex_unlock(&bg_ptr->bg_mutex);
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_read_update_interval() - read the sensor update interval
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @interval - resulting update interval in miliseconds
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
+ int *interval)
+{
+ struct temp_sensor_registers *tsr;
+ u32 time;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = bg_readl(bg_ptr, tsr->bgap_counter, &time);
+ if (ret)
+ return ret;
+ time = (time & tsr->counter_mask) >> __ffs(tsr->counter_mask);
+ time = time * 1000 / bg_ptr->clk_rate;
+
+ *interval = time;
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_write_update_interval() - set the update interval
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @interval - desired update interval in miliseconds
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr,
+ int id, u32 interval)
+{
+ interval = interval * bg_ptr->clk_rate / 1000;
+ mutex_lock(&bg_ptr->bg_mutex);
+ configure_temp_sensor_counter(bg_ptr, id, interval);
+ mutex_unlock(&bg_ptr->bg_mutex);
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_read_temperature() - report current temperature
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @temperature - resulting temperature
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
+ int *temperature)
+{
+ struct temp_sensor_registers *tsr;
+ u32 temp;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = bg_readl(bg_ptr, tsr->temp_sensor_ctrl, &temp);
+ temp &= tsr->bgap_dtemp_mask;
+
+ ret |= adc_to_temp_conversion(bg_ptr, id, temp, &temp);
+ if (ret)
+ return -EIO;
+
+ *temperature = temp;
+
+ return 0;
+}
+
+/**
+ * enable_continuous_mode() - One time enabling of continuous conversion mode
+ * @bg_ptr - pointer to scm instance
+ */
+static int enable_continuous_mode(struct omap_bandgap *bg_ptr)
+{
+ struct temp_sensor_registers *tsr;
+ int i, r;
+ u32 val;
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ tsr = bg_ptr->pdata->sensors[i].registers;
+ r = bg_readl(bg_ptr, tsr->bgap_mode_ctrl, &val);
+ val |= 1 << __ffs(tsr->mode_ctrl_mask);
+ r |= bg_writel(bg_ptr, val, tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
+ if (r)
+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
+ }
+
+ return r ? -EIO : 0;
+}
+
+static int omap_bandgap_tshut_init(struct omap_bandgap *bg_ptr,
+ struct platform_device *pdev)
+{
+ int gpio_nr = bg_ptr->tshut_gpio;
+ int status;
+
+ /* Request for gpio_86 line */
+ status = gpio_request(gpio_nr, "tshut");
+ if (status < 0) {
+ dev_err(bg_ptr->dev,
+ "Could not request for TSHUT GPIO:%i\n", 86);
+ return status;
+ }
+ status = gpio_direction_input(gpio_nr);
+ if (status) {
+ dev_err(bg_ptr->dev,
+ "Cannot set input TSHUT GPIO %d\n", gpio_nr);
+ return status;
+ }
+
+ status = request_irq(gpio_to_irq(gpio_nr),
+ omap_bandgap_tshut_irq_handler,
+ IRQF_TRIGGER_RISING, "tshut",
+ NULL);
+ if (status) {
+ gpio_free(gpio_nr);
+ dev_err(bg_ptr->dev, "request irq failed for TSHUT");
+ }
+
+ return 0;
+}
+
+static int omap_bandgap_talert_init(struct omap_bandgap *bg_ptr,
+ struct platform_device *pdev)
+{
+ int ret;
+
+ bg_ptr->irq = platform_get_irq(pdev, 0);
+ if (bg_ptr->irq < 0) {
+ dev_err(&pdev->dev, "get_irq failed\n");
+ return bg_ptr->irq;
+ }
+ ret = request_threaded_irq(bg_ptr->irq, NULL,
+ talert_irq_handler,
+ IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
+ "talert", bg_ptr);
+ if (ret) {
+ dev_err(&pdev->dev, "Request threaded irq failed.\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct omap_bandgap_data omap4460_data = {
+ .has_talert = true,
+ .has_tshut = true,
+ .tshut_gpio = 86,
+ .fclock_name = "bandgap_ts_fclk",
+ .div_ck_name = "div_ts_ck",
+ .conv_table = omap4460_adc_to_temp,
+ .irq = 126,
+ .sensors = {
+ {
+ .registers = &omap4460_mpu_temp_sensor_registers,
+ .ts_data = &omap4460_mpu_temp_sensor_data,
+ .domain = "cpu",
+ },
+ },
+ .sensor_count = 1,
+};
+
+static const struct omap_bandgap_data omap5430_data = {
+ .has_talert = true,
+ .has_tshut = true,
+ .tshut_gpio = 0, /* TODO. Fill correct tshut_gpio */
+ .fclock_name = "ts_clk_div_ck",
+ .div_ck_name = "ts_clk_div_ck",
+ .conv_table = omap5430_adc_to_temp,
+ .irq = 0, /* TODO. Fill correct irq */
+ .sensors = {
+ {
+ .registers = &omap5430_mpu_temp_sensor_registers,
+ .ts_data = &omap5430_mpu_temp_sensor_data,
+ .domain = "cpu",
+ },
+ {
+ .registers = &omap5430_gpu_temp_sensor_registers,
+ .ts_data = &omap5430_gpu_temp_sensor_data,
+ .domain = "gpu",
+ },
+ {
+ .registers = &omap5430_core_temp_sensor_registers,
+ .ts_data = &omap5430_core_temp_sensor_data,
+ .domain = "core",
+ },
+ },
+ .sensor_count = 3,
+};
+
+static const struct of_device_id of_omap_bandgap_match[] = {
+ /*
+ * TODO: Add support to 4430
+ * { .compatible = "ti,omap4430-bandgap", .data = , },
+ */
+ {
+ .compatible = "ti,omap4-bandgap",
+ },
+ /* Sentinel */
+ { },
+};
+
+static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
+{
+ struct device_node *node = pdev->dev.of_node;
+ struct omap_bandgap *bg_ptr;
+ u32 val;
+ struct resource *io_res;
+
+ /* just for the sake */
+ if (!node) {
+ dev_err(&pdev->dev, "No platform information available\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ bg_ptr = devm_kzalloc(&pdev->dev, sizeof(struct omap_bandgap),
+ GFP_KERNEL);
+ if (!bg_ptr) {
+ dev_err(&pdev->dev, "Unable to allocate mem for driver ref\n");
+ return ERR_PTR(-ENOMEM);
+ }
+
+ io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!io_res) {
+ dev_err(&pdev->dev, "Failed to get IO resource\n");
+ return ERR_PTR(-ENOENT);
+ }
+
+// printk("\n\t\t **** omap_bandgap_build(): start %x ", io_res->start);
+// printk("\n\t\t **** omap_bandgap_build(): size %x ", resource_size(io_res));
+ bg_ptr->bg_base = ioremap(io_res->start, resource_size(io_res));
+// printk("\n\t\t **** omap_bandgap_build(): bg_base %x ", bg_ptr->bg_base);
+ if (!bg_ptr->bg_base)
+ return 0;
+
+ bg_readl(bg_ptr, 0x0, &val);
+
+ /*
+ * Check omap control core module revision to find out
+ * bandgap type
+ */
+ switch ((val & 0x3ff) >> 8) {
+ case 1:
+ /* 4430 */
+ bg_ptr->pdata = &omap4460_data;
+ break;
+ case 2:
+ /* 4460 */
+ bg_ptr->pdata = &omap4460_data;
+ break;
+ default:
+ /* Unknown omap control core module revision */
+ return 0;
+ }
+
+ if (bg_ptr->pdata->has_tshut) {
+ bg_ptr->tshut_gpio = bg_ptr->pdata->tshut_gpio;
+ if (!gpio_is_valid(bg_ptr->tshut_gpio)) {
+ dev_err(&pdev->dev, "invalid gpio for tshut (%d)\n",
+ bg_ptr->tshut_gpio);
+ return ERR_PTR(-EINVAL);
+ }
+ }
+
+ return bg_ptr;
+}
+
+struct resource *platform_get_resource_dbg(struct platform_device *dev,
+ unsigned int type, unsigned int num);
+
+static
+int __devinit omap_bandgap_probe(struct platform_device *pdev)
+{
+ struct omap_bandgap *bg_ptr;
+ int clk_rate, ret = 0, i;
+
+ bg_ptr = omap_bandgap_build(pdev);
+ if (IS_ERR_OR_NULL(bg_ptr)) {
+ dev_err(&pdev->dev, "failed to fetch platform data\n");
+ return PTR_ERR(bg_ptr);
+ }
+
+ if (bg_ptr->pdata->has_talert) {
+ ret = omap_bandgap_talert_init(bg_ptr, pdev);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to initialize Talert IRQ\n");
+ return ret;
+ }
+ }
+
+ if (bg_ptr->pdata->has_tshut) {
+ ret = omap_bandgap_tshut_init(bg_ptr, pdev);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "failed to initialize system tshut IRQ\n");
+ goto free_talert;
+ }
+ }
+
+ bg_ptr->fclock = clk_get(NULL, bg_ptr->pdata->fclock_name);
+ ret = IS_ERR_OR_NULL(bg_ptr->fclock);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to request fclock reference\n");
+ goto free_irqs;
+ }
+
+ bg_ptr->div_clk = clk_get(NULL, bg_ptr->pdata->div_ck_name);
+ ret = IS_ERR_OR_NULL(bg_ptr->div_clk);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "failed to request div_ts_ck clock ref\n");
+ goto free_irqs;
+ }
+
+ bg_ptr->conv_table = bg_ptr->pdata->conv_table;
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_registers *tsr;
+ u32 val;
+
+ tsr = bg_ptr->pdata->sensors[i].registers;
+ /* Initialize register lock */
+ spin_lock_init(&tsr->bg_reg_lock);
+
+ /*
+ * check if the efuse has a non-zero value if not
+ * it is an untrimmed sample and the temperatures
+ * may not be accurate
+ */
+ ret = bg_readl(bg_ptr, tsr->bgap_efuse, &val);
+ if (ret || !val)
+ dev_info(&pdev->dev,
+ "Non-trimmed BGAP, Temp not accurate\n");
+ }
+
+ clk_rate = clk_round_rate(bg_ptr->div_clk,
+ bg_ptr->pdata->sensors[0].ts_data->max_freq);
+ if (clk_rate < bg_ptr->pdata->sensors[0].ts_data->min_freq ||
+ clk_rate == 0xffffffff) {
+ ret = -ENODEV;
+ goto put_clks;
+ }
+
+ ret = clk_set_rate(bg_ptr->div_clk, clk_rate);
+ if (ret) {
+ dev_err(&pdev->dev, "Cannot set clock rate\n");
+ goto put_clks;
+ }
+
+ bg_ptr->clk_rate = clk_rate;
+ clk_enable(bg_ptr->fclock);
+
+ mutex_init(&bg_ptr->bg_mutex);
+ bg_ptr->dev = &pdev->dev;
+ platform_set_drvdata(pdev, bg_ptr);
+
+ /* 1 clk cycle */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++)
+ configure_temp_sensor_counter(bg_ptr, i, 1);
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_data *ts_data;
+
+ ts_data = bg_ptr->pdata->sensors[i].ts_data;
+
+ temp_sensor_init_talert_thresholds(bg_ptr, i,
+ ts_data->t_hot,
+ ts_data->t_cold);
+ temp_sensor_configure_tshut_hot(bg_ptr, i,
+ ts_data->tshut_hot);
+ temp_sensor_configure_tshut_cold(bg_ptr, i,
+ ts_data->tshut_cold);
+ }
+
+ enable_continuous_mode(bg_ptr);
+
+ /* Set .250 seconds time as default counter */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++)
+ configure_temp_sensor_counter(bg_ptr, i,
+ bg_ptr->clk_rate / 4);
+
+ /* Every thing is good? Then expose the sensors */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ char *domain;
+
+ domain = bg_ptr->pdata->sensors[i].domain;
+ if (bg_ptr->pdata->expose_sensor)
+ bg_ptr->pdata->expose_sensor(bg_ptr, i, domain);
+ }
+
+ return 0;
+
+put_clks:
+ clk_disable(bg_ptr->fclock);
+ clk_put(bg_ptr->fclock);
+ clk_put(bg_ptr->div_clk);
+free_irqs:
+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
+ gpio_free(bg_ptr->tshut_gpio);
+free_talert:
+ free_irq(bg_ptr->irq, bg_ptr);
+
+ return ret;
+}
+
+static
+int __devexit omap_bandgap_remove(struct platform_device *pdev)
+{
+ struct omap_bandgap *bg_ptr = platform_get_drvdata(pdev);
+
+ clk_disable(bg_ptr->fclock);
+ clk_put(bg_ptr->fclock);
+ clk_put(bg_ptr->div_clk);
+ free_irq(bg_ptr->irq, bg_ptr);
+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
+ gpio_free(bg_ptr->tshut_gpio);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int omap_bandgap_save_ctxt(struct omap_bandgap *bg_ptr)
+{
+ int err = 0;
+ int i;
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_registers *tsr;
+ struct temp_sensor_regval *rval;
+
+ rval = bg_ptr->pdata->sensors[i].regval;
+ tsr = bg_ptr->pdata->sensors[i].registers;
+
+ err = bg_readl(bg_ptr, tsr->bgap_mode_ctrl,
+ &rval->bg_mode_ctrl);
+ err |= bg_readl(bg_ptr, tsr->bgap_mask_ctrl,
+ &rval->bg_ctrl);
+ err |= bg_readl(bg_ptr, tsr->bgap_counter,
+ &rval->bg_counter);
+ err |= bg_readl(bg_ptr, tsr->bgap_threshold,
+ &rval->bg_threshold);
+ err |= bg_readl(bg_ptr, tsr->tshut_threshold,
+ &rval->tshut_threshold);
+
+ if (err)
+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
+ }
+
+ return err ? -EIO : 0;
+}
+
+static int
+omap_bandgap_force_single_read(struct omap_bandgap *bg_ptr, int id)
+{
+ struct temp_sensor_registers *tsr;
+ u32 temp = 0, counter = 1000;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ /* Select single conversion mode */
+ err = bg_readl(bg_ptr, tsr->bgap_mode_ctrl, &temp);
+ temp &= ~(1 << __ffs(tsr->mode_ctrl_mask));
+ bg_writel(bg_ptr, temp, tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
+
+ /* Start of Conversion = 1 */
+ err |= bg_readl(bg_ptr, tsr->temp_sensor_ctrl, &temp);
+ temp |= 1 << __ffs(tsr->bgap_soc_mask);
+ bg_writel(bg_ptr, temp, tsr->temp_sensor_ctrl, &tsr->bg_reg_lock);
+ /* Wait until DTEMP is updated */
+ err |= bg_readl(bg_ptr, tsr->temp_sensor_ctrl, &temp);
+ temp &= (tsr->bgap_dtemp_mask);
+ while ((temp == 0) && --counter) {
+ err |= bg_readl(bg_ptr, tsr->temp_sensor_ctrl, &temp);
+ temp &= (tsr->bgap_dtemp_mask);
+ }
+ /* Start of Conversion = 0 */
+ err |= bg_readl(bg_ptr, tsr->temp_sensor_ctrl, &temp);
+ temp &= ~(1 << __ffs(tsr->bgap_soc_mask));
+ err |= bg_writel(bg_ptr, temp, tsr->temp_sensor_ctrl, &tsr->bg_reg_lock);
+
+ return err ? -EIO : 0;
+}
+
+static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr)
+{
+ int i, err = 0;
+ u32 temp = 0;
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_registers *tsr;
+ struct temp_sensor_regval *rval;
+ u32 val = 0;
+
+ rval = bg_ptr->pdata->sensors[i].regval;
+ tsr = bg_ptr->pdata->sensors[i].registers;
+
+ err = bg_readl(bg_ptr, tsr->bgap_counter, &val);
+ if (val == 0) {
+ err |= bg_writel(bg_ptr, rval->bg_threshold,
+ tsr->bgap_threshold, &tsr->bg_reg_lock);
+ err |= bg_writel(bg_ptr, rval->tshut_threshold,
+ tsr->tshut_threshold, &tsr->bg_reg_lock);
+ /* Force immediate temperature measurement and update
+ * of the DTEMP field
+ */
+ omap_bandgap_force_single_read(bg_ptr, i);
+ err |= bg_writel(bg_ptr, rval->bg_counter,
+ tsr->bgap_counter, &tsr->bg_reg_lock);
+ err |= bg_writel(bg_ptr, rval->bg_mode_ctrl,
+ tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
+ err |= bg_writel(bg_ptr, rval->bg_ctrl,
+ tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
+ } else {
+ err |= bg_readl(bg_ptr, tsr->temp_sensor_ctrl,
+ &temp);
+ temp &= (tsr->bgap_dtemp_mask);
+ if (temp == 0) {
+ omap_bandgap_force_single_read(bg_ptr, i);
+ err |= bg_readl(bg_ptr, tsr->bgap_mask_ctrl,
+ &temp);
+ temp |= 1 << __ffs(tsr->mode_ctrl_mask);
+ err |= bg_writel(bg_ptr, temp,
+ tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
+ }
+ }
+ if (err)
+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
+ }
+
+ return err ? -EIO : 0;
+}
+
+static int omap_bandgap_suspend(struct device *dev)
+{
+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
+ int err;
+
+ err = omap_bandgap_save_ctxt(bg_ptr);
+ clk_disable(bg_ptr->fclock);
+
+ return err;
+}
+
+static int omap_bandgap_resume(struct device *dev)
+{
+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
+
+ clk_enable(bg_ptr->fclock);
+
+ return omap_bandgap_restore_ctxt(bg_ptr);
+}
+static const struct dev_pm_ops omap_bandgap_dev_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(omap_bandgap_suspend,
+ omap_bandgap_resume)
+};
+
+#define DEV_PM_OPS (&omap_bandgap_dev_pm_ops)
+#else
+#define DEV_PM_OPS NULL
+#endif
+
+static struct platform_driver omap_bandgap_sensor_driver = {
+ .probe = omap_bandgap_probe,
+ .remove = omap_bandgap_remove,
+ .driver = {
+ .name = "omap-bandgap",
+ .pm = DEV_PM_OPS,
+ .of_match_table = of_omap_bandgap_match,
+ },
+};
+
+module_platform_driver(omap_bandgap_sensor_driver);
+early_platform_init("early_omap_temperature", &omap_bandgap_sensor_driver);
+
+static int __init bg_init(void)
+{
+ return platform_driver_register(&omap_bandgap_sensor_driver);
+}
+
+static void __exit bg_exit(void)
+{
+ platform_driver_unregister(&omap_bandgap_sensor_driver);
+}
+
+module_init(bg_init);
+module_exit(bg_exit);
+
+MODULE_DESCRIPTION("OMAP4+ bandgap temperature sensor driver");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:omap-bandgap");
+MODULE_AUTHOR("Texas Instrument Inc.");
Index: linux-2.6/drivers/thermal/omap-bandgap.h
===================================================================
--- /dev/null
+++ linux-2.6/drivers/thermal/omap-bandgap.h
@@ -0,0 +1,64 @@
+/*
+ * OMAP4 Bandgap temperature sensor driver
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ * Contact:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+#ifndef __OMAP_BANDGAP_H
+#define __OMAP_BANDGAP_H
+
+struct omap_bandgap_data;
+
+/**
+ * struct omap_bandgap - bandgap device structure
+ * @dev: device pointer
+ * @pdata: platform data with sensor data
+ * @fclock: pointer to functional clock of temperature sensor
+ * @div_clk: pointer to parent clock of temperature sensor fclk
+ * @conv_table: Pointer to adc to temperature conversion table
+ * @bg_mutex: Mutex for sysfs, irq and PM
+ * @irq: MPU Irq number for thermal alert
+ * @tshut_gpio: GPIO where Tshut signal is routed
+ * @clk_rate: Holds current clock rate
+ */
+struct omap_bandgap {
+ struct device *dev;
+ const struct omap_bandgap_data *pdata;
+ struct clk *fclock;
+ struct clk *div_clk;
+ const int *conv_table;
+ struct mutex bg_mutex; /* Mutex for irq and PM */
+ int irq;
+ int tshut_gpio;
+ u32 clk_rate;
+ void __iomem *bg_base;
+};
+
+int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id, int *thot);
+int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val);
+int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id, int *tcold);
+int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val);
+int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
+ int *interval);
+int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr, int id,
+ u32 interval);
+int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
+ int *temperature);
+
+#endif
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 07/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor
@ 2012-06-18 11:32 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: linux-arm-kernel
In the System Control Module, OMAP supplies a voltage reference
and a temperature sensor feature that are gathered in the band
gap voltage and temperature sensor (VBGAPTS) module. The band
gap provides current and voltage reference for its internal
circuits and other analog IP blocks. The analog-to-digital
converter (ADC) produces an output value that is proportional
to the silicon temperature.
This patch provides a platform driver which expose this feature.
It is moduled as a MFD child of the System Control Module core
MFD driver.
This driver provides only APIs to access the device properties,
like temperature, thresholds and update rate.
Changes since previous version:
- Bandgap and usb phy: drivers are now independent from control module driver, they use their own API functions.
- Bandgap and usb phy: Added private spinlocks for bandgap and usb drivers.
- Bandgap: Check the type of bandgap dynamically in bandgap driver probe function by reading
omap core control module revision register CONTROL_GEN_CORE_REVISION.
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
Documentation/devicetree/bindings/thermal/omap_bandgap.txt | 27
drivers/thermal/Kconfig | 12
drivers/thermal/Makefile | 4
drivers/thermal/omap-bandgap.c | 1654 +++++++++++++
drivers/thermal/omap-bandgap.h | 64
5 files changed, 1760 insertions(+), 1 deletion(-)
Index: linux-2.6/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
===================================================================
--- /dev/null
+++ linux-2.6/Documentation/devicetree/bindings/thermal/omap_bandgap.txt
@@ -0,0 +1,27 @@
+* Texas Instrument OMAP SCM bandgap bindings
+
+In the System Control Module, OMAP supplies a voltage reference
+and a temperature sensor feature that are gathered in the band
+gap voltage and temperature sensor (VBGAPTS) module. The band
+gap provides current and voltage reference for its internal
+circuits and other analog IP blocks. The analog-to-digital
+converter (ADC) produces an output value that is proportional
+to the silicon temperature.
+
+Required properties:
+- compatible : Should be:
+ - "ti,omap4460-control-bandgap" : for OMAP4460 bandgap
+ - "ti,omap5430-control-bandgap" : for OMAP5430 bandgap
+- interrupts : this entry should indicate which interrupt line
+the talert signal is routed to;
+Specific:
+- ti,tshut-gpio : this entry should be used to inform which GPIO
+line the tshut signal is routed to;
+
+Example:
+
+bandgap {
+ compatible = "ti,omap4460-control-bandgap";
+ interrupts = <0 126 4>; /* talert */
+ ti,tshut-gpio = <86>;
+};
Index: linux-2.6/drivers/thermal/Kconfig
===================================================================
--- linux-2.6.orig/drivers/thermal/Kconfig
+++ linux-2.6/drivers/thermal/Kconfig
@@ -26,3 +26,15 @@ config SPEAR_THERMAL
help
Enable this to plug the SPEAr thermal sensor driver into the Linux
thermal framework
+
+config OMAP_BANDGAP
+ tristate "Texas Instruments OMAP4+ temperature sensor driver"
+ depends on THERMAL
+ help
+ If you say yes here you get support for the Texas Instruments
+ OMAP4460+ on die bandgap temperature sensor support. The register
+ set is part of system control module.
+
+ This includes alert interrupts generation and also the TSHUT
+ support.
+
Index: linux-2.6/drivers/thermal/Makefile
===================================================================
--- linux-2.6.orig/drivers/thermal/Makefile
+++ linux-2.6/drivers/thermal/Makefile
@@ -3,4 +3,6 @@
#
obj-$(CONFIG_THERMAL) += thermal_sys.o
-obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
\ No newline at end of file
+obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
+obj-$(CONFIG_OMAP_BANDGAP) += omap-thermal.o
+omap-thermal-y := omap-bandgap.o
Index: linux-2.6/drivers/thermal/omap-bandgap.c
===================================================================
--- /dev/null
+++ linux-2.6/drivers/thermal/omap-bandgap.c
@@ -0,0 +1,1654 @@
+/*
+ * OMAP4 Bandgap temperature sensor driver
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Author: J Keerthy <j-keerthy@ti.com>
+ * Author: Moiz Sonasath <m-sonasath@ti.com>
+ * Couple of fixes, DT and MFD adaptation:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/export.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/clk.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/types.h>
+#include <linux/mutex.h>
+#include <linux/reboot.h>
+#include <linux/of_platform.h>
+#include <linux/of_irq.h>
+
+#include <mach/control.h>
+
+#include "omap-bandgap.h"
+
+/* Offsets from the base of temperature sensor registers */
+
+#define OMAP4460_TEMP_SENSOR_CTRL_OFFSET 0x32C
+#define OMAP4460_BGAP_CTRL_OFFSET 0x378
+#define OMAP4460_BGAP_COUNTER_OFFSET 0x37C
+#define OMAP4460_BGAP_THRESHOLD_OFFSET 0x380
+#define OMAP4460_BGAP_TSHUT_OFFSET 0x384
+#define OMAP4460_BGAP_STATUS_OFFSET 0x388
+#define OMAP4460_FUSE_OPP_BGAP 0x260
+
+#define OMAP5430_TEMP_SENSOR_MPU_OFFSET 0x32C
+#define OMAP5430_BGAP_CTRL_OFFSET 0x380
+#define OMAP5430_BGAP_COUNTER_MPU_OFFSET 0x39C
+#define OMAP5430_BGAP_THRESHOLD_MPU_OFFSET 0x384
+#define OMAP5430_BGAP_TSHUT_MPU_OFFSET 0x390
+#define OMAP5430_BGAP_STATUS_OFFSET 0x3A8
+#define OMAP5430_FUSE_OPP_BGAP_MPU 0x1E4
+
+#define OMAP5430_TEMP_SENSOR_GPU_OFFSET 0x330
+#define OMAP5430_BGAP_COUNTER_GPU_OFFSET 0x3A0
+#define OMAP5430_BGAP_THRESHOLD_GPU_OFFSET 0x388
+#define OMAP5430_BGAP_TSHUT_GPU_OFFSET 0x394
+#define OMAP5430_FUSE_OPP_BGAP_GPU 0x1E0
+
+#define OMAP5430_TEMP_SENSOR_CORE_OFFSET 0x334
+#define OMAP5430_BGAP_COUNTER_CORE_OFFSET 0x3A4
+#define OMAP5430_BGAP_THRESHOLD_CORE_OFFSET 0x38C
+#define OMAP5430_BGAP_TSHUT_CORE_OFFSET 0x398
+#define OMAP5430_FUSE_OPP_BGAP_CORE 0x1E8
+
+#define OMAP4460_TSHUT_HOT 900 /* 122 deg C */
+#define OMAP4460_TSHUT_COLD 895 /* 100 deg C */
+#define OMAP4460_T_HOT 800 /* 73 deg C */
+#define OMAP4460_T_COLD 795 /* 71 deg C */
+#define OMAP4460_MAX_FREQ 1500000
+#define OMAP4460_MIN_FREQ 1000000
+#define OMAP4460_MIN_TEMP -40000
+#define OMAP4460_MAX_TEMP 123000
+#define OMAP4460_HYST_VAL 5000
+#define OMAP4460_ADC_START_VALUE 530
+#define OMAP4460_ADC_END_VALUE 932
+
+#define OMAP5430_MPU_TSHUT_HOT 915
+#define OMAP5430_MPU_TSHUT_COLD 900
+#define OMAP5430_MPU_T_HOT 800
+#define OMAP5430_MPU_T_COLD 795
+#define OMAP5430_MPU_MAX_FREQ 1500000
+#define OMAP5430_MPU_MIN_FREQ 1000000
+#define OMAP5430_MPU_MIN_TEMP -40000
+#define OMAP5430_MPU_MAX_TEMP 125000
+#define OMAP5430_MPU_HYST_VAL 5000
+#define OMAP5430_ADC_START_VALUE 532
+#define OMAP5430_ADC_END_VALUE 934
+
+#define OMAP5430_GPU_TSHUT_HOT 915
+#define OMAP5430_GPU_TSHUT_COLD 900
+#define OMAP5430_GPU_T_HOT 800
+#define OMAP5430_GPU_T_COLD 795
+#define OMAP5430_GPU_MAX_FREQ 1500000
+#define OMAP5430_GPU_MIN_FREQ 1000000
+#define OMAP5430_GPU_MIN_TEMP -40000
+#define OMAP5430_GPU_MAX_TEMP 125000
+#define OMAP5430_GPU_HYST_VAL 5000
+
+#define OMAP5430_CORE_TSHUT_HOT 915
+#define OMAP5430_CORE_TSHUT_COLD 900
+#define OMAP5430_CORE_T_HOT 800
+#define OMAP5430_CORE_T_COLD 795
+#define OMAP5430_CORE_MAX_FREQ 1500000
+#define OMAP5430_CORE_MIN_FREQ 1000000
+#define OMAP5430_CORE_MIN_TEMP -40000
+#define OMAP5430_CORE_MAX_TEMP 125000
+#define OMAP5430_CORE_HYST_VAL 5000
+
+/**
+ * The register offsets and bit fields might change across
+ * OMAP versions hence populating them in this structure.
+ */
+
+struct temp_sensor_registers {
+ u32 temp_sensor_ctrl;
+ u32 bgap_tempsoff_mask;
+ u32 bgap_soc_mask;
+ u32 bgap_eocz_mask;
+ u32 bgap_dtemp_mask;
+
+ u32 bgap_mask_ctrl;
+ u32 mask_hot_mask;
+ u32 mask_cold_mask;
+
+ u32 bgap_mode_ctrl;
+ u32 mode_ctrl_mask;
+
+ u32 bgap_counter;
+ u32 counter_mask;
+
+ u32 bgap_threshold;
+ u32 threshold_thot_mask;
+ u32 threshold_tcold_mask;
+
+ u32 tshut_threshold;
+ u32 tshut_hot_mask;
+ u32 tshut_cold_mask;
+
+ u32 bgap_status;
+ u32 status_clean_stop_mask;
+ u32 status_bgap_alert_mask;
+ u32 status_hot_mask;
+ u32 status_cold_mask;
+
+ u32 bgap_efuse;
+ spinlock_t bg_reg_lock;
+};
+
+/**
+ * The thresholds and limits for temperature sensors.
+ */
+struct temp_sensor_data {
+ u32 tshut_hot;
+ u32 tshut_cold;
+ u32 t_hot;
+ u32 t_cold;
+ u32 min_freq;
+ u32 max_freq;
+ int max_temp;
+ int min_temp;
+ int hyst_val;
+ u32 adc_start_val;
+ u32 adc_end_val;
+ u32 update_int1;
+ u32 update_int2;
+};
+
+/**
+ * struct temp_sensor_regval - temperature sensor register values
+ * @bg_mode_ctrl: temp sensor control register value
+ * @bg_ctrl: bandgap ctrl register value
+ * @bg_counter: bandgap counter value
+ * @bg_threshold: bandgap threshold register value
+ * @tshut_threshold: bandgap tshut register value
+ */
+struct temp_sensor_regval {
+ u32 bg_mode_ctrl;
+ u32 bg_ctrl;
+ u32 bg_counter;
+ u32 bg_threshold;
+ u32 tshut_threshold;
+};
+
+/**
+ * struct omap_temp_sensor - bandgap temperature sensor platform data
+ * @ts_data: pointer to struct with thresholds, limits of temperature sensor
+ * @registers: pointer to the list of register offsets and bitfields
+ * @regval: temperature sensor register values
+ * @domain: the name of the domain where the sensor is located
+ */
+struct omap_temp_sensor {
+ struct temp_sensor_data *ts_data;
+ struct temp_sensor_registers *registers;
+ struct temp_sensor_regval *regval;
+ char *domain;
+};
+
+/**
+ * struct omap_bandgap_data - bandgap platform data structure
+ * @has_talert: indicates if the chip has talert output line
+ * @has_tshut: indicates if the chip has tshut output line
+ * @conv_table: Pointer to adc to temperature conversion table
+ * @fclock_name: clock name of the functional clock
+ * @div_ck_nme: clock name of the clock divisor
+ * @sensor_count: count of temperature sensor device in scm
+ * @sensors: array of sensors present in this bandgap instance
+ * @expose_sensor: callback to export sensor to thermal API
+ */
+struct omap_bandgap_data {
+ bool has_talert;
+ bool has_tshut;
+ int tshut_gpio;
+ const int *conv_table;
+ char *fclock_name;
+ char *div_ck_name;
+ int sensor_count;
+ int (*report_temperature)(struct omap_bandgap *bg_ptr, int id);
+ int (*expose_sensor)(struct omap_bandgap *bg_ptr, int id, char *domain);
+ int irq;
+
+ /* this needs to be at the end */
+ struct omap_temp_sensor sensors[];
+};
+
+/* TODO: provide data structures for 4430 */
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap4460_mpu_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP4460_TEMP_SENSOR_CTRL_OFFSET,
+ .bgap_tempsoff_mask = OMAP4460_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP4460_MASK_HOT_MASK,
+ .mask_cold_mask = OMAP4460_MASK_COLD_MASK,
+
+ .bgap_mode_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
+ .mode_ctrl_mask = OMAP4460_SINGLE_MODE_MASK,
+
+ .bgap_counter = OMAP4460_BGAP_COUNTER_OFFSET,
+ .counter_mask = OMAP4460_COUNTER_MASK,
+
+ .bgap_threshold = OMAP4460_BGAP_THRESHOLD_OFFSET,
+ .threshold_thot_mask = OMAP4460_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP4460_T_COLD_MASK,
+
+ .tshut_threshold = OMAP4460_BGAP_TSHUT_OFFSET,
+ .tshut_hot_mask = OMAP4460_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP4460_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP4460_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = OMAP4460_CLEAN_STOP_MASK,
+ .status_bgap_alert_mask = OMAP4460_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP4460_HOT_FLAG_MASK,
+ .status_cold_mask = OMAP4460_COLD_FLAG_MASK,
+
+ .bgap_efuse = OMAP4460_FUSE_OPP_BGAP,
+};
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap5430_mpu_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_MPU_OFFSET,
+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP5430_MASK_HOT_MPU_MASK,
+ .mask_cold_mask = OMAP5430_MASK_COLD_MPU_MASK,
+
+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
+
+ .bgap_counter = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
+ .counter_mask = OMAP5430_COUNTER_MASK,
+
+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_MPU_OFFSET,
+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
+
+ .tshut_threshold = OMAP5430_BGAP_TSHUT_MPU_OFFSET,
+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = 0x0,
+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP5430_HOT_MPU_FLAG_MASK,
+ .status_cold_mask = OMAP5430_COLD_MPU_FLAG_MASK,
+
+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_MPU,
+};
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap5430_gpu_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_GPU_OFFSET,
+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP5430_MASK_HOT_MM_MASK,
+ .mask_cold_mask = OMAP5430_MASK_COLD_MM_MASK,
+
+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
+
+ .bgap_counter = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
+ .counter_mask = OMAP5430_COUNTER_MASK,
+
+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_GPU_OFFSET,
+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
+
+ .tshut_threshold = OMAP5430_BGAP_TSHUT_GPU_OFFSET,
+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = 0x0,
+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP5430_HOT_MM_FLAG_MASK,
+ .status_cold_mask = OMAP5430_COLD_MM_FLAG_MASK,
+
+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_GPU,
+};
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap5430_core_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_CORE_OFFSET,
+ .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP5430_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP5430_MASK_HOT_CORE_MASK,
+ .mask_cold_mask = OMAP5430_MASK_COLD_CORE_MASK,
+
+ .bgap_mode_ctrl = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
+ .mode_ctrl_mask = OMAP5430_REPEAT_MODE_MASK,
+
+ .bgap_counter = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
+ .counter_mask = OMAP5430_COUNTER_MASK,
+
+ .bgap_threshold = OMAP5430_BGAP_THRESHOLD_CORE_OFFSET,
+ .threshold_thot_mask = OMAP5430_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP5430_T_COLD_MASK,
+
+ .tshut_threshold = OMAP5430_BGAP_TSHUT_CORE_OFFSET,
+ .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK,
+ .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK,
+
+ .bgap_status = OMAP5430_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = 0x0,
+ .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK,
+ .status_hot_mask = OMAP5430_HOT_CORE_FLAG_MASK,
+ .status_cold_mask = OMAP5430_COLD_CORE_FLAG_MASK,
+
+ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_CORE,
+};
+
+/* Thresholds and limits for OMAP4460 MPU temperature sensor */
+static struct temp_sensor_data omap4460_mpu_temp_sensor_data = {
+ .tshut_hot = OMAP4460_TSHUT_HOT,
+ .tshut_cold = OMAP4460_TSHUT_COLD,
+ .t_hot = OMAP4460_T_HOT,
+ .t_cold = OMAP4460_T_COLD,
+ .min_freq = OMAP4460_MIN_FREQ,
+ .max_freq = OMAP4460_MAX_FREQ,
+ .max_temp = OMAP4460_MAX_TEMP,
+ .min_temp = OMAP4460_MIN_TEMP,
+ .hyst_val = OMAP4460_HYST_VAL,
+ .adc_start_val = OMAP4460_ADC_START_VALUE,
+ .adc_end_val = OMAP4460_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/* Thresholds and limits for OMAP5430 MPU temperature sensor */
+static struct temp_sensor_data omap5430_mpu_temp_sensor_data = {
+ .tshut_hot = OMAP5430_MPU_TSHUT_HOT,
+ .tshut_cold = OMAP5430_MPU_TSHUT_COLD,
+ .t_hot = OMAP5430_MPU_T_HOT,
+ .t_cold = OMAP5430_MPU_T_COLD,
+ .min_freq = OMAP5430_MPU_MIN_FREQ,
+ .max_freq = OMAP5430_MPU_MAX_FREQ,
+ .max_temp = OMAP5430_MPU_MAX_TEMP,
+ .min_temp = OMAP5430_MPU_MIN_TEMP,
+ .hyst_val = OMAP5430_MPU_HYST_VAL,
+ .adc_start_val = OMAP5430_ADC_START_VALUE,
+ .adc_end_val = OMAP5430_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/* Thresholds and limits for OMAP5430 GPU temperature sensor */
+static struct temp_sensor_data omap5430_gpu_temp_sensor_data = {
+ .tshut_hot = OMAP5430_GPU_TSHUT_HOT,
+ .tshut_cold = OMAP5430_GPU_TSHUT_COLD,
+ .t_hot = OMAP5430_GPU_T_HOT,
+ .t_cold = OMAP5430_GPU_T_COLD,
+ .min_freq = OMAP5430_GPU_MIN_FREQ,
+ .max_freq = OMAP5430_GPU_MAX_FREQ,
+ .max_temp = OMAP5430_GPU_MAX_TEMP,
+ .min_temp = OMAP5430_GPU_MIN_TEMP,
+ .hyst_val = OMAP5430_GPU_HYST_VAL,
+ .adc_start_val = OMAP5430_ADC_START_VALUE,
+ .adc_end_val = OMAP5430_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/* Thresholds and limits for OMAP5430 CORE temperature sensor */
+static struct temp_sensor_data omap5430_core_temp_sensor_data = {
+ .tshut_hot = OMAP5430_CORE_TSHUT_HOT,
+ .tshut_cold = OMAP5430_CORE_TSHUT_COLD,
+ .t_hot = OMAP5430_CORE_T_HOT,
+ .t_cold = OMAP5430_CORE_T_COLD,
+ .min_freq = OMAP5430_CORE_MIN_FREQ,
+ .max_freq = OMAP5430_CORE_MAX_FREQ,
+ .max_temp = OMAP5430_CORE_MAX_TEMP,
+ .min_temp = OMAP5430_CORE_MIN_TEMP,
+ .hyst_val = OMAP5430_CORE_HYST_VAL,
+ .adc_start_val = OMAP5430_ADC_START_VALUE,
+ .adc_end_val = OMAP5430_ADC_END_VALUE,
+ .update_int1 = 1000,
+ .update_int2 = 2000,
+};
+
+/*
+ * Temperature values in milli degree celsius
+ * ADC code values from 530 to 923
+ */
+static const int
+omap4460_adc_to_temp[OMAP4460_ADC_END_VALUE - OMAP4460_ADC_START_VALUE + 1] = {
+ -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600, -38200,
+ -37800, -37300, -36800, -36400, -36000, -35600, -35200, -34800,
+ -34300, -33800, -33400, -33000, -32600, -32200, -31800, -31300,
+ -30800, -30400, -30000, -29600, -29200, -28700, -28200, -27800,
+ -27400, -27000, -26600, -26200, -25700, -25200, -24800, -24400,
+ -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
+ -20600, -20200, -19700, -19200, -18800, -18400, -18000, -17600,
+ -17200, -16700, -16200, -15800, -15400, -15000, -14600, -14200,
+ -13700, -13200, -12800, -12400, -12000, -11600, -11200, -10700,
+ -10200, -9800, -9400, -9000, -8600, -8200, -7700, -7200, -6800,
+ -6400, -6000, -5600, -5200, -4800, -4300, -3800, -3400, -3000,
+ -2600, -2200, -1800, -1300, -800, -400, 0, 400, 800, 1200, 1600,
+ 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000, 6400,
+ 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10600, 11000,
+ 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800,
+ 15300, 15800, 16200, 16600, 17000, 17400, 17800, 18200, 18700,
+ 19200, 19600, 20000, 20400, 20800, 21200, 21600, 22100, 22600,
+ 23000, 23400, 23800, 24200, 24600, 25000, 25400, 25900, 26400,
+ 26800, 27200, 27600, 28000, 28400, 28800, 29300, 29800, 30200,
+ 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
+ 34400, 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800,
+ 38200, 38600, 39000, 39400, 39800, 40200, 40600, 41100, 41600,
+ 42000, 42400, 42800, 43200, 43600, 44000, 44400, 44800, 45300,
+ 45800, 46200, 46600, 47000, 47400, 47800, 48200, 48600, 49000,
+ 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400, 52800,
+ 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600,
+ 57000, 57400, 57800, 58200, 58700, 59200, 59600, 60000, 60400,
+ 60800, 61200, 61600, 62000, 62400, 62800, 63300, 63800, 64200,
+ 64600, 65000, 65400, 65800, 66200, 66600, 67000, 67400, 67800,
+ 68200, 68700, 69200, 69600, 70000, 70400, 70800, 71200, 71600,
+ 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
+ 75800, 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000,
+ 79400, 79800, 80300, 80800, 81200, 81600, 82000, 82400, 82800,
+ 83200, 83600, 84000, 84400, 84800, 85200, 85600, 86000, 86400,
+ 86800, 87300, 87800, 88200, 88600, 89000, 89400, 89800, 90200,
+ 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400, 93800,
+ 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600,
+ 98000, 98400, 98800, 99200, 99600, 100000, 100400, 100800, 101200,
+ 101600, 102000, 102400, 102800, 103200, 103600, 104000, 104400,
+ 104800, 105200, 105600, 106100, 106600, 107000, 107400, 107800,
+ 108200, 108600, 109000, 109400, 109800, 110200, 110600, 111000,
+ 111400, 111800, 112200, 112600, 113000, 113400, 113800, 114200,
+ 114600, 115000, 115400, 115800, 116200, 116600, 117000, 117400,
+ 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
+ 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
+ 124600, 124900, 125000, 125000, 125000, 125000
+};
+
+static const int
+omap5430_adc_to_temp[OMAP5430_ADC_END_VALUE - OMAP5430_ADC_START_VALUE + 1] = {
+ -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600,
+ -38200, -37800, -37300, -36800,
+ -36400, -36000, -35600, -35200, -34800, -34300, -33800, -33400, -33000,
+ -32600,
+ -32200, -31800, -31300, -30800, -30400, -30000, -29600, -29200, -28700,
+ -28200, -27800, -27400, -27000, -26600, -26200, -25700, -25200, -24800,
+ -24400, -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
+ -20600, -20200, -19700, -19200, -9300, -18400, -18000, -17600, -17200,
+ -16700, -16200, -15800, -15400, -15000, -14600, -14200, -13700, -13200,
+ -12800, -12400, -12000, -11600, -11200, -10700, -10200, -9800, -9400,
+ -9000,
+ -8600, -8200, -7700, -7200, -6800, -6400, -6000, -5600, -5200, -4800,
+ -4300,
+ -3800, -3400, -3000, -2600, -2200, -1800, -1300, -800, -400, 0, 400,
+ 800,
+ 1200, 1600, 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000,
+ 6400, 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10800,
+ 11100,
+ 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800, 15300,
+ 15800,
+ 16200, 16600, 17000, 17400, 17800, 18200, 18700, 19200, 19600, 20000,
+ 20400,
+ 20800, 21200, 21600, 22100, 22600, 23000, 23400, 23800, 24200, 24600,
+ 25000,
+ 25400, 25900, 26400, 26800, 27200, 27600, 28000, 28400, 28800, 29300,
+ 29800,
+ 30200, 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
+ 34400,
+ 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800, 38200, 38600,
+ 39000,
+ 39400, 39800, 40200, 40600, 41100, 41600, 42000, 42400, 42800, 43200,
+ 43600,
+ 44000, 44400, 44800, 45300, 45800, 46200, 46600, 47000, 47400, 47800,
+ 48200,
+ 48600, 49000, 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400,
+ 52800,
+ 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600, 57000,
+ 57400,
+ 57800, 58200, 58700, 59200, 59600, 60000, 60400, 60800, 61200, 61600,
+ 62000,
+ 62400, 62800, 63300, 63800, 64200, 64600, 65000, 65400, 65800, 66200,
+ 66600,
+ 67000, 67400, 67800, 68200, 68700, 69200, 69600, 70000, 70400, 70800,
+ 71200,
+ 71600, 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
+ 75800,
+ 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000, 79400, 79800,
+ 80300,
+ 80800, 81200, 81600, 82000, 82400, 82800, 83200, 83600, 84000, 84400,
+ 84800,
+ 85200, 85600, 86000, 86400, 86800, 87300, 87800, 88200, 88600, 89000,
+ 89400,
+ 89800, 90200, 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400,
+ 93800,
+ 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600, 98000,
+ 98400,
+ 98800, 99200, 99600, 100000, 100400, 100800, 101200, 101600, 102000,
+ 102400,
+ 102800, 103200, 103600, 104000, 104400, 104800, 105200, 105600, 106100,
+ 106600, 107000, 107400, 107800, 108200, 108600, 109000, 109400, 109800,
+ 110200, 110600, 111000, 111400, 111800, 112200, 112600, 113000, 113400,
+ 113800, 114200, 114600, 115000, 115400, 115800, 116200, 116600, 117000,
+ 117400, 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600,
+ 121000, 121400, 121800, 122200, 122600, 123000, 123400, 123800, 124200,
+ 124600, 124900, 125000, 125000, 125000, 125000,
+};
+
+/*
+ * TODO: Get rid from bg_readl() return value -
+ * It's useless.
+ */
+
+static int bg_readl(struct omap_bandgap *bg_ptr, u32 reg, u32 *val)
+{
+ if (!bg_ptr)
+ return -EINVAL;
+
+ *val = __raw_readl(bg_ptr->bg_base + reg);
+ return 0;
+}
+
+/*
+ * TODO: Get rid from bg_writel() return value -
+ * It's useless.
+ */
+static int bg_writel(struct omap_bandgap *bg_ptr, u32 val, u32 reg, spinlock_t *lock)
+{
+ unsigned long flags;
+
+ if (!bg_ptr)
+ return -EINVAL;
+
+ spin_lock_irqsave(lock, flags);
+ __raw_writel(val, bg_ptr->bg_base + reg);
+ spin_unlock_irqrestore(lock, flags);
+ return 0;
+}
+
+static irqreturn_t talert_irq_handler(int irq, void *data)
+{
+ struct omap_bandgap *bg_ptr = data;
+ struct temp_sensor_registers *tsr;
+ u32 t_hot = 0, t_cold = 0, temp, ctrl = 0;
+ int i, r;
+
+ bg_ptr = data;
+ /* Read the status of t_hot */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ tsr = bg_ptr->pdata->sensors[i].registers;
+ r = bg_readl(bg_ptr, tsr->bgap_status, &t_hot);
+ t_hot &= tsr->status_hot_mask;
+
+ /* Read the status of t_cold */
+ r |= bg_readl(bg_ptr, tsr->bgap_status, &t_cold);
+ t_cold &= tsr->status_cold_mask;
+
+ if (!t_cold && !t_hot)
+ continue;
+
+ r |= bg_readl(bg_ptr, tsr->bgap_mask_ctrl, &ctrl);
+ /*
+ * One TALERT interrupt: Two sources
+ * If the interrupt is due to t_hot then mask t_hot and
+ * and unmask t_cold else mask t_cold and unmask t_hot
+ */
+ if (t_hot) {
+ ctrl &= ~tsr->mask_hot_mask;
+ ctrl |= tsr->mask_cold_mask;
+ } else if (t_cold) {
+ ctrl &= ~tsr->mask_cold_mask;
+ ctrl |= tsr->mask_hot_mask;
+ }
+
+ r |= bg_writel(bg_ptr, ctrl, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
+
+ if (r) {
+ dev_err(bg_ptr->dev, "failed to ack talert interrupt\n");
+ return IRQ_NONE;
+ }
+
+ /* read temperature */
+ r = bg_readl(bg_ptr, tsr->temp_sensor_ctrl, &temp);
+ temp &= tsr->bgap_dtemp_mask;
+
+ /* report temperature to whom may concern */
+ if (bg_ptr->pdata->report_temperature)
+ bg_ptr->pdata->report_temperature(bg_ptr, i);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t omap_bandgap_tshut_irq_handler(int irq, void *data)
+{
+ orderly_poweroff(true);
+
+ return IRQ_HANDLED;
+}
+
+static
+int adc_to_temp_conversion(struct omap_bandgap *bg_ptr, int id, int adc_val,
+ int *t)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+
+ /* look up for temperature in the table and return the temperature */
+ if (adc_val < ts_data->adc_start_val || adc_val > ts_data->adc_end_val)
+ return -ERANGE;
+
+ *t = bg_ptr->conv_table[adc_val - ts_data->adc_start_val];
+
+ return 0;
+}
+
+static int temp_to_adc_conversion(long temp, struct omap_bandgap *bg_ptr, int i,
+ int *adc)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[i].ts_data;
+ int high, low, mid;
+
+ low = 0;
+ high = ts_data->adc_end_val - ts_data->adc_start_val;
+ mid = (high + low) / 2;
+
+ if (temp < bg_ptr->conv_table[high] || temp > bg_ptr->conv_table[high])
+ return -EINVAL;
+
+ while (low < high) {
+ if (temp < bg_ptr->conv_table[mid])
+ high = mid - 1;
+ else
+ low = mid + 1;
+ mid = (low + high) / 2;
+ }
+
+ *adc = ts_data->adc_start_val + low;
+
+ return 0;
+}
+
+static int temp_sensor_unmask_interrupts(struct omap_bandgap *bg_ptr, int id,
+ u32 t_hot, u32 t_cold)
+{
+ struct temp_sensor_registers *tsr;
+ u32 temp = 0, reg_val = 0;
+ int err;
+
+ /* Read the current on die temperature */
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = bg_readl(bg_ptr, tsr->temp_sensor_ctrl, &temp);
+ temp &= tsr->bgap_dtemp_mask;
+
+ err |= bg_readl(bg_ptr, tsr->bgap_mask_ctrl, ®_val);
+ if (temp < t_hot)
+ reg_val |= tsr->mask_hot_mask;
+ else
+ reg_val &= ~tsr->mask_hot_mask;
+
+ if (t_cold < temp)
+ reg_val |= tsr->mask_cold_mask;
+ else
+ reg_val &= ~tsr->mask_cold_mask;
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
+
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to unmask interrupts\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static
+int add_hyst(int adc_val, int hyst_val, struct omap_bandgap *bg_ptr, int i,
+ u32 *sum)
+{
+ int temp, ret;
+
+ ret = adc_to_temp_conversion(bg_ptr, i, adc_val, &temp);
+ if (ret < 0)
+ return ret;
+
+ temp += hyst_val;
+
+ return temp_to_adc_conversion(temp, bg_ptr, i, sum);
+}
+
+static
+int temp_sensor_configure_thot(struct omap_bandgap *bg_ptr, int id, int t_hot)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct temp_sensor_registers *tsr;
+ u32 thresh_val = 0, reg_val;
+ int cold, err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+
+ /* obtain the T cold value */
+ err = bg_readl(bg_ptr, tsr->bgap_threshold, &thresh_val);
+ cold = (thresh_val & tsr->threshold_tcold_mask) >>
+ __ffs(tsr->threshold_tcold_mask);
+ if (t_hot <= cold) {
+ /* change the t_cold to t_hot - 5000 millidegrees */
+ err |= add_hyst(t_hot, -ts_data->hyst_val, bg_ptr, id, &cold);
+ /* write the new t_cold value */
+ reg_val = thresh_val & (~tsr->threshold_tcold_mask);
+ reg_val |= cold << __ffs(tsr->threshold_tcold_mask);
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
+ thresh_val = reg_val;
+ }
+
+ /* write the new t_hot value */
+ reg_val = thresh_val & ~tsr->threshold_thot_mask;
+ reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
+ return -EIO;
+ }
+
+ return temp_sensor_unmask_interrupts(bg_ptr, id, t_hot, cold);
+}
+
+static
+int temp_sensor_init_talert_thresholds(struct omap_bandgap *bg_ptr, int id,
+ int t_hot, int t_cold)
+{
+ struct temp_sensor_registers *tsr;
+ u32 reg_val, thresh_val;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = bg_readl(bg_ptr, tsr->bgap_threshold, &thresh_val);
+
+ /* write the new t_cold value */
+ reg_val = thresh_val & ~tsr->threshold_tcold_mask;
+ reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
+ return -EIO;
+ }
+
+ err = bg_readl(bg_ptr, tsr->bgap_threshold, &thresh_val);
+
+ /* write the new t_hot value */
+ reg_val = thresh_val & ~tsr->threshold_thot_mask;
+ reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask));
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
+ return -EIO;
+ }
+
+ err = bg_readl(bg_ptr, tsr->bgap_mask_ctrl, ®_val);
+ reg_val |= tsr->mask_hot_mask;
+ reg_val |= tsr->mask_cold_mask;
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram thot threshold\n");
+ return -EIO;
+ }
+
+ return err;
+}
+
+static
+int temp_sensor_configure_tcold(struct omap_bandgap *bg_ptr, int id,
+ int t_cold)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct temp_sensor_registers *tsr;
+ u32 thresh_val = 0, reg_val;
+ int hot, err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ /* obtain the T cold value */
+ err = bg_readl(bg_ptr, tsr->bgap_threshold, &thresh_val);
+ hot = (thresh_val & tsr->threshold_thot_mask) >>
+ __ffs(tsr->threshold_thot_mask);
+
+ if (t_cold >= hot) {
+ /* change the t_hot to t_cold + 5000 millidegrees */
+ err |= add_hyst(t_cold, ts_data->hyst_val, bg_ptr, id, &hot);
+ /* write the new t_hot value */
+ reg_val = thresh_val & (~tsr->threshold_thot_mask);
+ reg_val |= hot << __ffs(tsr->threshold_thot_mask);
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
+ thresh_val = reg_val;
+ }
+
+ /* write the new t_cold value */
+ reg_val = thresh_val & ~tsr->threshold_tcold_mask;
+ reg_val |= (t_cold << __ffs(tsr->threshold_tcold_mask));
+ err |= bg_writel(bg_ptr, reg_val, tsr->bgap_threshold, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tcold threshold\n");
+ return -EIO;
+ }
+
+ return temp_sensor_unmask_interrupts(bg_ptr, id, hot, t_cold);
+}
+
+static int temp_sensor_configure_tshut_hot(struct omap_bandgap *bg_ptr,
+ int id, int tshut_hot)
+{
+ struct temp_sensor_registers *tsr;
+ u32 reg_val;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = bg_readl(bg_ptr, tsr->tshut_threshold, ®_val);
+ reg_val &= ~tsr->tshut_hot_mask;
+ reg_val |= tshut_hot << __ffs(tsr->tshut_hot_mask);
+ err |= bg_writel(bg_ptr, reg_val, tsr->tshut_threshold, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tshut thot\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int temp_sensor_configure_tshut_cold(struct omap_bandgap *bg_ptr,
+ int id, int tshut_cold)
+{
+ struct temp_sensor_registers *tsr;
+ u32 reg_val;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = bg_readl(bg_ptr, tsr->tshut_threshold, ®_val);
+ reg_val &= ~tsr->tshut_cold_mask;
+ reg_val |= tshut_cold << __ffs(tsr->tshut_cold_mask);
+ err |= bg_writel(bg_ptr, reg_val, tsr->tshut_threshold, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int configure_temp_sensor_counter(struct omap_bandgap *bg_ptr, int id,
+ u32 counter)
+{
+ struct temp_sensor_registers *tsr;
+ u32 val = 0;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ err = bg_readl(bg_ptr, tsr->bgap_counter, &val);
+ val &= ~tsr->counter_mask;
+ val |= counter << __ffs(tsr->counter_mask);
+ err |= bg_writel(bg_ptr, val, tsr->bgap_counter, &tsr->bg_reg_lock);
+ if (err) {
+ dev_err(bg_ptr->dev, "failed to reprogram tshut tcold\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+/* Exposed APIs */
+/**
+ * omap_bandgap_read_thot() - reads sensor current thot
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @thot - resulting current thot value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id,
+ int *thot)
+{
+ struct temp_sensor_registers *tsr;
+ u32 temp;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = bg_readl(bg_ptr, tsr->bgap_threshold, &temp);
+ temp = (temp & tsr->threshold_thot_mask) >>
+ __ffs(tsr->threshold_thot_mask);
+ ret |= adc_to_temp_conversion(bg_ptr, id, temp, &temp);
+ if (ret) {
+ dev_err(bg_ptr->dev, "failed to read thot\n");
+ return -EIO;
+ }
+
+ *thot = temp;
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_write_thot() - sets sensor current thot
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @val - desired thot value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct temp_sensor_registers *tsr;
+ u32 t_hot;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+
+ if (val < ts_data->min_temp + ts_data->hyst_val)
+ return -EINVAL;
+ ret = temp_to_adc_conversion(val, bg_ptr, id, &t_hot);
+ if (ret < 0)
+ return ret;
+
+ mutex_lock(&bg_ptr->bg_mutex);
+ temp_sensor_configure_thot(bg_ptr, id, t_hot);
+ mutex_unlock(&bg_ptr->bg_mutex);
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_read_tcold() - reads sensor current tcold
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @tcold - resulting current tcold value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id,
+ int *tcold)
+{
+ struct temp_sensor_registers *tsr;
+ u32 temp;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = bg_readl(bg_ptr, tsr->bgap_threshold, &temp);
+ temp = (temp & tsr->threshold_tcold_mask)
+ >> __ffs(tsr->threshold_tcold_mask);
+ ret |= adc_to_temp_conversion(bg_ptr, id, temp, &temp);
+ if (ret)
+ return -EIO;
+
+ *tcold = temp;
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_write_tcold() - sets the sensor tcold
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @val - desired tcold value
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val)
+{
+ struct temp_sensor_data *ts_data = bg_ptr->pdata->sensors[id].ts_data;
+ struct temp_sensor_registers *tsr;
+ u32 t_cold;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ if (val > ts_data->max_temp + ts_data->hyst_val)
+ return -EINVAL;
+
+ ret = temp_to_adc_conversion(val, bg_ptr, id, &t_cold);
+ if (ret < 0)
+ return ret;
+
+ mutex_lock(&bg_ptr->bg_mutex);
+ temp_sensor_configure_tcold(bg_ptr, id, t_cold);
+ mutex_unlock(&bg_ptr->bg_mutex);
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_read_update_interval() - read the sensor update interval
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @interval - resulting update interval in miliseconds
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
+ int *interval)
+{
+ struct temp_sensor_registers *tsr;
+ u32 time;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = bg_readl(bg_ptr, tsr->bgap_counter, &time);
+ if (ret)
+ return ret;
+ time = (time & tsr->counter_mask) >> __ffs(tsr->counter_mask);
+ time = time * 1000 / bg_ptr->clk_rate;
+
+ *interval = time;
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_write_update_interval() - set the update interval
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @interval - desired update interval in miliseconds
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr,
+ int id, u32 interval)
+{
+ interval = interval * bg_ptr->clk_rate / 1000;
+ mutex_lock(&bg_ptr->bg_mutex);
+ configure_temp_sensor_counter(bg_ptr, id, interval);
+ mutex_unlock(&bg_ptr->bg_mutex);
+
+ return 0;
+}
+
+/**
+ * omap_bandgap_read_temperature() - report current temperature
+ * @bg_ptr - pointer to bandgap instance
+ * @id - sensor id
+ * @temperature - resulting temperature
+ *
+ * returns 0 on success or the proper error code
+ */
+int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
+ int *temperature)
+{
+ struct temp_sensor_registers *tsr;
+ u32 temp;
+ int ret;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ ret = bg_readl(bg_ptr, tsr->temp_sensor_ctrl, &temp);
+ temp &= tsr->bgap_dtemp_mask;
+
+ ret |= adc_to_temp_conversion(bg_ptr, id, temp, &temp);
+ if (ret)
+ return -EIO;
+
+ *temperature = temp;
+
+ return 0;
+}
+
+/**
+ * enable_continuous_mode() - One time enabling of continuous conversion mode
+ * @bg_ptr - pointer to scm instance
+ */
+static int enable_continuous_mode(struct omap_bandgap *bg_ptr)
+{
+ struct temp_sensor_registers *tsr;
+ int i, r;
+ u32 val;
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ tsr = bg_ptr->pdata->sensors[i].registers;
+ r = bg_readl(bg_ptr, tsr->bgap_mode_ctrl, &val);
+ val |= 1 << __ffs(tsr->mode_ctrl_mask);
+ r |= bg_writel(bg_ptr, val, tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
+ if (r)
+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
+ }
+
+ return r ? -EIO : 0;
+}
+
+static int omap_bandgap_tshut_init(struct omap_bandgap *bg_ptr,
+ struct platform_device *pdev)
+{
+ int gpio_nr = bg_ptr->tshut_gpio;
+ int status;
+
+ /* Request for gpio_86 line */
+ status = gpio_request(gpio_nr, "tshut");
+ if (status < 0) {
+ dev_err(bg_ptr->dev,
+ "Could not request for TSHUT GPIO:%i\n", 86);
+ return status;
+ }
+ status = gpio_direction_input(gpio_nr);
+ if (status) {
+ dev_err(bg_ptr->dev,
+ "Cannot set input TSHUT GPIO %d\n", gpio_nr);
+ return status;
+ }
+
+ status = request_irq(gpio_to_irq(gpio_nr),
+ omap_bandgap_tshut_irq_handler,
+ IRQF_TRIGGER_RISING, "tshut",
+ NULL);
+ if (status) {
+ gpio_free(gpio_nr);
+ dev_err(bg_ptr->dev, "request irq failed for TSHUT");
+ }
+
+ return 0;
+}
+
+static int omap_bandgap_talert_init(struct omap_bandgap *bg_ptr,
+ struct platform_device *pdev)
+{
+ int ret;
+
+ bg_ptr->irq = platform_get_irq(pdev, 0);
+ if (bg_ptr->irq < 0) {
+ dev_err(&pdev->dev, "get_irq failed\n");
+ return bg_ptr->irq;
+ }
+ ret = request_threaded_irq(bg_ptr->irq, NULL,
+ talert_irq_handler,
+ IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
+ "talert", bg_ptr);
+ if (ret) {
+ dev_err(&pdev->dev, "Request threaded irq failed.\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct omap_bandgap_data omap4460_data = {
+ .has_talert = true,
+ .has_tshut = true,
+ .tshut_gpio = 86,
+ .fclock_name = "bandgap_ts_fclk",
+ .div_ck_name = "div_ts_ck",
+ .conv_table = omap4460_adc_to_temp,
+ .irq = 126,
+ .sensors = {
+ {
+ .registers = &omap4460_mpu_temp_sensor_registers,
+ .ts_data = &omap4460_mpu_temp_sensor_data,
+ .domain = "cpu",
+ },
+ },
+ .sensor_count = 1,
+};
+
+static const struct omap_bandgap_data omap5430_data = {
+ .has_talert = true,
+ .has_tshut = true,
+ .tshut_gpio = 0, /* TODO. Fill correct tshut_gpio */
+ .fclock_name = "ts_clk_div_ck",
+ .div_ck_name = "ts_clk_div_ck",
+ .conv_table = omap5430_adc_to_temp,
+ .irq = 0, /* TODO. Fill correct irq */
+ .sensors = {
+ {
+ .registers = &omap5430_mpu_temp_sensor_registers,
+ .ts_data = &omap5430_mpu_temp_sensor_data,
+ .domain = "cpu",
+ },
+ {
+ .registers = &omap5430_gpu_temp_sensor_registers,
+ .ts_data = &omap5430_gpu_temp_sensor_data,
+ .domain = "gpu",
+ },
+ {
+ .registers = &omap5430_core_temp_sensor_registers,
+ .ts_data = &omap5430_core_temp_sensor_data,
+ .domain = "core",
+ },
+ },
+ .sensor_count = 3,
+};
+
+static const struct of_device_id of_omap_bandgap_match[] = {
+ /*
+ * TODO: Add support to 4430
+ * { .compatible = "ti,omap4430-bandgap", .data = , },
+ */
+ {
+ .compatible = "ti,omap4-bandgap",
+ },
+ /* Sentinel */
+ { },
+};
+
+static struct omap_bandgap *omap_bandgap_build(struct platform_device *pdev)
+{
+ struct device_node *node = pdev->dev.of_node;
+ struct omap_bandgap *bg_ptr;
+ u32 val;
+ struct resource *io_res;
+
+ /* just for the sake */
+ if (!node) {
+ dev_err(&pdev->dev, "No platform information available\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ bg_ptr = devm_kzalloc(&pdev->dev, sizeof(struct omap_bandgap),
+ GFP_KERNEL);
+ if (!bg_ptr) {
+ dev_err(&pdev->dev, "Unable to allocate mem for driver ref\n");
+ return ERR_PTR(-ENOMEM);
+ }
+
+ io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!io_res) {
+ dev_err(&pdev->dev, "Failed to get IO resource\n");
+ return ERR_PTR(-ENOENT);
+ }
+
+// printk("\n\t\t **** omap_bandgap_build(): start %x ", io_res->start);
+// printk("\n\t\t **** omap_bandgap_build(): size %x ", resource_size(io_res));
+ bg_ptr->bg_base = ioremap(io_res->start, resource_size(io_res));
+// printk("\n\t\t **** omap_bandgap_build(): bg_base %x ", bg_ptr->bg_base);
+ if (!bg_ptr->bg_base)
+ return 0;
+
+ bg_readl(bg_ptr, 0x0, &val);
+
+ /*
+ * Check omap control core module revision to find out
+ * bandgap type
+ */
+ switch ((val & 0x3ff) >> 8) {
+ case 1:
+ /* 4430 */
+ bg_ptr->pdata = &omap4460_data;
+ break;
+ case 2:
+ /* 4460 */
+ bg_ptr->pdata = &omap4460_data;
+ break;
+ default:
+ /* Unknown omap control core module revision */
+ return 0;
+ }
+
+ if (bg_ptr->pdata->has_tshut) {
+ bg_ptr->tshut_gpio = bg_ptr->pdata->tshut_gpio;
+ if (!gpio_is_valid(bg_ptr->tshut_gpio)) {
+ dev_err(&pdev->dev, "invalid gpio for tshut (%d)\n",
+ bg_ptr->tshut_gpio);
+ return ERR_PTR(-EINVAL);
+ }
+ }
+
+ return bg_ptr;
+}
+
+struct resource *platform_get_resource_dbg(struct platform_device *dev,
+ unsigned int type, unsigned int num);
+
+static
+int __devinit omap_bandgap_probe(struct platform_device *pdev)
+{
+ struct omap_bandgap *bg_ptr;
+ int clk_rate, ret = 0, i;
+
+ bg_ptr = omap_bandgap_build(pdev);
+ if (IS_ERR_OR_NULL(bg_ptr)) {
+ dev_err(&pdev->dev, "failed to fetch platform data\n");
+ return PTR_ERR(bg_ptr);
+ }
+
+ if (bg_ptr->pdata->has_talert) {
+ ret = omap_bandgap_talert_init(bg_ptr, pdev);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to initialize Talert IRQ\n");
+ return ret;
+ }
+ }
+
+ if (bg_ptr->pdata->has_tshut) {
+ ret = omap_bandgap_tshut_init(bg_ptr, pdev);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "failed to initialize system tshut IRQ\n");
+ goto free_talert;
+ }
+ }
+
+ bg_ptr->fclock = clk_get(NULL, bg_ptr->pdata->fclock_name);
+ ret = IS_ERR_OR_NULL(bg_ptr->fclock);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to request fclock reference\n");
+ goto free_irqs;
+ }
+
+ bg_ptr->div_clk = clk_get(NULL, bg_ptr->pdata->div_ck_name);
+ ret = IS_ERR_OR_NULL(bg_ptr->div_clk);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "failed to request div_ts_ck clock ref\n");
+ goto free_irqs;
+ }
+
+ bg_ptr->conv_table = bg_ptr->pdata->conv_table;
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_registers *tsr;
+ u32 val;
+
+ tsr = bg_ptr->pdata->sensors[i].registers;
+ /* Initialize register lock */
+ spin_lock_init(&tsr->bg_reg_lock);
+
+ /*
+ * check if the efuse has a non-zero value if not
+ * it is an untrimmed sample and the temperatures
+ * may not be accurate
+ */
+ ret = bg_readl(bg_ptr, tsr->bgap_efuse, &val);
+ if (ret || !val)
+ dev_info(&pdev->dev,
+ "Non-trimmed BGAP, Temp not accurate\n");
+ }
+
+ clk_rate = clk_round_rate(bg_ptr->div_clk,
+ bg_ptr->pdata->sensors[0].ts_data->max_freq);
+ if (clk_rate < bg_ptr->pdata->sensors[0].ts_data->min_freq ||
+ clk_rate == 0xffffffff) {
+ ret = -ENODEV;
+ goto put_clks;
+ }
+
+ ret = clk_set_rate(bg_ptr->div_clk, clk_rate);
+ if (ret) {
+ dev_err(&pdev->dev, "Cannot set clock rate\n");
+ goto put_clks;
+ }
+
+ bg_ptr->clk_rate = clk_rate;
+ clk_enable(bg_ptr->fclock);
+
+ mutex_init(&bg_ptr->bg_mutex);
+ bg_ptr->dev = &pdev->dev;
+ platform_set_drvdata(pdev, bg_ptr);
+
+ /* 1 clk cycle */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++)
+ configure_temp_sensor_counter(bg_ptr, i, 1);
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_data *ts_data;
+
+ ts_data = bg_ptr->pdata->sensors[i].ts_data;
+
+ temp_sensor_init_talert_thresholds(bg_ptr, i,
+ ts_data->t_hot,
+ ts_data->t_cold);
+ temp_sensor_configure_tshut_hot(bg_ptr, i,
+ ts_data->tshut_hot);
+ temp_sensor_configure_tshut_cold(bg_ptr, i,
+ ts_data->tshut_cold);
+ }
+
+ enable_continuous_mode(bg_ptr);
+
+ /* Set .250 seconds time as default counter */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++)
+ configure_temp_sensor_counter(bg_ptr, i,
+ bg_ptr->clk_rate / 4);
+
+ /* Every thing is good? Then expose the sensors */
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ char *domain;
+
+ domain = bg_ptr->pdata->sensors[i].domain;
+ if (bg_ptr->pdata->expose_sensor)
+ bg_ptr->pdata->expose_sensor(bg_ptr, i, domain);
+ }
+
+ return 0;
+
+put_clks:
+ clk_disable(bg_ptr->fclock);
+ clk_put(bg_ptr->fclock);
+ clk_put(bg_ptr->div_clk);
+free_irqs:
+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
+ gpio_free(bg_ptr->tshut_gpio);
+free_talert:
+ free_irq(bg_ptr->irq, bg_ptr);
+
+ return ret;
+}
+
+static
+int __devexit omap_bandgap_remove(struct platform_device *pdev)
+{
+ struct omap_bandgap *bg_ptr = platform_get_drvdata(pdev);
+
+ clk_disable(bg_ptr->fclock);
+ clk_put(bg_ptr->fclock);
+ clk_put(bg_ptr->div_clk);
+ free_irq(bg_ptr->irq, bg_ptr);
+ free_irq(gpio_to_irq(bg_ptr->tshut_gpio), NULL);
+ gpio_free(bg_ptr->tshut_gpio);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int omap_bandgap_save_ctxt(struct omap_bandgap *bg_ptr)
+{
+ int err = 0;
+ int i;
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_registers *tsr;
+ struct temp_sensor_regval *rval;
+
+ rval = bg_ptr->pdata->sensors[i].regval;
+ tsr = bg_ptr->pdata->sensors[i].registers;
+
+ err = bg_readl(bg_ptr, tsr->bgap_mode_ctrl,
+ &rval->bg_mode_ctrl);
+ err |= bg_readl(bg_ptr, tsr->bgap_mask_ctrl,
+ &rval->bg_ctrl);
+ err |= bg_readl(bg_ptr, tsr->bgap_counter,
+ &rval->bg_counter);
+ err |= bg_readl(bg_ptr, tsr->bgap_threshold,
+ &rval->bg_threshold);
+ err |= bg_readl(bg_ptr, tsr->tshut_threshold,
+ &rval->tshut_threshold);
+
+ if (err)
+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
+ }
+
+ return err ? -EIO : 0;
+}
+
+static int
+omap_bandgap_force_single_read(struct omap_bandgap *bg_ptr, int id)
+{
+ struct temp_sensor_registers *tsr;
+ u32 temp = 0, counter = 1000;
+ int err;
+
+ tsr = bg_ptr->pdata->sensors[id].registers;
+ /* Select single conversion mode */
+ err = bg_readl(bg_ptr, tsr->bgap_mode_ctrl, &temp);
+ temp &= ~(1 << __ffs(tsr->mode_ctrl_mask));
+ bg_writel(bg_ptr, temp, tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
+
+ /* Start of Conversion = 1 */
+ err |= bg_readl(bg_ptr, tsr->temp_sensor_ctrl, &temp);
+ temp |= 1 << __ffs(tsr->bgap_soc_mask);
+ bg_writel(bg_ptr, temp, tsr->temp_sensor_ctrl, &tsr->bg_reg_lock);
+ /* Wait until DTEMP is updated */
+ err |= bg_readl(bg_ptr, tsr->temp_sensor_ctrl, &temp);
+ temp &= (tsr->bgap_dtemp_mask);
+ while ((temp == 0) && --counter) {
+ err |= bg_readl(bg_ptr, tsr->temp_sensor_ctrl, &temp);
+ temp &= (tsr->bgap_dtemp_mask);
+ }
+ /* Start of Conversion = 0 */
+ err |= bg_readl(bg_ptr, tsr->temp_sensor_ctrl, &temp);
+ temp &= ~(1 << __ffs(tsr->bgap_soc_mask));
+ err |= bg_writel(bg_ptr, temp, tsr->temp_sensor_ctrl, &tsr->bg_reg_lock);
+
+ return err ? -EIO : 0;
+}
+
+static int omap_bandgap_restore_ctxt(struct omap_bandgap *bg_ptr)
+{
+ int i, err = 0;
+ u32 temp = 0;
+
+ for (i = 0; i < bg_ptr->pdata->sensor_count; i++) {
+ struct temp_sensor_registers *tsr;
+ struct temp_sensor_regval *rval;
+ u32 val = 0;
+
+ rval = bg_ptr->pdata->sensors[i].regval;
+ tsr = bg_ptr->pdata->sensors[i].registers;
+
+ err = bg_readl(bg_ptr, tsr->bgap_counter, &val);
+ if (val == 0) {
+ err |= bg_writel(bg_ptr, rval->bg_threshold,
+ tsr->bgap_threshold, &tsr->bg_reg_lock);
+ err |= bg_writel(bg_ptr, rval->tshut_threshold,
+ tsr->tshut_threshold, &tsr->bg_reg_lock);
+ /* Force immediate temperature measurement and update
+ * of the DTEMP field
+ */
+ omap_bandgap_force_single_read(bg_ptr, i);
+ err |= bg_writel(bg_ptr, rval->bg_counter,
+ tsr->bgap_counter, &tsr->bg_reg_lock);
+ err |= bg_writel(bg_ptr, rval->bg_mode_ctrl,
+ tsr->bgap_mode_ctrl, &tsr->bg_reg_lock);
+ err |= bg_writel(bg_ptr, rval->bg_ctrl,
+ tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
+ } else {
+ err |= bg_readl(bg_ptr, tsr->temp_sensor_ctrl,
+ &temp);
+ temp &= (tsr->bgap_dtemp_mask);
+ if (temp == 0) {
+ omap_bandgap_force_single_read(bg_ptr, i);
+ err |= bg_readl(bg_ptr, tsr->bgap_mask_ctrl,
+ &temp);
+ temp |= 1 << __ffs(tsr->mode_ctrl_mask);
+ err |= bg_writel(bg_ptr, temp,
+ tsr->bgap_mask_ctrl, &tsr->bg_reg_lock);
+ }
+ }
+ if (err)
+ dev_err(bg_ptr->dev, "could not save sensor %d\n", i);
+ }
+
+ return err ? -EIO : 0;
+}
+
+static int omap_bandgap_suspend(struct device *dev)
+{
+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
+ int err;
+
+ err = omap_bandgap_save_ctxt(bg_ptr);
+ clk_disable(bg_ptr->fclock);
+
+ return err;
+}
+
+static int omap_bandgap_resume(struct device *dev)
+{
+ struct omap_bandgap *bg_ptr = dev_get_drvdata(dev);
+
+ clk_enable(bg_ptr->fclock);
+
+ return omap_bandgap_restore_ctxt(bg_ptr);
+}
+static const struct dev_pm_ops omap_bandgap_dev_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(omap_bandgap_suspend,
+ omap_bandgap_resume)
+};
+
+#define DEV_PM_OPS (&omap_bandgap_dev_pm_ops)
+#else
+#define DEV_PM_OPS NULL
+#endif
+
+static struct platform_driver omap_bandgap_sensor_driver = {
+ .probe = omap_bandgap_probe,
+ .remove = omap_bandgap_remove,
+ .driver = {
+ .name = "omap-bandgap",
+ .pm = DEV_PM_OPS,
+ .of_match_table = of_omap_bandgap_match,
+ },
+};
+
+module_platform_driver(omap_bandgap_sensor_driver);
+early_platform_init("early_omap_temperature", &omap_bandgap_sensor_driver);
+
+static int __init bg_init(void)
+{
+ return platform_driver_register(&omap_bandgap_sensor_driver);
+}
+
+static void __exit bg_exit(void)
+{
+ platform_driver_unregister(&omap_bandgap_sensor_driver);
+}
+
+module_init(bg_init);
+module_exit(bg_exit);
+
+MODULE_DESCRIPTION("OMAP4+ bandgap temperature sensor driver");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:omap-bandgap");
+MODULE_AUTHOR("Texas Instrument Inc.");
Index: linux-2.6/drivers/thermal/omap-bandgap.h
===================================================================
--- /dev/null
+++ linux-2.6/drivers/thermal/omap-bandgap.h
@@ -0,0 +1,64 @@
+/*
+ * OMAP4 Bandgap temperature sensor driver
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ * Contact:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+#ifndef __OMAP_BANDGAP_H
+#define __OMAP_BANDGAP_H
+
+struct omap_bandgap_data;
+
+/**
+ * struct omap_bandgap - bandgap device structure
+ * @dev: device pointer
+ * @pdata: platform data with sensor data
+ * @fclock: pointer to functional clock of temperature sensor
+ * @div_clk: pointer to parent clock of temperature sensor fclk
+ * @conv_table: Pointer to adc to temperature conversion table
+ * @bg_mutex: Mutex for sysfs, irq and PM
+ * @irq: MPU Irq number for thermal alert
+ * @tshut_gpio: GPIO where Tshut signal is routed
+ * @clk_rate: Holds current clock rate
+ */
+struct omap_bandgap {
+ struct device *dev;
+ const struct omap_bandgap_data *pdata;
+ struct clk *fclock;
+ struct clk *div_clk;
+ const int *conv_table;
+ struct mutex bg_mutex; /* Mutex for irq and PM */
+ int irq;
+ int tshut_gpio;
+ u32 clk_rate;
+ void __iomem *bg_base;
+};
+
+int omap_bandgap_read_thot(struct omap_bandgap *bg_ptr, int id, int *thot);
+int omap_bandgap_write_thot(struct omap_bandgap *bg_ptr, int id, int val);
+int omap_bandgap_read_tcold(struct omap_bandgap *bg_ptr, int id, int *tcold);
+int omap_bandgap_write_tcold(struct omap_bandgap *bg_ptr, int id, int val);
+int omap_bandgap_read_update_interval(struct omap_bandgap *bg_ptr, int id,
+ int *interval);
+int omap_bandgap_write_update_interval(struct omap_bandgap *bg_ptr, int id,
+ u32 interval);
+int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
+ int *temperature);
+
+#endif
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 08/11] omap4: thermal: add basic CPU thermal zone
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-06-18 11:32 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin
This patch exposes OMAP4 thermal sensor as a thermal zone
named "cpu". Only thermal creation is done here.
TODO:
- Add cooling bindings
- Add extrapolation rules
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
drivers/thermal/Kconfig | 12 ++++++
drivers/thermal/Makefile | 1
drivers/thermal/omap-bandgap.c | 1
drivers/thermal/omap-bandgap.h | 12 ++++++
drivers/thermal/omap4-thermal.c | 72 ++++++++++++++++++++++++++++++++++++++++
5 files changed, 98 insertions(+)
Index: linux-2.6/drivers/thermal/Kconfig
===================================================================
--- linux-2.6.orig/drivers/thermal/Kconfig
+++ linux-2.6/drivers/thermal/Kconfig
@@ -38,3 +38,15 @@ config OMAP_BANDGAP
This includes alert interrupts generation and also the TSHUT
support.
+config OMAP4_THERMAL
+ bool "Texas Instruments OMAP4 thermal support"
+ depends on OMAP_BANDGAP
+ depends on ARCH_OMAP4
+ help
+ If you say yes here you get thermal support for the Texas Instruments
+ OMAP4 SoC family. The current chip supported are:
+ - OMAP4460
+
+ This includes alert interrupts generation and also the TSHUT
+ support.
+
Index: linux-2.6/drivers/thermal/Makefile
===================================================================
--- linux-2.6.orig/drivers/thermal/Makefile
+++ linux-2.6/drivers/thermal/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_THERMAL) += thermal_sys.o
obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
obj-$(CONFIG_OMAP_BANDGAP) += omap-thermal.o
omap-thermal-y := omap-bandgap.o
+omap-thermal-$(CONFIG_OMAP4_THERMAL) += omap4-thermal.o
Index: linux-2.6/drivers/thermal/omap-bandgap.c
===================================================================
--- linux-2.6.orig/drivers/thermal/omap-bandgap.c
+++ linux-2.6/drivers/thermal/omap-bandgap.c
@@ -1213,6 +1213,7 @@ static const struct omap_bandgap_data om
.fclock_name = "bandgap_ts_fclk",
.div_ck_name = "div_ts_ck",
.conv_table = omap4460_adc_to_temp,
+ .expose_sensor = omap4_thermal_expose_sensor,
.irq = 126,
.sensors = {
{
Index: linux-2.6/drivers/thermal/omap-bandgap.h
===================================================================
--- linux-2.6.orig/drivers/thermal/omap-bandgap.h
+++ linux-2.6/drivers/thermal/omap-bandgap.h
@@ -61,4 +61,16 @@ int omap_bandgap_write_update_interval(s
int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
int *temperature);
+#ifdef CONFIG_OMAP4_THERMAL
+int omap4_thermal_expose_sensor(struct omap_bandgap *bg_ptr, int id,
+ char *domain);
+#else
+static inline int omap4_thermal_expose_sensor(struct omap_bandgap *bg_ptr,
+ int id, char *domain)
+{
+ return 0;
+}
+
+#endif
+
#endif
Index: linux-2.6/drivers/thermal/omap4-thermal.c
===================================================================
--- /dev/null
+++ linux-2.6/drivers/thermal/omap4-thermal.c
@@ -0,0 +1,72 @@
+/*
+ * SPEAr thermal driver.
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Inc.
+ * Contact:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/thermal.h>
+
+#include "omap-bandgap.h"
+
+struct omap4_thermal_data {
+ struct thermal_zone_device *omap4_thermal;
+ struct omap_bandgap *bg_ptr;
+ int sensor_id;
+};
+
+static inline int omap4_thermal_get_temp(struct thermal_zone_device *thermal,
+ unsigned long *temp)
+{
+ struct omap4_thermal_data *data = thermal->devdata;
+ int ret, tmp;
+
+ ret = omap_bandgap_read_temperature(data->bg_ptr, data->sensor_id,
+ &tmp);
+ if (!ret)
+ *temp = tmp;
+
+ return ret;
+}
+
+static struct thermal_zone_device_ops omap4_thermal_ops = {
+ .get_temp = omap4_thermal_get_temp,
+};
+
+int omap4_thermal_expose_sensor(struct omap_bandgap *bg_ptr, int id,
+ char *domain)
+{
+ struct omap4_thermal_data *data;
+
+ data = devm_kzalloc(bg_ptr->dev, sizeof(*data), GFP_KERNEL);
+ if (!data) {
+ dev_err(bg_ptr->dev, "kzalloc fail\n");
+ return -ENOMEM;
+ }
+ data->sensor_id = id;
+ data->bg_ptr = bg_ptr;
+ data->omap4_thermal = thermal_zone_device_register(domain, 0,
+ data, &omap4_thermal_ops, 0, 0, 0, 0);
+ if (IS_ERR(data->omap4_thermal)) {
+ dev_err(bg_ptr->dev, "thermal zone device is NULL\n");
+ return PTR_ERR(data->omap4_thermal);
+ }
+
+ return 0;
+}
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 08/11] omap4: thermal: add basic CPU thermal zone
@ 2012-06-18 11:32 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: linux-arm-kernel
This patch exposes OMAP4 thermal sensor as a thermal zone
named "cpu". Only thermal creation is done here.
TODO:
- Add cooling bindings
- Add extrapolation rules
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
drivers/thermal/Kconfig | 12 ++++++
drivers/thermal/Makefile | 1
drivers/thermal/omap-bandgap.c | 1
drivers/thermal/omap-bandgap.h | 12 ++++++
drivers/thermal/omap4-thermal.c | 72 ++++++++++++++++++++++++++++++++++++++++
5 files changed, 98 insertions(+)
Index: linux-2.6/drivers/thermal/Kconfig
===================================================================
--- linux-2.6.orig/drivers/thermal/Kconfig
+++ linux-2.6/drivers/thermal/Kconfig
@@ -38,3 +38,15 @@ config OMAP_BANDGAP
This includes alert interrupts generation and also the TSHUT
support.
+config OMAP4_THERMAL
+ bool "Texas Instruments OMAP4 thermal support"
+ depends on OMAP_BANDGAP
+ depends on ARCH_OMAP4
+ help
+ If you say yes here you get thermal support for the Texas Instruments
+ OMAP4 SoC family. The current chip supported are:
+ - OMAP4460
+
+ This includes alert interrupts generation and also the TSHUT
+ support.
+
Index: linux-2.6/drivers/thermal/Makefile
===================================================================
--- linux-2.6.orig/drivers/thermal/Makefile
+++ linux-2.6/drivers/thermal/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_THERMAL) += thermal_sys.o
obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
obj-$(CONFIG_OMAP_BANDGAP) += omap-thermal.o
omap-thermal-y := omap-bandgap.o
+omap-thermal-$(CONFIG_OMAP4_THERMAL) += omap4-thermal.o
Index: linux-2.6/drivers/thermal/omap-bandgap.c
===================================================================
--- linux-2.6.orig/drivers/thermal/omap-bandgap.c
+++ linux-2.6/drivers/thermal/omap-bandgap.c
@@ -1213,6 +1213,7 @@ static const struct omap_bandgap_data om
.fclock_name = "bandgap_ts_fclk",
.div_ck_name = "div_ts_ck",
.conv_table = omap4460_adc_to_temp,
+ .expose_sensor = omap4_thermal_expose_sensor,
.irq = 126,
.sensors = {
{
Index: linux-2.6/drivers/thermal/omap-bandgap.h
===================================================================
--- linux-2.6.orig/drivers/thermal/omap-bandgap.h
+++ linux-2.6/drivers/thermal/omap-bandgap.h
@@ -61,4 +61,16 @@ int omap_bandgap_write_update_interval(s
int omap_bandgap_read_temperature(struct omap_bandgap *bg_ptr, int id,
int *temperature);
+#ifdef CONFIG_OMAP4_THERMAL
+int omap4_thermal_expose_sensor(struct omap_bandgap *bg_ptr, int id,
+ char *domain);
+#else
+static inline int omap4_thermal_expose_sensor(struct omap_bandgap *bg_ptr,
+ int id, char *domain)
+{
+ return 0;
+}
+
+#endif
+
#endif
Index: linux-2.6/drivers/thermal/omap4-thermal.c
===================================================================
--- /dev/null
+++ linux-2.6/drivers/thermal/omap4-thermal.c
@@ -0,0 +1,72 @@
+/*
+ * SPEAr thermal driver.
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Inc.
+ * Contact:
+ * Eduardo Valentin <eduardo.valentin@ti.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/thermal.h>
+
+#include "omap-bandgap.h"
+
+struct omap4_thermal_data {
+ struct thermal_zone_device *omap4_thermal;
+ struct omap_bandgap *bg_ptr;
+ int sensor_id;
+};
+
+static inline int omap4_thermal_get_temp(struct thermal_zone_device *thermal,
+ unsigned long *temp)
+{
+ struct omap4_thermal_data *data = thermal->devdata;
+ int ret, tmp;
+
+ ret = omap_bandgap_read_temperature(data->bg_ptr, data->sensor_id,
+ &tmp);
+ if (!ret)
+ *temp = tmp;
+
+ return ret;
+}
+
+static struct thermal_zone_device_ops omap4_thermal_ops = {
+ .get_temp = omap4_thermal_get_temp,
+};
+
+int omap4_thermal_expose_sensor(struct omap_bandgap *bg_ptr, int id,
+ char *domain)
+{
+ struct omap4_thermal_data *data;
+
+ data = devm_kzalloc(bg_ptr->dev, sizeof(*data), GFP_KERNEL);
+ if (!data) {
+ dev_err(bg_ptr->dev, "kzalloc fail\n");
+ return -ENOMEM;
+ }
+ data->sensor_id = id;
+ data->bg_ptr = bg_ptr;
+ data->omap4_thermal = thermal_zone_device_register(domain, 0,
+ data, &omap4_thermal_ops, 0, 0, 0, 0);
+ if (IS_ERR(data->omap4_thermal)) {
+ dev_err(bg_ptr->dev, "thermal zone device is NULL\n");
+ return PTR_ERR(data->omap4_thermal);
+ }
+
+ return 0;
+}
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 09/11] ARM: DT: Add support to system control module for OMAP4
2012-05-25 8:25 ` Eduardo Valentin
@ 2012-06-18 11:32 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: b-cousson, kishon, kbaidarov, santosh.shilimkar, tony, paul
Cc: balbi, amit.kucheria, linux-pm, linux-arm-kernel, linux-omap,
amit.kachhap, Eduardo Valentin
This patch adds device tree entries on OMAP4 based boards
for System Control Module (SCM).
TODO:
The IOMEM windows of ctrl_module_core, bandgap, usbphy overlap, so
probably only specific registers should be specified in dts for
bandgap and usb phy entries.
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/boot/dts/omap4.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
Index: linux-2.6/arch/arm/boot/dts/omap4.dtsi
===================================================================
--- linux-2.6.orig/arch/arm/boot/dts/omap4.dtsi
+++ linux-2.6/arch/arm/boot/dts/omap4.dtsi
@@ -272,5 +272,22 @@
ti,hwmods = "mmc5";
ti,needs-special-reset;
};
+
+ ctrl_module_core: ctrl_module_core@4a002000 {
+ compatible = "ti,omap4-control";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ ti,hwmods = "ctrl_module_core";
+ reg = <0x4a002000 0x1000>;
+ bandgap@4a002000 {
+ compatible = "ti,omap4-bandgap";
+ reg = <0x4a002000 0x1000>;
+ };
+ usb@4a002000 {
+ compatible = "ti,omap4-usb-phy";
+ reg = <0x4a002000 0x1000>;
+ };
+ };
};
};
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 09/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-06-18 11:32 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-18 11:32 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds device tree entries on OMAP4 based boards
for System Control Module (SCM).
TODO:
The IOMEM windows of ctrl_module_core, bandgap, usbphy overlap, so
probably only specific registers should be specified in dts for
bandgap and usb phy entries.
Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
---
arch/arm/boot/dts/omap4.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
Index: linux-2.6/arch/arm/boot/dts/omap4.dtsi
===================================================================
--- linux-2.6.orig/arch/arm/boot/dts/omap4.dtsi
+++ linux-2.6/arch/arm/boot/dts/omap4.dtsi
@@ -272,5 +272,22 @@
ti,hwmods = "mmc5";
ti,needs-special-reset;
};
+
+ ctrl_module_core: ctrl_module_core at 4a002000 {
+ compatible = "ti,omap4-control";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ ti,hwmods = "ctrl_module_core";
+ reg = <0x4a002000 0x1000>;
+ bandgap at 4a002000 {
+ compatible = "ti,omap4-bandgap";
+ reg = <0x4a002000 0x1000>;
+ };
+ usb at 4a002000 {
+ compatible = "ti,omap4-usb-phy";
+ reg = <0x4a002000 0x1000>;
+ };
+ };
};
};
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH v2 09/11] ARM: DT: Add support to system control module for OMAP4
2012-06-18 11:32 ` Konstantin Baydarov
@ 2012-06-18 12:13 ` Sergei Shtylyov
-1 siblings, 0 replies; 198+ messages in thread
From: Sergei Shtylyov @ 2012-06-18 12:13 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: b-cousson, kishon, santosh.shilimkar, tony, paul, amit.kucheria,
Eduardo Valentin, balbi, linux-pm, linux-omap, linux-arm-kernel,
amit.kachhap
Hello.
On 18-06-2012 15:32, Konstantin Baydarov wrote:
> This patch adds device tree entries on OMAP4 based boards
> for System Control Module (SCM).
> TODO:
> The IOMEM windows of ctrl_module_core, bandgap, usbphy overlap, so
> probably only specific registers should be specified in dts for
> bandgap and usb phy entries.
> Signed-off-by: Konstantin Baydarov<kbaidarov@dev.rtsoft.ru>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> ---
> arch/arm/boot/dts/omap4.dtsi | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> Index: linux-2.6/arch/arm/boot/dts/omap4.dtsi
> ===================================================================
> --- linux-2.6.orig/arch/arm/boot/dts/omap4.dtsi
> +++ linux-2.6/arch/arm/boot/dts/omap4.dtsi
> @@ -272,5 +272,22 @@
> ti,hwmods = "mmc5";
> ti,needs-special-reset;
> };
> +
> + ctrl_module_core: ctrl_module_core@4a002000 {
> + compatible = "ti,omap4-control";
> + #address-cells =<1>;
> + #size-cells =<1>;
> + ranges;
> + ti,hwmods = "ctrl_module_core";
> + reg =<0x4a002000 0x1000>;
> + bandgap@4a002000 {
> + compatible = "ti,omap4-bandgap";
> + reg =<0x4a002000 0x1000>;
> + };
> + usb@4a002000 {
> + compatible = "ti,omap4-usb-phy";
> + reg =<0x4a002000 0x1000>;
Two devices at the same address? Also, shouldn't values in the "reg"
property be relative to the value in the parent's "reg" property? Are they
needed at all here?
WBR, Sergei
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 09/11] ARM: DT: Add support to system control module for OMAP4
@ 2012-06-18 12:13 ` Sergei Shtylyov
0 siblings, 0 replies; 198+ messages in thread
From: Sergei Shtylyov @ 2012-06-18 12:13 UTC (permalink / raw)
To: linux-arm-kernel
Hello.
On 18-06-2012 15:32, Konstantin Baydarov wrote:
> This patch adds device tree entries on OMAP4 based boards
> for System Control Module (SCM).
> TODO:
> The IOMEM windows of ctrl_module_core, bandgap, usbphy overlap, so
> probably only specific registers should be specified in dts for
> bandgap and usb phy entries.
> Signed-off-by: Konstantin Baydarov<kbaidarov@dev.rtsoft.ru>
> Signed-off-by: Eduardo Valentin<eduardo.valentin@ti.com>
> ---
> arch/arm/boot/dts/omap4.dtsi | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> Index: linux-2.6/arch/arm/boot/dts/omap4.dtsi
> ===================================================================
> --- linux-2.6.orig/arch/arm/boot/dts/omap4.dtsi
> +++ linux-2.6/arch/arm/boot/dts/omap4.dtsi
> @@ -272,5 +272,22 @@
> ti,hwmods = "mmc5";
> ti,needs-special-reset;
> };
> +
> + ctrl_module_core: ctrl_module_core at 4a002000 {
> + compatible = "ti,omap4-control";
> + #address-cells =<1>;
> + #size-cells =<1>;
> + ranges;
> + ti,hwmods = "ctrl_module_core";
> + reg =<0x4a002000 0x1000>;
> + bandgap at 4a002000 {
> + compatible = "ti,omap4-bandgap";
> + reg =<0x4a002000 0x1000>;
> + };
> + usb at 4a002000 {
> + compatible = "ti,omap4-usb-phy";
> + reg =<0x4a002000 0x1000>;
Two devices at the same address? Also, shouldn't values in the "reg"
property be relative to the value in the parent's "reg" property? Are they
needed at all here?
WBR, Sergei
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH v2 02/11] ARM: OMAP: expose control.h to mach area
2012-06-18 11:32 ` Konstantin Baydarov
@ 2012-06-20 10:17 ` Tony Lindgren
-1 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-20 10:17 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: b-cousson, kishon, santosh.shilimkar, paul, balbi, amit.kucheria,
linux-pm, linux-arm-kernel, linux-omap, amit.kachhap,
Eduardo Valentin
* Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120618 04:36]:
> This patch exposes the definitions under control.h to
> drivers outside the machine code.
As discussed earlier, this will likely lead into misuse of these
registers that will be a big mess to clean up.
Can't you make these private to the driver(s)?
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 02/11] ARM: OMAP: expose control.h to mach area
@ 2012-06-20 10:17 ` Tony Lindgren
0 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-20 10:17 UTC (permalink / raw)
To: linux-arm-kernel
* Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120618 04:36]:
> This patch exposes the definitions under control.h to
> drivers outside the machine code.
As discussed earlier, this will likely lead into misuse of these
registers that will be a big mess to clean up.
Can't you make these private to the driver(s)?
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH v2 03/11] mfd: omap: control: core system control driver
2012-06-18 11:32 ` Konstantin Baydarov
@ 2012-06-20 10:22 ` Tony Lindgren
-1 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-20 10:22 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: J Keerthy, amit.kucheria, kishon, balbi, linux-pm, linux-omap,
linux-arm-kernel
* Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120618 04:36]:
> This patch introduces a MFD core device driver for
> OMAP system control module.
>
> The control module allows software control of
> various static modes supported by the device. It is
> composed of two control submodules: general control
> module and device (padconfiguration) control
> module.
> +++ linux-2.6/drivers/mfd/omap-control-core.c
...
> +u32 omap_control_readl(u16 offset)
> +{
> + return __raw_readl(omap_control_base + (offset));
> +}
> +
> +void omap_control_writel(u32 val, u16 offset)
> +{
> + __raw_writel(val, omap_control_base + (offset));
> +}
There should not be any need to have the individual drivers use
these. Please instead just set up something where individual drivers
register with the control module core, and get their own iobase
returned so they can use readl/writel and behave like normal device
drivers.
Regards,
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 03/11] mfd: omap: control: core system control driver
@ 2012-06-20 10:22 ` Tony Lindgren
0 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-20 10:22 UTC (permalink / raw)
To: linux-arm-kernel
* Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120618 04:36]:
> This patch introduces a MFD core device driver for
> OMAP system control module.
>
> The control module allows software control of
> various static modes supported by the device. It is
> composed of two control submodules: general control
> module and device (padconfiguration) control
> module.
> +++ linux-2.6/drivers/mfd/omap-control-core.c
...
> +u32 omap_control_readl(u16 offset)
> +{
> + return __raw_readl(omap_control_base + (offset));
> +}
> +
> +void omap_control_writel(u32 val, u16 offset)
> +{
> + __raw_writel(val, omap_control_base + (offset));
> +}
There should not be any need to have the individual drivers use
these. Please instead just set up something where individual drivers
register with the control module core, and get their own iobase
returned so they can use readl/writel and behave like normal device
drivers.
Regards,
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH v2 04/11] OMAP2+: use control module mfd driver in omap_type
2012-06-18 11:32 ` Konstantin Baydarov
@ 2012-06-20 10:24 ` Tony Lindgren
-1 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-20 10:24 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: b-cousson, kishon, santosh.shilimkar, paul, balbi, amit.kucheria,
linux-pm, linux-arm-kernel, linux-omap, amit.kachhap,
Eduardo Valentin
* Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120618 04:36]:
> OMAP system control module can be probed early, then
> omap_type is safe to use its APIs.
>
> TODO: add support for other omap versions
>
> Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
>
> ---
> arch/arm/mach-omap2/id.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> Index: linux-2.6/arch/arm/mach-omap2/id.c
> ===================================================================
> --- linux-2.6.orig/arch/arm/mach-omap2/id.c
> +++ linux-2.6/arch/arm/mach-omap2/id.c
> @@ -18,6 +18,7 @@
> #include <linux/kernel.h>
> #include <linux/init.h>
> #include <linux/io.h>
> +#include <linux/mfd/omap_control.h>
>
> #include <asm/cputype.h>
>
> @@ -38,6 +39,8 @@ unsigned int omap_rev(void)
> }
> EXPORT_SYMBOL(omap_rev);
>
> +u32 omap_control_readl(u16 offset);
> +
> int omap_type(void)
> {
> u32 val = 0;
> @@ -49,7 +52,7 @@ int omap_type(void)
> } else if (cpu_is_omap34xx()) {
> val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
> } else if (cpu_is_omap44xx()) {
> - val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
> + val = omap_control_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
Please just set up a function in the ctrl module core to return the
status so you can get rid of omap_control_readl here.
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 04/11] OMAP2+: use control module mfd driver in omap_type
@ 2012-06-20 10:24 ` Tony Lindgren
0 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-20 10:24 UTC (permalink / raw)
To: linux-arm-kernel
* Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120618 04:36]:
> OMAP system control module can be probed early, then
> omap_type is safe to use its APIs.
>
> TODO: add support for other omap versions
>
> Signed-off-by: Konstantin Baydarov <kbaidarov@dev.rtsoft.ru>
>
> ---
> arch/arm/mach-omap2/id.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> Index: linux-2.6/arch/arm/mach-omap2/id.c
> ===================================================================
> --- linux-2.6.orig/arch/arm/mach-omap2/id.c
> +++ linux-2.6/arch/arm/mach-omap2/id.c
> @@ -18,6 +18,7 @@
> #include <linux/kernel.h>
> #include <linux/init.h>
> #include <linux/io.h>
> +#include <linux/mfd/omap_control.h>
>
> #include <asm/cputype.h>
>
> @@ -38,6 +39,8 @@ unsigned int omap_rev(void)
> }
> EXPORT_SYMBOL(omap_rev);
>
> +u32 omap_control_readl(u16 offset);
> +
> int omap_type(void)
> {
> u32 val = 0;
> @@ -49,7 +52,7 @@ int omap_type(void)
> } else if (cpu_is_omap34xx()) {
> val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
> } else if (cpu_is_omap44xx()) {
> - val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
> + val = omap_control_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
Please just set up a function in the ctrl module core to return the
status so you can get rid of omap_control_readl here.
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH v2 06/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields
2012-06-18 11:32 ` Konstantin Baydarov
@ 2012-06-20 10:25 ` Tony Lindgren
-1 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-20 10:25 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: Keerthy, amit.kucheria, kishon, balbi, linux-pm, linux-omap,
linux-arm-kernel
* Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120618 04:36]:
> OMAP4460 specific temperature sensor register bit fields are added.
> Existing OMAP4 entries are renamed to OMAP4430.
>
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/include/mach/control.h | 116 ++++++++++++++++++++++++++++
> 1 files changed, 116 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/include/mach/control.h b/arch/arm/mach-omap2/include/mach/control.h
> index cf42764..171b504 100644
> --- a/arch/arm/mach-omap2/include/mach/control.h
> +++ b/arch/arm/mach-omap2/include/mach/control.h
> @@ -230,6 +230,122 @@
> /* OMAP44xx control McBSP padconf */
> #define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
>
> +/* TEMP_SENSOR OMAP4430 */
> +#define OMAP4430_BGAP_TEMPSOFF_SHIFT 12
> +#define OMAP4430_BGAP_TEMPSOFF_MASK (1 << 12)
> +#define OMAP4430_BGAP_TSHUT_SHIFT 11
> +#define OMAP4430_BGAP_TSHUT_MASK (1 << 11)
> +#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10
> +#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10)
> +#define OMAP4430_BGAP_TEMP_SENSOR_SOC_SHIFT 9
> +#define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9)
> +#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8
> +#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8)
> +#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> +#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0)
> +
> +/* TEMP_SENSOR OMAP4460 */
> +#define OMAP4460_BGAP_TEMPSOFF_SHIFT 13
> +#define OMAP4460_BGAP_TEMPSOFF_MASK (1 << 13)
> +#define OMAP4460_BGAP_TEMP_SENSOR_SOC_SHIFT 11
> +#define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK (1 << 11)
> +#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
> +#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 10)
> +#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> +#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0)
> +
> +/* BANDGAP_CTRL */
> +#define OMAP4460_SINGLE_MODE_SHIFT 31
> +#define OMAP4460_SINGLE_MODE_MASK (1 << 31)
> +#define OMAP4460_MASK_HOT_SHIFT 1
> +#define OMAP4460_MASK_HOT_MASK (1 << 1)
> +#define OMAP4460_MASK_COLD_SHIFT 0
> +#define OMAP4460_MASK_COLD_MASK (1 << 0)
> +
> +/* BANDGAP_COUNTER */
> +#define OMAP4460_COUNTER_SHIFT 0
> +#define OMAP4460_COUNTER_MASK (0xffffff << 0)
> +
> +/* BANDGAP_THRESHOLD */
> +#define OMAP4460_T_HOT_SHIFT 16
> +#define OMAP4460_T_HOT_MASK (0x3ff << 16)
> +#define OMAP4460_T_COLD_SHIFT 0
> +#define OMAP4460_T_COLD_MASK (0x3ff << 0)
These should be all private to the bandgap driver. The same applies
for other driver specific registers for other drivers.
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 06/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields
@ 2012-06-20 10:25 ` Tony Lindgren
0 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-20 10:25 UTC (permalink / raw)
To: linux-arm-kernel
* Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120618 04:36]:
> OMAP4460 specific temperature sensor register bit fields are added.
> Existing OMAP4 entries are renamed to OMAP4430.
>
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
> ---
> arch/arm/mach-omap2/include/mach/control.h | 116 ++++++++++++++++++++++++++++
> 1 files changed, 116 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/include/mach/control.h b/arch/arm/mach-omap2/include/mach/control.h
> index cf42764..171b504 100644
> --- a/arch/arm/mach-omap2/include/mach/control.h
> +++ b/arch/arm/mach-omap2/include/mach/control.h
> @@ -230,6 +230,122 @@
> /* OMAP44xx control McBSP padconf */
> #define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP 0x061c
>
> +/* TEMP_SENSOR OMAP4430 */
> +#define OMAP4430_BGAP_TEMPSOFF_SHIFT 12
> +#define OMAP4430_BGAP_TEMPSOFF_MASK (1 << 12)
> +#define OMAP4430_BGAP_TSHUT_SHIFT 11
> +#define OMAP4430_BGAP_TSHUT_MASK (1 << 11)
> +#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10
> +#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10)
> +#define OMAP4430_BGAP_TEMP_SENSOR_SOC_SHIFT 9
> +#define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9)
> +#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8
> +#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8)
> +#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> +#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0)
> +
> +/* TEMP_SENSOR OMAP4460 */
> +#define OMAP4460_BGAP_TEMPSOFF_SHIFT 13
> +#define OMAP4460_BGAP_TEMPSOFF_MASK (1 << 13)
> +#define OMAP4460_BGAP_TEMP_SENSOR_SOC_SHIFT 11
> +#define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK (1 << 11)
> +#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10
> +#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 10)
> +#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0
> +#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0)
> +
> +/* BANDGAP_CTRL */
> +#define OMAP4460_SINGLE_MODE_SHIFT 31
> +#define OMAP4460_SINGLE_MODE_MASK (1 << 31)
> +#define OMAP4460_MASK_HOT_SHIFT 1
> +#define OMAP4460_MASK_HOT_MASK (1 << 1)
> +#define OMAP4460_MASK_COLD_SHIFT 0
> +#define OMAP4460_MASK_COLD_MASK (1 << 0)
> +
> +/* BANDGAP_COUNTER */
> +#define OMAP4460_COUNTER_SHIFT 0
> +#define OMAP4460_COUNTER_MASK (0xffffff << 0)
> +
> +/* BANDGAP_THRESHOLD */
> +#define OMAP4460_T_HOT_SHIFT 16
> +#define OMAP4460_T_HOT_MASK (0x3ff << 16)
> +#define OMAP4460_T_COLD_SHIFT 0
> +#define OMAP4460_T_COLD_MASK (0x3ff << 0)
These should be all private to the bandgap driver. The same applies
for other driver specific registers for other drivers.
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH v2 03/11] mfd: omap: control: core system control driver
2012-06-20 10:22 ` Tony Lindgren
@ 2012-06-20 14:13 ` Konstantin Baydarov
-1 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-20 14:13 UTC (permalink / raw)
To: Tony Lindgren
Cc: b-cousson, kishon, santosh.shilimkar, paul, balbi, amit.kucheria,
linux-pm, linux-arm-kernel, linux-omap, amit.kachhap,
Eduardo Valentin, J Keerthy
Hi, Tony.
On 06/20/2012 02:22 PM, Tony Lindgren wrote:
> * Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120618 04:36]:
>> This patch introduces a MFD core device driver for
>> OMAP system control module.
>>
>> The control module allows software control of
>> various static modes supported by the device. It is
>> composed of two control submodules: general control
>> module and device (padconfiguration) control
>> module.
>> +++ linux-2.6/drivers/mfd/omap-control-core.c
> ...
>
>
>> +u32 omap_control_readl(u16 offset)
>> +{
>> + return __raw_readl(omap_control_base + (offset));
>> +}
>> +
>> +void omap_control_writel(u32 val, u16 offset)
>> +{
>> + __raw_writel(val, omap_control_base + (offset));
>> +}
> There should not be any need to have the individual drivers use
> these. Please instead just set up something where individual drivers
> register with the control module core, and get their own iobase
> returned so they can use readl/writel and behave like normal device
> drivers.
IIUC one of the reasons drivers/mfd/omap-control-core.c introduction is replacement of arch/arm/mach-omap2/control.c. control.c provides omap_ctrl_readl/omap_ctrl_writel API which are heavily used in arch/arm/mach-omap2/:
arch/arm/mach-omap2/hsmmc.c
arch/arm/mach-omap2/usb-fs.c
arch/arm/mach-omap2/sr_device.c
arch/arm/mach-omap2/id.c
...
So,the same API set (omap_control_readl/omap_control_writel) was added to omap-control-core.c.
If omap-control-core.c should only service users from driver/ directory, than I agree - we can remove
omap_control_readl/omap_control_writel from omap-control-core.c.
But IIUC you are agree to "switch" arch/arm/mach-omap2/id.c from control.c to omap-control-core.c. If arch/arm/mach-omap2/id.c is switched to control.c, then I guess all arch/arm/mach-omap2/*.c should be "switched" to omap-control-core.c as well. But this means that omap-control-core.c should provide omap_control_readl/omap_control_writel API.
BR,
Konstantin Baydarov.
>
> Regards,
>
> Tony
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 03/11] mfd: omap: control: core system control driver
@ 2012-06-20 14:13 ` Konstantin Baydarov
0 siblings, 0 replies; 198+ messages in thread
From: Konstantin Baydarov @ 2012-06-20 14:13 UTC (permalink / raw)
To: linux-arm-kernel
Hi, Tony.
On 06/20/2012 02:22 PM, Tony Lindgren wrote:
> * Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120618 04:36]:
>> This patch introduces a MFD core device driver for
>> OMAP system control module.
>>
>> The control module allows software control of
>> various static modes supported by the device. It is
>> composed of two control submodules: general control
>> module and device (padconfiguration) control
>> module.
>> +++ linux-2.6/drivers/mfd/omap-control-core.c
> ...
>
>
>> +u32 omap_control_readl(u16 offset)
>> +{
>> + return __raw_readl(omap_control_base + (offset));
>> +}
>> +
>> +void omap_control_writel(u32 val, u16 offset)
>> +{
>> + __raw_writel(val, omap_control_base + (offset));
>> +}
> There should not be any need to have the individual drivers use
> these. Please instead just set up something where individual drivers
> register with the control module core, and get their own iobase
> returned so they can use readl/writel and behave like normal device
> drivers.
IIUC one of the reasons drivers/mfd/omap-control-core.c introduction is replacement of arch/arm/mach-omap2/control.c. control.c provides omap_ctrl_readl/omap_ctrl_writel API which are heavily used in arch/arm/mach-omap2/:
arch/arm/mach-omap2/hsmmc.c
arch/arm/mach-omap2/usb-fs.c
arch/arm/mach-omap2/sr_device.c
arch/arm/mach-omap2/id.c
...
So,the same API set (omap_control_readl/omap_control_writel) was added to omap-control-core.c.
If omap-control-core.c should only service users from driver/ directory, than I agree - we can remove
omap_control_readl/omap_control_writel from omap-control-core.c.
But IIUC you are agree to "switch" arch/arm/mach-omap2/id.c from control.c to omap-control-core.c. If arch/arm/mach-omap2/id.c is switched to control.c, then I guess all arch/arm/mach-omap2/*.c should be "switched" to omap-control-core.c as well. But this means that omap-control-core.c should provide omap_control_readl/omap_control_writel API.
BR,
Konstantin Baydarov.
>
> Regards,
>
> Tony
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 198+ messages in thread
* Re: [RFC PATCH v2 03/11] mfd: omap: control: core system control driver
2012-06-20 14:13 ` Konstantin Baydarov
@ 2012-06-26 11:17 ` Tony Lindgren
-1 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-26 11:17 UTC (permalink / raw)
To: Konstantin Baydarov
Cc: J Keerthy, amit.kucheria, kishon, balbi, linux-pm, linux-omap,
linux-arm-kernel
* Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120620 07:18]:
>
> So,the same API set (omap_control_readl/omap_control_writel) was added to omap-control-core.c.
>
> If omap-control-core.c should only service users from driver/ directory, than I agree - we can remove
> omap_control_readl/omap_control_writel from omap-control-core.c.
> But IIUC you are agree to "switch" arch/arm/mach-omap2/id.c from control.c to omap-control-core.c. If arch/arm/mach-omap2/id.c is switched to control.c, then I guess all arch/arm/mach-omap2/*.c should be "switched" to omap-control-core.c as well. But this means that omap-control-core.c should provide omap_control_readl/omap_control_writel API.
Can't you just add something like int omap_ctrl_read_status(void)
that id.c can use?
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
* [RFC PATCH v2 03/11] mfd: omap: control: core system control driver
@ 2012-06-26 11:17 ` Tony Lindgren
0 siblings, 0 replies; 198+ messages in thread
From: Tony Lindgren @ 2012-06-26 11:17 UTC (permalink / raw)
To: linux-arm-kernel
* Konstantin Baydarov <kbaidarov@dev.rtsoft.ru> [120620 07:18]:
>
> So,the same API set (omap_control_readl/omap_control_writel) was added to omap-control-core.c.
>
> If omap-control-core.c should only service users from driver/ directory, than I agree - we can remove
> omap_control_readl/omap_control_writel from omap-control-core.c.
> But IIUC you are agree to "switch" arch/arm/mach-omap2/id.c from control.c to omap-control-core.c. If arch/arm/mach-omap2/id.c is switched to control.c, then I guess all arch/arm/mach-omap2/*.c should be "switched" to omap-control-core.c as well. But this means that omap-control-core.c should provide omap_control_readl/omap_control_writel API.
Can't you just add something like int omap_ctrl_read_status(void)
that id.c can use?
Tony
^ permalink raw reply [flat|nested] 198+ messages in thread
end of thread, other threads:[~2012-06-26 11:17 UTC | newest]
Thread overview: 198+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-05-25 8:25 [RFC PATCH 00/11] OMAP System Control Module Eduardo Valentin
2012-05-25 8:25 ` Eduardo Valentin
2012-05-25 8:25 ` [RFC PATCH 01/11] ARM: OMAP4: Remove un-used control module headers and defines Eduardo Valentin
2012-05-25 8:25 ` Eduardo Valentin
2012-05-28 9:12 ` Shilimkar, Santosh
2012-05-28 9:12 ` Shilimkar, Santosh
2012-05-25 8:25 ` [RFC PATCH 02/11] ARM: OMAP: expose control.h to mach area Eduardo Valentin
2012-05-25 8:25 ` Eduardo Valentin
2012-05-28 9:25 ` Shilimkar, Santosh
2012-05-28 9:25 ` Shilimkar, Santosh
2012-05-28 10:30 ` Valentin, Eduardo
2012-05-28 10:30 ` Valentin, Eduardo
2012-06-01 11:19 ` Tony Lindgren
2012-06-01 11:19 ` Tony Lindgren
2012-05-25 8:25 ` [RFC PATCH 03/11] arm: omap: device: create a device for system control module Eduardo Valentin
2012-05-25 8:25 ` Eduardo Valentin
2012-05-25 12:30 ` Cousson, Benoit
2012-05-25 12:30 ` Cousson, Benoit
2012-05-29 9:44 ` Eduardo Valentin
2012-05-29 9:44 ` Eduardo Valentin
2012-06-14 13:50 ` Konstantin Baydarov
2012-06-14 13:50 ` Konstantin Baydarov
2012-06-15 9:22 ` Valentin, Eduardo
2012-06-15 9:22 ` Valentin, Eduardo
2012-05-29 13:39 ` Konstantin Baydarov
2012-05-29 13:39 ` Konstantin Baydarov
2012-05-25 8:25 ` [RFC PATCH 04/11] OMAP: Add early " Eduardo Valentin
2012-05-25 8:25 ` Eduardo Valentin
2012-05-25 11:32 ` Konstantin Baydarov
2012-05-25 11:32 ` Konstantin Baydarov
2012-05-25 11:44 ` Valentin, Eduardo
2012-05-25 11:44 ` Valentin, Eduardo
2012-05-25 11:54 ` Konstantin Baydarov
2012-05-25 11:54 ` Konstantin Baydarov
2012-05-25 12:32 ` Cousson, Benoit
2012-05-25 12:32 ` Cousson, Benoit
2012-05-28 9:58 ` Shilimkar, Santosh
2012-05-28 9:58 ` Shilimkar, Santosh
2012-05-25 8:25 ` [RFC PATCH 05/11] mfd: omap: control: core system control driver Eduardo Valentin
2012-05-25 8:25 ` Eduardo Valentin
2012-05-25 12:52 ` Cousson, Benoit
2012-05-25 12:52 ` Cousson, Benoit
2012-05-28 11:35 ` Eduardo Valentin
2012-05-28 11:35 ` Eduardo Valentin
2012-05-29 13:25 ` Cousson, Benoit
2012-05-29 13:25 ` Cousson, Benoit
2012-06-01 11:29 ` Tony Lindgren
2012-06-01 11:29 ` Tony Lindgren
2012-06-01 12:30 ` Shilimkar, Santosh
2012-06-01 12:30 ` Shilimkar, Santosh
2012-06-01 12:43 ` Cousson, Benoit
2012-06-01 12:43 ` Cousson, Benoit
2012-06-01 17:19 ` Eduardo Valentin
2012-06-01 17:19 ` Eduardo Valentin
2012-06-01 13:40 ` Konstantin Baydarov
2012-06-01 13:40 ` Konstantin Baydarov
2012-06-01 14:13 ` Tony Lindgren
2012-06-01 14:13 ` Tony Lindgren
2012-06-01 14:26 ` Konstantin Baydarov
2012-06-01 14:26 ` Konstantin Baydarov
2012-05-28 9:54 ` Shilimkar, Santosh
2012-05-28 9:54 ` Shilimkar, Santosh
2012-05-28 11:42 ` Eduardo Valentin
2012-05-28 11:42 ` Eduardo Valentin
2012-05-28 13:15 ` Shilimkar, Santosh
2012-05-28 13:15 ` Shilimkar, Santosh
2012-05-29 13:31 ` Cousson, Benoit
2012-05-29 13:31 ` Cousson, Benoit
2012-05-25 8:25 ` [RFC PATCH 06/11] OMAP2+: use control module mfd driver in omap_type Eduardo Valentin
2012-05-25 8:25 ` Eduardo Valentin
2012-05-25 12:53 ` Cousson, Benoit
2012-05-25 12:53 ` Cousson, Benoit
2012-05-28 10:02 ` Shilimkar, Santosh
2012-05-28 10:02 ` Shilimkar, Santosh
2012-05-28 11:24 ` Eduardo Valentin
2012-05-28 11:24 ` Eduardo Valentin
2012-06-01 11:35 ` Tony Lindgren
2012-06-01 11:35 ` Tony Lindgren
2012-05-25 8:25 ` [RFC PATCH 07/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver Eduardo Valentin
2012-05-25 8:25 ` Eduardo Valentin
2012-05-25 13:35 ` Shubhrajyoti Datta
2012-05-25 13:35 ` Shubhrajyoti Datta
2012-05-25 15:06 ` Cousson, Benoit
2012-05-25 15:06 ` Cousson, Benoit
2012-06-01 11:38 ` Tony Lindgren
2012-06-01 11:38 ` Tony Lindgren
2012-06-01 13:20 ` [linux-pm] " Tony Lindgren
2012-06-01 13:20 ` Tony Lindgren
2012-06-01 14:07 ` Kevin Hilman
2012-06-01 14:07 ` Kevin Hilman
2012-06-01 14:15 ` Tony Lindgren
2012-06-01 14:15 ` Tony Lindgren
2012-05-25 8:25 ` [RFC PATCH 08/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields Eduardo Valentin
2012-05-25 8:25 ` Eduardo Valentin
2012-05-25 15:13 ` Cousson, Benoit
2012-05-25 15:13 ` Cousson, Benoit
2012-05-28 11:17 ` Eduardo Valentin
2012-05-28 11:17 ` Eduardo Valentin
2012-05-28 10:04 ` Shilimkar, Santosh
2012-05-28 10:04 ` Shilimkar, Santosh
2012-05-28 11:18 ` Eduardo Valentin
2012-05-28 11:18 ` Eduardo Valentin
2012-05-25 8:25 ` [RFC PATCH 09/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor Eduardo Valentin
2012-05-25 8:25 ` Eduardo Valentin
2012-05-25 15:49 ` Cousson, Benoit
2012-05-25 15:49 ` Cousson, Benoit
2012-05-28 11:06 ` Eduardo Valentin
2012-05-28 11:06 ` Eduardo Valentin
2012-05-28 11:16 ` Eduardo Valentin
2012-05-28 11:16 ` Eduardo Valentin
2012-05-29 13:14 ` Cousson, Benoit
2012-05-29 13:14 ` Cousson, Benoit
2012-05-29 17:51 ` Mike Turquette
2012-05-29 17:51 ` Mike Turquette
2012-05-25 16:39 ` Konstantin Baydarov
2012-05-25 16:39 ` Konstantin Baydarov
2012-05-28 10:55 ` Eduardo Valentin
2012-05-28 10:55 ` Eduardo Valentin
2012-06-01 11:42 ` Tony Lindgren
2012-06-01 11:42 ` Tony Lindgren
2012-05-25 8:26 ` [RFC PATCH 10/11] omap4: thermal: add basic CPU thermal zone Eduardo Valentin
2012-05-25 8:26 ` Eduardo Valentin
2012-05-28 9:33 ` Shilimkar, Santosh
2012-05-28 9:33 ` Shilimkar, Santosh
2012-05-28 9:48 ` Felipe Balbi
2012-05-28 9:48 ` Felipe Balbi
2012-05-28 10:26 ` Valentin, Eduardo
2012-05-28 10:26 ` Valentin, Eduardo
2012-05-29 12:54 ` Cousson, Benoit
2012-05-29 12:54 ` Cousson, Benoit
2012-05-25 8:26 ` [RFC PATCH 11/11] ARM: DT: Add support to system control module for OMAP4 Eduardo Valentin
2012-05-25 8:26 ` Eduardo Valentin
2012-05-29 9:49 ` Konstantin Baydarov
2012-05-29 9:49 ` Konstantin Baydarov
2012-05-30 8:38 ` Cousson, Benoit
2012-05-30 8:38 ` Cousson, Benoit
2012-05-30 9:05 ` Konstantin Baydarov
2012-05-30 9:05 ` Konstantin Baydarov
2012-05-30 9:26 ` Cousson, Benoit
2012-05-30 9:26 ` Cousson, Benoit
2012-05-30 10:17 ` Konstantin Baydarov
2012-05-30 10:17 ` Konstantin Baydarov
2012-05-30 10:22 ` Cousson, Benoit
2012-05-30 10:22 ` Cousson, Benoit
2012-05-30 10:42 ` Eduardo Valentin
2012-05-30 10:42 ` Eduardo Valentin
2012-05-30 12:16 ` Cousson, Benoit
2012-05-30 12:16 ` Cousson, Benoit
2012-05-31 12:06 ` Konstantin Baydarov
2012-05-31 12:06 ` Konstantin Baydarov
2012-05-31 12:49 ` Eduardo Valentin
2012-05-31 12:49 ` Eduardo Valentin
2012-05-31 12:52 ` Cousson, Benoit
2012-05-31 12:52 ` Cousson, Benoit
2012-05-31 14:51 ` Konstantin Baydarov
2012-05-31 14:51 ` Konstantin Baydarov
2012-05-25 8:35 ` [RFC PATCH 00/11] OMAP System Control Module Eduardo Valentin
2012-05-25 8:35 ` Eduardo Valentin
2012-05-25 10:50 ` Konstantin Baydarov
2012-05-25 10:50 ` Konstantin Baydarov
2012-05-25 11:11 ` Valentin, Eduardo
2012-05-25 11:11 ` Valentin, Eduardo
2012-05-25 12:21 ` Konstantin Baydarov
2012-05-25 12:21 ` Konstantin Baydarov
2012-06-01 0:12 ` [linux-pm] " Kevin Hilman
2012-06-01 0:12 ` Kevin Hilman
2012-06-18 11:32 ` [RFC PATCH v2 01/11] ARM: OMAP4: Remove un-used control module headers and defines Konstantin Baydarov
2012-06-18 11:32 ` Konstantin Baydarov
2012-06-18 11:32 ` [RFC PATCH v2 02/11] ARM: OMAP: expose control.h to mach area Konstantin Baydarov
2012-06-18 11:32 ` Konstantin Baydarov
2012-06-20 10:17 ` Tony Lindgren
2012-06-20 10:17 ` Tony Lindgren
2012-06-18 11:32 ` [RFC PATCH v2 03/11] mfd: omap: control: core system control driver Konstantin Baydarov
2012-06-18 11:32 ` Konstantin Baydarov
2012-06-20 10:22 ` Tony Lindgren
2012-06-20 10:22 ` Tony Lindgren
2012-06-20 14:13 ` Konstantin Baydarov
2012-06-20 14:13 ` Konstantin Baydarov
2012-06-26 11:17 ` Tony Lindgren
2012-06-26 11:17 ` Tony Lindgren
2012-06-18 11:32 ` [RFC PATCH v2 04/11] OMAP2+: use control module mfd driver in omap_type Konstantin Baydarov
2012-06-18 11:32 ` Konstantin Baydarov
2012-06-20 10:24 ` Tony Lindgren
2012-06-20 10:24 ` Tony Lindgren
2012-06-18 11:32 ` [RFC PATCH v2 05/11] mfd: omap: control: usb-phy: introduce the ctrl-module usb driver Konstantin Baydarov
2012-06-18 11:32 ` Konstantin Baydarov
2012-06-18 11:32 ` [RFC PATCH v2 06/11] ARM: OMAP4+: Adding the temperature sensor register set bit fields Konstantin Baydarov
2012-06-18 11:32 ` Konstantin Baydarov
2012-06-20 10:25 ` Tony Lindgren
2012-06-20 10:25 ` Tony Lindgren
2012-06-18 11:32 ` [RFC PATCH v2 07/11] ARM: OMAP4+: thermal: introduce bandgap temperature sensor Konstantin Baydarov
2012-06-18 11:32 ` Konstantin Baydarov
2012-06-18 11:32 ` [RFC PATCH v2 08/11] omap4: thermal: add basic CPU thermal zone Konstantin Baydarov
2012-06-18 11:32 ` Konstantin Baydarov
2012-06-18 11:32 ` [RFC PATCH v2 09/11] ARM: DT: Add support to system control module for OMAP4 Konstantin Baydarov
2012-06-18 11:32 ` Konstantin Baydarov
2012-06-18 12:13 ` Sergei Shtylyov
2012-06-18 12:13 ` Sergei Shtylyov
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