[PATCH 1/2] drm/amdgpu: fix and cleanup UVD IB generation

[PATCH 1/2] drm/amdgpu: fix and cleanup UVD IB generation

[Christian König]

We didn't synced the BO after validating it. Also sart to use
amdgpu_bo_create_reserved to simplify things.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 106 ++++++++++++--------------------
 1 file changed, 38 insertions(+), 68 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 7cdbe0c14496..9cd5517a4fa9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -952,37 +952,28 @@ int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx)
 static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
 			       bool direct, struct dma_fence **fence)
 {
-	struct ttm_operation_ctx ctx = { true, false };
-	struct ttm_validate_buffer tv;
-	struct ww_acquire_ctx ticket;
-	struct list_head head;
+	struct amdgpu_device *adev = ring->adev;
+	struct dma_fence *f = NULL;
 	struct amdgpu_job *job;
 	struct amdgpu_ib *ib;
-	struct dma_fence *f = NULL;
-	struct amdgpu_device *adev = ring->adev;
-	uint64_t addr;
 	uint32_t data[4];
-	int i, r;
-
-	memset(&tv, 0, sizeof(tv));
-	tv.bo = &bo->tbo;
-
-	INIT_LIST_HEAD(&head);
-	list_add(&tv.head, &head);
+	uint64_t addr;
+	long r;
+	int i;
 
-	r = ttm_eu_reserve_buffers(&ticket, &head, true, NULL);
-	if (r)
-		return r;
+	amdgpu_bo_kunmap(bo);
+	amdgpu_bo_unpin(bo);
 
 	if (!ring->adev->uvd.address_64_bit) {
+		struct ttm_operation_ctx ctx = { true, false };
+
 		amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
 		amdgpu_uvd_force_into_uvd_segment(bo);
+		r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+		if (r)
+			goto err;
 	}
 
-	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
-	if (r)
-		goto err;
-
 	r = amdgpu_job_alloc_with_ib(adev, 64, &job);
 	if (r)
 		goto err;
@@ -1014,6 +1005,14 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
 	ib->length_dw = 16;
 
 	if (direct) {
+		r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
+							true, false,
+							msecs_to_jiffies(10));
+		if (r == 0)
+			r = -ETIMEDOUT;
+		if (r < 0)
+			goto err_free;
+
 		r = amdgpu_ib_schedule(ring, 1, ib, NULL, &f);
 		job->fence = dma_fence_get(f);
 		if (r)
@@ -1021,17 +1020,23 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
 
 		amdgpu_job_free(job);
 	} else {
+		r = amdgpu_sync_resv(adev, &job->sync, bo->tbo.resv,
+				     AMDGPU_FENCE_OWNER_UNDEFINED, false);
+		if (r)
+			goto err_free;
+
 		r = amdgpu_job_submit(job, ring, &adev->uvd.entity,
 				      AMDGPU_FENCE_OWNER_UNDEFINED, &f);
 		if (r)
 			goto err_free;
 	}
 
-	ttm_eu_fence_buffer_objects(&ticket, &head, f);
+	amdgpu_bo_fence(bo, f, false);
+	amdgpu_bo_unreserve(bo);
+	amdgpu_bo_unref(&bo);
 
 	if (fence)
 		*fence = dma_fence_get(f);
-	amdgpu_bo_unref(&bo);
 	dma_fence_put(f);
 
 	return 0;
@@ -1040,7 +1045,8 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
 	amdgpu_job_free(job);
 
 err:
-	ttm_eu_backoff_reservation(&ticket, &head);
+	amdgpu_bo_unreserve(bo);
+	amdgpu_bo_unref(&bo);
 	return r;
 }
 
@@ -1051,31 +1057,16 @@ int amdgpu_uvd_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
 			      struct dma_fence **fence)
 {
 	struct amdgpu_device *adev = ring->adev;
-	struct amdgpu_bo *bo;
+	struct amdgpu_bo *bo = NULL;
 	uint32_t *msg;
 	int r, i;
 
-	r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
-			     AMDGPU_GEM_DOMAIN_VRAM,
-			     AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
-			     AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
-			     NULL, NULL, &bo);
+	r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
+				      AMDGPU_GEM_DOMAIN_VRAM,
+				      &bo, NULL, (void **)&msg);
 	if (r)
 		return r;
 
-	r = amdgpu_bo_reserve(bo, false);
-	if (r) {
-		amdgpu_bo_unref(&bo);
-		return r;
-	}
-
-	r = amdgpu_bo_kmap(bo, (void **)&msg);
-	if (r) {
-		amdgpu_bo_unreserve(bo);
-		amdgpu_bo_unref(&bo);
-		return r;
-	}
-
 	/* stitch together an UVD create msg */
 	msg[0] = cpu_to_le32(0x00000de4);
 	msg[1] = cpu_to_le32(0x00000000);
@@ -1091,9 +1082,6 @@ int amdgpu_uvd_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
 	for (i = 11; i < 1024; ++i)
 		msg[i] = cpu_to_le32(0x0);
 
-	amdgpu_bo_kunmap(bo);
-	amdgpu_bo_unreserve(bo);
-
 	return amdgpu_uvd_send_msg(ring, bo, true, fence);
 }
 
@@ -1101,31 +1089,16 @@ int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
 			       bool direct, struct dma_fence **fence)
 {
 	struct amdgpu_device *adev = ring->adev;
-	struct amdgpu_bo *bo;
+	struct amdgpu_bo *bo = NULL;
 	uint32_t *msg;
 	int r, i;
 
-	r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
-			     AMDGPU_GEM_DOMAIN_VRAM,
-			     AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
-			     AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
-			     NULL, NULL, &bo);
+	r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
+				      AMDGPU_GEM_DOMAIN_VRAM,
+				      &bo, NULL, (void **)&msg);
 	if (r)
 		return r;
 
-	r = amdgpu_bo_reserve(bo, false);
-	if (r) {
-		amdgpu_bo_unref(&bo);
-		return r;
-	}
-
-	r = amdgpu_bo_kmap(bo, (void **)&msg);
-	if (r) {
-		amdgpu_bo_unreserve(bo);
-		amdgpu_bo_unref(&bo);
-		return r;
-	}
-
 	/* stitch together an UVD destroy msg */
 	msg[0] = cpu_to_le32(0x00000de4);
 	msg[1] = cpu_to_le32(0x00000002);
@@ -1134,9 +1107,6 @@ int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
 	for (i = 4; i < 1024; ++i)
 		msg[i] = cpu_to_le32(0x0);
 
-	amdgpu_bo_kunmap(bo);
-	amdgpu_bo_unreserve(bo);
-
 	return amdgpu_uvd_send_msg(ring, bo, direct, fence);
 }
 
-- 
2.14.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH 2/2] drm/amdgpu: cleanup VCN IB generation

[Christian König]

Start to use amdgpu_bo_create_reserved.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 91 ++++++++-------------------------
 1 file changed, 21 insertions(+), 70 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index e86d0b2e9b7a..97bdde9a739e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
@@ -270,43 +270,28 @@ int amdgpu_vcn_dec_ring_test_ring(struct amdgpu_ring *ring)
 	return r;
 }
 
-static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
-			       bool direct, struct dma_fence **fence)
+static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring,
+				   struct amdgpu_bo *bo, bool direct,
+				   struct dma_fence **fence)
 {
-	struct ttm_operation_ctx ctx = { true, false };
-	struct ttm_validate_buffer tv;
-	struct ww_acquire_ctx ticket;
-	struct list_head head;
+	struct amdgpu_device *adev = ring->adev;
+	struct dma_fence *f = NULL;
 	struct amdgpu_job *job;
 	struct amdgpu_ib *ib;
-	struct dma_fence *f = NULL;
-	struct amdgpu_device *adev = ring->adev;
 	uint64_t addr;
 	int i, r;
 
-	memset(&tv, 0, sizeof(tv));
-	tv.bo = &bo->tbo;
-
-	INIT_LIST_HEAD(&head);
-	list_add(&tv.head, &head);
-
-	r = ttm_eu_reserve_buffers(&ticket, &head, true, NULL);
-	if (r)
-		return r;
-
-	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
-	if (r)
-		goto err;
-
 	r = amdgpu_job_alloc_with_ib(adev, 64, &job);
 	if (r)
 		goto err;
 
 	ib = &job->ibs[0];
 	addr = amdgpu_bo_gpu_offset(bo);
-	ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0);
+	ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0),
+			     0);
 	ib->ptr[1] = addr;
-	ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA1), 0);
+	ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA1),
+			     0);
 	ib->ptr[3] = addr >> 32;
 	ib->ptr[4] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0);
 	ib->ptr[5] = 0;
@@ -330,11 +315,12 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *b
 			goto err_free;
 	}
 
-	ttm_eu_fence_buffer_objects(&ticket, &head, f);
+	amdgpu_bo_fence(bo, f, false);
+	amdgpu_bo_unreserve(bo);
+	amdgpu_bo_unref(&bo);
 
 	if (fence)
 		*fence = dma_fence_get(f);
-	amdgpu_bo_unref(&bo);
 	dma_fence_put(f);
 
 	return 0;
@@ -343,7 +329,8 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *b
 	amdgpu_job_free(job);
 
 err:
-	ttm_eu_backoff_reservation(&ticket, &head);
+	amdgpu_bo_unreserve(bo);
+	amdgpu_bo_unref(&bo);
 	return r;
 }
 
@@ -351,31 +338,16 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
 			      struct dma_fence **fence)
 {
 	struct amdgpu_device *adev = ring->adev;
-	struct amdgpu_bo *bo;
+	struct amdgpu_bo *bo = NULL;
 	uint32_t *msg;
 	int r, i;
 
-	r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
-			     AMDGPU_GEM_DOMAIN_VRAM,
-			     AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
-			     AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
-			     NULL, NULL, &bo);
+	r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
+				      AMDGPU_GEM_DOMAIN_VRAM,
+				      &bo, NULL, (void **)&msg);
 	if (r)
 		return r;
 
-	r = amdgpu_bo_reserve(bo, false);
-	if (r) {
-		amdgpu_bo_unref(&bo);
-		return r;
-	}
-
-	r = amdgpu_bo_kmap(bo, (void **)&msg);
-	if (r) {
-		amdgpu_bo_unreserve(bo);
-		amdgpu_bo_unref(&bo);
-		return r;
-	}
-
 	msg[0] = cpu_to_le32(0x00000028);
 	msg[1] = cpu_to_le32(0x00000038);
 	msg[2] = cpu_to_le32(0x00000001);
@@ -393,9 +365,6 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
 	for (i = 14; i < 1024; ++i)
 		msg[i] = cpu_to_le32(0x0);
 
-	amdgpu_bo_kunmap(bo);
-	amdgpu_bo_unreserve(bo);
-
 	return amdgpu_vcn_dec_send_msg(ring, bo, true, fence);
 }
 
@@ -407,27 +376,12 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
 	uint32_t *msg;
 	int r, i;
 
-	r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
-			     AMDGPU_GEM_DOMAIN_VRAM,
-			     AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
-			     AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
-			     NULL, NULL, &bo);
+	r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
+				      AMDGPU_GEM_DOMAIN_VRAM,
+				      &bo, NULL, (void **)&msg);
 	if (r)
 		return r;
 
-	r = amdgpu_bo_reserve(bo, false);
-	if (r) {
-		amdgpu_bo_unref(&bo);
-		return r;
-	}
-
-	r = amdgpu_bo_kmap(bo, (void **)&msg);
-	if (r) {
-		amdgpu_bo_unreserve(bo);
-		amdgpu_bo_unref(&bo);
-		return r;
-	}
-
 	msg[0] = cpu_to_le32(0x00000028);
 	msg[1] = cpu_to_le32(0x00000018);
 	msg[2] = cpu_to_le32(0x00000000);
@@ -437,9 +391,6 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
 	for (i = 6; i < 1024; ++i)
 		msg[i] = cpu_to_le32(0x0);
 
-	amdgpu_bo_kunmap(bo);
-	amdgpu_bo_unreserve(bo);
-
 	return amdgpu_vcn_dec_send_msg(ring, bo, direct, fence);
 }
 
-- 
2.14.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 2/2] drm/amdgpu: cleanup VCN IB generation

[Andrey Grodzovsky]

On 02/07/2018 02:48 PM, Christian König wrote:
> Start to use amdgpu_bo_create_reserved.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 91 ++++++++-------------------------
>   1 file changed, 21 insertions(+), 70 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> index e86d0b2e9b7a..97bdde9a739e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> @@ -270,43 +270,28 @@ int amdgpu_vcn_dec_ring_test_ring(struct amdgpu_ring *ring)
>   	return r;
>   }
>   
> -static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
> -			       bool direct, struct dma_fence **fence)
> +static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring,
> +				   struct amdgpu_bo *bo, bool direct,
> +				   struct dma_fence **fence)
>   {
> -	struct ttm_operation_ctx ctx = { true, false };
> -	struct ttm_validate_buffer tv;
> -	struct ww_acquire_ctx ticket;
> -	struct list_head head;
> +	struct amdgpu_device *adev = ring->adev;
> +	struct dma_fence *f = NULL;
>   	struct amdgpu_job *job;
>   	struct amdgpu_ib *ib;
> -	struct dma_fence *f = NULL;
> -	struct amdgpu_device *adev = ring->adev;
>   	uint64_t addr;
>   	int i, r;
>   
> -	memset(&tv, 0, sizeof(tv));
> -	tv.bo = &bo->tbo;
> -
> -	INIT_LIST_HEAD(&head);
> -	list_add(&tv.head, &head);
> -
> -	r = ttm_eu_reserve_buffers(&ticket, &head, true, NULL);
> -	if (r)
> -		return r;
> -
> -	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
> -	if (r)
> -		goto err;
> -
>   	r = amdgpu_job_alloc_with_ib(adev, 64, &job);
>   	if (r)
>   		goto err;
>   
>   	ib = &job->ibs[0];
>   	addr = amdgpu_bo_gpu_offset(bo);
> -	ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0);
> +	ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0),
> +			     0);

last argument  slipped to new line

>   	ib->ptr[1] = addr;
> -	ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA1), 0);
> +	ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA1),
> +			     0);

Same as above

Thanks,
Andrey

>   	ib->ptr[3] = addr >> 32;
>   	ib->ptr[4] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0);
>   	ib->ptr[5] = 0;
> @@ -330,11 +315,12 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *b
>   			goto err_free;
>   	}
>   
> -	ttm_eu_fence_buffer_objects(&ticket, &head, f);
> +	amdgpu_bo_fence(bo, f, false);
> +	amdgpu_bo_unreserve(bo);
> +	amdgpu_bo_unref(&bo);
>   
>   	if (fence)
>   		*fence = dma_fence_get(f);
> -	amdgpu_bo_unref(&bo);
>   	dma_fence_put(f);
>   
>   	return 0;
> @@ -343,7 +329,8 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *b
>   	amdgpu_job_free(job);
>   
>   err:
> -	ttm_eu_backoff_reservation(&ticket, &head);
> +	amdgpu_bo_unreserve(bo);
> +	amdgpu_bo_unref(&bo);
>   	return r;
>   }
>   
> @@ -351,31 +338,16 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
>   			      struct dma_fence **fence)
>   {
>   	struct amdgpu_device *adev = ring->adev;
> -	struct amdgpu_bo *bo;
> +	struct amdgpu_bo *bo = NULL;
>   	uint32_t *msg;
>   	int r, i;
>   
> -	r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
> -			     AMDGPU_GEM_DOMAIN_VRAM,
> -			     AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> -			     AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> -			     NULL, NULL, &bo);
> +	r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
> +				      AMDGPU_GEM_DOMAIN_VRAM,
> +				      &bo, NULL, (void **)&msg);
>   	if (r)
>   		return r;
>   
> -	r = amdgpu_bo_reserve(bo, false);
> -	if (r) {
> -		amdgpu_bo_unref(&bo);
> -		return r;
> -	}
> -
> -	r = amdgpu_bo_kmap(bo, (void **)&msg);
> -	if (r) {
> -		amdgpu_bo_unreserve(bo);
> -		amdgpu_bo_unref(&bo);
> -		return r;
> -	}
> -
>   	msg[0] = cpu_to_le32(0x00000028);
>   	msg[1] = cpu_to_le32(0x00000038);
>   	msg[2] = cpu_to_le32(0x00000001);
> @@ -393,9 +365,6 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
>   	for (i = 14; i < 1024; ++i)
>   		msg[i] = cpu_to_le32(0x0);
>   
> -	amdgpu_bo_kunmap(bo);
> -	amdgpu_bo_unreserve(bo);
> -
>   	return amdgpu_vcn_dec_send_msg(ring, bo, true, fence);
>   }
>   
> @@ -407,27 +376,12 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
>   	uint32_t *msg;
>   	int r, i;
>   
> -	r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
> -			     AMDGPU_GEM_DOMAIN_VRAM,
> -			     AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> -			     AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> -			     NULL, NULL, &bo);
> +	r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
> +				      AMDGPU_GEM_DOMAIN_VRAM,
> +				      &bo, NULL, (void **)&msg);
>   	if (r)
>   		return r;
>   
> -	r = amdgpu_bo_reserve(bo, false);
> -	if (r) {
> -		amdgpu_bo_unref(&bo);
> -		return r;
> -	}
> -
> -	r = amdgpu_bo_kmap(bo, (void **)&msg);
> -	if (r) {
> -		amdgpu_bo_unreserve(bo);
> -		amdgpu_bo_unref(&bo);
> -		return r;
> -	}
> -
>   	msg[0] = cpu_to_le32(0x00000028);
>   	msg[1] = cpu_to_le32(0x00000018);
>   	msg[2] = cpu_to_le32(0x00000000);
> @@ -437,9 +391,6 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
>   	for (i = 6; i < 1024; ++i)
>   		msg[i] = cpu_to_le32(0x0);
>   
> -	amdgpu_bo_kunmap(bo);
> -	amdgpu_bo_unreserve(bo);
> -
>   	return amdgpu_vcn_dec_send_msg(ring, bo, direct, fence);
>   }
>   

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 2/2] drm/amdgpu: cleanup VCN IB generation

[Christian König]

Am 09.02.2018 um 13:20 schrieb Andrey Grodzovsky:
>
>
> On 02/07/2018 02:48 PM, Christian König wrote:
>> Start to use amdgpu_bo_create_reserved.
>>
>> Signed-off-by: Christian König <christian.koenig@amd.com>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 91 
>> ++++++++-------------------------
>>   1 file changed, 21 insertions(+), 70 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
>> index e86d0b2e9b7a..97bdde9a739e 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
>> @@ -270,43 +270,28 @@ int amdgpu_vcn_dec_ring_test_ring(struct 
>> amdgpu_ring *ring)
>>       return r;
>>   }
>>   -static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, 
>> struct amdgpu_bo *bo,
>> -                   bool direct, struct dma_fence **fence)
>> +static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring,
>> +                   struct amdgpu_bo *bo, bool direct,
>> +                   struct dma_fence **fence)
>>   {
>> -    struct ttm_operation_ctx ctx = { true, false };
>> -    struct ttm_validate_buffer tv;
>> -    struct ww_acquire_ctx ticket;
>> -    struct list_head head;
>> +    struct amdgpu_device *adev = ring->adev;
>> +    struct dma_fence *f = NULL;
>>       struct amdgpu_job *job;
>>       struct amdgpu_ib *ib;
>> -    struct dma_fence *f = NULL;
>> -    struct amdgpu_device *adev = ring->adev;
>>       uint64_t addr;
>>       int i, r;
>>   -    memset(&tv, 0, sizeof(tv));
>> -    tv.bo = &bo->tbo;
>> -
>> -    INIT_LIST_HEAD(&head);
>> -    list_add(&tv.head, &head);
>> -
>> -    r = ttm_eu_reserve_buffers(&ticket, &head, true, NULL);
>> -    if (r)
>> -        return r;
>> -
>> -    r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
>> -    if (r)
>> -        goto err;
>> -
>>       r = amdgpu_job_alloc_with_ib(adev, 64, &job);
>>       if (r)
>>           goto err;
>>         ib = &job->ibs[0];
>>       addr = amdgpu_bo_gpu_offset(bo);
>> -    ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>> mmUVD_GPCOM_VCPU_DATA0), 0);
>> +    ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>> mmUVD_GPCOM_VCPU_DATA0),
>> +                 0);
>
> last argument  slipped to new line
>
>>       ib->ptr[1] = addr;
>> -    ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>> mmUVD_GPCOM_VCPU_DATA1), 0);
>> +    ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>> mmUVD_GPCOM_VCPU_DATA1),
>> +                 0);
>
> Same as above

Mhm, actually correct according to the coding style (it makes the line 
less than 80 chars long), but I agree that it looks ugly. I'm going to 
remove it.

Question is rather can somebody please test this on Raven?

Thanks,
Christian.

>
> Thanks,
> Andrey
>
>>       ib->ptr[3] = addr >> 32;
>>       ib->ptr[4] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>> mmUVD_GPCOM_VCPU_CMD), 0);
>>       ib->ptr[5] = 0;
>> @@ -330,11 +315,12 @@ static int amdgpu_vcn_dec_send_msg(struct 
>> amdgpu_ring *ring, struct amdgpu_bo *b
>>               goto err_free;
>>       }
>>   -    ttm_eu_fence_buffer_objects(&ticket, &head, f);
>> +    amdgpu_bo_fence(bo, f, false);
>> +    amdgpu_bo_unreserve(bo);
>> +    amdgpu_bo_unref(&bo);
>>         if (fence)
>>           *fence = dma_fence_get(f);
>> -    amdgpu_bo_unref(&bo);
>>       dma_fence_put(f);
>>         return 0;
>> @@ -343,7 +329,8 @@ static int amdgpu_vcn_dec_send_msg(struct 
>> amdgpu_ring *ring, struct amdgpu_bo *b
>>       amdgpu_job_free(job);
>>     err:
>> -    ttm_eu_backoff_reservation(&ticket, &head);
>> +    amdgpu_bo_unreserve(bo);
>> +    amdgpu_bo_unref(&bo);
>>       return r;
>>   }
>>   @@ -351,31 +338,16 @@ static int 
>> amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
>>                     struct dma_fence **fence)
>>   {
>>       struct amdgpu_device *adev = ring->adev;
>> -    struct amdgpu_bo *bo;
>> +    struct amdgpu_bo *bo = NULL;
>>       uint32_t *msg;
>>       int r, i;
>>   -    r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
>> -                 AMDGPU_GEM_DOMAIN_VRAM,
>> -                 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
>> -                 AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
>> -                 NULL, NULL, &bo);
>> +    r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
>> +                      AMDGPU_GEM_DOMAIN_VRAM,
>> +                      &bo, NULL, (void **)&msg);
>>       if (r)
>>           return r;
>>   -    r = amdgpu_bo_reserve(bo, false);
>> -    if (r) {
>> -        amdgpu_bo_unref(&bo);
>> -        return r;
>> -    }
>> -
>> -    r = amdgpu_bo_kmap(bo, (void **)&msg);
>> -    if (r) {
>> -        amdgpu_bo_unreserve(bo);
>> -        amdgpu_bo_unref(&bo);
>> -        return r;
>> -    }
>> -
>>       msg[0] = cpu_to_le32(0x00000028);
>>       msg[1] = cpu_to_le32(0x00000038);
>>       msg[2] = cpu_to_le32(0x00000001);
>> @@ -393,9 +365,6 @@ static int amdgpu_vcn_dec_get_create_msg(struct 
>> amdgpu_ring *ring, uint32_t hand
>>       for (i = 14; i < 1024; ++i)
>>           msg[i] = cpu_to_le32(0x0);
>>   -    amdgpu_bo_kunmap(bo);
>> -    amdgpu_bo_unreserve(bo);
>> -
>>       return amdgpu_vcn_dec_send_msg(ring, bo, true, fence);
>>   }
>>   @@ -407,27 +376,12 @@ static int 
>> amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
>>       uint32_t *msg;
>>       int r, i;
>>   -    r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
>> -                 AMDGPU_GEM_DOMAIN_VRAM,
>> -                 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
>> -                 AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
>> -                 NULL, NULL, &bo);
>> +    r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
>> +                      AMDGPU_GEM_DOMAIN_VRAM,
>> +                      &bo, NULL, (void **)&msg);
>>       if (r)
>>           return r;
>>   -    r = amdgpu_bo_reserve(bo, false);
>> -    if (r) {
>> -        amdgpu_bo_unref(&bo);
>> -        return r;
>> -    }
>> -
>> -    r = amdgpu_bo_kmap(bo, (void **)&msg);
>> -    if (r) {
>> -        amdgpu_bo_unreserve(bo);
>> -        amdgpu_bo_unref(&bo);
>> -        return r;
>> -    }
>> -
>>       msg[0] = cpu_to_le32(0x00000028);
>>       msg[1] = cpu_to_le32(0x00000018);
>>       msg[2] = cpu_to_le32(0x00000000);
>> @@ -437,9 +391,6 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct 
>> amdgpu_ring *ring, uint32_t han
>>       for (i = 6; i < 1024; ++i)
>>           msg[i] = cpu_to_le32(0x0);
>>   -    amdgpu_bo_kunmap(bo);
>> -    amdgpu_bo_unreserve(bo);
>> -
>>       return amdgpu_vcn_dec_send_msg(ring, bo, direct, fence);
>>   }
>

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 2/2] drm/amdgpu: cleanup VCN IB generation

[Christian König]

Leo could you give this patch on Raven a try and review/ack it?

I've tested patch #1 on Vega10, but I don't have a stable Raven system 
to test this one.

Thanks,
Christian.

Am 07.02.2018 um 20:48 schrieb Christian König:
> Start to use amdgpu_bo_create_reserved.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 91 ++++++++-------------------------
>   1 file changed, 21 insertions(+), 70 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> index e86d0b2e9b7a..97bdde9a739e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> @@ -270,43 +270,28 @@ int amdgpu_vcn_dec_ring_test_ring(struct amdgpu_ring *ring)
>   	return r;
>   }
>   
> -static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
> -			       bool direct, struct dma_fence **fence)
> +static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring,
> +				   struct amdgpu_bo *bo, bool direct,
> +				   struct dma_fence **fence)
>   {
> -	struct ttm_operation_ctx ctx = { true, false };
> -	struct ttm_validate_buffer tv;
> -	struct ww_acquire_ctx ticket;
> -	struct list_head head;
> +	struct amdgpu_device *adev = ring->adev;
> +	struct dma_fence *f = NULL;
>   	struct amdgpu_job *job;
>   	struct amdgpu_ib *ib;
> -	struct dma_fence *f = NULL;
> -	struct amdgpu_device *adev = ring->adev;
>   	uint64_t addr;
>   	int i, r;
>   
> -	memset(&tv, 0, sizeof(tv));
> -	tv.bo = &bo->tbo;
> -
> -	INIT_LIST_HEAD(&head);
> -	list_add(&tv.head, &head);
> -
> -	r = ttm_eu_reserve_buffers(&ticket, &head, true, NULL);
> -	if (r)
> -		return r;
> -
> -	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
> -	if (r)
> -		goto err;
> -
>   	r = amdgpu_job_alloc_with_ib(adev, 64, &job);
>   	if (r)
>   		goto err;
>   
>   	ib = &job->ibs[0];
>   	addr = amdgpu_bo_gpu_offset(bo);
> -	ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0);
> +	ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0),
> +			     0);
>   	ib->ptr[1] = addr;
> -	ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA1), 0);
> +	ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA1),
> +			     0);
>   	ib->ptr[3] = addr >> 32;
>   	ib->ptr[4] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0);
>   	ib->ptr[5] = 0;
> @@ -330,11 +315,12 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *b
>   			goto err_free;
>   	}
>   
> -	ttm_eu_fence_buffer_objects(&ticket, &head, f);
> +	amdgpu_bo_fence(bo, f, false);
> +	amdgpu_bo_unreserve(bo);
> +	amdgpu_bo_unref(&bo);
>   
>   	if (fence)
>   		*fence = dma_fence_get(f);
> -	amdgpu_bo_unref(&bo);
>   	dma_fence_put(f);
>   
>   	return 0;
> @@ -343,7 +329,8 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *b
>   	amdgpu_job_free(job);
>   
>   err:
> -	ttm_eu_backoff_reservation(&ticket, &head);
> +	amdgpu_bo_unreserve(bo);
> +	amdgpu_bo_unref(&bo);
>   	return r;
>   }
>   
> @@ -351,31 +338,16 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
>   			      struct dma_fence **fence)
>   {
>   	struct amdgpu_device *adev = ring->adev;
> -	struct amdgpu_bo *bo;
> +	struct amdgpu_bo *bo = NULL;
>   	uint32_t *msg;
>   	int r, i;
>   
> -	r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
> -			     AMDGPU_GEM_DOMAIN_VRAM,
> -			     AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> -			     AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> -			     NULL, NULL, &bo);
> +	r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
> +				      AMDGPU_GEM_DOMAIN_VRAM,
> +				      &bo, NULL, (void **)&msg);
>   	if (r)
>   		return r;
>   
> -	r = amdgpu_bo_reserve(bo, false);
> -	if (r) {
> -		amdgpu_bo_unref(&bo);
> -		return r;
> -	}
> -
> -	r = amdgpu_bo_kmap(bo, (void **)&msg);
> -	if (r) {
> -		amdgpu_bo_unreserve(bo);
> -		amdgpu_bo_unref(&bo);
> -		return r;
> -	}
> -
>   	msg[0] = cpu_to_le32(0x00000028);
>   	msg[1] = cpu_to_le32(0x00000038);
>   	msg[2] = cpu_to_le32(0x00000001);
> @@ -393,9 +365,6 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
>   	for (i = 14; i < 1024; ++i)
>   		msg[i] = cpu_to_le32(0x0);
>   
> -	amdgpu_bo_kunmap(bo);
> -	amdgpu_bo_unreserve(bo);
> -
>   	return amdgpu_vcn_dec_send_msg(ring, bo, true, fence);
>   }
>   
> @@ -407,27 +376,12 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
>   	uint32_t *msg;
>   	int r, i;
>   
> -	r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
> -			     AMDGPU_GEM_DOMAIN_VRAM,
> -			     AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> -			     AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> -			     NULL, NULL, &bo);
> +	r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
> +				      AMDGPU_GEM_DOMAIN_VRAM,
> +				      &bo, NULL, (void **)&msg);
>   	if (r)
>   		return r;
>   
> -	r = amdgpu_bo_reserve(bo, false);
> -	if (r) {
> -		amdgpu_bo_unref(&bo);
> -		return r;
> -	}
> -
> -	r = amdgpu_bo_kmap(bo, (void **)&msg);
> -	if (r) {
> -		amdgpu_bo_unreserve(bo);
> -		amdgpu_bo_unref(&bo);
> -		return r;
> -	}
> -
>   	msg[0] = cpu_to_le32(0x00000028);
>   	msg[1] = cpu_to_le32(0x00000018);
>   	msg[2] = cpu_to_le32(0x00000000);
> @@ -437,9 +391,6 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
>   	for (i = 6; i < 1024; ++i)
>   		msg[i] = cpu_to_le32(0x0);
>   
> -	amdgpu_bo_kunmap(bo);
> -	amdgpu_bo_unreserve(bo);
> -
>   	return amdgpu_vcn_dec_send_msg(ring, bo, direct, fence);
>   }
>   

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 2/2] drm/amdgpu: cleanup VCN IB generation

[Andrey Grodzovsky]

On 02/09/2018 07:31 AM, Christian König wrote:
> Am 09.02.2018 um 13:20 schrieb Andrey Grodzovsky:
>>
>>
>> On 02/07/2018 02:48 PM, Christian König wrote:
>>> Start to use amdgpu_bo_create_reserved.
>>>
>>> Signed-off-by: Christian König <christian.koenig@amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 91 
>>> ++++++++-------------------------
>>>   1 file changed, 21 insertions(+), 70 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c 
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
>>> index e86d0b2e9b7a..97bdde9a739e 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
>>> @@ -270,43 +270,28 @@ int amdgpu_vcn_dec_ring_test_ring(struct 
>>> amdgpu_ring *ring)
>>>       return r;
>>>   }
>>>   -static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, 
>>> struct amdgpu_bo *bo,
>>> -                   bool direct, struct dma_fence **fence)
>>> +static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring,
>>> +                   struct amdgpu_bo *bo, bool direct,
>>> +                   struct dma_fence **fence)
>>>   {
>>> -    struct ttm_operation_ctx ctx = { true, false };
>>> -    struct ttm_validate_buffer tv;
>>> -    struct ww_acquire_ctx ticket;
>>> -    struct list_head head;
>>> +    struct amdgpu_device *adev = ring->adev;
>>> +    struct dma_fence *f = NULL;
>>>       struct amdgpu_job *job;
>>>       struct amdgpu_ib *ib;
>>> -    struct dma_fence *f = NULL;
>>> -    struct amdgpu_device *adev = ring->adev;
>>>       uint64_t addr;
>>>       int i, r;
>>>   -    memset(&tv, 0, sizeof(tv));
>>> -    tv.bo = &bo->tbo;
>>> -
>>> -    INIT_LIST_HEAD(&head);
>>> -    list_add(&tv.head, &head);
>>> -
>>> -    r = ttm_eu_reserve_buffers(&ticket, &head, true, NULL);
>>> -    if (r)
>>> -        return r;
>>> -
>>> -    r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
>>> -    if (r)
>>> -        goto err;
>>> -
>>>       r = amdgpu_job_alloc_with_ib(adev, 64, &job);
>>>       if (r)
>>>           goto err;
>>>         ib = &job->ibs[0];
>>>       addr = amdgpu_bo_gpu_offset(bo);
>>> -    ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>>> mmUVD_GPCOM_VCPU_DATA0), 0);
>>> +    ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>>> mmUVD_GPCOM_VCPU_DATA0),
>>> +                 0);
>>
>> last argument  slipped to new line
>>
>>>       ib->ptr[1] = addr;
>>> -    ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>>> mmUVD_GPCOM_VCPU_DATA1), 0);
>>> +    ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>>> mmUVD_GPCOM_VCPU_DATA1),
>>> +                 0);
>>
>> Same as above
>
> Mhm, actually correct according to the coding style (it makes the line 
> less than 80 chars long), but I agree that it looks ugly. I'm going to 
> remove it.
>
> Question is rather can somebody please test this on Raven?
>
> Thanks,
> Christian.

Today working from home so no raven at hand, if by Monday nobody tests 
it I can give it a try then with libdrm's VCN and UVD tests.

Thanks,
Andrey

>
>>
>> Thanks,
>> Andrey
>>
>>>       ib->ptr[3] = addr >> 32;
>>>       ib->ptr[4] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>>> mmUVD_GPCOM_VCPU_CMD), 0);
>>>       ib->ptr[5] = 0;
>>> @@ -330,11 +315,12 @@ static int amdgpu_vcn_dec_send_msg(struct 
>>> amdgpu_ring *ring, struct amdgpu_bo *b
>>>               goto err_free;
>>>       }
>>>   -    ttm_eu_fence_buffer_objects(&ticket, &head, f);
>>> +    amdgpu_bo_fence(bo, f, false);
>>> +    amdgpu_bo_unreserve(bo);
>>> +    amdgpu_bo_unref(&bo);
>>>         if (fence)
>>>           *fence = dma_fence_get(f);
>>> -    amdgpu_bo_unref(&bo);
>>>       dma_fence_put(f);
>>>         return 0;
>>> @@ -343,7 +329,8 @@ static int amdgpu_vcn_dec_send_msg(struct 
>>> amdgpu_ring *ring, struct amdgpu_bo *b
>>>       amdgpu_job_free(job);
>>>     err:
>>> -    ttm_eu_backoff_reservation(&ticket, &head);
>>> +    amdgpu_bo_unreserve(bo);
>>> +    amdgpu_bo_unref(&bo);
>>>       return r;
>>>   }
>>>   @@ -351,31 +338,16 @@ static int 
>>> amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
>>>                     struct dma_fence **fence)
>>>   {
>>>       struct amdgpu_device *adev = ring->adev;
>>> -    struct amdgpu_bo *bo;
>>> +    struct amdgpu_bo *bo = NULL;
>>>       uint32_t *msg;
>>>       int r, i;
>>>   -    r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
>>> -                 AMDGPU_GEM_DOMAIN_VRAM,
>>> -                 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
>>> -                 AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
>>> -                 NULL, NULL, &bo);
>>> +    r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
>>> +                      AMDGPU_GEM_DOMAIN_VRAM,
>>> +                      &bo, NULL, (void **)&msg);
>>>       if (r)
>>>           return r;
>>>   -    r = amdgpu_bo_reserve(bo, false);
>>> -    if (r) {
>>> -        amdgpu_bo_unref(&bo);
>>> -        return r;
>>> -    }
>>> -
>>> -    r = amdgpu_bo_kmap(bo, (void **)&msg);
>>> -    if (r) {
>>> -        amdgpu_bo_unreserve(bo);
>>> -        amdgpu_bo_unref(&bo);
>>> -        return r;
>>> -    }
>>> -
>>>       msg[0] = cpu_to_le32(0x00000028);
>>>       msg[1] = cpu_to_le32(0x00000038);
>>>       msg[2] = cpu_to_le32(0x00000001);
>>> @@ -393,9 +365,6 @@ static int amdgpu_vcn_dec_get_create_msg(struct 
>>> amdgpu_ring *ring, uint32_t hand
>>>       for (i = 14; i < 1024; ++i)
>>>           msg[i] = cpu_to_le32(0x0);
>>>   -    amdgpu_bo_kunmap(bo);
>>> -    amdgpu_bo_unreserve(bo);
>>> -
>>>       return amdgpu_vcn_dec_send_msg(ring, bo, true, fence);
>>>   }
>>>   @@ -407,27 +376,12 @@ static int 
>>> amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
>>>       uint32_t *msg;
>>>       int r, i;
>>>   -    r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
>>> -                 AMDGPU_GEM_DOMAIN_VRAM,
>>> -                 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
>>> -                 AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
>>> -                 NULL, NULL, &bo);
>>> +    r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
>>> +                      AMDGPU_GEM_DOMAIN_VRAM,
>>> +                      &bo, NULL, (void **)&msg);
>>>       if (r)
>>>           return r;
>>>   -    r = amdgpu_bo_reserve(bo, false);
>>> -    if (r) {
>>> -        amdgpu_bo_unref(&bo);
>>> -        return r;
>>> -    }
>>> -
>>> -    r = amdgpu_bo_kmap(bo, (void **)&msg);
>>> -    if (r) {
>>> -        amdgpu_bo_unreserve(bo);
>>> -        amdgpu_bo_unref(&bo);
>>> -        return r;
>>> -    }
>>> -
>>>       msg[0] = cpu_to_le32(0x00000028);
>>>       msg[1] = cpu_to_le32(0x00000018);
>>>       msg[2] = cpu_to_le32(0x00000000);
>>> @@ -437,9 +391,6 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct 
>>> amdgpu_ring *ring, uint32_t han
>>>       for (i = 6; i < 1024; ++i)
>>>           msg[i] = cpu_to_le32(0x0);
>>>   -    amdgpu_bo_kunmap(bo);
>>> -    amdgpu_bo_unreserve(bo);
>>> -
>>>       return amdgpu_vcn_dec_send_msg(ring, bo, direct, fence);
>>>   }
>>
>

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 2/2] drm/amdgpu: cleanup VCN IB generation

[Leo Liu]

On 02/09/2018 07:32 AM, Christian König wrote:
> Leo could you give this patch on Raven a try and review/ack it?

Sure.

Leo
>
> I've tested patch #1 on Vega10, but I don't have a stable Raven system 
> to test this one.
>
> Thanks,
> Christian.
>
> Am 07.02.2018 um 20:48 schrieb Christian König:
>> Start to use amdgpu_bo_create_reserved.
>>
>> Signed-off-by: Christian König <christian.koenig@amd.com>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 91 
>> ++++++++-------------------------
>>   1 file changed, 21 insertions(+), 70 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
>> index e86d0b2e9b7a..97bdde9a739e 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
>> @@ -270,43 +270,28 @@ int amdgpu_vcn_dec_ring_test_ring(struct 
>> amdgpu_ring *ring)
>>       return r;
>>   }
>>   -static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, 
>> struct amdgpu_bo *bo,
>> -                   bool direct, struct dma_fence **fence)
>> +static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring,
>> +                   struct amdgpu_bo *bo, bool direct,
>> +                   struct dma_fence **fence)
>>   {
>> -    struct ttm_operation_ctx ctx = { true, false };
>> -    struct ttm_validate_buffer tv;
>> -    struct ww_acquire_ctx ticket;
>> -    struct list_head head;
>> +    struct amdgpu_device *adev = ring->adev;
>> +    struct dma_fence *f = NULL;
>>       struct amdgpu_job *job;
>>       struct amdgpu_ib *ib;
>> -    struct dma_fence *f = NULL;
>> -    struct amdgpu_device *adev = ring->adev;
>>       uint64_t addr;
>>       int i, r;
>>   -    memset(&tv, 0, sizeof(tv));
>> -    tv.bo = &bo->tbo;
>> -
>> -    INIT_LIST_HEAD(&head);
>> -    list_add(&tv.head, &head);
>> -
>> -    r = ttm_eu_reserve_buffers(&ticket, &head, true, NULL);
>> -    if (r)
>> -        return r;
>> -
>> -    r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
>> -    if (r)
>> -        goto err;
>> -
>>       r = amdgpu_job_alloc_with_ib(adev, 64, &job);
>>       if (r)
>>           goto err;
>>         ib = &job->ibs[0];
>>       addr = amdgpu_bo_gpu_offset(bo);
>> -    ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>> mmUVD_GPCOM_VCPU_DATA0), 0);
>> +    ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>> mmUVD_GPCOM_VCPU_DATA0),
>> +                 0);
>>       ib->ptr[1] = addr;
>> -    ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>> mmUVD_GPCOM_VCPU_DATA1), 0);
>> +    ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>> mmUVD_GPCOM_VCPU_DATA1),
>> +                 0);
>>       ib->ptr[3] = addr >> 32;
>>       ib->ptr[4] = PACKET0(SOC15_REG_OFFSET(UVD, 0, 
>> mmUVD_GPCOM_VCPU_CMD), 0);
>>       ib->ptr[5] = 0;
>> @@ -330,11 +315,12 @@ static int amdgpu_vcn_dec_send_msg(struct 
>> amdgpu_ring *ring, struct amdgpu_bo *b
>>               goto err_free;
>>       }
>>   -    ttm_eu_fence_buffer_objects(&ticket, &head, f);
>> +    amdgpu_bo_fence(bo, f, false);
>> +    amdgpu_bo_unreserve(bo);
>> +    amdgpu_bo_unref(&bo);
>>         if (fence)
>>           *fence = dma_fence_get(f);
>> -    amdgpu_bo_unref(&bo);
>>       dma_fence_put(f);
>>         return 0;
>> @@ -343,7 +329,8 @@ static int amdgpu_vcn_dec_send_msg(struct 
>> amdgpu_ring *ring, struct amdgpu_bo *b
>>       amdgpu_job_free(job);
>>     err:
>> -    ttm_eu_backoff_reservation(&ticket, &head);
>> +    amdgpu_bo_unreserve(bo);
>> +    amdgpu_bo_unref(&bo);
>>       return r;
>>   }
>>   @@ -351,31 +338,16 @@ static int 
>> amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
>>                     struct dma_fence **fence)
>>   {
>>       struct amdgpu_device *adev = ring->adev;
>> -    struct amdgpu_bo *bo;
>> +    struct amdgpu_bo *bo = NULL;
>>       uint32_t *msg;
>>       int r, i;
>>   -    r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
>> -                 AMDGPU_GEM_DOMAIN_VRAM,
>> -                 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
>> -                 AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
>> -                 NULL, NULL, &bo);
>> +    r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
>> +                      AMDGPU_GEM_DOMAIN_VRAM,
>> +                      &bo, NULL, (void **)&msg);
>>       if (r)
>>           return r;
>>   -    r = amdgpu_bo_reserve(bo, false);
>> -    if (r) {
>> -        amdgpu_bo_unref(&bo);
>> -        return r;
>> -    }
>> -
>> -    r = amdgpu_bo_kmap(bo, (void **)&msg);
>> -    if (r) {
>> -        amdgpu_bo_unreserve(bo);
>> -        amdgpu_bo_unref(&bo);
>> -        return r;
>> -    }
>> -
>>       msg[0] = cpu_to_le32(0x00000028);
>>       msg[1] = cpu_to_le32(0x00000038);
>>       msg[2] = cpu_to_le32(0x00000001);
>> @@ -393,9 +365,6 @@ static int amdgpu_vcn_dec_get_create_msg(struct 
>> amdgpu_ring *ring, uint32_t hand
>>       for (i = 14; i < 1024; ++i)
>>           msg[i] = cpu_to_le32(0x0);
>>   -    amdgpu_bo_kunmap(bo);
>> -    amdgpu_bo_unreserve(bo);
>> -
>>       return amdgpu_vcn_dec_send_msg(ring, bo, true, fence);
>>   }
>>   @@ -407,27 +376,12 @@ static int 
>> amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
>>       uint32_t *msg;
>>       int r, i;
>>   -    r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
>> -                 AMDGPU_GEM_DOMAIN_VRAM,
>> -                 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
>> -                 AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
>> -                 NULL, NULL, &bo);
>> +    r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
>> +                      AMDGPU_GEM_DOMAIN_VRAM,
>> +                      &bo, NULL, (void **)&msg);
>>       if (r)
>>           return r;
>>   -    r = amdgpu_bo_reserve(bo, false);
>> -    if (r) {
>> -        amdgpu_bo_unref(&bo);
>> -        return r;
>> -    }
>> -
>> -    r = amdgpu_bo_kmap(bo, (void **)&msg);
>> -    if (r) {
>> -        amdgpu_bo_unreserve(bo);
>> -        amdgpu_bo_unref(&bo);
>> -        return r;
>> -    }
>> -
>>       msg[0] = cpu_to_le32(0x00000028);
>>       msg[1] = cpu_to_le32(0x00000018);
>>       msg[2] = cpu_to_le32(0x00000000);
>> @@ -437,9 +391,6 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct 
>> amdgpu_ring *ring, uint32_t han
>>       for (i = 6; i < 1024; ++i)
>>           msg[i] = cpu_to_le32(0x0);
>>   -    amdgpu_bo_kunmap(bo);
>> -    amdgpu_bo_unreserve(bo);
>> -
>>       return amdgpu_vcn_dec_send_msg(ring, bo, direct, fence);
>>   }
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 2/2] drm/amdgpu: cleanup VCN IB generation

[Andrey Grodzovsky]

[-- Attachment #1: Type: text/plain, Size: 361 bytes --]

Tested with latest amd-staging-drm-next + VCN patch on top. VCN dec 
tests pass but when modprobing amdgpu I get a few warnings and BUG_ONs - 
log attached. UVD is not enabled so can't test the UVD patch.


Thanks,

Andrey


On 02/09/2018 07:31 AM, Christian König wrote:
> Question is rather can somebody please test this on Raven?
>
> Thanks,
> Christian. 


[-- Attachment #2: log --]
[-- Type: text/plain, Size: 13520 bytes --]

  13.776970] NFSD: Using /var/lib/nfs/v4recovery as the NFSv4 state recovery directory
[   13.777673] NFSD: starting 90-second grace period (net f0000099)
[   13.816720] IPv6: ADDRCONF(NETDEV_UP): enp1s0f0: link is not ready
[   13.901818] r8169 0000:01:00.0 enp1s0f0: link down
[   13.901821] r8169 0000:01:00.0 enp1s0f0: link down
[   13.902102] IPv6: ADDRCONF(NETDEV_UP): enp1s0f0: link is not ready
[   17.237890] r8169 0000:01:00.0 enp1s0f0: link up
[   17.237903] IPv6: ADDRCONF(NETDEV_CHANGE): enp1s0f0: link becomes ready
[   32.797329] amdgpu: loading out-of-tree module taints kernel.
[   32.802872] amdgpu: module verification failed: signature and/or required key missing - tainting kernel
[   32.903501] [drm] amdgpu kernel modesetting enabled.
[   32.909609] [drm] initializing kernel modesetting (RAVEN 0x1002:0x15DD 0x1002:0x0123 0xC1).
[   32.909718] [drm] register mmio base: 0xE0700000
[   32.909719] [drm] register mmio size: 524288
[   32.909818] [drm] add ip block number 0 <soc15_common>
[   32.909819] [drm] add ip block number 1 <gmc_v9_0>
[   32.909821] [drm] add ip block number 2 <vega10_ih>
[   32.909822] [drm] add ip block number 3 <psp>
[   32.909823] [drm] add ip block number 4 <amdgpu_powerplay>
[   32.909824] [drm] add ip block number 5 <dm>
[   32.909826] [drm] add ip block number 6 <gfx_v9_0>
[   32.909827] [drm] add ip block number 7 <sdma_v4_0>
[   32.909828] [drm] add ip block number 8 <vcn_v1_0>
[   32.915527] [drm] probing gen 2 caps for device 1022:15db = 700d03/e
[   32.915531] [drm] probing mlw for device 1022:15db = 700d03
[   32.933726] [drm] VCN decode is enabled in VM mode
[   32.933728] [drm] VCN encode is enabled in VM mode
[   32.959101] [drm] BIOS signature incorrect 20 7
[   32.959203] resource sanity check: requesting [mem 0x000c0000-0x000dffff], which spans more than PCI Bus 0000:00 [mem 0x000c0000-0x000c3fff window]
[   32.959209] caller pci_map_rom+0x96/0x170 mapping multiple BARs
[   32.959354] ATOM BIOS: 113-RAVEN-028
[   32.961340] [drm] vm size is 262144 GB, 4 levels, block size is 9-bit, fragment size is 9-bit
[   32.961440] amdgpu 0000:02:00.0: VRAM: 1024M 0x000000F400000000 - 0x000000F43FFFFFFF (1024M used)
[   32.961443] amdgpu 0000:02:00.0: GTT: 1024M 0x000000F500000000 - 0x000000F53FFFFFFF
[   32.961482] [drm] Detected VRAM RAM=1024M, BAR=1024M
[   32.961483] [drm] RAM width 128bits UNKNOWN
[   32.962934] [TTM] Zone  kernel: Available graphics memory: 6354980 kiB
[   32.962936] [TTM] Zone   dma32: Available graphics memory: 2097152 kiB
[   32.962936] [TTM] Initializing pool allocator
[   32.963257] [TTM] Initializing DMA pool allocator
[   32.964073] [drm] amdgpu: 1024M of VRAM memory ready
[   32.964110] [drm] amdgpu: 3072M of GTT memory ready.
[   32.964763] [drm] GART: num cpu pages 262144, num gpu pages 262144
[   32.966810] [drm] PCIE GART of 1024M enabled (table at 0x000000F400800000).
[   33.003827] [drm] use_doorbell being set to: [true]
[   33.007278] [drm] Found VCN firmware Version: 1.24 Family ID: 18
[   33.188105] [drm] Display Core initialized with v3.1.32!
[   33.287083] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[   33.287086] [drm] Driver supports precise vblank timestamp query.
[   33.310070] [drm] VCN decode and encode initialized successfully.
[   33.314271] WARNING: CPU: 0 PID: 1119 at ./include/drm/ttm/ttm_bo_driver.h:908 amdgpu_bo_create_reserved+0x2bc/0x340 [amdgpu]
[   33.314274] Modules linked in: amdgpu(OE+) chash gpu_sched ttm drm_kms_helper drm i2c_algo_bit fb_sys_fops syscopyarea sysfillrect sysimgblt snd_hda_codec_realtek snd_hda_codec_generic snd_hda_codec_hdmi snd_hda_intel edac_mce_amd snd_hda_codec snd_hda_core kvm_amd snd_hwdep kvm snd_pcm irqbypass crct10dif_pclmul crc32_pclmul ghash_clmulni_intel pcbc snd_seq_midi snd_seq_midi_event snd_rawmidi joydev snd_seq aesni_intel aes_x86_64 crypto_simd glue_helper snd_seq_device cryptd snd_timer serio_raw snd soundcore ipmi_si(+) i2c_piix4 shpchp mac_hid binfmt_misc nfsd auth_rpcgss nfs_acl lockd parport_pc grace ppdev sunrpc lp parport autofs4 ahci libahci r8169 mii video hid_generic usbhid hid
[   33.314335] CPU: 0 PID: 1119 Comm: modprobe Tainted: G           OE    4.15.0-rc4.main+ #12
[   33.314336] Hardware name: AMD Tambourine/Tambourine, BIOS WMD7504N_Weekly_17_05_0 05/04/2017
[   33.314523] RIP: 0010:amdgpu_bo_create_reserved+0x2bc/0x340 [amdgpu]
[   33.314525] RSP: 0018:ffff8803c5c772d8 EFLAGS: 00010246
[   33.314528] RAX: 0000000000000000 RBX: ffff8803c5c77400 RCX: ffffffffa0c04b5a
[   33.314530] RDX: 0000000000000003 RSI: dffffc0000000000 RDI: ffff8803c6c64d08
[   33.314532] RBP: 0000000000001000 R08: ffff8803c5c77400 R09: 0000000000000000
[   33.314534] R10: 0000000020cda035 R11: fffffbfff05f26f6 R12: 1ffff10078b8ee5f
[   33.314536] R13: ffff8803c5e70000 R14: ffff8803c6c64c80 R15: 0000000000000000
[   33.314539] FS:  00007f8be7637700(0000) GS:ffff8803e6600000(0000) knlGS:0000000000000000
[   33.314541] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[   33.314543] CR2: 00007f4357660028 CR3: 00000003d4f45000 CR4: 00000000003406f0
[   33.314544] Call Trace:
[   33.314733]  ? amdgpu_bo_pin+0x20/0x20 [amdgpu]
[   33.314921]  ? amdgpu_sa_bo_free+0x8c/0x170 [amdgpu]
[   33.315104]  ? amdgpu_device_wb_free+0x18/0x30 [amdgpu]
[   33.315311]  amdgpu_vcn_dec_ring_test_ib+0x23c/0x440 [amdgpu]
[   33.315517]  ? amdgpu_vcn_dec_ring_test_ring+0x390/0x390 [amdgpu]
[   33.315524]  ? __debugfs_create_file+0x155/0x1a0
[   33.315529]  ? mutex_lock+0xe/0x30
[   33.315724]  amdgpu_ib_ring_tests+0x8e/0x120 [amdgpu]
[   33.315913]  amdgpu_device_init+0x1cc7/0x20c0 [amdgpu]
[   33.316124]  ? amdgpu_device_has_dc_support+0x30/0x30 [amdgpu]
[   33.316130]  ? create_object+0x3a8/0x470
[   33.316134]  ? kmemleak_disable+0x70/0x70
[   33.316139]  ? kasan_unpoison_shadow+0x31/0x40
[   33.316142]  ? kasan_kmalloc_large+0x63/0xb0
[   33.316147]  ? bdi_register_va.part.10+0x24e/0x280
[   33.316151]  ? kmalloc_order_trace+0x1d/0xa0
[   33.316339]  amdgpu_driver_load_kms+0xa8/0x3a0 [amdgpu]
[   33.316386]  drm_dev_register+0x1d3/0x2f0 [drm]
[   33.316574]  amdgpu_pci_probe+0x1bf/0x290 [amdgpu]
[   33.316763]  ? amdgpu_pmops_runtime_idle+0xf0/0xf0 [amdgpu]
[   33.316768]  local_pci_probe+0x74/0xe0
[   33.316772]  pci_device_probe+0x1dc/0x2d0
[   33.316776]  ? pci_device_remove+0x100/0x100
[   33.316783]  ? driver_sysfs_add+0xce/0x120
[   33.316786]  driver_probe_device+0x40b/0x6b0
[   33.316790]  ? driver_probe_device+0x6b0/0x6b0
[   33.316793]  __driver_attach+0x116/0x120
[   33.316798]  bus_for_each_dev+0xd8/0x130
[   33.316802]  ? subsys_dev_iter_exit+0x10/0x10
[   33.316805]  ? bus_add_driver+0x81/0x3a0
[   33.316810]  ? klist_node_init+0x51/0x70
[   33.316815]  bus_add_driver+0x31a/0x3a0
[   33.316819]  driver_register+0xc6/0x170
[   33.316823]  ? 0xffffffffa0898000
[   33.316827]  do_one_initcall+0x82/0x1d0
[   33.316832]  ? do_init_module+0x35/0x333
[   33.316835]  ? initcall_blacklisted+0x120/0x120
[   33.316839]  ? kasan_kmalloc+0xa6/0xd0
[   33.316842]  ? do_init_module+0x35/0x333
[   33.316846]  ? kasan_unpoison_shadow+0x31/0x40
[   33.316850]  ? __asan_register_globals+0x82/0xa0
[   33.316854]  do_init_module+0xe7/0x333
[   33.316859]  load_module+0x410c/0x4b40
[   33.316868]  ? module_frob_arch_sections+0x20/0x20
[   33.316872]  ? vfs_read+0x132/0x190
[   33.316876]  ? kernel_read+0x74/0xa0
[   33.316882]  ? SYSC_finit_module+0x14d/0x180
[   33.316884]  SYSC_finit_module+0x14d/0x180
[   33.316888]  ? SYSC_init_module+0x1b0/0x1b0
[   33.316891]  ? vfs_statx_fd+0x49/0x80
[   33.316894]  ? SYSC_newfstat+0x70/0xa0
[   33.316898]  ? __fget+0xa0/0xf0
[   33.316901]  ? syscall_trace_enter+0x1eb/0x4e0
[   33.316907]  ? vtime_user_exit+0x91/0xa0
[   33.316910]  ? SyS_init_module+0x10/0x10
[   33.316914]  do_syscall_64+0xe1/0x270
[   33.316919]  entry_SYSCALL64_slow_path+0x25/0x25
[   33.316921] RIP: 0033:0x7f8be716a4d9
[   33.316923] RSP: 002b:00007fffbf1a7cb8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139
[   33.316927] RAX: ffffffffffffffda RBX: 000055c92dbfaa80 RCX: 00007f8be716a4d9
[   33.316928] RDX: 0000000000000000 RSI: 000055c92ceb026b RDI: 000000000000000d
[   33.316930] RBP: 000055c92ceb026b R08: 0000000000000000 R09: 0000000000000000
[   33.316932] R10: 000000000000000d R11: 0000000000000246 R12: 0000000000000000
[   33.316934] R13: 000055c92dbf3720 R14: 0000000000040000 R15: 0000000000040000
[   33.316936] Code: 3b 5f 6f e0 4c 8b 33 e9 e8 fd ff ff 4c 89 ef e8 2b 5f 6f e0 49 8b 7d 00 89 ea 48 c7 c6 a0 19 e8 a0 e8 59 da c5 e0 e9 cf fe ff ff <0f> ff e9 e6 fd ff ff 3d 00 fe ff ff 74 2c 48 8b 44 24 18 48 8d 
[   33.316979] ---[ end trace 5435e2be926803a3 ]---
[   33.319275] ------------[ cut here ]------------
[   33.319282] Kernel BUG at 0000000029fa1674 [verbose debug info unavailable]
[   33.828201] ------------[ cut here ]------------
[   33.828204] kernel BUG at drivers/gpu/drm/ttm/ttm_bo.c:146!
[   33.828353] invalid opcode: 0000 [#1] SMP DEBUG_PAGEALLOC KASAN
[   33.828488] Modules linked in: amdgpu(OE+) chash gpu_sched ttm drm_kms_helper drm i2c_algo_bit fb_sys_fops syscopyarea sysfillrect sysimgblt snd_hda_codec_realtek snd_hda_codec_generic snd_hda_codec_hdmi snd_hda_intel edac_mce_amd snd_hda_codec snd_hda_core kvm_amd snd_hwdep kvm snd_pcm irqbypass crct10dif_pclmul crc32_pclmul ghash_clmulni_intel pcbc snd_seq_midi snd_seq_midi_event snd_rawmidi joydev snd_seq aesni_intel aes_x86_64 crypto_simd glue_helper snd_seq_device cryptd snd_timer serio_raw snd soundcore ipmi_si(+) i2c_piix4 shpchp mac_hid binfmt_misc nfsd auth_rpcgss nfs_acl lockd parport_pc grace ppdev sunrpc lp parport autofs4 ahci libahci r8169 mii video hid_generic usbhid hid
[   33.829230] CPU: 0 PID: 318 Comm: kworker/0:2 Tainted: G        W  OE    4.15.0-rc4.main+ #12
[   33.829337] Hardware name: AMD Tambourine/Tambourine, BIOS WMD7504N_Weekly_17_05_0 05/04/2017
[   33.829459] Workqueue: events ttm_bo_delayed_workqueue [ttm]
[   33.829557] RIP: 0010:ttm_bo_release_list+0x21e/0x230 [ttm]
[   33.829640] RSP: 0018:ffff8803deaa7cf0 EFLAGS: 00010286
[   33.829722] RAX: 00000000c0000000 RBX: ffff8803c6c64d98 RCX: ffffffffa086ae2f
[   33.829817] RDX: 0000000000000003 RSI: dffffc0000000000 RDI: ffff8803c6c64d08
[   33.829918] RBP: ffff8803c6c64d0c R08: ffff88036f53c000 R09: 0000000000000070
[   33.830018] R10: 000000001cb98ca4 R11: fffffbfff05a794b R12: ffff8803c5e72da8
[   33.830118] R13: ffff8803c5e72da8 R14: ffff8803c6c64cd8 R15: ffff8803c5e726e0
[   33.830219] FS:  0000000000000000(0000) GS:ffff8803e6600000(0000) knlGS:0000000000000000
[   33.830332] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[   33.830420] CR2: 00007f4357660028 CR3: 00000003d4f45000 CR4: 00000000003406f0
[   33.830520] Call Trace:
[   33.830598]  ? ttm_bo_cleanup_refs+0x1da/0x240 [ttm]
[   33.830695]  ttm_bo_delayed_delete+0x298/0x2d0 [ttm]
[   33.830791]  ? ttm_bo_cleanup_refs+0x240/0x240 [ttm]
[   33.830887]  ttm_bo_delayed_workqueue+0x17/0x50 [ttm]
[   33.830976]  process_one_work+0x2a2/0x6d0
[   33.831054]  worker_thread+0x87/0x770
[   33.831130]  kthread+0x174/0x1c0
[   33.831201]  ? process_one_work+0x6d0/0x6d0
[   33.831280]  ? kthread_associate_blkcg+0x130/0x130
[   33.831367]  ret_from_fork+0x1f/0x30
[   33.831439] Code: 5d 41 5c 41 5d 41 5e 41 5f e9 af d0 ff ff e8 ba 95 06 e1 eb 82 e8 b3 95 06 e1 e9 fb fe ff ff e8 a9 95 06 e1 e9 18 ff ff ff 0f 0b <0f> 0b 0f 0b 0f 0b 0f 0b 0f 0b 0f 1f 84 00 00 00 00 00 0f 1f 44 
[   33.831691] RIP: ttm_bo_release_list+0x21e/0x230 [ttm] RSP: ffff8803deaa7cf0
[   33.831792] ---[ end trace 5435e2be926803a4 ]---
[   33.844123] [drm] fb mappable at 0x91000000
[   33.844213] [drm] vram apper at 0x90000000
[   33.844290] [drm] size 19906560
[   33.844359] [drm] fb depth is 24
[   33.844428] [drm]    pitch is 13824
[   33.846361] fbcon: amdgpudrmfb (fb0) is primary device
[   33.856714] amdgpu: [powerplay] smu firmware version too old, can not set dpm level
[   33.894333] amdgpu: [powerplay] smu firmware version too old, can not set dpm level
[   33.958365] Console: switching to colour frame buffer device 430x90
[   34.008662] amdgpu 0000:02:00.0: fb0: amdgpudrmfb frame buffer device
[   34.036251] amdgpu 0000:02:00.0: ring 0(gfx) uses VM inv eng 4 on hub 0
[   34.036375] amdgpu 0000:02:00.0: ring 1(comp_1.0.0) uses VM inv eng 5 on hub 0
[   34.036497] amdgpu 0000:02:00.0: ring 2(comp_1.1.0) uses VM inv eng 6 on hub 0
[   34.036619] amdgpu 0000:02:00.0: ring 3(comp_1.2.0) uses VM inv eng 7 on hub 0
[   34.036740] amdgpu 0000:02:00.0: ring 4(comp_1.3.0) uses VM inv eng 8 on hub 0
[   34.036861] amdgpu 0000:02:00.0: ring 5(comp_1.0.1) uses VM inv eng 9 on hub 0
[   34.036982] amdgpu 0000:02:00.0: ring 6(comp_1.1.1) uses VM inv eng 10 on hub 0
[   34.037106] amdgpu 0000:02:00.0: ring 7(comp_1.2.1) uses VM inv eng 11 on hub 0
[   34.037228] amdgpu 0000:02:00.0: ring 8(comp_1.3.1) uses VM inv eng 12 on hub 0
[   34.037349] amdgpu 0000:02:00.0: ring 9(kiq_2.1.0) uses VM inv eng 13 on hub 0
[   34.037468] amdgpu 0000:02:00.0: ring 10(sdma0) uses VM inv eng 4 on hub 1
[   34.037581] amdgpu 0000:02:00.0: ring 11(vcn_dec) uses VM inv eng 5 on hub 1
[   34.037698] amdgpu 0000:02:00.0: ring 12(vcn_enc0) uses VM inv eng 6 on hub 1
[   34.037816] amdgpu 0000:02:00.0: ring 13(vcn_enc1) uses VM inv eng 7 on hub 1
[   34.037986] amdgpu: [powerplay] smu firmware version too old, can not set dpm level
[   34.065922] [drm] Initialized amdgpu 3.25.0 20150101 for 0000:02:00.0 on minor 0
[  113.132477] ipmi_si 0000:01:00.3: There appears to be no BMC at this location


[-- Attachment #3: Type: text/plain, Size: 154 bytes --]

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 2/2] drm/amdgpu: cleanup VCN IB generation

[Andrey Grodzovsky]

[-- Attachment #1.1: Type: text/plain, Size: 636 bytes --]

Found the issue, amdgpu_vcn_dec_get_destroy_msg was missing struct 
amdgpu_bo *bo *= NULL*; and so amdgpu_bo_create_reserved would not call 
amdgpu_bo_create.

Attached updated patch.

Thanks,

Andrey


On 02/12/2018 02:46 PM, Andrey Grodzovsky wrote:
> Tested with latest amd-staging-drm-next + VCN patch on top. VCN dec 
> tests pass but when modprobing amdgpu I get a few warnings and BUG_ONs 
> - log attached. UVD is not enabled so can't test the UVD patch.
>
>
> Thanks,
>
> Andrey
>
>
> On 02/09/2018 07:31 AM, Christian König wrote:
>> Question is rather can somebody please test this on Raven?
>>
>> Thanks,
>> Christian. 
>


[-- Attachment #1.2: Type: text/html, Size: 1271 bytes --]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0001-drm-amdgpu-cleanup-VCN-IB-generation.patch --]
[-- Type: text/x-patch; name="0001-drm-amdgpu-cleanup-VCN-IB-generation.patch", Size: 5657 bytes --]

>From 03d3d0195b4e672cefb2851e66f0fe03bd9089a3 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Christian=20K=C3=B6nig?= <ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Date: Wed, 7 Feb 2018 20:48:22 +0100
Subject: drm/amdgpu: cleanup VCN IB generation
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Start to use amdgpu_bo_create_reserved v2.

v2:
Fix missing pointer init to NULL.
Remove extra new lines.

Signed-off-by: Christian König <christian.koenig-5C7GfCeVMHo@public.gmane.org>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 91 ++++++++-------------------------
 1 file changed, 20 insertions(+), 71 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index e86d0b2..6c5e25f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
@@ -270,43 +270,26 @@ int amdgpu_vcn_dec_ring_test_ring(struct amdgpu_ring *ring)
 	return r;
 }
 
-static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
-			       bool direct, struct dma_fence **fence)
+static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring,
+				   struct amdgpu_bo *bo, bool direct,
+				   struct dma_fence **fence)
 {
-	struct ttm_operation_ctx ctx = { true, false };
-	struct ttm_validate_buffer tv;
-	struct ww_acquire_ctx ticket;
-	struct list_head head;
+	struct amdgpu_device *adev = ring->adev;
+	struct dma_fence *f = NULL;
 	struct amdgpu_job *job;
 	struct amdgpu_ib *ib;
-	struct dma_fence *f = NULL;
-	struct amdgpu_device *adev = ring->adev;
 	uint64_t addr;
 	int i, r;
 
-	memset(&tv, 0, sizeof(tv));
-	tv.bo = &bo->tbo;
-
-	INIT_LIST_HEAD(&head);
-	list_add(&tv.head, &head);
-
-	r = ttm_eu_reserve_buffers(&ticket, &head, true, NULL);
-	if (r)
-		return r;
-
-	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
-	if (r)
-		goto err;
-
 	r = amdgpu_job_alloc_with_ib(adev, 64, &job);
 	if (r)
 		goto err;
 
 	ib = &job->ibs[0];
 	addr = amdgpu_bo_gpu_offset(bo);
-	ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0);
+	ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0),0);
 	ib->ptr[1] = addr;
-	ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA1), 0);
+	ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA1),0);
 	ib->ptr[3] = addr >> 32;
 	ib->ptr[4] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0);
 	ib->ptr[5] = 0;
@@ -330,11 +313,12 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *b
 			goto err_free;
 	}
 
-	ttm_eu_fence_buffer_objects(&ticket, &head, f);
+	amdgpu_bo_fence(bo, f, false);
+	amdgpu_bo_unreserve(bo);
+	amdgpu_bo_unref(&bo);
 
 	if (fence)
 		*fence = dma_fence_get(f);
-	amdgpu_bo_unref(&bo);
 	dma_fence_put(f);
 
 	return 0;
@@ -343,7 +327,8 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *b
 	amdgpu_job_free(job);
 
 err:
-	ttm_eu_backoff_reservation(&ticket, &head);
+	amdgpu_bo_unreserve(bo);
+	amdgpu_bo_unref(&bo);
 	return r;
 }
 
@@ -351,31 +336,16 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
 			      struct dma_fence **fence)
 {
 	struct amdgpu_device *adev = ring->adev;
-	struct amdgpu_bo *bo;
+	struct amdgpu_bo *bo = NULL;
 	uint32_t *msg;
 	int r, i;
 
-	r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
-			     AMDGPU_GEM_DOMAIN_VRAM,
-			     AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
-			     AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
-			     NULL, NULL, &bo);
+	r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
+				      AMDGPU_GEM_DOMAIN_VRAM,
+				      &bo, NULL, (void **)&msg);
 	if (r)
 		return r;
 
-	r = amdgpu_bo_reserve(bo, false);
-	if (r) {
-		amdgpu_bo_unref(&bo);
-		return r;
-	}
-
-	r = amdgpu_bo_kmap(bo, (void **)&msg);
-	if (r) {
-		amdgpu_bo_unreserve(bo);
-		amdgpu_bo_unref(&bo);
-		return r;
-	}
-
 	msg[0] = cpu_to_le32(0x00000028);
 	msg[1] = cpu_to_le32(0x00000038);
 	msg[2] = cpu_to_le32(0x00000001);
@@ -393,9 +363,6 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
 	for (i = 14; i < 1024; ++i)
 		msg[i] = cpu_to_le32(0x0);
 
-	amdgpu_bo_kunmap(bo);
-	amdgpu_bo_unreserve(bo);
-
 	return amdgpu_vcn_dec_send_msg(ring, bo, true, fence);
 }
 
@@ -403,31 +370,16 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
 			       bool direct, struct dma_fence **fence)
 {
 	struct amdgpu_device *adev = ring->adev;
-	struct amdgpu_bo *bo;
+	struct amdgpu_bo *bo = NULL;
 	uint32_t *msg;
 	int r, i;
 
-	r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
-			     AMDGPU_GEM_DOMAIN_VRAM,
-			     AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
-			     AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
-			     NULL, NULL, &bo);
+	r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
+				      AMDGPU_GEM_DOMAIN_VRAM,
+				      &bo, NULL, (void **)&msg);
 	if (r)
 		return r;
 
-	r = amdgpu_bo_reserve(bo, false);
-	if (r) {
-		amdgpu_bo_unref(&bo);
-		return r;
-	}
-
-	r = amdgpu_bo_kmap(bo, (void **)&msg);
-	if (r) {
-		amdgpu_bo_unreserve(bo);
-		amdgpu_bo_unref(&bo);
-		return r;
-	}
-
 	msg[0] = cpu_to_le32(0x00000028);
 	msg[1] = cpu_to_le32(0x00000018);
 	msg[2] = cpu_to_le32(0x00000000);
@@ -437,9 +389,6 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
 	for (i = 6; i < 1024; ++i)
 		msg[i] = cpu_to_le32(0x0);
 
-	amdgpu_bo_kunmap(bo);
-	amdgpu_bo_unreserve(bo);
-
 	return amdgpu_vcn_dec_send_msg(ring, bo, direct, fence);
 }
 
-- 
2.7.4


[-- Attachment #3: Type: text/plain, Size: 154 bytes --]

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 2/2] drm/amdgpu: cleanup VCN IB generation

[Christian König]

[-- Attachment #1.1: Type: text/plain, Size: 1160 bytes --]

It's always the obvious. Leo any more comments on this?

If not can we get your rb on this patch as well?

Andrey if Leo gives his ok can you commit both? I'm on vacation and 
don't want to mess with this at the moment.

Thanks,
Christian.

Am 13.02.2018 um 14:50 schrieb Andrey Grodzovsky:
>
> Found the issue, amdgpu_vcn_dec_get_destroy_msg was missing struct 
> amdgpu_bo *bo *= NULL*; and so amdgpu_bo_create_reserved would not 
> call amdgpu_bo_create.
>
> Attached updated patch.
>
> Thanks,
>
> Andrey
>
>
> On 02/12/2018 02:46 PM, Andrey Grodzovsky wrote:
>> Tested with latest amd-staging-drm-next + VCN patch on top. VCN dec 
>> tests pass but when modprobing amdgpu I get a few warnings and 
>> BUG_ONs - log attached. UVD is not enabled so can't test the UVD patch.
>>
>>
>> Thanks,
>>
>> Andrey
>>
>>
>> On 02/09/2018 07:31 AM, Christian König wrote:
>>> Question is rather can somebody please test this on Raven?
>>>
>>> Thanks,
>>> Christian. 
>>
>
>
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx


[-- Attachment #1.2: Type: text/html, Size: 2454 bytes --]

[-- Attachment #2: Type: text/plain, Size: 154 bytes --]

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 2/2] drm/amdgpu: cleanup VCN IB generation

[Andrey Grodzovsky]

[-- Attachment #1.1: Type: text/plain, Size: 1279 bytes --]

Sure

Andrey


On 02/13/2018 08:57 AM, Christian König wrote:
> It's always the obvious. Leo any more comments on this?
>
> If not can we get your rb on this patch as well?
>
> Andrey if Leo gives his ok can you commit both? I'm on vacation and 
> don't want to mess with this at the moment.
>
> Thanks,
> Christian.
>
> Am 13.02.2018 um 14:50 schrieb Andrey Grodzovsky:
>>
>> Found the issue, amdgpu_vcn_dec_get_destroy_msg was missing struct 
>> amdgpu_bo *bo *= NULL*; and so amdgpu_bo_create_reserved would not 
>> call amdgpu_bo_create.
>>
>> Attached updated patch.
>>
>> Thanks,
>>
>> Andrey
>>
>>
>> On 02/12/2018 02:46 PM, Andrey Grodzovsky wrote:
>>> Tested with latest amd-staging-drm-next + VCN patch on top. VCN dec 
>>> tests pass but when modprobing amdgpu I get a few warnings and 
>>> BUG_ONs - log attached. UVD is not enabled so can't test the UVD patch.
>>>
>>>
>>> Thanks,
>>>
>>> Andrey
>>>
>>>
>>> On 02/09/2018 07:31 AM, Christian König wrote:
>>>> Question is rather can somebody please test this on Raven?
>>>>
>>>> Thanks,
>>>> Christian. 
>>>
>>
>>
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>


[-- Attachment #1.2: Type: text/html, Size: 2912 bytes --]

[-- Attachment #2: Type: text/plain, Size: 154 bytes --]

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 2/2] drm/amdgpu: cleanup VCN IB generation

[Leo Liu]

[-- Attachment #1.1: Type: text/plain, Size: 1340 bytes --]



On 02/13/2018 08:57 AM, Christian König wrote:
> It's always the obvious. Leo any more comments on this?
>
> If not can we get your rb on this patch as well?

Tested-and-Reviewed-by: Leo Liu <leo.liu-5C7GfCeVMHo@public.gmane.org>


>
> Andrey if Leo gives his ok can you commit both? I'm on vacation and 
> don't want to mess with this at the moment.
>
> Thanks,
> Christian.
>
> Am 13.02.2018 um 14:50 schrieb Andrey Grodzovsky:
>>
>> Found the issue, amdgpu_vcn_dec_get_destroy_msg was missing struct 
>> amdgpu_bo *bo *= NULL*; and so amdgpu_bo_create_reserved would not 
>> call amdgpu_bo_create.
>>
>> Attached updated patch.
>>
>> Thanks,
>>
>> Andrey
>>
>>
>> On 02/12/2018 02:46 PM, Andrey Grodzovsky wrote:
>>> Tested with latest amd-staging-drm-next + VCN patch on top. VCN dec 
>>> tests pass but when modprobing amdgpu I get a few warnings and 
>>> BUG_ONs - log attached. UVD is not enabled so can't test the UVD patch.
>>>
>>>
>>> Thanks,
>>>
>>> Andrey
>>>
>>>
>>> On 02/09/2018 07:31 AM, Christian König wrote:
>>>> Question is rather can somebody please test this on Raven?
>>>>
>>>> Thanks,
>>>> Christian. 
>>>
>>
>>
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>


[-- Attachment #1.2: Type: text/html, Size: 3272 bytes --]

[-- Attachment #2: Type: text/plain, Size: 154 bytes --]

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 1/2] drm/amdgpu: fix and cleanup UVD IB generation

[Leo Liu]

Reviewed-by: Leo Liu <leo.liu@amd.com>


On 02/07/2018 02:48 PM, Christian König wrote:
> We didn't synced the BO after validating it. Also sart to use
> amdgpu_bo_create_reserved to simplify things.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 106 ++++++++++++--------------------
>   1 file changed, 38 insertions(+), 68 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> index 7cdbe0c14496..9cd5517a4fa9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> @@ -952,37 +952,28 @@ int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx)
>   static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
>   			       bool direct, struct dma_fence **fence)
>   {
> -	struct ttm_operation_ctx ctx = { true, false };
> -	struct ttm_validate_buffer tv;
> -	struct ww_acquire_ctx ticket;
> -	struct list_head head;
> +	struct amdgpu_device *adev = ring->adev;
> +	struct dma_fence *f = NULL;
>   	struct amdgpu_job *job;
>   	struct amdgpu_ib *ib;
> -	struct dma_fence *f = NULL;
> -	struct amdgpu_device *adev = ring->adev;
> -	uint64_t addr;
>   	uint32_t data[4];
> -	int i, r;
> -
> -	memset(&tv, 0, sizeof(tv));
> -	tv.bo = &bo->tbo;
> -
> -	INIT_LIST_HEAD(&head);
> -	list_add(&tv.head, &head);
> +	uint64_t addr;
> +	long r;
> +	int i;
>   
> -	r = ttm_eu_reserve_buffers(&ticket, &head, true, NULL);
> -	if (r)
> -		return r;
> +	amdgpu_bo_kunmap(bo);
> +	amdgpu_bo_unpin(bo);
>   
>   	if (!ring->adev->uvd.address_64_bit) {
> +		struct ttm_operation_ctx ctx = { true, false };
> +
>   		amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
>   		amdgpu_uvd_force_into_uvd_segment(bo);
> +		r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
> +		if (r)
> +			goto err;
>   	}
>   
> -	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
> -	if (r)
> -		goto err;
> -
>   	r = amdgpu_job_alloc_with_ib(adev, 64, &job);
>   	if (r)
>   		goto err;
> @@ -1014,6 +1005,14 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
>   	ib->length_dw = 16;
>   
>   	if (direct) {
> +		r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
> +							true, false,
> +							msecs_to_jiffies(10));
> +		if (r == 0)
> +			r = -ETIMEDOUT;
> +		if (r < 0)
> +			goto err_free;
> +
>   		r = amdgpu_ib_schedule(ring, 1, ib, NULL, &f);
>   		job->fence = dma_fence_get(f);
>   		if (r)
> @@ -1021,17 +1020,23 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
>   
>   		amdgpu_job_free(job);
>   	} else {
> +		r = amdgpu_sync_resv(adev, &job->sync, bo->tbo.resv,
> +				     AMDGPU_FENCE_OWNER_UNDEFINED, false);
> +		if (r)
> +			goto err_free;
> +
>   		r = amdgpu_job_submit(job, ring, &adev->uvd.entity,
>   				      AMDGPU_FENCE_OWNER_UNDEFINED, &f);
>   		if (r)
>   			goto err_free;
>   	}
>   
> -	ttm_eu_fence_buffer_objects(&ticket, &head, f);
> +	amdgpu_bo_fence(bo, f, false);
> +	amdgpu_bo_unreserve(bo);
> +	amdgpu_bo_unref(&bo);
>   
>   	if (fence)
>   		*fence = dma_fence_get(f);
> -	amdgpu_bo_unref(&bo);
>   	dma_fence_put(f);
>   
>   	return 0;
> @@ -1040,7 +1045,8 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
>   	amdgpu_job_free(job);
>   
>   err:
> -	ttm_eu_backoff_reservation(&ticket, &head);
> +	amdgpu_bo_unreserve(bo);
> +	amdgpu_bo_unref(&bo);
>   	return r;
>   }
>   
> @@ -1051,31 +1057,16 @@ int amdgpu_uvd_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
>   			      struct dma_fence **fence)
>   {
>   	struct amdgpu_device *adev = ring->adev;
> -	struct amdgpu_bo *bo;
> +	struct amdgpu_bo *bo = NULL;
>   	uint32_t *msg;
>   	int r, i;
>   
> -	r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
> -			     AMDGPU_GEM_DOMAIN_VRAM,
> -			     AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> -			     AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> -			     NULL, NULL, &bo);
> +	r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
> +				      AMDGPU_GEM_DOMAIN_VRAM,
> +				      &bo, NULL, (void **)&msg);
>   	if (r)
>   		return r;
>   
> -	r = amdgpu_bo_reserve(bo, false);
> -	if (r) {
> -		amdgpu_bo_unref(&bo);
> -		return r;
> -	}
> -
> -	r = amdgpu_bo_kmap(bo, (void **)&msg);
> -	if (r) {
> -		amdgpu_bo_unreserve(bo);
> -		amdgpu_bo_unref(&bo);
> -		return r;
> -	}
> -
>   	/* stitch together an UVD create msg */
>   	msg[0] = cpu_to_le32(0x00000de4);
>   	msg[1] = cpu_to_le32(0x00000000);
> @@ -1091,9 +1082,6 @@ int amdgpu_uvd_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
>   	for (i = 11; i < 1024; ++i)
>   		msg[i] = cpu_to_le32(0x0);
>   
> -	amdgpu_bo_kunmap(bo);
> -	amdgpu_bo_unreserve(bo);
> -
>   	return amdgpu_uvd_send_msg(ring, bo, true, fence);
>   }
>   
> @@ -1101,31 +1089,16 @@ int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
>   			       bool direct, struct dma_fence **fence)
>   {
>   	struct amdgpu_device *adev = ring->adev;
> -	struct amdgpu_bo *bo;
> +	struct amdgpu_bo *bo = NULL;
>   	uint32_t *msg;
>   	int r, i;
>   
> -	r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
> -			     AMDGPU_GEM_DOMAIN_VRAM,
> -			     AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> -			     AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> -			     NULL, NULL, &bo);
> +	r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
> +				      AMDGPU_GEM_DOMAIN_VRAM,
> +				      &bo, NULL, (void **)&msg);
>   	if (r)
>   		return r;
>   
> -	r = amdgpu_bo_reserve(bo, false);
> -	if (r) {
> -		amdgpu_bo_unref(&bo);
> -		return r;
> -	}
> -
> -	r = amdgpu_bo_kmap(bo, (void **)&msg);
> -	if (r) {
> -		amdgpu_bo_unreserve(bo);
> -		amdgpu_bo_unref(&bo);
> -		return r;
> -	}
> -
>   	/* stitch together an UVD destroy msg */
>   	msg[0] = cpu_to_le32(0x00000de4);
>   	msg[1] = cpu_to_le32(0x00000002);
> @@ -1134,9 +1107,6 @@ int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
>   	for (i = 4; i < 1024; ++i)
>   		msg[i] = cpu_to_le32(0x0);
>   
> -	amdgpu_bo_kunmap(bo);
> -	amdgpu_bo_unreserve(bo);
> -
>   	return amdgpu_uvd_send_msg(ring, bo, direct, fence);
>   }
>   

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx