* [PATCH 1/6] drm/amdgpu: add no_user_fence flag to ring funcs
@ 2019-05-08 15:51 Liu, Leo
[not found] ` <20190508155100.7810-1-leo.liu-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 9+ messages in thread
From: Liu, Leo @ 2019-05-08 15:51 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Liu, Leo
So we can generalize the no user fence supported engine
Signed-off-by: Leo Liu <leo.liu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index d7fae2676269..cdddce938bf5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -114,6 +114,7 @@ struct amdgpu_ring_funcs {
uint32_t align_mask;
u32 nop;
bool support_64bit_ptrs;
+ bool no_user_fence;
unsigned vmhub;
unsigned extra_dw;
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/6] drm/amdgpu/UVD: set no_user_fence flag to true
[not found] ` <20190508155100.7810-1-leo.liu-5C7GfCeVMHo@public.gmane.org>
@ 2019-05-08 15:51 ` Liu, Leo
2019-05-08 15:51 ` [PATCH 3/6] drm/amdgpu/VCE: " Liu, Leo
` (3 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Liu, Leo @ 2019-05-08 15:51 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Liu, Leo
There is no user fence support for UVD
Signed-off-by: Leo Liu <leo.liu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 1 +
drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 1 +
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 3 +++
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 2 ++
4 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
index c4fb58667fd4..bf3385280d3f 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
@@ -741,6 +741,7 @@ static const struct amdgpu_ring_funcs uvd_v4_2_ring_funcs = {
.type = AMDGPU_RING_TYPE_UVD,
.align_mask = 0xf,
.support_64bit_ptrs = false,
+ .no_user_fence = true,
.get_rptr = uvd_v4_2_ring_get_rptr,
.get_wptr = uvd_v4_2_ring_get_wptr,
.set_wptr = uvd_v4_2_ring_set_wptr,
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
index 52bd8a654734..3210a7bd9a6d 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
@@ -849,6 +849,7 @@ static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = {
.type = AMDGPU_RING_TYPE_UVD,
.align_mask = 0xf,
.support_64bit_ptrs = false,
+ .no_user_fence = true,
.get_rptr = uvd_v5_0_ring_get_rptr,
.get_wptr = uvd_v5_0_ring_get_wptr,
.set_wptr = uvd_v5_0_ring_set_wptr,
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index c9edddf9f88a..c61a314c56cc 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -1502,6 +1502,7 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_phys_funcs = {
.type = AMDGPU_RING_TYPE_UVD,
.align_mask = 0xf,
.support_64bit_ptrs = false,
+ .no_user_fence = true,
.get_rptr = uvd_v6_0_ring_get_rptr,
.get_wptr = uvd_v6_0_ring_get_wptr,
.set_wptr = uvd_v6_0_ring_set_wptr,
@@ -1527,6 +1528,7 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_vm_funcs = {
.type = AMDGPU_RING_TYPE_UVD,
.align_mask = 0xf,
.support_64bit_ptrs = false,
+ .no_user_fence = true,
.get_rptr = uvd_v6_0_ring_get_rptr,
.get_wptr = uvd_v6_0_ring_get_wptr,
.set_wptr = uvd_v6_0_ring_set_wptr,
@@ -1555,6 +1557,7 @@ static const struct amdgpu_ring_funcs uvd_v6_0_enc_ring_vm_funcs = {
.align_mask = 0x3f,
.nop = HEVC_ENC_CMD_NO_OP,
.support_64bit_ptrs = false,
+ .no_user_fence = true,
.get_rptr = uvd_v6_0_enc_ring_get_rptr,
.get_wptr = uvd_v6_0_enc_ring_get_wptr,
.set_wptr = uvd_v6_0_enc_ring_set_wptr,
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
index 2191d3d0a219..cdb96d4cb424 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
@@ -1759,6 +1759,7 @@ static const struct amdgpu_ring_funcs uvd_v7_0_ring_vm_funcs = {
.type = AMDGPU_RING_TYPE_UVD,
.align_mask = 0xf,
.support_64bit_ptrs = false,
+ .no_user_fence = true,
.vmhub = AMDGPU_MMHUB,
.get_rptr = uvd_v7_0_ring_get_rptr,
.get_wptr = uvd_v7_0_ring_get_wptr,
@@ -1791,6 +1792,7 @@ static const struct amdgpu_ring_funcs uvd_v7_0_enc_ring_vm_funcs = {
.align_mask = 0x3f,
.nop = HEVC_ENC_CMD_NO_OP,
.support_64bit_ptrs = false,
+ .no_user_fence = true,
.vmhub = AMDGPU_MMHUB,
.get_rptr = uvd_v7_0_enc_ring_get_rptr,
.get_wptr = uvd_v7_0_enc_ring_get_wptr,
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/6] drm/amdgpu/VCE: set no_user_fence flag to true
[not found] ` <20190508155100.7810-1-leo.liu-5C7GfCeVMHo@public.gmane.org>
2019-05-08 15:51 ` [PATCH 2/6] drm/amdgpu/UVD: set no_user_fence flag to true Liu, Leo
@ 2019-05-08 15:51 ` Liu, Leo
2019-05-08 15:51 ` [PATCH 4/6] drm/amdgpu/VCN: " Liu, Leo
` (2 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Liu, Leo @ 2019-05-08 15:51 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Liu, Leo
There is no user fence support for VCE
Signed-off-by: Leo Liu <leo.liu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 1 +
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 2 ++
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 1 +
3 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
index 40363ca6c5f1..ab0cb8325796 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
@@ -605,6 +605,7 @@ static const struct amdgpu_ring_funcs vce_v2_0_ring_funcs = {
.align_mask = 0xf,
.nop = VCE_CMD_NO_OP,
.support_64bit_ptrs = false,
+ .no_user_fence = true,
.get_rptr = vce_v2_0_ring_get_rptr,
.get_wptr = vce_v2_0_ring_get_wptr,
.set_wptr = vce_v2_0_ring_set_wptr,
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index 6ec65cf11112..36902ec16dcf 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
@@ -894,6 +894,7 @@ static const struct amdgpu_ring_funcs vce_v3_0_ring_phys_funcs = {
.align_mask = 0xf,
.nop = VCE_CMD_NO_OP,
.support_64bit_ptrs = false,
+ .no_user_fence = true,
.get_rptr = vce_v3_0_ring_get_rptr,
.get_wptr = vce_v3_0_ring_get_wptr,
.set_wptr = vce_v3_0_ring_set_wptr,
@@ -917,6 +918,7 @@ static const struct amdgpu_ring_funcs vce_v3_0_ring_vm_funcs = {
.align_mask = 0xf,
.nop = VCE_CMD_NO_OP,
.support_64bit_ptrs = false,
+ .no_user_fence = true,
.get_rptr = vce_v3_0_ring_get_rptr,
.get_wptr = vce_v3_0_ring_get_wptr,
.set_wptr = vce_v3_0_ring_set_wptr,
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
index c0ec27991c22..e267b073f525 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
@@ -1069,6 +1069,7 @@ static const struct amdgpu_ring_funcs vce_v4_0_ring_vm_funcs = {
.align_mask = 0x3f,
.nop = VCE_CMD_NO_OP,
.support_64bit_ptrs = false,
+ .no_user_fence = true,
.vmhub = AMDGPU_MMHUB,
.get_rptr = vce_v4_0_ring_get_rptr,
.get_wptr = vce_v4_0_ring_get_wptr,
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 4/6] drm/amdgpu/VCN: set no_user_fence flag to true
[not found] ` <20190508155100.7810-1-leo.liu-5C7GfCeVMHo@public.gmane.org>
2019-05-08 15:51 ` [PATCH 2/6] drm/amdgpu/UVD: set no_user_fence flag to true Liu, Leo
2019-05-08 15:51 ` [PATCH 3/6] drm/amdgpu/VCE: " Liu, Leo
@ 2019-05-08 15:51 ` Liu, Leo
2019-05-08 15:51 ` [PATCH 5/6] drm/amdgpu: check no_user_fence flag for engines Liu, Leo
2019-05-08 15:51 ` [PATCH 6/6] drm/amdgpu: remove MM engine related WARN_ON for user fence Liu, Leo
4 siblings, 0 replies; 9+ messages in thread
From: Liu, Leo @ 2019-05-08 15:51 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Liu, Leo
There is no user fence support for VCN
Signed-off-by: Leo Liu <leo.liu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index 3dbc51f9d3b9..ac2e5a1eb576 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -2054,6 +2054,7 @@ static const struct amdgpu_ring_funcs vcn_v1_0_dec_ring_vm_funcs = {
.type = AMDGPU_RING_TYPE_VCN_DEC,
.align_mask = 0xf,
.support_64bit_ptrs = false,
+ .no_user_fence = true,
.vmhub = AMDGPU_MMHUB,
.get_rptr = vcn_v1_0_dec_ring_get_rptr,
.get_wptr = vcn_v1_0_dec_ring_get_wptr,
@@ -2087,6 +2088,7 @@ static const struct amdgpu_ring_funcs vcn_v1_0_enc_ring_vm_funcs = {
.align_mask = 0x3f,
.nop = VCN_ENC_CMD_NO_OP,
.support_64bit_ptrs = false,
+ .no_user_fence = true,
.vmhub = AMDGPU_MMHUB,
.get_rptr = vcn_v1_0_enc_ring_get_rptr,
.get_wptr = vcn_v1_0_enc_ring_get_wptr,
@@ -2118,6 +2120,7 @@ static const struct amdgpu_ring_funcs vcn_v1_0_jpeg_ring_vm_funcs = {
.align_mask = 0xf,
.nop = PACKET0(0x81ff, 0),
.support_64bit_ptrs = false,
+ .no_user_fence = true,
.vmhub = AMDGPU_MMHUB,
.extra_dw = 64,
.get_rptr = vcn_v1_0_jpeg_ring_get_rptr,
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 5/6] drm/amdgpu: check no_user_fence flag for engines
[not found] ` <20190508155100.7810-1-leo.liu-5C7GfCeVMHo@public.gmane.org>
` (2 preceding siblings ...)
2019-05-08 15:51 ` [PATCH 4/6] drm/amdgpu/VCN: " Liu, Leo
@ 2019-05-08 15:51 ` Liu, Leo
2019-05-08 15:51 ` [PATCH 6/6] drm/amdgpu: remove MM engine related WARN_ON for user fence Liu, Leo
4 siblings, 0 replies; 9+ messages in thread
From: Liu, Leo @ 2019-05-08 15:51 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Liu, Leo
To replace checking ring type and make them generic
Signed-off-by: Leo Liu <leo.liu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index d0e221c8d940..d72cc583ebd1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -1008,11 +1008,9 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
j++;
}
- /* UVD & VCE fw doesn't support user fences */
+ /* MM engine doesn't support user fences */
ring = to_amdgpu_ring(parser->entity->rq->sched);
- if (parser->job->uf_addr && (
- ring->funcs->type == AMDGPU_RING_TYPE_UVD ||
- ring->funcs->type == AMDGPU_RING_TYPE_VCE))
+ if (parser->job->uf_addr && ring->funcs->no_user_fence)
return -EINVAL;
return amdgpu_ctx_wait_prev_fence(parser->ctx, parser->entity);
--
2.17.1
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 6/6] drm/amdgpu: remove MM engine related WARN_ON for user fence
[not found] ` <20190508155100.7810-1-leo.liu-5C7GfCeVMHo@public.gmane.org>
` (3 preceding siblings ...)
2019-05-08 15:51 ` [PATCH 5/6] drm/amdgpu: check no_user_fence flag for engines Liu, Leo
@ 2019-05-08 15:51 ` Liu, Leo
[not found] ` <20190508155100.7810-6-leo.liu-5C7GfCeVMHo@public.gmane.org>
4 siblings, 1 reply; 9+ messages in thread
From: Liu, Leo @ 2019-05-08 15:51 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Liu, Leo
Since the check aleady done with command submission check
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 2 --
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 2 --
drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 2 --
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 4 ----
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 5 -----
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 2 --
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 6 ------
7 files changed, 23 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index c021b114c8a4..967a5f080863 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -1053,8 +1053,6 @@ void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring,
void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
unsigned flags)
{
- WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
-
amdgpu_ring_write(ring, VCE_CMD_FENCE);
amdgpu_ring_write(ring, addr);
amdgpu_ring_write(ring, upper_32_bits(addr));
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
index bf3385280d3f..dc60c8753752 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
@@ -446,8 +446,6 @@ static void uvd_v4_2_stop(struct amdgpu_device *adev)
static void uvd_v4_2_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
unsigned flags)
{
- WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
-
amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
amdgpu_ring_write(ring, seq);
amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
index 3210a7bd9a6d..86234178d440 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
@@ -462,8 +462,6 @@ static void uvd_v5_0_stop(struct amdgpu_device *adev)
static void uvd_v5_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
unsigned flags)
{
- WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
-
amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
amdgpu_ring_write(ring, seq);
amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index c61a314c56cc..486fa743c594 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -882,8 +882,6 @@ static void uvd_v6_0_stop(struct amdgpu_device *adev)
static void uvd_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
unsigned flags)
{
- WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
-
amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
amdgpu_ring_write(ring, seq);
amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
@@ -912,8 +910,6 @@ static void uvd_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
static void uvd_v6_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
u64 seq, unsigned flags)
{
- WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
-
amdgpu_ring_write(ring, HEVC_ENC_CMD_FENCE);
amdgpu_ring_write(ring, addr);
amdgpu_ring_write(ring, upper_32_bits(addr));
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
index cdb96d4cb424..18bec3605a80 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
@@ -1143,8 +1143,6 @@ static void uvd_v7_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
{
struct amdgpu_device *adev = ring->adev;
- WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
-
amdgpu_ring_write(ring,
PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_CONTEXT_ID), 0));
amdgpu_ring_write(ring, seq);
@@ -1180,9 +1178,6 @@ static void uvd_v7_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
static void uvd_v7_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
u64 seq, unsigned flags)
{
-
- WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
-
amdgpu_ring_write(ring, HEVC_ENC_CMD_FENCE);
amdgpu_ring_write(ring, addr);
amdgpu_ring_write(ring, upper_32_bits(addr));
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
index e267b073f525..06544f728085 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
@@ -963,8 +963,6 @@ static void vce_v4_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *j
static void vce_v4_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
u64 seq, unsigned flags)
{
- WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
-
amdgpu_ring_write(ring, VCE_CMD_FENCE);
amdgpu_ring_write(ring, addr);
amdgpu_ring_write(ring, upper_32_bits(addr));
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index ac2e5a1eb576..b00bd45bc258 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -1334,8 +1334,6 @@ static void vcn_v1_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64
{
struct amdgpu_device *adev = ring->adev;
- WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
-
amdgpu_ring_write(ring,
PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0));
amdgpu_ring_write(ring, seq);
@@ -1506,8 +1504,6 @@ static void vcn_v1_0_enc_ring_set_wptr(struct amdgpu_ring *ring)
static void vcn_v1_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
u64 seq, unsigned flags)
{
- WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
-
amdgpu_ring_write(ring, VCN_ENC_CMD_FENCE);
amdgpu_ring_write(ring, addr);
amdgpu_ring_write(ring, upper_32_bits(addr));
@@ -1666,8 +1662,6 @@ static void vcn_v1_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u6
{
struct amdgpu_device *adev = ring->adev;
- WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
-
amdgpu_ring_write(ring,
PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_JPEG_GPCOM_DATA0), 0, 0, PACKETJ_TYPE0));
amdgpu_ring_write(ring, seq);
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 6/6] drm/amdgpu: remove MM engine related WARN_ON for user fence
[not found] ` <20190508155100.7810-6-leo.liu-5C7GfCeVMHo@public.gmane.org>
@ 2019-05-08 17:45 ` Alex Deucher
[not found] ` <CADnq5_P7Aa=YhxLNi4Wt8y_cTJmiW8OhPgcpDn5hzyiY4e4WYg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 9+ messages in thread
From: Alex Deucher @ 2019-05-08 17:45 UTC (permalink / raw)
To: Liu, Leo; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Wed, May 8, 2019 at 11:51 AM Liu, Leo <Leo.Liu@amd.com> wrote:
>
> Since the check aleady done with command submission check
Missing signed-off-by.
patches 1-5 are:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
As for this patch, I don't think these are directly related to user
fences and we may want to keep them.
Alex
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 2 --
> drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 2 --
> drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 2 --
> drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 4 ----
> drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 5 -----
> drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 2 --
> drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 6 ------
> 7 files changed, 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
> index c021b114c8a4..967a5f080863 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
> @@ -1053,8 +1053,6 @@ void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring,
> void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
> unsigned flags)
> {
> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
> -
> amdgpu_ring_write(ring, VCE_CMD_FENCE);
> amdgpu_ring_write(ring, addr);
> amdgpu_ring_write(ring, upper_32_bits(addr));
> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
> index bf3385280d3f..dc60c8753752 100644
> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
> @@ -446,8 +446,6 @@ static void uvd_v4_2_stop(struct amdgpu_device *adev)
> static void uvd_v4_2_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
> unsigned flags)
> {
> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
> -
> amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
> amdgpu_ring_write(ring, seq);
> amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
> index 3210a7bd9a6d..86234178d440 100644
> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
> @@ -462,8 +462,6 @@ static void uvd_v5_0_stop(struct amdgpu_device *adev)
> static void uvd_v5_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
> unsigned flags)
> {
> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
> -
> amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
> amdgpu_ring_write(ring, seq);
> amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
> index c61a314c56cc..486fa743c594 100644
> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
> @@ -882,8 +882,6 @@ static void uvd_v6_0_stop(struct amdgpu_device *adev)
> static void uvd_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
> unsigned flags)
> {
> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
> -
> amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
> amdgpu_ring_write(ring, seq);
> amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
> @@ -912,8 +910,6 @@ static void uvd_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
> static void uvd_v6_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
> u64 seq, unsigned flags)
> {
> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
> -
> amdgpu_ring_write(ring, HEVC_ENC_CMD_FENCE);
> amdgpu_ring_write(ring, addr);
> amdgpu_ring_write(ring, upper_32_bits(addr));
> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
> index cdb96d4cb424..18bec3605a80 100644
> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
> @@ -1143,8 +1143,6 @@ static void uvd_v7_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
> {
> struct amdgpu_device *adev = ring->adev;
>
> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
> -
> amdgpu_ring_write(ring,
> PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_CONTEXT_ID), 0));
> amdgpu_ring_write(ring, seq);
> @@ -1180,9 +1178,6 @@ static void uvd_v7_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
> static void uvd_v7_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
> u64 seq, unsigned flags)
> {
> -
> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
> -
> amdgpu_ring_write(ring, HEVC_ENC_CMD_FENCE);
> amdgpu_ring_write(ring, addr);
> amdgpu_ring_write(ring, upper_32_bits(addr));
> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> index e267b073f525..06544f728085 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> @@ -963,8 +963,6 @@ static void vce_v4_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *j
> static void vce_v4_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
> u64 seq, unsigned flags)
> {
> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
> -
> amdgpu_ring_write(ring, VCE_CMD_FENCE);
> amdgpu_ring_write(ring, addr);
> amdgpu_ring_write(ring, upper_32_bits(addr));
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> index ac2e5a1eb576..b00bd45bc258 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> @@ -1334,8 +1334,6 @@ static void vcn_v1_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64
> {
> struct amdgpu_device *adev = ring->adev;
>
> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
> -
> amdgpu_ring_write(ring,
> PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0));
> amdgpu_ring_write(ring, seq);
> @@ -1506,8 +1504,6 @@ static void vcn_v1_0_enc_ring_set_wptr(struct amdgpu_ring *ring)
> static void vcn_v1_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
> u64 seq, unsigned flags)
> {
> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
> -
> amdgpu_ring_write(ring, VCN_ENC_CMD_FENCE);
> amdgpu_ring_write(ring, addr);
> amdgpu_ring_write(ring, upper_32_bits(addr));
> @@ -1666,8 +1662,6 @@ static void vcn_v1_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u6
> {
> struct amdgpu_device *adev = ring->adev;
>
> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
> -
> amdgpu_ring_write(ring,
> PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_JPEG_GPCOM_DATA0), 0, 0, PACKETJ_TYPE0));
> amdgpu_ring_write(ring, seq);
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 6/6] drm/amdgpu: remove MM engine related WARN_ON for user fence
[not found] ` <CADnq5_P7Aa=YhxLNi4Wt8y_cTJmiW8OhPgcpDn5hzyiY4e4WYg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2019-05-08 19:02 ` Liu, Leo
[not found] ` <4c83931c-4752-be8b-cca7-9b0cc12cc9dc-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 9+ messages in thread
From: Liu, Leo @ 2019-05-08 19:02 UTC (permalink / raw)
To: Alex Deucher; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On 5/8/19 1:45 PM, Alex Deucher wrote:
> [CAUTION: External Email]
>
> On Wed, May 8, 2019 at 11:51 AM Liu, Leo <Leo.Liu@amd.com> wrote:
>> Since the check aleady done with command submission check
> Missing signed-off-by.
>
> patches 1-5 are:
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>
> As for this patch, I don't think these are directly related to user
> fences and we may want to keep them.
Okay. I will drop this patch.
Thanks for the reviews.
Leo
>
> Alex
>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 2 --
>> drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 2 --
>> drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 2 --
>> drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 4 ----
>> drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 5 -----
>> drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 2 --
>> drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 6 ------
>> 7 files changed, 23 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
>> index c021b114c8a4..967a5f080863 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
>> @@ -1053,8 +1053,6 @@ void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring,
>> void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
>> unsigned flags)
>> {
>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>> amdgpu_ring_write(ring, VCE_CMD_FENCE);
>> amdgpu_ring_write(ring, addr);
>> amdgpu_ring_write(ring, upper_32_bits(addr));
>> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
>> index bf3385280d3f..dc60c8753752 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
>> @@ -446,8 +446,6 @@ static void uvd_v4_2_stop(struct amdgpu_device *adev)
>> static void uvd_v4_2_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
>> unsigned flags)
>> {
>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>> amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
>> amdgpu_ring_write(ring, seq);
>> amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
>> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
>> index 3210a7bd9a6d..86234178d440 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
>> @@ -462,8 +462,6 @@ static void uvd_v5_0_stop(struct amdgpu_device *adev)
>> static void uvd_v5_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
>> unsigned flags)
>> {
>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>> amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
>> amdgpu_ring_write(ring, seq);
>> amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
>> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
>> index c61a314c56cc..486fa743c594 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
>> @@ -882,8 +882,6 @@ static void uvd_v6_0_stop(struct amdgpu_device *adev)
>> static void uvd_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
>> unsigned flags)
>> {
>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>> amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
>> amdgpu_ring_write(ring, seq);
>> amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
>> @@ -912,8 +910,6 @@ static void uvd_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
>> static void uvd_v6_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
>> u64 seq, unsigned flags)
>> {
>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>> amdgpu_ring_write(ring, HEVC_ENC_CMD_FENCE);
>> amdgpu_ring_write(ring, addr);
>> amdgpu_ring_write(ring, upper_32_bits(addr));
>> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>> index cdb96d4cb424..18bec3605a80 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>> @@ -1143,8 +1143,6 @@ static void uvd_v7_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
>> {
>> struct amdgpu_device *adev = ring->adev;
>>
>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>> amdgpu_ring_write(ring,
>> PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_CONTEXT_ID), 0));
>> amdgpu_ring_write(ring, seq);
>> @@ -1180,9 +1178,6 @@ static void uvd_v7_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
>> static void uvd_v7_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
>> u64 seq, unsigned flags)
>> {
>> -
>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>> amdgpu_ring_write(ring, HEVC_ENC_CMD_FENCE);
>> amdgpu_ring_write(ring, addr);
>> amdgpu_ring_write(ring, upper_32_bits(addr));
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
>> index e267b073f525..06544f728085 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
>> @@ -963,8 +963,6 @@ static void vce_v4_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *j
>> static void vce_v4_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
>> u64 seq, unsigned flags)
>> {
>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>> amdgpu_ring_write(ring, VCE_CMD_FENCE);
>> amdgpu_ring_write(ring, addr);
>> amdgpu_ring_write(ring, upper_32_bits(addr));
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
>> index ac2e5a1eb576..b00bd45bc258 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
>> @@ -1334,8 +1334,6 @@ static void vcn_v1_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64
>> {
>> struct amdgpu_device *adev = ring->adev;
>>
>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>> amdgpu_ring_write(ring,
>> PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0));
>> amdgpu_ring_write(ring, seq);
>> @@ -1506,8 +1504,6 @@ static void vcn_v1_0_enc_ring_set_wptr(struct amdgpu_ring *ring)
>> static void vcn_v1_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
>> u64 seq, unsigned flags)
>> {
>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>> amdgpu_ring_write(ring, VCN_ENC_CMD_FENCE);
>> amdgpu_ring_write(ring, addr);
>> amdgpu_ring_write(ring, upper_32_bits(addr));
>> @@ -1666,8 +1662,6 @@ static void vcn_v1_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u6
>> {
>> struct amdgpu_device *adev = ring->adev;
>>
>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>> amdgpu_ring_write(ring,
>> PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_JPEG_GPCOM_DATA0), 0, 0, PACKETJ_TYPE0));
>> amdgpu_ring_write(ring, seq);
>> --
>> 2.17.1
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 6/6] drm/amdgpu: remove MM engine related WARN_ON for user fence
[not found] ` <4c83931c-4752-be8b-cca7-9b0cc12cc9dc-5C7GfCeVMHo@public.gmane.org>
@ 2019-05-09 7:13 ` Christian König
0 siblings, 0 replies; 9+ messages in thread
From: Christian König @ 2019-05-09 7:13 UTC (permalink / raw)
To: Liu, Leo, Alex Deucher; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Am 08.05.19 um 21:02 schrieb Liu, Leo:
> On 5/8/19 1:45 PM, Alex Deucher wrote:
>> [CAUTION: External Email]
>>
>> On Wed, May 8, 2019 at 11:51 AM Liu, Leo <Leo.Liu@amd.com> wrote:
>>> Since the check aleady done with command submission check
>> Missing signed-off-by.
>>
>> patches 1-5 are:
>> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>>
>> As for this patch, I don't think these are directly related to user
>> fences and we may want to keep them.
> Okay. I will drop this patch.
Yeah, could be that we internally in the kernel try to submit a 64bit
fence to an MM engine at some point.
patches 1-5 are Reviewed-by: Christian König <christian.koenig@amd.com>
as well.
Thanks,
Christian.
>
> Thanks for the reviews.
>
> Leo
>
>
>
>> Alex
>>
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 2 --
>>> drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 2 --
>>> drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 2 --
>>> drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 4 ----
>>> drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 5 -----
>>> drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 2 --
>>> drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 6 ------
>>> 7 files changed, 23 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
>>> index c021b114c8a4..967a5f080863 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
>>> @@ -1053,8 +1053,6 @@ void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring,
>>> void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
>>> unsigned flags)
>>> {
>>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>>> -
>>> amdgpu_ring_write(ring, VCE_CMD_FENCE);
>>> amdgpu_ring_write(ring, addr);
>>> amdgpu_ring_write(ring, upper_32_bits(addr));
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
>>> index bf3385280d3f..dc60c8753752 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
>>> @@ -446,8 +446,6 @@ static void uvd_v4_2_stop(struct amdgpu_device *adev)
>>> static void uvd_v4_2_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
>>> unsigned flags)
>>> {
>>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>>> -
>>> amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
>>> amdgpu_ring_write(ring, seq);
>>> amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
>>> index 3210a7bd9a6d..86234178d440 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
>>> @@ -462,8 +462,6 @@ static void uvd_v5_0_stop(struct amdgpu_device *adev)
>>> static void uvd_v5_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
>>> unsigned flags)
>>> {
>>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>>> -
>>> amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
>>> amdgpu_ring_write(ring, seq);
>>> amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
>>> index c61a314c56cc..486fa743c594 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
>>> @@ -882,8 +882,6 @@ static void uvd_v6_0_stop(struct amdgpu_device *adev)
>>> static void uvd_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
>>> unsigned flags)
>>> {
>>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>>> -
>>> amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
>>> amdgpu_ring_write(ring, seq);
>>> amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
>>> @@ -912,8 +910,6 @@ static void uvd_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
>>> static void uvd_v6_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
>>> u64 seq, unsigned flags)
>>> {
>>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>>> -
>>> amdgpu_ring_write(ring, HEVC_ENC_CMD_FENCE);
>>> amdgpu_ring_write(ring, addr);
>>> amdgpu_ring_write(ring, upper_32_bits(addr));
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>>> index cdb96d4cb424..18bec3605a80 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>>> @@ -1143,8 +1143,6 @@ static void uvd_v7_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
>>> {
>>> struct amdgpu_device *adev = ring->adev;
>>>
>>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>>> -
>>> amdgpu_ring_write(ring,
>>> PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_CONTEXT_ID), 0));
>>> amdgpu_ring_write(ring, seq);
>>> @@ -1180,9 +1178,6 @@ static void uvd_v7_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
>>> static void uvd_v7_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
>>> u64 seq, unsigned flags)
>>> {
>>> -
>>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>>> -
>>> amdgpu_ring_write(ring, HEVC_ENC_CMD_FENCE);
>>> amdgpu_ring_write(ring, addr);
>>> amdgpu_ring_write(ring, upper_32_bits(addr));
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
>>> index e267b073f525..06544f728085 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
>>> @@ -963,8 +963,6 @@ static void vce_v4_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *j
>>> static void vce_v4_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
>>> u64 seq, unsigned flags)
>>> {
>>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>>> -
>>> amdgpu_ring_write(ring, VCE_CMD_FENCE);
>>> amdgpu_ring_write(ring, addr);
>>> amdgpu_ring_write(ring, upper_32_bits(addr));
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
>>> index ac2e5a1eb576..b00bd45bc258 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
>>> @@ -1334,8 +1334,6 @@ static void vcn_v1_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64
>>> {
>>> struct amdgpu_device *adev = ring->adev;
>>>
>>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>>> -
>>> amdgpu_ring_write(ring,
>>> PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0));
>>> amdgpu_ring_write(ring, seq);
>>> @@ -1506,8 +1504,6 @@ static void vcn_v1_0_enc_ring_set_wptr(struct amdgpu_ring *ring)
>>> static void vcn_v1_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
>>> u64 seq, unsigned flags)
>>> {
>>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>>> -
>>> amdgpu_ring_write(ring, VCN_ENC_CMD_FENCE);
>>> amdgpu_ring_write(ring, addr);
>>> amdgpu_ring_write(ring, upper_32_bits(addr));
>>> @@ -1666,8 +1662,6 @@ static void vcn_v1_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u6
>>> {
>>> struct amdgpu_device *adev = ring->adev;
>>>
>>> - WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>>> -
>>> amdgpu_ring_write(ring,
>>> PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_JPEG_GPCOM_DATA0), 0, 0, PACKETJ_TYPE0));
>>> amdgpu_ring_write(ring, seq);
>>> --
>>> 2.17.1
>>>
>>> _______________________________________________
>>> amd-gfx mailing list
>>> amd-gfx@lists.freedesktop.org
>>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-05-09 7:13 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-05-08 15:51 [PATCH 1/6] drm/amdgpu: add no_user_fence flag to ring funcs Liu, Leo
[not found] ` <20190508155100.7810-1-leo.liu-5C7GfCeVMHo@public.gmane.org>
2019-05-08 15:51 ` [PATCH 2/6] drm/amdgpu/UVD: set no_user_fence flag to true Liu, Leo
2019-05-08 15:51 ` [PATCH 3/6] drm/amdgpu/VCE: " Liu, Leo
2019-05-08 15:51 ` [PATCH 4/6] drm/amdgpu/VCN: " Liu, Leo
2019-05-08 15:51 ` [PATCH 5/6] drm/amdgpu: check no_user_fence flag for engines Liu, Leo
2019-05-08 15:51 ` [PATCH 6/6] drm/amdgpu: remove MM engine related WARN_ON for user fence Liu, Leo
[not found] ` <20190508155100.7810-6-leo.liu-5C7GfCeVMHo@public.gmane.org>
2019-05-08 17:45 ` Alex Deucher
[not found] ` <CADnq5_P7Aa=YhxLNi4Wt8y_cTJmiW8OhPgcpDn5hzyiY4e4WYg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2019-05-08 19:02 ` Liu, Leo
[not found] ` <4c83931c-4752-be8b-cca7-9b0cc12cc9dc-5C7GfCeVMHo@public.gmane.org>
2019-05-09 7:13 ` Christian König
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