[PATCH v2 1/2] drm/i915/perf: use the lrc_desc to get the ctx hw id in gen8-10

[PATCH v2 1/2] drm/i915/perf: use the lrc_desc to get the ctx hw id in gen8-10

[Michel Thierry]

The upper 32 bits of the lrc_desc (bits 52-32 to be precise) are the
context hw id in GEN8-10, so use them and have one less thing to
maintain in the unlikely case we change the descriptor sw fields.

v2: If we use the lrc_desc, we must apply the ctx_id_mask too (Lionel)

Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_perf.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index a6c8d61add0c..6aba30cb40ea 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1279,9 +1279,12 @@ static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
 			i915->perf.oa.specific_ctx_id_mask =
 				(1U << (GEN8_CTX_ID_WIDTH - 1)) - 1;
 		} else {
-			i915->perf.oa.specific_ctx_id = stream->ctx->hw_id;
 			i915->perf.oa.specific_ctx_id_mask =
 				(1U << GEN8_CTX_ID_WIDTH) - 1;
+			i915->perf.oa.specific_ctx_id =
+				upper_32_bits(ce->lrc_desc);
+			i915->perf.oa.specific_ctx_id &=
+				i915->perf.oa.specific_ctx_id_mask;
 		}
 		break;
 
-- 
2.17.1

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[PATCH v3 2/2] drm/i915/perf: fix gen11 engine class shift

[Michel Thierry]

Use the correct engine class shift value while storing the ctx hw id.
Fixes the copy+paste error from commit 61d5676b5561 ("drm/i915/perf: fix
ctx_id read with GuC & ICL").

Apologies for not spotting this in the original review, the
specific_ctx_id_mask is correct, only the specific_ctx_id had this
problem.

v2: Just use the upper 32 bits of lrc_desc (Chris)
v3: If we use the lrc_desc, we must apply the ctx_id_mask too (Lionel)

Fixes: 61d5676b5561 ("drm/i915/perf: fix ctx_id read with GuC & ICL")
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_perf.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 6aba30cb40ea..881a992305ec 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1289,16 +1289,13 @@ static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
 		break;
 
 	case 11: {
-		struct intel_engine_cs *engine = i915->engine[RCS];
-
-		i915->perf.oa.specific_ctx_id =
-			stream->ctx->hw_id << (GEN11_SW_CTX_ID_SHIFT - 32) |
-			engine->instance << (GEN11_ENGINE_INSTANCE_SHIFT - 32) |
-			engine->class << (GEN11_ENGINE_INSTANCE_SHIFT - 32);
 		i915->perf.oa.specific_ctx_id_mask =
 			((1U << GEN11_SW_CTX_ID_WIDTH) - 1) << (GEN11_SW_CTX_ID_SHIFT - 32) |
 			((1U << GEN11_ENGINE_INSTANCE_WIDTH) - 1) << (GEN11_ENGINE_INSTANCE_SHIFT - 32) |
 			((1 << GEN11_ENGINE_CLASS_WIDTH) - 1) << (GEN11_ENGINE_CLASS_SHIFT - 32);
+		i915->perf.oa.specific_ctx_id = upper_32_bits(ce->lrc_desc);
+		i915->perf.oa.specific_ctx_id &=
+			i915->perf.oa.specific_ctx_id_mask;
 		break;
 	}
 
-- 
2.17.1

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Re: [PATCH v2 1/2] drm/i915/perf: use the lrc_desc to get the ctx hw id in gen8-10

[Lionel Landwerlin]

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

On 05/06/18 00:32, Michel Thierry wrote:
> The upper 32 bits of the lrc_desc (bits 52-32 to be precise) are the
> context hw id in GEN8-10, so use them and have one less thing to
> maintain in the unlikely case we change the descriptor sw fields.
>
> v2: If we use the lrc_desc, we must apply the ctx_id_mask too (Lionel)
>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   drivers/gpu/drm/i915/i915_perf.c | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index a6c8d61add0c..6aba30cb40ea 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -1279,9 +1279,12 @@ static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
>   			i915->perf.oa.specific_ctx_id_mask =
>   				(1U << (GEN8_CTX_ID_WIDTH - 1)) - 1;
>   		} else {
> -			i915->perf.oa.specific_ctx_id = stream->ctx->hw_id;
>   			i915->perf.oa.specific_ctx_id_mask =
>   				(1U << GEN8_CTX_ID_WIDTH) - 1;
> +			i915->perf.oa.specific_ctx_id =
> +				upper_32_bits(ce->lrc_desc);
> +			i915->perf.oa.specific_ctx_id &=
> +				i915->perf.oa.specific_ctx_id_mask;
>   		}
>   		break;
>   


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Re: [PATCH v3 2/2] drm/i915/perf: fix gen11 engine class shift

[Lionel Landwerlin]

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

On 05/06/18 00:32, Michel Thierry wrote:
> Use the correct engine class shift value while storing the ctx hw id.
> Fixes the copy+paste error from commit 61d5676b5561 ("drm/i915/perf: fix
> ctx_id read with GuC & ICL").
>
> Apologies for not spotting this in the original review, the
> specific_ctx_id_mask is correct, only the specific_ctx_id had this
> problem.
>
> v2: Just use the upper 32 bits of lrc_desc (Chris)
> v3: If we use the lrc_desc, we must apply the ctx_id_mask too (Lionel)
>
> Fixes: 61d5676b5561 ("drm/i915/perf: fix ctx_id read with GuC & ICL")
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   drivers/gpu/drm/i915/i915_perf.c | 9 +++------
>   1 file changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 6aba30cb40ea..881a992305ec 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -1289,16 +1289,13 @@ static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
>   		break;
>   
>   	case 11: {
> -		struct intel_engine_cs *engine = i915->engine[RCS];
> -
> -		i915->perf.oa.specific_ctx_id =
> -			stream->ctx->hw_id << (GEN11_SW_CTX_ID_SHIFT - 32) |
> -			engine->instance << (GEN11_ENGINE_INSTANCE_SHIFT - 32) |
> -			engine->class << (GEN11_ENGINE_INSTANCE_SHIFT - 32);
>   		i915->perf.oa.specific_ctx_id_mask =
>   			((1U << GEN11_SW_CTX_ID_WIDTH) - 1) << (GEN11_SW_CTX_ID_SHIFT - 32) |
>   			((1U << GEN11_ENGINE_INSTANCE_WIDTH) - 1) << (GEN11_ENGINE_INSTANCE_SHIFT - 32) |
>   			((1 << GEN11_ENGINE_CLASS_WIDTH) - 1) << (GEN11_ENGINE_CLASS_SHIFT - 32);
> +		i915->perf.oa.specific_ctx_id = upper_32_bits(ce->lrc_desc);
> +		i915->perf.oa.specific_ctx_id &=
> +			i915->perf.oa.specific_ctx_id_mask;
>   		break;
>   	}
>   


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✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/perf: use the lrc_desc to get the ctx hw id in gen8-10

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/2] drm/i915/perf: use the lrc_desc to get the ctx hw id in gen8-10
URL   : https://patchwork.freedesktop.org/series/44235/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4277 -> Patchwork_9190 =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_9190 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_9190, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/44235/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_9190:

  === IGT changes ===

    ==== Warnings ====

    igt@gem_exec_gttfill@basic:
      fi-pnv-d510:        SKIP -> PASS

    
== Known issues ==

  Here are the changes found in Patchwork_9190 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_ctx_switch@basic-default-heavy:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#105719) +1

    igt@kms_chamelium@hdmi-hpd-fast:
      fi-kbl-7500u:       SKIP -> FAIL (fdo#103841, fdo#102672)

    igt@kms_flip@basic-flip-vs-wf_vblank:
      fi-glk-j4005:       PASS -> FAIL (fdo#100368)

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102672 https://bugs.freedesktop.org/show_bug.cgi?id=102672
  fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
  fdo#105719 https://bugs.freedesktop.org/show_bug.cgi?id=105719


== Participating hosts (42 -> 37) ==

  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-skl-6700hq fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4277 -> Patchwork_9190

  CI_DRM_4277: 2309ca0c3ab113e1e760045e230576e0ab4a88e2 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4505: 8a8f0271a71e2e0d2a2caa4d41f4ad1d9c89670e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9190: 5660d731a7afec226ea069f51135c8fbd62580f1 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

5660d731a7af drm/i915/perf: fix gen11 engine class shift
78309d432d43 drm/i915/perf: use the lrc_desc to get the ctx hw id in gen8-10

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9190/issues.html
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✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/perf: use the lrc_desc to get the ctx hw id in gen8-10

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/2] drm/i915/perf: use the lrc_desc to get the ctx hw id in gen8-10
URL   : https://patchwork.freedesktop.org/series/44235/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4277_full -> Patchwork_9190_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_9190_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_9190_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/44235/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_9190_full:

  === IGT changes ===

    ==== Warnings ====

    igt@gem_exec_schedule@deep-bsd2:
      shard-kbl:          SKIP -> PASS

    igt@gem_mocs_settings@mocs-rc6-vebox:
      shard-kbl:          PASS -> SKIP

    
== Known issues ==

  Here are the changes found in Patchwork_9190_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_flip@2x-dpms-vs-vblank-race:
      shard-hsw:          PASS -> FAIL (fdo#103060)

    igt@kms_flip@2x-flip-vs-expired-vblank:
      shard-glk:          PASS -> FAIL (fdo#105189)

    igt@kms_flip_tiling@flip-x-tiled:
      shard-glk:          PASS -> FAIL (fdo#104724, fdo#103822) +2

    
    ==== Possible fixes ====

    igt@drv_selftest@live_gtt:
      shard-glk:          INCOMPLETE (fdo#103359, k.org#198133) -> PASS

    igt@gem_eio@hibernate:
      shard-snb:          INCOMPLETE (fdo#105411) -> PASS

    igt@kms_flip@2x-plain-flip-ts-check:
      shard-hsw:          FAIL (fdo#100368) -> PASS

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-glk:          FAIL (fdo#102887, fdo#105363) -> PASS

    igt@kms_setmode@basic:
      shard-kbl:          FAIL (fdo#99912) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
  fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
  fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822
  fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
  fdo#105189 https://bugs.freedesktop.org/show_bug.cgi?id=105189
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
  k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4277 -> Patchwork_9190

  CI_DRM_4277: 2309ca0c3ab113e1e760045e230576e0ab4a88e2 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4505: 8a8f0271a71e2e0d2a2caa4d41f4ad1d9c89670e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9190: 5660d731a7afec226ea069f51135c8fbd62580f1 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9190/shards.html
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Re: [PATCH v2 1/2] drm/i915/perf: use the lrc_desc to get the ctx hw id in gen8-10

[Lionel Landwerlin]

Thanks Michel, both patches pushed.

-
Lionel

On 05/06/18 00:32, Michel Thierry wrote:
> The upper 32 bits of the lrc_desc (bits 52-32 to be precise) are the
> context hw id in GEN8-10, so use them and have one less thing to
> maintain in the unlikely case we change the descriptor sw fields.
>
> v2: If we use the lrc_desc, we must apply the ctx_id_mask too (Lionel)
>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   drivers/gpu/drm/i915/i915_perf.c | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index a6c8d61add0c..6aba30cb40ea 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -1279,9 +1279,12 @@ static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
>   			i915->perf.oa.specific_ctx_id_mask =
>   				(1U << (GEN8_CTX_ID_WIDTH - 1)) - 1;
>   		} else {
> -			i915->perf.oa.specific_ctx_id = stream->ctx->hw_id;
>   			i915->perf.oa.specific_ctx_id_mask =
>   				(1U << GEN8_CTX_ID_WIDTH) - 1;
> +			i915->perf.oa.specific_ctx_id =
> +				upper_32_bits(ce->lrc_desc);
> +			i915->perf.oa.specific_ctx_id &=
> +				i915->perf.oa.specific_ctx_id_mask;
>   		}
>   		break;
>   


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