* [PATCH 1/3] drm/amdgpu: add DID for navi10 blockchain SKU
@ 2020-10-21 7:56 Tianci Yin
2020-10-21 7:56 ` [PATCH 2/3] drm/amdgpu: disable DCN " Tianci Yin
` (2 more replies)
0 siblings, 3 replies; 12+ messages in thread
From: Tianci Yin @ 2020-10-21 7:56 UTC (permalink / raw)
To: amd-gfx
Cc: Long Gang, Guchun Chen, Feifei Xu, Tianci Yin, Tuikov Luben,
Deucher Alexander, Flora Cui, Hawking Zhang
From: "Tianci.Yin" <tianci.yin@amd.com>
Change-Id: I58129e3aa88369c85929e4dde002cf43c3ff288a
Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 564336c2ee66..13723914fa9f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -1066,6 +1066,7 @@ static const struct pci_device_id pciidlist[] = {
{0x1002, 0x7319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
{0x1002, 0x731A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
{0x1002, 0x731B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
+ {0x1002, 0x731E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
{0x1002, 0x731F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
/* Navi14 */
{0x1002, 0x7340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
--
2.17.1
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/3] drm/amdgpu: disable DCN for navi10 blockchain SKU
2020-10-21 7:56 [PATCH 1/3] drm/amdgpu: add DID for navi10 blockchain SKU Tianci Yin
@ 2020-10-21 7:56 ` Tianci Yin
2020-10-21 12:59 ` Alex Deucher
2020-10-21 17:40 ` Luben Tuikov
2020-10-21 7:56 ` [PATCH 3/3] drm/amdgpu: disable VCN " Tianci Yin
2020-10-21 8:01 ` [PATCH 1/3] drm/amdgpu: add DID " Chen, Guchun
2 siblings, 2 replies; 12+ messages in thread
From: Tianci Yin @ 2020-10-21 7:56 UTC (permalink / raw)
To: amd-gfx
Cc: Long Gang, Guchun Chen, Feifei Xu, Tianci Yin, Tuikov Luben,
Deucher Alexander, Flora Cui, Hawking Zhang
From: "Tianci.Yin" <tianci.yin@amd.com>
The blockchain SKU has no display support, so the DCN ip
block should be disabled. Add DID/RID as display
supporting dependence, it potentially disable DCN block.
Change-Id: Ia83bef1499708dfd0113fe2dbb3eb4143452c1cd
Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 20 +++++++++++++++++---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
4 files changed, 20 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f8f3e375c93e..04e906386b5b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1051,7 +1051,7 @@ void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
u32 pcie_index, u32 pcie_data,
u32 reg_addr, u64 reg_data);
-bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
+bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type, struct pci_dev *pdev);
bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
int emu_soc_asic_init(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index c567f20b9d1f..fa522cffdd64 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2958,11 +2958,12 @@ static void amdgpu_device_detect_sriov_bios(struct amdgpu_device *adev)
* amdgpu_device_asic_has_dc_support - determine if DC supports the asic
*
* @asic_type: AMD asic type
+ * @pdev: pointer of pci_dev instance
*
* Check if there is DC (new modesetting infrastructre) support for an asic.
* returns true if DC has support, false if not.
*/
-bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
+bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type, struct pci_dev *pdev)
{
switch (asic_type) {
#if defined(CONFIG_DRM_AMD_DC)
@@ -2998,7 +2999,6 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
case CHIP_VEGA20:
#if defined(CONFIG_DRM_AMD_DC_DCN)
case CHIP_RAVEN:
- case CHIP_NAVI10:
case CHIP_NAVI14:
case CHIP_NAVI12:
case CHIP_RENOIR:
@@ -3011,6 +3011,20 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
#endif
return amdgpu_dc != 0;
#endif
+#if defined(CONFIG_DRM_AMD_DC_DCN)
+ case CHIP_NAVI10:
+ if (pdev->device == 0x731E &&
+ (pdev->revision == 0xC6 ||
+ pdev->revision == 0xC7)) {
+ DRM_INFO("(%s 0x%04X:0x%04X 0x%04X:0x%04X 0x%02X) has no dc support.\n",
+ amdgpu_asic_name[asic_type], pdev->vendor, pdev->device,
+ pdev->subsystem_vendor, pdev->subsystem_device, pdev->revision);
+ return false;
+ } else {
+ return amdgpu_dc != 0;
+ }
+#endif
+
default:
if (amdgpu_dc > 0)
DRM_INFO("Display Core has been requested via kernel parameter "
@@ -3031,7 +3045,7 @@ bool amdgpu_device_has_dc_support(struct amdgpu_device *adev)
if (amdgpu_sriov_vf(adev) || adev->enable_virtual_display)
return false;
- return amdgpu_device_asic_has_dc_support(adev->asic_type);
+ return amdgpu_device_asic_has_dc_support(adev->asic_type, adev->pdev);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 9e92d2a070ac..97014458d7de 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -516,7 +516,7 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
*/
if ((bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
amdgpu_bo_support_uswc(bo_flags) &&
- amdgpu_device_asic_has_dc_support(adev->asic_type)) {
+ amdgpu_device_asic_has_dc_support(adev->asic_type, adev->pdev)) {
switch (adev->asic_type) {
case CHIP_CARRIZO:
case CHIP_STONEY:
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 13723914fa9f..97fda825e0d3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -1109,7 +1109,7 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
bool supports_atomic = false;
if (!amdgpu_virtual_display &&
- amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK))
+ amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK, pdev))
supports_atomic = true;
if ((flags & AMD_EXP_HW_SUPPORT) && !amdgpu_exp_hw_support) {
--
2.17.1
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/3] drm/amdgpu: disable VCN for navi10 blockchain SKU
2020-10-21 7:56 [PATCH 1/3] drm/amdgpu: add DID for navi10 blockchain SKU Tianci Yin
2020-10-21 7:56 ` [PATCH 2/3] drm/amdgpu: disable DCN " Tianci Yin
@ 2020-10-21 7:56 ` Tianci Yin
2020-10-21 17:44 ` Luben Tuikov
2020-10-21 8:01 ` [PATCH 1/3] drm/amdgpu: add DID " Chen, Guchun
2 siblings, 1 reply; 12+ messages in thread
From: Tianci Yin @ 2020-10-21 7:56 UTC (permalink / raw)
To: amd-gfx
Cc: Long Gang, Guchun Chen, Feifei Xu, Tianci Yin, Tuikov Luben,
Deucher Alexander, Flora Cui, Hawking Zhang
From: "Tianci.Yin" <tianci.yin@amd.com>
The blockchain SKU has no VCN support, remove it.
Change-Id: I26fbdabdf67aada24c5aebef999ee8b5f9c0bfe2
Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
---
drivers/gpu/drm/amd/amdgpu/nv.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index ce787489aaeb..ffe4c2b3ea5f 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -538,7 +538,10 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT &&
!amdgpu_sriov_vf(adev))
amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
- amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block);
+ if (adev->pdev->device != 0x731E ||
+ (adev->pdev->revision != 0xC6 &&
+ adev->pdev->revision != 0xC7))
+ amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block);
amdgpu_device_ip_block_add(adev, &jpeg_v2_0_ip_block);
if (adev->enable_mes)
amdgpu_device_ip_block_add(adev, &mes_v10_1_ip_block);
--
2.17.1
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* RE: [PATCH 1/3] drm/amdgpu: add DID for navi10 blockchain SKU
2020-10-21 7:56 [PATCH 1/3] drm/amdgpu: add DID for navi10 blockchain SKU Tianci Yin
2020-10-21 7:56 ` [PATCH 2/3] drm/amdgpu: disable DCN " Tianci Yin
2020-10-21 7:56 ` [PATCH 3/3] drm/amdgpu: disable VCN " Tianci Yin
@ 2020-10-21 8:01 ` Chen, Guchun
2020-10-21 8:18 ` Yin, Tianci (Rico)
2 siblings, 1 reply; 12+ messages in thread
From: Chen, Guchun @ 2020-10-21 8:01 UTC (permalink / raw)
To: Yin, Tianci (Rico), amd-gfx
Cc: Long, Gang, Xu, Feifei, Yin, Tianci (Rico),
Tuikov, Luben, Deucher, Alexander, Cui, Flora, Zhang, Hawking
[AMD Public Use]
Series is: Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Regards,
Guchun
-----Original Message-----
From: Tianci Yin <tianci.yin@amd.com>
Sent: Wednesday, October 21, 2020 3:56 PM
To: amd-gfx@lists.freedesktop.org
Cc: Tuikov, Luben <Luben.Tuikov@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Chen, Guchun <Guchun.Chen@amd.com>; Cui, Flora <Flora.Cui@amd.com>; Xu, Feifei <Feifei.Xu@amd.com>; Long, Gang <Gang.Long@amd.com>; Yin, Tianci (Rico) <Tianci.Yin@amd.com>
Subject: [PATCH 1/3] drm/amdgpu: add DID for navi10 blockchain SKU
From: "Tianci.Yin" <tianci.yin@amd.com>
Change-Id: I58129e3aa88369c85929e4dde002cf43c3ff288a
Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 564336c2ee66..13723914fa9f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -1066,6 +1066,7 @@ static const struct pci_device_id pciidlist[] = {
{0x1002, 0x7319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
{0x1002, 0x731A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
{0x1002, 0x731B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
+ {0x1002, 0x731E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
{0x1002, 0x731F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
/* Navi14 */
{0x1002, 0x7340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 1/3] drm/amdgpu: add DID for navi10 blockchain SKU
2020-10-21 8:01 ` [PATCH 1/3] drm/amdgpu: add DID " Chen, Guchun
@ 2020-10-21 8:18 ` Yin, Tianci (Rico)
0 siblings, 0 replies; 12+ messages in thread
From: Yin, Tianci (Rico) @ 2020-10-21 8:18 UTC (permalink / raw)
To: Chen, Guchun, amd-gfx
Cc: Long, Gang, Xu, Feifei, Tuikov, Luben, Deucher, Alexander, Cui,
Flora, Zhang, Hawking
[-- Attachment #1.1: Type: text/plain, Size: 2218 bytes --]
[AMD Public Use]
Thanks Guchun!
________________________________
From: Chen, Guchun <Guchun.Chen@amd.com>
Sent: Wednesday, October 21, 2020 16:01
To: Yin, Tianci (Rico) <Tianci.Yin@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Tuikov, Luben <Luben.Tuikov@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Cui, Flora <Flora.Cui@amd.com>; Xu, Feifei <Feifei.Xu@amd.com>; Long, Gang <Gang.Long@amd.com>; Yin, Tianci (Rico) <Tianci.Yin@amd.com>
Subject: RE: [PATCH 1/3] drm/amdgpu: add DID for navi10 blockchain SKU
[AMD Public Use]
Series is: Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Regards,
Guchun
-----Original Message-----
From: Tianci Yin <tianci.yin@amd.com>
Sent: Wednesday, October 21, 2020 3:56 PM
To: amd-gfx@lists.freedesktop.org
Cc: Tuikov, Luben <Luben.Tuikov@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Chen, Guchun <Guchun.Chen@amd.com>; Cui, Flora <Flora.Cui@amd.com>; Xu, Feifei <Feifei.Xu@amd.com>; Long, Gang <Gang.Long@amd.com>; Yin, Tianci (Rico) <Tianci.Yin@amd.com>
Subject: [PATCH 1/3] drm/amdgpu: add DID for navi10 blockchain SKU
From: "Tianci.Yin" <tianci.yin@amd.com>
Change-Id: I58129e3aa88369c85929e4dde002cf43c3ff288a
Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 564336c2ee66..13723914fa9f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -1066,6 +1066,7 @@ static const struct pci_device_id pciidlist[] = {
{0x1002, 0x7319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
{0x1002, 0x731A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
{0x1002, 0x731B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
+ {0x1002, 0x731E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
{0x1002, 0x731F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
/* Navi14 */
{0x1002, 0x7340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
--
2.17.1
[-- Attachment #1.2: Type: text/html, Size: 3614 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 2/3] drm/amdgpu: disable DCN for navi10 blockchain SKU
2020-10-21 7:56 ` [PATCH 2/3] drm/amdgpu: disable DCN " Tianci Yin
@ 2020-10-21 12:59 ` Alex Deucher
2020-10-21 17:40 ` Luben Tuikov
1 sibling, 0 replies; 12+ messages in thread
From: Alex Deucher @ 2020-10-21 12:59 UTC (permalink / raw)
To: Tianci Yin
Cc: Long Gang, Guchun Chen, Feifei Xu, amd-gfx list, Tuikov Luben,
Deucher Alexander, Flora Cui, Hawking Zhang
On Wed, Oct 21, 2020 at 3:56 AM Tianci Yin <tianci.yin@amd.com> wrote:
>
> From: "Tianci.Yin" <tianci.yin@amd.com>
>
> The blockchain SKU has no display support, so the DCN ip
> block should be disabled. Add DID/RID as display
> supporting dependence, it potentially disable DCN block.
Wouldn't it be cleaner to just not add the DCN block like you did in patch 3?
Alex
>
> Change-Id: Ia83bef1499708dfd0113fe2dbb3eb4143452c1cd
> Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 20 +++++++++++++++++---
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
> 4 files changed, 20 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index f8f3e375c93e..04e906386b5b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1051,7 +1051,7 @@ void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
> u32 pcie_index, u32 pcie_data,
> u32 reg_addr, u64 reg_data);
>
> -bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
> +bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type, struct pci_dev *pdev);
> bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
>
> int emu_soc_asic_init(struct amdgpu_device *adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index c567f20b9d1f..fa522cffdd64 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -2958,11 +2958,12 @@ static void amdgpu_device_detect_sriov_bios(struct amdgpu_device *adev)
> * amdgpu_device_asic_has_dc_support - determine if DC supports the asic
> *
> * @asic_type: AMD asic type
> + * @pdev: pointer of pci_dev instance
> *
> * Check if there is DC (new modesetting infrastructre) support for an asic.
> * returns true if DC has support, false if not.
> */
> -bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
> +bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type, struct pci_dev *pdev)
> {
> switch (asic_type) {
> #if defined(CONFIG_DRM_AMD_DC)
> @@ -2998,7 +2999,6 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
> case CHIP_VEGA20:
> #if defined(CONFIG_DRM_AMD_DC_DCN)
> case CHIP_RAVEN:
> - case CHIP_NAVI10:
> case CHIP_NAVI14:
> case CHIP_NAVI12:
> case CHIP_RENOIR:
> @@ -3011,6 +3011,20 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
> #endif
> return amdgpu_dc != 0;
> #endif
> +#if defined(CONFIG_DRM_AMD_DC_DCN)
> + case CHIP_NAVI10:
> + if (pdev->device == 0x731E &&
> + (pdev->revision == 0xC6 ||
> + pdev->revision == 0xC7)) {
> + DRM_INFO("(%s 0x%04X:0x%04X 0x%04X:0x%04X 0x%02X) has no dc support.\n",
> + amdgpu_asic_name[asic_type], pdev->vendor, pdev->device,
> + pdev->subsystem_vendor, pdev->subsystem_device, pdev->revision);
> + return false;
> + } else {
> + return amdgpu_dc != 0;
> + }
> +#endif
> +
> default:
> if (amdgpu_dc > 0)
> DRM_INFO("Display Core has been requested via kernel parameter "
> @@ -3031,7 +3045,7 @@ bool amdgpu_device_has_dc_support(struct amdgpu_device *adev)
> if (amdgpu_sriov_vf(adev) || adev->enable_virtual_display)
> return false;
>
> - return amdgpu_device_asic_has_dc_support(adev->asic_type);
> + return amdgpu_device_asic_has_dc_support(adev->asic_type, adev->pdev);
> }
>
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index 9e92d2a070ac..97014458d7de 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -516,7 +516,7 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
> */
> if ((bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
> amdgpu_bo_support_uswc(bo_flags) &&
> - amdgpu_device_asic_has_dc_support(adev->asic_type)) {
> + amdgpu_device_asic_has_dc_support(adev->asic_type, adev->pdev)) {
> switch (adev->asic_type) {
> case CHIP_CARRIZO:
> case CHIP_STONEY:
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 13723914fa9f..97fda825e0d3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -1109,7 +1109,7 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
> bool supports_atomic = false;
>
> if (!amdgpu_virtual_display &&
> - amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK))
> + amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK, pdev))
> supports_atomic = true;
>
> if ((flags & AMD_EXP_HW_SUPPORT) && !amdgpu_exp_hw_support) {
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/3] drm/amdgpu: disable DCN for navi10 blockchain SKU
2020-10-21 7:56 ` [PATCH 2/3] drm/amdgpu: disable DCN " Tianci Yin
2020-10-21 12:59 ` Alex Deucher
@ 2020-10-21 17:40 ` Luben Tuikov
2020-10-22 3:07 ` Yin, Tianci (Rico)
1 sibling, 1 reply; 12+ messages in thread
From: Luben Tuikov @ 2020-10-21 17:40 UTC (permalink / raw)
To: Tianci Yin, amd-gfx
Cc: Long Gang, Guchun Chen, Feifei Xu, Deucher Alexander, Flora Cui,
Hawking Zhang
On 2020-10-21 03:56, Tianci Yin wrote:
> From: "Tianci.Yin" <tianci.yin@amd.com>
>
> The blockchain SKU has no display support, so the DCN ip
"DCN IP" to stand for Intellectual Property.
> block should be disabled. Add DID/RID as display
> supporting dependence, it potentially disable DCN block.
>
> Change-Id: Ia83bef1499708dfd0113fe2dbb3eb4143452c1cd
> Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 20 +++++++++++++++++---
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
> 4 files changed, 20 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index f8f3e375c93e..04e906386b5b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1051,7 +1051,7 @@ void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
> u32 pcie_index, u32 pcie_data,
> u32 reg_addr, u64 reg_data);
>
> -bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
> +bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type, struct pci_dev *pdev);
> bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
>
> int emu_soc_asic_init(struct amdgpu_device *adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index c567f20b9d1f..fa522cffdd64 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -2958,11 +2958,12 @@ static void amdgpu_device_detect_sriov_bios(struct amdgpu_device *adev)
> * amdgpu_device_asic_has_dc_support - determine if DC supports the asic
> *
> * @asic_type: AMD asic type
> + * @pdev: pointer of pci_dev instance
"pointer to ... instance", or,
"pointer of ... type".
> *
> * Check if there is DC (new modesetting infrastructre) support for an asic.
> * returns true if DC has support, false if not.
> */
> -bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
> +bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type, struct pci_dev *pdev)
> {
> switch (asic_type) {
> #if defined(CONFIG_DRM_AMD_DC)
> @@ -2998,7 +2999,6 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
> case CHIP_VEGA20:
> #if defined(CONFIG_DRM_AMD_DC_DCN)
> case CHIP_RAVEN:
> - case CHIP_NAVI10:
> case CHIP_NAVI14:
> case CHIP_NAVI12:
> case CHIP_RENOIR:
> @@ -3011,6 +3011,20 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
> #endif
> return amdgpu_dc != 0;
> #endif
> +#if defined(CONFIG_DRM_AMD_DC_DCN)
> + case CHIP_NAVI10:
> + if (pdev->device == 0x731E &&
> + (pdev->revision == 0xC6 ||
> + pdev->revision == 0xC7)) {
> + DRM_INFO("(%s 0x%04X:0x%04X 0x%04X:0x%04X 0x%02X) has no dc support.\n",
> + amdgpu_asic_name[asic_type], pdev->vendor, pdev->device,
> + pdev->subsystem_vendor, pdev->subsystem_device, pdev->revision);
> + return false;
> + } else {
> + return amdgpu_dc != 0;
> + }
> +#endif
> +
Why not leave the placing of the original CHIP_NAVI10 label,
and add the if () under it, and drop the "else { ..."?
Regards,
Luben
> default:
> if (amdgpu_dc > 0)
> DRM_INFO("Display Core has been requested via kernel parameter "
> @@ -3031,7 +3045,7 @@ bool amdgpu_device_has_dc_support(struct amdgpu_device *adev)
> if (amdgpu_sriov_vf(adev) || adev->enable_virtual_display)
> return false;
>
> - return amdgpu_device_asic_has_dc_support(adev->asic_type);
> + return amdgpu_device_asic_has_dc_support(adev->asic_type, adev->pdev);
> }
>
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index 9e92d2a070ac..97014458d7de 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -516,7 +516,7 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
> */
> if ((bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
> amdgpu_bo_support_uswc(bo_flags) &&
> - amdgpu_device_asic_has_dc_support(adev->asic_type)) {
> + amdgpu_device_asic_has_dc_support(adev->asic_type, adev->pdev)) {
> switch (adev->asic_type) {
> case CHIP_CARRIZO:
> case CHIP_STONEY:
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 13723914fa9f..97fda825e0d3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -1109,7 +1109,7 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
> bool supports_atomic = false;
>
> if (!amdgpu_virtual_display &&
> - amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK))
> + amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK, pdev))
> supports_atomic = true;
>
> if ((flags & AMD_EXP_HW_SUPPORT) && !amdgpu_exp_hw_support) {
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/3] drm/amdgpu: disable VCN for navi10 blockchain SKU
2020-10-21 7:56 ` [PATCH 3/3] drm/amdgpu: disable VCN " Tianci Yin
@ 2020-10-21 17:44 ` Luben Tuikov
0 siblings, 0 replies; 12+ messages in thread
From: Luben Tuikov @ 2020-10-21 17:44 UTC (permalink / raw)
To: Tianci Yin, amd-gfx
Cc: Long Gang, Guchun Chen, Feifei Xu, Deucher Alexander, Flora Cui,
Hawking Zhang
On 2020-10-21 03:56, Tianci Yin wrote:
> From: "Tianci.Yin" <tianci.yin@amd.com>
>
> The blockchain SKU has no VCN support, remove it.
>
> Change-Id: I26fbdabdf67aada24c5aebef999ee8b5f9c0bfe2
> Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/nv.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
> index ce787489aaeb..ffe4c2b3ea5f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nv.c
> @@ -538,7 +538,10 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
> if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT &&
> !amdgpu_sriov_vf(adev))
> amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block);
> + if (adev->pdev->device != 0x731E ||
> + (adev->pdev->revision != 0xC6 &&
> + adev->pdev->revision != 0xC7))
> + amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block);
It would be much easier to read and understand this conditional,
if you'd copy the conditional you have in patch 2, and add
an inversion to the front:
if (!(device is block-chain SKU))
add IP block header vcn2;
And you'd maintain similarity to an already introduced conditional,
for instance of someone is doing a search through the code.
Regards,
Luben
> amdgpu_device_ip_block_add(adev, &jpeg_v2_0_ip_block);
> if (adev->enable_mes)
> amdgpu_device_ip_block_add(adev, &mes_v10_1_ip_block);
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/3] drm/amdgpu: disable DCN for navi10 blockchain SKU
2020-10-21 17:40 ` Luben Tuikov
@ 2020-10-22 3:07 ` Yin, Tianci (Rico)
0 siblings, 0 replies; 12+ messages in thread
From: Yin, Tianci (Rico) @ 2020-10-22 3:07 UTC (permalink / raw)
To: Tuikov, Luben, amd-gfx
Cc: Long, Gang, Chen, Guchun, Xu, Feifei, Deucher, Alexander, Cui,
Flora, Zhang, Hawking
[-- Attachment #1.1: Type: text/plain, Size: 6242 bytes --]
[AMD Official Use Only - Internal Distribution Only]
Thanks very much Alex and Luben!
I refine the patches, please review again.
Rico
________________________________
From: Tuikov, Luben <Luben.Tuikov@amd.com>
Sent: Thursday, October 22, 2020 1:40
To: Yin, Tianci (Rico) <Tianci.Yin@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Chen, Guchun <Guchun.Chen@amd.com>; Cui, Flora <Flora.Cui@amd.com>; Xu, Feifei <Feifei.Xu@amd.com>; Long, Gang <Gang.Long@amd.com>
Subject: Re: [PATCH 2/3] drm/amdgpu: disable DCN for navi10 blockchain SKU
On 2020-10-21 03:56, Tianci Yin wrote:
> From: "Tianci.Yin" <tianci.yin@amd.com>
>
> The blockchain SKU has no display support, so the DCN ip
"DCN IP" to stand for Intellectual Property.
> block should be disabled. Add DID/RID as display
> supporting dependence, it potentially disable DCN block.
>
> Change-Id: Ia83bef1499708dfd0113fe2dbb3eb4143452c1cd
> Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 20 +++++++++++++++++---
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
> 4 files changed, 20 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index f8f3e375c93e..04e906386b5b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1051,7 +1051,7 @@ void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
> u32 pcie_index, u32 pcie_data,
> u32 reg_addr, u64 reg_data);
>
> -bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
> +bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type, struct pci_dev *pdev);
> bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
>
> int emu_soc_asic_init(struct amdgpu_device *adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index c567f20b9d1f..fa522cffdd64 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -2958,11 +2958,12 @@ static void amdgpu_device_detect_sriov_bios(struct amdgpu_device *adev)
> * amdgpu_device_asic_has_dc_support - determine if DC supports the asic
> *
> * @asic_type: AMD asic type
> + * @pdev: pointer of pci_dev instance
"pointer to ... instance", or,
"pointer of ... type".
> *
> * Check if there is DC (new modesetting infrastructre) support for an asic.
> * returns true if DC has support, false if not.
> */
> -bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
> +bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type, struct pci_dev *pdev)
> {
> switch (asic_type) {
> #if defined(CONFIG_DRM_AMD_DC)
> @@ -2998,7 +2999,6 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
> case CHIP_VEGA20:
> #if defined(CONFIG_DRM_AMD_DC_DCN)
> case CHIP_RAVEN:
> - case CHIP_NAVI10:
> case CHIP_NAVI14:
> case CHIP_NAVI12:
> case CHIP_RENOIR:
> @@ -3011,6 +3011,20 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
> #endif
> return amdgpu_dc != 0;
> #endif
> +#if defined(CONFIG_DRM_AMD_DC_DCN)
> + case CHIP_NAVI10:
> + if (pdev->device == 0x731E &&
> + (pdev->revision == 0xC6 ||
> + pdev->revision == 0xC7)) {
> + DRM_INFO("(%s 0x%04X:0x%04X 0x%04X:0x%04X 0x%02X) has no dc support.\n",
> + amdgpu_asic_name[asic_type], pdev->vendor, pdev->device,
> + pdev->subsystem_vendor, pdev->subsystem_device, pdev->revision);
> + return false;
> + } else {
> + return amdgpu_dc != 0;
> + }
> +#endif
> +
Why not leave the placing of the original CHIP_NAVI10 label,
and add the if () under it, and drop the "else { ..."?
Regards,
Luben
> default:
> if (amdgpu_dc > 0)
> DRM_INFO("Display Core has been requested via kernel parameter "
> @@ -3031,7 +3045,7 @@ bool amdgpu_device_has_dc_support(struct amdgpu_device *adev)
> if (amdgpu_sriov_vf(adev) || adev->enable_virtual_display)
> return false;
>
> - return amdgpu_device_asic_has_dc_support(adev->asic_type);
> + return amdgpu_device_asic_has_dc_support(adev->asic_type, adev->pdev);
> }
>
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index 9e92d2a070ac..97014458d7de 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -516,7 +516,7 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
> */
> if ((bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
> amdgpu_bo_support_uswc(bo_flags) &&
> - amdgpu_device_asic_has_dc_support(adev->asic_type)) {
> + amdgpu_device_asic_has_dc_support(adev->asic_type, adev->pdev)) {
> switch (adev->asic_type) {
> case CHIP_CARRIZO:
> case CHIP_STONEY:
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 13723914fa9f..97fda825e0d3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -1109,7 +1109,7 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
> bool supports_atomic = false;
>
> if (!amdgpu_virtual_display &&
> - amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK))
> + amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK, pdev))
> supports_atomic = true;
>
> if ((flags & AMD_EXP_HW_SUPPORT) && !amdgpu_exp_hw_support) {
>
[-- Attachment #1.2: Type: text/html, Size: 11433 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/3] drm/amdgpu: disable DCN for navi10 blockchain SKU
2020-10-22 3:16 ` Alex Deucher
@ 2020-10-22 3:31 ` Yin, Tianci (Rico)
0 siblings, 0 replies; 12+ messages in thread
From: Yin, Tianci (Rico) @ 2020-10-22 3:31 UTC (permalink / raw)
To: Alex Deucher
Cc: Long, Gang, Chen, Guchun, Xu, Feifei, amd-gfx list, Tuikov,
Luben, Deucher, Alexander, Cui, Flora, Zhang, Hawking
[-- Attachment #1.1: Type: text/plain, Size: 7916 bytes --]
[AMD Official Use Only - Internal Distribution Only]
Hi Alex,
Sorry, I misunderstand your meaning, I will refine it.
Thanks!
Rico
________________________________
From: Alex Deucher <alexdeucher@gmail.com>
Sent: Thursday, October 22, 2020 11:16
To: Yin, Tianci (Rico) <Tianci.Yin@amd.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Long, Gang <Gang.Long@amd.com>; Chen, Guchun <Guchun.Chen@amd.com>; Xu, Feifei <Feifei.Xu@amd.com>; Tuikov, Luben <Luben.Tuikov@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Cui, Flora <Flora.Cui@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>
Subject: Re: [PATCH 2/3] drm/amdgpu: disable DCN for navi10 blockchain SKU
On Wed, Oct 21, 2020 at 11:04 PM Tianci Yin <tianci.yin@amd.com> wrote:
>
> From: "Tianci.Yin" <tianci.yin@amd.com>
>
> The blockchain SKU has no display support, remove it.
>
> Change-Id: Ia83bef1499708dfd0113fe2dbb3eb4143452c1cd
> Reviewed-by: Guchun Chen <guchun.chen@amd.com>
> Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 ++-
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 28 +++++++++++++++++++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
> 4 files changed, 30 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index f8f3e375c93e..3c63fb8904de 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1051,7 +1051,8 @@ void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
> u32 pcie_index, u32 pcie_data,
> u32 reg_addr, u64 reg_data);
>
> -bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
> +bool amdgpu_device_asic_is_blockchain_sku(struct pci_dev *pdev);
> +bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type, struct pci_dev *pdev);
> bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
>
> int emu_soc_asic_init(struct amdgpu_device *adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index c567f20b9d1f..5dd05e72ed9e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -2954,15 +2954,32 @@ static void amdgpu_device_detect_sriov_bios(struct amdgpu_device *adev)
> }
> }
>
> +/**
> + * amdgpu_device_asic_is_blockchain_sku - determine if the asic is blockchain
> + * SKU
> + *
> + * @pdev: pointer to pci_dev instance
> + *
> + * returns true if the asic is blockchain SKU, false if not.
> + */
> +bool amdgpu_device_asic_is_blockchain_sku(struct pci_dev *pdev)
> +{
> + if (pdev->device == 0x731E &&
> + (pdev->revision == 0xC6 || pdev->revision == 0xC7))
> + return true;
> + return false;
> +}
I don't think this makes sense to have a navi specific function in
amdgpu_device.c. Also, I said said previously, wouldn't it be easier
to just check in nv.c? E.g.,
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 1ce741a0c6a7..e661e796fb4c 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -483,8 +483,12 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
#if defined(CONFIG_DRM_AMD_DC)
- else if (amdgpu_device_has_dc_support(adev))
- amdgpu_device_ip_block_add(adev, &dm_ip_block);
+ else if (amdgpu_device_has_dc_support(adev)) {
+ if (adev->pdev->device != 0x731E ||
+ (adev->pdev->revision != 0xC6 &&
+ adev->pdev->revision != 0xC7))
+ amdgpu_device_ip_block_add(adev, &dm_ip_block);
+ }
#endif
amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
amdgpu_device_ip_block_add(adev, &sdma_v5_0_ip_block);
> +
> /**
> * amdgpu_device_asic_has_dc_support - determine if DC supports the asic
> *
> * @asic_type: AMD asic type
> + * @pdev: pointer to pci_dev instance
> *
> * Check if there is DC (new modesetting infrastructre) support for an asic.
> * returns true if DC has support, false if not.
> */
> -bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
> +bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type, struct pci_dev *pdev)
> {
> switch (asic_type) {
> #if defined(CONFIG_DRM_AMD_DC)
> @@ -2999,6 +3016,13 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
> #if defined(CONFIG_DRM_AMD_DC_DCN)
> case CHIP_RAVEN:
> case CHIP_NAVI10:
> + if (amdgpu_device_asic_is_blockchain_sku(pdev)) {
> + DRM_INFO("(%s 0x%04X:0x%04X 0x%04X:0x%04X 0x%02X) has no dc support.\n",
> + amdgpu_asic_name[asic_type], pdev->vendor, pdev->device,
> + pdev->subsystem_vendor, pdev->subsystem_device, pdev->revision);
> + return false;
> + }
> + return amdgpu_dc != 0;
> case CHIP_NAVI14:
> case CHIP_NAVI12:
> case CHIP_RENOIR:
> @@ -3031,7 +3055,7 @@ bool amdgpu_device_has_dc_support(struct amdgpu_device *adev)
> if (amdgpu_sriov_vf(adev) || adev->enable_virtual_display)
> return false;
>
> - return amdgpu_device_asic_has_dc_support(adev->asic_type);
> + return amdgpu_device_asic_has_dc_support(adev->asic_type, adev->pdev);
> }
>
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index 9e92d2a070ac..97014458d7de 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -516,7 +516,7 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
> */
> if ((bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
> amdgpu_bo_support_uswc(bo_flags) &&
> - amdgpu_device_asic_has_dc_support(adev->asic_type)) {
> + amdgpu_device_asic_has_dc_support(adev->asic_type, adev->pdev)) {
> switch (adev->asic_type) {
> case CHIP_CARRIZO:
> case CHIP_STONEY:
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 13723914fa9f..97fda825e0d3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -1109,7 +1109,7 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
> bool supports_atomic = false;
>
> if (!amdgpu_virtual_display &&
> - amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK))
> + amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK, pdev))
> supports_atomic = true;
>
> if ((flags & AMD_EXP_HW_SUPPORT) && !amdgpu_exp_hw_support) {
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7Ctianci.yin%40amd.com%7C8677b036e861492f653808d87638e56d%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637389334030603034%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=SnaKO7Xvvtrgqn%2BxmqQDomL%2B1gUW3GmKiIFWGyUS3jI%3D&reserved=0
[-- Attachment #1.2: Type: text/html, Size: 14944 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 2/3] drm/amdgpu: disable DCN for navi10 blockchain SKU
2020-10-22 3:04 ` [PATCH 2/3] drm/amdgpu: disable DCN " Tianci Yin
@ 2020-10-22 3:16 ` Alex Deucher
2020-10-22 3:31 ` Yin, Tianci (Rico)
0 siblings, 1 reply; 12+ messages in thread
From: Alex Deucher @ 2020-10-22 3:16 UTC (permalink / raw)
To: Tianci Yin
Cc: Long Gang, Guchun Chen, Feifei Xu, amd-gfx list, Tuikov Luben,
Deucher Alexander, Flora Cui, Hawking Zhang
On Wed, Oct 21, 2020 at 11:04 PM Tianci Yin <tianci.yin@amd.com> wrote:
>
> From: "Tianci.Yin" <tianci.yin@amd.com>
>
> The blockchain SKU has no display support, remove it.
>
> Change-Id: Ia83bef1499708dfd0113fe2dbb3eb4143452c1cd
> Reviewed-by: Guchun Chen <guchun.chen@amd.com>
> Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 ++-
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 28 +++++++++++++++++++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
> 4 files changed, 30 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index f8f3e375c93e..3c63fb8904de 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1051,7 +1051,8 @@ void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
> u32 pcie_index, u32 pcie_data,
> u32 reg_addr, u64 reg_data);
>
> -bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
> +bool amdgpu_device_asic_is_blockchain_sku(struct pci_dev *pdev);
> +bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type, struct pci_dev *pdev);
> bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
>
> int emu_soc_asic_init(struct amdgpu_device *adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index c567f20b9d1f..5dd05e72ed9e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -2954,15 +2954,32 @@ static void amdgpu_device_detect_sriov_bios(struct amdgpu_device *adev)
> }
> }
>
> +/**
> + * amdgpu_device_asic_is_blockchain_sku - determine if the asic is blockchain
> + * SKU
> + *
> + * @pdev: pointer to pci_dev instance
> + *
> + * returns true if the asic is blockchain SKU, false if not.
> + */
> +bool amdgpu_device_asic_is_blockchain_sku(struct pci_dev *pdev)
> +{
> + if (pdev->device == 0x731E &&
> + (pdev->revision == 0xC6 || pdev->revision == 0xC7))
> + return true;
> + return false;
> +}
I don't think this makes sense to have a navi specific function in
amdgpu_device.c. Also, I said said previously, wouldn't it be easier
to just check in nv.c? E.g.,
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 1ce741a0c6a7..e661e796fb4c 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -483,8 +483,12 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
#if defined(CONFIG_DRM_AMD_DC)
- else if (amdgpu_device_has_dc_support(adev))
- amdgpu_device_ip_block_add(adev, &dm_ip_block);
+ else if (amdgpu_device_has_dc_support(adev)) {
+ if (adev->pdev->device != 0x731E ||
+ (adev->pdev->revision != 0xC6 &&
+ adev->pdev->revision != 0xC7))
+ amdgpu_device_ip_block_add(adev, &dm_ip_block);
+ }
#endif
amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
amdgpu_device_ip_block_add(adev, &sdma_v5_0_ip_block);
> +
> /**
> * amdgpu_device_asic_has_dc_support - determine if DC supports the asic
> *
> * @asic_type: AMD asic type
> + * @pdev: pointer to pci_dev instance
> *
> * Check if there is DC (new modesetting infrastructre) support for an asic.
> * returns true if DC has support, false if not.
> */
> -bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
> +bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type, struct pci_dev *pdev)
> {
> switch (asic_type) {
> #if defined(CONFIG_DRM_AMD_DC)
> @@ -2999,6 +3016,13 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
> #if defined(CONFIG_DRM_AMD_DC_DCN)
> case CHIP_RAVEN:
> case CHIP_NAVI10:
> + if (amdgpu_device_asic_is_blockchain_sku(pdev)) {
> + DRM_INFO("(%s 0x%04X:0x%04X 0x%04X:0x%04X 0x%02X) has no dc support.\n",
> + amdgpu_asic_name[asic_type], pdev->vendor, pdev->device,
> + pdev->subsystem_vendor, pdev->subsystem_device, pdev->revision);
> + return false;
> + }
> + return amdgpu_dc != 0;
> case CHIP_NAVI14:
> case CHIP_NAVI12:
> case CHIP_RENOIR:
> @@ -3031,7 +3055,7 @@ bool amdgpu_device_has_dc_support(struct amdgpu_device *adev)
> if (amdgpu_sriov_vf(adev) || adev->enable_virtual_display)
> return false;
>
> - return amdgpu_device_asic_has_dc_support(adev->asic_type);
> + return amdgpu_device_asic_has_dc_support(adev->asic_type, adev->pdev);
> }
>
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index 9e92d2a070ac..97014458d7de 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -516,7 +516,7 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
> */
> if ((bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
> amdgpu_bo_support_uswc(bo_flags) &&
> - amdgpu_device_asic_has_dc_support(adev->asic_type)) {
> + amdgpu_device_asic_has_dc_support(adev->asic_type, adev->pdev)) {
> switch (adev->asic_type) {
> case CHIP_CARRIZO:
> case CHIP_STONEY:
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 13723914fa9f..97fda825e0d3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -1109,7 +1109,7 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
> bool supports_atomic = false;
>
> if (!amdgpu_virtual_display &&
> - amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK))
> + amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK, pdev))
> supports_atomic = true;
>
> if ((flags & AMD_EXP_HW_SUPPORT) && !amdgpu_exp_hw_support) {
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/3] drm/amdgpu: disable DCN for navi10 blockchain SKU
2020-10-22 3:04 Tianci Yin
@ 2020-10-22 3:04 ` Tianci Yin
2020-10-22 3:16 ` Alex Deucher
0 siblings, 1 reply; 12+ messages in thread
From: Tianci Yin @ 2020-10-22 3:04 UTC (permalink / raw)
To: amd-gfx
Cc: Long Gang, Guchun Chen, Feifei Xu, Tianci Yin, Tuikov Luben,
Deucher Alexander, Flora Cui, Hawking Zhang
From: "Tianci.Yin" <tianci.yin@amd.com>
The blockchain SKU has no display support, remove it.
Change-Id: Ia83bef1499708dfd0113fe2dbb3eb4143452c1cd
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 28 +++++++++++++++++++--
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
4 files changed, 30 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f8f3e375c93e..3c63fb8904de 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1051,7 +1051,8 @@ void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
u32 pcie_index, u32 pcie_data,
u32 reg_addr, u64 reg_data);
-bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
+bool amdgpu_device_asic_is_blockchain_sku(struct pci_dev *pdev);
+bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type, struct pci_dev *pdev);
bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
int emu_soc_asic_init(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index c567f20b9d1f..5dd05e72ed9e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2954,15 +2954,32 @@ static void amdgpu_device_detect_sriov_bios(struct amdgpu_device *adev)
}
}
+/**
+ * amdgpu_device_asic_is_blockchain_sku - determine if the asic is blockchain
+ * SKU
+ *
+ * @pdev: pointer to pci_dev instance
+ *
+ * returns true if the asic is blockchain SKU, false if not.
+ */
+bool amdgpu_device_asic_is_blockchain_sku(struct pci_dev *pdev)
+{
+ if (pdev->device == 0x731E &&
+ (pdev->revision == 0xC6 || pdev->revision == 0xC7))
+ return true;
+ return false;
+}
+
/**
* amdgpu_device_asic_has_dc_support - determine if DC supports the asic
*
* @asic_type: AMD asic type
+ * @pdev: pointer to pci_dev instance
*
* Check if there is DC (new modesetting infrastructre) support for an asic.
* returns true if DC has support, false if not.
*/
-bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
+bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type, struct pci_dev *pdev)
{
switch (asic_type) {
#if defined(CONFIG_DRM_AMD_DC)
@@ -2999,6 +3016,13 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
#if defined(CONFIG_DRM_AMD_DC_DCN)
case CHIP_RAVEN:
case CHIP_NAVI10:
+ if (amdgpu_device_asic_is_blockchain_sku(pdev)) {
+ DRM_INFO("(%s 0x%04X:0x%04X 0x%04X:0x%04X 0x%02X) has no dc support.\n",
+ amdgpu_asic_name[asic_type], pdev->vendor, pdev->device,
+ pdev->subsystem_vendor, pdev->subsystem_device, pdev->revision);
+ return false;
+ }
+ return amdgpu_dc != 0;
case CHIP_NAVI14:
case CHIP_NAVI12:
case CHIP_RENOIR:
@@ -3031,7 +3055,7 @@ bool amdgpu_device_has_dc_support(struct amdgpu_device *adev)
if (amdgpu_sriov_vf(adev) || adev->enable_virtual_display)
return false;
- return amdgpu_device_asic_has_dc_support(adev->asic_type);
+ return amdgpu_device_asic_has_dc_support(adev->asic_type, adev->pdev);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 9e92d2a070ac..97014458d7de 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -516,7 +516,7 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
*/
if ((bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
amdgpu_bo_support_uswc(bo_flags) &&
- amdgpu_device_asic_has_dc_support(adev->asic_type)) {
+ amdgpu_device_asic_has_dc_support(adev->asic_type, adev->pdev)) {
switch (adev->asic_type) {
case CHIP_CARRIZO:
case CHIP_STONEY:
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 13723914fa9f..97fda825e0d3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -1109,7 +1109,7 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
bool supports_atomic = false;
if (!amdgpu_virtual_display &&
- amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK))
+ amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK, pdev))
supports_atomic = true;
if ((flags & AMD_EXP_HW_SUPPORT) && !amdgpu_exp_hw_support) {
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2020-10-22 3:31 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-21 7:56 [PATCH 1/3] drm/amdgpu: add DID for navi10 blockchain SKU Tianci Yin
2020-10-21 7:56 ` [PATCH 2/3] drm/amdgpu: disable DCN " Tianci Yin
2020-10-21 12:59 ` Alex Deucher
2020-10-21 17:40 ` Luben Tuikov
2020-10-22 3:07 ` Yin, Tianci (Rico)
2020-10-21 7:56 ` [PATCH 3/3] drm/amdgpu: disable VCN " Tianci Yin
2020-10-21 17:44 ` Luben Tuikov
2020-10-21 8:01 ` [PATCH 1/3] drm/amdgpu: add DID " Chen, Guchun
2020-10-21 8:18 ` Yin, Tianci (Rico)
2020-10-22 3:04 Tianci Yin
2020-10-22 3:04 ` [PATCH 2/3] drm/amdgpu: disable DCN " Tianci Yin
2020-10-22 3:16 ` Alex Deucher
2020-10-22 3:31 ` Yin, Tianci (Rico)
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