* [PATCH v2] ASoC: qcom: soundwire: Enable soundwire bus clock for version 1.6
@ 2021-10-05 14:14 ` Srinivasa Rao Mandadapu
0 siblings, 0 replies; 6+ messages in thread
From: Srinivasa Rao Mandadapu @ 2021-10-05 14:14 UTC (permalink / raw)
To: agross, bjorn.andersson, lgirdwood, broonie, robh+dt, plai,
bgoswami, perex, tiwai, srinivas.kandagatla, rohitkr,
linux-arm-msm, alsa-devel, devicetree, linux-kernel, swboyd,
judyhsiao
Cc: Srinivasa Rao Mandadapu, Venkata Prasad Potturu
Add support for soundwire 1.6 version to gate RX/TX bus clock.
Signed-off-by: Venkata Prasad Potturu <potturu@codeaurora.org>
Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
---
Changes since v1:
-- Add const name to mask value.
drivers/soundwire/qcom.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c
index 0ef79d6..491407f 100644
--- a/drivers/soundwire/qcom.c
+++ b/drivers/soundwire/qcom.c
@@ -109,6 +109,7 @@
#define SWR_MAX_CMD_ID 14
#define MAX_FIFO_RD_RETRY 3
#define SWR_OVERFLOW_RETRY_COUNT 30
+#define SWRM_HCTL_REG_MASK 0xFFFFFFFD
struct qcom_swrm_port_config {
u8 si;
@@ -127,6 +128,7 @@ struct qcom_swrm_ctrl {
struct device *dev;
struct regmap *regmap;
void __iomem *mmio;
+ char __iomem *swrm_hctl_reg;
struct completion broadcast;
struct completion enumeration;
struct work_struct slave_work;
@@ -610,6 +612,12 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index);
val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index);
+ if (ctrl->swrm_hctl_reg) {
+ val = ioread32(ctrl->swrm_hctl_reg);
+ val &= SWRM_HCTL_REG_MASK;
+ iowrite32(val, ctrl->swrm_hctl_reg);
+ }
+
ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val);
/* Enable Auto enumeration */
@@ -1200,7 +1208,7 @@ static int qcom_swrm_probe(struct platform_device *pdev)
struct qcom_swrm_ctrl *ctrl;
const struct qcom_swrm_data *data;
int ret;
- u32 val;
+ int val, swrm_hctl_reg = 0;
ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
if (!ctrl)
@@ -1251,6 +1259,9 @@ static int qcom_swrm_probe(struct platform_device *pdev)
ctrl->bus.port_ops = &qcom_swrm_port_ops;
ctrl->bus.compute_params = &qcom_swrm_compute_params;
+ if (!of_property_read_u32(dev->of_node, "qcom,swrm-hctl-reg", &swrm_hctl_reg))
+ ctrl->swrm_hctl_reg = devm_ioremap(&pdev->dev, swrm_hctl_reg, 0x4);
+
ret = qcom_swrm_get_port_config(ctrl);
if (ret)
goto err_clk;
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2] ASoC: qcom: soundwire: Enable soundwire bus clock for version 1.6
@ 2021-10-05 14:14 ` Srinivasa Rao Mandadapu
0 siblings, 0 replies; 6+ messages in thread
From: Srinivasa Rao Mandadapu @ 2021-10-05 14:14 UTC (permalink / raw)
To: agross, bjorn.andersson, lgirdwood, broonie, robh+dt, plai,
bgoswami, perex, tiwai, srinivas.kandagatla, rohitkr,
linux-arm-msm, alsa-devel, devicetree, linux-kernel, swboyd,
judyhsiao
Cc: Venkata Prasad Potturu, Srinivasa Rao Mandadapu
Add support for soundwire 1.6 version to gate RX/TX bus clock.
Signed-off-by: Venkata Prasad Potturu <potturu@codeaurora.org>
Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
---
Changes since v1:
-- Add const name to mask value.
drivers/soundwire/qcom.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c
index 0ef79d6..491407f 100644
--- a/drivers/soundwire/qcom.c
+++ b/drivers/soundwire/qcom.c
@@ -109,6 +109,7 @@
#define SWR_MAX_CMD_ID 14
#define MAX_FIFO_RD_RETRY 3
#define SWR_OVERFLOW_RETRY_COUNT 30
+#define SWRM_HCTL_REG_MASK 0xFFFFFFFD
struct qcom_swrm_port_config {
u8 si;
@@ -127,6 +128,7 @@ struct qcom_swrm_ctrl {
struct device *dev;
struct regmap *regmap;
void __iomem *mmio;
+ char __iomem *swrm_hctl_reg;
struct completion broadcast;
struct completion enumeration;
struct work_struct slave_work;
@@ -610,6 +612,12 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index);
val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index);
+ if (ctrl->swrm_hctl_reg) {
+ val = ioread32(ctrl->swrm_hctl_reg);
+ val &= SWRM_HCTL_REG_MASK;
+ iowrite32(val, ctrl->swrm_hctl_reg);
+ }
+
ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val);
/* Enable Auto enumeration */
@@ -1200,7 +1208,7 @@ static int qcom_swrm_probe(struct platform_device *pdev)
struct qcom_swrm_ctrl *ctrl;
const struct qcom_swrm_data *data;
int ret;
- u32 val;
+ int val, swrm_hctl_reg = 0;
ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
if (!ctrl)
@@ -1251,6 +1259,9 @@ static int qcom_swrm_probe(struct platform_device *pdev)
ctrl->bus.port_ops = &qcom_swrm_port_ops;
ctrl->bus.compute_params = &qcom_swrm_compute_params;
+ if (!of_property_read_u32(dev->of_node, "qcom,swrm-hctl-reg", &swrm_hctl_reg))
+ ctrl->swrm_hctl_reg = devm_ioremap(&pdev->dev, swrm_hctl_reg, 0x4);
+
ret = qcom_swrm_get_port_config(ctrl);
if (ret)
goto err_clk;
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2] ASoC: qcom: soundwire: Enable soundwire bus clock for version 1.6
2021-10-05 14:14 ` Srinivasa Rao Mandadapu
@ 2021-10-08 13:30 ` Mark Brown
-1 siblings, 0 replies; 6+ messages in thread
From: Mark Brown @ 2021-10-08 13:30 UTC (permalink / raw)
To: Srinivasa Rao Mandadapu
Cc: agross, bjorn.andersson, lgirdwood, robh+dt, plai, bgoswami,
perex, tiwai, srinivas.kandagatla, rohitkr, linux-arm-msm,
alsa-devel, devicetree, linux-kernel, swboyd, judyhsiao,
Venkata Prasad Potturu
[-- Attachment #1: Type: text/plain, Size: 293 bytes --]
On Tue, Oct 05, 2021 at 07:44:45PM +0530, Srinivasa Rao Mandadapu wrote:
> + if (!of_property_read_u32(dev->of_node, "qcom,swrm-hctl-reg", &swrm_hctl_reg))
> + ctrl->swrm_hctl_reg = devm_ioremap(&pdev->dev, swrm_hctl_reg, 0x4);
This is a new DT property so needs an update to the bindings.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] ASoC: qcom: soundwire: Enable soundwire bus clock for version 1.6
@ 2021-10-08 13:30 ` Mark Brown
0 siblings, 0 replies; 6+ messages in thread
From: Mark Brown @ 2021-10-08 13:30 UTC (permalink / raw)
To: Srinivasa Rao Mandadapu
Cc: devicetree, alsa-devel, bgoswami, Venkata Prasad Potturu,
linux-arm-msm, plai, tiwai, lgirdwood, robh+dt, bjorn.andersson,
agross, rohitkr, swboyd, judyhsiao, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 293 bytes --]
On Tue, Oct 05, 2021 at 07:44:45PM +0530, Srinivasa Rao Mandadapu wrote:
> + if (!of_property_read_u32(dev->of_node, "qcom,swrm-hctl-reg", &swrm_hctl_reg))
> + ctrl->swrm_hctl_reg = devm_ioremap(&pdev->dev, swrm_hctl_reg, 0x4);
This is a new DT property so needs an update to the bindings.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] ASoC: qcom: soundwire: Enable soundwire bus clock for version 1.6
2021-10-08 13:30 ` Mark Brown
@ 2021-10-26 11:15 ` Srinivasa Rao Mandadapu
-1 siblings, 0 replies; 6+ messages in thread
From: Srinivasa Rao Mandadapu @ 2021-10-26 11:15 UTC (permalink / raw)
To: Mark Brown
Cc: agross, bjorn.andersson, lgirdwood, robh+dt, plai, bgoswami,
perex, tiwai, srinivas.kandagatla, rohitkr, linux-arm-msm,
alsa-devel, devicetree, linux-kernel, swboyd, judyhsiao,
Venkata Prasad Potturu
On 10/8/2021 7:00 PM, Mark Brown wrote:
Thanks for Your time Brown!!!
> On Tue, Oct 05, 2021 at 07:44:45PM +0530, Srinivasa Rao Mandadapu wrote:
>
>> + if (!of_property_read_u32(dev->of_node, "qcom,swrm-hctl-reg", &swrm_hctl_reg))
>> + ctrl->swrm_hctl_reg = devm_ioremap(&pdev->dev, swrm_hctl_reg, 0x4);
> This is a new DT property so needs an update to the bindings.
Okay. Will update the bindings and re-post it.
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] ASoC: qcom: soundwire: Enable soundwire bus clock for version 1.6
@ 2021-10-26 11:15 ` Srinivasa Rao Mandadapu
0 siblings, 0 replies; 6+ messages in thread
From: Srinivasa Rao Mandadapu @ 2021-10-26 11:15 UTC (permalink / raw)
To: Mark Brown
Cc: devicetree, alsa-devel, bgoswami, Venkata Prasad Potturu,
linux-arm-msm, plai, tiwai, lgirdwood, robh+dt, bjorn.andersson,
agross, rohitkr, swboyd, judyhsiao, linux-kernel
On 10/8/2021 7:00 PM, Mark Brown wrote:
Thanks for Your time Brown!!!
> On Tue, Oct 05, 2021 at 07:44:45PM +0530, Srinivasa Rao Mandadapu wrote:
>
>> + if (!of_property_read_u32(dev->of_node, "qcom,swrm-hctl-reg", &swrm_hctl_reg))
>> + ctrl->swrm_hctl_reg = devm_ioremap(&pdev->dev, swrm_hctl_reg, 0x4);
> This is a new DT property so needs an update to the bindings.
Okay. Will update the bindings and re-post it.
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-10-26 11:16 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-05 14:14 [PATCH v2] ASoC: qcom: soundwire: Enable soundwire bus clock for version 1.6 Srinivasa Rao Mandadapu
2021-10-05 14:14 ` Srinivasa Rao Mandadapu
2021-10-08 13:30 ` Mark Brown
2021-10-08 13:30 ` Mark Brown
2021-10-26 11:15 ` Srinivasa Rao Mandadapu
2021-10-26 11:15 ` Srinivasa Rao Mandadapu
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.