* [PATCH 06/20] arm64: dts: Update cache properties for exynos
@ 2022-10-31 9:19 ` Pierre Gondois
0 siblings, 0 replies; 12+ messages in thread
From: Pierre Gondois @ 2022-10-31 9:19 UTC (permalink / raw)
To: linux-kernel
Cc: pierre.gondois, Rob.Herring, Rob Herring, Krzysztof Kozlowski,
Alim Akhtar, devicetree, linux-arm-kernel, linux-samsung-soc
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The recently added init_of_cache_level() function checks
these properties. Add them if missing.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 ++
arch/arm64/boot/dts/exynos/exynos7.dtsi | 1 +
2 files changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index bd6a354b9cb5..e9eda46801f8 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -229,6 +229,7 @@ cluster_a57_l2: l2-cache0 {
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
+ cache-level = <2>;
};
cluster_a53_l2: l2-cache1 {
@@ -236,6 +237,7 @@ cluster_a53_l2: l2-cache1 {
cache-size = <0x40000>;
cache-line-size = <64>;
cache-sets = <256>;
+ cache-level = <2>;
};
};
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index 1cd771c90b47..aca1c32a6411 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -110,6 +110,7 @@ atlas_l2: l2-cache0 {
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
+ cache-level = <2>;
};
};
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 06/20] arm64: dts: Update cache properties for exynos
@ 2022-10-31 9:19 ` Pierre Gondois
0 siblings, 0 replies; 12+ messages in thread
From: Pierre Gondois @ 2022-10-31 9:19 UTC (permalink / raw)
To: linux-kernel
Cc: pierre.gondois, Rob.Herring, Rob Herring, Krzysztof Kozlowski,
Alim Akhtar, devicetree, linux-arm-kernel, linux-samsung-soc
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The recently added init_of_cache_level() function checks
these properties. Add them if missing.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 ++
arch/arm64/boot/dts/exynos/exynos7.dtsi | 1 +
2 files changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index bd6a354b9cb5..e9eda46801f8 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -229,6 +229,7 @@ cluster_a57_l2: l2-cache0 {
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
+ cache-level = <2>;
};
cluster_a53_l2: l2-cache1 {
@@ -236,6 +237,7 @@ cluster_a53_l2: l2-cache1 {
cache-size = <0x40000>;
cache-line-size = <64>;
cache-sets = <256>;
+ cache-level = <2>;
};
};
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index 1cd771c90b47..aca1c32a6411 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -110,6 +110,7 @@ atlas_l2: l2-cache0 {
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
+ cache-level = <2>;
};
};
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: (subset) [PATCH 06/20] arm64: dts: Update cache properties for exynos
2022-10-31 9:19 ` Pierre Gondois
@ 2022-11-02 20:21 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2022-11-02 20:21 UTC (permalink / raw)
To: Pierre Gondois, linux-kernel
Cc: Krzysztof Kozlowski, linux-arm-kernel, Rob Herring, devicetree,
Alim Akhtar, Krzysztof Kozlowski, Rob.Herring, linux-samsung-soc
On Mon, 31 Oct 2022 10:19:45 +0100, Pierre Gondois wrote:
> The DeviceTree Specification v0.3 specifies that the cache node
> 'compatible' and 'cache-level' properties are 'required'. Cf.
> s3.8 Multi-level and Shared Cache Nodes
>
> The recently added init_of_cache_level() function checks
> these properties. Add them if missing.
>
> [...]
Applied, thanks!
[06/20] arm64: dts: Update cache properties for exynos
https://git.kernel.org/krzk/linux/c/58710ae94589a2b2baaab6b6986064b691124b0d
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: (subset) [PATCH 06/20] arm64: dts: Update cache properties for exynos
@ 2022-11-02 20:21 ` Krzysztof Kozlowski
0 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2022-11-02 20:21 UTC (permalink / raw)
To: Pierre Gondois, linux-kernel
Cc: Krzysztof Kozlowski, linux-arm-kernel, Rob Herring, devicetree,
Alim Akhtar, Krzysztof Kozlowski, Rob.Herring, linux-samsung-soc
On Mon, 31 Oct 2022 10:19:45 +0100, Pierre Gondois wrote:
> The DeviceTree Specification v0.3 specifies that the cache node
> 'compatible' and 'cache-level' properties are 'required'. Cf.
> s3.8 Multi-level and Shared Cache Nodes
>
> The recently added init_of_cache_level() function checks
> these properties. Add them if missing.
>
> [...]
Applied, thanks!
[06/20] arm64: dts: Update cache properties for exynos
https://git.kernel.org/krzk/linux/c/58710ae94589a2b2baaab6b6986064b691124b0d
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH 06/20] arm64: dts: Update cache properties for exynos
2022-10-31 9:19 ` Pierre Gondois
@ 2022-11-03 5:17 ` Alim Akhtar
-1 siblings, 0 replies; 12+ messages in thread
From: Alim Akhtar @ 2022-11-03 5:17 UTC (permalink / raw)
To: 'Pierre Gondois', linux-kernel
Cc: Rob.Herring, 'Rob Herring', 'Krzysztof Kozlowski',
devicetree, linux-arm-kernel, linux-samsung-soc
Hi Pierre
>-----Original Message-----
>From: Pierre Gondois [mailto:pierre.gondois@arm.com]
>Sent: Monday, October 31, 2022 2:50 PM
>To: linux-kernel@vger.kernel.org
>Cc: pierre.gondois@arm.com; Rob.Herring@arm.com; Rob Herring
><robh+dt@kernel.org>; Krzysztof Kozlowski
><krzysztof.kozlowski+dt@linaro.org>; Alim Akhtar
><alim.akhtar@samsung.com>; devicetree@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org; linux-samsung-soc@vger.kernel.org
>Subject: [PATCH 06/20] arm64: dts: Update cache properties for exynos
>
>The DeviceTree Specification v0.3 specifies that the cache node
'compatible'
>and 'cache-level' properties are 'required'. Cf.
>s3.8 Multi-level and Shared Cache Nodes
>
Not sure if this need to be documented in schema/yaml file as well or
already part of schema?
>The recently added init_of_cache_level() function checks these properties.
>Add them if missing.
>
>Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
>---
Changes looks good though.
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 ++
> arch/arm64/boot/dts/exynos/exynos7.dtsi | 1 +
> 2 files changed, 3 insertions(+)
>
>diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>index bd6a354b9cb5..e9eda46801f8 100644
>--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>@@ -229,6 +229,7 @@ cluster_a57_l2: l2-cache0 {
> cache-size = <0x200000>;
> cache-line-size = <64>;
> cache-sets = <2048>;
>+ cache-level = <2>;
> };
>
> cluster_a53_l2: l2-cache1 {
>@@ -236,6 +237,7 @@ cluster_a53_l2: l2-cache1 {
> cache-size = <0x40000>;
> cache-line-size = <64>;
> cache-sets = <256>;
>+ cache-level = <2>;
> };
> };
>
>diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi
>b/arch/arm64/boot/dts/exynos/exynos7.dtsi
>index 1cd771c90b47..aca1c32a6411 100644
>--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
>+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
>@@ -110,6 +110,7 @@ atlas_l2: l2-cache0 {
> cache-size = <0x200000>;
> cache-line-size = <64>;
> cache-sets = <2048>;
>+ cache-level = <2>;
> };
> };
>
>--
>2.25.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH 06/20] arm64: dts: Update cache properties for exynos
@ 2022-11-03 5:17 ` Alim Akhtar
0 siblings, 0 replies; 12+ messages in thread
From: Alim Akhtar @ 2022-11-03 5:17 UTC (permalink / raw)
To: 'Pierre Gondois', linux-kernel
Cc: Rob.Herring, 'Rob Herring', 'Krzysztof Kozlowski',
devicetree, linux-arm-kernel, linux-samsung-soc
Hi Pierre
>-----Original Message-----
>From: Pierre Gondois [mailto:pierre.gondois@arm.com]
>Sent: Monday, October 31, 2022 2:50 PM
>To: linux-kernel@vger.kernel.org
>Cc: pierre.gondois@arm.com; Rob.Herring@arm.com; Rob Herring
><robh+dt@kernel.org>; Krzysztof Kozlowski
><krzysztof.kozlowski+dt@linaro.org>; Alim Akhtar
><alim.akhtar@samsung.com>; devicetree@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org; linux-samsung-soc@vger.kernel.org
>Subject: [PATCH 06/20] arm64: dts: Update cache properties for exynos
>
>The DeviceTree Specification v0.3 specifies that the cache node
'compatible'
>and 'cache-level' properties are 'required'. Cf.
>s3.8 Multi-level and Shared Cache Nodes
>
Not sure if this need to be documented in schema/yaml file as well or
already part of schema?
>The recently added init_of_cache_level() function checks these properties.
>Add them if missing.
>
>Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
>---
Changes looks good though.
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 ++
> arch/arm64/boot/dts/exynos/exynos7.dtsi | 1 +
> 2 files changed, 3 insertions(+)
>
>diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>index bd6a354b9cb5..e9eda46801f8 100644
>--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>@@ -229,6 +229,7 @@ cluster_a57_l2: l2-cache0 {
> cache-size = <0x200000>;
> cache-line-size = <64>;
> cache-sets = <2048>;
>+ cache-level = <2>;
> };
>
> cluster_a53_l2: l2-cache1 {
>@@ -236,6 +237,7 @@ cluster_a53_l2: l2-cache1 {
> cache-size = <0x40000>;
> cache-line-size = <64>;
> cache-sets = <256>;
>+ cache-level = <2>;
> };
> };
>
>diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi
>b/arch/arm64/boot/dts/exynos/exynos7.dtsi
>index 1cd771c90b47..aca1c32a6411 100644
>--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
>+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
>@@ -110,6 +110,7 @@ atlas_l2: l2-cache0 {
> cache-size = <0x200000>;
> cache-line-size = <64>;
> cache-sets = <2048>;
>+ cache-level = <2>;
> };
> };
>
>--
>2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: (subset) [PATCH 06/20] arm64: dts: Update cache properties for exynos
2022-11-02 20:21 ` Krzysztof Kozlowski
@ 2022-11-07 18:13 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2022-11-07 18:13 UTC (permalink / raw)
To: Pierre Gondois, linux-kernel
Cc: linux-arm-kernel, Rob Herring, devicetree, Alim Akhtar,
Krzysztof Kozlowski, Rob.Herring, linux-samsung-soc
On 02/11/2022 21:21, Krzysztof Kozlowski wrote:
> On Mon, 31 Oct 2022 10:19:45 +0100, Pierre Gondois wrote:
>> The DeviceTree Specification v0.3 specifies that the cache node
>> 'compatible' and 'cache-level' properties are 'required'. Cf.
>> s3.8 Multi-level and Shared Cache Nodes
>>
>> The recently added init_of_cache_level() function checks
>> these properties. Add them if missing.
>>
>> [...]
>
> Applied, thanks!
>
> [06/20] arm64: dts: Update cache properties for exynos
> https://git.kernel.org/krzk/linux/c/58710ae94589a2b2baaab6b6986064b691124b0d
Now dropped. I understand this is the intention/request of v2.
When resending be sure to use proper subject prefixes.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: (subset) [PATCH 06/20] arm64: dts: Update cache properties for exynos
@ 2022-11-07 18:13 ` Krzysztof Kozlowski
0 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2022-11-07 18:13 UTC (permalink / raw)
To: Pierre Gondois, linux-kernel
Cc: linux-arm-kernel, Rob Herring, devicetree, Alim Akhtar,
Krzysztof Kozlowski, Rob.Herring, linux-samsung-soc
On 02/11/2022 21:21, Krzysztof Kozlowski wrote:
> On Mon, 31 Oct 2022 10:19:45 +0100, Pierre Gondois wrote:
>> The DeviceTree Specification v0.3 specifies that the cache node
>> 'compatible' and 'cache-level' properties are 'required'. Cf.
>> s3.8 Multi-level and Shared Cache Nodes
>>
>> The recently added init_of_cache_level() function checks
>> these properties. Add them if missing.
>>
>> [...]
>
> Applied, thanks!
>
> [06/20] arm64: dts: Update cache properties for exynos
> https://git.kernel.org/krzk/linux/c/58710ae94589a2b2baaab6b6986064b691124b0d
Now dropped. I understand this is the intention/request of v2.
When resending be sure to use proper subject prefixes.
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: (subset) [PATCH 06/20] arm64: dts: Update cache properties for exynos
2022-11-02 20:21 ` Krzysztof Kozlowski
@ 2022-11-22 16:52 ` Pierre Gondois
-1 siblings, 0 replies; 12+ messages in thread
From: Pierre Gondois @ 2022-11-22 16:52 UTC (permalink / raw)
To: Krzysztof Kozlowski, linux-kernel
Cc: linux-arm-kernel, Rob Herring, devicetree, Alim Akhtar,
Krzysztof Kozlowski, Rob.Herring, linux-samsung-soc
Hello Krzysztof,
This patch and [1] were dropped after a bad patch management from my part.
v1 and v2 are identical, but [2] lead to the 2 patches to be removed.
Not willing to worsen the situation, I wanted to wait a bit before getting
back to these 2 patches and let them be removed.
Would it be possible to take back these 2 patches ?
Regards,
Pierre
[1] https://lore.kernel.org/all/2d8b2d85-7bc6-026a-baf9-11a47171ddc5@linaro.org/
[2] https://lore.kernel.org/all/bb36df3f-5aee-256a-4d64-eaeb9bff998e@arm.com/
On 11/2/22 21:21, Krzysztof Kozlowski wrote:
> On Mon, 31 Oct 2022 10:19:45 +0100, Pierre Gondois wrote:
>> The DeviceTree Specification v0.3 specifies that the cache node
>> 'compatible' and 'cache-level' properties are 'required'. Cf.
>> s3.8 Multi-level and Shared Cache Nodes
>>
>> The recently added init_of_cache_level() function checks
>> these properties. Add them if missing.
>>
>> [...]
>
> Applied, thanks!
>
> [06/20] arm64: dts: Update cache properties for exynos
> https://git.kernel.org/krzk/linux/c/58710ae94589a2b2baaab6b6986064b691124b0d
>
> Best regards,
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: (subset) [PATCH 06/20] arm64: dts: Update cache properties for exynos
@ 2022-11-22 16:52 ` Pierre Gondois
0 siblings, 0 replies; 12+ messages in thread
From: Pierre Gondois @ 2022-11-22 16:52 UTC (permalink / raw)
To: Krzysztof Kozlowski, linux-kernel
Cc: linux-arm-kernel, Rob Herring, devicetree, Alim Akhtar,
Krzysztof Kozlowski, Rob.Herring, linux-samsung-soc
Hello Krzysztof,
This patch and [1] were dropped after a bad patch management from my part.
v1 and v2 are identical, but [2] lead to the 2 patches to be removed.
Not willing to worsen the situation, I wanted to wait a bit before getting
back to these 2 patches and let them be removed.
Would it be possible to take back these 2 patches ?
Regards,
Pierre
[1] https://lore.kernel.org/all/2d8b2d85-7bc6-026a-baf9-11a47171ddc5@linaro.org/
[2] https://lore.kernel.org/all/bb36df3f-5aee-256a-4d64-eaeb9bff998e@arm.com/
On 11/2/22 21:21, Krzysztof Kozlowski wrote:
> On Mon, 31 Oct 2022 10:19:45 +0100, Pierre Gondois wrote:
>> The DeviceTree Specification v0.3 specifies that the cache node
>> 'compatible' and 'cache-level' properties are 'required'. Cf.
>> s3.8 Multi-level and Shared Cache Nodes
>>
>> The recently added init_of_cache_level() function checks
>> these properties. Add them if missing.
>>
>> [...]
>
> Applied, thanks!
>
> [06/20] arm64: dts: Update cache properties for exynos
> https://git.kernel.org/krzk/linux/c/58710ae94589a2b2baaab6b6986064b691124b0d
>
> Best regards,
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: (subset) [PATCH 06/20] arm64: dts: Update cache properties for exynos
2022-11-22 16:52 ` Pierre Gondois
@ 2022-11-23 8:20 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2022-11-23 8:20 UTC (permalink / raw)
To: Pierre Gondois, linux-kernel
Cc: linux-arm-kernel, Rob Herring, devicetree, Alim Akhtar,
Krzysztof Kozlowski, Rob.Herring, linux-samsung-soc
On 22/11/2022 17:52, Pierre Gondois wrote:
> Hello Krzysztof,
>
> This patch and [1] were dropped after a bad patch management from my part.
> v1 and v2 are identical, but [2] lead to the 2 patches to be removed.
> Not willing to worsen the situation, I wanted to wait a bit before getting
> back to these 2 patches and let them be removed.
> Would it be possible to take back these 2 patches ?
>
> Regards,
> Pierre
>
> [1] https://lore.kernel.org/all/2d8b2d85-7bc6-026a-baf9-11a47171ddc5@linaro.org/
> [2] https://lore.kernel.org/all/bb36df3f-5aee-256a-4d64-eaeb9bff998e@arm.com/
>
I was expecting a resend with:
1. Fixed subject.
2. Changelog.
3. Trimmed list.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: (subset) [PATCH 06/20] arm64: dts: Update cache properties for exynos
@ 2022-11-23 8:20 ` Krzysztof Kozlowski
0 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2022-11-23 8:20 UTC (permalink / raw)
To: Pierre Gondois, linux-kernel
Cc: linux-arm-kernel, Rob Herring, devicetree, Alim Akhtar,
Krzysztof Kozlowski, Rob.Herring, linux-samsung-soc
On 22/11/2022 17:52, Pierre Gondois wrote:
> Hello Krzysztof,
>
> This patch and [1] were dropped after a bad patch management from my part.
> v1 and v2 are identical, but [2] lead to the 2 patches to be removed.
> Not willing to worsen the situation, I wanted to wait a bit before getting
> back to these 2 patches and let them be removed.
> Would it be possible to take back these 2 patches ?
>
> Regards,
> Pierre
>
> [1] https://lore.kernel.org/all/2d8b2d85-7bc6-026a-baf9-11a47171ddc5@linaro.org/
> [2] https://lore.kernel.org/all/bb36df3f-5aee-256a-4d64-eaeb9bff998e@arm.com/
>
I was expecting a resend with:
1. Fixed subject.
2. Changelog.
3. Trimmed list.
Best regards,
Krzysztof
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^ permalink raw reply [flat|nested] 12+ messages in thread
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[not found] <CGME20221031091951epcas5p44474924d5427c37186fa2ad6305e0ccf@epcas5p4.samsung.com>
2022-10-31 9:19 ` [PATCH 06/20] arm64: dts: Update cache properties for exynos Pierre Gondois
2022-10-31 9:19 ` Pierre Gondois
2022-11-02 20:21 ` (subset) " Krzysztof Kozlowski
2022-11-02 20:21 ` Krzysztof Kozlowski
2022-11-07 18:13 ` Krzysztof Kozlowski
2022-11-07 18:13 ` Krzysztof Kozlowski
2022-11-22 16:52 ` Pierre Gondois
2022-11-22 16:52 ` Pierre Gondois
2022-11-23 8:20 ` Krzysztof Kozlowski
2022-11-23 8:20 ` Krzysztof Kozlowski
2022-11-03 5:17 ` Alim Akhtar
2022-11-03 5:17 ` Alim Akhtar
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