* [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry
@ 2012-07-15 20:24 minyard
2012-07-15 20:24 ` [Qemu-devel] [PATCH 02/16] pc: move SMBIOS setup to after device init minyard
` (16 more replies)
0 siblings, 17 replies; 23+ messages in thread
From: minyard @ 2012-07-15 20:24 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
There was no way to directly add a table entry to the SMBIOS table,
even though the BIOS supports this. So add a function to do this.
This is in preparation for the IPMI handler adding it's SMBIOS table
entry.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
hw/smbios.c | 27 +++++++++++++++++++++++++++
hw/smbios.h | 15 ++++++++-------
2 files changed, 35 insertions(+), 7 deletions(-)
diff --git a/hw/smbios.c b/hw/smbios.c
index c57237d..98c7f99 100644
--- a/hw/smbios.c
+++ b/hw/smbios.c
@@ -178,6 +178,33 @@ static void smbios_build_type_1_fields(const char *t)
strlen(buf) + 1, buf);
}
+int smbios_table_entry_add(struct smbios_structure_header *entry)
+{
+ struct smbios_table *table;
+ struct smbios_structure_header *header;
+ unsigned int size = entry->length;
+
+ if (!smbios_entries) {
+ smbios_entries_len = sizeof(uint16_t);
+ smbios_entries = g_malloc0(smbios_entries_len);
+ }
+ smbios_entries = g_realloc(smbios_entries, smbios_entries_len +
+ sizeof(*table) + size);
+ table = (struct smbios_table *)(smbios_entries + smbios_entries_len);
+ table->header.type = SMBIOS_TABLE_ENTRY;
+ table->header.length = cpu_to_le16(sizeof(*table) + size);
+
+ header = (struct smbios_structure_header *)(table->data);
+ memcpy(header, entry, size);
+
+ smbios_check_collision(header->type, SMBIOS_TABLE_ENTRY);
+
+ smbios_entries_len += sizeof(*table) + size;
+ (*(uint16_t *)smbios_entries) =
+ cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1);
+ return 0;
+}
+
int smbios_entry_add(const char *t)
{
char buf[1024];
diff --git a/hw/smbios.h b/hw/smbios.h
index 94e3641..6431a15 100644
--- a/hw/smbios.h
+++ b/hw/smbios.h
@@ -13,21 +13,22 @@
*
*/
+/* This goes at the beginning of every SMBIOS structure. */
+struct smbios_structure_header {
+ uint8_t type;
+ uint8_t length;
+ uint16_t handle;
+} QEMU_PACKED;
+
int smbios_entry_add(const char *t);
void smbios_add_field(int type, int offset, int len, void *data);
uint8_t *smbios_get_table(size_t *length);
+int smbios_table_entry_add(struct smbios_structure_header *entry);
/*
* SMBIOS spec defined tables
*/
-/* This goes at the beginning of every SMBIOS structure. */
-struct smbios_structure_header {
- uint8_t type;
- uint8_t length;
- uint16_t handle;
-} QEMU_PACKED;
-
/* SMBIOS type 0 - BIOS Information */
struct smbios_type_0 {
struct smbios_structure_header header;
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 02/16] pc: move SMBIOS setup to after device init
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
@ 2012-07-15 20:24 ` minyard
2012-07-15 20:24 ` [Qemu-devel] [PATCH 03/16] vl: Move init_timer_alarm() earlier minyard
` (15 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: minyard @ 2012-07-15 20:24 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
Setting up the firmware interface for the SMBIOS table needs to
be done later in the process, after device initialization, so that
devices can add entries to the table.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
hw/pc.c | 24 ++++++++++++++----------
hw/pc.h | 11 ++++++-----
hw/pc_piix.c | 12 ++++++++----
3 files changed, 28 insertions(+), 19 deletions(-)
diff --git a/hw/pc.c b/hw/pc.c
index fb1ad5b..bc753c0 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -970,21 +970,13 @@ void pc_cpus_init(const char *cpu_model)
}
}
-void *pc_memory_init(MemoryRegion *system_memory,
- const char *kernel_filename,
- const char *kernel_cmdline,
- const char *initrd_filename,
+void pc_memory_init(MemoryRegion *system_memory,
ram_addr_t below_4g_mem_size,
ram_addr_t above_4g_mem_size,
- MemoryRegion *rom_memory,
MemoryRegion **ram_memory)
{
- int linux_boot, i;
- MemoryRegion *ram, *option_rom_mr;
+ MemoryRegion *ram;
MemoryRegion *ram_below_4g, *ram_above_4g;
- void *fw_cfg;
-
- linux_boot = (kernel_filename != NULL);
/* Allocate RAM. We allocate it as a single memory region and use
* aliases to address portions of it, mostly for backwards compatibility
@@ -1006,7 +998,17 @@ void *pc_memory_init(MemoryRegion *system_memory,
memory_region_add_subregion(system_memory, 0x100000000ULL,
ram_above_4g);
}
+}
+void *pc_bios_init(const char *kernel_filename,
+ const char *kernel_cmdline,
+ const char *initrd_filename,
+ ram_addr_t below_4g_mem_size,
+ MemoryRegion *rom_memory)
+{
+ MemoryRegion *option_rom_mr;
+ void *fw_cfg;
+ int linux_boot, i;
/* Initialize PC system firmware */
pc_system_firmware_init(rom_memory);
@@ -1019,6 +1021,8 @@ void *pc_memory_init(MemoryRegion *system_memory,
option_rom_mr,
1);
+ linux_boot = (kernel_filename != NULL);
+
fw_cfg = bochs_bios_init();
rom_set_fw(fw_cfg);
diff --git a/hw/pc.h b/hw/pc.h
index a662090..d727dfb 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -106,14 +106,15 @@ void pc_register_ferr_irq(qemu_irq irq);
void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
void pc_cpus_init(const char *cpu_model);
-void *pc_memory_init(MemoryRegion *system_memory,
- const char *kernel_filename,
- const char *kernel_cmdline,
- const char *initrd_filename,
+void pc_memory_init(MemoryRegion *system_memory,
ram_addr_t below_4g_mem_size,
ram_addr_t above_4g_mem_size,
- MemoryRegion *rom_memory,
MemoryRegion **ram_memory);
+void *pc_bios_init(const char *kernel_filename,
+ const char *kernel_cmdline,
+ const char *initrd_filename,
+ ram_addr_t below_4g_mem_size,
+ MemoryRegion *rom_memory);
qemu_irq *pc_allocate_cpu_irq(void);
DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
diff --git a/hw/pc_piix.c b/hw/pc_piix.c
index 98a06fa..2c3feaa 100644
--- a/hw/pc_piix.c
+++ b/hw/pc_piix.c
@@ -178,10 +178,8 @@ static void pc_init1(MemoryRegion *system_memory,
/* allocate ram and load rom/bios */
if (!xen_enabled()) {
- fw_cfg = pc_memory_init(system_memory,
- kernel_filename, kernel_cmdline, initrd_filename,
- below_4g_mem_size, above_4g_mem_size,
- pci_enabled ? rom_memory : system_memory, &ram_memory);
+ pc_memory_init(system_memory, below_4g_mem_size,
+ above_4g_mem_size, &ram_memory);
}
gsi_state = g_malloc0(sizeof(*gsi_state));
@@ -275,6 +273,12 @@ static void pc_init1(MemoryRegion *system_memory,
pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
}
+ if (!xen_enabled()) {
+ fw_cfg = pc_bios_init(kernel_filename, kernel_cmdline,
+ initrd_filename, below_4g_mem_size,
+ pci_enabled ? rom_memory : system_memory);
+ }
+
if (pci_enabled && acpi_enabled) {
i2c_bus *smbus;
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 03/16] vl: Move init_timer_alarm() earlier
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
2012-07-15 20:24 ` [Qemu-devel] [PATCH 02/16] pc: move SMBIOS setup to after device init minyard
@ 2012-07-15 20:24 ` minyard
2012-07-15 20:24 ` [Qemu-devel] [PATCH 04/16] qemu-char: Allocate CharDriverState in qemu_chr_new_from_opts minyard
` (14 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: minyard @ 2012-07-15 20:24 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
The timers may be used in initialization, so move them earlier so they
are ready. A reconnect options will be added to qemu-char, and it uses
a timer, but the timer alarm wasn't initialized yet.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
vl.c | 10 +++++-----
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/vl.c b/vl.c
index 52b6588..0f0bcd9 100644
--- a/vl.c
+++ b/vl.c
@@ -3245,6 +3245,11 @@ int main(int argc, char **argv, char **envp)
qemu_set_version(machine->hw_version);
}
+ if (init_timer_alarm() < 0) {
+ fprintf(stderr, "could not initialize alarm timer\n");
+ exit(1);
+ }
+
/* Init CPU def lists, based on config
* - Must be called after all the qemu_read_config_file() calls
* - Must be called before list_cpus()
@@ -3422,11 +3427,6 @@ int main(int argc, char **argv, char **envp)
os_set_line_buffering();
- if (init_timer_alarm() < 0) {
- fprintf(stderr, "could not initialize alarm timer\n");
- exit(1);
- }
-
#ifdef CONFIG_SPICE
/* spice needs the timers to be initialized by this point */
qemu_spice_init();
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 04/16] qemu-char: Allocate CharDriverState in qemu_chr_new_from_opts
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
2012-07-15 20:24 ` [Qemu-devel] [PATCH 02/16] pc: move SMBIOS setup to after device init minyard
2012-07-15 20:24 ` [Qemu-devel] [PATCH 03/16] vl: Move init_timer_alarm() earlier minyard
@ 2012-07-15 20:24 ` minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 05/16] qemu-char: Allow a chardev to reconnect if disconnected minyard
` (13 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: minyard @ 2012-07-15 20:24 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
This allocates the CharDriverState structure in a more logical place.
It reduces code size and it allows a coming option to automatically
attempt to reconnect a chardev if the connection fails.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
console.c | 9 +----
console.h | 2 +-
hw/baum.c | 6 +--
hw/baum.h | 2 +-
hw/msmouse.c | 5 +--
hw/msmouse.h | 2 +-
qemu-char.c | 93 +++++++++++++++++++++-------------------------------
spice-qemu-char.c | 4 +--
ui/qemu-spice.h | 2 +-
9 files changed, 48 insertions(+), 77 deletions(-)
diff --git a/console.c b/console.c
index 6a463f5..f27e5dc 100644
--- a/console.c
+++ b/console.c
@@ -1513,15 +1513,12 @@ static void text_console_do_init(CharDriverState *chr, DisplayState *ds)
chr->init(chr);
}
-CharDriverState *text_console_init(QemuOpts *opts)
+CharDriverState *text_console_init(CharDriverState *chr, QemuOpts *opts)
{
- CharDriverState *chr;
TextConsole *s;
unsigned width;
unsigned height;
- chr = g_malloc0(sizeof(CharDriverState));
-
width = qemu_opt_get_number(opts, "width", 0);
if (width == 0)
width = qemu_opt_get_number(opts, "cols", 0) * FONT_WIDTH;
@@ -1536,10 +1533,8 @@ CharDriverState *text_console_init(QemuOpts *opts)
s = new_console(NULL, TEXT_CONSOLE_FIXED_SIZE);
}
- if (!s) {
- g_free(chr);
+ if (!s)
return NULL;
- }
s->chr = chr;
s->g_width = width;
diff --git a/console.h b/console.h
index 4334db5..d4b930d 100644
--- a/console.h
+++ b/console.h
@@ -359,7 +359,7 @@ void vga_hw_text_update(console_ch_t *chardata);
int is_graphic_console(void);
int is_fixedsize_console(void);
-CharDriverState *text_console_init(QemuOpts *opts);
+CharDriverState *text_console_init(CharDriverState *chr, QemuOpts *opts);
void text_consoles_set_display(DisplayState *ds);
void console_select(unsigned int index);
void console_color_init(DisplayState *ds);
diff --git a/hw/baum.c b/hw/baum.c
index 3e94f84..b5df8a6 100644
--- a/hw/baum.c
+++ b/hw/baum.c
@@ -562,10 +562,9 @@ static void baum_close(struct CharDriverState *chr)
g_free(baum);
}
-CharDriverState *chr_baum_init(QemuOpts *opts)
+CharDriverState *chr_baum_init(CharDriverState *chr, QemuOpts *opts)
{
BaumDriverState *baum;
- CharDriverState *chr;
brlapi_handle_t *handle;
#ifdef CONFIG_SDL
SDL_SysWMinfo info;
@@ -573,7 +572,7 @@ CharDriverState *chr_baum_init(QemuOpts *opts)
int tty;
baum = g_malloc0(sizeof(BaumDriverState));
- baum->chr = chr = g_malloc0(sizeof(CharDriverState));
+ baum->chr = chr;
chr->opaque = baum;
chr->chr_write = baum_write;
@@ -621,7 +620,6 @@ fail:
brlapi__closeConnection(handle);
fail_handle:
g_free(handle);
- g_free(chr);
g_free(baum);
return NULL;
}
diff --git a/hw/baum.h b/hw/baum.h
index 8af710f..599d48b 100644
--- a/hw/baum.h
+++ b/hw/baum.h
@@ -23,4 +23,4 @@
*/
/* char device */
-CharDriverState *chr_baum_init(QemuOpts *opts);
+CharDriverState *chr_baum_init(CharDriverState *chr, QemuOpts *opts);
diff --git a/hw/msmouse.c b/hw/msmouse.c
index 9c492a4..8a8a1d3 100644
--- a/hw/msmouse.c
+++ b/hw/msmouse.c
@@ -64,11 +64,8 @@ static void msmouse_chr_close (struct CharDriverState *chr)
g_free (chr);
}
-CharDriverState *qemu_chr_open_msmouse(QemuOpts *opts)
+CharDriverState *qemu_chr_open_msmouse(CharDriverState *chr, QemuOpts *opts)
{
- CharDriverState *chr;
-
- chr = g_malloc0(sizeof(CharDriverState));
chr->chr_write = msmouse_chr_write;
chr->chr_close = msmouse_chr_close;
diff --git a/hw/msmouse.h b/hw/msmouse.h
index 456cb21..925af1a 100644
--- a/hw/msmouse.h
+++ b/hw/msmouse.h
@@ -1,2 +1,2 @@
/* msmouse.c */
-CharDriverState *qemu_chr_open_msmouse(QemuOpts *opts);
+CharDriverState *qemu_chr_open_msmouse(CharDriverState *chr, QemuOpts *opts);
diff --git a/qemu-char.c b/qemu-char.c
index c2aaaee..c9348fa 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -221,11 +221,8 @@ static int null_chr_write(CharDriverState *chr, const uint8_t *buf, int len)
return len;
}
-static CharDriverState *qemu_chr_open_null(QemuOpts *opts)
+static CharDriverState *qemu_chr_open_null(CharDriverState *chr, QemuOpts *opts)
{
- CharDriverState *chr;
-
- chr = g_malloc0(sizeof(CharDriverState));
chr->chr_write = null_chr_write;
return chr;
}
@@ -618,12 +615,11 @@ static void fd_chr_close(struct CharDriverState *chr)
}
/* open a character device to a unix fd */
-static CharDriverState *qemu_chr_open_fd(int fd_in, int fd_out)
+static CharDriverState *qemu_chr_open_fd(CharDriverState *chr,
+ int fd_in, int fd_out)
{
- CharDriverState *chr;
FDCharDriver *s;
- chr = g_malloc0(sizeof(CharDriverState));
s = g_malloc0(sizeof(FDCharDriver));
s->fd_in = fd_in;
s->fd_out = fd_out;
@@ -637,7 +633,8 @@ static CharDriverState *qemu_chr_open_fd(int fd_in, int fd_out)
return chr;
}
-static CharDriverState *qemu_chr_open_file_out(QemuOpts *opts)
+static CharDriverState *qemu_chr_open_file_out(CharDriverState *chr,
+ QemuOpts *opts)
{
int fd_out;
@@ -646,10 +643,10 @@ static CharDriverState *qemu_chr_open_file_out(QemuOpts *opts)
if (fd_out < 0) {
return NULL;
}
- return qemu_chr_open_fd(-1, fd_out);
+ return qemu_chr_open_fd(chr, -1, fd_out);
}
-static CharDriverState *qemu_chr_open_pipe(QemuOpts *opts)
+static CharDriverState *qemu_chr_open_pipe(CharDriverState *chr, QemuOpts *opts)
{
int fd_in, fd_out;
char filename_in[256], filename_out[256];
@@ -674,7 +671,7 @@ static CharDriverState *qemu_chr_open_pipe(QemuOpts *opts)
return NULL;
}
}
- return qemu_chr_open_fd(fd_in, fd_out);
+ return qemu_chr_open_fd(chr, fd_in, fd_out);
}
@@ -765,10 +762,9 @@ static void qemu_chr_close_stdio(struct CharDriverState *chr)
fd_chr_close(chr);
}
-static CharDriverState *qemu_chr_open_stdio(QemuOpts *opts)
+static CharDriverState *qemu_chr_open_stdio(CharDriverState *chr,
+ QemuOpts *opts)
{
- CharDriverState *chr;
-
if (stdio_nb_clients >= STDIO_MAX_CLIENTS) {
return NULL;
}
@@ -779,7 +775,7 @@ static CharDriverState *qemu_chr_open_stdio(QemuOpts *opts)
atexit(term_exit);
}
- chr = qemu_chr_open_fd(0, 1);
+ qemu_chr_open_fd(chr, 0, 1);
chr->chr_close = qemu_chr_close_stdio;
chr->chr_set_echo = qemu_chr_set_echo_stdio;
qemu_set_fd_handler2(0, stdio_read_poll, stdio_read, NULL, chr);
@@ -975,9 +971,8 @@ static void pty_chr_close(struct CharDriverState *chr)
qemu_chr_be_event(chr, CHR_EVENT_CLOSED);
}
-static CharDriverState *qemu_chr_open_pty(QemuOpts *opts)
+static CharDriverState *qemu_chr_open_pty(CharDriverState *chr, QemuOpts *opts)
{
- CharDriverState *chr;
PtyCharDriver *s;
struct termios tty;
int master_fd, slave_fd, len;
@@ -999,8 +994,6 @@ static CharDriverState *qemu_chr_open_pty(QemuOpts *opts)
tcsetattr(slave_fd, TCSAFLUSH, &tty);
close(slave_fd);
- chr = g_malloc0(sizeof(CharDriverState));
-
len = strlen(q_ptsname(master_fd)) + 5;
chr->filename = g_malloc(len);
snprintf(chr->filename, len, "pty:%s", q_ptsname(master_fd));
@@ -1217,10 +1210,9 @@ static void qemu_chr_close_tty(CharDriverState *chr)
}
}
-static CharDriverState *qemu_chr_open_tty(QemuOpts *opts)
+static CharDriverState *qemu_chr_open_tty(CharDriverState *chr, QemuOpts *opts)
{
const char *filename = qemu_opt_get(opts, "path");
- CharDriverState *chr;
int fd;
TFR(fd = qemu_open(filename, O_RDWR | O_NONBLOCK));
@@ -1228,7 +1220,7 @@ static CharDriverState *qemu_chr_open_tty(QemuOpts *opts)
return NULL;
}
tty_serial_init(fd, 115200, 'N', 8, 1);
- chr = qemu_chr_open_fd(fd, fd);
+ qemu_chr_open_fd(chr, fd, fd);
chr->chr_ioctl = tty_serial_ioctl;
chr->chr_close = qemu_chr_close_tty;
return chr;
@@ -1350,10 +1342,9 @@ static void pp_close(CharDriverState *chr)
qemu_chr_be_event(chr, CHR_EVENT_CLOSED);
}
-static CharDriverState *qemu_chr_open_pp(QemuOpts *opts)
+static CharDriverState *qemu_chr_open_pp(CharDriverState *chr, QemuOpts *opts)
{
const char *filename = qemu_opt_get(opts, "path");
- CharDriverState *chr;
ParallelCharDriver *drv;
int fd;
@@ -1371,7 +1362,6 @@ static CharDriverState *qemu_chr_open_pp(QemuOpts *opts)
drv->fd = fd;
drv->mode = IEEE1284_MODE_COMPAT;
- chr = g_malloc0(sizeof(CharDriverState));
chr->chr_write = null_chr_write;
chr->chr_ioctl = pp_ioctl;
chr->chr_close = pp_close;
@@ -1652,13 +1642,12 @@ static int win_chr_poll(void *opaque)
return 0;
}
-static CharDriverState *qemu_chr_open_win(QemuOpts *opts)
+static CharDriverState *qemu_chr_open_win(CharDriverState *chr,
+ QemuOpts *opts)
{
const char *filename = qemu_opt_get(opts, "path");
- CharDriverState *chr;
WinCharState *s;
- chr = g_malloc0(sizeof(CharDriverState));
s = g_malloc0(sizeof(WinCharState));
chr->opaque = s;
chr->chr_write = win_chr_write;
@@ -1666,7 +1655,6 @@ static CharDriverState *qemu_chr_open_win(QemuOpts *opts)
if (win_chr_init(chr, filename) < 0) {
g_free(s);
- g_free(chr);
return NULL;
}
qemu_chr_generic_open(chr);
@@ -1752,13 +1740,12 @@ static int win_chr_pipe_init(CharDriverState *chr, const char *filename)
}
-static CharDriverState *qemu_chr_open_win_pipe(QemuOpts *opts)
+static CharDriverState *qemu_chr_open_win_pipe(CharDriverState *chr,
+ QemuOpts *opts)
{
const char *filename = qemu_opt_get(opts, "path");
- CharDriverState *chr;
WinCharState *s;
- chr = g_malloc0(sizeof(CharDriverState));
s = g_malloc0(sizeof(WinCharState));
chr->opaque = s;
chr->chr_write = win_chr_write;
@@ -1766,19 +1753,17 @@ static CharDriverState *qemu_chr_open_win_pipe(QemuOpts *opts)
if (win_chr_pipe_init(chr, filename) < 0) {
g_free(s);
- g_free(chr);
return NULL;
}
qemu_chr_generic_open(chr);
return chr;
}
-static CharDriverState *qemu_chr_open_win_file(HANDLE fd_out)
+static CharDriverState *qemu_chr_open_win_file(CharDriverState *chr,
+ HANDLE fd_out)
{
- CharDriverState *chr;
WinCharState *s;
- chr = g_malloc0(sizeof(CharDriverState));
s = g_malloc0(sizeof(WinCharState));
s->hcom = fd_out;
chr->opaque = s;
@@ -1787,12 +1772,14 @@ static CharDriverState *qemu_chr_open_win_file(HANDLE fd_out)
return chr;
}
-static CharDriverState *qemu_chr_open_win_con(QemuOpts *opts)
+static CharDriverState *qemu_chr_open_win_con(CharDriverState *chr,
+ QemuOpts *opts)
{
- return qemu_chr_open_win_file(GetStdHandle(STD_OUTPUT_HANDLE));
+ return qemu_chr_open_win_file(chr, GetStdHandle(STD_OUTPUT_HANDLE));
}
-static CharDriverState *qemu_chr_open_win_file_out(QemuOpts *opts)
+static CharDriverState *qemu_chr_open_win_file_out(CharDriverState *chr,
+ QemuOpts *opts)
{
const char *file_out = qemu_opt_get(opts, "path");
HANDLE fd_out;
@@ -1803,7 +1790,7 @@ static CharDriverState *qemu_chr_open_win_file_out(QemuOpts *opts)
return NULL;
}
- return qemu_chr_open_win_file(fd_out);
+ return qemu_chr_open_win_file(chr, fd_out);
}
static int win_stdio_write(CharDriverState *chr, const uint8_t *buf, int len)
@@ -1944,9 +1931,9 @@ static void win_stdio_close(CharDriverState *chr)
stdio_nb_clients--;
}
-static CharDriverState *qemu_chr_open_win_stdio(QemuOpts *opts)
+static CharDriverState *qemu_chr_open_win_stdio(CharDriverState *chr,
+ QemuOpts *opts)
{
- CharDriverState *chr;
WinStdioCharState *stdio;
DWORD dwMode;
int is_console = 0;
@@ -1956,7 +1943,6 @@ static CharDriverState *qemu_chr_open_win_stdio(QemuOpts *opts)
return NULL;
}
- chr = g_malloc0(sizeof(CharDriverState));
stdio = g_malloc0(sizeof(WinStdioCharState));
stdio->hStdIn = GetStdHandle(STD_INPUT_HANDLE);
@@ -2093,13 +2079,11 @@ static void udp_chr_close(CharDriverState *chr)
qemu_chr_be_event(chr, CHR_EVENT_CLOSED);
}
-static CharDriverState *qemu_chr_open_udp(QemuOpts *opts)
+static CharDriverState *qemu_chr_open_udp(CharDriverState *chr, QemuOpts *opts)
{
- CharDriverState *chr = NULL;
NetCharDriver *s = NULL;
int fd = -1;
- chr = g_malloc0(sizeof(CharDriverState));
s = g_malloc0(sizeof(NetCharDriver));
fd = inet_dgram_opts(opts);
@@ -2118,7 +2102,6 @@ static CharDriverState *qemu_chr_open_udp(QemuOpts *opts)
return chr;
return_err:
- g_free(chr);
g_free(s);
if (fd >= 0) {
closesocket(fd);
@@ -2311,7 +2294,8 @@ static void tcp_chr_read(void *opaque)
#ifndef _WIN32
CharDriverState *qemu_chr_open_eventfd(int eventfd)
{
- return qemu_chr_open_fd(eventfd, eventfd);
+ CharDriverState *chr = g_malloc0(sizeof(CharDriverState));
+ return qemu_chr_open_fd(chr, eventfd, eventfd);
}
#endif
@@ -2414,9 +2398,9 @@ static void tcp_chr_close(CharDriverState *chr)
qemu_chr_be_event(chr, CHR_EVENT_CLOSED);
}
-static CharDriverState *qemu_chr_open_socket(QemuOpts *opts)
+static CharDriverState *qemu_chr_open_socket(CharDriverState *chr,
+ QemuOpts *opts)
{
- CharDriverState *chr = NULL;
TCPCharDriver *s = NULL;
int fd = -1;
int is_listen;
@@ -2433,7 +2417,6 @@ static CharDriverState *qemu_chr_open_socket(QemuOpts *opts)
if (!is_listen)
is_waitconnect = 0;
- chr = g_malloc0(sizeof(CharDriverState));
s = g_malloc0(sizeof(TCPCharDriver));
if (is_unix) {
@@ -2510,7 +2493,6 @@ static CharDriverState *qemu_chr_open_socket(QemuOpts *opts)
if (fd >= 0)
closesocket(fd);
g_free(s);
- g_free(chr);
return NULL;
}
@@ -2708,7 +2690,7 @@ fail:
static const struct {
const char *name;
- CharDriverState *(*open)(QemuOpts *opts);
+ CharDriverState *(*open)(CharDriverState *chr, QemuOpts *opts);
} backend_table[] = {
{ .name = "null", .open = qemu_chr_open_null },
{ .name = "socket", .open = qemu_chr_open_socket },
@@ -2770,8 +2752,9 @@ CharDriverState *qemu_chr_new_from_opts(QemuOpts *opts,
return NULL;
}
- chr = backend_table[i].open(opts);
- if (!chr) {
+ chr = g_malloc0(sizeof(CharDriverState));
+ if (!backend_table[i].open(chr, opts)) {
+ g_free(chr);
fprintf(stderr, "chardev: opening backend \"%s\" failed\n",
qemu_opt_get(opts, "backend"));
return NULL;
diff --git a/spice-qemu-char.c b/spice-qemu-char.c
index 09aa22d..2fb8a10 100644
--- a/spice-qemu-char.c
+++ b/spice-qemu-char.c
@@ -188,9 +188,8 @@ static void print_allowed_subtypes(void)
fprintf(stderr, "\n");
}
-CharDriverState *qemu_chr_open_spice(QemuOpts *opts)
+CharDriverState *qemu_chr_open_spice(CharDriverState *chr, QemuOpts *opts)
{
- CharDriverState *chr;
SpiceCharDriver *s;
const char* name = qemu_opt_get(opts, "name");
uint32_t debug = qemu_opt_get_number(opts, "debug", 0);
@@ -214,7 +213,6 @@ CharDriverState *qemu_chr_open_spice(QemuOpts *opts)
return NULL;
}
- chr = g_malloc0(sizeof(CharDriverState));
s = g_malloc0(sizeof(SpiceCharDriver));
s->chr = chr;
s->debug = debug;
diff --git a/ui/qemu-spice.h b/ui/qemu-spice.h
index 3299da8..fb582c5 100644
--- a/ui/qemu-spice.h
+++ b/ui/qemu-spice.h
@@ -45,7 +45,7 @@ int qemu_spice_migrate_info(const char *hostname, int port, int tls_port,
void do_info_spice_print(Monitor *mon, const QObject *data);
void do_info_spice(Monitor *mon, QObject **ret_data);
-CharDriverState *qemu_chr_open_spice(QemuOpts *opts);
+CharDriverState *qemu_chr_open_spice(CharDriverState *chr, QemuOpts *opts);
#else /* CONFIG_SPICE */
#include "monitor.h"
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 05/16] qemu-char: Allow a chardev to reconnect if disconnected
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
` (2 preceding siblings ...)
2012-07-15 20:24 ` [Qemu-devel] [PATCH 04/16] qemu-char: Allocate CharDriverState in qemu_chr_new_from_opts minyard
@ 2012-07-15 20:25 ` minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 06/16] qemu-char: Fix a race reporting opens and closes minyard
` (12 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: minyard @ 2012-07-15 20:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
Allow a socket that connects to reconnect on a periodic basis if it
fails to connect at startup or if the connection drops while in use.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
qemu-char.c | 54 ++++++++++++++++++++++++++++++++++++++++++++++++++----
qemu-char.h | 4 ++++
qemu-config.c | 3 +++
qemu-options.hx | 11 ++++++++---
4 files changed, 65 insertions(+), 7 deletions(-)
diff --git a/qemu-char.c b/qemu-char.c
index c9348fa..76d4deb 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -111,9 +111,15 @@ void qemu_chr_be_event(CharDriverState *s, int event)
/* Keep track if the char device is open */
switch (event) {
case CHR_EVENT_OPENED:
+ if (s->recon_timer)
+ qemu_del_timer(s->recon_timer);
s->opened = 1;
break;
case CHR_EVENT_CLOSED:
+ if (s->recon_timer)
+ qemu_mod_timer(s->recon_timer,
+ (qemu_get_clock_ns(vm_clock) +
+ (s->recon_time * 1000000000ULL)));
s->opened = 0;
break;
}
@@ -2726,6 +2732,19 @@ static const struct {
#endif
};
+static void recon_timeout(void *opaque)
+{
+ CharDriverState *chr = opaque;
+
+ if (chr->opened)
+ return;
+
+ qemu_mod_timer(chr->recon_timer,
+ (qemu_get_clock_ns(vm_clock) +
+ (chr->recon_time * 1000000000ULL)));
+ backend_table[chr->backend].open(chr, chr->opts);
+}
+
CharDriverState *qemu_chr_new_from_opts(QemuOpts *opts,
void (*init)(struct CharDriverState *s))
{
@@ -2753,11 +2772,36 @@ CharDriverState *qemu_chr_new_from_opts(QemuOpts *opts,
}
chr = g_malloc0(sizeof(CharDriverState));
+
+ chr->backend = i;
+ if ((chr->recon_time = qemu_opt_get_number(opts, "reconnect", 0))) {
+ if (strcmp(qemu_opt_get(opts, "backend"), "socket") != 0) {
+ g_free(chr);
+ fprintf(stderr, "chardev: reconnect only supported on sockets\n");
+ return NULL;
+ }
+ if (qemu_opt_get_bool(opts, "server", 0)) {
+ g_free(chr);
+ fprintf(stderr, "chardev: server device cannot reconnect\n");
+ return NULL;
+ }
+ chr->opts = opts;
+ chr->recon_timer = qemu_new_timer_ns(vm_clock, recon_timeout, chr);
+
+ /* Make sure it connects in time. */
+ qemu_mod_timer(chr->recon_timer,
+ (qemu_get_clock_ns(vm_clock) +
+ (chr->recon_time * 1000000000ULL)));
+ }
+
if (!backend_table[i].open(chr, opts)) {
- g_free(chr);
- fprintf(stderr, "chardev: opening backend \"%s\" failed\n",
- qemu_opt_get(opts, "backend"));
- return NULL;
+ if (!chr->recon_time) {
+ /* Reconnect is not enabled, give up */
+ g_free(chr);
+ fprintf(stderr, "chardev: opening backend \"%s\" failed\n",
+ qemu_opt_get(opts, "backend"));
+ return NULL;
+ }
}
if (!chr->filename)
@@ -2829,6 +2873,8 @@ void qemu_chr_delete(CharDriverState *chr)
QTAILQ_REMOVE(&chardevs, chr, next);
if (chr->chr_close)
chr->chr_close(chr);
+ if (chr->recon_timer)
+ qemu_free_timer(chr->recon_timer);
g_free(chr->filename);
g_free(chr->label);
g_free(chr);
diff --git a/qemu-char.h b/qemu-char.h
index 486644b..d21ae39 100644
--- a/qemu-char.h
+++ b/qemu-char.h
@@ -75,6 +75,10 @@ struct CharDriverState {
int opened;
int avail_connections;
QTAILQ_ENTRY(CharDriverState) next;
+ int backend;
+ QemuOpts *opts;
+ QEMUTimer *recon_timer;
+ uint64_t recon_time;
};
/**
diff --git a/qemu-config.c b/qemu-config.c
index 54694cc..9ebe432 100644
--- a/qemu-config.c
+++ b/qemu-config.c
@@ -209,6 +209,9 @@ static QemuOptsList qemu_chardev_opts = {
.name = "mux",
.type = QEMU_OPT_BOOL,
},{
+ .name = "reconnect",
+ .type = QEMU_OPT_NUMBER,
+ },{
.name = "signal",
.type = QEMU_OPT_BOOL,
},{
diff --git a/qemu-options.hx b/qemu-options.hx
index 72aace6..c5f592c 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -1620,8 +1620,9 @@ DEFHEADING(Character device options:)
DEF("chardev", HAS_ARG, QEMU_OPTION_chardev,
"-chardev null,id=id[,mux=on|off]\n"
"-chardev socket,id=id[,host=host],port=host[,to=to][,ipv4][,ipv6][,nodelay]\n"
- " [,server][,nowait][,telnet][,mux=on|off] (tcp)\n"
- "-chardev socket,id=id,path=path[,server][,nowait][,telnet],[mux=on|off] (unix)\n"
+ " [,server][,nowait][,telnet][,mux=on|off][,reconnect=seconds] (tcp)\n"
+ "-chardev socket,id=id,path=path[,server][,nowait][,telnet][,mux=on|off]\n"
+ " [,reconnect=seconds] (unix)\n"
"-chardev udp,id=id[,host=host],port=port[,localaddr=localaddr]\n"
" [,localport=localport][,ipv4][,ipv6][,mux=on|off]\n"
"-chardev msmouse,id=id[,mux=on|off]\n"
@@ -1690,7 +1691,7 @@ Options to each backend are described below.
A void device. This device will not emit any data, and will drop any data it
receives. The null backend does not take any options.
-@item -chardev socket ,id=@var{id} [@var{TCP options} or @var{unix options}] [,server] [,nowait] [,telnet]
+@item -chardev socket ,id=@var{id} [@var{TCP options} or @var{unix options}] [,server] [,nowait] [,telnet] [,reconnect=@var{seconds}]
Create a two-way stream socket, which can be either a TCP or a unix socket. A
unix socket will be created if @option{path} is specified. Behaviour is
@@ -1704,6 +1705,10 @@ connect to a listening socket.
@option{telnet} specifies that traffic on the socket should interpret telnet
escape sequences.
+@option{reconnect} specifies that if the socket does not come up at startup,
+or if the socket is closed for some reason (like the other end exited),
+wait the given number of seconds and attempt to reconnect.
+
TCP and unix socket options are given below:
@table @option
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 06/16] qemu-char: Fix a race reporting opens and closes
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
` (3 preceding siblings ...)
2012-07-15 20:25 ` [Qemu-devel] [PATCH 05/16] qemu-char: Allow a chardev to reconnect if disconnected minyard
@ 2012-07-15 20:25 ` minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 07/16] qemu-char: remove free of chr from win_stdio_close minyard
` (11 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: minyard @ 2012-07-15 20:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
When an open event is reported, it is done through a bh. But close
events are reported immediately. So if an open event is in the bh
and a close occurs, an extraneous open happens, which can confuse a
user.
To fix this, this patch sets the "opened" flag immediately instead
of in the bh handler and checks to make sure the opened flag is
set before reporting an open event.
This also modifies the spice code to call qemu_chr_generic_open
to report an open, to keep things consistent.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
qemu-char.c | 17 +++++++++++++++--
spice-qemu-char.c | 6 ++++--
2 files changed, 19 insertions(+), 4 deletions(-)
diff --git a/qemu-char.c b/qemu-char.c
index 76d4deb..3d4302d 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -111,9 +111,12 @@ void qemu_chr_be_event(CharDriverState *s, int event)
/* Keep track if the char device is open */
switch (event) {
case CHR_EVENT_OPENED:
+ /*
+ * See the comment in qemu_chr_generic_open_bh() for why
+ * 's->opened = 1' is not here.
+ */
if (s->recon_timer)
qemu_del_timer(s->recon_timer);
- s->opened = 1;
break;
case CHR_EVENT_CLOSED:
if (s->recon_timer)
@@ -132,13 +135,23 @@ void qemu_chr_be_event(CharDriverState *s, int event)
static void qemu_chr_generic_open_bh(void *opaque)
{
CharDriverState *s = opaque;
- qemu_chr_be_event(s, CHR_EVENT_OPENED);
+ /*
+ * Since the "close" event doesn't go through a bh, there is a
+ * possible race condition if a close comes in after an open, but
+ * the open is in the bh queue. So we double-check here, and we
+ * set opened in qemu_chr_generic_open() instead of
+ * qemu_chr_be_event().
+ */
+ if (s->opened)
+ qemu_chr_be_event(s, CHR_EVENT_OPENED);
qemu_bh_delete(s->bh);
s->bh = NULL;
}
void qemu_chr_generic_open(CharDriverState *s)
{
+ /* See the comment in qemu_chr_generic_open_bh() for why this is here */
+ s->opened = 1;
if (s->bh == NULL) {
s->bh = qemu_bh_new(qemu_chr_generic_open_bh, s);
qemu_bh_schedule(s->bh);
diff --git a/spice-qemu-char.c b/spice-qemu-char.c
index 2fb8a10..7c6d989 100644
--- a/spice-qemu-char.c
+++ b/spice-qemu-char.c
@@ -93,8 +93,10 @@ static void vmc_state(SpiceCharDeviceInstance *sin, int connected)
return;
}
- qemu_chr_be_event(scd->chr,
- connected ? CHR_EVENT_OPENED : CHR_EVENT_CLOSED);
+ if (connected)
+ qemu_chr_generic_open(scd->chr);
+ else
+ qemu_chr_be_event(scd->chr, CHR_EVENT_CLOSED);
}
static SpiceCharDeviceInterface vmc_interface = {
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 07/16] qemu-char: remove free of chr from win_stdio_close
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
` (4 preceding siblings ...)
2012-07-15 20:25 ` [Qemu-devel] [PATCH 06/16] qemu-char: Fix a race reporting opens and closes minyard
@ 2012-07-15 20:25 ` minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 08/16] qemu-char: Close fd at end of file minyard
` (10 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: minyard @ 2012-07-15 20:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
This will result in a double free on close, because it's freed
in qemu_chr_delete() right after calling the close function.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
qemu-char.c | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/qemu-char.c b/qemu-char.c
index 3d4302d..8fbc704 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -1946,7 +1946,6 @@ static void win_stdio_close(CharDriverState *chr)
}
g_free(chr->opaque);
- g_free(chr);
stdio_nb_clients--;
}
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 08/16] qemu-char: Close fd at end of file
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
` (5 preceding siblings ...)
2012-07-15 20:25 ` [Qemu-devel] [PATCH 07/16] qemu-char: remove free of chr from win_stdio_close minyard
@ 2012-07-15 20:25 ` minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 09/16] qdev: Add a pre-firmware init capability minyard
` (9 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: minyard @ 2012-07-15 20:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
The chardev backends that used qemu_chr_open_fd did not get their
file descriptors closed at end of file or when the chardev was closed.
This could result in a file descriptor leak.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
qemu-char.c | 29 +++++++++++++++++++++++------
1 files changed, 23 insertions(+), 6 deletions(-)
diff --git a/qemu-char.c b/qemu-char.c
index 8fbc704..9cbc8c0 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -563,6 +563,7 @@ static int stdio_nb_clients;
typedef struct {
int fd_in, fd_out;
int max_size;
+ int close_fds_on_close;
} FDCharDriver;
@@ -581,6 +582,18 @@ static int fd_chr_read_poll(void *opaque)
return s->max_size;
}
+static void fd_close_fds(FDCharDriver *s)
+{
+ if (!s->close_fds_on_close)
+ return;
+
+ if ((s->fd_out != s->fd_in) && (s->fd_out != -1))
+ close(s->fd_out);
+ s->fd_out = -1;
+ close(s->fd_in);
+ s->fd_in = -1;
+}
+
static void fd_chr_read(void *opaque)
{
CharDriverState *chr = opaque;
@@ -597,6 +610,7 @@ static void fd_chr_read(void *opaque)
if (size == 0) {
/* FD has been closed. Remove it from the active list. */
qemu_set_fd_handler2(s->fd_in, NULL, NULL, NULL, NULL);
+ fd_close_fds(s);
qemu_chr_be_event(chr, CHR_EVENT_CLOSED);
return;
}
@@ -626,6 +640,7 @@ static void fd_chr_close(struct CharDriverState *chr)
if (display_type == DT_NOGRAPHIC && s->fd_in == 0) {
} else {
qemu_set_fd_handler2(s->fd_in, NULL, NULL, NULL, NULL);
+ fd_close_fds(s);
}
}
@@ -635,13 +650,15 @@ static void fd_chr_close(struct CharDriverState *chr)
/* open a character device to a unix fd */
static CharDriverState *qemu_chr_open_fd(CharDriverState *chr,
- int fd_in, int fd_out)
+ int fd_in, int fd_out,
+ int close_fds_on_close)
{
FDCharDriver *s;
s = g_malloc0(sizeof(FDCharDriver));
s->fd_in = fd_in;
s->fd_out = fd_out;
+ s->close_fds_on_close = close_fds_on_close;
chr->opaque = s;
chr->chr_write = fd_chr_write;
chr->chr_update_read_handler = fd_chr_update_read_handler;
@@ -662,7 +679,7 @@ static CharDriverState *qemu_chr_open_file_out(CharDriverState *chr,
if (fd_out < 0) {
return NULL;
}
- return qemu_chr_open_fd(chr, -1, fd_out);
+ return qemu_chr_open_fd(chr, -1, fd_out, 1);
}
static CharDriverState *qemu_chr_open_pipe(CharDriverState *chr, QemuOpts *opts)
@@ -690,7 +707,7 @@ static CharDriverState *qemu_chr_open_pipe(CharDriverState *chr, QemuOpts *opts)
return NULL;
}
}
- return qemu_chr_open_fd(chr, fd_in, fd_out);
+ return qemu_chr_open_fd(chr, fd_in, fd_out, 1);
}
@@ -794,7 +811,7 @@ static CharDriverState *qemu_chr_open_stdio(CharDriverState *chr,
atexit(term_exit);
}
- qemu_chr_open_fd(chr, 0, 1);
+ qemu_chr_open_fd(chr, 0, 1, 0);
chr->chr_close = qemu_chr_close_stdio;
chr->chr_set_echo = qemu_chr_set_echo_stdio;
qemu_set_fd_handler2(0, stdio_read_poll, stdio_read, NULL, chr);
@@ -1239,7 +1256,7 @@ static CharDriverState *qemu_chr_open_tty(CharDriverState *chr, QemuOpts *opts)
return NULL;
}
tty_serial_init(fd, 115200, 'N', 8, 1);
- qemu_chr_open_fd(chr, fd, fd);
+ qemu_chr_open_fd(chr, fd, fd, 1);
chr->chr_ioctl = tty_serial_ioctl;
chr->chr_close = qemu_chr_close_tty;
return chr;
@@ -2313,7 +2330,7 @@ static void tcp_chr_read(void *opaque)
CharDriverState *qemu_chr_open_eventfd(int eventfd)
{
CharDriverState *chr = g_malloc0(sizeof(CharDriverState));
- return qemu_chr_open_fd(chr, eventfd, eventfd);
+ return qemu_chr_open_fd(chr, eventfd, eventfd, 0);
}
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 09/16] qdev: Add a pre-firmware init capability
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
` (6 preceding siblings ...)
2012-07-15 20:25 ` [Qemu-devel] [PATCH 08/16] qemu-char: Close fd at end of file minyard
@ 2012-07-15 20:25 ` minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 10/16] qom: release previous object when setting minyard
` (8 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: minyard @ 2012-07-15 20:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
Some devices may need to do some firmware-type initialization before
the firmware itself is initialized. For instance, any device that
adds SMBIOS table entries (like IPMI) will need to do that before
the BIOS is initialized.
So add a list of devices that get initialized before the firmware
initialization. Since those devices get removed from the list so
they don't get initialized twice, convert the qemu_opt_foreach() to
use the safe list traversal.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
hw/pc.c | 2 ++
hw/qdev-monitor.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++
hw/qdev.h | 3 +++
qemu-option.c | 4 ++--
4 files changed, 57 insertions(+), 2 deletions(-)
diff --git a/hw/pc.c b/hw/pc.c
index bc753c0..a0e8824 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -1010,6 +1010,8 @@ void *pc_bios_init(const char *kernel_filename,
void *fw_cfg;
int linux_boot, i;
+ qdev_prefw_init_check();
+
/* Initialize PC system firmware */
pc_system_firmware_init(rom_memory);
diff --git a/hw/qdev-monitor.c b/hw/qdev-monitor.c
index 7915b45..a874f1b 100644
--- a/hw/qdev-monitor.c
+++ b/hw/qdev-monitor.c
@@ -486,6 +486,56 @@ DeviceState *qdev_device_add(QemuOpts *opts)
return qdev;
}
+/*
+ * Some devices may need to be initialized before the firmware is
+ * initialized, so they may add information to the firmware
+ * structures.
+ */
+typedef struct prefw_list
+{
+ const char *name;
+ struct prefw_list *next;
+} prefw_list;
+
+prefw_list *prefw_init;
+
+void qdev_add_prefw_init(const char *name)
+{
+ prefw_list *e = g_malloc(sizeof(*e));
+ e->name = name;
+ e->next = prefw_init;
+ prefw_init = e;
+}
+
+static int prefw_check_func(QemuOpts *opts, void *opaque)
+{
+ DeviceState *dev;
+ const char *driver;
+ prefw_list *e;
+
+ driver = qemu_opt_get(opts, "driver");
+ if (!driver)
+ return 0;
+
+ for (e = prefw_init; e; e = e->next) {
+ if (strcmp(driver, e->name) == 0) {
+ dev = qdev_device_add(opts);
+ if (!dev)
+ return -1;
+ qemu_opts_del(opts);
+ break;
+ }
+ }
+ return 0;
+}
+
+void qdev_prefw_init_check(void)
+{
+ /* init generic devices */
+ if (qemu_opts_foreach(qemu_find_opts("device"),
+ prefw_check_func, NULL, 1) != 0)
+ exit(1);
+}
#define qdev_printf(fmt, ...) monitor_printf(mon, "%*s" fmt, indent, "", ## __VA_ARGS__)
static void qbus_print(Monitor *mon, BusState *bus, int indent);
diff --git a/hw/qdev.h b/hw/qdev.h
index f4683dc..2be4c95 100644
--- a/hw/qdev.h
+++ b/hw/qdev.h
@@ -167,6 +167,9 @@ int qdev_simple_unplug_cb(DeviceState *dev);
void qdev_machine_creation_done(void);
bool qdev_machine_modified(void);
+void qdev_add_prefw_init(const char *name);
+void qdev_prefw_init_check(void);
+
qemu_irq qdev_get_gpio_in(DeviceState *dev, int n);
void qdev_connect_gpio_out(DeviceState *dev, int n, qemu_irq pin);
diff --git a/qemu-option.c b/qemu-option.c
index bb3886c..1d000f8 100644
--- a/qemu-option.c
+++ b/qemu-option.c
@@ -709,10 +709,10 @@ int qemu_opt_set_bool(QemuOpts *opts, const char *name, bool val)
int qemu_opt_foreach(QemuOpts *opts, qemu_opt_loopfunc func, void *opaque,
int abort_on_failure)
{
- QemuOpt *opt;
+ QemuOpt *opt, *next_opt;
int rc = 0;
- QTAILQ_FOREACH(opt, &opts->head, next) {
+ QTAILQ_FOREACH_SAFE(opt, &opts->head, next, next_opt) {
rc = func(opt->name, opt->str, opaque);
if (abort_on_failure && rc != 0)
break;
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 10/16] qom: release previous object when setting
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
` (7 preceding siblings ...)
2012-07-15 20:25 ` [Qemu-devel] [PATCH 09/16] qdev: Add a pre-firmware init capability minyard
@ 2012-07-15 20:25 ` minyard
2012-07-16 6:24 ` Paolo Bonzini
2012-07-15 20:25 ` [Qemu-devel] [PATCH 11/16] Add a base IPMI interface minyard
` (7 subsequent siblings)
16 siblings, 1 reply; 23+ messages in thread
From: minyard @ 2012-07-15 20:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
When setting an object, if you don't release the previous object
that was there, it may become unusable. This change allows a
chardev to be removed from one object's properties and added to
another's.
---
qom/object.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/qom/object.c b/qom/object.c
index 00bb3b0..484dc77 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -731,6 +731,8 @@ void object_property_set(Object *obj, Visitor *v, const char *name,
if (!prop->set) {
error_set(errp, QERR_PERMISSION_DENIED);
} else {
+ if (prop->release)
+ prop->release(obj, name, prop->opaque);
prop->set(obj, v, prop->opaque, name, errp);
}
}
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 11/16] Add a base IPMI interface
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
` (8 preceding siblings ...)
2012-07-15 20:25 ` [Qemu-devel] [PATCH 10/16] qom: release previous object when setting minyard
@ 2012-07-15 20:25 ` minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 12/16] IPMI: Add a PC ISA type structure minyard
` (6 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: minyard @ 2012-07-15 20:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
Add the basic IPMI types and infrastructure to QEMU. Low-level
interfaces and simulation interfaces will register with this; it's
kind of the go-between to tie them together.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/Makefile.objs | 2 +
hw/ipmi.c | 182 ++++++++++++++++++++++++++++
hw/ipmi.h | 228 ++++++++++++++++++++++++++++++++++++
qemu-doc.texi | 2 +
6 files changed, 416 insertions(+), 0 deletions(-)
create mode 100644 hw/ipmi.c
create mode 100644 hw/ipmi.h
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index 2c78175..eb17afc 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -7,6 +7,7 @@ CONFIG_VGA_ISA=y
CONFIG_VGA_CIRRUS=y
CONFIG_VMWARE_VGA=y
CONFIG_VMMOUSE=y
+CONFIG_IPMI=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index 233a856..e4e3e4f 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -7,6 +7,7 @@ CONFIG_VGA_ISA=y
CONFIG_VGA_CIRRUS=y
CONFIG_VMWARE_VGA=y
CONFIG_VMMOUSE=y
+CONFIG_IPMI=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index 27e362a..256cfae 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -20,6 +20,8 @@ hw-obj-$(CONFIG_M48T59) += m48t59.o
hw-obj-$(CONFIG_ESCC) += escc.o
hw-obj-$(CONFIG_EMPTY_SLOT) += empty_slot.o
+hw-obj-$(CONFIG_IPMI) += ipmi.o
+
hw-obj-$(CONFIG_SERIAL) += serial.o
hw-obj-$(CONFIG_PARALLEL) += parallel.o
hw-obj-$(CONFIG_I8254) += i8254_common.o i8254.o
diff --git a/hw/ipmi.c b/hw/ipmi.c
new file mode 100644
index 0000000..8c5d694
--- /dev/null
+++ b/hw/ipmi.c
@@ -0,0 +1,182 @@
+/*
+ * QEMU IPMI emulation
+ *
+ * Copyright (c) 2012 Corey Minyard, MontaVista Software, LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "hw.h"
+#include "ipmi.h"
+#include "sysemu.h"
+#include "qmp-commands.h"
+
+#ifdef DO_IPMI_THREAD
+static void *ipmi_thread(void *opaque)
+{
+ IPMIDevice *s = opaque;
+ int64_t wait_until;
+
+ ipmi_lock(s);
+ for (;;) {
+ qemu_cond_wait(&s->waker, &s->lock);
+ wait_until = 0;
+ while (s->do_wake) {
+ s->do_wake = 0;
+ s->handle_if_event(s);
+ }
+ }
+ ipmi_unlock(s);
+ return NULL;
+}
+#endif
+
+static int ipmi_do_hw_op(IPMIDevice *s, enum ipmi_op op, int checkonly)
+{
+ switch(op) {
+ case IPMI_RESET_CHASSIS:
+ if (checkonly)
+ return 0;
+ qemu_system_reset_request();
+ return 0;
+
+ case IPMI_POWEROFF_CHASSIS:
+ if (checkonly)
+ return 0;
+ qemu_system_powerdown_request();
+ return 0;
+
+ case IPMI_SEND_NMI:
+ if (checkonly)
+ return 0;
+ qemu_mutex_lock_iothread();
+ qmp_inject_nmi(NULL);
+ qemu_mutex_unlock_iothread();
+ return 0;
+
+ case IPMI_POWERCYCLE_CHASSIS:
+ case IPMI_PULSE_DIAG_IRQ:
+ case IPMI_SHUTDOWN_VIA_ACPI_OVERTEMP:
+ case IPMI_POWERON_CHASSIS:
+ default:
+ return IPMI_CC_COMMAND_NOT_SUPPORTED;
+ }
+}
+
+static void ipmi_set_irq_enable(IPMIDevice *s, int val)
+{
+ s->irqs_enabled = val;
+}
+
+static void ipmi_reset(DeviceState *dev)
+{
+ IPMIDevice *s = DO_UPCAST(IPMIDevice, qdev, dev);
+ IPMIBmcClass *bk = IPMI_BMC_GET_CLASS(s->bmc);
+
+ if (bk->handle_reset)
+ bk->handle_reset(s->bmc);
+}
+
+static int ipmi_qdev_init(DeviceState *qdev)
+{
+ IPMIDevice *s = DO_UPCAST(IPMIDevice, qdev, qdev);
+ IPMIDeviceClass *k = IPMI_DEVICE_GET_CLASS(s);
+
+ if (k->init) {
+ int rc = k->init(s);
+ if (rc)
+ return rc;
+ }
+
+ if (!s->slave_addr)
+ s->slave_addr = 0x20;
+
+#ifdef DO_IPMI_THREAD
+ qemu_mutex_init(&s->lock);
+ qemu_cond_init(&s->waker);
+ qemu_thread_create(&s->thread, ipmi_thread, s, 0);
+#endif
+
+ return 0;
+}
+
+static Property ipmi_properties[] = {
+ DEFINE_PROP_PTR("bmc", IPMIDevice, bmc),
+ DEFINE_PROP_UINT8("slave-addr", IPMIDevice, slave_addr, 0),
+ DEFINE_PROP_UINT64("iobase", IPMIDevice, io_base, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void ipmi_device_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *k = DEVICE_CLASS(klass);
+ IPMIDeviceClass *ik = IPMI_DEVICE_CLASS(klass);
+
+ ik->do_hw_op = ipmi_do_hw_op;
+ ik->set_irq_enable = ipmi_set_irq_enable;
+ k->init = ipmi_qdev_init;
+ k->reset = ipmi_reset;
+ k->props = ipmi_properties;
+}
+
+static TypeInfo ipmi_device_type_info = {
+ .name = TYPE_IPMI_DEVICE,
+ .parent = TYPE_DEVICE,
+ .instance_size = sizeof(IPMIDevice),
+ .abstract = true,
+ .class_size = sizeof(IPMIDeviceClass),
+ .class_init = ipmi_device_class_init,
+};
+
+static int ipmi_bmc_init(DeviceState *qdev)
+{
+ IPMIBmc *s = DO_UPCAST(IPMIBmc, qdev, qdev);
+ IPMIBmcClass *k = IPMI_BMC_GET_CLASS(s);
+
+ if (k->init) {
+ int rc = k->init(s);
+ if (rc)
+ return rc;
+ }
+ return 0;
+}
+
+static void ipmi_bmc_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *k = DEVICE_CLASS(klass);
+
+ k->init = ipmi_bmc_init;
+}
+
+static TypeInfo ipmi_bmc_type_info = {
+ .name = TYPE_IPMI_BMC,
+ .parent = TYPE_DEVICE,
+ .instance_size = sizeof(IPMIBmc),
+ .abstract = true,
+ .class_size = sizeof(IPMIBmcClass),
+ .class_init = ipmi_bmc_class_init,
+};
+
+static void ipmi_register_types(void)
+{
+ type_register_static(&ipmi_device_type_info);
+ type_register_static(&ipmi_bmc_type_info);
+}
+
+type_init(ipmi_register_types)
diff --git a/hw/ipmi.h b/hw/ipmi.h
new file mode 100644
index 0000000..80ab64f
--- /dev/null
+++ b/hw/ipmi.h
@@ -0,0 +1,228 @@
+/*
+ * IPMI base class
+ *
+ * Copyright (c) 2012 Corey Minyard, MontaVista Software, LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef HW_IPMI_H
+#define HW_IPMI_H
+
+#include "memory.h"
+#include "qemu-common.h"
+#include "qdev.h"
+
+/*
+ * Create a separate thread for the IPMI device itself. This is a
+ * better simulation and lets the IPMI device do things asynchronously
+ * if necessary.
+ */
+/* #define DO_IPMI_THREAD */
+
+#ifdef DO_IPMI_THREAD
+#include "qemu-thread.h"
+
+#define ipmi_lock(s) qemu_mutex_lock(&(s)->lock)
+#define ipmi_unlock(s) qemu_mutex_unlock(&(s)->lock)
+#define ipmi_signal(s) \
+do { \
+ (s)->do_wake=1; \
+ qemu_cond_signal(&(s)->waker); \
+} while(0)
+
+#else
+#define ipmi_lock(s) (s)->lockcount++
+#define ipmi_unlock(s) (s)->lockcount--
+#define ipmi_signal(s) \
+do { \
+ (s)->do_wake = 1; \
+ while ((s)->do_wake) { \
+ (s)->do_wake = 0; \
+ (IPMI_DEVICE_GET_CLASS(s))->handle_if_event(s); \
+ } \
+} while(0)
+#endif
+
+#define MAX_IPMI_MSG_SIZE 300
+
+enum ipmi_op {
+ IPMI_RESET_CHASSIS,
+ IPMI_POWEROFF_CHASSIS,
+ IPMI_POWERON_CHASSIS,
+ IPMI_POWERCYCLE_CHASSIS,
+ IPMI_PULSE_DIAG_IRQ,
+ IPMI_SHUTDOWN_VIA_ACPI_OVERTEMP,
+ IPMI_SEND_NMI
+};
+
+#define IPMI_CC_INVALID_CMD 0xc1
+#define IPMI_CC_COMMAND_INVALID_FOR_LUN 0xc2
+#define IPMI_CC_TIMEOUT 0xc3
+#define IPMI_CC_OUT_OF_SPACE 0xc4
+#define IPMI_CC_INVALID_RESERVATION 0xc5
+#define IPMI_CC_REQUEST_DATA_TRUNCATED 0xc6
+#define IPMI_CC_REQUEST_DATA_LENGTH_INVALID 0xc7
+#define IPMI_CC_PARM_OUT_OF_RANGE 0xc9
+#define IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES 0xca
+#define IPMI_CC_REQ_ENTRY_NOT_PRESENT 0xcb
+#define IPMI_CC_INVALID_DATA_FIELD 0xcc
+#define IPMI_CC_BMC_INIT_IN_PROGRESS 0xd2
+#define IPMI_CC_COMMAND_NOT_SUPPORTED 0xd5
+
+#define IPMI_NETFN_APP 0x06
+
+#define IPMI_DEBUG 1
+
+/* Specified in the SMBIOS spec. */
+#define IPMI_SMBIOS_KCS 0x01
+#define IPMI_SMBIOS_SMIC 0x02
+#define IPMI_SMBIOS_BT 0x03
+#define IPMI_SMBIOS_SSIF 0x04
+
+typedef struct IPMIBmc IPMIBmc;
+
+/*
+ * And IPMI Interface, the bus device for talking between the target
+ * and the BMC.
+ */
+#define TYPE_IPMI_DEVICE "ipmi-device"
+#define IPMI_DEVICE(obj) \
+ OBJECT_CHECK(IPMIDevice, (obj), TYPE_IPMI_DEVICE)
+#define IPMI_DEVICE_CLASS(klass) \
+ OBJECT_CLASS_CHECK(IPMIDeviceClass, (klass), TYPE_IPMI_DEVICE)
+#define IPMI_DEVICE_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(IPMIDeviceClass, (obj), TYPE_IPMI_DEVICE)
+
+typedef struct IPMIDevice {
+ DeviceState qdev;
+
+ void *bmc; /* Really IPMIBmc */
+
+#ifdef DO_IPMI_THREAD
+ QemuThread thread;
+ QemuCond waker;
+ QemuMutex lock;
+#else
+ int lockcount;
+#endif
+ int do_wake;
+
+ int obf_irq_set;
+ int atn_irq_set;
+ qemu_irq irq;
+ int use_irq;
+ int irqs_enabled;
+
+ unsigned long io_base;
+ unsigned long io_length;
+
+ MemoryRegion io;
+
+ uint8_t outmsg[MAX_IPMI_MSG_SIZE];
+ unsigned int outpos;
+ unsigned int outlen;
+
+ uint8_t inmsg[MAX_IPMI_MSG_SIZE];
+ unsigned int inlen;
+ int write_end;
+
+ unsigned char slave_addr;
+} IPMIDevice;
+
+typedef struct IPMIDeviceClass {
+ DeviceClass parent_class;
+
+ unsigned int smbios_type;
+
+ int (*init)(struct IPMIDevice *s);
+
+ /*
+ * Perform various operations on the hardware. If checkonly is
+ * true, it will return if the operation can be performed, but it
+ * will not do the operation.
+ */
+ int (*do_hw_op)(struct IPMIDevice *s, enum ipmi_op op, int checkonly);
+
+ /*
+ * Enable/disable irqs on the interface when the BMC requests this.
+ */
+ void (*set_irq_enable)(struct IPMIDevice *s, int val);
+
+ /*
+ * Handle an event that occurred on the interface, generally the.
+ * target writing to a register.
+ */
+ void (*handle_if_event)(struct IPMIDevice *s);
+
+ /*
+ * The interfaces use this to perform certain ops
+ */
+ void (*set_atn)(struct IPMIDevice *s, int val, int irq);
+
+ /*
+ * Handle a response from the bmc. Must be called with ipmi_lock
+ * held.
+ */
+ void (*handle_rsp)(struct IPMIDevice *s, uint8_t msg_id,
+ unsigned char *rsp, unsigned int rsp_len);
+
+} IPMIDeviceClass;
+
+/*
+ * Define a BMC simulator (or perhaps a connection to a real BMC)
+ */
+#define TYPE_IPMI_BMC "ipmi-bmc"
+#define IPMI_BMC(obj) \
+ OBJECT_CHECK(IPMIBmc, (obj), TYPE_IPMI_BMC)
+#define IPMI_BMC_CLASS(klass) \
+ OBJECT_CLASS_CHECK(IPMIBmcClass, (klass), TYPE_IPMI_BMC)
+#define IPMI_BMC_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(IPMIBmcClass, (obj), TYPE_IPMI_BMC)
+
+struct IPMIBmc {
+ DeviceState qdev;
+};
+
+typedef struct IPMIBmcClass {
+ DeviceClass parent_class;
+
+ int (*init)(IPMIBmc *s);
+
+ /* Called when the system resets to report to the bmc. */
+ void (*handle_reset)(struct IPMIBmc *s);
+
+ /*
+ * Handle a command to the bmc. Must be called with ipmi_lock
+ * held.
+ */
+ void (*handle_command)(struct IPMIBmc *s,
+ uint8_t *cmd, unsigned int cmd_len,
+ unsigned int max_cmd_len,
+ uint8_t msg_id);
+} IPMIBmcClass;
+
+#ifdef IPMI_DEBUG
+#define ipmi_debug(fs, ...) \
+ fprintf(stderr, "IPMI (%s): " fs, __func__, ##__VA_ARGS__)
+#else
+#define ipmi_debug(fs,...)
+#endif
+
+#endif
diff --git a/qemu-doc.texi b/qemu-doc.texi
index 0af0ff4..effa2da 100644
--- a/qemu-doc.texi
+++ b/qemu-doc.texi
@@ -195,6 +195,8 @@ PCI and ISA network adapters
@item
Serial ports
@item
+IPMI BMC, either and internal or external one
+@item
Creative SoundBlaster 16 sound card
@item
ENSONIQ AudioPCI ES1370 sound card
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 12/16] IPMI: Add a PC ISA type structure
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
` (9 preceding siblings ...)
2012-07-15 20:25 ` [Qemu-devel] [PATCH 11/16] Add a base IPMI interface minyard
@ 2012-07-15 20:25 ` minyard
2012-07-16 7:16 ` Paolo Bonzini
2012-07-15 20:25 ` [Qemu-devel] [PATCH 13/16] IPMI: Add a KCS low-level interface minyard
` (5 subsequent siblings)
16 siblings, 1 reply; 23+ messages in thread
From: minyard @ 2012-07-15 20:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
This provides the base infrastructure to tie IPMI low-level
interfaces into a PC ISA bus.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/Makefile.objs | 1 +
hw/isa_ipmi.c | 156 ++++++++++++++++++++++++++++++++++++
hw/smbios.h | 12 +++
5 files changed, 171 insertions(+), 0 deletions(-)
create mode 100644 hw/isa_ipmi.c
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index eb17afc..c0aff0d 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -8,6 +8,7 @@ CONFIG_VGA_CIRRUS=y
CONFIG_VMWARE_VGA=y
CONFIG_VMMOUSE=y
CONFIG_IPMI=y
+CONFIG_ISA_IPMI=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index e4e3e4f..615e4f2 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -8,6 +8,7 @@ CONFIG_VGA_CIRRUS=y
CONFIG_VMWARE_VGA=y
CONFIG_VMMOUSE=y
CONFIG_IPMI=y
+CONFIG_ISA_IPMI=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index 256cfae..928870b 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -21,6 +21,7 @@ hw-obj-$(CONFIG_ESCC) += escc.o
hw-obj-$(CONFIG_EMPTY_SLOT) += empty_slot.o
hw-obj-$(CONFIG_IPMI) += ipmi.o
+hw-obj-$(CONFIG_ISA_IPMI) += isa_ipmi.o
hw-obj-$(CONFIG_SERIAL) += serial.o
hw-obj-$(CONFIG_PARALLEL) += parallel.o
diff --git a/hw/isa_ipmi.c b/hw/isa_ipmi.c
new file mode 100644
index 0000000..a3ca558
--- /dev/null
+++ b/hw/isa_ipmi.c
@@ -0,0 +1,156 @@
+/*
+ * QEMU ISA IPMI KCS emulation
+ *
+ * Copyright (c) 2012 Corey Minyard, MontaVista Software, LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "hw.h"
+#include "isa.h"
+#include "pc.h"
+#include "qemu-timer.h"
+#include "qemu-char.h"
+#include "sysemu.h"
+#include "smbios.h"
+#include "ipmi.h"
+
+
+typedef struct ISAIPMIDevice {
+ ISADevice dev;
+ char *interface;
+ uint32_t iobase;
+ uint32_t isairq;
+ uint8_t slave_addr;
+ CharDriverState *chr;
+} ISAIPMIDevice;
+
+static int ipmi_isa_initfn(ISADevice *dev)
+{
+ ISAIPMIDevice *isa = DO_UPCAST(ISAIPMIDevice, dev, dev);
+ IPMIDeviceClass *k;
+ IPMIDevice *s;
+ struct smbios_type_38 smb38;
+ char typename[20];
+ DeviceState *idev;
+ DeviceState *bdev;
+ ISABus *isa_bus = isa_bus_from_device(dev);
+ int rc;
+ CharDriverState *chr;
+
+ if (!isa->interface)
+ isa->interface = g_strdup("kcs");
+
+ /* Clear the property from this device so we can put it elsewhere */
+ chr = isa->chr;
+ qdev_prop_set_chr(&dev->qdev, "chardev", NULL);
+
+ if (chr) {
+ bdev = qdev_create(NULL, "ipmi-bmc-extern");
+ qdev_prop_set_chr(bdev, "chardev", chr);
+ } else {
+ bdev = qdev_create(NULL, "ipmi-bmc-sim");
+ }
+ snprintf(typename, sizeof(typename), "ipmi-interface-%s", isa->interface);
+ idev = qdev_create(&isa_bus->qbus, typename);
+ qdev_prop_set_ptr(bdev, "ipmiif", idev);
+ qdev_prop_set_uint64(idev, "iobase", isa->iobase);
+ qdev_prop_set_ptr(idev, "bmc", bdev);
+ qdev_prop_set_uint8(idev, "slave-addr", isa->slave_addr);
+ rc = qdev_init(idev);
+ if (rc)
+ return rc;
+ rc = qdev_init(bdev);
+ if (rc)
+ return rc;
+
+ k = IPMI_DEVICE_GET_CLASS(idev);
+ s = IPMI_DEVICE(idev);
+
+ if (isa->isairq != 0) {
+ isa_init_irq(dev, &s->irq, isa->isairq);
+ s->use_irq = 1;
+ }
+
+ qdev_set_legacy_instance_id(&dev->qdev, s->io_base, s->io_length);
+
+ isa_register_ioport(dev, &s->io, s->io_base);
+
+ smb38.header.type = 38;
+ smb38.header.length = sizeof(smb38);
+ smb38.header.handle = 0x3000;
+ smb38.interface_type = k->smbios_type;
+ smb38.ipmi_version = 0x20;
+ smb38.i2c_slave_addr = s->slave_addr;
+ smb38.nv_storage_dev_addr = 0;
+
+ /* or 1 to set it to I/O space */
+ smb38.base_addr = s->io_base | 1;
+
+ /* 1-byte boundaries, addr bit0=0, level triggered irq */
+ smb38.base_addr_mod_and_irq_info = 1;
+ smb38.interrupt_number = isa->isairq;
+ smbios_table_entry_add((struct smbios_structure_header *) &smb38);
+
+ return 0;
+}
+
+static Property ipmi_isa_properties[] = {
+ DEFINE_PROP_STRING("interface", ISAIPMIDevice, interface),
+ DEFINE_PROP_HEX32("iobase", ISAIPMIDevice, iobase, 0),
+ DEFINE_PROP_UINT32("irq", ISAIPMIDevice, isairq, 5),
+ DEFINE_PROP_UINT8("slave_addr", ISAIPMIDevice, slave_addr, 0),
+ DEFINE_PROP_CHR("chardev", ISAIPMIDevice, chr),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+#if 0 /* FIXME */
+static const VMStateDescription vmstate_isa_ipmi = {
+ .name = "isa-ipmi",
+ .version_id = 3,
+ .minimum_version_id = 3,
+ .fields = (VMStateField []) {
+ /* FIXME - fill this in */
+ VMSTATE_END_OF_LIST()
+ }
+};
+#endif
+
+static void ipmi_isa_class_initfn(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
+ ic->init = ipmi_isa_initfn;
+ //dc->vmsd = &vmstate_isa_ipmi;
+ dc->props = ipmi_isa_properties;
+}
+
+static TypeInfo ipmi_isa_info = {
+ .name = "isa-ipmi",
+ .parent = TYPE_ISA_DEVICE,
+ .instance_size = sizeof(ISAIPMIDevice),
+ .class_init = ipmi_isa_class_initfn,
+};
+
+static void ipmi_register_types(void)
+{
+ type_register_static(&ipmi_isa_info);
+ qdev_add_prefw_init("isa-ipmi");
+}
+
+type_init(ipmi_register_types)
diff --git a/hw/smbios.h b/hw/smbios.h
index 6431a15..b9e4a61 100644
--- a/hw/smbios.h
+++ b/hw/smbios.h
@@ -155,6 +155,18 @@ struct smbios_type_32 {
uint8_t boot_status;
} QEMU_PACKED;
+/* SMBIOS type 38 - IPMI Device Information */
+struct smbios_type_38 {
+ struct smbios_structure_header header;
+ uint8_t interface_type;
+ uint8_t ipmi_version;
+ uint8_t i2c_slave_addr;
+ uint8_t nv_storage_dev_addr;
+ uint64_t base_addr;
+ uint8_t base_addr_mod_and_irq_info;
+ uint8_t interrupt_number;
+} QEMU_PACKED;
+
/* SMBIOS type 127 -- End-of-table */
struct smbios_type_127 {
struct smbios_structure_header header;
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 13/16] IPMI: Add a KCS low-level interface
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
` (10 preceding siblings ...)
2012-07-15 20:25 ` [Qemu-devel] [PATCH 12/16] IPMI: Add a PC ISA type structure minyard
@ 2012-07-15 20:25 ` minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 14/16] IPMI: Add a BT " minyard
` (4 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: minyard @ 2012-07-15 20:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
This provides the simulation of the KCS hardware interface.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/Makefile.objs | 1 +
hw/ipmi_kcs.c | 329 ++++++++++++++++++++++++++++++++++++
4 files changed, 332 insertions(+), 0 deletions(-)
create mode 100644 hw/ipmi_kcs.c
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index c0aff0d..b549389 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -9,6 +9,7 @@ CONFIG_VMWARE_VGA=y
CONFIG_VMMOUSE=y
CONFIG_IPMI=y
CONFIG_ISA_IPMI=y
+CONFIG_IPMI_KCS=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index 615e4f2..af7d2a9 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -9,6 +9,7 @@ CONFIG_VMWARE_VGA=y
CONFIG_VMMOUSE=y
CONFIG_IPMI=y
CONFIG_ISA_IPMI=y
+CONFIG_IPMI_KCS=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index 928870b..12cc9a2 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -22,6 +22,7 @@ hw-obj-$(CONFIG_EMPTY_SLOT) += empty_slot.o
hw-obj-$(CONFIG_IPMI) += ipmi.o
hw-obj-$(CONFIG_ISA_IPMI) += isa_ipmi.o
+hw-obj-$(CONFIG_IPMI_KCS) += ipmi_kcs.o
hw-obj-$(CONFIG_SERIAL) += serial.o
hw-obj-$(CONFIG_PARALLEL) += parallel.o
diff --git a/hw/ipmi_kcs.c b/hw/ipmi_kcs.c
new file mode 100644
index 0000000..fb0a9b4
--- /dev/null
+++ b/hw/ipmi_kcs.c
@@ -0,0 +1,329 @@
+/*
+ * QEMU IPMI KCS emulation
+ *
+ * Copyright (c) 2012 Corey Minyard, MontaVista Software, LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "hw.h"
+#include "ipmi.h"
+
+#define IPMI_KCS_OBF_BIT 0
+#define IPMI_KCS_IBF_BIT 1
+#define IPMI_KCS_SMS_ATN_BIT 2
+#define IPMI_KCS_CD_BIT 3
+
+#define IPMI_KCS_OBF_MASK (1 << IPMI_KCS_OBF_BIT)
+#define IPMI_KCS_GET_OBF(d) (((d) >> IPMI_KCS_OBF_BIT) & 0x1)
+#define IPMI_KCS_SET_OBF(d,v) (d) = (((d) & ~IPMI_KCS_OBF_MASK) | \
+ (((v) & 1) << IPMI_KCS_OBF_BIT))
+#define IPMI_KCS_IBF_MASK (1 << IPMI_KCS_IBF_BIT)
+#define IPMI_KCS_GET_IBF(d) (((d) >> IPMI_KCS_IBF_BIT) & 0x1)
+#define IPMI_KCS_SET_IBF(d,v) (d) = (((d) & ~IPMI_KCS_IBF_MASK) | \
+ (((v) & 1) << IPMI_KCS_IBF_BIT))
+#define IPMI_KCS_SMS_ATN_MASK (1 << IPMI_KCS_SMS_ATN_BIT)
+#define IPMI_KCS_GET_SMS_ATN(d) (((d) >> IPMI_KCS_SMS_ATN_BIT) & 0x1)
+#define IPMI_KCS_SET_SMS_ATN(d,v) (d) = (((d) & ~IPMI_KCS_SMS_ATN_MASK) | \
+ (((v) & 1) << IPMI_KCS_SMS_ATN_BIT))
+#define IPMI_KCS_CD_MASK (1 << IPMI_KCS_CD_BIT)
+#define IPMI_KCS_GET_CD(d) (((d) >> IPMI_KCS_CD_BIT) & 0x1)
+#define IPMI_KCS_SET_CD(d,v) (d) = (((d) & ~IPMI_KCS_CD_MASK) | \
+ (((v) & 1) << IPMI_KCS_CD_BIT))
+
+#define IPMI_KCS_IDLE_STATE 0
+#define IPMI_KCS_READ_STATE 1
+#define IPMI_KCS_WRITE_STATE 2
+#define IPMI_KCS_ERROR_STATE 3
+
+#define IPMI_KCS_GET_STATE(d) (((d) >> 6) & 0x3)
+#define IPMI_KCS_SET_STATE(d,v) ((d) = ((d) & ~0xc0) | (((v) & 0x3) << 6))
+
+#define IPMI_KCS_ABORT_STATUS_CMD 0x60
+#define IPMI_KCS_WRITE_START_CMD 0x61
+#define IPMI_KCS_WRITE_END_CMD 0x62
+#define IPMI_KCS_READ_CMD 0x68
+
+#define IPMI_KCS_STATUS_NO_ERR 0x00
+#define IPMI_KCS_STATUS_ABORTED_ERR 0x01
+#define IPMI_KCS_STATUS_BAD_CC_ERR 0x02
+#define IPMI_KCS_STATUS_LENGTH_ERR 0x06
+
+typedef struct IPMIKcsDevice {
+ IPMIDevice idev;
+
+ uint8_t status_reg;
+ uint8_t data_out_reg;
+
+ int data_in_reg; /* -1 means not written */
+ int cmd_reg;
+
+ /*
+ * This is a response number that we send with the command to make
+ * sure that the response matches the command.
+ */
+ uint8_t waiting_rsp;
+} IPMIKcsDevice;
+
+#define SET_OBF() \
+ do { \
+ IPMI_KCS_SET_OBF(kcs->status_reg, 1); \
+ if (s->use_irq && s->irqs_enabled && !s->obf_irq_set) { \
+ s->obf_irq_set = 1; \
+ if (!s->atn_irq_set) \
+ qemu_irq_raise(s->irq); \
+ } \
+ } while (0)
+
+static void ipmi_kcs_handle_event(IPMIDevice *s)
+{
+ IPMIKcsDevice *kcs = DO_UPCAST(IPMIKcsDevice, idev, s);
+
+ if (kcs->cmd_reg == IPMI_KCS_ABORT_STATUS_CMD) {
+ if (IPMI_KCS_GET_STATE(kcs->status_reg) != IPMI_KCS_ERROR_STATE) {
+ kcs->waiting_rsp++; /* Invalidate the message */
+ s->outmsg[0] = IPMI_KCS_STATUS_ABORTED_ERR;
+ s->outlen = 1;
+ s->outpos = 0;
+ IPMI_KCS_SET_STATE(kcs->status_reg, IPMI_KCS_ERROR_STATE);
+ SET_OBF();
+ }
+ goto out;
+ }
+
+ switch (IPMI_KCS_GET_STATE(kcs->status_reg)) {
+ case IPMI_KCS_IDLE_STATE:
+ if (kcs->cmd_reg == IPMI_KCS_WRITE_START_CMD) {
+ IPMI_KCS_SET_STATE(kcs->status_reg, IPMI_KCS_WRITE_STATE);
+ kcs->cmd_reg = -1;
+ s->write_end = 0;
+ s->inlen = 0;
+ SET_OBF();
+ }
+ break;
+
+ case IPMI_KCS_READ_STATE:
+ handle_read:
+ if (s->outpos >= s->outlen) {
+ IPMI_KCS_SET_STATE(kcs->status_reg, IPMI_KCS_IDLE_STATE);
+ SET_OBF();
+ } else if (kcs->data_in_reg == IPMI_KCS_READ_CMD) {
+ kcs->data_out_reg = s->outmsg[s->outpos];
+ s->outpos++;
+ SET_OBF();
+ } else {
+ s->outmsg[0] = IPMI_KCS_STATUS_BAD_CC_ERR;
+ s->outlen = 1;
+ s->outpos = 0;
+ IPMI_KCS_SET_STATE(kcs->status_reg, IPMI_KCS_ERROR_STATE);
+ SET_OBF();
+ goto out;
+ }
+ break;
+
+ case IPMI_KCS_WRITE_STATE:
+ if (kcs->data_in_reg != -1) {
+ /*
+ * Don't worry about input overrun here, that will be
+ * handled in the BMC.
+ */
+ if (s->inlen < sizeof(s->inmsg))
+ s->inmsg[s->inlen] = kcs->data_in_reg;
+ s->inlen++;
+ }
+ if (s->write_end) {
+ IPMIBmcClass *bk = IPMI_BMC_GET_CLASS(s->bmc);
+ s->outlen = 0;
+ s->write_end = 0;
+ s->outpos = 0;
+ bk->handle_command(s->bmc, s->inmsg, s->inlen, sizeof(s->inmsg),
+ kcs->waiting_rsp);
+ goto out_noibf;
+ } else if (kcs->cmd_reg == IPMI_KCS_WRITE_END_CMD) {
+ kcs->cmd_reg = -1;
+ s->write_end = 1;
+ }
+ SET_OBF();
+ break;
+
+ case IPMI_KCS_ERROR_STATE:
+ if (kcs->data_in_reg != -1) {
+ IPMI_KCS_SET_STATE(kcs->status_reg, IPMI_KCS_READ_STATE);
+ kcs->data_in_reg = IPMI_KCS_READ_CMD;
+ goto handle_read;
+ }
+ break;
+ }
+
+ if (kcs->cmd_reg != -1) {
+ /* Got an invalid command */
+ s->outmsg[0] = IPMI_KCS_STATUS_BAD_CC_ERR;
+ s->outlen = 1;
+ s->outpos = 0;
+ IPMI_KCS_SET_STATE(kcs->status_reg, IPMI_KCS_ERROR_STATE);
+ }
+
+ out:
+ kcs->cmd_reg = -1;
+ kcs->data_in_reg = -1;
+ IPMI_KCS_SET_IBF(kcs->status_reg, 0);
+ out_noibf:
+ return;
+}
+
+static void ipmi_kcs_handle_rsp(IPMIDevice *s, uint8_t msg_id,
+ unsigned char *rsp, unsigned int rsp_len)
+{
+ IPMIKcsDevice *kcs = DO_UPCAST(IPMIKcsDevice, idev, s);
+
+ /* ipmi_lock is already claimed. */
+ if (kcs->waiting_rsp == msg_id) {
+ kcs->waiting_rsp++;
+ if (rsp_len > sizeof(s->outmsg)) {
+ s->outmsg[0] = rsp[0];
+ s->outmsg[1] = rsp[1];
+ s->outmsg[2] = IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES;
+ s->outlen = 3;
+ } else {
+ memcpy(s->outmsg, rsp, rsp_len);
+ s->outlen = rsp_len;
+ }
+ IPMI_KCS_SET_STATE(kcs->status_reg, IPMI_KCS_READ_STATE);
+ kcs->data_in_reg = IPMI_KCS_READ_CMD;
+ ipmi_signal(&kcs->idev);
+ }
+}
+
+
+static uint32_t ipmi_kcs_ioport_read(void *opaque, uint32_t addr)
+{
+ IPMIKcsDevice *kcs = opaque;
+ uint32_t ret;
+
+ ipmi_lock(&kcs->idev);
+ switch(addr & 1) {
+ case 0:
+ ret = kcs->data_out_reg;
+ IPMI_KCS_SET_OBF(kcs->status_reg, 0);
+ if (kcs->idev.obf_irq_set) {
+ kcs->idev.obf_irq_set = 0;
+ if (!kcs->idev.atn_irq_set)
+ qemu_irq_lower(kcs->idev.irq);
+ }
+ break;
+ case 1:
+ ret = kcs->status_reg;
+ if (kcs->idev.atn_irq_set) {
+ kcs->idev.atn_irq_set = 0;
+ if (!kcs->idev.obf_irq_set)
+ qemu_irq_lower(kcs->idev.irq);
+ }
+ break;
+ }
+ ipmi_unlock(&kcs->idev);
+ return ret;
+}
+
+static void ipmi_kcs_ioport_write(void *opaque, uint32_t addr, uint32_t val)
+{
+ IPMIKcsDevice *kcs = opaque;
+ IPMIDevice *s = &kcs->idev;
+
+ if (IPMI_KCS_GET_IBF(kcs->status_reg))
+ return;
+
+ ipmi_lock(s);
+ switch(addr & 1) {
+ case 0:
+ kcs->data_in_reg = val;
+ break;
+
+ case 1:
+ kcs->cmd_reg = val;
+ break;
+ }
+ IPMI_KCS_SET_IBF(kcs->status_reg, 1);
+ ipmi_signal(s);
+ ipmi_unlock(s);
+}
+
+static const MemoryRegionPortio ipmi_kcs_portio[] = {
+ { 0, 2, 1, .read = ipmi_kcs_ioport_read, .write = ipmi_kcs_ioport_write },
+ PORTIO_END_OF_LIST()
+};
+
+static const MemoryRegionOps ipmi_kcs_io_ops = {
+ .old_portio = ipmi_kcs_portio
+};
+
+static void ipmi_kcs_set_atn(IPMIDevice *s, int val, int irq)
+{
+ IPMIKcsDevice *kcs = DO_UPCAST(IPMIKcsDevice, idev, s);
+
+ IPMI_KCS_SET_SMS_ATN(kcs->status_reg, val);
+ if (val) {
+ if (irq && !s->atn_irq_set && s->use_irq && s->irqs_enabled) {
+ s->atn_irq_set = 1;
+ if (!s->obf_irq_set)
+ qemu_irq_raise(s->irq);
+ }
+ } else {
+ if (s->atn_irq_set) {
+ s->atn_irq_set = 0;
+ if (!s->obf_irq_set)
+ qemu_irq_lower(s->irq);
+ }
+ }
+}
+
+static int ipmi_kcs_init(IPMIDevice *s)
+{
+ if (!s->io_base)
+ s->io_base = 0xca0;
+ s->io_length = 2;
+
+ memory_region_init_io(&s->io, &ipmi_kcs_io_ops,
+ DO_UPCAST(IPMIKcsDevice, idev, s), "ipmi-kcs", 2);
+
+ return 0;
+}
+
+static void ipmi_kcs_class_init(ObjectClass *klass, void *data)
+{
+ IPMIDeviceClass *k = IPMI_DEVICE_CLASS(klass);
+
+ k->init = ipmi_kcs_init;
+ k->smbios_type = IPMI_SMBIOS_KCS;
+ k->set_atn = ipmi_kcs_set_atn;
+ k->handle_rsp = ipmi_kcs_handle_rsp;
+ k->handle_if_event = ipmi_kcs_handle_event;
+}
+
+static TypeInfo ipmi_kcs_type = {
+ .name = "ipmi-interface-kcs",
+ .parent = TYPE_IPMI_DEVICE,
+ .instance_size = sizeof(IPMIKcsDevice),
+ .class_init = ipmi_kcs_class_init,
+};
+
+static void ipmi_kcs_register_types(void)
+{
+ type_register_static(&ipmi_kcs_type);
+}
+
+type_init(ipmi_kcs_register_types)
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 14/16] IPMI: Add a BT low-level interface
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
` (11 preceding siblings ...)
2012-07-15 20:25 ` [Qemu-devel] [PATCH 13/16] IPMI: Add a KCS low-level interface minyard
@ 2012-07-15 20:25 ` minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 15/16] IPMI: Add a local BMC simulation minyard
` (3 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: minyard @ 2012-07-15 20:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
This provides the simulation of the BT hardware interface for
IPMI.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/Makefile.objs | 1 +
hw/ipmi_bt.c | 354 ++++++++++++++++++++++++++++++++++++
4 files changed, 357 insertions(+), 0 deletions(-)
create mode 100644 hw/ipmi_bt.c
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index b549389..f8f8e6d 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -10,6 +10,7 @@ CONFIG_VMMOUSE=y
CONFIG_IPMI=y
CONFIG_ISA_IPMI=y
CONFIG_IPMI_KCS=y
+CONFIG_IPMI_BT=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index af7d2a9..8c1177d 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -10,6 +10,7 @@ CONFIG_VMMOUSE=y
CONFIG_IPMI=y
CONFIG_ISA_IPMI=y
CONFIG_IPMI_KCS=y
+CONFIG_IPMI_BT=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index 12cc9a2..c6f54fb 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -23,6 +23,7 @@ hw-obj-$(CONFIG_EMPTY_SLOT) += empty_slot.o
hw-obj-$(CONFIG_IPMI) += ipmi.o
hw-obj-$(CONFIG_ISA_IPMI) += isa_ipmi.o
hw-obj-$(CONFIG_IPMI_KCS) += ipmi_kcs.o
+hw-obj-$(CONFIG_IPMI_BT) += ipmi_bt.o
hw-obj-$(CONFIG_SERIAL) += serial.o
hw-obj-$(CONFIG_PARALLEL) += parallel.o
diff --git a/hw/ipmi_bt.c b/hw/ipmi_bt.c
new file mode 100644
index 0000000..d8525ef
--- /dev/null
+++ b/hw/ipmi_bt.c
@@ -0,0 +1,354 @@
+/*
+ * QEMU IPMI BT emulation
+ *
+ * Copyright (c) 2012 Corey Minyard, MontaVista Software, LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "hw.h"
+
+#include "ipmi.h"
+
+/* Control register */
+#define IPMI_BT_CLR_WR_BIT 0
+#define IPMI_BT_CLR_RD_BIT 1
+#define IPMI_BT_H2B_ATN_BIT 2
+#define IPMI_BT_B2H_ATN_BIT 3
+#define IPMI_BT_SMS_ATN_BIT 4
+#define IPMI_BT_HBUSY_BIT 6
+#define IPMI_BT_BBUSY_BIT 7
+
+#define IPMI_BT_CLR_WR_MASK (1 << IPMI_BT_CLR_WR_BIT)
+#define IPMI_BT_GET_CLR_WR(d) (((d) >> IPMI_BT_CLR_WR_BIT) & 0x1)
+#define IPMI_BT_SET_CLR_WR(d,v) (d) = (((d) & ~IPMI_BT_CLR_WR_MASK) | \
+ (((v & 1) << IPMI_BT_CLR_WR_BIT)))
+
+#define IPMI_BT_CLR_RD_MASK (1 << IPMI_BT_CLR_RD_BIT)
+#define IPMI_BT_GET_CLR_RD(d) (((d) >> IPMI_BT_CLR_RD_BIT) & 0x1)
+#define IPMI_BT_SET_CLR_RD(d,v) (d) = (((d) & ~IPMI_BT_CLR_RD_MASK) | \
+ (((v & 1) << IPMI_BT_CLR_RD_BIT)))
+
+#define IPMI_BT_H2B_ATN_MASK (1 << IPMI_BT_H2B_ATN_BIT)
+#define IPMI_BT_GET_H2B_ATN(d) (((d) >> IPMI_BT_H2B_ATN_BIT) & 0x1)
+#define IPMI_BT_SET_H2B_ATN(d,v) (d) = (((d) & ~IPMI_BT_H2B_ATN_MASK) | \
+ (((v & 1) << IPMI_BT_H2B_ATN_BIT)))
+
+#define IPMI_BT_B2H_ATN_MASK (1 << IPMI_BT_B2H_ATN_BIT)
+#define IPMI_BT_GET_B2H_ATN(d) (((d) >> IPMI_BT_B2H_ATN_BIT) & 0x1)
+#define IPMI_BT_SET_B2H_ATN(d,v) (d) = (((d) & ~IPMI_BT_B2H_ATN_MASK) | \
+ (((v & 1) << IPMI_BT_B2H_ATN_BIT)))
+
+#define IPMI_BT_SMS_ATN_MASK (1 << IPMI_BT_SMS_ATN_BIT)
+#define IPMI_BT_GET_SMS_ATN(d) (((d) >> IPMI_BT_SMS_ATN_BIT) & 0x1)
+#define IPMI_BT_SET_SMS_ATN(d,v) (d) = (((d) & ~IPMI_BT_SMS_ATN_MASK) | \
+ (((v & 1) << IPMI_BT_SMS_ATN_BIT)))
+
+#define IPMI_BT_HBUSY_MASK (1 << IPMI_BT_HBUSY_BIT)
+#define IPMI_BT_GET_HBUSY(d) (((d) >> IPMI_BT_HBUSY_BIT) & 0x1)
+#define IPMI_BT_SET_HBUSY(d,v) (d) = (((d) & ~IPMI_BT_HBUSY_MASK) | \
+ (((v & 1) << IPMI_BT_HBUSY_BIT)))
+
+#define IPMI_BT_BBUSY_MASK (1 << IPMI_BT_BBUSY_BIT)
+#define IPMI_BT_GET_BBUSY(d) (((d) >> IPMI_BT_BBUSY_BIT) & 0x1)
+#define IPMI_BT_SET_BBUSY(d,v) (d) = (((d) & ~IPMI_BT_BBUSY_MASK) | \
+ (((v & 1) << IPMI_BT_BBUSY_BIT)))
+
+
+/* Mask register */
+#define IPMI_BT_B2H_IRQ_EN_BIT 0
+#define IPMI_BT_B2H_IRQ_BIT 1
+
+#define IPMI_BT_B2H_IRQ_EN_MASK (1 << IPMI_BT_B2H_IRQ_EN_BIT)
+#define IPMI_BT_GET_B2H_IRQ_EN(d) (((d) >> IPMI_BT_B2H_IRQ_EN_BIT) & 0x1)
+#define IPMI_BT_SET_B2H_IRQ_EN(d,v) (d) = (((d) & ~IPMI_BT_B2H_IRQ_EN_MASK) | \
+ (((v & 1) << IPMI_BT_B2H_IRQ_EN_BIT)))
+
+#define IPMI_BT_B2H_IRQ_MASK (1 << IPMI_BT_B2H_IRQ_BIT)
+#define IPMI_BT_GET_B2H_IRQ(d) (((d) >> IPMI_BT_B2H_IRQ_BIT) & 0x1)
+#define IPMI_BT_SET_B2H_IRQ(d,v) (d) = (((d) & ~IPMI_BT_B2H_IRQ_MASK) | \
+ (((v & 1) << IPMI_BT_B2H_IRQ_BIT)))
+
+typedef struct IPMIBtDevice {
+ IPMIDevice idev;
+ uint8_t control_reg;
+ uint8_t mask_reg;
+
+ /*
+ * This is a response number that we send with the command to make
+ * sure that the response matches the command.
+ */
+ uint8_t waiting_rsp;
+ uint8_t waiting_seq;
+} IPMIBtDevice;
+
+#define IPMI_CMD_GET_BT_INTF_CAP 0x36
+
+static void ipmi_bt_handle_event(IPMIDevice *s)
+{
+ IPMIBtDevice *bt = DO_UPCAST(IPMIBtDevice, idev, s);
+
+ ipmi_lock(s);
+ if (s->inlen < 4)
+ goto out;
+ /* Note that overruns are handled by handle_command */
+ if (s->inmsg[0] != (s->inlen - 1)) {
+ /* Length mismatch, just ignore. */
+ IPMI_BT_SET_BBUSY(bt->control_reg, 1);
+ s->inlen = 0;
+ goto out;
+ }
+ if ((s->inmsg[1] == (IPMI_NETFN_APP << 2)) &&
+ (s->inmsg[3] == IPMI_CMD_GET_BT_INTF_CAP)) {
+ /* We handle this one ourselves. */
+ s->outmsg[0] = 9;
+ s->outmsg[1] = s->inmsg[1] | 0x04;
+ s->outmsg[2] = s->inmsg[2];
+ s->outmsg[3] = s->inmsg[3];
+ s->outmsg[4] = 0;
+ s->outmsg[5] = 1; /* Only support 1 outstanding request. */
+ if (sizeof(s->inmsg) > 0xff) /* Input buffer size */
+ s->outmsg[6] = 0xff;
+ else
+ s->outmsg[6] = (unsigned char ) sizeof(s->inmsg);
+ if (sizeof(s->outmsg) > 0xff) /* Output buffer size */
+ s->outmsg[7] = 0xff;
+ else
+ s->outmsg[7] = (unsigned char) sizeof(s->outmsg);
+ s->outmsg[8] = 10; /* Max request to response time */
+ s->outmsg[9] = 0; /* Don't recommend retries */
+ s->outlen = 10;
+ IPMI_BT_SET_BBUSY(bt->control_reg, 0);
+ IPMI_BT_SET_B2H_ATN(bt->control_reg, 1);
+ if (s->use_irq && s->irqs_enabled &&
+ !IPMI_BT_GET_B2H_IRQ(bt->mask_reg) &&
+ IPMI_BT_GET_B2H_IRQ_EN(bt->mask_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 1);
+ qemu_irq_raise(s->irq);
+ }
+ goto out;
+ }
+ bt->waiting_seq = s->inmsg[2];
+ s->inmsg[2] = s->inmsg[1];
+ {
+ IPMIBmcClass *bk = IPMI_BMC_GET_CLASS(s->bmc);
+ bk->handle_command(s->bmc, s->inmsg + 2, s->inlen - 2, sizeof(s->inmsg),
+ bt->waiting_rsp);
+ }
+ out:
+ ipmi_unlock(s);
+}
+
+static void ipmi_bt_handle_rsp(IPMIDevice *s, uint8_t msg_id,
+ unsigned char *rsp, unsigned int rsp_len)
+{
+ IPMIBtDevice *bt = DO_UPCAST(IPMIBtDevice, idev, s);
+
+ /* ipmi_lock is already claimed. */
+ if (bt->waiting_rsp == msg_id) {
+ bt->waiting_rsp++;
+ if (rsp_len > (sizeof(s->outmsg) - 2)) {
+ s->outmsg[0] = 4;
+ s->outmsg[1] = rsp[0];
+ s->outmsg[2] = bt->waiting_seq;
+ s->outmsg[3] = rsp[1];
+ s->outmsg[4] = IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES;
+ s->outlen = 5;
+ } else {
+ s->outmsg[0] = rsp_len + 1;
+ s->outmsg[1] = rsp[0];
+ s->outmsg[2] = bt->waiting_seq;
+ memcpy(s->outmsg + 3, rsp + 1, rsp_len - 1);
+ s->outlen = rsp_len + 2;
+ }
+ IPMI_BT_SET_BBUSY(bt->control_reg, 0);
+ IPMI_BT_SET_B2H_ATN(bt->control_reg, 1);
+ if (s->use_irq && s->irqs_enabled &&
+ !IPMI_BT_GET_B2H_IRQ(bt->mask_reg) &&
+ IPMI_BT_GET_B2H_IRQ_EN(bt->mask_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 1);
+ qemu_irq_raise(s->irq);
+ }
+ }
+}
+
+
+static uint32_t ipmi_bt_ioport_read(void *opaque, uint32_t addr)
+{
+ IPMIBtDevice *bt = opaque;
+ IPMIDevice *s = &bt->idev;
+ uint32_t ret = 0xff;
+
+ ipmi_lock(s);
+ switch(addr & 3) {
+ case 0:
+ ret = bt->control_reg;
+ break;
+ case 1:
+ if (s->outpos < s->outlen) {
+ ret = s->outmsg[s->outpos];
+ s->outpos++;
+ if (s->outpos == s->outlen) {
+ s->outpos = 0;
+ s->outlen = 0;
+ }
+ } else {
+ ret = 0xff;
+ }
+ break;
+ case 2:
+ ret = bt->mask_reg;
+ break;
+ }
+ ipmi_unlock(s);
+ return ret;
+}
+
+static void ipmi_bt_ioport_write(void *opaque, uint32_t addr, uint32_t val)
+{
+ IPMIBtDevice *bt = opaque;
+ IPMIDevice *s = &bt->idev;
+
+ ipmi_lock(s);
+ switch(addr & 3) {
+ case 0:
+ if (IPMI_BT_GET_CLR_WR(val)) {
+ s->inlen = 0;
+ }
+ if (IPMI_BT_GET_CLR_RD(val)) {
+ s->outpos = 0;
+ }
+ if (IPMI_BT_GET_B2H_ATN(val)) {
+ IPMI_BT_SET_B2H_ATN(bt->control_reg, 0);
+ }
+ if (IPMI_BT_GET_SMS_ATN(val)) {
+ IPMI_BT_SET_SMS_ATN(bt->control_reg, 0);
+ }
+ if (IPMI_BT_GET_HBUSY(val)) {
+ /* Toggle */
+ IPMI_BT_SET_HBUSY(bt->control_reg,
+ !IPMI_BT_GET_HBUSY(bt->control_reg));
+ }
+ if (IPMI_BT_GET_H2B_ATN(val)) {
+ IPMI_BT_SET_BBUSY(bt->control_reg, 1);
+ ipmi_signal(s);
+ }
+ break;
+
+ case 1:
+ if (s->inlen < sizeof(s->inmsg))
+ s->inmsg[s->inlen] = val;
+ s->inlen++;
+ break;
+
+ case 2:
+ if (IPMI_BT_GET_B2H_IRQ_EN(val) !=
+ IPMI_BT_GET_B2H_IRQ_EN(bt->mask_reg)) {
+ if (IPMI_BT_GET_B2H_IRQ_EN(val)) {
+ if (IPMI_BT_GET_B2H_ATN(bt->control_reg) ||
+ IPMI_BT_GET_SMS_ATN(bt->control_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 1);
+ qemu_irq_raise(s->irq);
+ }
+ IPMI_BT_SET_B2H_IRQ_EN(bt->mask_reg, 1);
+ } else {
+ if (IPMI_BT_GET_B2H_IRQ(bt->mask_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 0);
+ qemu_irq_lower(s->irq);
+ }
+ IPMI_BT_SET_B2H_IRQ_EN(bt->mask_reg, 0);
+ }
+ }
+ if (IPMI_BT_GET_B2H_IRQ(val) && IPMI_BT_GET_B2H_IRQ(bt->mask_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 0);
+ qemu_irq_lower(s->irq);
+ }
+ break;
+ }
+ ipmi_unlock(s);
+}
+
+static const MemoryRegionPortio ipmi_bt_portio[] = {
+ { 0, 3, 1, .read = ipmi_bt_ioport_read, .write = ipmi_bt_ioport_write },
+ PORTIO_END_OF_LIST()
+};
+
+static const MemoryRegionOps ipmi_bt_io_ops = {
+ .old_portio = ipmi_bt_portio
+};
+
+static void ipmi_bt_set_atn(IPMIDevice *s, int val, int irq)
+{
+ IPMIBtDevice *bt = DO_UPCAST(IPMIBtDevice, idev, s);
+
+ if (!!val == IPMI_BT_GET_SMS_ATN(bt->control_reg))
+ return;
+
+ IPMI_BT_SET_SMS_ATN(bt->control_reg, val);
+ if (val) {
+ if (irq && s->use_irq && s->irqs_enabled &&
+ !IPMI_BT_GET_B2H_ATN(bt->control_reg) &&
+ IPMI_BT_GET_B2H_IRQ_EN(bt->mask_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 1);
+ qemu_irq_raise(s->irq);
+ }
+ } else {
+ if (!IPMI_BT_GET_B2H_ATN(bt->control_reg) &&
+ IPMI_BT_GET_B2H_IRQ(bt->mask_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 0);
+ qemu_irq_lower(s->irq);
+ }
+ }
+}
+
+static int ipmi_bt_init(IPMIDevice *s)
+{
+ if (!s->io_base)
+ s->io_base = 0xe4;
+ s->io_length = 3;
+
+ memory_region_init_io(&s->io, &ipmi_bt_io_ops,
+ DO_UPCAST(IPMIBtDevice, idev, s), "ipmi-bt", 3);
+
+ return 0;
+}
+
+static void ipmi_bt_class_init(ObjectClass *klass, void *data)
+{
+ IPMIDeviceClass *k = IPMI_DEVICE_CLASS(klass);
+
+ k->init = ipmi_bt_init;
+ k->smbios_type = IPMI_SMBIOS_BT;
+ k->set_atn = ipmi_bt_set_atn;
+ k->handle_rsp = ipmi_bt_handle_rsp;
+ k->handle_if_event = ipmi_bt_handle_event;
+}
+
+static TypeInfo ipmi_bt_type = {
+ .name = "ipmi-interface-bt",
+ .parent = TYPE_IPMI_DEVICE,
+ .instance_size = sizeof(IPMIBtDevice),
+ .class_init = ipmi_bt_class_init,
+};
+
+static void ipmi_bt_register_types(void)
+{
+ type_register_static(&ipmi_bt_type);
+}
+
+type_init(ipmi_bt_register_types)
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 15/16] IPMI: Add a local BMC simulation
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
` (12 preceding siblings ...)
2012-07-15 20:25 ` [Qemu-devel] [PATCH 14/16] IPMI: Add a BT " minyard
@ 2012-07-15 20:25 ` minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 16/16] IPMI: Add an external connection simulation interface minyard
` (2 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: minyard @ 2012-07-15 20:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
This provides a minimal local BMC, basically enough to comply with the
spec and provide a complete watchdog timer (including a sensor, SDR,
and event).
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/Makefile.objs | 1 +
hw/ipmi_sim.c | 1528 ++++++++++++++++++++++++++++++++++++
4 files changed, 1531 insertions(+), 0 deletions(-)
create mode 100644 hw/ipmi_sim.c
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index f8f8e6d..8c99d5d 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -11,6 +11,7 @@ CONFIG_IPMI=y
CONFIG_ISA_IPMI=y
CONFIG_IPMI_KCS=y
CONFIG_IPMI_BT=y
+CONFIG_IPMI_LOCAL=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index 8c1177d..4d01883 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -11,6 +11,7 @@ CONFIG_IPMI=y
CONFIG_ISA_IPMI=y
CONFIG_IPMI_KCS=y
CONFIG_IPMI_BT=y
+CONFIG_IPMI_LOCAL=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index c6f54fb..1b707d7 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -24,6 +24,7 @@ hw-obj-$(CONFIG_IPMI) += ipmi.o
hw-obj-$(CONFIG_ISA_IPMI) += isa_ipmi.o
hw-obj-$(CONFIG_IPMI_KCS) += ipmi_kcs.o
hw-obj-$(CONFIG_IPMI_BT) += ipmi_bt.o
+hw-obj-$(CONFIG_IPMI_LOCAL) += ipmi_sim.o
hw-obj-$(CONFIG_SERIAL) += serial.o
hw-obj-$(CONFIG_PARALLEL) += parallel.o
diff --git a/hw/ipmi_sim.c b/hw/ipmi_sim.c
new file mode 100644
index 0000000..b8e8f9b
--- /dev/null
+++ b/hw/ipmi_sim.c
@@ -0,0 +1,1528 @@
+/*
+ * IPMI BMC emulation
+ *
+ * Copyright (c) 2012 Corey Minyard, MontaVista Software, LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <stdint.h>
+#include "qemu-timer.h"
+#include "ipmi.h"
+
+#define IPMI_NETFN_CHASSIS 0x00
+#define IPMI_NETFN_CHASSIS_MAXCMD 0x03
+
+#define IPMI_CMD_GET_CHASSIS_CAPABILITIES 0x00
+#define IPMI_CMD_GET_CHASSIS_STATUS 0x01
+#define IPMI_CMD_CHASSIS_CONTROL 0x02
+
+#define IPMI_NETFN_SENSOR_EVENT 0x04
+#define IPMI_NETFN_SENSOR_EVENT_MAXCMD 0x2e
+
+#define IPMI_CMD_SET_SENSOR_EVT_ENABLE 0x28
+#define IPMI_CMD_GET_SENSOR_EVT_ENABLE 0x29
+#define IPMI_CMD_REARM_SENSOR_EVTS 0x2a
+#define IPMI_CMD_GET_SENSOR_EVT_STATUS 0x2b
+#define IPMI_CMD_GET_SENSOR_READING 0x2d
+
+/* #define IPMI_NETFN_APP 0x06 In ipmi.h */
+#define IPMI_NETFN_APP_MAXCMD 0x36
+
+#define IPMI_CMD_GET_DEVICE_ID 0x01
+#define IPMI_CMD_RESET_WATCHDOG_TIMER 0x22
+#define IPMI_CMD_SET_WATCHDOG_TIMER 0x24
+#define IPMI_CMD_GET_WATCHDOG_TIMER 0x25
+#define IPMI_CMD_SET_BMC_GLOBAL_ENABLES 0x2e
+#define IPMI_CMD_GET_BMC_GLOBAL_ENABLES 0x2f
+#define IPMI_CMD_CLR_MSG_FLAGS 0x30
+#define IPMI_CMD_GET_MSG_FLAGS 0x31
+#define IPMI_CMD_READ_EVT_MSG_BUF 0x35
+
+#define IPMI_NETFN_STORAGE 0x0a
+#define IPMI_NETFN_STORAGE_MAXCMD 0x4a
+
+#define IPMI_CMD_GET_SDR_REP_INFO 0x20
+#define IPMI_CMD_GET_SDR_REP_ALLOC_INFO 0x21
+#define IPMI_CMD_RESERVE_SDR_REP 0x22
+#define IPMI_CMD_GET_SDR 0x23
+#define IPMI_CMD_ADD_SDR 0x24
+#define IPMI_CMD_PARTIAL_ADD_SDR 0x25
+#define IPMI_CMD_DELETE_SDR 0x26
+#define IPMI_CMD_CLEAR_SDR_REP 0x27
+#define IPMI_CMD_GET_SDR_REP_TIME 0x28
+#define IPMI_CMD_SET_SDR_REP_TIME 0x29
+#define IPMI_CMD_ENTER_SDR_REP_UPD_MODE 0x2A
+#define IPMI_CMD_EXIT_SDR_REP_UPD_MODE 0x2B
+#define IPMI_CMD_RUN_INIT_AGENT 0x2C
+#define IPMI_CMD_GET_SEL_INFO 0x40
+#define IPMI_CMD_GET_SEL_ALLOC_INFO 0x41
+#define IPMI_CMD_RESERVE_SEL 0x42
+#define IPMI_CMD_GET_SEL_ENTRY 0x43
+#define IPMI_CMD_ADD_SEL_ENTRY 0x44
+#define IPMI_CMD_PARTIAL_ADD_SEL_ENTRY 0x45
+#define IPMI_CMD_DELETE_SEL_ENTRY 0x46
+#define IPMI_CMD_CLEAR_SEL 0x47
+#define IPMI_CMD_GET_SEL_TIME 0x48
+#define IPMI_CMD_SET_SEL_TIME 0x49
+
+
+/* Same as a timespec struct. */
+struct ipmi_time
+{
+ long tv_sec;
+ long tv_nsec;
+};
+
+#define MAX_SEL_SIZE 128
+
+typedef struct IPMISel {
+ uint8_t sel[MAX_SEL_SIZE][16];
+ unsigned int next_free;
+ long time_offset;
+ uint16_t reservation;
+ uint8_t last_addition[4];
+ uint8_t last_clear[4];
+ uint8_t overflow;
+} IPMISel;
+
+#define MAX_SDR_SIZE 16384
+
+typedef struct IPMISdr {
+ uint8_t sdr[MAX_SDR_SIZE];
+ unsigned int next_free;
+ uint16_t next_rec_id;
+ uint16_t reservation;
+ uint8_t last_addition[4];
+ uint8_t last_clear[4];
+ uint8_t overflow;
+} IPMISdr;
+
+typedef struct IPMISensor {
+ uint8_t status;
+ uint8_t reading;
+ uint16_t states_suppt;
+ uint16_t assert_suppt;
+ uint16_t deassert_suppt;
+ uint16_t states;
+ uint16_t assert_states;
+ uint16_t deassert_states;
+ uint16_t assert_enable;
+ uint16_t deassert_enable;
+ uint8_t sensor_type;
+ uint8_t evt_reading_type_code;
+} IPMISensor;
+#define IPMI_SENSOR_GET_PRESENT(s) ((s)->status & 0x01)
+#define IPMI_SENSOR_SET_PRESENT(s,v) ((s)->status = (s->status & ~0x01) | \
+ !!(v))
+#define IPMI_SENSOR_GET_SCAN_ON(s) ((s)->status & 0x40)
+#define IPMI_SENSOR_SET_SCAN_ON(s,v) ((s)->status = (s->status & ~0x40) | \
+ ((!!(v)) << 6))
+#define IPMI_SENSOR_GET_EVENTS_ON(s) ((s)->status & 0x80)
+#define IPMI_SENSOR_SET_EVENTS_ON(s,v) ((s)->status = (s->status & ~0x80) | \
+ ((!!(v)) << 7))
+#define IPMI_SENSOR_GET_RET_STATUS(s) ((s)->status & 0xc0)
+#define IPMI_SENSOR_SET_RET_STATUS(s,v) ((s)->status = (s->status & ~0xc0) | \
+ (v & 0xc0))
+#define IPMI_SENSOR_IS_DISCRETE(s) ((s)->evt_reading_type_code != 1)
+
+#define MAX_SENSORS 20
+#define IPMI_WATCHDOG_SENSOR 0
+
+typedef struct IPMISimBmc IPMISimBmc;
+
+#define MAX_NETFNS 64
+typedef void (*IPMICmdHandler)(IPMISimBmc *s,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len);
+typedef struct IPMINetfn {
+ unsigned int cmd_nums;
+ IPMICmdHandler *cmd_handlers;
+} IPMINetfn;
+
+struct IPMISimBmc {
+ IPMIBmc parent;
+
+ void *idev; /* Really IPMIDevice */
+
+ QEMUTimer *timer;
+
+ uint8_t bmc_global_enables;
+ uint8_t msg_flags;
+
+ int8_t watchdog_initialized;
+ uint8_t watchdog_use;
+ uint8_t watchdog_action;
+ uint8_t watchdog_pretimeout; /* In seconds */
+ uint8_t watchdog_expired;
+ uint16_t watchdog_timeout; /* in 100's of milliseconds */
+
+ int8_t watchdog_running;
+ int8_t watchdog_preaction_ran;
+ int64_t watchdog_expiry;
+
+ uint8_t device_id;
+ uint8_t ipmi_version;
+ uint8_t device_rev;
+ uint8_t fwrev1;
+ uint8_t fwrev2;
+ uint8_t mfg_id[3];
+ uint8_t product_id[2];
+
+ IPMISel sel;
+ IPMISdr sdr;
+ IPMISensor sensors[MAX_SENSORS];
+
+ /* Odd netfns are for responses, so we only need the even ones. */
+ IPMINetfn *netfns[MAX_NETFNS / 2];
+
+ /* We allow one event in the buffer */
+ uint8_t evtbuf[16];
+};
+
+#define IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK (1 << 3)
+#define IPMI_BMC_MSG_FLAG_EVT_BUF_FULL (1 << 1)
+#define IPMI_BMC_MSG_FLAG_RCV_MSG_QUEUE (1 << 0)
+#define IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK_SET(s) \
+ (IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK & (s)->msg_flags)
+#define IPMI_BMC_MSG_FLAG_EVT_BUF_FULL_SET(s) \
+ (IPMI_BMC_MSG_FLAG_EVT_BUF_FULL & (s)->msg_flags)
+#define IPMI_BMC_MSG_FLAG_RCV_MSG_QUEUE_SET(s) \
+ (IPMI_BMC_MSG_FLAG_RCV_MSG_QUEUE & (s)->msg_flags)
+
+#define IPMI_BMC_RCV_MSG_QUEUE_INT_BIT 0
+#define IPMI_BMC_EVBUF_FULL_INT_BIT 1
+#define IPMI_BMC_EVENT_MSG_BUF_BIT 2
+#define IPMI_BMC_EVENT_LOG_BIT 3
+#define IPMI_BMC_MSG_INTS_ON(s) ((s)->bmc_global_enables & \
+ (1 << IPMI_BMC_RCV_MSG_QUEUE_INT_BIT))
+#define IPMI_BMC_EVBUF_FULL_INT_ENABLED(s) ((s)->bmc_global_enables & \
+ (1 << IPMI_BMC_EVBUF_FULL_INT_BIT))
+#define IPMI_BMC_EVENT_LOG_ENABLED(s) ((s)->bmc_global_enables & \
+ (1 << IPMI_BMC_EVENT_LOG_BIT))
+#define IPMI_BMC_EVENT_MSG_BUF_ENABLED(s) ((s)->bmc_global_enables & \
+ (1 << IPMI_BMC_EVENT_MSG_BUF_BIT))
+
+#define IPMI_BMC_WATCHDOG_USE_MASK 0xc7
+#define IPMI_BMC_WATCHDOG_ACTION_MASK 0x77
+#define IPMI_BMC_WATCHDOG_GET_USE(s) ((s)->watchdog_use & 0x7)
+#define IPMI_BMC_WATCHDOG_GET_DONT_LOG(s) (((s)->watchdog_use >> 7) & 0x1)
+#define IPMI_BMC_WATCHDOG_GET_DONT_STOP(s) (((s)->watchdog_use >> 6) & 0x1)
+#define IPMI_BMC_WATCHDOG_GET_PRE_ACTION(s) (((s)->watchdog_action >> 4) & 0x7)
+#define IPMI_BMC_WATCHDOG_PRE_NONE 0
+#define IPMI_BMC_WATCHDOG_PRE_SMI 1
+#define IPMI_BMC_WATCHDOG_PRE_NMI 2
+#define IPMI_BMC_WATCHDOG_PRE_MSG_INT 3
+#define IPMI_BMC_WATCHDOG_GET_ACTION(s) ((s)->watchdog_action & 0x7)
+#define IPMI_BMC_WATCHDOG_ACTION_NONE 0
+#define IPMI_BMC_WATCHDOG_ACTION_RESET 1
+#define IPMI_BMC_WATCHDOG_ACTION_POWER_DOWN 2
+#define IPMI_BMC_WATCHDOG_ACTION_POWER_CYCLE 3
+
+
+int ipmi_register_netfn(IPMISimBmc *s, unsigned int netfn, IPMINetfn *netfnd);
+int ipmi_register_cmd(IPMISimBmc *s, unsigned int netfn, unsigned int cmd,
+ IPMICmdHandler handler);
+
+/* Add a byte to the response. */
+#define IPMI_ADD_RSP_DATA(b) \
+ do { \
+ if (*rsp_len >= max_rsp_len) { \
+ rsp[2] = IPMI_CC_REQUEST_DATA_TRUNCATED; \
+ goto out; \
+ } \
+ rsp[(*rsp_len)++] = (b); \
+ } while(0)
+
+/* Verify that the received command is a certain length. */
+#define IPMI_CHECK_CMD_LEN(l) \
+ if (cmd_len < l) { \
+ rsp[2] = IPMI_CC_REQUEST_DATA_LENGTH_INVALID; \
+ goto out; \
+ }
+
+/* Check that the reservation in the command is valid. */
+#define IPMI_CHECK_RESERVATION(off, r) \
+ do { \
+ if ((cmd[off] | (cmd[off + 1] << 8)) != r) { \
+ rsp[2] = IPMI_CC_INVALID_RESERVATION; \
+ goto out; \
+ } \
+ } while(0)
+
+
+static void ipmi_sim_handle_timeout(IPMISimBmc *ss);
+
+static void ipmi_gettime(struct ipmi_time *time)
+{
+ int64_t stime;
+
+ stime = get_clock_realtime();
+ time->tv_sec = stime / 1000000000LL;
+ time->tv_nsec = stime % 1000000000LL;
+}
+
+static int64_t ipmi_getmonotime(void)
+{
+ return qemu_get_clock_ns(vm_clock);
+}
+
+static void ipmi_timeout(void *opaque)
+{
+ IPMISimBmc *ss = opaque;
+
+ ipmi_sim_handle_timeout(ss);
+}
+
+static void set_timestamp(IPMISimBmc *ss, uint8_t *ts)
+{
+ unsigned int val;
+ struct ipmi_time now;
+
+ ipmi_gettime(&now);
+ val = now.tv_sec + ss->sel.time_offset;
+ ts[0] = val & 0xff;
+ ts[1] = (val >> 8) & 0xff;
+ ts[2] = (val >> 16) & 0xff;
+ ts[3] = (val >> 24) & 0xff;
+}
+
+static void sdr_inc_reservation(IPMISdr *sdr)
+{
+ sdr->reservation++;
+ if (sdr->reservation == 0)
+ sdr->reservation = 1;
+}
+
+static int sdr_add_entry(IPMISimBmc *ss, const uint8_t *entry,
+ unsigned int len, uint16_t *recid)
+{
+ if ((len < 5) || (len > 255))
+ return 1;
+
+ if (entry[ss->sdr.next_free + 4] != len)
+ return 1;
+
+ if (ss->sdr.next_free + len > MAX_SDR_SIZE) {
+ ss->sdr.overflow = 1;
+ return 1;
+ }
+
+ memcpy(ss->sdr.sdr + ss->sdr.next_free, entry, len);
+ ss->sdr.sdr[ss->sdr.next_free] = ss->sdr.next_rec_id & 0xff;
+ ss->sdr.sdr[ss->sdr.next_free+1] = (ss->sdr.next_rec_id >> 8) & 0xff;
+ ss->sdr.sdr[ss->sdr.next_free+2] = 0x51; /* Conform to IPMI 1.5 spec */
+
+ if (recid)
+ *recid = ss->sdr.next_rec_id;
+ ss->sdr.next_rec_id++;
+ set_timestamp(ss, ss->sdr.last_addition);
+ ss->sdr.next_free += len;
+ sdr_inc_reservation(&ss->sdr);
+ return 0;
+}
+
+static int sdr_find_entry(IPMISdr *sdr, uint16_t recid,
+ unsigned int *retpos, uint16_t *nextrec)
+{
+ unsigned int pos = *retpos;
+
+ while (pos < sdr->next_free) {
+ uint16_t trec = sdr->sdr[pos] | (sdr->sdr[pos + 1] << 8);
+ unsigned int nextpos = pos + sdr->sdr[pos + 4];
+
+ if (trec == recid) {
+ if (nextrec) {
+ if (nextpos >= sdr->next_free)
+ *nextrec = 0xffff;
+ else
+ *nextrec = (sdr->sdr[nextpos] |
+ (sdr->sdr[nextpos + 1] << 8));
+ }
+ *retpos = pos;
+ return 0;
+ }
+ pos = nextpos;
+ }
+ return 1;
+}
+
+static void sel_inc_reservation(IPMISel *sel)
+{
+ sel->reservation++;
+ if (sel->reservation == 0)
+ sel->reservation = 1;
+}
+
+/* Returns 1 if the SEL is full and can't hold the event. */
+static int sel_add_event(IPMISimBmc *ss, uint8_t *event)
+{
+ event[0] = 0xff;
+ event[1] = 0xff;
+ set_timestamp(ss, event + 3);
+ if (ss->sel.next_free == MAX_SEL_SIZE) {
+ ss->sel.overflow = 1;
+ return 1;
+ }
+ event[0] = ss->sel.next_free & 0xff;
+ event[1] = (ss->sel.next_free >> 8) & 0xff;
+ memcpy(ss->sel.last_addition, event + 3, 4);
+ memcpy(ss->sel.sel[ss->sel.next_free], event, 16);
+ ss->sel.next_free++;
+ sel_inc_reservation(&ss->sel);
+ return 0;
+}
+
+static int attn_irq_enabled(IPMISimBmc *s)
+{
+ return (IPMI_BMC_MSG_INTS_ON(s) && IPMI_BMC_MSG_FLAG_RCV_MSG_QUEUE_SET(s))
+ || (IPMI_BMC_EVBUF_FULL_INT_ENABLED(s) &&
+ IPMI_BMC_MSG_FLAG_EVT_BUF_FULL_SET(s));
+}
+
+static void gen_event(IPMISimBmc *ss, unsigned int sens_num, uint8_t deassert,
+ uint8_t evd1, uint8_t evd2, uint8_t evd3)
+{
+ IPMIDevice *s = ss->idev;
+ IPMIDeviceClass *k = IPMI_DEVICE_GET_CLASS(s);
+ uint8_t evt[16];
+ IPMISensor *sens = ss->sensors + sens_num;
+
+ if (!IPMI_BMC_EVENT_MSG_BUF_ENABLED(ss))
+ return;
+ if (!IPMI_SENSOR_GET_EVENTS_ON(sens))
+ return;
+
+ evt[2] = 0x2; /* System event record */
+ evt[7] = s->slave_addr;
+ evt[8] = 0;
+ evt[9] = 0x04; /* Format version */
+ evt[10] = sens->sensor_type;
+ evt[11] = sens_num;
+ evt[12] = sens->evt_reading_type_code | (!!deassert << 7);
+ evt[13] = evd1;
+ evt[14] = evd2;
+ evt[15] = evd3;
+
+ if (IPMI_BMC_EVENT_LOG_ENABLED(ss))
+ sel_add_event(ss, evt);
+
+ if (ss->msg_flags & IPMI_BMC_MSG_FLAG_EVT_BUF_FULL)
+ goto out;
+
+ ss->msg_flags |= IPMI_BMC_MSG_FLAG_EVT_BUF_FULL;
+ memcpy(ss->evtbuf, evt, 16);
+ if (k->set_atn &&
+ ~(ss->msg_flags & IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK))
+ k->set_atn(s, 1, attn_irq_enabled(ss));
+ out:
+ return;
+}
+
+static void sensor_set_discrete_bit(IPMISimBmc *ss, unsigned int sensor,
+ unsigned int bit, unsigned int val,
+ uint8_t evd1, uint8_t evd2, uint8_t evd3)
+{
+ IPMISensor *sens;
+ uint16_t mask;
+
+ if (sensor >= MAX_SENSORS)
+ return;
+ if (bit >= 16)
+ return;
+
+ mask = (1 << bit);
+ sens = ss->sensors + sensor;
+ if (val) {
+ sens->states |= mask & sens->states_suppt;
+ if (sens->assert_states & mask)
+ return; /* Already asserted */
+ sens->assert_states |= mask & sens->assert_suppt;
+ if (sens->assert_enable & mask & sens->assert_states) {
+ /* Send an event on assert */
+ gen_event(ss, sensor, 0, evd1, evd2, evd3);
+ }
+ } else {
+ sens->states &= ~(mask & sens->states_suppt);
+ if (sens->deassert_states & mask)
+ return; /* Already deasserted */
+ sens->deassert_states |= mask & sens->deassert_suppt;
+ if (sens->deassert_enable & mask & sens->deassert_states) {
+ /* Send an event on deassert */
+ gen_event(ss, sensor, 1, evd1, evd2, evd3);
+ }
+ }
+}
+
+static void ipmi_init_sensors_from_sdrs(IPMISimBmc *s)
+{
+ unsigned int i, pos;
+ IPMISensor *sens;
+
+ for (i = 0; i < MAX_SENSORS; i++)
+ memset(s->sensors + i, 0, sizeof(*sens));
+
+ pos = 0;
+ for (i = 0; !sdr_find_entry(&s->sdr, i, &pos, NULL); i++) {
+ uint8_t *sdr = s->sdr.sdr + pos;
+ unsigned int len = sdr[4];
+
+ if (len < 20)
+ continue;
+ if ((sdr[3] < 1) || (sdr[3] > 2))
+ continue; /* Not a sensor SDR we set from */
+
+ if (sdr[7] > MAX_SENSORS)
+ continue;
+ sens = s->sensors + sdr[7];
+
+ IPMI_SENSOR_SET_PRESENT(sens, 1);
+ IPMI_SENSOR_SET_SCAN_ON(sens, (sdr[10] >> 6) & 1);
+ IPMI_SENSOR_SET_EVENTS_ON(sens, (sdr[10] >> 5) & 1);
+ sens->assert_suppt = sdr[14] | (sdr[15] << 8);
+ sens->deassert_suppt = sdr[16] | (sdr[17] << 8);
+ sens->states_suppt = sdr[18] | (sdr[19] << 8);
+ sens->sensor_type = sdr[12];
+ sens->evt_reading_type_code = sdr[13] & 0x7f;
+
+ /* Enable all the events that are supported. */
+ sens->assert_enable = sens->assert_suppt;
+ sens->deassert_enable = sens->deassert_suppt;
+ }
+}
+
+int ipmi_register_netfn(IPMISimBmc *s, unsigned int netfn, IPMINetfn *netfnd)
+{
+ if ((netfn & 1) || (netfn > MAX_NETFNS) || (s->netfns[netfn / 2]))
+ return -1;
+ s->netfns[netfn / 2] = netfnd;
+ return 0;
+}
+
+int ipmi_register_cmd(IPMISimBmc *s, unsigned int netfn, unsigned int cmd,
+ IPMICmdHandler handler)
+{
+ if ((netfn | 1) || (netfn > MAX_NETFNS) || (!s->netfns[netfn / 2]))
+ return -1;
+ if (cmd >= s->netfns[netfn / 2]->cmd_nums)
+ return -1;
+ if (s->netfns[netfn / 2]->cmd_handlers[cmd])
+ return -1;
+ s->netfns[netfn / 2]->cmd_handlers[cmd] = handler;
+ return 0;
+}
+
+static void next_timeout(IPMISimBmc *ss)
+{
+ int64_t next;
+ if (ss->watchdog_running) {
+ next = ss->watchdog_expiry;
+ } else {
+ /* Wait a minute */
+ next = ipmi_getmonotime() + 60 * 1000000000LL;
+ }
+ qemu_mod_timer_ns(ss->timer, next);
+}
+
+static void ipmi_sim_handle_command(IPMIBmc *b,
+ uint8_t *cmd, unsigned int cmd_len,
+ unsigned int max_cmd_len,
+ uint8_t msg_id)
+{
+ IPMISimBmc *ss = DO_UPCAST(IPMISimBmc, parent, b);
+ IPMIDevice *s = ss->idev;
+ IPMIDeviceClass *k = IPMI_DEVICE_GET_CLASS(s);
+ unsigned int netfn;
+ uint8_t rsp[MAX_IPMI_MSG_SIZE];
+ unsigned int rsp_len_holder =- 0;
+ unsigned int *rsp_len = &rsp_len_holder;
+ unsigned int max_rsp_len = sizeof(rsp);
+
+ /* Set up the response, set the low bit of NETFN. */
+ /* Note that max_rsp_len must be at least 3 */
+ IPMI_ADD_RSP_DATA(cmd[0] | 0x04);
+ IPMI_ADD_RSP_DATA(cmd[1]);
+ IPMI_ADD_RSP_DATA(0); /* Assume success */
+
+ /* If it's too short or it was truncated, return an error. */
+ if (cmd_len < 2) {
+ rsp[2] = IPMI_CC_REQUEST_DATA_LENGTH_INVALID;
+ goto out;
+ }
+ if (cmd_len > max_cmd_len) {
+ rsp[2] = IPMI_CC_REQUEST_DATA_TRUNCATED;
+ goto out;
+ }
+
+ if ((cmd[0] & 0x03) != 0) {
+ /* Only have stuff on LUN 0 */
+ rsp[2] = IPMI_CC_COMMAND_INVALID_FOR_LUN;
+ goto out;
+ }
+
+ netfn = cmd[0] >> 2;
+
+ /* Odd netfns are not valid, make sure the command is registered */
+ if ((netfn & 1) || !ss->netfns[netfn / 2] ||
+ (cmd[1] >= ss->netfns[netfn / 2]->cmd_nums) ||
+ (!ss->netfns[netfn / 2]->cmd_handlers[cmd[1]])) {
+ rsp[2] = IPMI_CC_INVALID_CMD;
+ goto out;
+ }
+
+ ss->netfns[netfn / 2]->cmd_handlers[cmd[1]](ss, cmd, cmd_len, rsp, rsp_len,
+ max_rsp_len);
+
+ out:
+ k->handle_rsp(s, msg_id, rsp, *rsp_len);
+
+ next_timeout(ss);
+}
+
+static void ipmi_sim_handle_timeout(IPMISimBmc *ss)
+{
+ IPMIDevice *s = ss->idev;
+ IPMIDeviceClass *k = IPMI_DEVICE_GET_CLASS(s);
+
+ if (!ss->watchdog_running)
+ goto out;
+
+ if (! ss->watchdog_preaction_ran) {
+ switch (IPMI_BMC_WATCHDOG_GET_PRE_ACTION(ss)) {
+ case IPMI_BMC_WATCHDOG_PRE_NMI:
+ ss->msg_flags |= IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK;
+ k->do_hw_op(s, IPMI_SEND_NMI, 0);
+ sensor_set_discrete_bit(ss, IPMI_WATCHDOG_SENSOR, 8, 1,
+ 0xc8, (2 << 4) | 0xf, 0xff);
+ break;
+
+ case IPMI_BMC_WATCHDOG_PRE_MSG_INT:
+ ss->msg_flags |= IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK;
+ if (k->set_atn &&
+ !(ss->msg_flags & IPMI_BMC_MSG_FLAG_EVT_BUF_FULL))
+ k->set_atn(s, 1, attn_irq_enabled(ss));
+ sensor_set_discrete_bit(ss, IPMI_WATCHDOG_SENSOR, 8, 1,
+ 0xc8, (3 << 4) | 0xf, 0xff);
+ break;
+
+ default:
+ goto do_full_expiry;
+ }
+
+ ss->watchdog_preaction_ran = 1;
+ /* Issued the pretimeout, do the rest of the timeout now. */
+ ss->watchdog_expiry = ipmi_getmonotime();
+ ss->watchdog_expiry += ss->watchdog_pretimeout * 1000000000LL;
+ goto out;
+ }
+
+ do_full_expiry:
+ ss->watchdog_running = 0; /* Stop the watchdog on a timeout */
+ ss->watchdog_expired |= (1 << IPMI_BMC_WATCHDOG_GET_USE(ss));
+ switch (IPMI_BMC_WATCHDOG_GET_ACTION(ss)) {
+ case IPMI_BMC_WATCHDOG_ACTION_NONE:
+ sensor_set_discrete_bit(ss, IPMI_WATCHDOG_SENSOR, 0, 1,
+ 0xc0, ss->watchdog_use & 0xf, 0xff);
+ break;
+
+ case IPMI_BMC_WATCHDOG_ACTION_RESET:
+ sensor_set_discrete_bit(ss, IPMI_WATCHDOG_SENSOR, 1, 1,
+ 0xc1, ss->watchdog_use & 0xf, 0xff);
+ k->do_hw_op(s, IPMI_RESET_CHASSIS, 0);
+ break;
+
+ case IPMI_BMC_WATCHDOG_ACTION_POWER_DOWN:
+ sensor_set_discrete_bit(ss, IPMI_WATCHDOG_SENSOR, 2, 1,
+ 0xc2, ss->watchdog_use & 0xf, 0xff);
+ k->do_hw_op(s, IPMI_POWEROFF_CHASSIS, 0);
+ break;
+
+ case IPMI_BMC_WATCHDOG_ACTION_POWER_CYCLE:
+ sensor_set_discrete_bit(ss, IPMI_WATCHDOG_SENSOR, 2, 1,
+ 0xc3, ss->watchdog_use & 0xf, 0xff);
+ k->do_hw_op(s, IPMI_POWERCYCLE_CHASSIS, 0);
+ break;
+ }
+
+ out:
+ next_timeout(ss);
+}
+
+static void chassis_capabilities(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIDevice *s = ss->idev;
+
+ IPMI_ADD_RSP_DATA(0);
+ IPMI_ADD_RSP_DATA(s->slave_addr);
+ IPMI_ADD_RSP_DATA(s->slave_addr);
+ IPMI_ADD_RSP_DATA(s->slave_addr);
+ IPMI_ADD_RSP_DATA(s->slave_addr);
+ out:
+ return;
+}
+
+static void chassis_status(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_ADD_RSP_DATA(0x61); /* Unknown power restore, power is on */
+ IPMI_ADD_RSP_DATA(0);
+ IPMI_ADD_RSP_DATA(0);
+ IPMI_ADD_RSP_DATA(0);
+ out:
+ return;
+}
+
+static void chassis_control(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIDevice *s = ss->idev;
+ IPMIDeviceClass *k = IPMI_DEVICE_GET_CLASS(s);
+
+ IPMI_CHECK_CMD_LEN(3);
+ switch (cmd[2] & 0xf) {
+ case 0: /* power down */
+ rsp[2] = k->do_hw_op(s, IPMI_POWEROFF_CHASSIS, 0);
+ break;
+ case 1: /* power up */
+ rsp[2] = k->do_hw_op(s, IPMI_POWERON_CHASSIS, 0);
+ break;
+ case 2: /* power cycle */
+ rsp[2] = k->do_hw_op(s, IPMI_POWERCYCLE_CHASSIS, 0);
+ break;
+ case 3: /* hard reset */
+ rsp[2] = k->do_hw_op(s, IPMI_RESET_CHASSIS, 0);
+ break;
+ case 4: /* pulse diagnostic interrupt */
+ rsp[2] = k->do_hw_op(s, IPMI_PULSE_DIAG_IRQ, 0);
+ break;
+ case 5: /* soft shutdown via ACPI by overtemp emulation */
+ rsp[2] = k->do_hw_op(s,
+ IPMI_SHUTDOWN_VIA_ACPI_OVERTEMP, 0);
+ break;
+ default:
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ out:
+ return;
+}
+
+static void get_device_id(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_ADD_RSP_DATA(ss->device_id);
+ IPMI_ADD_RSP_DATA(ss->device_rev & 0xf);
+ IPMI_ADD_RSP_DATA(ss->fwrev1 & 0x7f);
+ IPMI_ADD_RSP_DATA(ss->fwrev2);
+ IPMI_ADD_RSP_DATA(ss->ipmi_version);
+ IPMI_ADD_RSP_DATA(0x07); /* sensor, SDR, and SEL. */
+ IPMI_ADD_RSP_DATA(ss->mfg_id[0]);
+ IPMI_ADD_RSP_DATA(ss->mfg_id[1]);
+ IPMI_ADD_RSP_DATA(ss->mfg_id[2]);
+ IPMI_ADD_RSP_DATA(ss->product_id[0]);
+ IPMI_ADD_RSP_DATA(ss->product_id[1]);
+ out:
+ return;
+}
+
+static void set_bmc_global_enables(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIDevice *s = ss->idev;
+ IPMIDeviceClass *k = IPMI_DEVICE_GET_CLASS(s);
+ uint8_t old_val = ss->bmc_global_enables;
+
+ IPMI_CHECK_CMD_LEN(3);
+ ss->bmc_global_enables = cmd[2];
+ if ((old_val & (1 << IPMI_BMC_RCV_MSG_QUEUE_INT_BIT))
+ != (cmd[2] & (1 << IPMI_BMC_RCV_MSG_QUEUE_INT_BIT))) {
+ k->set_irq_enable(s,
+ !!(cmd[2] & (1 << IPMI_BMC_RCV_MSG_QUEUE_INT_BIT)));
+ }
+ out:
+ return;
+}
+
+static void get_bmc_global_enables(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_ADD_RSP_DATA(ss->bmc_global_enables);
+ out:
+ return;
+}
+
+static void clr_msg_flags(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIDevice *s = ss->idev;
+ IPMIDeviceClass *k = IPMI_DEVICE_GET_CLASS(s);
+
+ IPMI_CHECK_CMD_LEN(3);
+ if (cmd[2] & IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK) {
+ if (k->set_atn &&
+ !(ss->msg_flags & IPMI_BMC_MSG_FLAG_EVT_BUF_FULL))
+ k->set_atn(s, 0, attn_irq_enabled(ss));
+ }
+ ss->msg_flags &= ~cmd[2];
+ out:
+ return;
+}
+
+static void get_msg_flags(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_ADD_RSP_DATA(ss->msg_flags);
+ out:
+ return;
+}
+
+static void read_evt_msg_buf(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIDevice *s = ss->idev;
+ IPMIDeviceClass *k = IPMI_DEVICE_GET_CLASS(s);
+ unsigned int i;
+
+ if (!(ss->msg_flags & IPMI_BMC_MSG_FLAG_EVT_BUF_FULL)) {
+ rsp[2] = 0x80;
+ goto out;
+ }
+ for (i = 0; i < 16; i++)
+ IPMI_ADD_RSP_DATA(ss->evtbuf[i]);
+ ss->msg_flags &= ~IPMI_BMC_MSG_FLAG_EVT_BUF_FULL;
+ if (k->set_atn &&
+ ~(ss->msg_flags & IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK))
+ k->set_atn(s, 0, attn_irq_enabled(ss));
+ out:
+ return;
+}
+
+static void do_watchdog_reset(IPMISimBmc *ss)
+{
+ if (IPMI_BMC_WATCHDOG_GET_ACTION(ss) ==
+ IPMI_BMC_WATCHDOG_ACTION_NONE) {
+ ss->watchdog_running = 0;
+ return;
+ }
+ ss->watchdog_preaction_ran = 0;
+
+
+ /* Timeout is in tenths of a second, offset is in seconds */
+ ss->watchdog_expiry = ipmi_getmonotime();
+ ss->watchdog_expiry += ss->watchdog_timeout * 100000000LL;
+ if (IPMI_BMC_WATCHDOG_GET_PRE_ACTION(ss) != IPMI_BMC_WATCHDOG_PRE_NONE) {
+ ss->watchdog_expiry -= ss->watchdog_pretimeout * 1000000000LL;
+ }
+ ss->watchdog_running = 1;
+}
+
+static void reset_watchdog_timer(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ if (!ss->watchdog_initialized) {
+ rsp[2] = 0x80;
+ goto out;
+ }
+ do_watchdog_reset(ss);
+ out:
+ return;
+}
+
+static void set_watchdog_timer(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIDevice *s = ss->idev;
+ IPMIDeviceClass *k = IPMI_DEVICE_GET_CLASS(s);
+ unsigned int val;
+
+ IPMI_CHECK_CMD_LEN(8);
+ val = cmd[2] & 0x7; /* Validate use */
+ if (val == 0 || val > 5) {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ val = cmd[3] & 0x7; /* Validate action */
+ switch (val) {
+ case IPMI_BMC_WATCHDOG_ACTION_NONE:
+ break;
+
+ case IPMI_BMC_WATCHDOG_ACTION_RESET:
+ rsp[2] = k->do_hw_op(s, IPMI_RESET_CHASSIS, 1);
+ break;
+
+ case IPMI_BMC_WATCHDOG_ACTION_POWER_DOWN:
+ rsp[2] = k->do_hw_op(s, IPMI_POWEROFF_CHASSIS, 1);
+ break;
+
+ case IPMI_BMC_WATCHDOG_ACTION_POWER_CYCLE:
+ rsp[2] = k->do_hw_op(s, IPMI_POWERCYCLE_CHASSIS, 1);
+ break;
+
+ default:
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ }
+ if (rsp[2]) {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+
+ val = (cmd[3] >> 4) & 0x7; /* Validate preaction */
+ switch (val) {
+ case IPMI_BMC_WATCHDOG_PRE_MSG_INT:
+ case IPMI_BMC_WATCHDOG_PRE_NONE:
+ break;
+
+ case IPMI_BMC_WATCHDOG_PRE_NMI:
+ if (!k->do_hw_op(s, IPMI_SEND_NMI, 1)) {
+ /* NMI not supported. */
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ default:
+ /* We don't support PRE_SMI */
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+
+ ss->watchdog_initialized = 1;
+ ss->watchdog_use = cmd[2] & IPMI_BMC_WATCHDOG_USE_MASK;
+ ss->watchdog_action = cmd[3] & IPMI_BMC_WATCHDOG_ACTION_MASK;
+ ss->watchdog_pretimeout = cmd[4];
+ ss->watchdog_expired &= ~cmd[5];
+ ss->watchdog_timeout = cmd[6] | (((uint16_t) cmd[7]) << 8);
+ if (ss->watchdog_running & IPMI_BMC_WATCHDOG_GET_DONT_STOP(ss))
+ do_watchdog_reset(ss);
+ else
+ ss->watchdog_running = 0;
+ out:
+ return;
+}
+
+static void get_watchdog_timer(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_ADD_RSP_DATA(ss->watchdog_use);
+ IPMI_ADD_RSP_DATA(ss->watchdog_action);
+ IPMI_ADD_RSP_DATA(ss->watchdog_pretimeout);
+ IPMI_ADD_RSP_DATA(ss->watchdog_expired);
+ if (ss->watchdog_running) {
+ long timeout;
+ timeout = ((ss->watchdog_expiry - ipmi_getmonotime() + 50000000)
+ / 100000000);
+ IPMI_ADD_RSP_DATA(timeout & 0xff);
+ IPMI_ADD_RSP_DATA((timeout >> 8) & 0xff);
+ } else {
+ IPMI_ADD_RSP_DATA(0);
+ IPMI_ADD_RSP_DATA(0);
+ }
+ out:
+ return;
+}
+
+static void get_sdr_rep_info(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ unsigned int i;
+
+ IPMI_ADD_RSP_DATA(0x51); /* Conform to IPMI 1.5 spec */
+ IPMI_ADD_RSP_DATA(ss->sdr.next_rec_id & 0xff);
+ IPMI_ADD_RSP_DATA((ss->sdr.next_rec_id >> 8) & 0xff);
+ IPMI_ADD_RSP_DATA((MAX_SDR_SIZE - ss->sdr.next_free) & 0xff);
+ IPMI_ADD_RSP_DATA(((MAX_SDR_SIZE - ss->sdr.next_free) >> 8) & 0xff);
+ for (i = 0; i < 4; i++)
+ IPMI_ADD_RSP_DATA(ss->sdr.last_addition[i]);
+ for (i = 0; i < 4; i++)
+ IPMI_ADD_RSP_DATA(ss->sdr.last_clear[i]);
+ /* Only modal support, reserve supported */
+ IPMI_ADD_RSP_DATA((ss->sdr.overflow << 7) | 0x22);
+ out:
+ return;
+}
+
+static void reserve_sdr_rep(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_ADD_RSP_DATA(ss->sdr.reservation & 0xff);
+ IPMI_ADD_RSP_DATA((ss->sdr.reservation >> 8) & 0xff);
+ out:
+ return;
+}
+
+static void get_sdr(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ unsigned int pos;
+ uint16_t nextrec;
+
+ IPMI_CHECK_CMD_LEN(8);
+ if (cmd[6])
+ IPMI_CHECK_RESERVATION(2, ss->sdr.reservation);
+ pos = 0;
+ if (sdr_find_entry(&ss->sdr, cmd[4] | (cmd[5] << 8),
+ &pos, &nextrec)) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ if (cmd[6] > (ss->sdr.sdr[pos + 4])) {
+ rsp[2] = IPMI_CC_PARM_OUT_OF_RANGE;
+ goto out;
+ }
+
+ IPMI_ADD_RSP_DATA(nextrec & 0xff);
+ IPMI_ADD_RSP_DATA((nextrec >> 8) & 0xff);
+
+ if (cmd[7] == 0xff)
+ cmd[7] = ss->sdr.sdr[pos + 4] - cmd[6];
+
+ if ((cmd[7] + *rsp_len) > max_rsp_len) {
+ rsp[2] = IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES;
+ goto out;
+ }
+ memcpy(rsp + *rsp_len, ss->sdr.sdr + pos + cmd[6], cmd[7]);
+ *rsp_len += cmd[7];
+ out:
+ return;
+}
+
+static void add_sdr(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ uint16_t recid;
+
+ if (sdr_add_entry(ss, cmd + 2, cmd_len - 2, &recid)) {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ IPMI_ADD_RSP_DATA(recid & 0xff);
+ IPMI_ADD_RSP_DATA((recid >> 8) & 0xff);
+ out:
+ return;
+}
+
+static void clear_sdr_rep(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_CHECK_CMD_LEN(8);
+ IPMI_CHECK_RESERVATION(2, ss->sdr.reservation);
+ if (cmd[4] != 'C' || cmd[5] != 'L' || cmd[6] != 'R') {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ if (cmd[7] == 0xaa) {
+ ss->sdr.next_free = 0;
+ ss->sdr.overflow = 0;
+ set_timestamp(ss, ss->sdr.last_clear);
+ IPMI_ADD_RSP_DATA(1); /* Erasure complete */
+ sdr_inc_reservation(&ss->sdr);
+ } else if (cmd[7] == 0) {
+ IPMI_ADD_RSP_DATA(1); /* Erasure complete */
+ } else {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ out:
+ return;
+}
+
+static void get_sel_info(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ unsigned int i, val;
+
+ IPMI_ADD_RSP_DATA(0x51); /* Conform to IPMI 1.5 */
+ IPMI_ADD_RSP_DATA(ss->sel.next_free & 0xff);
+ IPMI_ADD_RSP_DATA((ss->sel.next_free >> 8) & 0xff);
+ val = (MAX_SEL_SIZE - ss->sel.next_free) * 16;
+ IPMI_ADD_RSP_DATA(val & 0xff);
+ IPMI_ADD_RSP_DATA((val >> 8) & 0xff);
+ for (i = 0; i < 4; i++)
+ IPMI_ADD_RSP_DATA(ss->sel.last_addition[i]);
+ for (i = 0; i < 4; i++)
+ IPMI_ADD_RSP_DATA(ss->sel.last_clear[i]);
+ /* Only support Reserve SEL */
+ IPMI_ADD_RSP_DATA((ss->sel.overflow << 7) | 0x02);
+ out:
+ return;
+}
+
+static void reserve_sel(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_ADD_RSP_DATA(ss->sel.reservation & 0xff);
+ IPMI_ADD_RSP_DATA((ss->sel.reservation >> 8) & 0xff);
+ out:
+ return;
+}
+
+static void get_sel_entry(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ unsigned int val;
+
+ IPMI_CHECK_CMD_LEN(8);
+ if (cmd[6])
+ IPMI_CHECK_RESERVATION(2, ss->sel.reservation);
+ if (ss->sel.next_free == 0) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ if (cmd[6] > 15) {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ if (cmd[7] == 0xff)
+ cmd[7] = 16;
+ else if ((cmd[7] + cmd[6]) > 16) {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ } else
+ cmd[7] += cmd[6];
+
+ val = cmd[4] | (cmd[5] << 8);
+ if (val == 0xffff)
+ val = ss->sel.next_free - 1;
+ else if (val >= ss->sel.next_free) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ if ((val + 1) == ss->sel.next_free) {
+ IPMI_ADD_RSP_DATA(0xff);
+ IPMI_ADD_RSP_DATA(0xff);
+ } else {
+ IPMI_ADD_RSP_DATA((val + 1) & 0xff);
+ IPMI_ADD_RSP_DATA(((val + 1) >> 8) & 0xff);
+ }
+ for (; cmd[6] < cmd[7]; cmd[6]++)
+ IPMI_ADD_RSP_DATA(ss->sel.sel[val][cmd[6]]);
+ out:
+ return;
+}
+
+static void add_sel_entry(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_CHECK_CMD_LEN(18);
+ if (sel_add_event(ss, cmd + 2)) {
+ rsp[2] = IPMI_CC_OUT_OF_SPACE;
+ goto out;
+ }
+ /* sel_add_event fills in the record number. */
+ IPMI_ADD_RSP_DATA(cmd[2]);
+ IPMI_ADD_RSP_DATA(cmd[3]);
+ out:
+ return;
+}
+
+static void clear_sel(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_CHECK_CMD_LEN(8);
+ IPMI_CHECK_RESERVATION(2, ss->sel.reservation);
+ if (cmd[4] != 'C' || cmd[5] != 'L' || cmd[6] != 'R') {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ if (cmd[7] == 0xaa) {
+ ss->sel.next_free = 0;
+ ss->sel.overflow = 0;
+ set_timestamp(ss, ss->sdr.last_clear);
+ IPMI_ADD_RSP_DATA(1); /* Erasure complete */
+ sel_inc_reservation(&ss->sel);
+ } else if (cmd[7] == 0) {
+ IPMI_ADD_RSP_DATA(1); /* Erasure complete */
+ } else {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ out:
+ return;
+}
+
+static void get_sel_time(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ uint32_t val;
+ struct ipmi_time now;
+
+ ipmi_gettime(&now);
+ val = now.tv_sec + ss->sel.time_offset;
+ IPMI_ADD_RSP_DATA(val & 0xff);
+ IPMI_ADD_RSP_DATA((val >> 8) & 0xff);
+ IPMI_ADD_RSP_DATA((val >> 16) & 0xff);
+ IPMI_ADD_RSP_DATA((val >> 24) & 0xff);
+ out:
+ return;
+}
+
+static void set_sel_time(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ uint32_t val;
+ struct ipmi_time now;
+
+ IPMI_CHECK_CMD_LEN(6);
+ val = cmd[2] | (cmd[3] << 8) | (cmd[4] << 16) | (cmd[5] << 24);
+ ipmi_gettime(&now);
+ ss->sel.time_offset = now.tv_sec - ((long) val);
+ out:
+ return;
+}
+
+static void set_sensor_evt_enable(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMISensor *sens;
+
+ IPMI_CHECK_CMD_LEN(4);
+ if ((cmd[2] > MAX_SENSORS) ||
+ !IPMI_SENSOR_GET_PRESENT(ss->sensors + cmd[2])) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ sens = ss->sensors + cmd[2];
+ switch ((cmd[3] >> 4) & 0x3) {
+ case 0: /* Do not change */
+ break;
+ case 1: /* Enable bits */
+ if (cmd_len > 4)
+ sens->assert_enable |= cmd[4];
+ if (cmd_len > 5)
+ sens->assert_enable |= cmd[5] << 8;
+ if (cmd_len > 6)
+ sens->deassert_enable |= cmd[6];
+ if (cmd_len > 7)
+ sens->deassert_enable |= cmd[7] << 8;
+ break;
+ case 2: /* Disable bits */
+ if (cmd_len > 4)
+ sens->assert_enable &= ~cmd[4];
+ if (cmd_len > 5)
+ sens->assert_enable &= ~(cmd[5] << 8);
+ if (cmd_len > 6)
+ sens->deassert_enable &= ~cmd[6];
+ if (cmd_len > 7)
+ sens->deassert_enable &= ~(cmd[7] << 8);
+ break;
+ case 3:
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ IPMI_SENSOR_SET_RET_STATUS(sens, cmd[3]);
+ out:
+ return;
+}
+
+static void get_sensor_evt_enable(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMISensor *sens;
+
+ IPMI_CHECK_CMD_LEN(3);
+ if ((cmd[2] > MAX_SENSORS) ||
+ !IPMI_SENSOR_GET_PRESENT(ss->sensors + cmd[2])) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ sens = ss->sensors + cmd[2];
+ IPMI_ADD_RSP_DATA(IPMI_SENSOR_GET_RET_STATUS(sens));
+ IPMI_ADD_RSP_DATA(sens->assert_enable & 0xff);
+ IPMI_ADD_RSP_DATA((sens->assert_enable >> 8) & 0xff);
+ IPMI_ADD_RSP_DATA(sens->deassert_enable & 0xff);
+ IPMI_ADD_RSP_DATA((sens->deassert_enable >> 8) & 0xff);
+ out:
+ return;
+}
+
+static void rearm_sensor_evts(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMISensor *sens;
+
+ IPMI_CHECK_CMD_LEN(4);
+ if ((cmd[2] > MAX_SENSORS) ||
+ !IPMI_SENSOR_GET_PRESENT(ss->sensors + cmd[2])) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ sens = ss->sensors + cmd[2];
+
+ if ((cmd[3] & 0x80) == 0) {
+ /* Just clear everything */
+ sens->states = 0;
+ goto out;
+ }
+ out:
+ return;
+}
+
+static void get_sensor_evt_status(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMISensor *sens;
+
+ IPMI_CHECK_CMD_LEN(3);
+ if ((cmd[2] > MAX_SENSORS) ||
+ !IPMI_SENSOR_GET_PRESENT(ss->sensors + cmd[2])) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ sens = ss->sensors + cmd[2];
+ IPMI_ADD_RSP_DATA(sens->reading);
+ IPMI_ADD_RSP_DATA(IPMI_SENSOR_GET_RET_STATUS(sens));
+ IPMI_ADD_RSP_DATA(sens->assert_states & 0xff);
+ IPMI_ADD_RSP_DATA((sens->assert_states >> 8) & 0xff);
+ IPMI_ADD_RSP_DATA(sens->deassert_states & 0xff);
+ IPMI_ADD_RSP_DATA((sens->deassert_states >> 8) & 0xff);
+ out:
+ return;
+}
+
+static void get_sensor_reading(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMISensor *sens;
+
+ IPMI_CHECK_CMD_LEN(3);
+ if ((cmd[2] > MAX_SENSORS) ||
+ !IPMI_SENSOR_GET_PRESENT(ss->sensors + cmd[2])) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ sens = ss->sensors + cmd[2];
+ IPMI_ADD_RSP_DATA(sens->reading);
+ IPMI_ADD_RSP_DATA(IPMI_SENSOR_GET_RET_STATUS(sens));
+ IPMI_ADD_RSP_DATA(sens->states & 0xff);
+ if (IPMI_SENSOR_IS_DISCRETE(sens))
+ IPMI_ADD_RSP_DATA((sens->states >> 8) & 0xff);
+ out:
+ return;
+}
+
+static IPMICmdHandler chassis_cmds[IPMI_NETFN_CHASSIS_MAXCMD] = {
+ [IPMI_CMD_GET_CHASSIS_CAPABILITIES] = chassis_capabilities,
+ [IPMI_CMD_GET_CHASSIS_STATUS] = chassis_status,
+ [IPMI_CMD_CHASSIS_CONTROL] = chassis_control
+};
+static IPMINetfn chassis_netfn = {
+ .cmd_nums = IPMI_NETFN_CHASSIS_MAXCMD,
+ .cmd_handlers = chassis_cmds
+};
+
+static IPMICmdHandler sensor_event_cmds[IPMI_NETFN_SENSOR_EVENT_MAXCMD] = {
+ [IPMI_CMD_SET_SENSOR_EVT_ENABLE] = set_sensor_evt_enable,
+ [IPMI_CMD_GET_SENSOR_EVT_ENABLE] = get_sensor_evt_enable,
+ [IPMI_CMD_REARM_SENSOR_EVTS] = rearm_sensor_evts,
+ [IPMI_CMD_GET_SENSOR_EVT_STATUS] = get_sensor_evt_status,
+ [IPMI_CMD_GET_SENSOR_READING] = get_sensor_reading
+};
+static IPMINetfn sensor_event_netfn = {
+ .cmd_nums = IPMI_NETFN_SENSOR_EVENT_MAXCMD,
+ .cmd_handlers = sensor_event_cmds
+};
+
+static IPMICmdHandler app_cmds[IPMI_NETFN_APP_MAXCMD] = {
+ [IPMI_CMD_GET_DEVICE_ID] = get_device_id,
+ [IPMI_CMD_SET_BMC_GLOBAL_ENABLES] = set_bmc_global_enables,
+ [IPMI_CMD_GET_BMC_GLOBAL_ENABLES] = get_bmc_global_enables,
+ [IPMI_CMD_CLR_MSG_FLAGS] = clr_msg_flags,
+ [IPMI_CMD_GET_MSG_FLAGS] = get_msg_flags,
+ [IPMI_CMD_READ_EVT_MSG_BUF] = read_evt_msg_buf,
+ [IPMI_CMD_RESET_WATCHDOG_TIMER] = reset_watchdog_timer,
+ [IPMI_CMD_SET_WATCHDOG_TIMER] = set_watchdog_timer,
+ [IPMI_CMD_GET_WATCHDOG_TIMER] = get_watchdog_timer,
+};
+static IPMINetfn app_netfn = {
+ .cmd_nums = IPMI_NETFN_APP_MAXCMD,
+ .cmd_handlers = app_cmds
+};
+
+static IPMICmdHandler storage_cmds[IPMI_NETFN_STORAGE_MAXCMD] = {
+ [IPMI_CMD_GET_SDR_REP_INFO] = get_sdr_rep_info,
+ [IPMI_CMD_RESERVE_SDR_REP] = reserve_sdr_rep,
+ [IPMI_CMD_GET_SDR] = get_sdr,
+ [IPMI_CMD_ADD_SDR] = add_sdr,
+ [IPMI_CMD_CLEAR_SDR_REP] = clear_sdr_rep,
+ [IPMI_CMD_GET_SEL_INFO] = get_sel_info,
+ [IPMI_CMD_RESERVE_SEL] = reserve_sel,
+ [IPMI_CMD_GET_SEL_ENTRY] = get_sel_entry,
+ [IPMI_CMD_ADD_SEL_ENTRY] = add_sel_entry,
+ [IPMI_CMD_CLEAR_SEL] = clear_sel,
+ [IPMI_CMD_GET_SEL_TIME] = get_sel_time,
+ [IPMI_CMD_SET_SEL_TIME] = set_sel_time,
+};
+static IPMINetfn storage_netfn = {
+ .cmd_nums = IPMI_NETFN_STORAGE_MAXCMD,
+ .cmd_handlers = storage_cmds
+};
+
+static void register_cmds(IPMISimBmc *s)
+{
+ ipmi_register_netfn(s, IPMI_NETFN_CHASSIS, &chassis_netfn);
+ ipmi_register_netfn(s, IPMI_NETFN_SENSOR_EVENT, &sensor_event_netfn);
+ ipmi_register_netfn(s, IPMI_NETFN_APP, &app_netfn);
+ ipmi_register_netfn(s, IPMI_NETFN_STORAGE, &storage_netfn);
+}
+
+static const uint8_t init_sdrs[] = {
+ /* Watchdog device */
+ 0x00, 0x00, 0x51, 0x02, 40, 0x20, 0x00, 0x00,
+ 0x23, 0x01, 0x63, 0x00, 0x23, 0x6f, 0x0f, 0x01,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc8,
+ 'W', 'a', 't', 'c', 'h', 'd', 'o', 'g',
+ /* End */
+ 0xff, 0xff, 0x00, 0x00, 0x00
+};
+
+static int ipmi_sim_init(IPMIBmc *b)
+{
+ unsigned int i;
+ unsigned int next_recid, recid;
+ IPMISimBmc *ss = DO_UPCAST(IPMISimBmc, parent, b);
+
+ ss->bmc_global_enables = (1 << IPMI_BMC_EVENT_LOG_BIT);
+ ss->device_id = 0x20;
+ ss->ipmi_version = 0x02; /* IPMI 2.0 */
+ for (i = 0; i < 4; i++) {
+ ss->sel.last_addition[i] = 0xff;
+ ss->sel.last_clear[i] = 0xff;
+ ss->sdr.last_addition[i] = 0xff;
+ ss->sdr.last_clear[i] = 0xff;
+ }
+
+ next_recid = 0;
+ for (i = 0;;) {
+ int len;
+ if ((i + 5) > sizeof(init_sdrs)) {
+ ipmi_debug("Problem with recid 0x%4.4x\n", i);
+ return 1;
+ }
+ len = init_sdrs[i + 4];
+ recid = init_sdrs[i] | (init_sdrs[i + 1] << 8);
+ if (recid == 0xffff)
+ break;
+ if ((i + len) > sizeof(init_sdrs)) {
+ ipmi_debug("Problem with recid 0x%4.4x\n", i);
+ return 1;
+ }
+ if (recid != next_recid) {
+ ipmi_debug("Problem with recid 0x%4.4x\n", i);
+ return 1;
+ }
+ sdr_add_entry(ss, init_sdrs + i, len, NULL);
+ i += len;
+ }
+
+ ipmi_init_sensors_from_sdrs(ss);
+ register_cmds(ss);
+
+ ss->timer = qemu_new_timer_ns(vm_clock, ipmi_timeout, ss);
+ return 0;
+}
+
+static Property ipmi_sim_props[] = {
+ DEFINE_PROP_PTR("ipmiif", IPMISimBmc, idev),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void ipmi_sim_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *k = DEVICE_CLASS(klass);
+ IPMIBmcClass *bk = IPMI_BMC_CLASS(klass);
+
+ bk->init = ipmi_sim_init;
+ bk->handle_command = ipmi_sim_handle_command;
+ k->props = ipmi_sim_props;
+}
+
+static TypeInfo ipmi_sim_type = {
+ .name = "ipmi-bmc-sim",
+ .parent = TYPE_IPMI_BMC,
+ .instance_size = sizeof(IPMISimBmc),
+ .class_init = ipmi_sim_class_init,
+};
+
+static void ipmi_sim_register_types(void)
+{
+ type_register_static(&ipmi_sim_type);
+}
+
+type_init(ipmi_sim_register_types)
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 16/16] IPMI: Add an external connection simulation interface
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
` (13 preceding siblings ...)
2012-07-15 20:25 ` [Qemu-devel] [PATCH 15/16] IPMI: Add a local BMC simulation minyard
@ 2012-07-15 20:25 ` minyard
2012-07-15 21:05 ` [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry Corey Minyard
2012-07-16 15:46 ` Eric Blake
16 siblings, 0 replies; 23+ messages in thread
From: minyard @ 2012-07-15 20:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
This adds an interface for IPMI that connects to a remote
BMC over a chardev (generally a TCP socket). The OpenIPMI
lanserv simulator describes this interface, see that for
interface details.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/Makefile.objs | 1 +
hw/ipmi_extern.c | 479 ++++++++++++++++++++++++++++++++++++
4 files changed, 482 insertions(+), 0 deletions(-)
create mode 100644 hw/ipmi_extern.c
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index 8c99d5d..325f92e 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -12,6 +12,7 @@ CONFIG_ISA_IPMI=y
CONFIG_IPMI_KCS=y
CONFIG_IPMI_BT=y
CONFIG_IPMI_LOCAL=y
+CONFIG_IPMI_EXTERN=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index 4d01883..2ac9177 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -12,6 +12,7 @@ CONFIG_ISA_IPMI=y
CONFIG_IPMI_KCS=y
CONFIG_IPMI_BT=y
CONFIG_IPMI_LOCAL=y
+CONFIG_IPMI_EXTERN=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index 1b707d7..b87de2c 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -25,6 +25,7 @@ hw-obj-$(CONFIG_ISA_IPMI) += isa_ipmi.o
hw-obj-$(CONFIG_IPMI_KCS) += ipmi_kcs.o
hw-obj-$(CONFIG_IPMI_BT) += ipmi_bt.o
hw-obj-$(CONFIG_IPMI_LOCAL) += ipmi_sim.o
+hw-obj-$(CONFIG_IPMI_EXTERN) += ipmi_extern.o
hw-obj-$(CONFIG_SERIAL) += serial.o
hw-obj-$(CONFIG_PARALLEL) += parallel.o
diff --git a/hw/ipmi_extern.c b/hw/ipmi_extern.c
new file mode 100644
index 0000000..b40ec40
--- /dev/null
+++ b/hw/ipmi_extern.c
@@ -0,0 +1,479 @@
+/*
+ * IPMI BMC external connection
+ *
+ * Copyright (c) 2012 Corey Minyard, MontaVista Software, LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+/*
+ * This is designed to connect with OpenIPMI's lanserv serial interface
+ * using the "VM" connection type. See that for details.
+ */
+
+#include <stdint.h>
+#include "qemu-timer.h"
+#include "qemu-char.h"
+#include "ipmi.h"
+
+#define VM_MSG_CHAR 0xA0 /* Marks end of message */
+#define VM_CMD_CHAR 0xA1 /* Marks end of a command */
+#define VM_ESCAPE_CHAR 0xAA /* Set bit 4 from the next byte to 0 */
+
+#define VM_PROTOCOL_VERSION 1
+#define VM_CMD_VERSION 0xff /* A version number byte follows */
+#define VM_CMD_NOATTN 0x00
+#define VM_CMD_ATTN 0x01
+#define VM_CMD_ATTN_IRQ 0x02
+#define VM_CMD_POWEROFF 0x03
+#define VM_CMD_RESET 0x04
+#define VM_CMD_ENABLE_IRQ 0x05 /* Enable/disable the messaging irq */
+#define VM_CMD_DISABLE_IRQ 0x06
+#define VM_CMD_SEND_NMI 0x07
+#define VM_CMD_CAPABILITIES 0x08
+#define VM_CAPABILITIES_POWER 0x01
+#define VM_CAPABILITIES_RESET 0x02
+#define VM_CAPABILITIES_IRQ 0x04
+#define VM_CAPABILITIES_NMI 0x08
+#define VM_CAPABILITIES_ATTN 0x10
+
+typedef struct IPMIExternBmc {
+ IPMIBmc parent;
+
+ void *idev; /* Really IPMIDevice */
+
+ CharDriverState *chr;
+
+ int connected;
+ int is_listen;
+
+ unsigned char inbuf[MAX_IPMI_MSG_SIZE + 2];
+ unsigned int inpos;
+ int in_escape;
+ int in_too_many;
+ int waiting_rsp;
+ int sending_cmd;
+
+ unsigned char outbuf[(MAX_IPMI_MSG_SIZE + 2) * 2 + 1];
+ unsigned int outpos;
+ unsigned int outlen;
+
+ struct QEMUTimer *extern_timer;
+
+ /* A reset event is pending to be sent upstream. */
+ int send_reset;
+} IPMIExternBmc;
+
+static int can_receive(void *opaque);
+static void receive(void *opaque, const uint8_t *buf, int size);
+static void chr_event(void *opaque, int event);
+
+static unsigned char
+ipmb_checksum(const unsigned char *data, int size, unsigned char start)
+{
+ unsigned char csum = start;
+
+ for (; size > 0; size--, data++)
+ csum += *data;
+
+ return csum;
+}
+
+static void continue_send(IPMIExternBmc *es)
+{
+ if (es->outlen == 0)
+ goto check_reset;
+
+ send:
+ es->outpos += qemu_chr_fe_write(es->chr, es->outbuf + es->outpos,
+ es->outlen - es->outpos);
+ if (es->outpos < es->outlen) {
+ /* Not fully transmitted, try again in a 10ms */
+ qemu_mod_timer(es->extern_timer,
+ qemu_get_clock_ns(vm_clock) + 10000000);
+ } else {
+ /* Sent */
+ es->outlen = 0;
+ es->outpos = 0;
+ if (!es->sending_cmd)
+ es->waiting_rsp = 1;
+ else
+ es->sending_cmd = 0;
+
+ check_reset:
+ if (es->send_reset) {
+ /* Send the reset */
+ es->outbuf[0] = VM_CMD_RESET;
+ es->outbuf[1] = VM_CMD_CHAR;
+ es->outlen = 2;
+ es->outpos = 0;
+ es->send_reset = 0;
+ es->sending_cmd = 1;
+ goto send;
+ }
+
+ if (es->waiting_rsp)
+ /* Make sure we get a response within 4 seconds. */
+ qemu_mod_timer(es->extern_timer,
+ qemu_get_clock_ns(vm_clock) + 4000000000ULL);
+ }
+ return;
+}
+
+static void extern_timeout(void *opaque)
+{
+ IPMIExternBmc *es = opaque;
+ IPMIDevice *s = es->idev;
+
+ ipmi_lock(s);
+ if (es->connected) {
+ if (es->waiting_rsp && (es->outlen == 0)) {
+ IPMIDeviceClass *k = IPMI_DEVICE_GET_CLASS(s);
+ /* The message response timed out, return an error. */
+ es->waiting_rsp = 0;
+ es->inbuf[1] = es->outbuf[1] | 0x04;
+ es->inbuf[2] = es->outbuf[2];
+ es->inbuf[3] = IPMI_CC_TIMEOUT;
+ k->handle_rsp(s, es->outbuf[0], es->inbuf + 1, 3);
+ } else {
+ continue_send(es);
+ }
+ }
+ ipmi_unlock(s);
+}
+
+static void addchar(IPMIExternBmc *es, unsigned char ch)
+{
+ switch (ch) {
+ case VM_MSG_CHAR:
+ case VM_CMD_CHAR:
+ case VM_ESCAPE_CHAR:
+ es->outbuf[es->outlen] = VM_ESCAPE_CHAR;
+ es->outlen++;
+ ch |= 0x10;
+ /* No break */
+
+ default:
+ es->outbuf[es->outlen] = ch;
+ es->outlen++;
+ }
+}
+
+static void ipmi_extern_handle_command(IPMIBmc *b,
+ uint8_t *cmd, unsigned int cmd_len,
+ unsigned int max_cmd_len,
+ uint8_t msg_id)
+{
+ IPMIExternBmc *es = DO_UPCAST(IPMIExternBmc, parent, b);
+ IPMIDevice *s = es->idev;
+ uint8_t err = 0, csum;
+ unsigned int i;
+
+ ipmi_lock(s);
+ if (es->outlen) {
+ /* We already have a command queued. Shouldn't ever happen. */
+ fprintf(stderr, "IPMI KCS: Got command when not finished with the"
+ " previous commmand\n");
+ abort();
+ }
+
+ /* If it's too short or it was truncated, return an error. */
+ if (cmd_len < 2)
+ err = IPMI_CC_REQUEST_DATA_LENGTH_INVALID;
+ else if ((cmd_len > max_cmd_len) || (cmd_len > MAX_IPMI_MSG_SIZE))
+ err = IPMI_CC_REQUEST_DATA_TRUNCATED;
+ else if (!es->connected)
+ err = IPMI_CC_BMC_INIT_IN_PROGRESS;
+ if (err) {
+ IPMIDeviceClass *k = IPMI_DEVICE_GET_CLASS(s);
+ unsigned char rsp[3];
+ rsp[0] = cmd[0] | 0x04;
+ rsp[1] = cmd[1];
+ rsp[2] = err;
+ es->waiting_rsp = 0;
+ k->handle_rsp(s, msg_id, rsp, 3);
+ goto out;
+ }
+
+ addchar(es, msg_id);
+ for (i = 0; i < cmd_len; i++)
+ addchar(es, cmd[i]);
+
+ csum = ipmb_checksum(&msg_id, 1, 0);
+ addchar(es, -ipmb_checksum(cmd, cmd_len, csum));
+
+ es->outbuf[es->outlen] = VM_MSG_CHAR;
+ es->outlen++;
+
+ /* Start the transmit */
+ continue_send(es);
+
+ out:
+ ipmi_unlock(s);
+ return;
+}
+
+static void handle_hw_op(IPMIExternBmc *es, unsigned char hw_op)
+{
+ IPMIDevice *s = es->idev;
+ IPMIDeviceClass *k = IPMI_DEVICE_GET_CLASS(s);
+
+ switch (hw_op) {
+ case VM_CMD_VERSION:
+ /* We only support one version at this time. */
+ break;
+
+ case VM_CMD_NOATTN:
+ k->set_atn(s, 0, 0);
+ break;
+
+ case VM_CMD_ATTN:
+ k->set_atn(s, 1, 0);
+ break;
+
+ case VM_CMD_ATTN_IRQ:
+ k->set_atn(s, 1, 1);
+ break;
+
+ case VM_CMD_POWEROFF:
+ k->do_hw_op(s, IPMI_POWEROFF_CHASSIS, 0);
+ break;
+
+ case VM_CMD_RESET:
+ k->do_hw_op(s, IPMI_RESET_CHASSIS, 0);
+ break;
+
+ case VM_CMD_ENABLE_IRQ:
+ k->set_irq_enable(s, 1);
+ break;
+
+ case VM_CMD_DISABLE_IRQ:
+ k->set_irq_enable(s, 0);
+ break;
+
+ case VM_CMD_SEND_NMI:
+ k->do_hw_op(s, IPMI_SEND_NMI, 0);
+ break;
+ }
+}
+
+static void handle_msg(IPMIExternBmc *es)
+{
+ IPMIDeviceClass *k = IPMI_DEVICE_GET_CLASS(es->idev);
+
+ if (es->in_escape) {
+ ipmi_debug("msg escape not ended\n");
+ return;
+ }
+ if (es->inpos < 5) {
+ ipmi_debug("msg too short\n");
+ return;
+ }
+ if (es->in_too_many) {
+ es->inbuf[3] = IPMI_CC_REQUEST_DATA_TRUNCATED;
+ es->inpos = 4;
+ } else if (ipmb_checksum(es->inbuf, es->inpos, 0) != 0) {
+ ipmi_debug("msg checksum failure\n");
+ return;
+ } else
+ es->inpos--; /* Remove checkum */
+
+ qemu_del_timer(es->extern_timer);
+ es->waiting_rsp = 0;
+ k->handle_rsp(es->idev, es->inbuf[0], es->inbuf + 1, es->inpos - 1);
+}
+
+static int can_receive(void *opaque)
+{
+ return 1;
+}
+
+static void receive(void *opaque, const uint8_t *buf, int size)
+{
+ IPMIExternBmc *es = opaque;
+ IPMIDevice *s = es->idev;
+ int i;
+ unsigned char hw_op;
+
+ ipmi_lock(s);
+ for (i = 0; i < size; i++) {
+ unsigned char ch = buf[i];
+
+ switch (ch) {
+ case VM_MSG_CHAR:
+ handle_msg(es);
+ es->in_too_many = 0;
+ es->inpos = 0;
+ break;
+
+ case VM_CMD_CHAR:
+ if (es->in_too_many) {
+ ipmi_debug("cmd in too many\n");
+ es->in_too_many = 0;
+ es->inpos = 0;
+ break;
+ }
+ if (es->in_escape) {
+ ipmi_debug("cmd in escape\n");
+ es->in_too_many = 0;
+ es->inpos = 0;
+ es->in_escape = 0;
+ break;
+ }
+ es->in_too_many = 0;
+ if (es->inpos < 1)
+ break;
+ hw_op = es->inbuf[0];
+ es->inpos = 0;
+ goto out_hw_op;
+ break;
+
+ case VM_ESCAPE_CHAR:
+ es->in_escape = 1;
+ break;
+
+ default:
+ if (es->in_escape) {
+ ch &= ~0x10;
+ es->in_escape = 0;
+ }
+
+ if (es->in_too_many)
+ break;
+
+ if (es->inpos >= sizeof(es->inbuf)) {
+ es->in_too_many = 1;
+ break;
+ }
+
+ es->inbuf[es->inpos] = ch;
+ es->inpos++;
+ break;
+ }
+ }
+ ipmi_unlock(s);
+ return;
+
+ out_hw_op:
+ ipmi_unlock(s);
+ /*
+ * We don't want to handle hardware operations while holding the
+ * lock, that may call back into this code to report a reset.
+ */
+ handle_hw_op(es, hw_op);
+}
+
+static void chr_event(void *opaque, int event)
+{
+ IPMIExternBmc *es = opaque;
+ IPMIDevice *s = es->idev;
+ IPMIDeviceClass *k = IPMI_DEVICE_GET_CLASS(s);
+ unsigned char v;
+
+ ipmi_lock(s);
+ switch (event) {
+ case CHR_EVENT_OPENED:
+ es->connected = 1;
+ es->outpos = 0;
+ es->outlen = 0;
+ addchar(es, VM_CMD_VERSION);
+ addchar(es, VM_PROTOCOL_VERSION);
+ es->outbuf[es->outlen] = VM_CMD_CHAR;
+ es->outlen++;
+ addchar(es, VM_CMD_CAPABILITIES);
+ v = VM_CAPABILITIES_IRQ | VM_CAPABILITIES_ATTN;
+ if (k->do_hw_op(es->idev, IPMI_POWEROFF_CHASSIS, 1) == 0)
+ v |= VM_CAPABILITIES_POWER;
+ if (k->do_hw_op(es->idev, IPMI_RESET_CHASSIS, 1) == 0)
+ v |= VM_CAPABILITIES_RESET;
+ if (k->do_hw_op(es->idev, IPMI_SEND_NMI, 1) == 0)
+ v |= VM_CAPABILITIES_NMI;
+ addchar(es, v);
+ es->outbuf[es->outlen] = VM_CMD_CHAR;
+ es->outlen++;
+ es->sending_cmd = 0;
+ continue_send(es);
+ break;
+
+ case CHR_EVENT_CLOSED:
+ if (!es->connected)
+ return;
+ es->connected = 0;
+ if (es->waiting_rsp) {
+ es->waiting_rsp = 0;
+ es->inbuf[1] = es->outbuf[1] | 0x04;
+ es->inbuf[2] = es->outbuf[2];
+ es->inbuf[3] = IPMI_CC_BMC_INIT_IN_PROGRESS;
+ k->handle_rsp(s, es->outbuf[0], es->inbuf + 1, 3);
+ }
+ break;
+ }
+ ipmi_unlock(s);
+}
+
+static void ipmi_extern_handle_reset(IPMIBmc *b)
+{
+ IPMIExternBmc *es = DO_UPCAST(IPMIExternBmc, parent, b);
+ IPMIDevice *s = es->idev;
+
+ ipmi_lock(s);
+ es->send_reset = 1;
+ continue_send(es);
+ ipmi_unlock(s);
+}
+
+static int ipmi_extern_init(IPMIBmc *b)
+{
+ IPMIExternBmc *es = DO_UPCAST(IPMIExternBmc, parent, b);
+
+ es->extern_timer = qemu_new_timer_ns(vm_clock, extern_timeout, es);
+ qemu_chr_add_handlers(es->chr, can_receive, receive, chr_event, es);
+ return 0;
+}
+
+static Property ipmi_extern_props[] = {
+ DEFINE_PROP_PTR("ipmiif", IPMIExternBmc, idev),
+ DEFINE_PROP_CHR("chardev", IPMIExternBmc, chr),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void ipmi_extern_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *k = DEVICE_CLASS(klass);
+ IPMIBmcClass *bk = IPMI_BMC_CLASS(klass);
+
+ bk->init = ipmi_extern_init;
+ bk->handle_command = ipmi_extern_handle_command;
+ bk->handle_reset = ipmi_extern_handle_reset;
+ k->props = ipmi_extern_props;
+}
+
+static TypeInfo ipmi_extern_type = {
+ .name = "ipmi-bmc-extern",
+ .parent = TYPE_IPMI_BMC,
+ .instance_size = sizeof(IPMIExternBmc),
+ .class_init = ipmi_extern_class_init,
+};
+
+static void ipmi_extern_register_types(void)
+{
+ type_register_static(&ipmi_extern_type);
+}
+
+type_init(ipmi_extern_register_types)
--
1.7.4.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* Re: [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
` (14 preceding siblings ...)
2012-07-15 20:25 ` [Qemu-devel] [PATCH 16/16] IPMI: Add an external connection simulation interface minyard
@ 2012-07-15 21:05 ` Corey Minyard
2012-07-16 15:46 ` Eric Blake
16 siblings, 0 replies; 23+ messages in thread
From: Corey Minyard @ 2012-07-15 21:05 UTC (permalink / raw)
To: qemu-devel
I messed up and didn't get an introduction for these patches. So here goes.
These patches are for adding an IPMI interface to QEMU. It adds a KCS
and BT interface; it should be easy to add a SMIC interface if anyone
wants that, but it's not often used. For simulation of an IPMI
management controller, it is a basic one that is built in to KVM, and it
can make a connection to an external simulator.
I think I got all the previous comments handled. Once I realized how
the class stuff worked, things made a lot more sense to me.
The OpenIPMI library (openipmi.sf.net) has a simulator that will work as
an external simulator in the latest release candidate.
This patch fixes up a few things that the IPMI driver needs:
Allow a driver to add entries to the SMBIOS table.
Add the ability for a chardev that makes an external connection to
reconnect if the initial connection fails or if it fails while in use.
In order to move the chardev to the external interface simulator, it had
to be released or the add to the external interface failed.
Patches 7 and 8 in the series are not really related, they are things
that I saw that seemed to be issues. I meant to pull them out but I
forgot. These patches really got accidentally sent, but since they are
out, well, they are out.
There are two things that I know of that are still missing:
Documentation. I'm planning to write docs for this, but I don't really
see a place to do this. I don't see many other docs for devices. Where
should I put them? If it's in qemu-options.hx, where in that file
should they be?
Tests. I looked at the test infrastructure, and I don't really see many
tests, so not much to go on for examples. I think I have it figured
out, but I'll basically have to write a driver to be able to really test
this. It would be nice if I could use the Linux driver, but I guess
that's not really feasible.
-corey
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [Qemu-devel] [PATCH 10/16] qom: release previous object when setting
2012-07-15 20:25 ` [Qemu-devel] [PATCH 10/16] qom: release previous object when setting minyard
@ 2012-07-16 6:24 ` Paolo Bonzini
2012-07-17 0:07 ` Corey Minyard
0 siblings, 1 reply; 23+ messages in thread
From: Paolo Bonzini @ 2012-07-16 6:24 UTC (permalink / raw)
To: minyard; +Cc: Corey Minyard, qemu-devel
Il 15/07/2012 22:25, minyard@acm.org ha scritto:
> From: Corey Minyard <cminyard@mvista.com>
>
> When setting an object, if you don't release the previous object
> that was there, it may become unusable. This change allows a
> chardev to be removed from one object's properties and added to
> another's.
> ---
> qom/object.c | 2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/qom/object.c b/qom/object.c
> index 00bb3b0..484dc77 100644
> --- a/qom/object.c
> +++ b/qom/object.c
> @@ -731,6 +731,8 @@ void object_property_set(Object *obj, Visitor *v, const char *name,
> if (!prop->set) {
> error_set(errp, QERR_PERMISSION_DENIED);
> } else {
> + if (prop->release)
> + prop->release(obj, name, prop->opaque);
> prop->set(obj, v, prop->opaque, name, errp);
> }
> }
>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
... but you need to run scripts/checkpatch.pl on your patches to conform
to coding style.
Thanks!
Paolo
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [Qemu-devel] [PATCH 12/16] IPMI: Add a PC ISA type structure
2012-07-15 20:25 ` [Qemu-devel] [PATCH 12/16] IPMI: Add a PC ISA type structure minyard
@ 2012-07-16 7:16 ` Paolo Bonzini
2012-07-17 0:16 ` Corey Minyard
0 siblings, 1 reply; 23+ messages in thread
From: Paolo Bonzini @ 2012-07-16 7:16 UTC (permalink / raw)
To: minyard; +Cc: Corey Minyard, qemu-devel
Il 15/07/2012 22:25, minyard@acm.org ha scritto:
> + /* Clear the property from this device so we can put it elsewhere */
> + chr = isa->chr;
> + qdev_prop_set_chr(&dev->qdev, "chardev", NULL);
> +
> + if (chr) {
> + bdev = qdev_create(NULL, "ipmi-bmc-extern");
> + qdev_prop_set_chr(bdev, "chardev", chr);
> + } else {
> + bdev = qdev_create(NULL, "ipmi-bmc-sim");
> + }
> + snprintf(typename, sizeof(typename), "ipmi-interface-%s", isa->interface);
> + idev = qdev_create(&isa_bus->qbus, typename);
> + qdev_prop_set_ptr(bdev, "ipmiif", idev);
> + qdev_prop_set_uint64(idev, "iobase", isa->iobase);
> + qdev_prop_set_ptr(idev, "bmc", bdev);
> + qdev_prop_set_uint8(idev, "slave-addr", isa->slave_addr);
> + rc = qdev_init(idev);
I think this is adding a bit of extra complication. You do not need to
add explicit devices for this.
If you want to make ipmi-bmc-* and ipmi-interface-* objects, you can
create them with object_new, set the properties manually with the
returned pointer and add the object to the parent with
object_property_add_child.
Otherwise, it should also be fine if you just add them as function pointers.
Either way also lets you keep the ownership of the chardev in the ISA
IPMI device, and avoids that "info qtree" looks strange and does not
show the chardev you assigned.
Paolo
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
` (15 preceding siblings ...)
2012-07-15 21:05 ` [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry Corey Minyard
@ 2012-07-16 15:46 ` Eric Blake
2012-07-17 0:06 ` Corey Minyard
16 siblings, 1 reply; 23+ messages in thread
From: Eric Blake @ 2012-07-16 15:46 UTC (permalink / raw)
To: minyard; +Cc: Corey Minyard, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 926 bytes --]
On 07/15/2012 02:24 PM, minyard@acm.org wrote:
> From: Corey Minyard <cminyard@mvista.com>
>
> There was no way to directly add a table entry to the SMBIOS table,
> even though the BIOS supports this. So add a function to do this.
> This is in preparation for the IPMI handler adding it's SMBIOS table
> entry.
>
> Signed-off-by: Corey Minyard <cminyard@mvista.com>
> ---
> hw/smbios.c | 27 +++++++++++++++++++++++++++
> hw/smbios.h | 15 ++++++++-------
> 2 files changed, 35 insertions(+), 7 deletions(-)
Are you planning to expose this via the command line? Libvirt would
like the ability to set arbitrary name/value pairs in SMBIOS (such as
asset tag in the type 3 page), rather than the current limitation of
only being able to set pre-defined names in just type 0 and 1 sections.
--
Eric Blake eblake@redhat.com +1-919-301-3266
Libvirt virtualization library http://libvirt.org
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 620 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry
2012-07-16 15:46 ` Eric Blake
@ 2012-07-17 0:06 ` Corey Minyard
0 siblings, 0 replies; 23+ messages in thread
From: Corey Minyard @ 2012-07-17 0:06 UTC (permalink / raw)
To: Eric Blake; +Cc: Corey Minyard, qemu-devel
On 07/16/2012 10:46 AM, Eric Blake wrote:
> On 07/15/2012 02:24 PM, minyard@acm.org wrote:
>> From: Corey Minyard <cminyard@mvista.com>
>>
>> There was no way to directly add a table entry to the SMBIOS table,
>> even though the BIOS supports this. So add a function to do this.
>> This is in preparation for the IPMI handler adding it's SMBIOS table
>> entry.
>>
>> Signed-off-by: Corey Minyard <cminyard@mvista.com>
>> ---
>> hw/smbios.c | 27 +++++++++++++++++++++++++++
>> hw/smbios.h | 15 ++++++++-------
>> 2 files changed, 35 insertions(+), 7 deletions(-)
> Are you planning to expose this via the command line? Libvirt would
> like the ability to set arbitrary name/value pairs in SMBIOS (such as
> asset tag in the type 3 page), rather than the current limitation of
> only being able to set pre-defined names in just type 0 and 1 sections.
>
Well, I wan't planning on it, I only did what I needed for IPMI. Adding
a command line interface would be more learning that I can probably
afford right now.
-corey
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [Qemu-devel] [PATCH 10/16] qom: release previous object when setting
2012-07-16 6:24 ` Paolo Bonzini
@ 2012-07-17 0:07 ` Corey Minyard
0 siblings, 0 replies; 23+ messages in thread
From: Corey Minyard @ 2012-07-17 0:07 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: Corey Minyard, qemu-devel
On 07/16/2012 01:24 AM, Paolo Bonzini wrote:
> Il 15/07/2012 22:25, minyard@acm.org ha scritto:
>> From: Corey Minyard <cminyard@mvista.com>
>>
>> When setting an object, if you don't release the previous object
>> that was there, it may become unusable. This change allows a
>> chardev to be removed from one object's properties and added to
>> another's.
>> ---
>> qom/object.c | 2 ++
>> 1 files changed, 2 insertions(+), 0 deletions(-)
>>
>> diff --git a/qom/object.c b/qom/object.c
>> index 00bb3b0..484dc77 100644
>> --- a/qom/object.c
>> +++ b/qom/object.c
>> @@ -731,6 +731,8 @@ void object_property_set(Object *obj, Visitor *v, const char *name,
>> if (!prop->set) {
>> error_set(errp, QERR_PERMISSION_DENIED);
>> } else {
>> + if (prop->release)
>> + prop->release(obj, name, prop->opaque);
>> prop->set(obj, v, prop->opaque, name, errp);
>> }
>> }
>>
> Acked-by: Paolo Bonzini <pbonzini@redhat.com>
>
> ... but you need to run scripts/checkpatch.pl on your patches to conform
> to coding style.
Ok. I'm running everything through the script. I didn't realize the
coding standard was that different from Linux.
Thanks,
-corey
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [Qemu-devel] [PATCH 12/16] IPMI: Add a PC ISA type structure
2012-07-16 7:16 ` Paolo Bonzini
@ 2012-07-17 0:16 ` Corey Minyard
0 siblings, 0 replies; 23+ messages in thread
From: Corey Minyard @ 2012-07-17 0:16 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: Corey Minyard, qemu-devel
On 07/16/2012 02:16 AM, Paolo Bonzini wrote:
> Il 15/07/2012 22:25, minyard@acm.org ha scritto:
>> + /* Clear the property from this device so we can put it elsewhere */
>> + chr = isa->chr;
>> + qdev_prop_set_chr(&dev->qdev, "chardev", NULL);
>> +
>> + if (chr) {
>> + bdev = qdev_create(NULL, "ipmi-bmc-extern");
>> + qdev_prop_set_chr(bdev, "chardev", chr);
>> + } else {
>> + bdev = qdev_create(NULL, "ipmi-bmc-sim");
>> + }
>> + snprintf(typename, sizeof(typename), "ipmi-interface-%s", isa->interface);
>> + idev = qdev_create(&isa_bus->qbus, typename);
>> + qdev_prop_set_ptr(bdev, "ipmiif", idev);
>> + qdev_prop_set_uint64(idev, "iobase", isa->iobase);
>> + qdev_prop_set_ptr(idev, "bmc", bdev);
>> + qdev_prop_set_uint8(idev, "slave-addr", isa->slave_addr);
>> + rc = qdev_init(idev);
> I think this is adding a bit of extra complication. You do not need to
> add explicit devices for this.
Yeah, but the qdevs did a lot of nice things for me :). But I understand.
>
> If you want to make ipmi-bmc-* and ipmi-interface-* objects, you can
> create them with object_new, set the properties manually with the
> returned pointer and add the object to the parent with
> object_property_add_child.
The main reason I went with qdevs originally was because all the
properties are defined for qdevs. I'd have to do all my own properties
otherwise.
However, I think all the properties are represented by what is already
there in isa-ipmi, so just having pointers to the interface and bmc
objects is ok, I think.
>
> Otherwise, it should also be fine if you just add them as function pointers.
>
> Either way also lets you keep the ownership of the chardev in the ISA
> IPMI device, and avoids that "info qtree" looks strange and does not
> show the chardev you assigned.
Yeah, I see that now. Makes sense.
BTW, where do you want me to document this? I didn't see an obvious
place in qemu-options.hx.
I'm working on tests, too. I didn't find much there already, but I'll
see what I can add.
Thanks,
-corey
^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2012-07-17 0:16 UTC | newest]
Thread overview: 23+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-07-15 20:24 [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry minyard
2012-07-15 20:24 ` [Qemu-devel] [PATCH 02/16] pc: move SMBIOS setup to after device init minyard
2012-07-15 20:24 ` [Qemu-devel] [PATCH 03/16] vl: Move init_timer_alarm() earlier minyard
2012-07-15 20:24 ` [Qemu-devel] [PATCH 04/16] qemu-char: Allocate CharDriverState in qemu_chr_new_from_opts minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 05/16] qemu-char: Allow a chardev to reconnect if disconnected minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 06/16] qemu-char: Fix a race reporting opens and closes minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 07/16] qemu-char: remove free of chr from win_stdio_close minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 08/16] qemu-char: Close fd at end of file minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 09/16] qdev: Add a pre-firmware init capability minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 10/16] qom: release previous object when setting minyard
2012-07-16 6:24 ` Paolo Bonzini
2012-07-17 0:07 ` Corey Minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 11/16] Add a base IPMI interface minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 12/16] IPMI: Add a PC ISA type structure minyard
2012-07-16 7:16 ` Paolo Bonzini
2012-07-17 0:16 ` Corey Minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 13/16] IPMI: Add a KCS low-level interface minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 14/16] IPMI: Add a BT " minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 15/16] IPMI: Add a local BMC simulation minyard
2012-07-15 20:25 ` [Qemu-devel] [PATCH 16/16] IPMI: Add an external connection simulation interface minyard
2012-07-15 21:05 ` [Qemu-devel] [PATCH 01/16] smbios: Add a function to directly add an entry Corey Minyard
2012-07-16 15:46 ` Eric Blake
2012-07-17 0:06 ` Corey Minyard
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