[PATCH] xhci: EHCI/xHCI ports switching on Intense-PC.

[PATCH] xhci: EHCI/xHCI ports switching on Intense-PC.

[Denis Turischev]

Intense-PC is Compulab's mini-desktop with Intel Panther Point
chipset.

Unconditional ports switching provided by function
usb_enable_xhci_ports() leads to surprising results, after shutdown
system powered-on again after a few seconds. On Windows power
related problems were not observed.

The patch avoids ports switching for Intense-PC.

Signed-off-by: Denis Turischev <denis@compulab.co.il>
---
 drivers/usb/host/pci-quirks.c |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
index df0828c..6f72593 100644
--- a/drivers/usb/host/pci-quirks.c
+++ b/drivers/usb/host/pci-quirks.c
@@ -759,6 +759,13 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
 {
 	u32		ports_available;

+	const char *brd_name;
+	brd_name = dmi_get_system_info(DMI_BOARD_NAME);
+
+	/* quirk for Compulab's Intense-PC board */
+	if (brd_name && strstr(brd_name, "Intense-PC"))
+		return;
+
 	/* Don't switchover the ports if the user hasn't compiled the xHCI
 	 * driver.  Otherwise they will see "dead" USB ports that don't power
 	 * the devices.
-- 
1.7.9.5

Re: [PATCH] xhci: EHCI/xHCI ports switching on Intense-PC.

[Sarah Sharp]

On Mon, Jul 16, 2012 at 07:46:06PM +0300, Denis Turischev wrote:
> Intense-PC is Compulab's mini-desktop with Intel Panther Point
> chipset.
> 
> Unconditional ports switching provided by function
> usb_enable_xhci_ports() leads to surprising results, after shutdown
> system powered-on again after a few seconds. On Windows power
> related problems were not observed.

Do you have wake on lan enabled in the BIOS?  I have heard reports from
other users that this is a BIOS bug triggered by WOL.

> The patch avoids ports switching for Intense-PC.
> 
> Signed-off-by: Denis Turischev <denis@compulab.co.il>
> ---
>  drivers/usb/host/pci-quirks.c |    7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
> index df0828c..6f72593 100644
> --- a/drivers/usb/host/pci-quirks.c
> +++ b/drivers/usb/host/pci-quirks.c
> @@ -759,6 +759,13 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
>  {
>  	u32		ports_available;
> 
> +	const char *brd_name;
> +	brd_name = dmi_get_system_info(DMI_BOARD_NAME);
> +
> +	/* quirk for Compulab's Intense-PC board */
> +	if (brd_name && strstr(brd_name, "Intense-PC"))
> +		return;
> +

No, this fix is not acceptable.  You won't get USB 3.0 speeds if the
ports are not switched over.  Now, we can add a quirk to the xHCI
shutdown function to switch the ports back to EHCI on shutdown.  That
might not trigger the BIOS bug.

Sarah Sharp

Re: [PATCH] xhci: EHCI/xHCI ports switching on Intense-PC.

[Sergei Shtylyov]

Hello.

On 16-07-2012 20:46, Denis Turischev wrote:

> Intense-PC is Compulab's mini-desktop with Intel Panther Point
> chipset.

> Unconditional ports switching provided by function
> usb_enable_xhci_ports() leads to surprising results, after shutdown
> system powered-on again after a few seconds. On Windows power
> related problems were not observed.

> The patch avoids ports switching for Intense-PC.

> Signed-off-by: Denis Turischev <denis@compulab.co.il>
> ---
>   drivers/usb/host/pci-quirks.c |    7 +++++++
>   1 file changed, 7 insertions(+)

> diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
> index df0828c..6f72593 100644
> --- a/drivers/usb/host/pci-quirks.c
> +++ b/drivers/usb/host/pci-quirks.c
> @@ -759,6 +759,13 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
>   {
>   	u32		ports_available;
>
> +	const char *brd_name;

    Group this declaration with the above one please.

> +	brd_name = dmi_get_system_info(DMI_BOARD_NAME);

    Could be an initializer...

WBR, Sergei

Re: [PATCH] xhci: EHCI/xHCI ports switching on Intense-PC.

[Denis Turischev]

On 07/17/2012 07:54 AM, Sarah Sharp wrote:
> On Mon, Jul 16, 2012 at 07:46:06PM +0300, Denis Turischev wrote:
>> Intense-PC is Compulab's mini-desktop with Intel Panther Point
>> chipset.
>>
>> Unconditional ports switching provided by function
>> usb_enable_xhci_ports() leads to surprising results, after shutdown
>> system powered-on again after a few seconds. On Windows power
>> related problems were not observed.
> 
> Do you have wake on lan enabled in the BIOS?  I have heard reports from
> other users that this is a BIOS bug triggered by WOL.

Bug appears with WOL disabled too, moreover, it appears with PCH LAN
disabled at all in the BIOS.

> 
>> The patch avoids ports switching for Intense-PC.
>>
>> Signed-off-by: Denis Turischev <denis@compulab.co.il>
>> ---
>>  drivers/usb/host/pci-quirks.c |    7 +++++++
>>  1 file changed, 7 insertions(+)
>>
>> diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
>> index df0828c..6f72593 100644
>> --- a/drivers/usb/host/pci-quirks.c
>> +++ b/drivers/usb/host/pci-quirks.c
>> @@ -759,6 +759,13 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
>>  {
>>  	u32		ports_available;
>>
>> +	const char *brd_name;
>> +	brd_name = dmi_get_system_info(DMI_BOARD_NAME);
>> +
>> +	/* quirk for Compulab's Intense-PC board */
>> +	if (brd_name && strstr(brd_name, "Intense-PC"))
>> +		return;
>> +
> 
> No, this fix is not acceptable.  You won't get USB 3.0 speeds if the
> ports are not switched over.  Now, we can add a quirk to the xHCI
> shutdown function to switch the ports back to EHCI on shutdown.  That
> might not trigger the BIOS bug.

Yes, switching back to EHCI in xhci_shutdown() solves the problem.

I suppose to do something like this in xhci_shutdown:
	pdev = to_pci_dev(hcd->self.controller);

	if (usb_is_intel_switchable_xhci(pdev)){
		brd_name = dmi_get_system_info(DMI_BOARD_NAME);

		/* quirk for Compulab's Intense-PC board */
		if (brd_name && strstr(brd_name, "Intense-PC"))
			usb_disable_xhci_ports(pdev);
	}

Is it ok?

May be it worth to disable xhci ports for all intel switchable
devices, not only for Intense-PC?

Re: [PATCH] xhci: EHCI/xHCI ports switching on Intense-PC.

[Sarah Sharp]

On Wed, Jul 18, 2012 at 09:57:30AM +0300, Denis Turischev wrote:
> On 07/17/2012 07:54 AM, Sarah Sharp wrote:
> > On Mon, Jul 16, 2012 at 07:46:06PM +0300, Denis Turischev wrote:
> >> Intense-PC is Compulab's mini-desktop with Intel Panther Point
> >> chipset.
> >>
> >> Unconditional ports switching provided by function
> >> usb_enable_xhci_ports() leads to surprising results, after shutdown
> >> system powered-on again after a few seconds. On Windows power
> >> related problems were not observed.
> > 
> > Do you have wake on lan enabled in the BIOS?  I have heard reports from
> > other users that this is a BIOS bug triggered by WOL.
> 
> Bug appears with WOL disabled too, moreover, it appears with PCH LAN
> disabled at all in the BIOS.

Hmm, ok, not the same bug then.

> > No, this fix is not acceptable.  You won't get USB 3.0 speeds if the
> > ports are not switched over.  Now, we can add a quirk to the xHCI
> > shutdown function to switch the ports back to EHCI on shutdown.  That
> > might not trigger the BIOS bug.
> 
> Yes, switching back to EHCI in xhci_shutdown() solves the problem.

Ok, good to know.

The other thing to try would be to turn off all "wake on" bits in the
port status registers in xhci_shutdown().  That might cause the xHCI
host to stop generating spurious PMEs.

It would actually be good to check that the xHCI host is the cause of
the PME that reboots the system.  I'm pretty sure there's a sysfs or
proc file that shows where the PMEs are coming from, but I can't
remember where it is off the top of my head.

> I suppose to do something like this in xhci_shutdown:
> 	pdev = to_pci_dev(hcd->self.controller);
> 
> 	if (usb_is_intel_switchable_xhci(pdev)){
> 		brd_name = dmi_get_system_info(DMI_BOARD_NAME);
> 
> 		/* quirk for Compulab's Intense-PC board */
> 		if (brd_name && strstr(brd_name, "Intense-PC"))
> 			usb_disable_xhci_ports(pdev);
> 	}
> 
> Is it ok?
> 
> May be it worth to disable xhci ports for all intel switchable
> devices, not only for Intense-PC?

I'm not sure.  I'm still talking with our hardware and BIOS team to
determine which boards have this issue.  I suspect it's more than just
your board.

The only thing I wonder is if the PCI quirks will run when the xHCI
driver is reloaded.  If not, the ports will never be switched back to
xHCI.

We might need to add a port switch back to xHCI in the xhci_init
function.  That means if someone unloads the xHCI driver and reloads it,
their devices will appear under EHCI, and then disconnect and switch
over to xHCI.

However, I suppose that's the same as what happens if you unload the
EHCI driver on a system with an OHCI or UHCI companion controller.  So I
think it should be OK to attempt to switchover the ports in xhci_init.

Sarah Sharp

[PATCH 1/2] xhci: provide usb_disable_xhci_ports function for Intel chipsets.

[Denis Turischev]

Some devices with Intel Panther Point chipset may require switchover
usb ports from XHCI back to EHCI controller before shutdown.
Overwise various BIOS bugs related to power management may be
triggered.

Signed-off-by: Denis Turischev <denis@compulab.co.il>
---
 drivers/usb/host/pci-quirks.c |   14 ++++++++++++++
 drivers/usb/host/pci-quirks.h |    1 +
 2 files changed, 15 insertions(+)

diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
index df0828c..b19a84a 100644
--- a/drivers/usb/host/pci-quirks.c
+++ b/drivers/usb/host/pci-quirks.c
@@ -800,6 +800,20 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
 }
 EXPORT_SYMBOL_GPL(usb_enable_xhci_ports);

+void usb_disable_xhci_ports(struct pci_dev *xhci_pdev)
+{
+	u32		ports_available;
+
+	ports_available = 0x0;
+
+	pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN,
+			cpu_to_le32(ports_available));
+
+	pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR,
+			cpu_to_le32(ports_available));
+}
+EXPORT_SYMBOL_GPL(usb_disable_xhci_ports);
+
 /**
  * PCI Quirks for xHCI.
  *
diff --git a/drivers/usb/host/pci-quirks.h b/drivers/usb/host/pci-quirks.h
index b1002a8..ef004a5 100644
--- a/drivers/usb/host/pci-quirks.h
+++ b/drivers/usb/host/pci-quirks.h
@@ -10,6 +10,7 @@ void usb_amd_quirk_pll_disable(void);
 void usb_amd_quirk_pll_enable(void);
 bool usb_is_intel_switchable_xhci(struct pci_dev *pdev);
 void usb_enable_xhci_ports(struct pci_dev *xhci_pdev);
+void usb_disable_xhci_ports(struct pci_dev *xhci_pdev);
 #else
 static inline void usb_amd_quirk_pll_disable(void) {}
 static inline void usb_amd_quirk_pll_enable(void) {}
-- 
1.7.9.5

[PATCH 2/2] xhci: EHCI/XHCI ports switching on Intense-PC.

[Denis Turischev]

Intense-PC is Compulab's mini-desktop with Intel Panther Point
chipset.

Unconditional switchover to xHCI provided by function
usb_enable_xhci_ports() leads to surprising results, after shutdown
system powered-on again after a few seconds. On Windows power
related problems were not observed. Switching back to EHCI solves
the problem.

The patch switches usb ports back to EHCI during xhci shutdown
for Intense-PC.

Signed-off-by: Denis Turischev <denis@compulab.co.il>
---
 drivers/usb/host/xhci.c |   14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index a979cd0..541efaa 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -26,6 +26,8 @@
 #include <linux/module.h>
 #include <linux/moduleparam.h>
 #include <linux/slab.h>
+#include <linux/dmi.h>
+#include "pci-quirks.h"

 #include "xhci.h"

@@ -656,8 +658,20 @@ void xhci_stop(struct usb_hcd *hcd)
  */
 void xhci_shutdown(struct usb_hcd *hcd)
 {
+	struct pci_dev *pdev;
+	const char *brd_name;
 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);

+	pdev = to_pci_dev(hcd->self.controller);
+
+	if (usb_is_intel_switchable_xhci(pdev)) {
+		brd_name = dmi_get_system_info(DMI_BOARD_NAME);
+
+		/* quirk for Compulab's Intense-PC board */
+		if (brd_name && strstr(brd_name, "Intense-PC"))
+			usb_disable_xhci_ports(pdev);
+	}
+
 	spin_lock_irq(&xhci->lock);
 	xhci_halt(xhci);
 	spin_unlock_irq(&xhci->lock);
-- 
1.7.9.5

Re: [PATCH 1/2] xhci: provide usb_disable_xhci_ports function for Intel chipsets.

[Sergei Shtylyov]

Hello.

On 07/23/2012 03:46 PM, Denis Turischev wrote:

> Some devices with Intel Panther Point chipset may require switchover
> usb ports from XHCI back to EHCI controller before shutdown.
> Overwise various BIOS bugs related to power management may be
> triggered.

> Signed-off-by: Denis Turischev <denis@compulab.co.il>
> ---
>  drivers/usb/host/pci-quirks.c |   14 ++++++++++++++
>  drivers/usb/host/pci-quirks.h |    1 +
>  2 files changed, 15 insertions(+)

> diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
> index df0828c..b19a84a 100644
> --- a/drivers/usb/host/pci-quirks.c
> +++ b/drivers/usb/host/pci-quirks.c
> @@ -800,6 +800,20 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
>  }
>  EXPORT_SYMBOL_GPL(usb_enable_xhci_ports);
> 
> +void usb_disable_xhci_ports(struct pci_dev *xhci_pdev)
> +{
> +	u32		ports_available;
> +
> +	ports_available = 0x0;

   Why not make it an initializer? And why do you need the variable at all?

> +
> +	pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN,
> +			cpu_to_le32(ports_available));

   cpu_to_le32() not needed.

> +
> +	pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR,
> +			cpu_to_le32(ports_available));
> +}
> +EXPORT_SYMBOL_GPL(usb_disable_xhci_ports);
> +
>  /**
>   * PCI Quirks for xHCI.
>   *

WBR, Sergei

[PATCH 1/2 v2] xhci: provide usb_disable_xhci_ports function for Intel chipsets.

[Denis Turischev]

Some devices with Intel Panther Point chipset may require switchover
usb ports from XHCI back to EHCI controller before shutdown.
Otherwise various BIOS bugs related to power management may be
triggered.

v2: deleted unnecessary variables.

Signed-off-by: Denis Turischev <denis@compulab.co.il>
---
 drivers/usb/host/pci-quirks.c |    7 +++++++
 drivers/usb/host/pci-quirks.h |    1 +
 2 files changed, 8 insertions(+)

diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
index df0828c..c5e9e4a 100644
--- a/drivers/usb/host/pci-quirks.c
+++ b/drivers/usb/host/pci-quirks.c
@@ -800,6 +800,13 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
 }
 EXPORT_SYMBOL_GPL(usb_enable_xhci_ports);

+void usb_disable_xhci_ports(struct pci_dev *xhci_pdev)
+{
+	pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN, 0x0);
+	pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR, 0x0);
+}
+EXPORT_SYMBOL_GPL(usb_disable_xhci_ports);
+
 /**
  * PCI Quirks for xHCI.
  *
diff --git a/drivers/usb/host/pci-quirks.h b/drivers/usb/host/pci-quirks.h
index b1002a8..ef004a5 100644
--- a/drivers/usb/host/pci-quirks.h
+++ b/drivers/usb/host/pci-quirks.h
@@ -10,6 +10,7 @@ void usb_amd_quirk_pll_disable(void);
 void usb_amd_quirk_pll_enable(void);
 bool usb_is_intel_switchable_xhci(struct pci_dev *pdev);
 void usb_enable_xhci_ports(struct pci_dev *xhci_pdev);
+void usb_disable_xhci_ports(struct pci_dev *xhci_pdev);
 #else
 static inline void usb_amd_quirk_pll_disable(void) {}
 static inline void usb_amd_quirk_pll_enable(void) {}
-- 
1.7.9.5

Re: [PATCH 2/2] xhci: EHCI/XHCI ports switching on Intense-PC.

[Sarah Sharp]

Did you try disabling the wake on bits in the port status registers?  I
would prefer that solution if it works.

Otherwise this patchset looks fine.  I'll work with the hardware folks
and see if this is exposed on other boards.  Also, this is not a BIOS
bug, but a hardware issue that can be worked around in BIOS.  So I might
edit your description on the first patch a bit when I submit it to Greg.

Sarah Sharp

On Mon, Jul 23, 2012 at 02:46:32PM +0300, Denis Turischev wrote:
> Intense-PC is Compulab's mini-desktop with Intel Panther Point
> chipset.
> 
> Unconditional switchover to xHCI provided by function
> usb_enable_xhci_ports() leads to surprising results, after shutdown
> system powered-on again after a few seconds. On Windows power
> related problems were not observed. Switching back to EHCI solves
> the problem.
> 
> The patch switches usb ports back to EHCI during xhci shutdown
> for Intense-PC.
> 
> Signed-off-by: Denis Turischev <denis@compulab.co.il>
> ---
>  drivers/usb/host/xhci.c |   14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
> index a979cd0..541efaa 100644
> --- a/drivers/usb/host/xhci.c
> +++ b/drivers/usb/host/xhci.c
> @@ -26,6 +26,8 @@
>  #include <linux/module.h>
>  #include <linux/moduleparam.h>
>  #include <linux/slab.h>
> +#include <linux/dmi.h>
> +#include "pci-quirks.h"
> 
>  #include "xhci.h"
> 
> @@ -656,8 +658,20 @@ void xhci_stop(struct usb_hcd *hcd)
>   */
>  void xhci_shutdown(struct usb_hcd *hcd)
>  {
> +	struct pci_dev *pdev;
> +	const char *brd_name;
>  	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
> 
> +	pdev = to_pci_dev(hcd->self.controller);
> +
> +	if (usb_is_intel_switchable_xhci(pdev)) {
> +		brd_name = dmi_get_system_info(DMI_BOARD_NAME);
> +
> +		/* quirk for Compulab's Intense-PC board */
> +		if (brd_name && strstr(brd_name, "Intense-PC"))
> +			usb_disable_xhci_ports(pdev);
> +	}
> +
>  	spin_lock_irq(&xhci->lock);
>  	xhci_halt(xhci);
>  	spin_unlock_irq(&xhci->lock);
> -- 
> 1.7.9.5
> 

Re: [PATCH 2/2] xhci: EHCI/XHCI ports switching on Intense-PC.

[Denis Turischev]

On 07/23/2012 08:44 PM, Sarah Sharp wrote:
> Did you try disabling the wake on bits in the port status registers?  I
> would prefer that solution if it works.
No, I didn't. Why we need to disable wake on capabilities?
> 
> Otherwise this patchset looks fine.  I'll work with the hardware folks
> and see if this is exposed on other boards.  Also, this is not a BIOS
> bug, but a hardware issue that can be worked around in BIOS.  So I might
> edit your description on the first patch a bit when I submit it to Greg.
Of course, please edit it if required.
> 
> Sarah Sharp
> 
> On Mon, Jul 23, 2012 at 02:46:32PM +0300, Denis Turischev wrote:
>> Intense-PC is Compulab's mini-desktop with Intel Panther Point
>> chipset.
>>
>> Unconditional switchover to xHCI provided by function
>> usb_enable_xhci_ports() leads to surprising results, after shutdown
>> system powered-on again after a few seconds. On Windows power
>> related problems were not observed. Switching back to EHCI solves
>> the problem.
>>
>> The patch switches usb ports back to EHCI during xhci shutdown
>> for Intense-PC.
>>
>> Signed-off-by: Denis Turischev <denis@compulab.co.il>
>> ---
>>  drivers/usb/host/xhci.c |   14 ++++++++++++++
>>  1 file changed, 14 insertions(+)
>>
>> diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
>> index a979cd0..541efaa 100644
>> --- a/drivers/usb/host/xhci.c
>> +++ b/drivers/usb/host/xhci.c
>> @@ -26,6 +26,8 @@
>>  #include <linux/module.h>
>>  #include <linux/moduleparam.h>
>>  #include <linux/slab.h>
>> +#include <linux/dmi.h>
>> +#include "pci-quirks.h"
>>
>>  #include "xhci.h"
>>
>> @@ -656,8 +658,20 @@ void xhci_stop(struct usb_hcd *hcd)
>>   */
>>  void xhci_shutdown(struct usb_hcd *hcd)
>>  {
>> +	struct pci_dev *pdev;
>> +	const char *brd_name;
>>  	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
>>
>> +	pdev = to_pci_dev(hcd->self.controller);
>> +
>> +	if (usb_is_intel_switchable_xhci(pdev)) {
>> +		brd_name = dmi_get_system_info(DMI_BOARD_NAME);
>> +
>> +		/* quirk for Compulab's Intense-PC board */
>> +		if (brd_name && strstr(brd_name, "Intense-PC"))
>> +			usb_disable_xhci_ports(pdev);
>> +	}
>> +
>>  	spin_lock_irq(&xhci->lock);
>>  	xhci_halt(xhci);
>>  	spin_unlock_irq(&xhci->lock);
>> -- 
>> 1.7.9.5
>>

Re: [PATCH 2/2] xhci: EHCI/XHCI ports switching on Intense-PC.

[Sarah Sharp]

On Tue, Jul 24, 2012 at 11:50:42AM +0300, Denis Turischev wrote:
> On 07/23/2012 08:44 PM, Sarah Sharp wrote:
> > Did you try disabling the wake on bits in the port status registers?  I
> > would prefer that solution if it works.
> No, I didn't. Why we need to disable wake on capabilities?

My theory was that the xHCI host controller was waking up the system
because one of the wake on bits was set.  But you said that didn't help,
so we'll just switch the ports over on shutdown.

Sarah Sharp

Re: [PATCH 2/2] xhci: EHCI/XHCI ports switching on Intense-PC.

[Sarah Sharp]

Hi Denis,

Can you send me the output of `sudo dmidecode`?  I'd like to see if I
can make a more general patch apply to the Intense-PC.

Sarah Sharp

Re: [PATCH 2/2] xhci: EHCI/XHCI ports switching on Intense-PC.

[Oliver Neukum]

On Monday 30 July 2012 15:34:06 Sarah Sharp wrote:
> Hi Denis,
> 
> Can you send me the output of `sudo dmidecode`?  I'd like to see if I
> can make a more general patch apply to the Intense-PC.

As this is for shutdown, why not all systems?

	Regards
		Oliver

Re: [PATCH 2/2] xhci: EHCI/XHCI ports switching on Intense-PC.

[Denis Turischev]

[-- Attachment #1: Type: text/plain, Size: 278 bytes --]

Hi Sarah,
Attached dmidecode output of Intense-PC.

Denis Turischev


On 07/31/2012 01:34 AM, Sarah Sharp wrote:
> Hi Denis,
> 
> Can you send me the output of `sudo dmidecode`?  I'd like to see if I
> can make a more general patch apply to the Intense-PC.
> 
> Sarah Sharp
> 


[-- Attachment #2: dmidecode.intense-PC --]
[-- Type: text/plain, Size: 19893 bytes --]

# dmidecode 2.11
SMBIOS 2.7 present.
62 structures occupying 2533 bytes.
Table at 0x000E0840.

Handle 0x0004, DMI type 4, 42 bytes
Processor Information
	Socket Designation: CPU Socket - soldered on-board
	Type: Central Processor
	Family: Core i7
	Manufacturer: Intel(R) Corporation
	ID: A5 06 03 00 FF FB EB BF
	Signature: Type 0, Family 6, Model 58, Stepping 5
	Flags:
		FPU (Floating-point unit on-chip)
		VME (Virtual mode extension)
		DE (Debugging extension)
		PSE (Page size extension)
		TSC (Time stamp counter)
		MSR (Model specific registers)
		PAE (Physical address extension)
		MCE (Machine check exception)
		CX8 (CMPXCHG8 instruction supported)
		APIC (On-chip APIC hardware supported)
		SEP (Fast system call)
		MTRR (Memory type range registers)
		PGE (Page global enable)
		MCA (Machine check architecture)
		CMOV (Conditional move instruction supported)
		PAT (Page attribute table)
		PSE-36 (36-bit page size extension)
		CLFSH (CLFLUSH instruction supported)
		DS (Debug store)
		ACPI (ACPI supported)
		MMX (MMX technology supported)
		FXSR (FXSAVE and FXSTOR instructions supported)
		SSE (Streaming SIMD extensions)
		SSE2 (Streaming SIMD extensions 2)
		SS (Self-snoop)
		HTT (Multi-threading)
		TM (Thermal monitor supported)
		PBE (Pending break enabled)
	Version: Genuine Intel(R) CPU  @ 1.50GHz
	Voltage: 0.8 V
	External Clock: 100 MHz
	Max Speed: 2000 MHz
	Current Speed: 2000 MHz
	Status: Populated, Enabled
	Upgrade: Socket rPGA988B
	L1 Cache Handle: 0x0006
	L2 Cache Handle: 0x0007
	L3 Cache Handle: 0x0008
	Serial Number: To Be Filled By O.E.M.
	Asset Tag: To Be Filled By O.E.M.
	Part Number: To Be Filled By O.E.M.
	Core Count: 2
	Core Enabled: 2
	Thread Count: 4
	Characteristics:
		64-bit capable

Handle 0x0005, DMI type 7, 19 bytes
Cache Information
	Socket Designation: L1-Cache
	Configuration: Enabled, Not Socketed, Level 1
	Operational Mode: Write Through
	Location: Internal
	Installed Size: 32 kB
	Maximum Size: 32 kB
	Supported SRAM Types:
		Unknown
	Installed SRAM Type: Unknown
	Speed: Unknown
	Error Correction Type: Parity
	System Type: Data
	Associativity: 8-way Set-associative

Handle 0x0006, DMI type 7, 19 bytes
Cache Information
	Socket Designation: L1-Cache
	Configuration: Enabled, Not Socketed, Level 1
	Operational Mode: Write Through
	Location: Internal
	Installed Size: 32 kB
	Maximum Size: 32 kB
	Supported SRAM Types:
		Unknown
	Installed SRAM Type: Unknown
	Speed: Unknown
	Error Correction Type: Parity
	System Type: Instruction
	Associativity: 8-way Set-associative

Handle 0x0007, DMI type 7, 19 bytes
Cache Information
	Socket Designation: L2-Cache
	Configuration: Enabled, Not Socketed, Level 2
	Operational Mode: Write Through
	Location: Internal
	Installed Size: 256 kB
	Maximum Size: 256 kB
	Supported SRAM Types:
		Unknown
	Installed SRAM Type: Unknown
	Speed: Unknown
	Error Correction Type: Multi-bit ECC
	System Type: Unified
	Associativity: 8-way Set-associative

Handle 0x0008, DMI type 7, 19 bytes
Cache Information
	Socket Designation: L3-Cache
	Configuration: Enabled, Not Socketed, Level 3
	Operational Mode: Write Back
	Location: Internal
	Installed Size: 4096 kB
	Maximum Size: 4096 kB
	Supported SRAM Types:
		Unknown
	Installed SRAM Type: Unknown
	Speed: Unknown
	Error Correction Type: Multi-bit ECC
	System Type: Unified
	Associativity: 16-way Set-associative

Handle 0x0000, DMI type 0, 24 bytes
BIOS Information
	Vendor: Phoenix Technologies Ltd.
	Version: CR_2.2.0.262 X64
	Release Date: 07/06/2012
	Address: 0xE0000
	Runtime Size: 128 kB
	ROM Size: 3072 kB
	Characteristics:
		PCI is supported
		BIOS is upgradeable
		BIOS shadowing is allowed
		Boot from CD is supported
		Selectable boot is supported
		EDD is supported
		Print screen service is supported (int 5h)
		8042 keyboard services are supported (int 9h)
		Serial services are supported (int 14h)
		Printer services are supported (int 17h)
		CGA/mono video services are supported (int 10h)
		NEC PC-98
		ACPI is supported
		USB legacy is supported
		BIOS boot specification is supported
		Function key-initiated network boot is supported
		Targeted content distribution is supported
		UEFI is supported
	BIOS Revision: 0.1

Handle 0x0001, DMI type 1, 27 bytes
System Information
	Manufacturer: CompuLab
	Product Name: Intense-PC
	Version: 1.x
	Serial Number: System Serial Number
	UUID: 5C4606FA-192F-453A-B299-7B088C63BB9B
	Wake-up Type: Other
	SKU Number: System SKUNumber
	Family: IPC System

Handle 0x0002, DMI type 2, 15 bytes
Base Board Information
	Manufacturer: CompuLab Ltd.
	Product Name: Intense-PC
	Version: 1.x
	Serial Number: 1
	Asset Tag: Base Board Asset Tag
	Features:
		Board is a hosting board
		Board is replaceable
	Location In Chassis: Part Component
	Chassis Handle: 0x0000
	Type: Motherboard
	Contained Object Handles: 0

Handle 0x0003, DMI type 3, 22 bytes
Chassis Information
	Manufacturer: CompuLab Ltd.
	Type: Laptop
	Lock: Not Present
	Version: 1.x
	Serial Number: serial#
	Asset Tag: Asset Tag
	Boot-up State: Safe
	Power Supply State: Safe
	Thermal State: Other
	Security Status: Other
	OEM Information: 0x00000000
	Height: Unspecified
	Number Of Power Cords: 1
	Contained Elements: 0
	SKU Number: System SKUNumber

Handle 0x0009, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: Keyboard
	External Connector Type: PS/2
	Port Type: Keyboard Port

Handle 0x000A, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: Mouse
	External Connector Type: PS/2
	Port Type: Mouse Port

Handle 0x000B, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: Other
	External Reference Designator: COM 1
	External Connector Type: DB-9 male
	Port Type: Serial Port 16550A Compatible

Handle 0x000C, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: USB3.0 - 1#/USB2.0 - 1#
	External Connector Type: Access Bus (USB)
	Port Type: USB

Handle 0x000D, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: USB3.0 - 2#/USB2.0 - 2#
	External Connector Type: Access Bus (USB)
	Port Type: USB

Handle 0x000E, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: USB3.0 - 3#/USB2.0 - 3#
	External Connector Type: Access Bus (USB)
	Port Type: USB

Handle 0x000F, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: USB3.0 - 4#/USB2.0 - 4#
	External Connector Type: Access Bus (USB)
	Port Type: USB

Handle 0x0010, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: USB2.0 - 5#
	External Connector Type: Access Bus (USB)
	Port Type: USB

Handle 0x0011, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: USB2.0 - 6#
	External Connector Type: Access Bus (USB)
	Port Type: USB

Handle 0x0012, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: USB2.0 - 7#
	External Connector Type: Access Bus (USB)
	Port Type: USB

Handle 0x0013, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: USB2.0 - 8#
	External Connector Type: Access Bus (USB)
	Port Type: USB

Handle 0x0014, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: USB2.0 - 9#
	External Connector Type: Access Bus (USB)
	Port Type: USB

Handle 0x0015, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: USB2.0 - 10#
	External Connector Type: Access Bus (USB)
	Port Type: USB

Handle 0x0016, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: USB2.0 - 11#
	External Connector Type: Access Bus (USB)
	Port Type: USB

Handle 0x0017, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: USB2.0 - 12#
	External Connector Type: Access Bus (USB)
	Port Type: USB

Handle 0x0018, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: USB2.0 - 13#
	External Connector Type: Access Bus (USB)
	Port Type: USB

Handle 0x0019, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: USB2.0 - 14#
	External Connector Type: Access Bus (USB)
	Port Type: USB

Handle 0x001A, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: Ethernet
	External Connector Type: RJ-45
	Port Type: Network Port

Handle 0x001B, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: SATA Port 1
	Internal Connector Type: SAS/SATA Plug Receptacle
	External Reference Designator: None
	External Connector Type: None
	Port Type: SATA

Handle 0x001C, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: SATA Port 2
	Internal Connector Type: SAS/SATA Plug Receptacle
	External Reference Designator: None
	External Connector Type: None
	Port Type: SATA

Handle 0x001D, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: SATA Port 3
	Internal Connector Type: SAS/SATA Plug Receptacle
	External Reference Designator: None
	External Connector Type: None
	Port Type: SATA

Handle 0x001E, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: eSATA Port 1
	External Connector Type: SAS/SATA Plug Receptacle
	Port Type: SATA

Handle 0x001F, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: eSATA Port 2
	External Connector Type: SAS/SATA Plug Receptacle
	Port Type: SATA

Handle 0x0020, DMI type 8, 9 bytes
Port Connector Information
	Internal Reference Designator: None
	Internal Connector Type: None
	External Reference Designator: SATA Port 6
	External Connector Type: SAS/SATA Plug Receptacle
	Port Type: SATA

Handle 0x0021, DMI type 9, 17 bytes
System Slot Information
	Designation: PEG Gen1/Gen2/Gen3 X16
	Type: x16 PCI Express
	Current Usage: Available
	Length: Long
	ID: 0
	Characteristics:
		3.3 V is provided
		Opening is shared
		PME signal is supported
	Bus Address: 0000:00:00.0

Handle 0x0022, DMI type 9, 17 bytes
System Slot Information
	Designation: PCI-Express 1 X1
	Type: x1 PCI Express
	Current Usage: Available
	Length: Short
	ID: 1
	Characteristics:
		3.3 V is provided
		Opening is shared
		PME signal is supported
	Bus Address: 0000:00:00.0

Handle 0x0023, DMI type 9, 17 bytes
System Slot Information
	Designation: PCI-Express 2 X1
	Type: x1 PCI Express
	Current Usage: Available
	Length: Short
	ID: 2
	Characteristics:
		3.3 V is provided
		Opening is shared
		PME signal is supported
	Bus Address: 0000:00:00.0

Handle 0x0024, DMI type 9, 17 bytes
System Slot Information
	Designation: PCI-Express 3 X1
	Type: x1 PCI Express
	Current Usage: Available
	Length: Short
	ID: 3
	Characteristics:
		3.3 V is provided
		Opening is shared
		PME signal is supported
	Bus Address: 0000:00:00.0

Handle 0x0025, DMI type 9, 17 bytes
System Slot Information
	Designation: PCI-Express 4 X1
	Type: x1 PCI Express
	Current Usage: In Use
	Length: Short
	ID: 4
	Characteristics:
		3.3 V is provided
		Opening is shared
		PME signal is supported
	Bus Address: 0000:00:00.0

Handle 0x0026, DMI type 9, 17 bytes
System Slot Information
	Designation: PCI-Express 5 X4
	Type: x4 PCI Express
	Current Usage: In Use
	Length: Short
	ID: 5
	Characteristics:
		3.3 V is provided
		Opening is shared
		PME signal is supported
	Bus Address: 0000:00:00.0

Handle 0x0027, DMI type 10, 6 bytes
On Board Device Information
	Type: Video
	Status: Enabled
	Description: Intel(R) Extreme Graphics 3 Controller

Handle 0x0028, DMI type 10, 6 bytes
On Board Device Information
	Type: Sound
	Status: Enabled
	Description: Intel(R) Azalia Audio Device

Handle 0x0029, DMI type 11, 5 bytes
OEM Strings
	String 1: Intense-PC

Handle 0x002A, DMI type 12, 5 bytes
System Configuration Options

Handle 0x002B, DMI type 13, 22 bytes
BIOS Language Information
	Language Description Format: Abbreviated
	Installable Languages: 7
		enUS
		frFR
		jaJP
		koKR
		zhCA
		zhCA
		ruRU
	Currently Installed Language: enUS

Handle 0x002C, DMI type 22, 26 bytes
Portable Battery
	Location: None
	Manufacturer: None
	Manufacture Date: None
	Serial Number: None
	Name: None
	Design Capacity: Unknown
	Design Voltage: Unknown
	SBDS Version: None
	Maximum Error: Unknown
	SBDS Chemistry: None
	OEM-specific Information: 0x00000000

Handle 0x002D, DMI type 32, 11 bytes
System Boot Information
	Status: No errors detected

Handle 0x002E, DMI type 18, 23 bytes
32-bit Memory Error Information
	Type: OK
	Granularity: Unknown
	Operation: Unknown
	Vendor Syndrome: Unknown
	Memory Array Address: Unknown
	Device Address: Unknown
	Resolution: Unknown

Handle 0x002F, DMI type 21, 7 bytes
Built-in Pointing Device
	Type: Mouse
	Interface: PS/2
	Buttons: 2

Handle 0x0030, DMI type 23, 13 bytes
System Reset
	Status: Disabled
	Watchdog Timer: Present
	Boot Option: Do Not Reboot
	Boot Option On Limit: Do Not Reboot
	Reset Count: Unknown
	Reset Limit: Unknown
	Timer Interval: Unknown
	Timeout: Unknown

Handle 0x0031, DMI type 24, 5 bytes
Hardware Security
	Power-On Password Status: Unknown
	Keyboard Password Status: Unknown
	Administrator Password Status: Unknown
	Front Panel Reset Status: Unknown

Handle 0x0032, DMI type 27, 14 bytes
Cooling Device
	Type: Unknown
	Status: Unknown
	OEM-specific Information: 0x00000090
	Nominal Speed: Unknown Or Non-rotating

Handle 0x0033, DMI type 39, 22 bytes
System Power Supply
	Location: TBD by ODM
	Name: TBD by ODM
	Manufacturer: TBD by ODM
	Serial Number: TBD by ODM
	Asset Tag: TBD by ODM
	Model Part Number: TBD by ODM
	Revision: 1.0
	Max Power Capacity: Unknown
	Status: Present, OK
	Type: Battery
	Input Voltage Range Switching: Other
	Plugged: Yes
	Hot Replaceable: Yes

Handle 0x0034, DMI type 16, 23 bytes
Physical Memory Array
	Location: System Board Or Motherboard
	Use: System Memory
	Error Correction Type: None
	Maximum Capacity: 32 GB
	Error Information Handle: Not Provided
	Number Of Devices: 4

Handle 0x0035, DMI type 17, 34 bytes
Memory Device
	Array Handle: 0x0034
	Error Information Handle: Not Provided
	Total Width: 64 bits
	Data Width: 64 bits
	Size: 2048 MB
	Form Factor: SODIMM
	Set: None
	Locator: ChannelA-DIMM0
	Bank Locator: BANK 0
	Type: DDR3
	Type Detail: Synchronous
	Speed: 1333 MHz
	Manufacturer: Hynix/Hyundai
	Serial Number: 6146B1E7
	Asset Tag: 9876543210
	Part Number: HMT325S6BFR8C-H9  
	Rank: Unknown
	Configured Clock Speed: 1333 MHz

Handle 0x0036, DMI type 17, 34 bytes
Memory Device
	Array Handle: 0x0034
	Error Information Handle: Not Provided
	Total Width: Unknown
	Data Width: Unknown
	Size: No Module Installed
	Form Factor: DIMM
	Set: None
	Locator: ChannelA-DIMM1
	Bank Locator: BANK 1
	Type: Unknown
	Type Detail: None
	Speed: Unknown
	Manufacturer: Not Specified
	Serial Number: Not Specified
	Asset Tag: 9876543210
	Part Number: Not Specified
	Rank: Unknown
	Configured Clock Speed: Unknown

Handle 0x0037, DMI type 17, 34 bytes
Memory Device
	Array Handle: 0x0034
	Error Information Handle: Not Provided
	Total Width: 64 bits
	Data Width: 64 bits
	Size: 2048 MB
	Form Factor: SODIMM
	Set: None
	Locator: ChannelB-DIMM0
	Bank Locator: BANK 2
	Type: DDR3
	Type Detail: Synchronous
	Speed: 1333 MHz
	Manufacturer: Hynix/Hyundai
	Serial Number: 0D32B144
	Asset Tag: 9876543210
	Part Number: HMT325S6BFR8C-H9  
	Rank: Unknown
	Configured Clock Speed: 1333 MHz

Handle 0x0038, DMI type 17, 34 bytes
Memory Device
	Array Handle: 0x0034
	Error Information Handle: Not Provided
	Total Width: Unknown
	Data Width: Unknown
	Size: No Module Installed
	Form Factor: DIMM
	Set: None
	Locator: ChannelB-DIMM1
	Bank Locator: BANK 3
	Type: Unknown
	Type Detail: None
	Speed: Unknown
	Manufacturer: Not Specified
	Serial Number: Not Specified
	Asset Tag: 9876543210
	Part Number: Not Specified
	Rank: Unknown
	Configured Clock Speed: Unknown

Handle 0x0039, DMI type 20, 35 bytes
Memory Device Mapped Address
	Starting Address: 0x00000000000
	Ending Address: 0x000FFFFFFFF
	Range Size: 4 GB
	Physical Device Handle: 0x0035
	Memory Array Mapped Address Handle: 0x003B
	Partition Row Position: 1
	Interleave Position: 1
	Interleaved Data Depth: 2

Handle 0x003A, DMI type 20, 35 bytes
Memory Device Mapped Address
	Starting Address: 0x00000000000
	Ending Address: 0x000FFFFFFFF
	Range Size: 4 GB
	Physical Device Handle: 0x0036
	Memory Array Mapped Address Handle: 0x003B
	Partition Row Position: 1
	Interleave Position: 2
	Interleaved Data Depth: 2

Handle 0x003B, DMI type 19, 31 bytes
Memory Array Mapped Address
	Starting Address: 0x00000000000
	Ending Address: 0x000FFFFFFFF
	Range Size: 4 GB
	Physical Array Handle: 0x0034
	Partition Width: 4

Handle 0x003C, DMI type 15, 81 bytes
System Event Log
	Area Length: 18 bytes
	Header Start Offset: 0x0000
	Header Length: 16 bytes
	Data Start Offset: 0x0010
	Access Method: General-purpose non-volatile data functions
	Access Address: 0x00F0
	Status: Valid, Not Full
	Change Token: 0x00000000
	Header Format: Type 1
	Supported Log Type Descriptors: 29
	Descriptor 1: Single-bit ECC memory error
	Data Format 1: Multiple-event handle
	Descriptor 2: Multi-bit ECC memory error
	Data Format 2: Multiple-event handle
	Descriptor 3: Parity memory error
	Data Format 3: None
	Descriptor 4: Bus timeout
	Data Format 4: None
	Descriptor 5: I/O channel block
	Data Format 5: None
	Descriptor 6: Software NMI
	Data Format 6: None
	Descriptor 7: POST memory resize
	Data Format 7: None
	Descriptor 8: POST error
	Data Format 8: POST results bitmap
	Descriptor 9: PCI parity error
	Data Format 9: None
	Descriptor 10: PCI system error
	Data Format 10: None
	Descriptor 11: CPU failure
	Data Format 11: None
	Descriptor 12: EISA failsafe timer timeout
	Data Format 12: None
	Descriptor 13: Correctable memory log disabled
	Data Format 13: None
	Descriptor 14: Logging disabled
	Data Format 14: None
	Descriptor 15: System limit exceeded
	Data Format 15: None
	Descriptor 16: Asynchronous hardware timer expired
	Data Format 16: None
	Descriptor 17: System configuration information
	Data Format 17: None
	Descriptor 18: Hard disk information
	Data Format 18: None
	Descriptor 19: System reconfigured
	Data Format 19: None
	Descriptor 20: Uncorrectable CPU-complex error
	Data Format 20: None
	Descriptor 21: Log area reset/cleared
	Data Format 21: None
	Descriptor 22: System boot
	Data Format 22: None
	Descriptor 23: OEM-specific
	Data Format 23: None
	Descriptor 24: OEM-specific
	Data Format 24: None
	Descriptor 25: OEM-specific
	Data Format 25: None
	Descriptor 26: OEM-specific
	Data Format 26: None
	Descriptor 27: OEM-specific
	Data Format 27: None
	Descriptor 28: OEM-specific
	Data Format 28: None
	Descriptor 29: OEM-specific
	Data Format 29: None

Handle 0xFEFF, DMI type 127, 4 bytes
End Of Table

Re: [PATCH 2/2] xhci: EHCI/XHCI ports switching on Intense-PC.

[Sarah Sharp]

On Tue, Jul 31, 2012 at 06:49:50AM +0200, Oliver Neukum wrote:
> On Monday 30 July 2012 15:34:06 Sarah Sharp wrote:
> > Hi Denis,
> > 
> > Can you send me the output of `sudo dmidecode`?  I'd like to see if I
> > can make a more general patch apply to the Intense-PC.
> 
> As this is for shutdown, why not all systems?

Because it will cause a BIOS delay on the next boot.  Approximately
100 ms.  Some people trying to do extremely fast boot will care about
that delay.

Sarah Sharp

Re: [PATCH 2/2] xhci: EHCI/XHCI ports switching on Intense-PC.

[Sarah Sharp]

On Tue, Jul 31, 2012 at 10:06:34AM -0700, Sarah Sharp wrote:
> On Tue, Jul 31, 2012 at 06:49:50AM +0200, Oliver Neukum wrote:
> > On Monday 30 July 2012 15:34:06 Sarah Sharp wrote:
> > > Hi Denis,
> > > 
> > > Can you send me the output of `sudo dmidecode`?  I'd like to see if I
> > > can make a more general patch apply to the Intense-PC.
> > 
> > As this is for shutdown, why not all systems?
> 
> Because it will cause a BIOS delay on the next boot.  Approximately
> 100 ms.  Some people trying to do extremely fast boot will care about
> that delay.

However, looking at the Intense-PC SMBIOS info, it looks like I can't
make the patch more generic.  I'll have to key off of PCI ID, and all
PPT systems will have the ports switched back to EHCI.

Sarah Sharp

Re: [PATCH 2/2] xhci: EHCI/XHCI ports switching on Intense-PC.

[Sarah Sharp]

Hi Denis,

I found a couple issues with your second patch.  There are non-PCI xHCI
host controllers, so we can't assume the xHCI host is a PCI host.  So
this code can't run in the generic xHCI shutdown method:

>  void xhci_shutdown(struct usb_hcd *hcd)
>  {
> +	struct pci_dev *pdev;
> +	const char *brd_name;
>  	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
> 
> +	pdev = to_pci_dev(hcd->self.controller);
> +
> +	if (usb_is_intel_switchable_xhci(pdev)) {
> +		brd_name = dmi_get_system_info(DMI_BOARD_NAME);
> +
> +		/* quirk for Compulab's Intense-PC board */
> +		if (brd_name && strstr(brd_name, "Intense-PC"))
> +			usb_disable_xhci_ports(pdev);
> +	}
> +
>  	spin_lock_irq(&xhci->lock);
>  	xhci_halt(xhci);
>  	spin_unlock_irq(&xhci->lock);

I think the to_pci_dev call will oops if this isn't a PCI host.  Plus,
I've found out from the BIOS and chipset folks that this quirk needs to
be more broadly applied.  I'll send you a revised patch.  Can you test
it and make sure it works for you?

Sarah Sharp

[RFT] xhci: Switch PPT ports to EHCI on shutdown.

[Sarah Sharp]

The Intel desktop boards DH77EB and DH77DF have a hardware issue that
can be worked around by BIOS.  If the USB ports are switched to xHCI on
shutdown, the xHCI host will send a spurious interrupt, which will wake
the system.  Some BIOS will work around this, but not all.

The bug can be avoided if the USB ports are switched back to EHCI on
shutdown.  The Intel Windows driver switches the ports back to EHCI, so
change the Linux xHCI driver to do the same.

Unfortunately, we can't tell the two effected boards apart from other
working motherboards, because the vendors will change the DMI strings
for the DH77EB and DH77DF boards to their own custom names.  One example
is Compulab's mini-desktop, the Intense-PC.  Instead, key off the
Panther Point xHCI host PCI vendor and device ID, and switch the ports
over for all PPT xHCI hosts.

The only impact this will have on non-effected boards is to add a couple
hundred milliseconds delay on boot when the BIOS has to switch the ports
over from EHCI to xHCI.

This patch should be backported to kernels as old as 3.0, that contain
the commit 69e848c2090aebba5698a1620604c7dccb448684 "Intel xhci: Support
EHCI/xHCI port switching."

Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Reported-by: Denis Turischev <denis@compulab.co.il>
Cc: stable@vger.kernel.org
---
 drivers/usb/host/pci-quirks.c |    7 +++++++
 drivers/usb/host/pci-quirks.h |    1 +
 drivers/usb/host/xhci-pci.c   |    9 +++++++++
 drivers/usb/host/xhci.c       |    3 +++
 drivers/usb/host/xhci.h       |    1 +
 5 files changed, 21 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
index df0828c..c5e9e4a 100644
--- a/drivers/usb/host/pci-quirks.c
+++ b/drivers/usb/host/pci-quirks.c
@@ -800,6 +800,13 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
 }
 EXPORT_SYMBOL_GPL(usb_enable_xhci_ports);
 
+void usb_disable_xhci_ports(struct pci_dev *xhci_pdev)
+{
+	pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN, 0x0);
+	pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR, 0x0);
+}
+EXPORT_SYMBOL_GPL(usb_disable_xhci_ports);
+
 /**
  * PCI Quirks for xHCI.
  *
diff --git a/drivers/usb/host/pci-quirks.h b/drivers/usb/host/pci-quirks.h
index b1002a8..ef004a5 100644
--- a/drivers/usb/host/pci-quirks.h
+++ b/drivers/usb/host/pci-quirks.h
@@ -10,6 +10,7 @@ void usb_amd_quirk_pll_disable(void);
 void usb_amd_quirk_pll_enable(void);
 bool usb_is_intel_switchable_xhci(struct pci_dev *pdev);
 void usb_enable_xhci_ports(struct pci_dev *xhci_pdev);
+void usb_disable_xhci_ports(struct pci_dev *xhci_pdev);
 #else
 static inline void usb_amd_quirk_pll_disable(void) {}
 static inline void usb_amd_quirk_pll_enable(void) {}
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 92eaff6..9bfd4ca11 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -94,6 +94,15 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
 		xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
 		xhci->limit_active_eps = 64;
 		xhci->quirks |= XHCI_SW_BW_CHECKING;
+		/*
+		 * PPT desktop boards DH77EB and DH77DF will power back on after
+		 * a few seconds of being shutdown.  The fix for this is to
+		 * switch the ports from xHCI to EHCI on shutdown.  We can't use
+		 * DMI information to find those particular boards (since each
+		 * vendor will change the board name), so we have to key off all
+		 * PPT chipsets.
+		 */
+		xhci->quirks |= XHCI_SPURIOUS_REBOOT;
 	}
 	if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
 			pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 95394e5..81aa10c 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -659,6 +659,9 @@ void xhci_shutdown(struct usb_hcd *hcd)
 {
 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 
+	if (xhci->quirks && XHCI_SPURIOUS_REBOOT)
+		usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
+
 	spin_lock_irq(&xhci->lock);
 	xhci_halt(xhci);
 	spin_unlock_irq(&xhci->lock);
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 96f49db..c713256 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1494,6 +1494,7 @@ struct xhci_hcd {
 #define XHCI_TRUST_TX_LENGTH	(1 << 10)
 #define XHCI_LPM_SUPPORT	(1 << 11)
 #define XHCI_INTEL_HOST		(1 << 12)
+#define XHCI_SPURIOUS_REBOOT	(1 << 13)
 	unsigned int		num_active_eps;
 	unsigned int		limit_active_eps;
 	/* There are two roothubs to keep track of bus suspend info for */
-- 
1.7.9

Re: [RFT] xhci: Switch PPT ports to EHCI on shutdown.

[Denis Turischev]

Hi Sarah,

Yes, it fixes unexpected wake-up on Intense-PC.
Thanks!

Denis.

On 08/07/2012 08:39 PM, Sarah Sharp wrote:
> The Intel desktop boards DH77EB and DH77DF have a hardware issue that
> can be worked around by BIOS.  If the USB ports are switched to xHCI on
> shutdown, the xHCI host will send a spurious interrupt, which will wake
> the system.  Some BIOS will work around this, but not all.
> 
> The bug can be avoided if the USB ports are switched back to EHCI on
> shutdown.  The Intel Windows driver switches the ports back to EHCI, so
> change the Linux xHCI driver to do the same.
> 
> Unfortunately, we can't tell the two effected boards apart from other
> working motherboards, because the vendors will change the DMI strings
> for the DH77EB and DH77DF boards to their own custom names.  One example
> is Compulab's mini-desktop, the Intense-PC.  Instead, key off the
> Panther Point xHCI host PCI vendor and device ID, and switch the ports
> over for all PPT xHCI hosts.
> 
> The only impact this will have on non-effected boards is to add a couple
> hundred milliseconds delay on boot when the BIOS has to switch the ports
> over from EHCI to xHCI.
> 
> This patch should be backported to kernels as old as 3.0, that contain
> the commit 69e848c2090aebba5698a1620604c7dccb448684 "Intel xhci: Support
> EHCI/xHCI port switching."
> 
> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
> Reported-by: Denis Turischev <denis@compulab.co.il>
> Cc: stable@vger.kernel.org
> ---
>  drivers/usb/host/pci-quirks.c |    7 +++++++
>  drivers/usb/host/pci-quirks.h |    1 +
>  drivers/usb/host/xhci-pci.c   |    9 +++++++++
>  drivers/usb/host/xhci.c       |    3 +++
>  drivers/usb/host/xhci.h       |    1 +
>  5 files changed, 21 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
> index df0828c..c5e9e4a 100644
> --- a/drivers/usb/host/pci-quirks.c
> +++ b/drivers/usb/host/pci-quirks.c
> @@ -800,6 +800,13 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
>  }
>  EXPORT_SYMBOL_GPL(usb_enable_xhci_ports);
>  
> +void usb_disable_xhci_ports(struct pci_dev *xhci_pdev)
> +{
> +	pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN, 0x0);
> +	pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR, 0x0);
> +}
> +EXPORT_SYMBOL_GPL(usb_disable_xhci_ports);
> +
>  /**
>   * PCI Quirks for xHCI.
>   *
> diff --git a/drivers/usb/host/pci-quirks.h b/drivers/usb/host/pci-quirks.h
> index b1002a8..ef004a5 100644
> --- a/drivers/usb/host/pci-quirks.h
> +++ b/drivers/usb/host/pci-quirks.h
> @@ -10,6 +10,7 @@ void usb_amd_quirk_pll_disable(void);
>  void usb_amd_quirk_pll_enable(void);
>  bool usb_is_intel_switchable_xhci(struct pci_dev *pdev);
>  void usb_enable_xhci_ports(struct pci_dev *xhci_pdev);
> +void usb_disable_xhci_ports(struct pci_dev *xhci_pdev);
>  #else
>  static inline void usb_amd_quirk_pll_disable(void) {}
>  static inline void usb_amd_quirk_pll_enable(void) {}
> diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
> index 92eaff6..9bfd4ca11 100644
> --- a/drivers/usb/host/xhci-pci.c
> +++ b/drivers/usb/host/xhci-pci.c
> @@ -94,6 +94,15 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
>  		xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
>  		xhci->limit_active_eps = 64;
>  		xhci->quirks |= XHCI_SW_BW_CHECKING;
> +		/*
> +		 * PPT desktop boards DH77EB and DH77DF will power back on after
> +		 * a few seconds of being shutdown.  The fix for this is to
> +		 * switch the ports from xHCI to EHCI on shutdown.  We can't use
> +		 * DMI information to find those particular boards (since each
> +		 * vendor will change the board name), so we have to key off all
> +		 * PPT chipsets.
> +		 */
> +		xhci->quirks |= XHCI_SPURIOUS_REBOOT;
>  	}
>  	if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
>  			pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
> diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
> index 95394e5..81aa10c 100644
> --- a/drivers/usb/host/xhci.c
> +++ b/drivers/usb/host/xhci.c
> @@ -659,6 +659,9 @@ void xhci_shutdown(struct usb_hcd *hcd)
>  {
>  	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
>  
> +	if (xhci->quirks && XHCI_SPURIOUS_REBOOT)
> +		usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
> +
>  	spin_lock_irq(&xhci->lock);
>  	xhci_halt(xhci);
>  	spin_unlock_irq(&xhci->lock);
> diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
> index 96f49db..c713256 100644
> --- a/drivers/usb/host/xhci.h
> +++ b/drivers/usb/host/xhci.h
> @@ -1494,6 +1494,7 @@ struct xhci_hcd {
>  #define XHCI_TRUST_TX_LENGTH	(1 << 10)
>  #define XHCI_LPM_SUPPORT	(1 << 11)
>  #define XHCI_INTEL_HOST		(1 << 12)
> +#define XHCI_SPURIOUS_REBOOT	(1 << 13)
>  	unsigned int		num_active_eps;
>  	unsigned int		limit_active_eps;
>  	/* There are two roothubs to keep track of bus suspend info for */
> 

Re: [RFT] xhci: Switch PPT ports to EHCI on shutdown.

[Robert Hancock]

On 08/07/2012 11:39 AM, Sarah Sharp wrote:
> The Intel desktop boards DH77EB and DH77DF have a hardware issue that
> can be worked around by BIOS.  If the USB ports are switched to xHCI on
> shutdown, the xHCI host will send a spurious interrupt, which will wake
> the system.  Some BIOS will work around this, but not all.
>
> The bug can be avoided if the USB ports are switched back to EHCI on
> shutdown.  The Intel Windows driver switches the ports back to EHCI, so
> change the Linux xHCI driver to do the same.
>
> Unfortunately, we can't tell the two effected boards apart from other
> working motherboards, because the vendors will change the DMI strings
> for the DH77EB and DH77DF boards to their own custom names.  One example
> is Compulab's mini-desktop, the Intense-PC.  Instead, key off the
> Panther Point xHCI host PCI vendor and device ID, and switch the ports
> over for all PPT xHCI hosts.
>
> The only impact this will have on non-effected boards is to add a couple
> hundred milliseconds delay on boot when the BIOS has to switch the ports
> over from EHCI to xHCI.
>
> This patch should be backported to kernels as old as 3.0, that contain
> the commit 69e848c2090aebba5698a1620604c7dccb448684 "Intel xhci: Support
> EHCI/xHCI port switching."
>
> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
> Reported-by: Denis Turischev <denis@compulab.co.il>
> Cc: stable@vger.kernel.org
> ---
>   drivers/usb/host/pci-quirks.c |    7 +++++++
>   drivers/usb/host/pci-quirks.h |    1 +
>   drivers/usb/host/xhci-pci.c   |    9 +++++++++
>   drivers/usb/host/xhci.c       |    3 +++
>   drivers/usb/host/xhci.h       |    1 +
>   5 files changed, 21 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
> index df0828c..c5e9e4a 100644
> --- a/drivers/usb/host/pci-quirks.c
> +++ b/drivers/usb/host/pci-quirks.c
> @@ -800,6 +800,13 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
>   }
>   EXPORT_SYMBOL_GPL(usb_enable_xhci_ports);
>
> +void usb_disable_xhci_ports(struct pci_dev *xhci_pdev)
> +{
> +	pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN, 0x0);
> +	pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR, 0x0);
> +}
> +EXPORT_SYMBOL_GPL(usb_disable_xhci_ports);
> +
>   /**
>    * PCI Quirks for xHCI.
>    *
> diff --git a/drivers/usb/host/pci-quirks.h b/drivers/usb/host/pci-quirks.h
> index b1002a8..ef004a5 100644
> --- a/drivers/usb/host/pci-quirks.h
> +++ b/drivers/usb/host/pci-quirks.h
> @@ -10,6 +10,7 @@ void usb_amd_quirk_pll_disable(void);
>   void usb_amd_quirk_pll_enable(void);
>   bool usb_is_intel_switchable_xhci(struct pci_dev *pdev);
>   void usb_enable_xhci_ports(struct pci_dev *xhci_pdev);
> +void usb_disable_xhci_ports(struct pci_dev *xhci_pdev);
>   #else
>   static inline void usb_amd_quirk_pll_disable(void) {}
>   static inline void usb_amd_quirk_pll_enable(void) {}
> diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
> index 92eaff6..9bfd4ca11 100644
> --- a/drivers/usb/host/xhci-pci.c
> +++ b/drivers/usb/host/xhci-pci.c
> @@ -94,6 +94,15 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
>   		xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
>   		xhci->limit_active_eps = 64;
>   		xhci->quirks |= XHCI_SW_BW_CHECKING;
> +		/*
> +		 * PPT desktop boards DH77EB and DH77DF will power back on after
> +		 * a few seconds of being shutdown.  The fix for this is to
> +		 * switch the ports from xHCI to EHCI on shutdown.  We can't use
> +		 * DMI information to find those particular boards (since each
> +		 * vendor will change the board name), so we have to key off all
> +		 * PPT chipsets.
> +		 */
> +		xhci->quirks |= XHCI_SPURIOUS_REBOOT;
>   	}
>   	if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
>   			pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
> diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
> index 95394e5..81aa10c 100644
> --- a/drivers/usb/host/xhci.c
> +++ b/drivers/usb/host/xhci.c
> @@ -659,6 +659,9 @@ void xhci_shutdown(struct usb_hcd *hcd)
>   {
>   	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
>
> +	if (xhci->quirks && XHCI_SPURIOUS_REBOOT)
> +		usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));

This looks like a typo, think it should be & not &&. With this code, it 
appears the quirk will always be triggered since XHCI_SPURIOUS_REBOOT is 
non-zero.

> +
>   	spin_lock_irq(&xhci->lock);
>   	xhci_halt(xhci);
>   	spin_unlock_irq(&xhci->lock);
> diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
> index 96f49db..c713256 100644
> --- a/drivers/usb/host/xhci.h
> +++ b/drivers/usb/host/xhci.h
> @@ -1494,6 +1494,7 @@ struct xhci_hcd {
>   #define XHCI_TRUST_TX_LENGTH	(1 << 10)
>   #define XHCI_LPM_SUPPORT	(1 << 11)
>   #define XHCI_INTEL_HOST		(1 << 12)
> +#define XHCI_SPURIOUS_REBOOT	(1 << 13)
>   	unsigned int		num_active_eps;
>   	unsigned int		limit_active_eps;
>   	/* There are two roothubs to keep track of bus suspend info for */
>