[PATCH 1/2] ARM: socfpga: Permit overriding the default timer frequency

[PATCH 1/2] ARM: socfpga: Permit overriding the default timer frequency

[Marek Vasut]

The default timer rate may be different than 25 MHz, permit overriding
the default rate in board configuration file. Ultimatelly, this should
be properly handled by a clock driver, however that is not available
on Gen5 yet.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
---
 include/configs/socfpga_common.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 8d10469e7c..8c5dcfa57c 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -98,8 +98,10 @@
 #define CONFIG_SYS_TIMERBASE		SOCFPGA_OSC1TIMER0_ADDRESS
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMERBASE + 0x4)
+#ifndef CONFIG_SYS_TIMER_RATE
 #define CONFIG_SYS_TIMER_RATE		25000000
 #endif
+#endif
 
 /*
  * L4 Watchdog
-- 
2.25.0

[PATCH 2/2] ARM: socfpga: Add missing Denali NAND config options

[Marek Vasut]

The Denali SPL shim won't build without these options set,
set them accordingly to fix the build error and let the SPL
shim to work correctly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
---
 include/configs/socfpga_common.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 8c5dcfa57c..327a28f814 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -122,6 +122,8 @@
  * NAND Support
  */
 #ifdef CONFIG_NAND_DENALI
+#define CONFIG_SYS_NAND_USE_FLASH_BBT
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 #define CONFIG_SYS_NAND_REGS_BASE	SOCFPGA_NANDREGS_ADDRESS
-- 
2.25.0

[PATCH 1/2] ARM: socfpga: Permit overriding the default timer frequency

[Simon Goldschmidt]

Am 15.02.2020 um 15:02 schrieb Marek Vasut:
> The default timer rate may be different than 25 MHz, permit overriding
> the default rate in board configuration file. Ultimatelly, this should
> be properly handled by a clock driver, however that is not available
> on Gen5 yet.

Sigh, yes, I still haven't found the time to fight those size problems I
have... :-(

> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
> ---
>  include/configs/socfpga_common.h | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
> index 8d10469e7c..8c5dcfa57c 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -98,8 +98,10 @@

Just above this line, there's this comment: "This timer uses eosc1,
whose clock frequency is fixed at any condition".

While I'm ok with the change below, it does look a bit funny to make
this overriable if it's "fixed at any condition". Could you elaborate on
this? Do we need to change the comment?

Regards,
Simon

>  #define CONFIG_SYS_TIMERBASE		SOCFPGA_OSC1TIMER0_ADDRESS
>  #define CONFIG_SYS_TIMER_COUNTS_DOWN
>  #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMERBASE + 0x4)
> +#ifndef CONFIG_SYS_TIMER_RATE
>  #define CONFIG_SYS_TIMER_RATE		25000000
>  #endif
> +#endif
>  
>  /*
>   * L4 Watchdog
> 

[PATCH 1/2] ARM: socfpga: Permit overriding the default timer frequency

[Marek Vasut]

On 2/15/20 8:39 PM, Simon Goldschmidt wrote:
> Am 15.02.2020 um 15:02 schrieb Marek Vasut:
>> The default timer rate may be different than 25 MHz, permit overriding
>> the default rate in board configuration file. Ultimatelly, this should
>> be properly handled by a clock driver, however that is not available
>> on Gen5 yet.
> 
> Sigh, yes, I still haven't found the time to fight those size problems I
> have... :-(
> 
>>
>> Signed-off-by: Marek Vasut <marex@denx.de>
>> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
>> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
>> ---
>>  include/configs/socfpga_common.h | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
>> index 8d10469e7c..8c5dcfa57c 100644
>> --- a/include/configs/socfpga_common.h
>> +++ b/include/configs/socfpga_common.h
>> @@ -98,8 +98,10 @@
> 
> Just above this line, there's this comment: "This timer uses eosc1,
> whose clock frequency is fixed at any condition".
> 
> While I'm ok with the change below, it does look a bit funny to make
> this overriable if it's "fixed at any condition". Could you elaborate on
> this? Do we need to change the comment?

The comment is probably wrong, since you can connect the SoCFPGA
external oscillator input to any applicable xtal ?

[PATCH 1/2] ARM: socfpga: Permit overriding the default timer frequency

[Simon Goldschmidt]

On Sat, Feb 15, 2020 at 10:40 PM Marek Vasut <marex@denx.de> wrote:
>
> On 2/15/20 8:39 PM, Simon Goldschmidt wrote:
> > Am 15.02.2020 um 15:02 schrieb Marek Vasut:
> >> The default timer rate may be different than 25 MHz, permit overriding
> >> the default rate in board configuration file. Ultimatelly, this should
> >> be properly handled by a clock driver, however that is not available
> >> on Gen5 yet.
> >
> > Sigh, yes, I still haven't found the time to fight those size problems I
> > have... :-(
> >
> >>
> >> Signed-off-by: Marek Vasut <marex@denx.de>
> >> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
> >> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
> >> ---
> >>  include/configs/socfpga_common.h | 2 ++
> >>  1 file changed, 2 insertions(+)
> >>
> >> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
> >> index 8d10469e7c..8c5dcfa57c 100644
> >> --- a/include/configs/socfpga_common.h
> >> +++ b/include/configs/socfpga_common.h
> >> @@ -98,8 +98,10 @@
> >
> > Just above this line, there's this comment: "This timer uses eosc1,
> > whose clock frequency is fixed at any condition".
> >
> > While I'm ok with the change below, it does look a bit funny to make
> > this overriable if it's "fixed at any condition". Could you elaborate on
> > this? Do we need to change the comment?
>
> The comment is probably wrong, since you can connect the SoCFPGA
> external oscillator input to any applicable xtal ?

Right. Could you delete that comment then with this patch to
prevent confusion?

Regards,
Simon