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From: "Iddamsetty, Aravind" <aravind.iddamsetty@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>,
	<intel-gfx@lists.freedesktop.org>
Cc: tejas.upadhyay@intel.com, dri-devel@lists.freedesktop.org,
	radhakrishna.sripada@intel.com
Subject: Re: [PATCH v1 2/4] drm/i915: Add missing mask when reading GEN12_DSMBASE
Date: Fri, 16 Sep 2022 17:28:07 +0530	[thread overview]
Message-ID: <50bb49a3-6f29-ec5d-539a-68e7cbbdced9@intel.com> (raw)
In-Reply-To: <20220915-stolen-v1-2-117c5f295bb2@intel.com>



On 16-09-2022 02:09, Lucas De Marchi wrote:
> DSMBASE register is defined so BDSM bitfield contains the bits 63 to 20
> of the base address of stolen. For the supported platforms bits 0-19 are
> zero but that may not be true in future. Add the missing mask.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

Acked-by: Aravind Iddamsetty <aravind.iddamsetty@intel.com>

Thanks,
Aravind.
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> index 42f4769bb4ac..c34065fe2ecc 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> @@ -814,7 +814,7 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type,
>  		return ERR_PTR(-ENXIO);
>  
>  	/* Use DSM base address instead for stolen memory */
> -	dsm_base = intel_uncore_read64(uncore, GEN12_DSMBASE);
> +	dsm_base = intel_uncore_read64(uncore, GEN12_DSMBASE) & GEN12_BDSM_MASK;
>  	if (IS_DG1(uncore->i915)) {
>  		lmem_size = pci_resource_len(pdev, GEN12_LMEM_BAR);
>  		if (WARN_ON(lmem_size < dsm_base))
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 1a9bd829fc7e..0301874c76ba 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7953,6 +7953,7 @@ enum skl_power_gate {
>  
>  #define GEN12_GSMBASE			_MMIO(0x108100)
>  #define GEN12_DSMBASE			_MMIO(0x1080C0)
> +#define   GEN12_BDSM_MASK		GENMASK(63, 20)
>  
>  #define XEHP_CLOCK_GATE_DIS		_MMIO(0x101014)
>  #define   SGSI_SIDECLK_DIS		REG_BIT(17)
> 

WARNING: multiple messages have this Message-ID (diff)
From: "Iddamsetty, Aravind" <aravind.iddamsetty@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>,
	<intel-gfx@lists.freedesktop.org>
Cc: tejas.upadhyay@intel.com, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v1 2/4] drm/i915: Add missing mask when reading GEN12_DSMBASE
Date: Fri, 16 Sep 2022 17:28:07 +0530	[thread overview]
Message-ID: <50bb49a3-6f29-ec5d-539a-68e7cbbdced9@intel.com> (raw)
In-Reply-To: <20220915-stolen-v1-2-117c5f295bb2@intel.com>



On 16-09-2022 02:09, Lucas De Marchi wrote:
> DSMBASE register is defined so BDSM bitfield contains the bits 63 to 20
> of the base address of stolen. For the supported platforms bits 0-19 are
> zero but that may not be true in future. Add the missing mask.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

Acked-by: Aravind Iddamsetty <aravind.iddamsetty@intel.com>

Thanks,
Aravind.
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> index 42f4769bb4ac..c34065fe2ecc 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> @@ -814,7 +814,7 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type,
>  		return ERR_PTR(-ENXIO);
>  
>  	/* Use DSM base address instead for stolen memory */
> -	dsm_base = intel_uncore_read64(uncore, GEN12_DSMBASE);
> +	dsm_base = intel_uncore_read64(uncore, GEN12_DSMBASE) & GEN12_BDSM_MASK;
>  	if (IS_DG1(uncore->i915)) {
>  		lmem_size = pci_resource_len(pdev, GEN12_LMEM_BAR);
>  		if (WARN_ON(lmem_size < dsm_base))
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 1a9bd829fc7e..0301874c76ba 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7953,6 +7953,7 @@ enum skl_power_gate {
>  
>  #define GEN12_GSMBASE			_MMIO(0x108100)
>  #define GEN12_DSMBASE			_MMIO(0x1080C0)
> +#define   GEN12_BDSM_MASK		GENMASK(63, 20)
>  
>  #define XEHP_CLOCK_GATE_DIS		_MMIO(0x101014)
>  #define   SGSI_SIDECLK_DIS		REG_BIT(17)
> 

  parent reply	other threads:[~2022-09-16 11:58 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-15 20:39 [Intel-gfx] [PATCH v1 0/4] drm/i915: Improvements to stolen memory setup Lucas De Marchi
2022-09-15 20:39 ` Lucas De Marchi
2022-09-15 20:39 ` [Intel-gfx] [PATCH v1 1/4] drm/i915: Move dsm assignment to be after adjustment Lucas De Marchi
2022-09-15 20:39   ` Lucas De Marchi
2022-09-16 11:57   ` Iddamsetty, Aravind
2022-09-16 11:57     ` [Intel-gfx] " Iddamsetty, Aravind
2022-09-15 20:39 ` [Intel-gfx] [PATCH v1 2/4] drm/i915: Add missing mask when reading GEN12_DSMBASE Lucas De Marchi
2022-09-15 20:39   ` Lucas De Marchi
2022-09-15 21:03   ` [Intel-gfx] " Caz Yokoyama
2022-09-16  0:33   ` kernel test robot
2022-09-16  1:04   ` kernel test robot
2022-09-16  1:04     ` kernel test robot
2022-09-16 11:58   ` Iddamsetty, Aravind [this message]
2022-09-16 11:58     ` Iddamsetty, Aravind
2022-09-15 20:39 ` [Intel-gfx] [PATCH v1 3/4] drm/i915: Split i915_gem_init_stolen() Lucas De Marchi
2022-09-15 20:39   ` Lucas De Marchi
2022-09-15 22:07   ` [PATCH v1.1] " Lucas De Marchi
2022-09-15 22:07     ` [Intel-gfx] " Lucas De Marchi
2022-09-16 12:20   ` [PATCH v1 3/4] " Iddamsetty, Aravind
2022-09-16 12:20     ` [Intel-gfx] " Iddamsetty, Aravind
2022-09-16 16:06     ` Lucas De Marchi
2022-09-16 16:06       ` [Intel-gfx] " Lucas De Marchi
2022-09-15 20:39 ` [Intel-gfx] [PATCH v1 4/4] drm/i915/dgfx: Make failure to setup stolen non-fatal Lucas De Marchi
2022-09-15 20:39   ` Lucas De Marchi
2022-09-15 21:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improvements to stolen memory setup Patchwork
2022-09-15 21:02 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-09-15 21:18 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-09-15 21:54   ` Lucas De Marchi
2022-09-15 23:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improvements to stolen memory setup (rev2) Patchwork
2022-09-15 23:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-09-15 23:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-16  6:05 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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