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* How to use eSPI between Host and slave BMC in openbmc project
@ 2020-05-10  8:27 zhang_cy1989
  2020-05-11  0:13 ` Andrew Jeffery
  0 siblings, 1 reply; 7+ messages in thread
From: zhang_cy1989 @ 2020-05-10  8:27 UTC (permalink / raw)
  To: openbmc, andrew

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Dear Andrew Jeffery    I noticed that you mentioned eSPI in another mail thread.But I can't find some information in openbmc project.    There are some questions about eSPI:        1 Are there some solutions to use eSPI interface in openbmc project?         2 Whether the Host side needs eSPI controler driver? I can't find any info about eSPI in linux kernel for host os. Is eSPI transparent to the Host side?        3 Whether the slave side(Ex BMC/EC) needs slave eSPI driver? I know there are some registers descriptions of eSPI controller in the ast2500 data sheet.         Unfortunately, I don't find slave eSPI driver either.         4 which intel products include eSPI feature?         5 eSPI interface can transmit io cycle and mem cycle, but in which case or applications eSPI transfer mem cycle?    Looking forward to your reply.    ThanksBRFelix



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zhang_cy1989
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zhang_cy1989@163.com
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签名由网易邮箱大师定制

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* Re: How to use eSPI between Host and slave BMC in openbmc project
  2020-05-10  8:27 How to use eSPI between Host and slave BMC in openbmc project zhang_cy1989
@ 2020-05-11  0:13 ` Andrew Jeffery
  2020-05-11  0:47   ` Jeremy Kerr
  0 siblings, 1 reply; 7+ messages in thread
From: Andrew Jeffery @ 2020-05-11  0:13 UTC (permalink / raw)
  To: zhang_cy1989, openbmc; +Cc: James Feist, Jeremy Kerr

Hi Felix,

On Sun, 10 May 2020, at 17:57, zhang_cy1989 wrote:
>  
> Dear Andrew Jeffery
> I noticed that you mentioned eSPI in another 
> mail thread.But I can't find some information in openbmc 
> project.    There are some questions about eSPI:
>        1 Are there some solutions to use eSPI interface in openbmc project?
>        2 Whether the Host side needs eSPI controler driver? I can't find any 
> info about eSPI in linux kernel for host os. Is eSPI transparent to the 
> Host side?
>        3 Whether the slave side(Ex BMC/EC) needs slave eSPI 
> driver? I know there are some registers descriptions of eSPI controller 
> in the ast2500 data sheet.         Unfortunately, I don't find slave 
> eSPI driver either.
>        4 which intel products include eSPI 
> feature?
>        5 eSPI interface can transmit io cycle and mem cycle, 
> but in which case or applications eSPI transfer mem cycle?

Unfortunately I'm not well placed to answer your questions - I work on
IBM POWER systems which use LPC rather than eSPI.

Some of the Intel crew will no doubt be more helpful here, I've added
James on Cc to see if he can give you any pointers. Jeremy has also
been poking at eSPI recently, so I've added him as well.

Cheers,

Andrew

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: How to use eSPI between Host and slave BMC in openbmc project
  2020-05-11  0:13 ` Andrew Jeffery
@ 2020-05-11  0:47   ` Jeremy Kerr
  2020-05-11 13:31     ` Oskar Senft
  0 siblings, 1 reply; 7+ messages in thread
From: Jeremy Kerr @ 2020-05-11  0:47 UTC (permalink / raw)
  To: Andrew Jeffery, zhang_cy1989, openbmc; +Cc: James Feist

Hi Felix,

> 1 Are there some solutions to use eSPI interface in openbmc project?

There are some platforms in development that use eSPI between the host
and BMC, yes.

> 2 Whether the Host side needs eSPI controler driver? I can't find any
> info about eSPI in linux kernel for host os. Is eSPI transparent to
> the Host side?

For the host hardware I've seen, the eSPI channel doesn't need a driver
- it's usually controlled entirely in hardware by the PCH.

 
> 3 Whether the slave side(Ex BMC/EC) needs slave eSPI driver? I know
> there are some registers descriptions of eSPIcontroller in the
> ast2500 data sheet. Unfortunately, I don't find slave eSPI driver
> either.

For the BMC, we need some support in the kernel to handle eSPI
behaviour. There is a prototype driver for the ast2500 eSPI slave
around, but it hasn't made it upstream:

https://lists.ozlabs.org/pipermail/openbmc/2018-February/010937.html

> 4 which intel products include eSPI feature?

I'm aware of the C62x series of PCH chipsets, there may be others too.

> 5 eSPI interface can transmit io cycle and mem cycle, 
> but in which case or applications eSPI transfer mem cycle?

I haven't seen anything specific, I don't think it'd be too useful in
our architecture.

Cheers,


Jeremy

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: How to use eSPI between Host and slave BMC in openbmc project
  2020-05-11  0:47   ` Jeremy Kerr
@ 2020-05-11 13:31     ` Oskar Senft
  2020-05-15 13:43       ` zhang_cy1989
  0 siblings, 1 reply; 7+ messages in thread
From: Oskar Senft @ 2020-05-11 13:31 UTC (permalink / raw)
  To: Jeremy Kerr, zhang_cy1989; +Cc: Andrew Jeffery, openbmc, James Feist

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Hi

Jeremy's response matches my understanding, thank you!

> 1 Are there some solutions to use eSPI interface in openbmc project?
>
> There are some platforms in development that use eSPI between the host
> and BMC, yes.
>
On platforms using Intel's C620 series PCH + AST2500 BMC,  eSPI can be used
basically exactly like LPC on both sides.


> For the BMC, we need some support in the kernel to handle eSPI
> behaviour. There is a prototype driver for the ast2500 eSPI slave
> around, but it hasn't made it upstream:
>
> https://lists.ozlabs.org/pipermail/openbmc/2018-February/010937.html

Yes, without that, the PCH will not release the host CPU from reset.

 > 5 eSPI interface can transmit io cycle and mem cycle,

> > but in which case or applications eSPI transfer mem cycle?
>
> I haven't seen anything specific, I don't think it'd be too useful in
> our architecture.
>
I've seen platforms that load the "lower 16 MiB" from SPI flash (descriptor
region, ME, GbE FW) and load the "upper 16 MiB" (the actual BIOS) via LPC.
The same should be possible via eSPI.

Note that with eSPI it would "technically" be possible to load _ALL_ FW for
the PCH (descriptor region, ME, GbE FW, BIOS) via eSPI using the "Slave
Attached Flash Sharing" (SAFS) feature. However, there's no BMC available
today that I know of that supports that, but support is in the works on BMC
chips. Having said that, Intel's support for SAFS is unclear: some
documents claim it's supported, others state it's not POR (SAFS that is).

Happy to provide more information.

Oskar.

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* Re:  How to use eSPI between Host and slave BMC in openbmc project
  2020-05-11 13:31     ` Oskar Senft
@ 2020-05-15 13:43       ` zhang_cy1989
  0 siblings, 0 replies; 7+ messages in thread
From: zhang_cy1989 @ 2020-05-15 13:43 UTC (permalink / raw)
  To: osk; +Cc: jk, andrew, openbmc, james.feist

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Dear James/andrew/Oskar
    Thanks a lot.
    I am studying eSPI spec. But it's hard to find any products with eSPI.
    Your reply gives more understanding about eSPI.
    
    Looking forward to more applications with eSPI in openbmc project.
    Thanks again.
BR
Felix
    


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zhang_cy1989
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zhang_cy1989@163.com
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签名由网易邮箱大师定制
On 5/11/2020 21:31,Oskar Senft<osk@google.com> wrote:
Hi


Jeremy's response matches my understanding, thank you!


> 1 Are there some solutions to use eSPI interface in openbmc project?

There are some platforms in development that use eSPI between the host
and BMC, yes.

On platforms using Intel's C620 series PCH + AST2500 BMC,  eSPI can be used basically exactly like LPC on both sides.
 
For the BMC, we need some support in the kernel to handle eSPI
behaviour. There is a prototype driver for the ast2500 eSPI slave
around, but it hasn't made it upstream:

https://lists.ozlabs.org/pipermail/openbmc/2018-February/010937.html
Yes, without that, the PCH will not release the host CPU from reset.


 > 5 eSPI interface can transmit io cycle and mem cycle, 
> but in which case or applications eSPI transfer mem cycle?

I haven't seen anything specific, I don't think it'd be too useful in
our architecture.

I've seen platforms that load the "lower 16 MiB" from SPI flash (descriptor region, ME, GbE FW) and load the "upper 16 MiB" (the actual BIOS) via LPC. The same should be possible via eSPI.


Note that with eSPI it would "technically" be possible to load _ALL_ FW for the PCH (descriptor region, ME, GbE FW, BIOS) via eSPI using the "Slave Attached Flash Sharing" (SAFS) feature. However, there's no BMC available today that I know of that supports that, but support is in the works on BMC chips. Having said that, Intel's support for SAFS is unclear: some documents claim it's supported, others state it's not POR (SAFS that is).


Happy to provide more information.


Oskar.

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* Re: How to use eSPI between Host and slave BMC in openbmc project
  2020-05-27  7:03 Wang, Kuiying
@ 2020-06-17 22:42 ` zhang_cy1989
  0 siblings, 0 replies; 7+ messages in thread
From: zhang_cy1989 @ 2020-06-17 22:42 UTC (permalink / raw)
  To: kuiying.wang; +Cc: openbmc

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Dear Kwin
    I'm very sorry for the late reply.
    I'll try it later. Maybe delayed some days for other things.
    Anyway, the result and any problem will be show here after my experiment.
    Looking forward to more communication with you
    Thanks
BR
Felix


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zhang_cy1989
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zhang_cy1989@163.com
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签名由网易邮箱大师定制
On 5/27/2020 15:03,Wang, Kuiying<kuiying.wang@intel.com> wrote:

Hi  Felix,

 

Both KCS and eSPI driver are ready x86 platforms.

Please refer https://github.com/Intel-BMC/

 

Example:

https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0022-KCS-driver-support-in-uBoot.patch

https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0005-Ast2600-Enable-interrupt-in-u-boot.patch

https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0022-Add-AST2500-eSPI-driver.patch

 

 

BTW: you could set Acute travel logic to analyze eSPI bus. There is eSPI connector on Intel CRB platform.

 

Thanks,

Kwin.

 

 

 

Dear James/andrew/Oskar
    Thanks a lot.
    I am studying eSPI spec. But it's hard to find any products with eSPI.
    Your reply gives more understanding about eSPI.
    
    Looking forward to more applications with eSPI in openbmc project.
    Thanks again.
BR
Felix
    
 
 
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zhang_cy1989
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zhang_cy1989 at 163.com

 

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* How to use eSPI between Host and slave BMC in openbmc project
@ 2020-05-27  7:03 Wang, Kuiying
  2020-06-17 22:42 ` zhang_cy1989
  0 siblings, 1 reply; 7+ messages in thread
From: Wang, Kuiying @ 2020-05-27  7:03 UTC (permalink / raw)
  To: zhang_cy1989; +Cc: openbmc

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Hi  Felix,

Both KCS and eSPI driver are ready x86 platforms.
Please refer https://github.com/Intel-BMC/

Example:
https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0022-KCS-driver-support-in-uBoot.patch
https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0005-Ast2600-Enable-interrupt-in-u-boot.patch
https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0022-Add-AST2500-eSPI-driver.patch


BTW: you could set Acute travel logic to analyze eSPI bus. There is eSPI connector on Intel CRB platform.

Thanks,
Kwin.




Dear James/andrew/Oskar

    Thanks a lot.

    I am studying eSPI spec. But it's hard to find any products with eSPI.

    Your reply gives more understanding about eSPI.



    Looking forward to more applications with eSPI in openbmc project.

    Thanks again.

BR

Felix







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zhang_cy1989

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zhang_cy1989 at 163.com<https://lists.ozlabs.org/listinfo/openbmc>


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end of thread, other threads:[~2020-06-17 22:42 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-10  8:27 How to use eSPI between Host and slave BMC in openbmc project zhang_cy1989
2020-05-11  0:13 ` Andrew Jeffery
2020-05-11  0:47   ` Jeremy Kerr
2020-05-11 13:31     ` Oskar Senft
2020-05-15 13:43       ` zhang_cy1989
2020-05-27  7:03 Wang, Kuiying
2020-06-17 22:42 ` zhang_cy1989

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