[PATCH V3 0/5] ARM: DT: tegra114: Add DT entry for different controller

[PATCH V3 0/5] ARM: DT: tegra114: Add DT entry for different controller

[Laxman Dewangan]

This patch series add DT entry for APB DMA, I2C, UART, KBC and SPI.

This patch series is generated on top of CCF work for T114 done by Peter
and hence it should be applied on top of T114 CCF patches.

Changes from V1: 
- Add reason why APBDMA is not compatible with older driver
  in description.
- Remove UARTB car id correction. Make the compatible with tegra114 and
  older chip.
- Add compatible for kbc as nvidia,tegra114-kbc and nvidia,tegra20-kbc.

Changes from V2:
- Rebase whole tree with Stephen tegra tree for-3.10/dt.
- Rephrase the commit subjects.
- Add more description about why driver is not compatible with prev hardware.

Laxman Dewangan (5):
  ARM: tegra: add APB DMA nodes to Tegra114 DT
  ARM: tegra: add i2c nodes to Tegra114 DT
  ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114
  ARM: tegra: add KBC nodes to Tegra114 DT
  ARM: tegra: add spi nodes to Tegra114 DT

 arch/arm/boot/dts/tegra114.dtsi |  200 ++++++++++++++++++++++++++++++++++++++-
 1 files changed, 196 insertions(+), 4 deletions(-)

[PATCH V3 0/5] ARM: DT: tegra114: Add DT entry for different controller

[Laxman Dewangan]

This patch series add DT entry for APB DMA, I2C, UART, KBC and SPI.

This patch series is generated on top of CCF work for T114 done by Peter
and hence it should be applied on top of T114 CCF patches.

Changes from V1: 
- Add reason why APBDMA is not compatible with older driver
  in description.
- Remove UARTB car id correction. Make the compatible with tegra114 and
  older chip.
- Add compatible for kbc as nvidia,tegra114-kbc and nvidia,tegra20-kbc.

Changes from V2:
- Rebase whole tree with Stephen tegra tree for-3.10/dt.
- Rephrase the commit subjects.
- Add more description about why driver is not compatible with prev hardware.

Laxman Dewangan (5):
  ARM: tegra: add APB DMA nodes to Tegra114 DT
  ARM: tegra: add i2c nodes to Tegra114 DT
  ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114
  ARM: tegra: add KBC nodes to Tegra114 DT
  ARM: tegra: add spi nodes to Tegra114 DT

 arch/arm/boot/dts/tegra114.dtsi |  200 ++++++++++++++++++++++++++++++++++++++-
 1 files changed, 196 insertions(+), 4 deletions(-)

[PATCH V3 0/5] ARM: DT: tegra114: Add DT entry for different controller

[Laxman Dewangan]

This patch series add DT entry for APB DMA, I2C, UART, KBC and SPI.

This patch series is generated on top of CCF work for T114 done by Peter
and hence it should be applied on top of T114 CCF patches.

Changes from V1: 
- Add reason why APBDMA is not compatible with older driver
  in description.
- Remove UARTB car id correction. Make the compatible with tegra114 and
  older chip.
- Add compatible for kbc as nvidia,tegra114-kbc and nvidia,tegra20-kbc.

Changes from V2:
- Rebase whole tree with Stephen tegra tree for-3.10/dt.
- Rephrase the commit subjects.
- Add more description about why driver is not compatible with prev hardware.

Laxman Dewangan (5):
  ARM: tegra: add APB DMA nodes to Tegra114 DT
  ARM: tegra: add i2c nodes to Tegra114 DT
  ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114
  ARM: tegra: add KBC nodes to Tegra114 DT
  ARM: tegra: add spi nodes to Tegra114 DT

 arch/arm/boot/dts/tegra114.dtsi |  200 ++++++++++++++++++++++++++++++++++++++-
 1 files changed, 196 insertions(+), 4 deletions(-)

[PATCH V3 1/5] ARM: tegra: add APB DMA nodes to Tegra114 DT

[Laxman Dewangan]

NVIDIA's Tegra114 has 32 channels APB DMA controller. Add DT entry for
APB DMA controllers and make it compatible with "nvidia,tegra114-apbdma".

Tegra114 DMA controller is not compatible with Tegra30/Tegra20 DMA
controller driver as in T114, the global pause also clock gate the
DMA register and hence it iw not possible to write the DMA register
with global pause.

Signed-off-by: Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
Changes from V1:
- Add reeason why APBDMA is not compatible with older driver
  in description.

Changes from V2:
 - Rebase to for-3.10/dt of Stephen's tegra tree.

 arch/arm/boot/dts/tegra114.dtsi |   38 ++++++++++++++++++++++++++++++++++++++
 1 files changed, 38 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 7ddb328..634d70c 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -37,6 +37,44 @@
 		reg = <0x6000c004 0x14c>;
 	};
 
+	apbdma: dma {
+		compatible = "nvidia,tegra114-apbdma";
+		reg = <0x6000a000 0x1400>;
+		interrupts = <0 104 0x04
+			      0 105 0x04
+			      0 106 0x04
+			      0 107 0x04
+			      0 108 0x04
+			      0 109 0x04
+			      0 110 0x04
+			      0 111 0x04
+			      0 112 0x04
+			      0 113 0x04
+			      0 114 0x04
+			      0 115 0x04
+			      0 116 0x04
+			      0 117 0x04
+			      0 118 0x04
+			      0 119 0x04
+			      0 128 0x04
+			      0 129 0x04
+			      0 130 0x04
+			      0 131 0x04
+			      0 132 0x04
+			      0 133 0x04
+			      0 134 0x04
+			      0 135 0x04
+			      0 136 0x04
+			      0 137 0x04
+			      0 138 0x04
+			      0 139 0x04
+			      0 140 0x04
+			      0 141 0x04
+			      0 142 0x04
+			      0 143 0x04>;
+		clocks = <&tegra_car 34>;
+	};
+
 	gpio: gpio {
 		compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
 		reg = <0x6000d000 0x1000>;
-- 
1.7.1.1

[PATCH V3 1/5] ARM: tegra: add APB DMA nodes to Tegra114 DT

[Laxman Dewangan]

NVIDIA's Tegra114 has 32 channels APB DMA controller. Add DT entry for
APB DMA controllers and make it compatible with "nvidia,tegra114-apbdma".

Tegra114 DMA controller is not compatible with Tegra30/Tegra20 DMA
controller driver as in T114, the global pause also clock gate the
DMA register and hence it iw not possible to write the DMA register
with global pause.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes from V1:
- Add reeason why APBDMA is not compatible with older driver
  in description.

Changes from V2:
 - Rebase to for-3.10/dt of Stephen's tegra tree.

 arch/arm/boot/dts/tegra114.dtsi |   38 ++++++++++++++++++++++++++++++++++++++
 1 files changed, 38 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 7ddb328..634d70c 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -37,6 +37,44 @@
 		reg = <0x6000c004 0x14c>;
 	};
 
+	apbdma: dma {
+		compatible = "nvidia,tegra114-apbdma";
+		reg = <0x6000a000 0x1400>;
+		interrupts = <0 104 0x04
+			      0 105 0x04
+			      0 106 0x04
+			      0 107 0x04
+			      0 108 0x04
+			      0 109 0x04
+			      0 110 0x04
+			      0 111 0x04
+			      0 112 0x04
+			      0 113 0x04
+			      0 114 0x04
+			      0 115 0x04
+			      0 116 0x04
+			      0 117 0x04
+			      0 118 0x04
+			      0 119 0x04
+			      0 128 0x04
+			      0 129 0x04
+			      0 130 0x04
+			      0 131 0x04
+			      0 132 0x04
+			      0 133 0x04
+			      0 134 0x04
+			      0 135 0x04
+			      0 136 0x04
+			      0 137 0x04
+			      0 138 0x04
+			      0 139 0x04
+			      0 140 0x04
+			      0 141 0x04
+			      0 142 0x04
+			      0 143 0x04>;
+		clocks = <&tegra_car 34>;
+	};
+
 	gpio: gpio {
 		compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
 		reg = <0x6000d000 0x1000>;
-- 
1.7.1.1

[PATCH V3 1/5] ARM: tegra: add APB DMA nodes to Tegra114 DT

[Laxman Dewangan]

NVIDIA's Tegra114 has 32 channels APB DMA controller. Add DT entry for
APB DMA controllers and make it compatible with "nvidia,tegra114-apbdma".

Tegra114 DMA controller is not compatible with Tegra30/Tegra20 DMA
controller driver as in T114, the global pause also clock gate the
DMA register and hence it iw not possible to write the DMA register
with global pause.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes from V1:
- Add reeason why APBDMA is not compatible with older driver
  in description.

Changes from V2:
 - Rebase to for-3.10/dt of Stephen's tegra tree.

 arch/arm/boot/dts/tegra114.dtsi |   38 ++++++++++++++++++++++++++++++++++++++
 1 files changed, 38 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 7ddb328..634d70c 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -37,6 +37,44 @@
 		reg = <0x6000c004 0x14c>;
 	};
 
+	apbdma: dma {
+		compatible = "nvidia,tegra114-apbdma";
+		reg = <0x6000a000 0x1400>;
+		interrupts = <0 104 0x04
+			      0 105 0x04
+			      0 106 0x04
+			      0 107 0x04
+			      0 108 0x04
+			      0 109 0x04
+			      0 110 0x04
+			      0 111 0x04
+			      0 112 0x04
+			      0 113 0x04
+			      0 114 0x04
+			      0 115 0x04
+			      0 116 0x04
+			      0 117 0x04
+			      0 118 0x04
+			      0 119 0x04
+			      0 128 0x04
+			      0 129 0x04
+			      0 130 0x04
+			      0 131 0x04
+			      0 132 0x04
+			      0 133 0x04
+			      0 134 0x04
+			      0 135 0x04
+			      0 136 0x04
+			      0 137 0x04
+			      0 138 0x04
+			      0 139 0x04
+			      0 140 0x04
+			      0 141 0x04
+			      0 142 0x04
+			      0 143 0x04>;
+		clocks = <&tegra_car 34>;
+	};
+
 	gpio: gpio {
 		compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
 		reg = <0x6000d000 0x1000>;
-- 
1.7.1.1

[PATCH V3 2/5] ARM: tegra: add i2c nodes to Tegra114 DT

[Laxman Dewangan]

NVIDIA's Tegra114 has 5 i2c controllers. These controllers have
following changes which makes incompatible with previous hardware:
- Single clock source to i2c controller.
- Interrupt support for per packet transfer.

Add DT entry for i2c controllers and make it compatible with
"nvidia,tegra114-i2c".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes from V1:
- None

Changes from V2:
- Rebase to for-3.10/dt of Stephen's tegra tree.
- Better describe why Tegra114 is not compatible with previous hardware.

 arch/arm/boot/dts/tegra114.dtsi |   55 +++++++++++++++++++++++++++++++++++++++
 1 files changed, 55 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 634d70c..ce44938 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -138,6 +138,61 @@
 		status = "disabled";
 	};
 
+	i2c@7000c000 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000c000 0x100>;
+		interrupts = <0 38 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 12>;
+		clock-names = "div-clk";
+	};
+
+	i2c@7000c400 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000c400 0x100>;
+		interrupts = <0 84 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 54>;
+		clock-names = "div-clk";
+	};
+
+	i2c@7000c500 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000c500 0x100>;
+		interrupts = <0 92 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 67>;
+		clock-names = "div-clk";
+	};
+
+	i2c@7000c700 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000c700 0x100>;
+		interrupts = <0 120 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 103>;
+		clock-names = "div-clk";
+	};
+
+	i2c@7000d000 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000d000 0x100>;
+		interrupts = <0 53 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 47>;
+		clock-names = "div-clk";
+	};
+
 	rtc {
 		compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";
 		reg = <0x7000e000 0x100>;
-- 
1.7.1.1

[PATCH V3 2/5] ARM: tegra: add i2c nodes to Tegra114 DT

[Laxman Dewangan]

NVIDIA's Tegra114 has 5 i2c controllers. These controllers have
following changes which makes incompatible with previous hardware:
- Single clock source to i2c controller.
- Interrupt support for per packet transfer.

Add DT entry for i2c controllers and make it compatible with
"nvidia,tegra114-i2c".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes from V1:
- None

Changes from V2:
- Rebase to for-3.10/dt of Stephen's tegra tree.
- Better describe why Tegra114 is not compatible with previous hardware.

 arch/arm/boot/dts/tegra114.dtsi |   55 +++++++++++++++++++++++++++++++++++++++
 1 files changed, 55 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 634d70c..ce44938 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -138,6 +138,61 @@
 		status = "disabled";
 	};
 
+	i2c@7000c000 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000c000 0x100>;
+		interrupts = <0 38 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 12>;
+		clock-names = "div-clk";
+	};
+
+	i2c@7000c400 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000c400 0x100>;
+		interrupts = <0 84 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 54>;
+		clock-names = "div-clk";
+	};
+
+	i2c@7000c500 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000c500 0x100>;
+		interrupts = <0 92 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 67>;
+		clock-names = "div-clk";
+	};
+
+	i2c@7000c700 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000c700 0x100>;
+		interrupts = <0 120 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 103>;
+		clock-names = "div-clk";
+	};
+
+	i2c@7000d000 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000d000 0x100>;
+		interrupts = <0 53 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 47>;
+		clock-names = "div-clk";
+	};
+
 	rtc {
 		compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";
 		reg = <0x7000e000 0x100>;
-- 
1.7.1.1

[PATCH V3 2/5] ARM: tegra: add i2c nodes to Tegra114 DT

[Laxman Dewangan]

NVIDIA's Tegra114 has 5 i2c controllers. These controllers have
following changes which makes incompatible with previous hardware:
- Single clock source to i2c controller.
- Interrupt support for per packet transfer.

Add DT entry for i2c controllers and make it compatible with
"nvidia,tegra114-i2c".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes from V1:
- None

Changes from V2:
- Rebase to for-3.10/dt of Stephen's tegra tree.
- Better describe why Tegra114 is not compatible with previous hardware.

 arch/arm/boot/dts/tegra114.dtsi |   55 +++++++++++++++++++++++++++++++++++++++
 1 files changed, 55 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 634d70c..ce44938 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -138,6 +138,61 @@
 		status = "disabled";
 	};
 
+	i2c at 7000c000 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000c000 0x100>;
+		interrupts = <0 38 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 12>;
+		clock-names = "div-clk";
+	};
+
+	i2c at 7000c400 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000c400 0x100>;
+		interrupts = <0 84 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 54>;
+		clock-names = "div-clk";
+	};
+
+	i2c at 7000c500 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000c500 0x100>;
+		interrupts = <0 92 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 67>;
+		clock-names = "div-clk";
+	};
+
+	i2c at 7000c700 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000c700 0x100>;
+		interrupts = <0 120 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 103>;
+		clock-names = "div-clk";
+	};
+
+	i2c at 7000d000 {
+		compatible = "nvidia,tegra114-i2c";
+		reg = <0x7000d000 0x100>;
+		interrupts = <0 53 0x04>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+		clocks = <&tegra_car 47>;
+		clock-names = "div-clk";
+	};
+
 	rtc {
 		compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";
 		reg = <0x7000e000 0x100>;
-- 
1.7.1.1

[PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Laxman Dewangan]

Add APB DMA requestor and serial aliases for serial controller.
There will be two serial driver i.e. 8250 based simple serial driver
and APB DMA based serial driver for higher baudrate and performace.

The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
"nvidia,tegra20-uart" and APB DMA based driver will get enabled with
compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes from V1:
- Remove UARTB car id correction. Make the compatible with tegra114 and
  tegra30 for hsuart and tegra20 for simple uart driver.

Changes from V2:
- Rebase to for-3.10/dt of Stephen's tegra tree.

 arch/arm/boot/dts/tegra114.dtsi |   27 +++++++++++++++++++++++----
 1 files changed, 23 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index ce44938..5a41d04 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -4,6 +4,13 @@
 	compatible = "nvidia,tegra114";
 	interrupt-parent = <&gic>;
 
+	aliases {
+		serial0 = &uarta;
+		serial1 = &uartb;
+		serial2 = &uartc;
+		serial3 = &uartd;
+	};
+
 	gic: interrupt-controller {
 		compatible = "arm,cortex-a15-gic";
 		#interrupt-cells = <3>;
@@ -98,35 +105,47 @@
 		       0x70003000 0x40c>;	/* Mux registers */
 	};
 
-	serial@70006000 {
+	/*
+	 * There are two serial driver i.e. 8250 based simple serial
+	 * driver and APB DMA based serial driver for higher baudrate
+	 * and performace. To enable the 8250 based driver, the compatible
+	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
+	 * the APB DMA based serial driver, the comptible is
+	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
+	 */
+	uarta: serial@70006000 {
 		compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
 		reg = <0x70006000 0x40>;
 		reg-shift = <2>;
 		interrupts = <0 36 0x04>;
+		nvidia,dma-request-selector = <&apbdma 8>;
 		status = "disabled";
 	};
 
-	serial@70006040 {
+	uartb: serial@70006040 {
 		compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
 		reg = <0x70006040 0x40>;
 		reg-shift = <2>;
 		interrupts = <0 37 0x04>;
+		nvidia,dma-request-selector = <&apbdma 9>;
 		status = "disabled";
 	};
 
-	serial@70006200 {
+	uartc: serial@70006200 {
 		compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
 		reg = <0x70006200 0x100>;
 		reg-shift = <2>;
 		interrupts = <0 46 0x04>;
+		nvidia,dma-request-selector = <&apbdma 10>;
 		status = "disabled";
 	};
 
-	serial@70006300 {
+	uartd: serial@70006300 {
 		compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
 		reg = <0x70006300 0x100>;
 		reg-shift = <2>;
 		interrupts = <0 90 0x04>;
+		nvidia,dma-request-selector = <&apbdma 19>;
 		status = "disabled";
 	};
 
-- 
1.7.1.1

[PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Laxman Dewangan]

Add APB DMA requestor and serial aliases for serial controller.
There will be two serial driver i.e. 8250 based simple serial driver
and APB DMA based serial driver for higher baudrate and performace.

The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
"nvidia,tegra20-uart" and APB DMA based driver will get enabled with
compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes from V1:
- Remove UARTB car id correction. Make the compatible with tegra114 and
  tegra30 for hsuart and tegra20 for simple uart driver.

Changes from V2:
- Rebase to for-3.10/dt of Stephen's tegra tree.

 arch/arm/boot/dts/tegra114.dtsi |   27 +++++++++++++++++++++++----
 1 files changed, 23 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index ce44938..5a41d04 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -4,6 +4,13 @@
 	compatible = "nvidia,tegra114";
 	interrupt-parent = <&gic>;
 
+	aliases {
+		serial0 = &uarta;
+		serial1 = &uartb;
+		serial2 = &uartc;
+		serial3 = &uartd;
+	};
+
 	gic: interrupt-controller {
 		compatible = "arm,cortex-a15-gic";
 		#interrupt-cells = <3>;
@@ -98,35 +105,47 @@
 		       0x70003000 0x40c>;	/* Mux registers */
 	};
 
-	serial@70006000 {
+	/*
+	 * There are two serial driver i.e. 8250 based simple serial
+	 * driver and APB DMA based serial driver for higher baudrate
+	 * and performace. To enable the 8250 based driver, the compatible
+	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
+	 * the APB DMA based serial driver, the comptible is
+	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
+	 */
+	uarta: serial@70006000 {
 		compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
 		reg = <0x70006000 0x40>;
 		reg-shift = <2>;
 		interrupts = <0 36 0x04>;
+		nvidia,dma-request-selector = <&apbdma 8>;
 		status = "disabled";
 	};
 
-	serial@70006040 {
+	uartb: serial@70006040 {
 		compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
 		reg = <0x70006040 0x40>;
 		reg-shift = <2>;
 		interrupts = <0 37 0x04>;
+		nvidia,dma-request-selector = <&apbdma 9>;
 		status = "disabled";
 	};
 
-	serial@70006200 {
+	uartc: serial@70006200 {
 		compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
 		reg = <0x70006200 0x100>;
 		reg-shift = <2>;
 		interrupts = <0 46 0x04>;
+		nvidia,dma-request-selector = <&apbdma 10>;
 		status = "disabled";
 	};
 
-	serial@70006300 {
+	uartd: serial@70006300 {
 		compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
 		reg = <0x70006300 0x100>;
 		reg-shift = <2>;
 		interrupts = <0 90 0x04>;
+		nvidia,dma-request-selector = <&apbdma 19>;
 		status = "disabled";
 	};
 
-- 
1.7.1.1

[PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Laxman Dewangan]

Add APB DMA requestor and serial aliases for serial controller.
There will be two serial driver i.e. 8250 based simple serial driver
and APB DMA based serial driver for higher baudrate and performace.

The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
"nvidia,tegra20-uart" and APB DMA based driver will get enabled with
compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes from V1:
- Remove UARTB car id correction. Make the compatible with tegra114 and
  tegra30 for hsuart and tegra20 for simple uart driver.

Changes from V2:
- Rebase to for-3.10/dt of Stephen's tegra tree.

 arch/arm/boot/dts/tegra114.dtsi |   27 +++++++++++++++++++++++----
 1 files changed, 23 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index ce44938..5a41d04 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -4,6 +4,13 @@
 	compatible = "nvidia,tegra114";
 	interrupt-parent = <&gic>;
 
+	aliases {
+		serial0 = &uarta;
+		serial1 = &uartb;
+		serial2 = &uartc;
+		serial3 = &uartd;
+	};
+
 	gic: interrupt-controller {
 		compatible = "arm,cortex-a15-gic";
 		#interrupt-cells = <3>;
@@ -98,35 +105,47 @@
 		       0x70003000 0x40c>;	/* Mux registers */
 	};
 
-	serial at 70006000 {
+	/*
+	 * There are two serial driver i.e. 8250 based simple serial
+	 * driver and APB DMA based serial driver for higher baudrate
+	 * and performace. To enable the 8250 based driver, the compatible
+	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
+	 * the APB DMA based serial driver, the comptible is
+	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
+	 */
+	uarta: serial at 70006000 {
 		compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
 		reg = <0x70006000 0x40>;
 		reg-shift = <2>;
 		interrupts = <0 36 0x04>;
+		nvidia,dma-request-selector = <&apbdma 8>;
 		status = "disabled";
 	};
 
-	serial at 70006040 {
+	uartb: serial at 70006040 {
 		compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
 		reg = <0x70006040 0x40>;
 		reg-shift = <2>;
 		interrupts = <0 37 0x04>;
+		nvidia,dma-request-selector = <&apbdma 9>;
 		status = "disabled";
 	};
 
-	serial at 70006200 {
+	uartc: serial at 70006200 {
 		compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
 		reg = <0x70006200 0x100>;
 		reg-shift = <2>;
 		interrupts = <0 46 0x04>;
+		nvidia,dma-request-selector = <&apbdma 10>;
 		status = "disabled";
 	};
 
-	serial at 70006300 {
+	uartd: serial at 70006300 {
 		compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
 		reg = <0x70006300 0x100>;
 		reg-shift = <2>;
 		interrupts = <0 90 0x04>;
+		nvidia,dma-request-selector = <&apbdma 19>;
 		status = "disabled";
 	};
 
-- 
1.7.1.1

[PATCH V3 4/5] ARM: tegra: add KBC nodes to Tegra114 DT

[Laxman Dewangan]

NVIDIA's Tegra114 SoCs have the matrix keyboard controller which
supports 11x8 type of matrix. The number of rows and columns
are configurable.

Add DT entry for KBC controller with compatibility as "nvidia,tegra114-kbc".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes from V1:
- Add compatible for kbc as nvidia,tegra114-kbc and nvidia,tegra20-kbc.

Changes from V2:
- Rebase to for-3.10/dt of Stephen's Tegra tree.
- Remove compatibilty of prev hardware as it has 11x8 matrix,

 arch/arm/boot/dts/tegra114.dtsi |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 5a41d04..d2bbfaf 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -218,6 +218,14 @@
 		interrupts = <0 2 0x04>;
 	};
 
+	kbc {
+		compatible = "nvidia,tegra114-kbc";
+		reg = <0x7000e200 0x100>;
+		interrupts = <0 85 0x04>;
+		clocks = <&tegra_car 36>;
+		status = "disabled";
+	};
+
 	pmc {
 		compatible = "nvidia,tegra114-pmc", "nvidia,tegra30-pmc";
 		reg = <0x7000e400 0x400>;
-- 
1.7.1.1

[PATCH V3 4/5] ARM: tegra: add KBC nodes to Tegra114 DT

[Laxman Dewangan]

NVIDIA's Tegra114 SoCs have the matrix keyboard controller which
supports 11x8 type of matrix. The number of rows and columns
are configurable.

Add DT entry for KBC controller with compatibility as "nvidia,tegra114-kbc".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes from V1:
- Add compatible for kbc as nvidia,tegra114-kbc and nvidia,tegra20-kbc.

Changes from V2:
- Rebase to for-3.10/dt of Stephen's Tegra tree.
- Remove compatibilty of prev hardware as it has 11x8 matrix,

 arch/arm/boot/dts/tegra114.dtsi |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 5a41d04..d2bbfaf 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -218,6 +218,14 @@
 		interrupts = <0 2 0x04>;
 	};
 
+	kbc {
+		compatible = "nvidia,tegra114-kbc";
+		reg = <0x7000e200 0x100>;
+		interrupts = <0 85 0x04>;
+		clocks = <&tegra_car 36>;
+		status = "disabled";
+	};
+
 	pmc {
 		compatible = "nvidia,tegra114-pmc", "nvidia,tegra30-pmc";
 		reg = <0x7000e400 0x400>;
-- 
1.7.1.1

[PATCH V3 4/5] ARM: tegra: add KBC nodes to Tegra114 DT

[Laxman Dewangan]

NVIDIA's Tegra114 SoCs have the matrix keyboard controller which
supports 11x8 type of matrix. The number of rows and columns
are configurable.

Add DT entry for KBC controller with compatibility as "nvidia,tegra114-kbc".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes from V1:
- Add compatible for kbc as nvidia,tegra114-kbc and nvidia,tegra20-kbc.

Changes from V2:
- Rebase to for-3.10/dt of Stephen's Tegra tree.
- Remove compatibilty of prev hardware as it has 11x8 matrix,

 arch/arm/boot/dts/tegra114.dtsi |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 5a41d04..d2bbfaf 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -218,6 +218,14 @@
 		interrupts = <0 2 0x04>;
 	};
 
+	kbc {
+		compatible = "nvidia,tegra114-kbc";
+		reg = <0x7000e200 0x100>;
+		interrupts = <0 85 0x04>;
+		clocks = <&tegra_car 36>;
+		status = "disabled";
+	};
+
 	pmc {
 		compatible = "nvidia,tegra114-pmc", "nvidia,tegra30-pmc";
 		reg = <0x7000e400 0x400>;
-- 
1.7.1.1

[PATCH V3 5/5] ARM: tegra: add spi nodes to Tegra114 DT

[Laxman Dewangan]

NVIDIA's Tegra114 has 6 spi controllers. These controllers are
redesign on T114 with different register interface.

Add DT entry for spi controllers and make it compatible with
"nvidia,tegra114-spi".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes from V1:
- None
Changes fro V2:
- Rebase  to for-3.10/dt of Stephen's Tegra tree.

 arch/arm/boot/dts/tegra114.dtsi |   72 +++++++++++++++++++++++++++++++++++++++
 1 files changed, 72 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index d2bbfaf..95c4369 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -212,6 +212,78 @@
 		clock-names = "div-clk";
 	};
 
+	spi@7000d400 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000d400 0x200>;
+		interrupts = <0 59 0x04>;
+		nvidia,dma-request-selector = <&apbdma 15>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 41>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi@7000d600 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000d600 0x200>;
+		interrupts = <0 82 0x04>;
+		nvidia,dma-request-selector = <&apbdma 16>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 44>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi@7000d800 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000d480 0x200>;
+		interrupts = <0 83 0x04>;
+		nvidia,dma-request-selector = <&apbdma 17>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 46>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi@7000da00 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000da00 0x200>;
+		interrupts = <0 93 0x04>;
+		nvidia,dma-request-selector = <&apbdma 18>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 68>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi@7000dc00 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000dc00 0x200>;
+		interrupts = <0 94 0x04>;
+		nvidia,dma-request-selector = <&apbdma 27>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 104>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi@7000de00 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000de00 0x200>;
+		interrupts = <0 79 0x04>;
+		nvidia,dma-request-selector = <&apbdma 28>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 105>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
 	rtc {
 		compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";
 		reg = <0x7000e000 0x100>;
-- 
1.7.1.1

[PATCH V3 5/5] ARM: tegra: add spi nodes to Tegra114 DT

[Laxman Dewangan]

NVIDIA's Tegra114 has 6 spi controllers. These controllers are
redesign on T114 with different register interface.

Add DT entry for spi controllers and make it compatible with
"nvidia,tegra114-spi".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes from V1:
- None
Changes fro V2:
- Rebase  to for-3.10/dt of Stephen's Tegra tree.

 arch/arm/boot/dts/tegra114.dtsi |   72 +++++++++++++++++++++++++++++++++++++++
 1 files changed, 72 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index d2bbfaf..95c4369 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -212,6 +212,78 @@
 		clock-names = "div-clk";
 	};
 
+	spi@7000d400 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000d400 0x200>;
+		interrupts = <0 59 0x04>;
+		nvidia,dma-request-selector = <&apbdma 15>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 41>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi@7000d600 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000d600 0x200>;
+		interrupts = <0 82 0x04>;
+		nvidia,dma-request-selector = <&apbdma 16>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 44>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi@7000d800 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000d480 0x200>;
+		interrupts = <0 83 0x04>;
+		nvidia,dma-request-selector = <&apbdma 17>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 46>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi@7000da00 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000da00 0x200>;
+		interrupts = <0 93 0x04>;
+		nvidia,dma-request-selector = <&apbdma 18>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 68>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi@7000dc00 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000dc00 0x200>;
+		interrupts = <0 94 0x04>;
+		nvidia,dma-request-selector = <&apbdma 27>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 104>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi@7000de00 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000de00 0x200>;
+		interrupts = <0 79 0x04>;
+		nvidia,dma-request-selector = <&apbdma 28>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 105>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
 	rtc {
 		compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";
 		reg = <0x7000e000 0x100>;
-- 
1.7.1.1

[PATCH V3 5/5] ARM: tegra: add spi nodes to Tegra114 DT

[Laxman Dewangan]

NVIDIA's Tegra114 has 6 spi controllers. These controllers are
redesign on T114 with different register interface.

Add DT entry for spi controllers and make it compatible with
"nvidia,tegra114-spi".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes from V1:
- None
Changes fro V2:
- Rebase  to for-3.10/dt of Stephen's Tegra tree.

 arch/arm/boot/dts/tegra114.dtsi |   72 +++++++++++++++++++++++++++++++++++++++
 1 files changed, 72 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index d2bbfaf..95c4369 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -212,6 +212,78 @@
 		clock-names = "div-clk";
 	};
 
+	spi at 7000d400 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000d400 0x200>;
+		interrupts = <0 59 0x04>;
+		nvidia,dma-request-selector = <&apbdma 15>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 41>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi at 7000d600 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000d600 0x200>;
+		interrupts = <0 82 0x04>;
+		nvidia,dma-request-selector = <&apbdma 16>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 44>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi at 7000d800 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000d480 0x200>;
+		interrupts = <0 83 0x04>;
+		nvidia,dma-request-selector = <&apbdma 17>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 46>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi at 7000da00 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000da00 0x200>;
+		interrupts = <0 93 0x04>;
+		nvidia,dma-request-selector = <&apbdma 18>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 68>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi at 7000dc00 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000dc00 0x200>;
+		interrupts = <0 94 0x04>;
+		nvidia,dma-request-selector = <&apbdma 27>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 104>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
+	spi at 7000de00 {
+		compatible = "nvidia,tegra114-spi";
+		reg = <0x7000de00 0x200>;
+		interrupts = <0 79 0x04>;
+		nvidia,dma-request-selector = <&apbdma 28>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&tegra_car 105>;
+		clock-names = "spi";
+		status = "disabled";
+	};
+
 	rtc {
 		compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";
 		reg = <0x7000e000 0x100>;
-- 
1.7.1.1

Re: [PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Stephen Warren]

On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
> Add APB DMA requestor and serial aliases for serial controller.
> There will be two serial driver i.e. 8250 based simple serial driver
> and APB DMA based serial driver for higher baudrate and performace.
> 
> The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".

> +	/*
> +	 * There are two serial driver i.e. 8250 based simple serial
> +	 * driver and APB DMA based serial driver for higher baudrate
> +	 * and performace. To enable the 8250 based driver, the compatible
> +	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
> +	 * the APB DMA based serial driver, the comptible is
> +	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
> +	 */

Again, that text says you want either of:

compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";

(note Tegra20-vs-Tegra30 in the second compatible value)

Why isn't it instead:

compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";

(note both second compatible values say Tegra20)

I assume this is a typo.

I suppose I can fix this up when I apply it to avoid a resend, assuming
it's wrong.

Re: [PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Stephen Warren]

On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
> Add APB DMA requestor and serial aliases for serial controller.
> There will be two serial driver i.e. 8250 based simple serial driver
> and APB DMA based serial driver for higher baudrate and performace.
> 
> The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".

> +	/*
> +	 * There are two serial driver i.e. 8250 based simple serial
> +	 * driver and APB DMA based serial driver for higher baudrate
> +	 * and performace. To enable the 8250 based driver, the compatible
> +	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
> +	 * the APB DMA based serial driver, the comptible is
> +	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
> +	 */

Again, that text says you want either of:

compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";

(note Tegra20-vs-Tegra30 in the second compatible value)

Why isn't it instead:

compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";

(note both second compatible values say Tegra20)

I assume this is a typo.

I suppose I can fix this up when I apply it to avoid a resend, assuming
it's wrong.

[PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Stephen Warren]

On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
> Add APB DMA requestor and serial aliases for serial controller.
> There will be two serial driver i.e. 8250 based simple serial driver
> and APB DMA based serial driver for higher baudrate and performace.
> 
> The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".

> +	/*
> +	 * There are two serial driver i.e. 8250 based simple serial
> +	 * driver and APB DMA based serial driver for higher baudrate
> +	 * and performace. To enable the 8250 based driver, the compatible
> +	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
> +	 * the APB DMA based serial driver, the comptible is
> +	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
> +	 */

Again, that text says you want either of:

compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";

(note Tegra20-vs-Tegra30 in the second compatible value)

Why isn't it instead:

compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";

(note both second compatible values say Tegra20)

I assume this is a typo.

I suppose I can fix this up when I apply it to avoid a resend, assuming
it's wrong.

Re: [PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Stephen Warren]

On 03/13/2013 02:02 PM, Stephen Warren wrote:
> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>> Add APB DMA requestor and serial aliases for serial controller.
>> There will be two serial driver i.e. 8250 based simple serial driver
>> and APB DMA based serial driver for higher baudrate and performace.
>>
>> The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
>> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
>> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
> 
>> +	/*
>> +	 * There are two serial driver i.e. 8250 based simple serial
>> +	 * driver and APB DMA based serial driver for higher baudrate
>> +	 * and performace. To enable the 8250 based driver, the compatible
>> +	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
>> +	 * the APB DMA based serial driver, the comptible is
>> +	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>> +	 */
> 
> Again, that text says you want either of:
> 
> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
> 
> (note Tegra20-vs-Tegra30 in the second compatible value)
> 
> Why isn't it instead:
> 
> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
> 
> (note both second compatible values say Tegra20)
> 
> I assume this is a typo.
> 
> I suppose I can fix this up when I apply it to avoid a resend, assuming
> it's wrong.

Since I haven't seen a reply to this, when I apply this, I'm going to
change the comment I quoted above to match the values I wrote above
under "why isn't it instead:".

Re: [PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Stephen Warren]

On 03/13/2013 02:02 PM, Stephen Warren wrote:
> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>> Add APB DMA requestor and serial aliases for serial controller.
>> There will be two serial driver i.e. 8250 based simple serial driver
>> and APB DMA based serial driver for higher baudrate and performace.
>>
>> The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
>> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
>> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
> 
>> +	/*
>> +	 * There are two serial driver i.e. 8250 based simple serial
>> +	 * driver and APB DMA based serial driver for higher baudrate
>> +	 * and performace. To enable the 8250 based driver, the compatible
>> +	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
>> +	 * the APB DMA based serial driver, the comptible is
>> +	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>> +	 */
> 
> Again, that text says you want either of:
> 
> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
> 
> (note Tegra20-vs-Tegra30 in the second compatible value)
> 
> Why isn't it instead:
> 
> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
> 
> (note both second compatible values say Tegra20)
> 
> I assume this is a typo.
> 
> I suppose I can fix this up when I apply it to avoid a resend, assuming
> it's wrong.

Since I haven't seen a reply to this, when I apply this, I'm going to
change the comment I quoted above to match the values I wrote above
under "why isn't it instead:".

[PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Stephen Warren]

On 03/13/2013 02:02 PM, Stephen Warren wrote:
> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>> Add APB DMA requestor and serial aliases for serial controller.
>> There will be two serial driver i.e. 8250 based simple serial driver
>> and APB DMA based serial driver for higher baudrate and performace.
>>
>> The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
>> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
>> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
> 
>> +	/*
>> +	 * There are two serial driver i.e. 8250 based simple serial
>> +	 * driver and APB DMA based serial driver for higher baudrate
>> +	 * and performace. To enable the 8250 based driver, the compatible
>> +	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
>> +	 * the APB DMA based serial driver, the comptible is
>> +	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>> +	 */
> 
> Again, that text says you want either of:
> 
> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
> 
> (note Tegra20-vs-Tegra30 in the second compatible value)
> 
> Why isn't it instead:
> 
> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
> 
> (note both second compatible values say Tegra20)
> 
> I assume this is a typo.
> 
> I suppose I can fix this up when I apply it to avoid a resend, assuming
> it's wrong.

Since I haven't seen a reply to this, when I apply this, I'm going to
change the comment I quoted above to match the values I wrote above
under "why isn't it instead:".

Re: [PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Laxman Dewangan]

On Friday 15 March 2013 11:56 PM, Stephen Warren wrote:
> On 03/13/2013 02:02 PM, Stephen Warren wrote:
>> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>>> Add APB DMA requestor and serial aliases for serial controller.
>>> There will be two serial driver i.e. 8250 based simple serial driver
>>> and APB DMA based serial driver for higher baudrate and performace.
>>>
>>> The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
>>> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
>>> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>> +	/*
>>> +	 * There are two serial driver i.e. 8250 based simple serial
>>> +	 * driver and APB DMA based serial driver for higher baudrate
>>> +	 * and performace. To enable the 8250 based driver, the compatible
>>> +	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
>>> +	 * the APB DMA based serial driver, the comptible is
>>> +	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>> +	 */
>> Again, that text says you want either of:
>>
>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
>>
>> (note Tegra20-vs-Tegra30 in the second compatible value)
>>
>> Why isn't it instead:
>>
>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
>>
>> (note both second compatible values say Tegra20)
>>
>> I assume this is a typo.
>>
>> I suppose I can fix this up when I apply it to avoid a resend, assuming
>> it's wrong.
> Since I haven't seen a reply to this, when I apply this, I'm going to
> change the comment I quoted above to match the values I wrote above
> under "why isn't it instead:".

Stephen,
Sorry, I missed your comment to reply.
I mean was that compatible should be
compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";

not

compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";


The reason is that, tegra30 has the clock divider in the CAR register 
set and it is 15.1 which gives more precise baudrate. tegra20 does not 
have the same.
Tegra114 also have the clock divider in the CAR register.

All SoCs UART support 16.0 clock divider inside the uart controller as 
DLL/DLM.

Simple uart driver use the uart clock divider and it is fine here.

High speed uart driver uses the car register driver for better 
flexibility and better resolution.

Re: [PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Laxman Dewangan]

On Friday 15 March 2013 11:56 PM, Stephen Warren wrote:
> On 03/13/2013 02:02 PM, Stephen Warren wrote:
>> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>>> Add APB DMA requestor and serial aliases for serial controller.
>>> There will be two serial driver i.e. 8250 based simple serial driver
>>> and APB DMA based serial driver for higher baudrate and performace.
>>>
>>> The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
>>> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
>>> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>> +	/*
>>> +	 * There are two serial driver i.e. 8250 based simple serial
>>> +	 * driver and APB DMA based serial driver for higher baudrate
>>> +	 * and performace. To enable the 8250 based driver, the compatible
>>> +	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
>>> +	 * the APB DMA based serial driver, the comptible is
>>> +	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>> +	 */
>> Again, that text says you want either of:
>>
>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
>>
>> (note Tegra20-vs-Tegra30 in the second compatible value)
>>
>> Why isn't it instead:
>>
>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
>>
>> (note both second compatible values say Tegra20)
>>
>> I assume this is a typo.
>>
>> I suppose I can fix this up when I apply it to avoid a resend, assuming
>> it's wrong.
> Since I haven't seen a reply to this, when I apply this, I'm going to
> change the comment I quoted above to match the values I wrote above
> under "why isn't it instead:".

Stephen,
Sorry, I missed your comment to reply.
I mean was that compatible should be
compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";

not

compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";


The reason is that, tegra30 has the clock divider in the CAR register 
set and it is 15.1 which gives more precise baudrate. tegra20 does not 
have the same.
Tegra114 also have the clock divider in the CAR register.

All SoCs UART support 16.0 clock divider inside the uart controller as 
DLL/DLM.

Simple uart driver use the uart clock divider and it is fine here.

High speed uart driver uses the car register driver for better 
flexibility and better resolution.

[PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Laxman Dewangan]

On Friday 15 March 2013 11:56 PM, Stephen Warren wrote:
> On 03/13/2013 02:02 PM, Stephen Warren wrote:
>> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>>> Add APB DMA requestor and serial aliases for serial controller.
>>> There will be two serial driver i.e. 8250 based simple serial driver
>>> and APB DMA based serial driver for higher baudrate and performace.
>>>
>>> The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
>>> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
>>> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>> +	/*
>>> +	 * There are two serial driver i.e. 8250 based simple serial
>>> +	 * driver and APB DMA based serial driver for higher baudrate
>>> +	 * and performace. To enable the 8250 based driver, the compatible
>>> +	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
>>> +	 * the APB DMA based serial driver, the comptible is
>>> +	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>> +	 */
>> Again, that text says you want either of:
>>
>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
>>
>> (note Tegra20-vs-Tegra30 in the second compatible value)
>>
>> Why isn't it instead:
>>
>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
>>
>> (note both second compatible values say Tegra20)
>>
>> I assume this is a typo.
>>
>> I suppose I can fix this up when I apply it to avoid a resend, assuming
>> it's wrong.
> Since I haven't seen a reply to this, when I apply this, I'm going to
> change the comment I quoted above to match the values I wrote above
> under "why isn't it instead:".

Stephen,
Sorry, I missed your comment to reply.
I mean was that compatible should be
compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";

not

compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";


The reason is that, tegra30 has the clock divider in the CAR register 
set and it is 15.1 which gives more precise baudrate. tegra20 does not 
have the same.
Tegra114 also have the clock divider in the CAR register.

All SoCs UART support 16.0 clock divider inside the uart controller as 
DLL/DLM.

Simple uart driver use the uart clock divider and it is fine here.

High speed uart driver uses the car register driver for better 
flexibility and better resolution.

Re: [PATCH V3 5/5] ARM: tegra: add spi nodes to Tegra114 DT

[Stephen Warren]

On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
> NVIDIA's Tegra114 has 6 spi controllers. These controllers are
> redesign on T114 with different register interface.

> diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi

> +		reg = <0x7000d400 0x200>;
...
> +		reg = <0x7000d600 0x200>;
...
> +		reg = <0x7000d480 0x200>;
...
> +		reg = <0x7000da00 0x200>;
...
> +		reg = <0x7000dc00 0x200>;
...
> +		reg = <0x7000de00 0x200>;

I assume that third entry should be 0x7000d800 not 0x7000d480; the TRM
certainly thinks so. I fixed this up when I applied this patch.

I've applied the series to Tegra's for-3.10/dt branch. I made a few
node/property ordering changes for consistency, and some capitalization
fixes in the commit subjects/descriptions.

Re: [PATCH V3 5/5] ARM: tegra: add spi nodes to Tegra114 DT

[Stephen Warren]

On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
> NVIDIA's Tegra114 has 6 spi controllers. These controllers are
> redesign on T114 with different register interface.

> diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi

> +		reg = <0x7000d400 0x200>;
...
> +		reg = <0x7000d600 0x200>;
...
> +		reg = <0x7000d480 0x200>;
...
> +		reg = <0x7000da00 0x200>;
...
> +		reg = <0x7000dc00 0x200>;
...
> +		reg = <0x7000de00 0x200>;

I assume that third entry should be 0x7000d800 not 0x7000d480; the TRM
certainly thinks so. I fixed this up when I applied this patch.

I've applied the series to Tegra's for-3.10/dt branch. I made a few
node/property ordering changes for consistency, and some capitalization
fixes in the commit subjects/descriptions.

[PATCH V3 5/5] ARM: tegra: add spi nodes to Tegra114 DT

[Stephen Warren]

On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
> NVIDIA's Tegra114 has 6 spi controllers. These controllers are
> redesign on T114 with different register interface.

> diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi

> +		reg = <0x7000d400 0x200>;
...
> +		reg = <0x7000d600 0x200>;
...
> +		reg = <0x7000d480 0x200>;
...
> +		reg = <0x7000da00 0x200>;
...
> +		reg = <0x7000dc00 0x200>;
...
> +		reg = <0x7000de00 0x200>;

I assume that third entry should be 0x7000d800 not 0x7000d480; the TRM
certainly thinks so. I fixed this up when I applied this patch.

I've applied the series to Tegra's for-3.10/dt branch. I made a few
node/property ordering changes for consistency, and some capitalization
fixes in the commit subjects/descriptions.

Re: [PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Laxman Dewangan]

On Friday 15 March 2013 11:56 PM, Stephen Warren wrote:
> On 03/13/2013 02:02 PM, Stephen Warren wrote:
>> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>>> Add APB DMA requestor and serial aliases for serial controller.
>>> There will be two serial driver i.e. 8250 based simple serial driver
>>> and APB DMA based serial driver for higher baudrate and performace.
>>>
>>> The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
>>> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
>>> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>> +	/*
>>> +	 * There are two serial driver i.e. 8250 based simple serial
>>> +	 * driver and APB DMA based serial driver for higher baudrate
>>> +	 * and performace. To enable the 8250 based driver, the compatible
>>> +	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
>>> +	 * the APB DMA based serial driver, the comptible is
>>> +	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>> +	 */
>> Again, that text says you want either of:
>>
>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
>>
>> (note Tegra20-vs-Tegra30 in the second compatible value)
>>
>> Why isn't it instead:
>>
>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
>>
>> (note both second compatible values say Tegra20)
>>
>> I assume this is a typo.
>>
>> I suppose I can fix this up when I apply it to avoid a resend, assuming
>> it's wrong.
> Since I haven't seen a reply to this, when I apply this, I'm going to
> change the comment I quoted above to match the values I wrote above
> under "why isn't it instead:".

Stephen,
Sorry, I missed your comment to reply.
I mean was that compatible should be
compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";

not

compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";


The reason is that, tegra30 has the clock divider in the CAR register 
set and it is 15.1 which gives more precise baudrate. tegra20 does not 
have the same.
Tegra114 also have the clock divider in the CAR register.

All SoCs UART support 16.0 clock divider inside the uart controller as 
DLL/DLM.

Simple uart driver use the uart clock divider and it is fine here.

High speed uart driver uses the car register driver for better 
flexibility and better resolution.

Re: [PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Laxman Dewangan]

On Friday 15 March 2013 11:56 PM, Stephen Warren wrote:
> On 03/13/2013 02:02 PM, Stephen Warren wrote:
>> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>>> Add APB DMA requestor and serial aliases for serial controller.
>>> There will be two serial driver i.e. 8250 based simple serial driver
>>> and APB DMA based serial driver for higher baudrate and performace.
>>>
>>> The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
>>> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
>>> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>> +	/*
>>> +	 * There are two serial driver i.e. 8250 based simple serial
>>> +	 * driver and APB DMA based serial driver for higher baudrate
>>> +	 * and performace. To enable the 8250 based driver, the compatible
>>> +	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
>>> +	 * the APB DMA based serial driver, the comptible is
>>> +	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>> +	 */
>> Again, that text says you want either of:
>>
>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
>>
>> (note Tegra20-vs-Tegra30 in the second compatible value)
>>
>> Why isn't it instead:
>>
>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
>>
>> (note both second compatible values say Tegra20)
>>
>> I assume this is a typo.
>>
>> I suppose I can fix this up when I apply it to avoid a resend, assuming
>> it's wrong.
> Since I haven't seen a reply to this, when I apply this, I'm going to
> change the comment I quoted above to match the values I wrote above
> under "why isn't it instead:".

Stephen,
Sorry, I missed your comment to reply.
I mean was that compatible should be
compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";

not

compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";


The reason is that, tegra30 has the clock divider in the CAR register 
set and it is 15.1 which gives more precise baudrate. tegra20 does not 
have the same.
Tegra114 also have the clock divider in the CAR register.

All SoCs UART support 16.0 clock divider inside the uart controller as 
DLL/DLM.

Simple uart driver use the uart clock divider and it is fine here.

High speed uart driver uses the car register driver for better 
flexibility and better resolution.

[PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Laxman Dewangan]

On Friday 15 March 2013 11:56 PM, Stephen Warren wrote:
> On 03/13/2013 02:02 PM, Stephen Warren wrote:
>> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>>> Add APB DMA requestor and serial aliases for serial controller.
>>> There will be two serial driver i.e. 8250 based simple serial driver
>>> and APB DMA based serial driver for higher baudrate and performace.
>>>
>>> The simple serial driver get enabled with compatible "nvidia,tegra114-uart",
>>> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
>>> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>> +	/*
>>> +	 * There are two serial driver i.e. 8250 based simple serial
>>> +	 * driver and APB DMA based serial driver for higher baudrate
>>> +	 * and performace. To enable the 8250 based driver, the compatible
>>> +	 * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
>>> +	 * the APB DMA based serial driver, the comptible is
>>> +	 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>> +	 */
>> Again, that text says you want either of:
>>
>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
>>
>> (note Tegra20-vs-Tegra30 in the second compatible value)
>>
>> Why isn't it instead:
>>
>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
>>
>> (note both second compatible values say Tegra20)
>>
>> I assume this is a typo.
>>
>> I suppose I can fix this up when I apply it to avoid a resend, assuming
>> it's wrong.
> Since I haven't seen a reply to this, when I apply this, I'm going to
> change the comment I quoted above to match the values I wrote above
> under "why isn't it instead:".

Stephen,
Sorry, I missed your comment to reply.
I mean was that compatible should be
compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";

not

compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";


The reason is that, tegra30 has the clock divider in the CAR register 
set and it is 15.1 which gives more precise baudrate. tegra20 does not 
have the same.
Tegra114 also have the clock divider in the CAR register.

All SoCs UART support 16.0 clock divider inside the uart controller as 
DLL/DLM.

Simple uart driver use the uart clock divider and it is fine here.

High speed uart driver uses the car register driver for better 
flexibility and better resolution.

Re: [PATCH V3 5/5] ARM: tegra: add spi nodes to Tegra114 DT

[Laxman Dewangan]

On Saturday 16 March 2013 12:12 AM, Stephen Warren wrote:
> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>> NVIDIA's Tegra114 has 6 spi controllers. These controllers are
>> redesign on T114 with different register interface.
>> diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
>> +		reg = <0x7000d400 0x200>;
> ...
>> +		reg = <0x7000d600 0x200>;
> ...
>> +		reg = <0x7000d480 0x200>;
> ...
>> +		reg = <0x7000da00 0x200>;
> ...
>> +		reg = <0x7000dc00 0x200>;
> ...
>> +		reg = <0x7000de00 0x200>;
> I assume that third entry should be 0x7000d800 not 0x7000d480; the TRM
> certainly thinks so. I fixed this up when I applied this patch.

Yes, this is bug in my patch and unfortunately exist in tegra20 and 
tegra30 also.

grep d480 tegra*
tegra114.dtsi:        reg = <0x7000d480 0x200>;
tegra20.dtsi:        reg = <0x7000d480 0x200>;
tegra30.dtsi:        reg = <0x7000d480 0x200>;

We need to fix this. I will post a patch now to correct it.


>
> I've applied the series to Tegra's for-3.10/dt branch. I made a few
> node/property ordering changes for consistency, and some capitalization
> fixes in the commit subjects/descriptions.

Thank you very much for taking care of this.

Re: [PATCH V3 5/5] ARM: tegra: add spi nodes to Tegra114 DT

[Laxman Dewangan]

On Saturday 16 March 2013 12:12 AM, Stephen Warren wrote:
> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>> NVIDIA's Tegra114 has 6 spi controllers. These controllers are
>> redesign on T114 with different register interface.
>> diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
>> +		reg = <0x7000d400 0x200>;
> ...
>> +		reg = <0x7000d600 0x200>;
> ...
>> +		reg = <0x7000d480 0x200>;
> ...
>> +		reg = <0x7000da00 0x200>;
> ...
>> +		reg = <0x7000dc00 0x200>;
> ...
>> +		reg = <0x7000de00 0x200>;
> I assume that third entry should be 0x7000d800 not 0x7000d480; the TRM
> certainly thinks so. I fixed this up when I applied this patch.

Yes, this is bug in my patch and unfortunately exist in tegra20 and 
tegra30 also.

grep d480 tegra*
tegra114.dtsi:        reg = <0x7000d480 0x200>;
tegra20.dtsi:        reg = <0x7000d480 0x200>;
tegra30.dtsi:        reg = <0x7000d480 0x200>;

We need to fix this. I will post a patch now to correct it.


>
> I've applied the series to Tegra's for-3.10/dt branch. I made a few
> node/property ordering changes for consistency, and some capitalization
> fixes in the commit subjects/descriptions.

Thank you very much for taking care of this.

[PATCH V3 5/5] ARM: tegra: add spi nodes to Tegra114 DT

[Laxman Dewangan]

On Saturday 16 March 2013 12:12 AM, Stephen Warren wrote:
> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>> NVIDIA's Tegra114 has 6 spi controllers. These controllers are
>> redesign on T114 with different register interface.
>> diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
>> +		reg = <0x7000d400 0x200>;
> ...
>> +		reg = <0x7000d600 0x200>;
> ...
>> +		reg = <0x7000d480 0x200>;
> ...
>> +		reg = <0x7000da00 0x200>;
> ...
>> +		reg = <0x7000dc00 0x200>;
> ...
>> +		reg = <0x7000de00 0x200>;
> I assume that third entry should be 0x7000d800 not 0x7000d480; the TRM
> certainly thinks so. I fixed this up when I applied this patch.

Yes, this is bug in my patch and unfortunately exist in tegra20 and 
tegra30 also.

grep d480 tegra*
tegra114.dtsi:        reg = <0x7000d480 0x200>;
tegra20.dtsi:        reg = <0x7000d480 0x200>;
tegra30.dtsi:        reg = <0x7000d480 0x200>;

We need to fix this. I will post a patch now to correct it.


>
> I've applied the series to Tegra's for-3.10/dt branch. I made a few
> node/property ordering changes for consistency, and some capitalization
> fixes in the commit subjects/descriptions.

Thank you very much for taking care of this.

Re: [PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Stephen Warren]

On 03/15/2013 12:42 PM, Laxman Dewangan wrote:
> On Friday 15 March 2013 11:56 PM, Stephen Warren wrote:
>> On 03/13/2013 02:02 PM, Stephen Warren wrote:
>>> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>>>> Add APB DMA requestor and serial aliases for serial controller.
>>>> There will be two serial driver i.e. 8250 based simple serial driver
>>>> and APB DMA based serial driver for higher baudrate and performace.
>>>>
>>>> The simple serial driver get enabled with compatible
>>>> "nvidia,tegra114-uart",
>>>> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
>>>> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>>> +    /*
>>>> +     * There are two serial driver i.e. 8250 based simple serial
>>>> +     * driver and APB DMA based serial driver for higher baudrate
>>>> +     * and performace. To enable the 8250 based driver, the compatible
>>>> +     * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
>>>> +     * the APB DMA based serial driver, the comptible is
>>>> +     * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>>> +     */
>>> Again, that text says you want either of:
>>>
>>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
>>>
>>> (note Tegra20-vs-Tegra30 in the second compatible value)
>>>
>>> Why isn't it instead:
>>>
>>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
>>>
>>> (note both second compatible values say Tegra20)
>>>
>>> I assume this is a typo.
>>>
>>> I suppose I can fix this up when I apply it to avoid a resend, assuming
>>> it's wrong.
>> Since I haven't seen a reply to this, when I apply this, I'm going to
>> change the comment I quoted above to match the values I wrote above
>> under "why isn't it instead:".
> 
> Stephen,
> Sorry, I missed your comment to reply.
> I mean was that compatible should be
> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
> 
> not
> 
> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
> 
> 
> The reason is that, tegra30 has the clock divider in the CAR register
> set and it is 15.1 which gives more precise baudrate. tegra20 does not
> have the same.
> Tegra114 also have the clock divider in the CAR register.
> 
> All SoCs UART support 16.0 clock divider inside the uart controller as
> DLL/DLM.
> 
> Simple uart driver use the uart clock divider and it is fine here.
> 
> High speed uart driver uses the car register driver for better
> flexibility and better resolution.

OK, so I see that Tegra30 has an enhancement over Tegra20. However,
given your description, that enhancement is optional; a driver could
simply continue to use /just/ the in-UART divider, and ignore the CAR
divider, and still work just fine, albeit with (entirely
backwards-compatible) less accuracy than it might achieve if it used the
new feature.

As such, I think it's correct to mark the device as actually being
compatible with all 3: 114 (precise HW model), 30 (base model w/ extra
divider), 20 (base model that's compatible, albeit ignoring extra features).

That might be a bit excessive though, so I guess I'll just go with the
values in your patch. It'd be a good idea if you could post a follow-on
patch that updates the DT binding to explain this, and then removes the
comments from *.dtsi since this really should be explained in the
binding document not the .dtsi files, I think.

At most, I'd expect to see the following in the .dtsi files:

These nodes can either be compatible with nvidia,tegra114-uart, or
nvidia,tegra114-hsuart. See the bindings for details of the difference.

Re: [PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Stephen Warren]

On 03/15/2013 12:42 PM, Laxman Dewangan wrote:
> On Friday 15 March 2013 11:56 PM, Stephen Warren wrote:
>> On 03/13/2013 02:02 PM, Stephen Warren wrote:
>>> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>>>> Add APB DMA requestor and serial aliases for serial controller.
>>>> There will be two serial driver i.e. 8250 based simple serial driver
>>>> and APB DMA based serial driver for higher baudrate and performace.
>>>>
>>>> The simple serial driver get enabled with compatible
>>>> "nvidia,tegra114-uart",
>>>> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
>>>> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>>> +    /*
>>>> +     * There are two serial driver i.e. 8250 based simple serial
>>>> +     * driver and APB DMA based serial driver for higher baudrate
>>>> +     * and performace. To enable the 8250 based driver, the compatible
>>>> +     * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
>>>> +     * the APB DMA based serial driver, the comptible is
>>>> +     * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>>> +     */
>>> Again, that text says you want either of:
>>>
>>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
>>>
>>> (note Tegra20-vs-Tegra30 in the second compatible value)
>>>
>>> Why isn't it instead:
>>>
>>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
>>>
>>> (note both second compatible values say Tegra20)
>>>
>>> I assume this is a typo.
>>>
>>> I suppose I can fix this up when I apply it to avoid a resend, assuming
>>> it's wrong.
>> Since I haven't seen a reply to this, when I apply this, I'm going to
>> change the comment I quoted above to match the values I wrote above
>> under "why isn't it instead:".
> 
> Stephen,
> Sorry, I missed your comment to reply.
> I mean was that compatible should be
> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
> 
> not
> 
> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
> 
> 
> The reason is that, tegra30 has the clock divider in the CAR register
> set and it is 15.1 which gives more precise baudrate. tegra20 does not
> have the same.
> Tegra114 also have the clock divider in the CAR register.
> 
> All SoCs UART support 16.0 clock divider inside the uart controller as
> DLL/DLM.
> 
> Simple uart driver use the uart clock divider and it is fine here.
> 
> High speed uart driver uses the car register driver for better
> flexibility and better resolution.

OK, so I see that Tegra30 has an enhancement over Tegra20. However,
given your description, that enhancement is optional; a driver could
simply continue to use /just/ the in-UART divider, and ignore the CAR
divider, and still work just fine, albeit with (entirely
backwards-compatible) less accuracy than it might achieve if it used the
new feature.

As such, I think it's correct to mark the device as actually being
compatible with all 3: 114 (precise HW model), 30 (base model w/ extra
divider), 20 (base model that's compatible, albeit ignoring extra features).

That might be a bit excessive though, so I guess I'll just go with the
values in your patch. It'd be a good idea if you could post a follow-on
patch that updates the DT binding to explain this, and then removes the
comments from *.dtsi since this really should be explained in the
binding document not the .dtsi files, I think.

At most, I'd expect to see the following in the .dtsi files:

These nodes can either be compatible with nvidia,tegra114-uart, or
nvidia,tegra114-hsuart. See the bindings for details of the difference.

[PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Stephen Warren]

On 03/15/2013 12:42 PM, Laxman Dewangan wrote:
> On Friday 15 March 2013 11:56 PM, Stephen Warren wrote:
>> On 03/13/2013 02:02 PM, Stephen Warren wrote:
>>> On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
>>>> Add APB DMA requestor and serial aliases for serial controller.
>>>> There will be two serial driver i.e. 8250 based simple serial driver
>>>> and APB DMA based serial driver for higher baudrate and performace.
>>>>
>>>> The simple serial driver get enabled with compatible
>>>> "nvidia,tegra114-uart",
>>>> "nvidia,tegra20-uart" and APB DMA based driver will get enabled with
>>>> compatible "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>>> +    /*
>>>> +     * There are two serial driver i.e. 8250 based simple serial
>>>> +     * driver and APB DMA based serial driver for higher baudrate
>>>> +     * and performace. To enable the 8250 based driver, the compatible
>>>> +     * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
>>>> +     * the APB DMA based serial driver, the comptible is
>>>> +     * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
>>>> +     */
>>> Again, that text says you want either of:
>>>
>>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
>>>
>>> (note Tegra20-vs-Tegra30 in the second compatible value)
>>>
>>> Why isn't it instead:
>>>
>>> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
>>> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
>>>
>>> (note both second compatible values say Tegra20)
>>>
>>> I assume this is a typo.
>>>
>>> I suppose I can fix this up when I apply it to avoid a resend, assuming
>>> it's wrong.
>> Since I haven't seen a reply to this, when I apply this, I'm going to
>> change the comment I quoted above to match the values I wrote above
>> under "why isn't it instead:".
> 
> Stephen,
> Sorry, I missed your comment to reply.
> I mean was that compatible should be
> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
> 
> not
> 
> compatible = "nvidia,tegra114-uart",   "nvidia,tegra20-uart";
> compatible = "nvidia,tegra114-hsuart", "nvidia,tegra20-hsuart";
> 
> 
> The reason is that, tegra30 has the clock divider in the CAR register
> set and it is 15.1 which gives more precise baudrate. tegra20 does not
> have the same.
> Tegra114 also have the clock divider in the CAR register.
> 
> All SoCs UART support 16.0 clock divider inside the uart controller as
> DLL/DLM.
> 
> Simple uart driver use the uart clock divider and it is fine here.
> 
> High speed uart driver uses the car register driver for better
> flexibility and better resolution.

OK, so I see that Tegra30 has an enhancement over Tegra20. However,
given your description, that enhancement is optional; a driver could
simply continue to use /just/ the in-UART divider, and ignore the CAR
divider, and still work just fine, albeit with (entirely
backwards-compatible) less accuracy than it might achieve if it used the
new feature.

As such, I think it's correct to mark the device as actually being
compatible with all 3: 114 (precise HW model), 30 (base model w/ extra
divider), 20 (base model that's compatible, albeit ignoring extra features).

That might be a bit excessive though, so I guess I'll just go with the
values in your patch. It'd be a good idea if you could post a follow-on
patch that updates the DT binding to explain this, and then removes the
comments from *.dtsi since this really should be explained in the
binding document not the .dtsi files, I think.

At most, I'd expect to see the following in the .dtsi files:

These nodes can either be compatible with nvidia,tegra114-uart, or
nvidia,tegra114-hsuart. See the bindings for details of the difference.

Re: [PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Laxman Dewangan]

On Saturday 16 March 2013 12:28 AM, Stephen Warren wrote:
> On 03/15/2013 12:42 PM, Laxman Dewangan wrote:
>>
>>
>>
>> Simple uart driver use the uart clock divider and it is fine here.
>>
>> High speed uart driver uses the car register driver for better
>> flexibility and better resolution.
> OK, so I see that Tegra30 has an enhancement over Tegra20. However,
> given your description, that enhancement is optional; a driver could
> simply continue to use /just/ the in-UART divider, and ignore the CAR
> divider, and still work just fine, albeit with (entirely
> backwards-compatible) less accuracy than it might achieve if it used the
> new feature.
>
> As such, I think it's correct to mark the device as actually being
> compatible with all 3: 114 (precise HW model), 30 (base model w/ extra
> divider), 20 (base model that's compatible, albeit ignoring extra features).
>
> That might be a bit excessive though, so I guess I'll just go with the
> values in your patch. It'd be a good idea if you could post a follow-on
> patch that updates the DT binding to explain this, and then removes the
> comments from *.dtsi since this really should be explained in the
> binding document not the .dtsi files, I think.
>
> At most, I'd expect to see the following in the .dtsi files:
>
> These nodes can either be compatible with nvidia,tegra114-uart, or
> nvidia,tegra114-hsuart. See the bindings for details of the difference.

Sure, I will post a patch for this.

Re: [PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Laxman Dewangan]

On Saturday 16 March 2013 12:28 AM, Stephen Warren wrote:
> On 03/15/2013 12:42 PM, Laxman Dewangan wrote:
>>
>>
>>
>> Simple uart driver use the uart clock divider and it is fine here.
>>
>> High speed uart driver uses the car register driver for better
>> flexibility and better resolution.
> OK, so I see that Tegra30 has an enhancement over Tegra20. However,
> given your description, that enhancement is optional; a driver could
> simply continue to use /just/ the in-UART divider, and ignore the CAR
> divider, and still work just fine, albeit with (entirely
> backwards-compatible) less accuracy than it might achieve if it used the
> new feature.
>
> As such, I think it's correct to mark the device as actually being
> compatible with all 3: 114 (precise HW model), 30 (base model w/ extra
> divider), 20 (base model that's compatible, albeit ignoring extra features).
>
> That might be a bit excessive though, so I guess I'll just go with the
> values in your patch. It'd be a good idea if you could post a follow-on
> patch that updates the DT binding to explain this, and then removes the
> comments from *.dtsi since this really should be explained in the
> binding document not the .dtsi files, I think.
>
> At most, I'd expect to see the following in the .dtsi files:
>
> These nodes can either be compatible with nvidia,tegra114-uart, or
> nvidia,tegra114-hsuart. See the bindings for details of the difference.

Sure, I will post a patch for this.

[PATCH V3 3/5] ARM: tegra:add aliases and DMA requestor for serial nodes of Tegra114

[Laxman Dewangan]

On Saturday 16 March 2013 12:28 AM, Stephen Warren wrote:
> On 03/15/2013 12:42 PM, Laxman Dewangan wrote:
>>
>>
>>
>> Simple uart driver use the uart clock divider and it is fine here.
>>
>> High speed uart driver uses the car register driver for better
>> flexibility and better resolution.
> OK, so I see that Tegra30 has an enhancement over Tegra20. However,
> given your description, that enhancement is optional; a driver could
> simply continue to use /just/ the in-UART divider, and ignore the CAR
> divider, and still work just fine, albeit with (entirely
> backwards-compatible) less accuracy than it might achieve if it used the
> new feature.
>
> As such, I think it's correct to mark the device as actually being
> compatible with all 3: 114 (precise HW model), 30 (base model w/ extra
> divider), 20 (base model that's compatible, albeit ignoring extra features).
>
> That might be a bit excessive though, so I guess I'll just go with the
> values in your patch. It'd be a good idea if you could post a follow-on
> patch that updates the DT binding to explain this, and then removes the
> comments from *.dtsi since this really should be explained in the
> binding document not the .dtsi files, I think.
>
> At most, I'd expect to see the following in the .dtsi files:
>
> These nodes can either be compatible with nvidia,tegra114-uart, or
> nvidia,tegra114-hsuart. See the bindings for details of the difference.

Sure, I will post a patch for this.