* [Intel-gfx] [PATCH i-g-t v3] tests/prime_vgem: Examine blitter access path @ 2020-02-04 11:41 ` Janusz Krzysztofik 0 siblings, 0 replies; 11+ messages in thread From: Janusz Krzysztofik @ 2020-02-04 11:41 UTC (permalink / raw) To: igt-dev; +Cc: Daniel Vetter, intel-gfx On future hardware with missing GGTT BAR we won't be able to exercise dma-buf access via that path. An alternative to basic-gtt subtest for testing dma-buf access is required, as well as basic-fence-mmap and coherency-gtt subtest alternatives for testing WC coherency. Access to the dma sg list feature exposed by dma-buf can be tested through blitter. Unfortunately we don't have any equivalently simple tests that use blitter. Provide them. XY_SRC_COPY_BLT method implemented by igt_blitter_src_copy() IGT library helper has been chosen. v2: As fast copy is not supported on platforms older than Gen 9, use XY_SRC_COPY instead (Chris), - add subtest descriptions. v3: Don't calculate the pitch, use scratch.pitch returned by vgem_create() (Chris), - replace constants with values from respective fields of scratch (Chris), - use _u32 variant of igt_assert_eq() for better readability of possible error messages (Chris), - sleep a bit to emphasize that the only thing stopping the blitter is the fence (Chris), - use prime_sync_start/end() as the recommended practice for inter-device sync, not gem_sync() (Chris), - update the name of used XY_SRC_COPY_BLT helper to match the name of its library version just merged. Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> --- Hi Chris, I hope I've understood and addressed your comments correctly so your R-b still applies. Thanks, Janusz tests/prime_vgem.c | 187 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 187 insertions(+) diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c index 3bdb23007..96c527287 100644 --- a/tests/prime_vgem.c +++ b/tests/prime_vgem.c @@ -28,6 +28,8 @@ #include <sys/poll.h> #include <time.h> +#include "intel_batchbuffer.h" /* igt_blitter_src_copy() */ + IGT_TEST_DESCRIPTION("Basic check of polling for prime/vgem fences."); static void test_read(int vgem, int i915) @@ -181,6 +183,79 @@ static void test_fence_mmap(int i915, int vgem) close(slave[1]); } +static void test_fence_blt(int i915, int vgem) +{ + struct vgem_bo scratch; + uint32_t prime; + uint32_t *ptr; + uint32_t fence; + int dmabuf, i; + int master[2], slave[2]; + + igt_assert(pipe(master) == 0); + igt_assert(pipe(slave) == 0); + + scratch.width = 1024; + scratch.height = 1024; + scratch.bpp = 32; + vgem_create(vgem, &scratch); + + dmabuf = prime_handle_to_fd(vgem, scratch.handle); + prime = prime_fd_to_handle(i915, dmabuf); + close(dmabuf); + + igt_fork(child, 1) { + uint32_t native; + + close(master[0]); + close(slave[1]); + + native = gem_create(i915, scratch.size); + + ptr = gem_mmap__wc(i915, native, 0, scratch.size, PROT_READ); + for (i = 0; i < scratch.height; i++) + igt_assert_eq_u32(ptr[scratch.pitch * i / sizeof(*ptr)], + 0); + + write(master[1], &child, sizeof(child)); + read(slave[0], &child, sizeof(child)); + + igt_blitter_src_copy(i915, prime, 0, scratch.pitch, + I915_TILING_NONE, 0, 0, scratch.width, + scratch.height, scratch.bpp, native, 0, + scratch.pitch, I915_TILING_NONE, 0, 0); + gem_sync(i915, native); + + for (i = 0; i < scratch.height; i++) + igt_assert_eq_u32(ptr[scratch.pitch * i / sizeof(*ptr)], + i); + + munmap(ptr, scratch.size); + gem_close(i915, native); + gem_close(i915, prime); + } + + close(master[1]); + close(slave[0]); + read(master[0], &i, sizeof(i)); + fence = vgem_fence_attach(vgem, &scratch, VGEM_FENCE_WRITE); + write(slave[1], &i, sizeof(i)); + + /* Emphasize that the only thing stopping the blitter is the fence */ + usleep(50*1000); + + ptr = vgem_mmap(vgem, &scratch, PROT_WRITE); + for (i = 0; i < scratch.height; i++) + ptr[scratch.pitch * i / sizeof(*ptr)] = i; + munmap(ptr, scratch.size); + vgem_fence_signal(vgem, fence); + gem_close(vgem, scratch.handle); + + igt_waitchildren(); + close(master[0]); + close(slave[1]); +} + static void test_write(int vgem, int i915) { struct vgem_bo scratch; @@ -249,6 +324,57 @@ static void test_gtt(int vgem, int i915) gem_close(vgem, scratch.handle); } +static void test_blt(int vgem, int i915) +{ + struct vgem_bo scratch; + uint32_t prime, native; + uint32_t *ptr; + int dmabuf, i; + + scratch.width = 1024; + scratch.height = 1024; + scratch.bpp = 32; + vgem_create(vgem, &scratch); + + dmabuf = prime_handle_to_fd(vgem, scratch.handle); + prime = prime_fd_to_handle(i915, dmabuf); + + native = gem_create(i915, scratch.size); + + ptr = gem_mmap__wc(i915, native, 0, scratch.size, PROT_WRITE); + for (i = 0; i < scratch.height; i++) + ptr[scratch.pitch * i / sizeof(*ptr)] = i; + munmap(ptr, scratch.size); + + igt_blitter_src_copy(i915, native, 0, scratch.pitch, I915_TILING_NONE, + 0, 0, scratch.width, scratch.height, scratch.bpp, + prime, 0, scratch.pitch, I915_TILING_NONE, 0, 0); + prime_sync_start(dmabuf, true); + prime_sync_end(dmabuf, true); + close(dmabuf); + + ptr = vgem_mmap(vgem, &scratch, PROT_READ | PROT_WRITE); + for (i = 0; i < scratch.height; i++) { + igt_assert_eq_u32(ptr[scratch.pitch * i / sizeof(*ptr)], i); + ptr[scratch.pitch * i / sizeof(*ptr)] = ~i; + } + munmap(ptr, scratch.size); + + igt_blitter_src_copy(i915, prime, 0, scratch.pitch, I915_TILING_NONE, + 0, 0, scratch.width, scratch.height, scratch.bpp, + native, 0, scratch.pitch, I915_TILING_NONE, 0, 0); + gem_sync(i915, native); + + ptr = gem_mmap__wc(i915, native, 0, scratch.size, PROT_READ); + for (i = 0; i < scratch.height; i++) + igt_assert_eq_u32(ptr[scratch.pitch * i / sizeof(*ptr)], ~i); + munmap(ptr, scratch.size); + + gem_close(i915, native); + gem_close(i915, prime); + gem_close(vgem, scratch.handle); +} + static void test_shrink(int vgem, int i915) { struct vgem_bo scratch = { @@ -332,6 +458,56 @@ static void test_gtt_interleaved(int vgem, int i915) gem_close(vgem, scratch.handle); } +static void test_blt_interleaved(int vgem, int i915) +{ + struct vgem_bo scratch; + uint32_t prime, native; + uint32_t *foreign, *local; + int dmabuf, i; + + scratch.width = 1024; + scratch.height = 1024; + scratch.bpp = 32; + vgem_create(vgem, &scratch); + + dmabuf = prime_handle_to_fd(vgem, scratch.handle); + prime = prime_fd_to_handle(i915, dmabuf); + + native = gem_create(i915, scratch.size); + + foreign = vgem_mmap(vgem, &scratch, PROT_WRITE); + local = gem_mmap__wc(i915, native, 0, scratch.size, PROT_WRITE); + + for (i = 0; i < scratch.height; i++) { + local[scratch.pitch * i / sizeof(*local)] = i; + igt_blitter_src_copy(i915, native, 0, scratch.pitch, + I915_TILING_NONE, 0, i, scratch.width, 1, + scratch.bpp, prime, 0, scratch.pitch, + I915_TILING_NONE, 0, i); + prime_sync_start(dmabuf, true); + prime_sync_end(dmabuf, true); + igt_assert_eq_u32(foreign[scratch.pitch * i / sizeof(*foreign)], + i); + + foreign[scratch.pitch * i / sizeof(*foreign)] = ~i; + igt_blitter_src_copy(i915, prime, 0, scratch.pitch, + I915_TILING_NONE, 0, i, scratch.width, 1, + scratch.bpp, native, 0, scratch.pitch, + I915_TILING_NONE, 0, i); + gem_sync(i915, native); + igt_assert_eq_u32(local[scratch.pitch * i / sizeof(*local)], + ~i); + } + close(dmabuf); + + munmap(local, scratch.size); + munmap(foreign, scratch.size); + + gem_close(i915, native); + gem_close(i915, prime); + gem_close(vgem, scratch.handle); +} + static bool prime_busy(int fd, bool excl) { struct pollfd pfd = { .fd = fd, .events = excl ? POLLOUT : POLLIN }; @@ -849,12 +1025,20 @@ igt_main igt_subtest("basic-gtt") test_gtt(vgem, i915); + igt_describe("Examine blitter access path"); + igt_subtest("basic-blt") + test_blt(vgem, i915); + igt_subtest("shrink") test_shrink(vgem, i915); igt_subtest("coherency-gtt") test_gtt_interleaved(vgem, i915); + igt_describe("Examine blitter access path WC coherency"); + igt_subtest("coherency-blt") + test_blt_interleaved(vgem, i915); + for (e = intel_execution_engines; e->name; e++) { igt_subtest_f("%ssync-%s", e->exec_id == 0 ? "basic-" : "", @@ -904,6 +1088,9 @@ igt_main test_fence_read(i915, vgem); igt_subtest("basic-fence-mmap") test_fence_mmap(i915, vgem); + igt_describe("Examine blitter access path fencing"); + igt_subtest("basic-fence-blt") + test_fence_blt(i915, vgem); for (e = intel_execution_engines; e->name; e++) { igt_subtest_f("%sfence-wait-%s", -- 2.21.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [igt-dev] [PATCH i-g-t v3] tests/prime_vgem: Examine blitter access path @ 2020-02-04 11:41 ` Janusz Krzysztofik 0 siblings, 0 replies; 11+ messages in thread From: Janusz Krzysztofik @ 2020-02-04 11:41 UTC (permalink / raw) To: igt-dev; +Cc: intel-gfx On future hardware with missing GGTT BAR we won't be able to exercise dma-buf access via that path. An alternative to basic-gtt subtest for testing dma-buf access is required, as well as basic-fence-mmap and coherency-gtt subtest alternatives for testing WC coherency. Access to the dma sg list feature exposed by dma-buf can be tested through blitter. Unfortunately we don't have any equivalently simple tests that use blitter. Provide them. XY_SRC_COPY_BLT method implemented by igt_blitter_src_copy() IGT library helper has been chosen. v2: As fast copy is not supported on platforms older than Gen 9, use XY_SRC_COPY instead (Chris), - add subtest descriptions. v3: Don't calculate the pitch, use scratch.pitch returned by vgem_create() (Chris), - replace constants with values from respective fields of scratch (Chris), - use _u32 variant of igt_assert_eq() for better readability of possible error messages (Chris), - sleep a bit to emphasize that the only thing stopping the blitter is the fence (Chris), - use prime_sync_start/end() as the recommended practice for inter-device sync, not gem_sync() (Chris), - update the name of used XY_SRC_COPY_BLT helper to match the name of its library version just merged. Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> --- Hi Chris, I hope I've understood and addressed your comments correctly so your R-b still applies. Thanks, Janusz tests/prime_vgem.c | 187 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 187 insertions(+) diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c index 3bdb23007..96c527287 100644 --- a/tests/prime_vgem.c +++ b/tests/prime_vgem.c @@ -28,6 +28,8 @@ #include <sys/poll.h> #include <time.h> +#include "intel_batchbuffer.h" /* igt_blitter_src_copy() */ + IGT_TEST_DESCRIPTION("Basic check of polling for prime/vgem fences."); static void test_read(int vgem, int i915) @@ -181,6 +183,79 @@ static void test_fence_mmap(int i915, int vgem) close(slave[1]); } +static void test_fence_blt(int i915, int vgem) +{ + struct vgem_bo scratch; + uint32_t prime; + uint32_t *ptr; + uint32_t fence; + int dmabuf, i; + int master[2], slave[2]; + + igt_assert(pipe(master) == 0); + igt_assert(pipe(slave) == 0); + + scratch.width = 1024; + scratch.height = 1024; + scratch.bpp = 32; + vgem_create(vgem, &scratch); + + dmabuf = prime_handle_to_fd(vgem, scratch.handle); + prime = prime_fd_to_handle(i915, dmabuf); + close(dmabuf); + + igt_fork(child, 1) { + uint32_t native; + + close(master[0]); + close(slave[1]); + + native = gem_create(i915, scratch.size); + + ptr = gem_mmap__wc(i915, native, 0, scratch.size, PROT_READ); + for (i = 0; i < scratch.height; i++) + igt_assert_eq_u32(ptr[scratch.pitch * i / sizeof(*ptr)], + 0); + + write(master[1], &child, sizeof(child)); + read(slave[0], &child, sizeof(child)); + + igt_blitter_src_copy(i915, prime, 0, scratch.pitch, + I915_TILING_NONE, 0, 0, scratch.width, + scratch.height, scratch.bpp, native, 0, + scratch.pitch, I915_TILING_NONE, 0, 0); + gem_sync(i915, native); + + for (i = 0; i < scratch.height; i++) + igt_assert_eq_u32(ptr[scratch.pitch * i / sizeof(*ptr)], + i); + + munmap(ptr, scratch.size); + gem_close(i915, native); + gem_close(i915, prime); + } + + close(master[1]); + close(slave[0]); + read(master[0], &i, sizeof(i)); + fence = vgem_fence_attach(vgem, &scratch, VGEM_FENCE_WRITE); + write(slave[1], &i, sizeof(i)); + + /* Emphasize that the only thing stopping the blitter is the fence */ + usleep(50*1000); + + ptr = vgem_mmap(vgem, &scratch, PROT_WRITE); + for (i = 0; i < scratch.height; i++) + ptr[scratch.pitch * i / sizeof(*ptr)] = i; + munmap(ptr, scratch.size); + vgem_fence_signal(vgem, fence); + gem_close(vgem, scratch.handle); + + igt_waitchildren(); + close(master[0]); + close(slave[1]); +} + static void test_write(int vgem, int i915) { struct vgem_bo scratch; @@ -249,6 +324,57 @@ static void test_gtt(int vgem, int i915) gem_close(vgem, scratch.handle); } +static void test_blt(int vgem, int i915) +{ + struct vgem_bo scratch; + uint32_t prime, native; + uint32_t *ptr; + int dmabuf, i; + + scratch.width = 1024; + scratch.height = 1024; + scratch.bpp = 32; + vgem_create(vgem, &scratch); + + dmabuf = prime_handle_to_fd(vgem, scratch.handle); + prime = prime_fd_to_handle(i915, dmabuf); + + native = gem_create(i915, scratch.size); + + ptr = gem_mmap__wc(i915, native, 0, scratch.size, PROT_WRITE); + for (i = 0; i < scratch.height; i++) + ptr[scratch.pitch * i / sizeof(*ptr)] = i; + munmap(ptr, scratch.size); + + igt_blitter_src_copy(i915, native, 0, scratch.pitch, I915_TILING_NONE, + 0, 0, scratch.width, scratch.height, scratch.bpp, + prime, 0, scratch.pitch, I915_TILING_NONE, 0, 0); + prime_sync_start(dmabuf, true); + prime_sync_end(dmabuf, true); + close(dmabuf); + + ptr = vgem_mmap(vgem, &scratch, PROT_READ | PROT_WRITE); + for (i = 0; i < scratch.height; i++) { + igt_assert_eq_u32(ptr[scratch.pitch * i / sizeof(*ptr)], i); + ptr[scratch.pitch * i / sizeof(*ptr)] = ~i; + } + munmap(ptr, scratch.size); + + igt_blitter_src_copy(i915, prime, 0, scratch.pitch, I915_TILING_NONE, + 0, 0, scratch.width, scratch.height, scratch.bpp, + native, 0, scratch.pitch, I915_TILING_NONE, 0, 0); + gem_sync(i915, native); + + ptr = gem_mmap__wc(i915, native, 0, scratch.size, PROT_READ); + for (i = 0; i < scratch.height; i++) + igt_assert_eq_u32(ptr[scratch.pitch * i / sizeof(*ptr)], ~i); + munmap(ptr, scratch.size); + + gem_close(i915, native); + gem_close(i915, prime); + gem_close(vgem, scratch.handle); +} + static void test_shrink(int vgem, int i915) { struct vgem_bo scratch = { @@ -332,6 +458,56 @@ static void test_gtt_interleaved(int vgem, int i915) gem_close(vgem, scratch.handle); } +static void test_blt_interleaved(int vgem, int i915) +{ + struct vgem_bo scratch; + uint32_t prime, native; + uint32_t *foreign, *local; + int dmabuf, i; + + scratch.width = 1024; + scratch.height = 1024; + scratch.bpp = 32; + vgem_create(vgem, &scratch); + + dmabuf = prime_handle_to_fd(vgem, scratch.handle); + prime = prime_fd_to_handle(i915, dmabuf); + + native = gem_create(i915, scratch.size); + + foreign = vgem_mmap(vgem, &scratch, PROT_WRITE); + local = gem_mmap__wc(i915, native, 0, scratch.size, PROT_WRITE); + + for (i = 0; i < scratch.height; i++) { + local[scratch.pitch * i / sizeof(*local)] = i; + igt_blitter_src_copy(i915, native, 0, scratch.pitch, + I915_TILING_NONE, 0, i, scratch.width, 1, + scratch.bpp, prime, 0, scratch.pitch, + I915_TILING_NONE, 0, i); + prime_sync_start(dmabuf, true); + prime_sync_end(dmabuf, true); + igt_assert_eq_u32(foreign[scratch.pitch * i / sizeof(*foreign)], + i); + + foreign[scratch.pitch * i / sizeof(*foreign)] = ~i; + igt_blitter_src_copy(i915, prime, 0, scratch.pitch, + I915_TILING_NONE, 0, i, scratch.width, 1, + scratch.bpp, native, 0, scratch.pitch, + I915_TILING_NONE, 0, i); + gem_sync(i915, native); + igt_assert_eq_u32(local[scratch.pitch * i / sizeof(*local)], + ~i); + } + close(dmabuf); + + munmap(local, scratch.size); + munmap(foreign, scratch.size); + + gem_close(i915, native); + gem_close(i915, prime); + gem_close(vgem, scratch.handle); +} + static bool prime_busy(int fd, bool excl) { struct pollfd pfd = { .fd = fd, .events = excl ? POLLOUT : POLLIN }; @@ -849,12 +1025,20 @@ igt_main igt_subtest("basic-gtt") test_gtt(vgem, i915); + igt_describe("Examine blitter access path"); + igt_subtest("basic-blt") + test_blt(vgem, i915); + igt_subtest("shrink") test_shrink(vgem, i915); igt_subtest("coherency-gtt") test_gtt_interleaved(vgem, i915); + igt_describe("Examine blitter access path WC coherency"); + igt_subtest("coherency-blt") + test_blt_interleaved(vgem, i915); + for (e = intel_execution_engines; e->name; e++) { igt_subtest_f("%ssync-%s", e->exec_id == 0 ? "basic-" : "", @@ -904,6 +1088,9 @@ igt_main test_fence_read(i915, vgem); igt_subtest("basic-fence-mmap") test_fence_mmap(i915, vgem); + igt_describe("Examine blitter access path fencing"); + igt_subtest("basic-fence-blt") + test_fence_blt(i915, vgem); for (e = intel_execution_engines; e->name; e++) { igt_subtest_f("%sfence-wait-%s", -- 2.21.0 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [igt-dev] ✗ Fi.CI.BAT: failure for tests/prime_vgem: Examine blitter access path (rev2) 2020-02-04 11:41 ` [igt-dev] " Janusz Krzysztofik (?) @ 2020-02-04 16:23 ` Patchwork -1 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2020-02-04 16:23 UTC (permalink / raw) To: Janusz Krzysztofik; +Cc: igt-dev == Series Details == Series: tests/prime_vgem: Examine blitter access path (rev2) URL : https://patchwork.freedesktop.org/series/71823/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7864 -> IGTPW_4091 ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_4091 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_4091, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/index.html Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_4091: ### IGT changes ### #### Possible regressions #### * igt@kms_flip@basic-flip-vs-dpms: - fi-skl-6770hq: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-dpms.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-dpms.html Known issues ------------ Here are the changes found in IGTPW_4091 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_parallel@fds: - fi-byt-n2820: [PASS][3] -> [FAIL][4] ([i915#694]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-byt-n2820/igt@gem_exec_parallel@fds.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-byt-n2820/igt@gem_exec_parallel@fds.html * igt@gem_exec_suspend@basic-s4-devices: - fi-tgl-y: [PASS][5] -> [FAIL][6] ([CI#94]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html * igt@i915_selftest@live_blt: - fi-ivb-3770: [PASS][7] -> [DMESG-FAIL][8] ([i915#725]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-ivb-3770/igt@i915_selftest@live_blt.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-ivb-3770/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_gem_contexts: - fi-cfl-8700k: [PASS][9] -> [INCOMPLETE][10] ([CI#80] / [i915#424]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html - fi-cfl-guc: [PASS][11] -> [INCOMPLETE][12] ([fdo#106070] / [i915#424]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [PASS][13] -> [FAIL][14] ([fdo#111407]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html * igt@prime_self_import@basic-with_one_bo: - fi-tgl-y: [PASS][15] -> [DMESG-WARN][16] ([CI#94] / [i915#402]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-tgl-y/igt@prime_self_import@basic-with_one_bo.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-tgl-y/igt@prime_self_import@basic-with_one_bo.html #### Possible fixes #### * igt@i915_selftest@live_blt: - fi-hsw-4770: [DMESG-FAIL][17] ([i915#725]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-hsw-4770/igt@i915_selftest@live_blt.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-hsw-4770/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_gem_contexts: - fi-byt-j1900: [DMESG-FAIL][19] ([i915#1052]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html * igt@i915_selftest@live_gtt: - fi-skl-6600u: [TIMEOUT][21] ([fdo#111732] / [fdo#112271]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-skl-6600u/igt@i915_selftest@live_gtt.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-skl-6600u/igt@i915_selftest@live_gtt.html * igt@i915_selftest@live_perf: - fi-apl-guc: [INCOMPLETE][23] ([fdo#103927]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-apl-guc/igt@i915_selftest@live_perf.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-apl-guc/igt@i915_selftest@live_perf.html * igt@prime_self_import@basic-llseek-bad: - fi-tgl-y: [DMESG-WARN][25] ([CI#94] / [i915#402]) -> [PASS][26] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-tgl-y/igt@prime_self_import@basic-llseek-bad.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-tgl-y/igt@prime_self_import@basic-llseek-bad.html #### Warnings #### * igt@gem_exec_parallel@contexts: - fi-byt-j1900: [TIMEOUT][27] ([fdo#112271] / [i915#1084]) -> [FAIL][28] ([i915#694]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-byt-j1900/igt@gem_exec_parallel@contexts.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-byt-j1900/igt@gem_exec_parallel@contexts.html - fi-byt-n2820: [TIMEOUT][29] ([fdo#112271]) -> [FAIL][30] ([i915#694]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-byt-n2820/igt@gem_exec_parallel@contexts.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-byt-n2820/igt@gem_exec_parallel@contexts.html [CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80 [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#106070]: https://bugs.freedesktop.org/show_bug.cgi?id=106070 [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407 [fdo#111732]: https://bugs.freedesktop.org/show_bug.cgi?id=111732 [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271 [i915#1052]: https://gitlab.freedesktop.org/drm/intel/issues/1052 [i915#1084]: https://gitlab.freedesktop.org/drm/intel/issues/1084 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424 [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 Participating hosts (50 -> 46) ------------------------------ Additional (3): fi-skl-lmem fi-glk-dsi fi-snb-2520m Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-ctg-p8600 fi-icl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5417 -> IGTPW_4091 CI-20190529: 20190529 CI_DRM_7864: 5a140e2fc771e4c8b10d14e2db7bfb4996ee9d8a @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_4091: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/index.html IGT_5417: 33cc93c8ba5daa0b7498f297a4f626844d895d06 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Testlist changes == +igt@prime_vgem@basic-blt +igt@prime_vgem@basic-fence-blt +igt@prime_vgem@coherency-blt == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/index.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for tests/prime_vgem: Examine blitter access path (rev2) 2020-02-04 11:41 ` [igt-dev] " Janusz Krzysztofik (?) (?) @ 2020-02-07 13:11 ` Patchwork -1 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2020-02-07 13:11 UTC (permalink / raw) To: Janusz Krzysztofik; +Cc: igt-dev == Series Details == Series: tests/prime_vgem: Examine blitter access path (rev2) URL : https://patchwork.freedesktop.org/series/71823/ State : success == Summary == CI Bug Log - changes from CI_DRM_7864 -> IGTPW_4091 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/index.html Known issues ------------ Here are the changes found in IGTPW_4091 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_parallel@fds: - fi-byt-n2820: [PASS][1] -> [FAIL][2] ([i915#694]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-byt-n2820/igt@gem_exec_parallel@fds.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-byt-n2820/igt@gem_exec_parallel@fds.html * igt@gem_exec_suspend@basic-s4-devices: - fi-tgl-y: [PASS][3] -> [FAIL][4] ([CI#94]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html * igt@i915_selftest@live_blt: - fi-ivb-3770: [PASS][5] -> [DMESG-FAIL][6] ([i915#725]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-ivb-3770/igt@i915_selftest@live_blt.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-ivb-3770/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_gem_contexts: - fi-cfl-8700k: [PASS][7] -> [INCOMPLETE][8] ([CI#80] / [i915#424]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html - fi-cfl-guc: [PASS][9] -> [INCOMPLETE][10] ([fdo#106070] / [i915#424]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [PASS][11] -> [FAIL][12] ([fdo#111407]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html * igt@kms_flip@basic-flip-vs-dpms: - fi-skl-6770hq: [PASS][13] -> [INCOMPLETE][14] ([CI#80]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-dpms.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-dpms.html * igt@prime_self_import@basic-with_one_bo: - fi-tgl-y: [PASS][15] -> [DMESG-WARN][16] ([CI#94] / [i915#402]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-tgl-y/igt@prime_self_import@basic-with_one_bo.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-tgl-y/igt@prime_self_import@basic-with_one_bo.html #### Possible fixes #### * igt@i915_selftest@live_blt: - fi-hsw-4770: [DMESG-FAIL][17] ([i915#725]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-hsw-4770/igt@i915_selftest@live_blt.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-hsw-4770/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_gem_contexts: - fi-byt-j1900: [DMESG-FAIL][19] ([i915#1052]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html * igt@i915_selftest@live_gtt: - fi-skl-6600u: [TIMEOUT][21] ([fdo#111732] / [fdo#112271]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-skl-6600u/igt@i915_selftest@live_gtt.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-skl-6600u/igt@i915_selftest@live_gtt.html * igt@i915_selftest@live_perf: - fi-apl-guc: [INCOMPLETE][23] ([fdo#103927]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-apl-guc/igt@i915_selftest@live_perf.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-apl-guc/igt@i915_selftest@live_perf.html * igt@prime_self_import@basic-llseek-bad: - fi-tgl-y: [DMESG-WARN][25] ([CI#94] / [i915#402]) -> [PASS][26] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-tgl-y/igt@prime_self_import@basic-llseek-bad.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-tgl-y/igt@prime_self_import@basic-llseek-bad.html #### Warnings #### * igt@gem_exec_parallel@contexts: - fi-byt-j1900: [TIMEOUT][27] ([fdo#112271] / [i915#1084]) -> [FAIL][28] ([i915#694]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-byt-j1900/igt@gem_exec_parallel@contexts.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-byt-j1900/igt@gem_exec_parallel@contexts.html - fi-byt-n2820: [TIMEOUT][29] ([fdo#112271]) -> [FAIL][30] ([i915#694]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-byt-n2820/igt@gem_exec_parallel@contexts.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/fi-byt-n2820/igt@gem_exec_parallel@contexts.html [CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80 [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#106070]: https://bugs.freedesktop.org/show_bug.cgi?id=106070 [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407 [fdo#111732]: https://bugs.freedesktop.org/show_bug.cgi?id=111732 [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271 [i915#1052]: https://gitlab.freedesktop.org/drm/intel/issues/1052 [i915#1084]: https://gitlab.freedesktop.org/drm/intel/issues/1084 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424 [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 Participating hosts (50 -> 46) ------------------------------ Additional (3): fi-skl-lmem fi-glk-dsi fi-snb-2520m Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-ctg-p8600 fi-icl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5417 -> IGTPW_4091 CI-20190529: 20190529 CI_DRM_7864: 5a140e2fc771e4c8b10d14e2db7bfb4996ee9d8a @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_4091: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/index.html IGT_5417: 33cc93c8ba5daa0b7498f297a4f626844d895d06 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Testlist changes == +igt@prime_vgem@basic-blt +igt@prime_vgem@basic-fence-blt +igt@prime_vgem@coherency-blt == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/index.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for tests/prime_vgem: Examine blitter access path (rev2) 2020-02-04 11:41 ` [igt-dev] " Janusz Krzysztofik ` (2 preceding siblings ...) (?) @ 2020-02-10 14:00 ` Patchwork -1 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2020-02-10 14:00 UTC (permalink / raw) To: Janusz Krzysztofik; +Cc: igt-dev == Series Details == Series: tests/prime_vgem: Examine blitter access path (rev2) URL : https://patchwork.freedesktop.org/series/71823/ State : success == Summary == CI Bug Log - changes from CI_DRM_7864_full -> IGTPW_4091_full ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/index.html New tests --------- New tests have been introduced between CI_DRM_7864_full and IGTPW_4091_full: ### New IGT tests (3) ### * igt@prime_vgem@basic-blt: - Statuses : - Exec time: [None] s * igt@prime_vgem@basic-fence-blt: - Statuses : - Exec time: [None] s * igt@prime_vgem@coherency-blt: - Statuses : - Exec time: [None] s Changes ------- No changes found Participating hosts (10 -> 8) ------------------------------ Missing (2): pig-skl-6260u pig-glk-j5005 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5417 -> IGTPW_4091 * Piglit: piglit_4509 -> None CI-20190529: 20190529 CI_DRM_7864: 5a140e2fc771e4c8b10d14e2db7bfb4996ee9d8a @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_4091: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/index.html IGT_5417: 33cc93c8ba5daa0b7498f297a4f626844d895d06 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4091/index.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH i-g-t v3] tests/prime_vgem: Examine blitter access path 2020-02-04 11:41 ` [igt-dev] " Janusz Krzysztofik @ 2020-02-11 11:39 ` Chris Wilson -1 siblings, 0 replies; 11+ messages in thread From: Chris Wilson @ 2020-02-11 11:39 UTC (permalink / raw) To: Janusz Krzysztofik, igt-dev; +Cc: Daniel Vetter, intel-gfx Quoting Janusz Krzysztofik (2020-02-04 11:41:13) > On future hardware with missing GGTT BAR we won't be able to exercise > dma-buf access via that path. An alternative to basic-gtt subtest for > testing dma-buf access is required, as well as basic-fence-mmap and > coherency-gtt subtest alternatives for testing WC coherency. > > Access to the dma sg list feature exposed by dma-buf can be tested > through blitter. Unfortunately we don't have any equivalently simple > tests that use blitter. Provide them. > > XY_SRC_COPY_BLT method implemented by igt_blitter_src_copy() IGT > library helper has been chosen. > > v2: As fast copy is not supported on platforms older than Gen 9, > use XY_SRC_COPY instead (Chris), > - add subtest descriptions. > v3: Don't calculate the pitch, use scratch.pitch returned by > vgem_create() (Chris), > - replace constants with values from respective fields of scratch > (Chris), > - use _u32 variant of igt_assert_eq() for better readability of > possible error messages (Chris), > - sleep a bit to emphasize that the only thing stopping the blitter > is the fence (Chris), > - use prime_sync_start/end() as the recommended practice for > inter-device sync, not gem_sync() (Chris), > - update the name of used XY_SRC_COPY_BLT helper to match the name of > its library version just merged. > > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> > Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> > Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> > --- > Hi Chris, > > I hope I've understood and addressed your comments correctly so your > R-b still applies. Sure, just spotted one slight slip in uapi usage, > +static void test_blt_interleaved(int vgem, int i915) > +{ > + struct vgem_bo scratch; > + uint32_t prime, native; > + uint32_t *foreign, *local; > + int dmabuf, i; > + > + scratch.width = 1024; > + scratch.height = 1024; > + scratch.bpp = 32; > + vgem_create(vgem, &scratch); > + > + dmabuf = prime_handle_to_fd(vgem, scratch.handle); > + prime = prime_fd_to_handle(i915, dmabuf); > + > + native = gem_create(i915, scratch.size); > + > + foreign = vgem_mmap(vgem, &scratch, PROT_WRITE); > + local = gem_mmap__wc(i915, native, 0, scratch.size, PROT_WRITE); > + > + for (i = 0; i < scratch.height; i++) { > + local[scratch.pitch * i / sizeof(*local)] = i; > + igt_blitter_src_copy(i915, native, 0, scratch.pitch, > + I915_TILING_NONE, 0, i, scratch.width, 1, > + scratch.bpp, prime, 0, scratch.pitch, > + I915_TILING_NONE, 0, i); > + prime_sync_start(dmabuf, true); > + prime_sync_end(dmabuf, true); > + igt_assert_eq_u32(foreign[scratch.pitch * i / sizeof(*foreign)], > + i); sync_start() igt_assert... sync_end() > + > + foreign[scratch.pitch * i / sizeof(*foreign)] = ~i; > + igt_blitter_src_copy(i915, prime, 0, scratch.pitch, > + I915_TILING_NONE, 0, i, scratch.width, 1, > + scratch.bpp, native, 0, scratch.pitch, > + I915_TILING_NONE, 0, i); > + gem_sync(i915, native); > + igt_assert_eq_u32(local[scratch.pitch * i / sizeof(*local)], > + ~i); > + } Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v3] tests/prime_vgem: Examine blitter access path @ 2020-02-11 11:39 ` Chris Wilson 0 siblings, 0 replies; 11+ messages in thread From: Chris Wilson @ 2020-02-11 11:39 UTC (permalink / raw) To: Janusz Krzysztofik, igt-dev; +Cc: intel-gfx Quoting Janusz Krzysztofik (2020-02-04 11:41:13) > On future hardware with missing GGTT BAR we won't be able to exercise > dma-buf access via that path. An alternative to basic-gtt subtest for > testing dma-buf access is required, as well as basic-fence-mmap and > coherency-gtt subtest alternatives for testing WC coherency. > > Access to the dma sg list feature exposed by dma-buf can be tested > through blitter. Unfortunately we don't have any equivalently simple > tests that use blitter. Provide them. > > XY_SRC_COPY_BLT method implemented by igt_blitter_src_copy() IGT > library helper has been chosen. > > v2: As fast copy is not supported on platforms older than Gen 9, > use XY_SRC_COPY instead (Chris), > - add subtest descriptions. > v3: Don't calculate the pitch, use scratch.pitch returned by > vgem_create() (Chris), > - replace constants with values from respective fields of scratch > (Chris), > - use _u32 variant of igt_assert_eq() for better readability of > possible error messages (Chris), > - sleep a bit to emphasize that the only thing stopping the blitter > is the fence (Chris), > - use prime_sync_start/end() as the recommended practice for > inter-device sync, not gem_sync() (Chris), > - update the name of used XY_SRC_COPY_BLT helper to match the name of > its library version just merged. > > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> > Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> > Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> > --- > Hi Chris, > > I hope I've understood and addressed your comments correctly so your > R-b still applies. Sure, just spotted one slight slip in uapi usage, > +static void test_blt_interleaved(int vgem, int i915) > +{ > + struct vgem_bo scratch; > + uint32_t prime, native; > + uint32_t *foreign, *local; > + int dmabuf, i; > + > + scratch.width = 1024; > + scratch.height = 1024; > + scratch.bpp = 32; > + vgem_create(vgem, &scratch); > + > + dmabuf = prime_handle_to_fd(vgem, scratch.handle); > + prime = prime_fd_to_handle(i915, dmabuf); > + > + native = gem_create(i915, scratch.size); > + > + foreign = vgem_mmap(vgem, &scratch, PROT_WRITE); > + local = gem_mmap__wc(i915, native, 0, scratch.size, PROT_WRITE); > + > + for (i = 0; i < scratch.height; i++) { > + local[scratch.pitch * i / sizeof(*local)] = i; > + igt_blitter_src_copy(i915, native, 0, scratch.pitch, > + I915_TILING_NONE, 0, i, scratch.width, 1, > + scratch.bpp, prime, 0, scratch.pitch, > + I915_TILING_NONE, 0, i); > + prime_sync_start(dmabuf, true); > + prime_sync_end(dmabuf, true); > + igt_assert_eq_u32(foreign[scratch.pitch * i / sizeof(*foreign)], > + i); sync_start() igt_assert... sync_end() > + > + foreign[scratch.pitch * i / sizeof(*foreign)] = ~i; > + igt_blitter_src_copy(i915, prime, 0, scratch.pitch, > + I915_TILING_NONE, 0, i, scratch.width, 1, > + scratch.bpp, native, 0, scratch.pitch, > + I915_TILING_NONE, 0, i); > + gem_sync(i915, native); > + igt_assert_eq_u32(local[scratch.pitch * i / sizeof(*local)], > + ~i); > + } Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH i-g-t v3] tests/prime_vgem: Examine blitter access path 2020-02-11 11:39 ` [igt-dev] " Chris Wilson @ 2020-02-12 9:08 ` Janusz Krzysztofik -1 siblings, 0 replies; 11+ messages in thread From: Janusz Krzysztofik @ 2020-02-12 9:08 UTC (permalink / raw) To: Chris Wilson; +Cc: igt-dev, Daniel Vetter, intel-gfx Hi Chris, On Tuesday, February 11, 2020 12:39:36 PM CET Chris Wilson wrote: > Quoting Janusz Krzysztofik (2020-02-04 11:41:13) > > On future hardware with missing GGTT BAR we won't be able to exercise > > dma-buf access via that path. An alternative to basic-gtt subtest for > > testing dma-buf access is required, as well as basic-fence-mmap and > > coherency-gtt subtest alternatives for testing WC coherency. > > > > Access to the dma sg list feature exposed by dma-buf can be tested > > through blitter. Unfortunately we don't have any equivalently simple > > tests that use blitter. Provide them. > > > > XY_SRC_COPY_BLT method implemented by igt_blitter_src_copy() IGT > > library helper has been chosen. > > > > v2: As fast copy is not supported on platforms older than Gen 9, > > use XY_SRC_COPY instead (Chris), > > - add subtest descriptions. > > v3: Don't calculate the pitch, use scratch.pitch returned by > > vgem_create() (Chris), > > - replace constants with values from respective fields of scratch > > (Chris), > > - use _u32 variant of igt_assert_eq() for better readability of > > possible error messages (Chris), > > - sleep a bit to emphasize that the only thing stopping the blitter > > is the fence (Chris), > > - use prime_sync_start/end() as the recommended practice for > > inter-device sync, not gem_sync() (Chris), > > - update the name of used XY_SRC_COPY_BLT helper to match the name of > > its library version just merged. > > > > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> > > Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> > > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> > > Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> > > --- > > Hi Chris, > > > > I hope I've understood and addressed your comments correctly so your > > R-b still applies. > > Sure, just spotted one slight slip in uapi usage, > > > +static void test_blt_interleaved(int vgem, int i915) > > +{ > > + struct vgem_bo scratch; > > + uint32_t prime, native; > > + uint32_t *foreign, *local; > > + int dmabuf, i; > > + > > + scratch.width = 1024; > > + scratch.height = 1024; > > + scratch.bpp = 32; > > + vgem_create(vgem, &scratch); > > + > > + dmabuf = prime_handle_to_fd(vgem, scratch.handle); > > + prime = prime_fd_to_handle(i915, dmabuf); > > + > > + native = gem_create(i915, scratch.size); > > + > > + foreign = vgem_mmap(vgem, &scratch, PROT_WRITE); > > + local = gem_mmap__wc(i915, native, 0, scratch.size, PROT_WRITE); > > + > > + for (i = 0; i < scratch.height; i++) { > > + local[scratch.pitch * i / sizeof(*local)] = i; > > + igt_blitter_src_copy(i915, native, 0, scratch.pitch, > > + I915_TILING_NONE, 0, i, scratch.width, 1, > > + scratch.bpp, prime, 0, scratch.pitch, > > + I915_TILING_NONE, 0, i); > > + prime_sync_start(dmabuf, true); > > + prime_sync_end(dmabuf, true); > > + igt_assert_eq_u32(foreign[scratch.pitch * i / sizeof(*foreign)], > > + i); > > sync_start() > igt_assert... > sync_end() While your modification seems harmless to me, could you please explain why? 'foreign' is not a map to dma-buf, it's a map to a vgem object. Why should we surround access to an mmapped vgem object with prime_sync_start/ end()? I think vgem driver should take care of synchronization/serialization as needed. My intention was to use an empty prime_sync_start/end() instead of gem_sync(prime) for the sole purpose of making sure blitter copy was completed before we examine results from the vgem side. Thanks, Janusz > > + > > + foreign[scratch.pitch * i / sizeof(*foreign)] = ~i; > > + igt_blitter_src_copy(i915, prime, 0, scratch.pitch, > > + I915_TILING_NONE, 0, i, scratch.width, 1, > > + scratch.bpp, native, 0, scratch.pitch, > > + I915_TILING_NONE, 0, i); > > + gem_sync(i915, native); > > + igt_assert_eq_u32(local[scratch.pitch * i / sizeof(*local)], > > + ~i); > > + } > > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> > -Chris > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v3] tests/prime_vgem: Examine blitter access path @ 2020-02-12 9:08 ` Janusz Krzysztofik 0 siblings, 0 replies; 11+ messages in thread From: Janusz Krzysztofik @ 2020-02-12 9:08 UTC (permalink / raw) To: Chris Wilson; +Cc: igt-dev, intel-gfx Hi Chris, On Tuesday, February 11, 2020 12:39:36 PM CET Chris Wilson wrote: > Quoting Janusz Krzysztofik (2020-02-04 11:41:13) > > On future hardware with missing GGTT BAR we won't be able to exercise > > dma-buf access via that path. An alternative to basic-gtt subtest for > > testing dma-buf access is required, as well as basic-fence-mmap and > > coherency-gtt subtest alternatives for testing WC coherency. > > > > Access to the dma sg list feature exposed by dma-buf can be tested > > through blitter. Unfortunately we don't have any equivalently simple > > tests that use blitter. Provide them. > > > > XY_SRC_COPY_BLT method implemented by igt_blitter_src_copy() IGT > > library helper has been chosen. > > > > v2: As fast copy is not supported on platforms older than Gen 9, > > use XY_SRC_COPY instead (Chris), > > - add subtest descriptions. > > v3: Don't calculate the pitch, use scratch.pitch returned by > > vgem_create() (Chris), > > - replace constants with values from respective fields of scratch > > (Chris), > > - use _u32 variant of igt_assert_eq() for better readability of > > possible error messages (Chris), > > - sleep a bit to emphasize that the only thing stopping the blitter > > is the fence (Chris), > > - use prime_sync_start/end() as the recommended practice for > > inter-device sync, not gem_sync() (Chris), > > - update the name of used XY_SRC_COPY_BLT helper to match the name of > > its library version just merged. > > > > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> > > Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> > > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> > > Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> > > --- > > Hi Chris, > > > > I hope I've understood and addressed your comments correctly so your > > R-b still applies. > > Sure, just spotted one slight slip in uapi usage, > > > +static void test_blt_interleaved(int vgem, int i915) > > +{ > > + struct vgem_bo scratch; > > + uint32_t prime, native; > > + uint32_t *foreign, *local; > > + int dmabuf, i; > > + > > + scratch.width = 1024; > > + scratch.height = 1024; > > + scratch.bpp = 32; > > + vgem_create(vgem, &scratch); > > + > > + dmabuf = prime_handle_to_fd(vgem, scratch.handle); > > + prime = prime_fd_to_handle(i915, dmabuf); > > + > > + native = gem_create(i915, scratch.size); > > + > > + foreign = vgem_mmap(vgem, &scratch, PROT_WRITE); > > + local = gem_mmap__wc(i915, native, 0, scratch.size, PROT_WRITE); > > + > > + for (i = 0; i < scratch.height; i++) { > > + local[scratch.pitch * i / sizeof(*local)] = i; > > + igt_blitter_src_copy(i915, native, 0, scratch.pitch, > > + I915_TILING_NONE, 0, i, scratch.width, 1, > > + scratch.bpp, prime, 0, scratch.pitch, > > + I915_TILING_NONE, 0, i); > > + prime_sync_start(dmabuf, true); > > + prime_sync_end(dmabuf, true); > > + igt_assert_eq_u32(foreign[scratch.pitch * i / sizeof(*foreign)], > > + i); > > sync_start() > igt_assert... > sync_end() While your modification seems harmless to me, could you please explain why? 'foreign' is not a map to dma-buf, it's a map to a vgem object. Why should we surround access to an mmapped vgem object with prime_sync_start/ end()? I think vgem driver should take care of synchronization/serialization as needed. My intention was to use an empty prime_sync_start/end() instead of gem_sync(prime) for the sole purpose of making sure blitter copy was completed before we examine results from the vgem side. Thanks, Janusz > > + > > + foreign[scratch.pitch * i / sizeof(*foreign)] = ~i; > > + igt_blitter_src_copy(i915, prime, 0, scratch.pitch, > > + I915_TILING_NONE, 0, i, scratch.width, 1, > > + scratch.bpp, native, 0, scratch.pitch, > > + I915_TILING_NONE, 0, i); > > + gem_sync(i915, native); > > + igt_assert_eq_u32(local[scratch.pitch * i / sizeof(*local)], > > + ~i); > > + } > > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> > -Chris > _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH i-g-t v3] tests/prime_vgem: Examine blitter access path 2020-02-12 9:08 ` [igt-dev] " Janusz Krzysztofik @ 2020-02-12 9:52 ` Chris Wilson -1 siblings, 0 replies; 11+ messages in thread From: Chris Wilson @ 2020-02-12 9:52 UTC (permalink / raw) To: Janusz Krzysztofik; +Cc: igt-dev, Daniel Vetter, intel-gfx Quoting Janusz Krzysztofik (2020-02-12 09:08:53) > Hi Chris, > > On Tuesday, February 11, 2020 12:39:36 PM CET Chris Wilson wrote: > > Quoting Janusz Krzysztofik (2020-02-04 11:41:13) > > > On future hardware with missing GGTT BAR we won't be able to exercise > > > dma-buf access via that path. An alternative to basic-gtt subtest for > > > testing dma-buf access is required, as well as basic-fence-mmap and > > > coherency-gtt subtest alternatives for testing WC coherency. > > > > > > Access to the dma sg list feature exposed by dma-buf can be tested > > > through blitter. Unfortunately we don't have any equivalently simple > > > tests that use blitter. Provide them. > > > > > > XY_SRC_COPY_BLT method implemented by igt_blitter_src_copy() IGT > > > library helper has been chosen. > > > > > > v2: As fast copy is not supported on platforms older than Gen 9, > > > use XY_SRC_COPY instead (Chris), > > > - add subtest descriptions. > > > v3: Don't calculate the pitch, use scratch.pitch returned by > > > vgem_create() (Chris), > > > - replace constants with values from respective fields of scratch > > > (Chris), > > > - use _u32 variant of igt_assert_eq() for better readability of > > > possible error messages (Chris), > > > - sleep a bit to emphasize that the only thing stopping the blitter > > > is the fence (Chris), > > > - use prime_sync_start/end() as the recommended practice for > > > inter-device sync, not gem_sync() (Chris), > > > - update the name of used XY_SRC_COPY_BLT helper to match the name of > > > its library version just merged. > > > > > > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> > > > Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> > > > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> > > > Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> > > > --- > > > Hi Chris, > > > > > > I hope I've understood and addressed your comments correctly so your > > > R-b still applies. > > > > Sure, just spotted one slight slip in uapi usage, > > > > > +static void test_blt_interleaved(int vgem, int i915) > > > +{ > > > + struct vgem_bo scratch; > > > + uint32_t prime, native; > > > + uint32_t *foreign, *local; > > > + int dmabuf, i; > > > + > > > + scratch.width = 1024; > > > + scratch.height = 1024; > > > + scratch.bpp = 32; > > > + vgem_create(vgem, &scratch); > > > + > > > + dmabuf = prime_handle_to_fd(vgem, scratch.handle); > > > + prime = prime_fd_to_handle(i915, dmabuf); > > > + > > > + native = gem_create(i915, scratch.size); > > > + > > > + foreign = vgem_mmap(vgem, &scratch, PROT_WRITE); > > > + local = gem_mmap__wc(i915, native, 0, scratch.size, PROT_WRITE); > > > + > > > + for (i = 0; i < scratch.height; i++) { > > > + local[scratch.pitch * i / sizeof(*local)] = i; > > > + igt_blitter_src_copy(i915, native, 0, scratch.pitch, > > > + I915_TILING_NONE, 0, i, scratch.width, 1, > > > + scratch.bpp, prime, 0, scratch.pitch, > > > + I915_TILING_NONE, 0, i); > > > + prime_sync_start(dmabuf, true); > > > + prime_sync_end(dmabuf, true); > > > + igt_assert_eq_u32(foreign[scratch.pitch * i / sizeof(*foreign)], > > > + i); > > > > sync_start() > > igt_assert... > > sync_end() > > While your modification seems harmless to me, could you please explain why? > 'foreign' is not a map to dma-buf, it's a map to a vgem object. Why > should we surround access to an mmapped vgem object with prime_sync_start/ > end()? I think vgem driver should take care of synchronization/serialization > as needed. As I understood the flow of mmaps, dmabuf is pointing to vgem and so we are using the dmabuf synchronisation to relegate access to the vgem mmap. Your intention is that this sequence was: i915: do stuff dmabuf: sync vgem: assume coherent. Whereas I was looking at from the perspective of having to use dmabuf as the access controls for vgem, since it has none of its own. > My intention was to use an empty prime_sync_start/end() instead of > gem_sync(prime) for the sole purpose of making sure blitter copy was completed > before we examine results from the vgem side. I see. We have a triangle, with sync only on the dmabuf vertex. The way I was looking at it is that our api should be focusing on /only/ having the dmabuf as the conduit: dmabuf vgem |<---------->| i915 What that means for api, when we add in more nodes and have the same buffer shared between multiple devices? Ugh. And you can point that since dmabuf has its own mmap and accessors, it isn't a plain conduit, and more of its own node. The first one to figure it out wins the prize of writing the dmabuf ioctls and documentation. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v3] tests/prime_vgem: Examine blitter access path @ 2020-02-12 9:52 ` Chris Wilson 0 siblings, 0 replies; 11+ messages in thread From: Chris Wilson @ 2020-02-12 9:52 UTC (permalink / raw) To: Janusz Krzysztofik; +Cc: igt-dev, intel-gfx Quoting Janusz Krzysztofik (2020-02-12 09:08:53) > Hi Chris, > > On Tuesday, February 11, 2020 12:39:36 PM CET Chris Wilson wrote: > > Quoting Janusz Krzysztofik (2020-02-04 11:41:13) > > > On future hardware with missing GGTT BAR we won't be able to exercise > > > dma-buf access via that path. An alternative to basic-gtt subtest for > > > testing dma-buf access is required, as well as basic-fence-mmap and > > > coherency-gtt subtest alternatives for testing WC coherency. > > > > > > Access to the dma sg list feature exposed by dma-buf can be tested > > > through blitter. Unfortunately we don't have any equivalently simple > > > tests that use blitter. Provide them. > > > > > > XY_SRC_COPY_BLT method implemented by igt_blitter_src_copy() IGT > > > library helper has been chosen. > > > > > > v2: As fast copy is not supported on platforms older than Gen 9, > > > use XY_SRC_COPY instead (Chris), > > > - add subtest descriptions. > > > v3: Don't calculate the pitch, use scratch.pitch returned by > > > vgem_create() (Chris), > > > - replace constants with values from respective fields of scratch > > > (Chris), > > > - use _u32 variant of igt_assert_eq() for better readability of > > > possible error messages (Chris), > > > - sleep a bit to emphasize that the only thing stopping the blitter > > > is the fence (Chris), > > > - use prime_sync_start/end() as the recommended practice for > > > inter-device sync, not gem_sync() (Chris), > > > - update the name of used XY_SRC_COPY_BLT helper to match the name of > > > its library version just merged. > > > > > > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> > > > Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> > > > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> > > > Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> > > > --- > > > Hi Chris, > > > > > > I hope I've understood and addressed your comments correctly so your > > > R-b still applies. > > > > Sure, just spotted one slight slip in uapi usage, > > > > > +static void test_blt_interleaved(int vgem, int i915) > > > +{ > > > + struct vgem_bo scratch; > > > + uint32_t prime, native; > > > + uint32_t *foreign, *local; > > > + int dmabuf, i; > > > + > > > + scratch.width = 1024; > > > + scratch.height = 1024; > > > + scratch.bpp = 32; > > > + vgem_create(vgem, &scratch); > > > + > > > + dmabuf = prime_handle_to_fd(vgem, scratch.handle); > > > + prime = prime_fd_to_handle(i915, dmabuf); > > > + > > > + native = gem_create(i915, scratch.size); > > > + > > > + foreign = vgem_mmap(vgem, &scratch, PROT_WRITE); > > > + local = gem_mmap__wc(i915, native, 0, scratch.size, PROT_WRITE); > > > + > > > + for (i = 0; i < scratch.height; i++) { > > > + local[scratch.pitch * i / sizeof(*local)] = i; > > > + igt_blitter_src_copy(i915, native, 0, scratch.pitch, > > > + I915_TILING_NONE, 0, i, scratch.width, 1, > > > + scratch.bpp, prime, 0, scratch.pitch, > > > + I915_TILING_NONE, 0, i); > > > + prime_sync_start(dmabuf, true); > > > + prime_sync_end(dmabuf, true); > > > + igt_assert_eq_u32(foreign[scratch.pitch * i / sizeof(*foreign)], > > > + i); > > > > sync_start() > > igt_assert... > > sync_end() > > While your modification seems harmless to me, could you please explain why? > 'foreign' is not a map to dma-buf, it's a map to a vgem object. Why > should we surround access to an mmapped vgem object with prime_sync_start/ > end()? I think vgem driver should take care of synchronization/serialization > as needed. As I understood the flow of mmaps, dmabuf is pointing to vgem and so we are using the dmabuf synchronisation to relegate access to the vgem mmap. Your intention is that this sequence was: i915: do stuff dmabuf: sync vgem: assume coherent. Whereas I was looking at from the perspective of having to use dmabuf as the access controls for vgem, since it has none of its own. > My intention was to use an empty prime_sync_start/end() instead of > gem_sync(prime) for the sole purpose of making sure blitter copy was completed > before we examine results from the vgem side. I see. We have a triangle, with sync only on the dmabuf vertex. The way I was looking at it is that our api should be focusing on /only/ having the dmabuf as the conduit: dmabuf vgem |<---------->| i915 What that means for api, when we add in more nodes and have the same buffer shared between multiple devices? Ugh. And you can point that since dmabuf has its own mmap and accessors, it isn't a plain conduit, and more of its own node. The first one to figure it out wins the prize of writing the dmabuf ioctls and documentation. -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2020-02-12 9:53 UTC | newest] Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-02-04 11:41 [Intel-gfx] [PATCH i-g-t v3] tests/prime_vgem: Examine blitter access path Janusz Krzysztofik 2020-02-04 11:41 ` [igt-dev] " Janusz Krzysztofik 2020-02-04 16:23 ` [igt-dev] ✗ Fi.CI.BAT: failure for tests/prime_vgem: Examine blitter access path (rev2) Patchwork 2020-02-07 13:11 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork 2020-02-10 14:00 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork 2020-02-11 11:39 ` [Intel-gfx] [PATCH i-g-t v3] tests/prime_vgem: Examine blitter access path Chris Wilson 2020-02-11 11:39 ` [igt-dev] " Chris Wilson 2020-02-12 9:08 ` [Intel-gfx] " Janusz Krzysztofik 2020-02-12 9:08 ` [igt-dev] " Janusz Krzysztofik 2020-02-12 9:52 ` [Intel-gfx] " Chris Wilson 2020-02-12 9:52 ` [igt-dev] " Chris Wilson
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