* [U-Boot] [PATCH] mxs: Explain why some mx23 DDR registers are not configured
@ 2013-05-06 2:11 Fabio Estevam
2013-05-06 7:57 ` Stefano Babic
0 siblings, 1 reply; 2+ messages in thread
From: Fabio Estevam @ 2013-05-06 2:11 UTC (permalink / raw)
To: u-boot
From: Fabio Estevam <fabio.estevam@freescale.com>
Put an explanation in the source code as to why some DDR registers do not
need to be configured.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 41fb803..060fdb7 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -127,6 +127,15 @@ static void initialize_dram_values(void)
mxs_adjust_memory_params(dram_vals);
+ /*
+ * HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as
+ * per FSL bootlets code.
+ *
+ * mx23 Reference Manual marks HW_DRAM_CTL27 and HW_DRAM_CTL28 as
+ * "reserved".
+ * HW_DRAM_CTL8 is setup as the last element.
+ * So skip the initialization of these HW_DRAM_CTL registers.
+ */
for (i = 0; i < ARRAY_SIZE(dram_vals); i++) {
if (i == 8 || i == 27 || i == 28 || i == 35)
continue;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [U-Boot] [PATCH] mxs: Explain why some mx23 DDR registers are not configured
2013-05-06 2:11 [U-Boot] [PATCH] mxs: Explain why some mx23 DDR registers are not configured Fabio Estevam
@ 2013-05-06 7:57 ` Stefano Babic
0 siblings, 0 replies; 2+ messages in thread
From: Stefano Babic @ 2013-05-06 7:57 UTC (permalink / raw)
To: u-boot
On 06/05/2013 04:11, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> Put an explanation in the source code as to why some DDR registers do not
> need to be configured.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2013-05-06 7:57 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-05-06 2:11 [U-Boot] [PATCH] mxs: Explain why some mx23 DDR registers are not configured Fabio Estevam
2013-05-06 7:57 ` Stefano Babic
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.