* [PATCH] xen/arm: Update VTCR to use region size of 2^40 bytes instead of 2^39
@ 2013-06-06 12:06 Julien Grall
2013-06-06 13:17 ` Tim Deegan
0 siblings, 1 reply; 4+ messages in thread
From: Julien Grall @ 2013-06-06 12:06 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, stefano.stabellini, ian.campbell, patches
According to the ARM manual, T0SZ is a 4-bit signed integer.
The current value of T0SZ = b1000 which is equal to -7. This is result
to a size of 2^39 bytes instead of the desired value 2^40.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
---
xen/arch/arm/mm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index d1290cd..7d4e186 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -315,9 +315,9 @@ void __cpuinit setup_virt_paging(void)
/* Setup Stage 2 address translation */
/* SH0=00, ORGN0=IRGN0=01
* SL0=01 (Level-1)
- * T0SZ=(1)1000 = -8 (40 bit physical addresses)
+ * T0SZ=(1)1111 = -8 (40 bit physical addresses)
*/
- WRITE_SYSREG32(0x80002558, VTCR_EL2); isb();
+ WRITE_SYSREG32(0x8000255f, VTCR_EL2); isb();
}
/* This needs to be a macro to stop the compiler spilling to the stack
--
1.7.10.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] xen/arm: Update VTCR to use region size of 2^40 bytes instead of 2^39
2013-06-06 12:06 [PATCH] xen/arm: Update VTCR to use region size of 2^40 bytes instead of 2^39 Julien Grall
@ 2013-06-06 13:17 ` Tim Deegan
2013-06-06 13:25 ` Stefano Stabellini
2013-06-06 13:51 ` Julien Grall
0 siblings, 2 replies; 4+ messages in thread
From: Tim Deegan @ 2013-06-06 13:17 UTC (permalink / raw)
To: Julien Grall; +Cc: patches, stefano.stabellini, ian.campbell, xen-devel
At 13:06 +0100 on 06 Jun (1370524015), Julien Grall wrote:
> According to the ARM manual, T0SZ is a 4-bit signed integer.
> The current value of T0SZ = b1000 which is equal to -7. This is result
Really? By my count, 4-bit -7 is b1001 and b1000 is indeed -8.
> to a size of 2^39 bytes instead of the desired value 2^40.
>
> Signed-off-by: Julien Grall <julien.grall@linaro.org>
> ---
> xen/arch/arm/mm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
> index d1290cd..7d4e186 100644
> --- a/xen/arch/arm/mm.c
> +++ b/xen/arch/arm/mm.c
> @@ -315,9 +315,9 @@ void __cpuinit setup_virt_paging(void)
> /* Setup Stage 2 address translation */
> /* SH0=00, ORGN0=IRGN0=01
> * SL0=01 (Level-1)
> - * T0SZ=(1)1000 = -8 (40 bit physical addresses)
> + * T0SZ=(1)1111 = -8 (40 bit physical addresses)
That's certainly wrong: b1111 must be -1.
Tim.
> */
> - WRITE_SYSREG32(0x80002558, VTCR_EL2); isb();
> + WRITE_SYSREG32(0x8000255f, VTCR_EL2); isb();
> }
>
> /* This needs to be a macro to stop the compiler spilling to the stack
> --
> 1.7.10.4
>
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] xen/arm: Update VTCR to use region size of 2^40 bytes instead of 2^39
2013-06-06 13:17 ` Tim Deegan
@ 2013-06-06 13:25 ` Stefano Stabellini
2013-06-06 13:51 ` Julien Grall
1 sibling, 0 replies; 4+ messages in thread
From: Stefano Stabellini @ 2013-06-06 13:25 UTC (permalink / raw)
To: Tim Deegan
Cc: Julien Grall, stefano.stabellini, ian.campbell, patches, xen-devel
On Thu, 6 Jun 2013, Tim Deegan wrote:
> At 13:06 +0100 on 06 Jun (1370524015), Julien Grall wrote:
> > According to the ARM manual, T0SZ is a 4-bit signed integer.
> > The current value of T0SZ = b1000 which is equal to -7. This is result
>
> Really? By my count, 4-bit -7 is b1001 and b1000 is indeed -8.
Tim is right on this one:
https://en.wikipedia.org/wiki/Two%27s_complement
> > to a size of 2^39 bytes instead of the desired value 2^40.
> >
> > Signed-off-by: Julien Grall <julien.grall@linaro.org>
> > ---
> > xen/arch/arm/mm.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
> > index d1290cd..7d4e186 100644
> > --- a/xen/arch/arm/mm.c
> > +++ b/xen/arch/arm/mm.c
> > @@ -315,9 +315,9 @@ void __cpuinit setup_virt_paging(void)
> > /* Setup Stage 2 address translation */
> > /* SH0=00, ORGN0=IRGN0=01
> > * SL0=01 (Level-1)
> > - * T0SZ=(1)1000 = -8 (40 bit physical addresses)
> > + * T0SZ=(1)1111 = -8 (40 bit physical addresses)
>
> That's certainly wrong: b1111 must be -1.
right
> > */
> > - WRITE_SYSREG32(0x80002558, VTCR_EL2); isb();
> > + WRITE_SYSREG32(0x8000255f, VTCR_EL2); isb();
> > }
> >
> > /* This needs to be a macro to stop the compiler spilling to the stack
> > --
> > 1.7.10.4
> >
> >
> > _______________________________________________
> > Xen-devel mailing list
> > Xen-devel@lists.xen.org
> > http://lists.xen.org/xen-devel
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] xen/arm: Update VTCR to use region size of 2^40 bytes instead of 2^39
2013-06-06 13:17 ` Tim Deegan
2013-06-06 13:25 ` Stefano Stabellini
@ 2013-06-06 13:51 ` Julien Grall
1 sibling, 0 replies; 4+ messages in thread
From: Julien Grall @ 2013-06-06 13:51 UTC (permalink / raw)
To: Tim Deegan; +Cc: patches, stefano.stabellini, ian.campbell, xen-devel
On 06/06/2013 02:17 PM, Tim Deegan wrote:
> At 13:06 +0100 on 06 Jun (1370524015), Julien Grall wrote:
>> According to the ARM manual, T0SZ is a 4-bit signed integer.
>> The current value of T0SZ = b1000 which is equal to -7. This is result
>
> Really? By my count, 4-bit -7 is b1001 and b1000 is indeed -8.
Indeed :/. I don't know why I find this value by hand.
--
Julien
^ permalink raw reply [flat|nested] 4+ messages in thread
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2013-06-06 12:06 [PATCH] xen/arm: Update VTCR to use region size of 2^40 bytes instead of 2^39 Julien Grall
2013-06-06 13:17 ` Tim Deegan
2013-06-06 13:25 ` Stefano Stabellini
2013-06-06 13:51 ` Julien Grall
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