* [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation
@ 2013-07-04 15:12 Paolo Bonzini
2013-07-04 15:12 ` [Qemu-devel] [PATCH 01/66] int128: optimize and add test cases Paolo Bonzini
` (65 more replies)
0 siblings, 66 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:12 UTC (permalink / raw)
To: qemu-devel
Anthony,
the following changes since commit 1acd5a373905ddb28957842256a038956941f332:
Merge remote-tracking branch 'agraf/ppc-for-upstream' into staging (2013-07-01 09:03:04 -0500)
are available in the git repository at:
git://github.com/bonzini/qemu.git iommu-for-anthony
for you to fetch changes up to 28bb1ad4daef9949fc2c3f66879c2c0f0673df04:
exec: change some APIs to take AddressSpaceDispatch (2013-07-04 16:29:06 +0200)
This is a pretty large pull request that includes:
1) Jan's refactoring of ioport access, which is now dispatched using
the memory core
2) region ownership, where all regions are attached to an Object. This
is a prerequisite for memory hot-unplug, among other things.
3) RCU preparatory patches, where all data structures use "copy on update"
even though they are still read under the BQL.
Everything else is delayed to 1.7---at least as far as I'm concerned:
since this subsystem is "community maintained", other people may of course
submit more stuff from this point on.
Paolo
----------------------------------------------------------------
Jan Kiszka (15):
adlib: replace register_ioport*
applesmc: replace register_ioport*
wdt_ib700: replace register_ioport*
i82374: replace register_ioport*
prep: replace register_ioport*
vt82c686: replace register_ioport*
Privatize register_ioport_read/write
isa: implement isa_is_ioport_assigned via memory_region_find
vmware-vga: Accept unaligned I/O accesses
xen: Mark fixed platform I/O as unaligned
ioport: Switch dispatching to memory core layer
ioport: Remove unused old dispatching services
vmport: Disentangle read handler type from portio
ioport: Move portio types to ioport.h
qom: Use atomics for object refcounting
Liu Ping Fan (1):
exec: change well-known physical sections to macros
Paolo Bonzini (50):
int128: optimize and add test cases
scsi: keep device alive while it has requests
dma: keep a device alive while it has SGLists
memory: add owner argument to initialization functions
memory: destroy phys_sections one by one
exec: simplify destruction of the phys map
memory: add getter for owner
memory: add ref/unref
memory: introduce memory_region_present
memory: add ref/unref calls
exec: check MRU in qemu_ram_addr_from_host
exec: move qemu_ram_addr_from_host_nofail to cputlb.c
memory: return MemoryRegion from qemu_ram_addr_from_host
exec: reorganize address_space_map
memory: ref/unref memory across address_space_map/unmap
escc: rename struct to ESCCState
vga: pass owner to vga_init
vga: pass owner to vga_common_init
vga: pass owner to cirrus_init_common
vga: pass owner to vga_init_vbe
vga: pass owner to vga_init_io
vga: set owner in vga_update_memory_access
ne2000: pass device to ne2000_setup_io, use it as owner
vfio: pass device to vfio_mmap_bar and use it to set owner
spapr_iommu: pass device to spapr_tce_new_table and use it to set owner
pam: pass device to init_pam and use it to set owner
piolist: add owner argument to initialization functions and pass devices
hw/a*: pass owner to memory_region_init* functions
hw/block: pass owner to memory_region_init* functions
hw/c*: pass owner to memory_region_init* functions
hw/d*: pass owner to memory_region_init* functions
hw/gpio: pass owner to memory_region_init* functions
hw/i*: pass owner to memory_region_init* functions
hw/m*: pass owner to memory_region_init* functions
hw/n*: pass owner to memory_region_init* functions
hw/p*: pass owner to memory_region_init* functions
hw/s*: pass owner to memory_region_init* functions
hw/t*: pass owner to memory_region_init* functions
hw/[u-x]*: pass owner to memory_region_init* functions
add a header file for atomic operations
memory: access FlatView from a local variable
memory: use a new FlatView pointer on every topology update
memory: add reference counting to FlatView
exec: separate current memory map from the one being built
memory: move MemoryListener declaration earlier
exec: move listener from AddressSpaceDispatch to AddressSpace
exec: separate current radix tree from the one being built
exec: put memory map in AddressSpaceDispatch
exec: remove cur_map
exec: change some APIs to take AddressSpaceDispatch
cputlb.c | 11 +
dma-helpers.c | 6 +-
docs/atomics.txt | 352 +++++++++++++++++++++++++
exec.c | 425 ++++++++++++++++---------------
hw/acpi/core.c | 9 +-
hw/acpi/ich9.c | 10 +-
hw/acpi/piix4.c | 23 +-
hw/alpha/typhoon.c | 21 +-
hw/arm/armv7m.c | 10 +-
hw/arm/exynos4210.c | 12 +-
hw/arm/highbank.c | 8 +-
hw/arm/integratorcp.c | 13 +-
hw/arm/kzm.c | 6 +-
hw/arm/mainstone.c | 2 +-
hw/arm/musicpal.c | 24 +-
hw/arm/omap1.c | 52 ++--
hw/arm/omap2.c | 16 +-
hw/arm/omap_sx1.c | 14 +-
hw/arm/palm.c | 10 +-
hw/arm/pxa2xx.c | 34 +--
hw/arm/pxa2xx_gpio.c | 2 +-
hw/arm/pxa2xx_pic.c | 2 +-
hw/arm/realview.c | 8 +-
hw/arm/spitz.c | 4 +-
hw/arm/stellaris.c | 8 +-
hw/arm/strongarm.c | 20 +-
hw/arm/tosa.c | 2 +-
hw/arm/versatilepb.c | 5 +-
hw/arm/vexpress.c | 12 +-
hw/arm/xilinx_zynq.c | 4 +-
hw/audio/ac97.c | 6 +-
hw/audio/adlib.c | 20 +-
hw/audio/cs4231.c | 3 +-
hw/audio/cs4231a.c | 3 +-
hw/audio/es1370.c | 2 +-
hw/audio/intel-hda.c | 2 +-
hw/audio/marvell_88w8618.c | 2 +-
hw/audio/milkymist-ac97.c | 2 +-
hw/audio/pcspk.c | 2 +-
hw/audio/pl041.c | 2 +-
hw/block/fdc.c | 7 +-
hw/block/nvme.c | 3 +-
hw/block/onenand.c | 10 +-
hw/block/pc_sysfw.c | 6 +-
hw/block/pflash_cfi01.c | 3 +-
hw/block/pflash_cfi02.c | 8 +-
hw/char/cadence_uart.c | 2 +-
hw/char/debugcon.c | 2 +-
hw/char/escc.c | 36 +--
hw/char/etraxfs_ser.c | 3 +-
hw/char/exynos4210_uart.c | 4 +-
hw/char/grlib_apbuart.c | 2 +-
hw/char/imx_serial.c | 3 +-
hw/char/lm32_uart.c | 3 +-
hw/char/mcf_uart.c | 2 +-
hw/char/milkymist-uart.c | 2 +-
hw/char/omap_uart.c | 2 +-
hw/char/parallel.c | 2 +-
hw/char/pl011.c | 2 +-
hw/char/serial-isa.c | 2 +-
hw/char/serial-pci.c | 7 +-
hw/char/serial.c | 4 +-
hw/char/sh_serial.c | 6 +-
hw/char/tpci200.c | 12 +-
hw/char/xilinx_uartlite.c | 4 +-
hw/core/empty_slot.c | 2 +-
hw/core/loader.c | 1 +
hw/cpu/a15mpcore.c | 3 +-
hw/cpu/a9mpcore.c | 2 +-
hw/cpu/arm11mpcore.c | 6 +-
hw/cpu/icc_bus.c | 2 +-
hw/cris/axis_dev88.c | 8 +-
hw/display/cirrus_vga.c | 28 +-
hw/display/exynos4210_fimd.c | 8 +-
hw/display/framebuffer.c | 12 +-
hw/display/g364fb.c | 4 +-
hw/display/jazz_led.c | 2 +-
hw/display/milkymist-tmu2.c | 2 +-
hw/display/milkymist-vgafb.c | 2 +-
hw/display/omap_dss.c | 10 +-
hw/display/omap_lcdc.c | 2 +-
hw/display/pl110.c | 2 +-
hw/display/pxa2xx_lcd.c | 2 +-
hw/display/qxl.c | 26 +-
hw/display/sm501.c | 8 +-
hw/display/tc6393xb.c | 4 +-
hw/display/tcx.c | 18 +-
hw/display/vga-isa-mm.c | 8 +-
hw/display/vga-isa.c | 6 +-
hw/display/vga-pci.c | 13 +-
hw/display/vga.c | 23 +-
hw/display/vga_int.h | 8 +-
hw/display/vmware_vga.c | 14 +-
hw/dma/etraxfs_dma.c | 2 +-
hw/dma/i82374.c | 18 +-
hw/dma/i8257.c | 4 +-
hw/dma/omap_dma.c | 4 +-
hw/dma/pl080.c | 2 +-
hw/dma/pl330.c | 3 +-
hw/dma/puv3_dma.c | 2 +-
hw/dma/pxa2xx_dma.c | 2 +-
hw/dma/rc4030.c | 4 +-
hw/dma/sparc32_dma.c | 3 +-
hw/dma/sun4m_iommu.c | 2 +-
hw/dma/xilinx_axidma.c | 2 +-
hw/gpio/omap_gpio.c | 6 +-
hw/gpio/pl061.c | 2 +-
hw/gpio/puv3_gpio.c | 2 +-
hw/gpio/zaurus.c | 2 +-
hw/i2c/bitbang_i2c.c | 2 +-
hw/i2c/exynos4210_i2c.c | 4 +-
hw/i2c/omap_i2c.c | 2 +-
hw/i2c/pm_smbus.c | 3 +-
hw/i2c/versatile_i2c.c | 2 +-
hw/i386/kvm/apic.c | 2 +-
hw/i386/kvm/i8254.c | 2 +-
hw/i386/kvm/i8259.c | 4 +-
hw/i386/kvm/ioapic.c | 2 +-
hw/i386/kvm/pci-assign.c | 24 +-
hw/i386/kvmvapic.c | 7 +-
hw/i386/pc.c | 14 +-
hw/i386/pc_piix.c | 2 +-
hw/i386/pc_q35.c | 2 +-
hw/ide/ahci.c | 9 +-
hw/ide/cmd646.c | 13 +-
hw/ide/macio.c | 6 +-
hw/ide/mmio.c | 4 +-
hw/ide/piix.c | 8 +-
hw/ide/via.c | 8 +-
hw/input/milkymist-softusb.c | 6 +-
hw/input/pckbd.c | 8 +-
hw/input/pl050.c | 2 +-
hw/input/pxa2xx_keypad.c | 2 +-
hw/intc/apic.c | 2 +-
hw/intc/arm_gic.c | 9 +-
hw/intc/arm_gic_kvm.c | 6 +-
hw/intc/armv7m_nvic.c | 7 +-
hw/intc/etraxfs_pic.c | 3 +-
hw/intc/exynos4210_combiner.c | 2 +-
hw/intc/exynos4210_gic.c | 8 +-
hw/intc/grlib_irqmp.c | 2 +-
hw/intc/heathrow_pic.c | 2 +-
hw/intc/i8259.c | 6 +-
hw/intc/imx_avic.c | 3 +-
hw/intc/ioapic.c | 3 +-
hw/intc/omap_intc.c | 4 +-
hw/intc/openpic.c | 6 +-
hw/intc/openpic_kvm.c | 2 +-
hw/intc/pl190.c | 2 +-
hw/intc/puv3_intc.c | 2 +-
hw/intc/realview_gic.c | 3 +-
hw/intc/sh_intc.c | 6 +-
hw/intc/slavio_intctl.c | 5 +-
hw/intc/xilinx_intc.c | 3 +-
hw/isa/apm.c | 2 +-
hw/isa/i82378.c | 6 +-
hw/isa/isa-bus.c | 2 +-
hw/isa/isa_mmio.c | 2 +-
hw/isa/lpc_ich9.c | 13 +-
hw/isa/pc87312.c | 2 +-
hw/isa/vt82c686.c | 42 +--
hw/lm32/lm32_boards.c | 4 +-
hw/lm32/milkymist.c | 2 +-
hw/m68k/an5206.c | 4 +-
hw/m68k/dummy_m68k.c | 2 +-
hw/m68k/mcf5206.c | 2 +-
hw/m68k/mcf5208.c | 8 +-
hw/m68k/mcf_intc.c | 2 +-
hw/microblaze/petalogix_ml605_mmu.c | 4 +-
hw/microblaze/petalogix_s3adsp1800_mmu.c | 4 +-
hw/mips/gt64xxx_pci.c | 2 +-
hw/mips/mips_fulong2e.c | 4 +-
hw/mips/mips_jazz.c | 12 +-
hw/mips/mips_malta.c | 10 +-
hw/mips/mips_mipssim.c | 4 +-
hw/mips/mips_r4k.c | 6 +-
hw/misc/a9scu.c | 3 +-
hw/misc/applesmc.c | 50 +++-
hw/misc/arm_l2x0.c | 3 +-
hw/misc/arm_sysctl.c | 3 +-
hw/misc/debugexit.c | 2 +-
hw/misc/eccmemctl.c | 4 +-
hw/misc/exynos4210_pmu.c | 4 +-
hw/misc/imx_ccm.c | 3 +-
hw/misc/ivshmem.c | 8 +-
hw/misc/lm32_sys.c | 3 +-
hw/misc/macio/cuda.c | 2 +-
hw/misc/macio/mac_dbdma.c | 2 +-
hw/misc/macio/macio.c | 8 +-
hw/misc/milkymist-hpdmc.c | 2 +-
hw/misc/milkymist-pfpu.c | 2 +-
hw/misc/mst_fpga.c | 2 +-
hw/misc/omap_gpmc.c | 8 +-
hw/misc/omap_l4.c | 2 +-
hw/misc/omap_sdrc.c | 2 +-
hw/misc/omap_tap.c | 2 +-
hw/misc/pc-testdev.c | 8 +-
hw/misc/pci-testdev.c | 4 +-
hw/misc/puv3_pm.c | 2 +-
hw/misc/pvpanic.c | 2 +-
hw/misc/pxa2xx_pcmcia.c | 6 +-
hw/misc/slavio_misc.c | 16 +-
hw/misc/vfio.c | 37 +--
hw/misc/vmport.c | 6 +-
hw/misc/zynq_slcr.c | 2 +-
hw/moxie/moxiesim.c | 4 +-
hw/net/cadence_gem.c | 3 +-
hw/net/dp8393x.c | 2 +-
hw/net/e1000.c | 6 +-
hw/net/eepro100.c | 12 +-
hw/net/etraxfs_eth.c | 3 +-
hw/net/lan9118.c | 3 +-
hw/net/lance.c | 3 +-
hw/net/mcf_fec.c | 2 +-
hw/net/milkymist-minimac2.c | 4 +-
hw/net/mipsnet.c | 3 +-
hw/net/ne2000-isa.c | 2 +-
hw/net/ne2000.c | 6 +-
hw/net/ne2000.h | 2 +-
hw/net/opencores_eth.c | 4 +-
hw/net/pcnet-pci.c | 6 +-
hw/net/rtl8139.c | 6 +-
hw/net/smc91c111.c | 2 +-
hw/net/stellaris_enet.c | 4 +-
hw/net/vmxnet3.c | 6 +-
hw/net/xgmac.c | 3 +-
hw/net/xilinx_axienet.c | 2 +-
hw/net/xilinx_ethlite.c | 4 +-
hw/nvram/ds1225y.c | 3 +-
hw/nvram/fw_cfg.c | 6 +-
hw/nvram/mac_nvram.c | 4 +-
hw/openrisc/openrisc_sim.c | 2 +-
hw/pci-bridge/dec.c | 4 +-
hw/pci-bridge/pci_bridge_dev.c | 2 +-
hw/pci-host/apb.c | 12 +-
hw/pci-host/bonito.c | 10 +-
hw/pci-host/grackle.c | 8 +-
hw/pci-host/pam.c | 16 +-
hw/pci-host/piix.c | 17 +-
hw/pci-host/ppce500.c | 12 +-
hw/pci-host/prep.c | 8 +-
hw/pci-host/q35.c | 14 +-
hw/pci-host/uninorth.c | 24 +-
hw/pci-host/versatile.c | 16 +-
hw/pci/msix.c | 6 +-
hw/pci/pci.c | 5 +-
hw/pci/pci_bridge.c | 12 +-
hw/pci/pcie_host.c | 3 +-
hw/pci/shpc.c | 4 +-
hw/ppc/e500.c | 4 +-
hw/ppc/mac_newworld.c | 10 +-
hw/ppc/mac_oldworld.c | 6 +-
hw/ppc/mpc8544_guts.c | 2 +-
hw/ppc/ppc405_boards.c | 18 +-
hw/ppc/ppc405_uc.c | 12 +-
hw/ppc/ppc4xx_devs.c | 4 +-
hw/ppc/ppc4xx_pci.c | 8 +-
hw/ppc/ppce500_spin.c | 4 +-
hw/ppc/prep.c | 31 ++-
hw/ppc/spapr.c | 2 +-
hw/ppc/spapr_iommu.c | 4 +-
hw/ppc/spapr_pci.c | 15 +-
hw/ppc/spapr_vio.c | 2 +-
hw/ppc/virtex_ml507.c | 2 +-
hw/s390x/s390-virtio-ccw.c | 2 +-
hw/s390x/s390-virtio.c | 2 +-
hw/scsi/esp-pci.c | 3 +-
hw/scsi/esp.c | 4 +-
hw/scsi/lsi53c895a.c | 9 +-
hw/scsi/megasas.c | 6 +-
hw/scsi/scsi-bus.c | 4 +
hw/scsi/virtio-scsi.c | 10 +-
hw/scsi/vmw_pvscsi.c | 2 +-
hw/sd/milkymist-memcard.c | 2 +-
hw/sd/omap_mmc.c | 4 +-
hw/sd/pl181.c | 2 +-
hw/sd/pxa2xx_mmci.c | 2 +-
hw/sd/sdhci.c | 2 +-
hw/sh4/r2d.c | 4 +-
hw/sh4/sh7750.c | 16 +-
hw/sh4/sh_pci.c | 6 +-
hw/sh4/shix.c | 6 +-
hw/sparc/leon3.c | 4 +-
hw/sparc/sun4m.c | 9 +-
hw/sparc64/sun4u.c | 4 +-
hw/ssi/omap_spi.c | 2 +-
hw/ssi/pl022.c | 2 +-
hw/ssi/xilinx_spi.c | 3 +-
hw/ssi/xilinx_spips.c | 5 +-
hw/timer/arm_mptimer.c | 4 +-
hw/timer/arm_timer.c | 6 +-
hw/timer/cadence_ttc.c | 3 +-
hw/timer/etraxfs_timer.c | 3 +-
hw/timer/exynos4210_mct.c | 4 +-
hw/timer/exynos4210_pwm.c | 4 +-
hw/timer/exynos4210_rtc.c | 4 +-
hw/timer/grlib_gptimer.c | 3 +-
hw/timer/hpet.c | 2 +-
hw/timer/i8254.c | 3 +-
hw/timer/imx_epit.c | 2 +-
hw/timer/imx_gpt.c | 2 +-
hw/timer/lm32_timer.c | 3 +-
hw/timer/m48t59.c | 8 +-
hw/timer/mc146818rtc.c | 2 +-
hw/timer/milkymist-sysctl.c | 2 +-
hw/timer/omap_gptimer.c | 2 +-
hw/timer/omap_synctimer.c | 2 +-
hw/timer/pl031.c | 2 +-
hw/timer/puv3_ost.c | 2 +-
hw/timer/pxa2xx_timer.c | 2 +-
hw/timer/sh_timer.c | 6 +-
hw/timer/slavio_timer.c | 2 +-
hw/timer/tusb6010.c | 4 +-
hw/timer/xilinx_timer.c | 2 +-
hw/tpm/tpm_tis.c | 3 +-
hw/unicore32/puv3.c | 2 +-
hw/usb/hcd-ehci-sysbus.c | 2 +-
hw/usb/hcd-ehci.c | 12 +-
hw/usb/hcd-ohci.c | 3 +-
hw/usb/hcd-uhci.c | 4 +-
hw/usb/hcd-xhci.c | 12 +-
hw/virtio/dataplane/hostmem.c | 7 +
hw/virtio/vhost.c | 11 +-
hw/virtio/virtio-balloon.c | 1 +
hw/virtio/virtio-pci.c | 4 +-
hw/watchdog/wdt_i6300esb.c | 3 +-
hw/watchdog/wdt_ib700.c | 12 +-
hw/xen/xen_apic.c | 4 +-
hw/xen/xen_platform.c | 11 +-
hw/xen/xen_pt.c | 8 +-
hw/xen/xen_pt_msi.c | 3 +-
hw/xtensa/xtensa_lx60.c | 12 +-
hw/xtensa/xtensa_sim.c | 4 +-
include/exec/cpu-common.h | 3 +-
include/exec/ioport.h | 30 +--
include/exec/iorange.h | 31 ---
include/exec/memory-internal.h | 2 -
include/exec/memory.h | 156 ++++++++----
include/hw/i386/pc.h | 6 +-
include/hw/pci-host/pam.h | 4 +-
include/hw/pci/pci.h | 2 +-
include/hw/ppc/spapr.h | 3 +-
include/hw/virtio/dataplane/hostmem.h | 1 +
include/qemu/atomic.h | 198 +++++++++++---
include/qemu/int128.h | 25 +-
include/sysemu/dma.h | 4 +-
ioport.c | 383 ++++++++--------------------
kvm-all.c | 2 +
memory.c | 290 ++++++++++++---------
migration.c | 3 +-
qom/object.c | 5 +-
target-arm/kvm.c | 2 +
target-i386/kvm.c | 4 +-
target-ppc/kvm.c | 2 +-
target-sparc/mmu_helper.c | 1 +
tests/Makefile | 6 +-
tests/test-int128.c | 212 +++++++++++++++
tests/test-thread-pool.c | 8 +-
xen-all.c | 10 +-
359 files changed, 2551 insertions(+), 1711 deletions(-)
create mode 100644 docs/atomics.txt
delete mode 100644 include/exec/iorange.h
create mode 100644 tests/test-int128.c
--
1.8.1.4
^ permalink raw reply [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 01/66] int128: optimize and add test cases
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
@ 2013-07-04 15:12 ` Paolo Bonzini
2013-07-04 15:12 ` [Qemu-devel] [PATCH 02/66] scsi: keep device alive while it has requests Paolo Bonzini
` (64 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:12 UTC (permalink / raw)
To: qemu-devel
For add, the carry only requires checking one of the arguments.
For sub and neg, we can similarly optimize computation of the
carry.
For ge, we can just do lexicographic order.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
include/qemu/int128.h | 25 ++++--
tests/Makefile | 6 +-
tests/test-int128.c | 212 ++++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 234 insertions(+), 9 deletions(-)
create mode 100644 tests/test-int128.c
diff --git a/include/qemu/int128.h b/include/qemu/int128.h
index bfe7678..9ed47aa 100644
--- a/include/qemu/int128.h
+++ b/include/qemu/int128.h
@@ -1,6 +1,10 @@
#ifndef INT128_H
#define INT128_H
+#include <assert.h>
+#include <stdint.h>
+#include <stdbool.h>
+
typedef struct Int128 Int128;
struct Int128 {
@@ -55,21 +59,26 @@ static inline Int128 int128_rshift(Int128 a, int n)
static inline Int128 int128_add(Int128 a, Int128 b)
{
- Int128 r = { a.lo + b.lo, a.hi + b.hi };
- r.hi += (r.lo < a.lo) || (r.lo < b.lo);
- return r;
+ uint64_t lo = a.lo + b.lo;
+
+ /* a.lo <= a.lo + b.lo < a.lo + k (k is the base, 2^64). Hence,
+ * a.lo + b.lo >= k implies 0 <= lo = a.lo + b.lo - k < a.lo.
+ * Similarly, a.lo + b.lo < k implies a.lo <= lo = a.lo + b.lo < k.
+ *
+ * So the carry is lo < a.lo.
+ */
+ return (Int128) { lo, (uint64_t)a.hi + b.hi + (lo < a.lo) };
}
static inline Int128 int128_neg(Int128 a)
{
- a.lo = ~a.lo;
- a.hi = ~a.hi;
- return int128_add(a, int128_one());
+ uint64_t lo = -a.lo;
+ return (Int128) { lo, ~(uint64_t)a.hi + !lo };
}
static inline Int128 int128_sub(Int128 a, Int128 b)
{
- return int128_add(a, int128_neg(b));
+ return (Int128){ a.lo - b.lo, a.hi - b.hi - (a.lo < b.lo) };
}
static inline bool int128_nonneg(Int128 a)
@@ -89,7 +98,7 @@ static inline bool int128_ne(Int128 a, Int128 b)
static inline bool int128_ge(Int128 a, Int128 b)
{
- return int128_nonneg(int128_sub(a, b));
+ return a.hi > b.hi || (a.hi == b.hi && a.lo >= b.lo);
}
static inline bool int128_lt(Int128 a, Int128 b)
diff --git a/tests/Makefile b/tests/Makefile
index c107489..279d5f8 100644
--- a/tests/Makefile
+++ b/tests/Makefile
@@ -44,6 +44,9 @@ check-unit-y += tests/test-cutils$(EXESUF)
gcov-files-test-cutils-y += util/cutils.c
check-unit-y += tests/test-mul64$(EXESUF)
gcov-files-test-mul64-y = util/host-utils.c
+check-unit-y += tests/test-int128$(EXESUF)
+# all code tested by test-int128 is inside int128.h
+gcov-files-test-int128-y =
check-block-$(CONFIG_POSIX) += tests/qemu-iotests-quick.sh
@@ -75,7 +78,7 @@ test-obj-y = tests/check-qint.o tests/check-qstring.o tests/check-qdict.o \
tests/test-string-input-visitor.o tests/test-qmp-output-visitor.o \
tests/test-qmp-input-visitor.o tests/test-qmp-input-strict.o \
tests/test-qmp-commands.o tests/test-visitor-serialization.o \
- tests/test-x86-cpuid.o tests/test-mul64.o
+ tests/test-x86-cpuid.o tests/test-mul64.o tests/test-int128.o
test-qapi-obj-y = tests/test-qapi-visit.o tests/test-qapi-types.o
@@ -98,6 +101,7 @@ tests/test-hbitmap$(EXESUF): tests/test-hbitmap.o libqemuutil.a libqemustub.a
tests/test-x86-cpuid$(EXESUF): tests/test-x86-cpuid.o
tests/test-xbzrle$(EXESUF): tests/test-xbzrle.o xbzrle.o page_cache.o libqemuutil.a
tests/test-cutils$(EXESUF): tests/test-cutils.o util/cutils.o
+tests/test-int128$(EXESUF): tests/test-int128.o
tests/test-qapi-types.c tests/test-qapi-types.h :\
$(SRC_PATH)/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-types.py
diff --git a/tests/test-int128.c b/tests/test-int128.c
new file mode 100644
index 0000000..5aca032
--- /dev/null
+++ b/tests/test-int128.c
@@ -0,0 +1,212 @@
+/*
+ * Test Int128 arithmetic
+ *
+ * This work is licensed under the terms of the GNU LGPL, version 2 or later.
+ * See the COPYING.LIB file in the top-level directory.
+ *
+ */
+
+#include <glib.h>
+#include <stdio.h>
+#include "qemu/int128.h"
+#include "qemu/osdep.h"
+
+static uint32_t tests[8] = {
+ 0x00000000, 0x00000001, 0x7FFFFFFE, 0x7FFFFFFF,
+ 0x80000000, 0x80000001, 0xFFFFFFFE, 0xFFFFFFFF,
+};
+
+#define LOW 3ULL
+#define HIGH (1ULL << 63)
+#define MIDDLE (-1ULL & ~LOW & ~HIGH)
+
+static uint64_t expand16(unsigned x)
+{
+ return (x & LOW) | ((x & 4) ? MIDDLE : 0) | (x & 0x8000 ? HIGH : 0);
+}
+
+static Int128 expand(uint32_t x)
+{
+ uint64_t l, h;
+ l = expand16(x & 65535);
+ h = expand16(x >> 16);
+ return (Int128) {l, h};
+};
+
+static void test_and(void)
+{
+ int i, j;
+
+ for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+ for (j = 0; j < ARRAY_SIZE(tests); ++j) {
+ Int128 a = expand(tests[i]);
+ Int128 b = expand(tests[j]);
+ Int128 r = expand(tests[i] & tests[j]);
+ Int128 s = int128_and(a, b);
+ g_assert_cmpuint(r.lo, ==, s.lo);
+ g_assert_cmpuint(r.hi, ==, s.hi);
+ }
+ }
+}
+
+static void test_add(void)
+{
+ int i, j;
+
+ for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+ for (j = 0; j < ARRAY_SIZE(tests); ++j) {
+ Int128 a = expand(tests[i]);
+ Int128 b = expand(tests[j]);
+ Int128 r = expand(tests[i] + tests[j]);
+ Int128 s = int128_add(a, b);
+ g_assert_cmpuint(r.lo, ==, s.lo);
+ g_assert_cmpuint(r.hi, ==, s.hi);
+ }
+ }
+}
+
+static void test_sub(void)
+{
+ int i, j;
+
+ for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+ for (j = 0; j < ARRAY_SIZE(tests); ++j) {
+ Int128 a = expand(tests[i]);
+ Int128 b = expand(tests[j]);
+ Int128 r = expand(tests[i] - tests[j]);
+ Int128 s = int128_sub(a, b);
+ g_assert_cmpuint(r.lo, ==, s.lo);
+ g_assert_cmpuint(r.hi, ==, s.hi);
+ }
+ }
+}
+
+static void test_neg(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+ Int128 a = expand(tests[i]);
+ Int128 r = expand(-tests[i]);
+ Int128 s = int128_neg(a);
+ g_assert_cmpuint(r.lo, ==, s.lo);
+ g_assert_cmpuint(r.hi, ==, s.hi);
+ }
+}
+
+static void test_nz(void)
+{
+ int i, j;
+
+ for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+ for (j = 0; j < ARRAY_SIZE(tests); ++j) {
+ Int128 a = expand(tests[i]);
+ g_assert_cmpuint(int128_nz(a), ==, tests[i] != 0);
+ }
+ }
+}
+
+static void test_le(void)
+{
+ int i, j;
+
+ for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+ for (j = 0; j < ARRAY_SIZE(tests); ++j) {
+ /* Signed comparison */
+ int32_t a = (int32_t) tests[i];
+ int32_t b = (int32_t) tests[j];
+ g_assert_cmpuint(int128_le(expand(a), expand(b)), ==, a <= b);
+ }
+ }
+}
+
+static void test_lt(void)
+{
+ int i, j;
+
+ for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+ for (j = 0; j < ARRAY_SIZE(tests); ++j) {
+ /* Signed comparison */
+ int32_t a = (int32_t) tests[i];
+ int32_t b = (int32_t) tests[j];
+ g_assert_cmpuint(int128_lt(expand(a), expand(b)), ==, a < b);
+ }
+ }
+}
+
+static void test_ge(void)
+{
+ int i, j;
+
+ for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+ for (j = 0; j < ARRAY_SIZE(tests); ++j) {
+ /* Signed comparison */
+ int32_t a = (int32_t) tests[i];
+ int32_t b = (int32_t) tests[j];
+ g_assert_cmpuint(int128_ge(expand(a), expand(b)), ==, a >= b);
+ }
+ }
+}
+
+static void test_gt(void)
+{
+ int i, j;
+
+ for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+ for (j = 0; j < ARRAY_SIZE(tests); ++j) {
+ /* Signed comparison */
+ int32_t a = (int32_t) tests[i];
+ int32_t b = (int32_t) tests[j];
+ g_assert_cmpuint(int128_gt(expand(a), expand(b)), ==, a > b);
+ }
+ }
+}
+
+/* Make sure to test undefined behavior at runtime! */
+
+static void __attribute__((__noinline__, __noclone__))
+test_rshift_one(uint32_t x, int n, uint64_t h, uint64_t l)
+{
+ Int128 a = expand(x);
+ Int128 r = int128_rshift(a, n);
+ g_assert_cmpuint(r.lo, ==, l);
+ g_assert_cmpuint(r.hi, ==, h);
+}
+
+static void test_rshift(void)
+{
+ test_rshift_one(0x00010000U, 64, 0x0000000000000000ULL, 0x0000000000000001ULL);
+ test_rshift_one(0x80010000U, 64, 0xFFFFFFFFFFFFFFFFULL, 0x8000000000000001ULL);
+ test_rshift_one(0x7FFE0000U, 64, 0x0000000000000000ULL, 0x7FFFFFFFFFFFFFFEULL);
+ test_rshift_one(0xFFFE0000U, 64, 0xFFFFFFFFFFFFFFFFULL, 0xFFFFFFFFFFFFFFFEULL);
+ test_rshift_one(0x00010000U, 60, 0x0000000000000000ULL, 0x0000000000000010ULL);
+ test_rshift_one(0x80010000U, 60, 0xFFFFFFFFFFFFFFF8ULL, 0x0000000000000010ULL);
+ test_rshift_one(0x00018000U, 60, 0x0000000000000000ULL, 0x0000000000000018ULL);
+ test_rshift_one(0x80018000U, 60, 0xFFFFFFFFFFFFFFF8ULL, 0x0000000000000018ULL);
+ test_rshift_one(0x7FFE0000U, 60, 0x0000000000000007ULL, 0xFFFFFFFFFFFFFFE0ULL);
+ test_rshift_one(0xFFFE0000U, 60, 0xFFFFFFFFFFFFFFFFULL, 0xFFFFFFFFFFFFFFE0ULL);
+ test_rshift_one(0x7FFE8000U, 60, 0x0000000000000007ULL, 0xFFFFFFFFFFFFFFE8ULL);
+ test_rshift_one(0xFFFE8000U, 60, 0xFFFFFFFFFFFFFFFFULL, 0xFFFFFFFFFFFFFFE8ULL);
+ test_rshift_one(0x00018000U, 0, 0x0000000000000001ULL, 0x8000000000000000ULL);
+ test_rshift_one(0x80018000U, 0, 0x8000000000000001ULL, 0x8000000000000000ULL);
+ test_rshift_one(0x7FFE0000U, 0, 0x7FFFFFFFFFFFFFFEULL, 0x0000000000000000ULL);
+ test_rshift_one(0xFFFE0000U, 0, 0xFFFFFFFFFFFFFFFEULL, 0x0000000000000000ULL);
+ test_rshift_one(0x7FFE8000U, 0, 0x7FFFFFFFFFFFFFFEULL, 0x8000000000000000ULL);
+ test_rshift_one(0xFFFE8000U, 0, 0xFFFFFFFFFFFFFFFEULL, 0x8000000000000000ULL);
+}
+
+int main(int argc, char **argv)
+{
+ g_test_init(&argc, &argv, NULL);
+ g_test_add_func("/int128/int128_and", test_and);
+ g_test_add_func("/int128/int128_add", test_add);
+ g_test_add_func("/int128/int128_sub", test_sub);
+ g_test_add_func("/int128/int128_neg", test_neg);
+ g_test_add_func("/int128/int128_nz", test_nz);
+ g_test_add_func("/int128/int128_le", test_le);
+ g_test_add_func("/int128/int128_lt", test_lt);
+ g_test_add_func("/int128/int128_ge", test_ge);
+ g_test_add_func("/int128/int128_gt", test_gt);
+ g_test_add_func("/int128/int128_rshift", test_rshift);
+ return g_test_run();
+}
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 02/66] scsi: keep device alive while it has requests
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
2013-07-04 15:12 ` [Qemu-devel] [PATCH 01/66] int128: optimize and add test cases Paolo Bonzini
@ 2013-07-04 15:12 ` Paolo Bonzini
2013-07-04 15:12 ` [Qemu-devel] [PATCH 03/66] dma: keep a device alive while it has SGLists Paolo Bonzini
` (63 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:12 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/scsi/scsi-bus.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c
index 53ea906..e443193 100644
--- a/hw/scsi/scsi-bus.c
+++ b/hw/scsi/scsi-bus.c
@@ -516,6 +516,8 @@ SCSIRequest *scsi_req_alloc(const SCSIReqOps *reqops, SCSIDevice *d,
req->status = -1;
req->sense_len = 0;
req->ops = reqops;
+ object_ref(OBJECT(d));
+ object_ref(OBJECT(req->bus->qbus.parent));
trace_scsi_req_alloc(req->dev->id, req->lun, req->tag);
return req;
}
@@ -1505,6 +1507,8 @@ void scsi_req_unref(SCSIRequest *req)
if (req->ops->free_req) {
req->ops->free_req(req);
}
+ object_unref(OBJECT(req->dev));
+ object_unref(OBJECT(bus->qbus.parent));
g_free(req);
}
}
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 03/66] dma: keep a device alive while it has SGLists
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
2013-07-04 15:12 ` [Qemu-devel] [PATCH 01/66] int128: optimize and add test cases Paolo Bonzini
2013-07-04 15:12 ` [Qemu-devel] [PATCH 02/66] scsi: keep device alive while it has requests Paolo Bonzini
@ 2013-07-04 15:12 ` Paolo Bonzini
2013-07-04 15:51 ` Jan Kiszka
2013-07-04 15:13 ` [Qemu-devel] [PATCH 04/66] adlib: replace register_ioport* Paolo Bonzini
` (62 subsequent siblings)
65 siblings, 1 reply; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:12 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
dma-helpers.c | 6 +++++-
hw/ide/ahci.c | 3 ++-
hw/ide/macio.c | 4 ++--
hw/scsi/virtio-scsi.c | 10 ++++++----
hw/usb/hcd-ehci.c | 4 ++--
include/hw/pci/pci.h | 2 +-
include/sysemu/dma.h | 4 +++-
7 files changed, 21 insertions(+), 12 deletions(-)
diff --git a/dma-helpers.c b/dma-helpers.c
index 5afba47..499550f 100644
--- a/dma-helpers.c
+++ b/dma-helpers.c
@@ -34,13 +34,16 @@ int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len)
return error;
}
-void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint, AddressSpace *as)
+void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev, int alloc_hint,
+ AddressSpace *as)
{
qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry));
qsg->nsg = 0;
qsg->nalloc = alloc_hint;
qsg->size = 0;
qsg->as = as;
+ qsg->dev = dev;
+ object_ref(OBJECT(dev));
}
void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
@@ -57,6 +60,7 @@ void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
void qemu_sglist_destroy(QEMUSGList *qsg)
{
+ object_unref(OBJECT(qsg->dev));
g_free(qsg->sg);
memset(qsg, 0, sizeof(*qsg));
}
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 1adfa0b..6b87549 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -691,7 +691,8 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset)
goto out;
}
- qemu_sglist_init(sglist, (sglist_alloc_hint - off_idx), ad->hba->as);
+ qemu_sglist_init(sglist, DEVICE(ad->hba), (sglist_alloc_hint - off_idx),
+ ad->hba->as);
qemu_sglist_add(sglist, le64_to_cpu(tbl[off_idx].addr + off_pos),
le32_to_cpu(tbl[off_idx].flags_size) + 1 - off_pos);
diff --git a/hw/ide/macio.c b/hw/ide/macio.c
index a1952b0..84288ae 100644
--- a/hw/ide/macio.c
+++ b/hw/ide/macio.c
@@ -70,7 +70,7 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
s->io_buffer_size = io->len;
- qemu_sglist_init(&s->sg, io->len / MACIO_PAGE_SIZE + 1,
+ qemu_sglist_init(&s->sg, DEVICE(m), io->len / MACIO_PAGE_SIZE + 1,
&address_space_memory);
qemu_sglist_add(&s->sg, io->addr, io->len);
io->addr += io->len;
@@ -127,7 +127,7 @@ static void pmac_ide_transfer_cb(void *opaque, int ret)
s->io_buffer_index = 0;
s->io_buffer_size = io->len;
- qemu_sglist_init(&s->sg, io->len / MACIO_PAGE_SIZE + 1,
+ qemu_sglist_init(&s->sg, DEVICE(m), io->len / MACIO_PAGE_SIZE + 1,
&address_space_memory);
qemu_sglist_add(&s->sg, io->addr, io->len);
io->addr += io->len;
diff --git a/hw/scsi/virtio-scsi.c b/hw/scsi/virtio-scsi.c
index b8a0abf..712f0ad 100644
--- a/hw/scsi/virtio-scsi.c
+++ b/hw/scsi/virtio-scsi.c
@@ -77,10 +77,12 @@ static void virtio_scsi_bad_req(void)
exit(1);
}
-static void qemu_sgl_init_external(QEMUSGList *qsgl, struct iovec *sg,
+static void qemu_sgl_init_external(VirtIOSCSIReq *req, struct iovec *sg,
hwaddr *addr, int num)
{
- qemu_sglist_init(qsgl, num, &address_space_memory);
+ QEMUSGList *qsgl = &req->qsgl;
+
+ qemu_sglist_init(qsgl, DEVICE(req->dev), num, &address_space_memory);
while (num--) {
qemu_sglist_add(qsgl, *(addr++), (sg++)->iov_len);
}
@@ -99,11 +101,11 @@ static void virtio_scsi_parse_req(VirtIOSCSI *s, VirtQueue *vq,
req->resp.buf = req->elem.in_sg[0].iov_base;
if (req->elem.out_num > 1) {
- qemu_sgl_init_external(&req->qsgl, &req->elem.out_sg[1],
+ qemu_sgl_init_external(req, &req->elem.out_sg[1],
&req->elem.out_addr[1],
req->elem.out_num - 1);
} else {
- qemu_sgl_init_external(&req->qsgl, &req->elem.in_sg[1],
+ qemu_sgl_init_external(req, &req->elem.in_sg[1],
&req->elem.in_addr[1],
req->elem.in_num - 1);
}
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index 16d6356..65e6680 100644
--- a/hw/usb/hcd-ehci.c
+++ b/hw/usb/hcd-ehci.c
@@ -1245,7 +1245,7 @@ static int ehci_init_transfer(EHCIPacket *p)
cpage = get_field(p->qtd.token, QTD_TOKEN_CPAGE);
bytes = get_field(p->qtd.token, QTD_TOKEN_TBYTES);
offset = p->qtd.bufptr[0] & ~QTD_BUFPTR_MASK;
- qemu_sglist_init(&p->sgl, 5, p->queue->ehci->as);
+ qemu_sglist_init(&p->sgl, DEVICE(p->queue->ehci), 5, p->queue->ehci->as);
while (bytes > 0) {
if (cpage > 4) {
@@ -1484,7 +1484,7 @@ static int ehci_process_itd(EHCIState *ehci,
return -1;
}
- qemu_sglist_init(&ehci->isgl, 2, ehci->as);
+ qemu_sglist_init(&ehci->isgl, DEVICE(ehci), 2, ehci->as);
if (off + len > 4096) {
/* transfer crosses page border */
uint32_t len2 = off + len - 4096;
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 6ef1f97..de406d6 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -702,7 +702,7 @@ static inline void pci_dma_unmap(PCIDevice *dev, void *buffer, dma_addr_t len,
static inline void pci_dma_sglist_init(QEMUSGList *qsg, PCIDevice *dev,
int alloc_hint)
{
- qemu_sglist_init(qsg, alloc_hint, pci_get_address_space(dev));
+ qemu_sglist_init(qsg, DEVICE(dev), alloc_hint, pci_get_address_space(dev));
}
extern const VMStateDescription vmstate_pci_device;
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index 031d1f5..00f21f3 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -29,6 +29,7 @@ struct QEMUSGList {
int nsg;
int nalloc;
size_t size;
+ DeviceState *dev;
AddressSpace *as;
};
@@ -189,7 +190,8 @@ struct ScatterGatherEntry {
dma_addr_t len;
};
-void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint, AddressSpace *as);
+void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev, int alloc_hint,
+ AddressSpace *as);
void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len);
void qemu_sglist_destroy(QEMUSGList *qsg);
#endif
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 04/66] adlib: replace register_ioport*
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (2 preceding siblings ...)
2013-07-04 15:12 ` [Qemu-devel] [PATCH 03/66] dma: keep a device alive while it has SGLists Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 05/66] applesmc: " Paolo Bonzini
` (61 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka, malc
From: Jan Kiszka <jan.kiszka@siemens.com>
Convert over to memory regions to obsolete register_ioport*.
CC: malc <av1474@comtv.ru>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/audio/adlib.c | 20 ++++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/hw/audio/adlib.c b/hw/audio/adlib.c
index 6a7d377..8b9b81e 100644
--- a/hw/audio/adlib.c
+++ b/hw/audio/adlib.c
@@ -283,9 +283,17 @@ static void Adlib_fini (AdlibState *s)
AUD_remove_card (&s->card);
}
+static MemoryRegionPortio adlib_portio_list[] = {
+ { 0x388, 4, 1, .read = adlib_read, .write = adlib_write, },
+ { 0, 4, 1, .read = adlib_read, .write = adlib_write, },
+ { 0, 2, 1, .read = adlib_read, .write = adlib_write, },
+ PORTIO_END_OF_LIST(),
+};
+
static void adlib_realizefn (DeviceState *dev, Error **errp)
{
AdlibState *s = ADLIB(dev);
+ PortioList *port_list = g_new(PortioList, 1);
struct audsettings as;
if (glob_adlib) {
@@ -339,14 +347,10 @@ static void adlib_realizefn (DeviceState *dev, Error **errp)
s->samples = AUD_get_buffer_size_out (s->voice) >> SHIFT;
s->mixbuf = g_malloc0 (s->samples << SHIFT);
- register_ioport_read (0x388, 4, 1, adlib_read, s);
- register_ioport_write (0x388, 4, 1, adlib_write, s);
-
- register_ioport_read (s->port, 4, 1, adlib_read, s);
- register_ioport_write (s->port, 4, 1, adlib_write, s);
-
- register_ioport_read (s->port + 8, 2, 1, adlib_read, s);
- register_ioport_write (s->port + 8, 2, 1, adlib_write, s);
+ adlib_portio_list[1].offset = s->port;
+ adlib_portio_list[2].offset = s->port + 8;
+ portio_list_init (port_list, adlib_portio_list, s, "adlib");
+ portio_list_add (port_list, isa_address_space_io(&s->parent_obj), 0);
}
static Property adlib_properties[] = {
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 05/66] applesmc: replace register_ioport*
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (3 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 04/66] adlib: replace register_ioport* Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 06/66] wdt_ib700: " Paolo Bonzini
` (60 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka
From: Jan Kiszka <jan.kiszka@siemens.com>
Convert over to memory regions to obsolete register_ioport*.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/misc/applesmc.c | 50 ++++++++++++++++++++++++++++++++++++++------------
1 file changed, 38 insertions(+), 12 deletions(-)
diff --git a/hw/misc/applesmc.c b/hw/misc/applesmc.c
index 46f4fbd..83468dc 100644
--- a/hw/misc/applesmc.c
+++ b/hw/misc/applesmc.c
@@ -73,6 +73,8 @@ typedef struct AppleSMCState AppleSMCState;
struct AppleSMCState {
ISADevice parent_obj;
+ MemoryRegion io_data;
+ MemoryRegion io_cmd;
uint32_t iobase;
uint8_t cmd;
uint8_t status;
@@ -86,7 +88,8 @@ struct AppleSMCState {
QLIST_HEAD(, AppleSMCData) data_def;
};
-static void applesmc_io_cmd_writeb(void *opaque, uint32_t addr, uint32_t val)
+static void applesmc_io_cmd_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned size)
{
AppleSMCState *s = opaque;
@@ -115,7 +118,8 @@ static void applesmc_fill_data(AppleSMCState *s)
}
}
-static void applesmc_io_data_writeb(void *opaque, uint32_t addr, uint32_t val)
+static void applesmc_io_data_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned size)
{
AppleSMCState *s = opaque;
@@ -138,7 +142,8 @@ static void applesmc_io_data_writeb(void *opaque, uint32_t addr, uint32_t val)
}
}
-static uint32_t applesmc_io_data_readb(void *opaque, uint32_t addr1)
+static uint64_t applesmc_io_data_read(void *opaque, hwaddr addr1,
+ unsigned size)
{
AppleSMCState *s = opaque;
uint8_t retval = 0;
@@ -162,7 +167,7 @@ static uint32_t applesmc_io_data_readb(void *opaque, uint32_t addr1)
return retval;
}
-static uint32_t applesmc_io_cmd_readb(void *opaque, uint32_t addr1)
+static uint64_t applesmc_io_cmd_read(void *opaque, hwaddr addr1, unsigned size)
{
AppleSMCState *s = opaque;
@@ -201,18 +206,39 @@ static void qdev_applesmc_isa_reset(DeviceState *dev)
applesmc_add_key(s, "MSSD", 1, "\0x3");
}
+static const MemoryRegionOps applesmc_data_io_ops = {
+ .write = applesmc_io_data_write,
+ .read = applesmc_io_data_read,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 1,
+ },
+};
+
+static const MemoryRegionOps applesmc_cmd_io_ops = {
+ .write = applesmc_io_cmd_write,
+ .read = applesmc_io_cmd_read,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 1,
+ },
+};
+
static void applesmc_isa_realize(DeviceState *dev, Error **errp)
{
AppleSMCState *s = APPLE_SMC(dev);
- register_ioport_read(s->iobase + APPLESMC_DATA_PORT, 4, 1,
- applesmc_io_data_readb, s);
- register_ioport_read(s->iobase + APPLESMC_CMD_PORT, 4, 1,
- applesmc_io_cmd_readb, s);
- register_ioport_write(s->iobase + APPLESMC_DATA_PORT, 4, 1,
- applesmc_io_data_writeb, s);
- register_ioport_write(s->iobase + APPLESMC_CMD_PORT, 4, 1,
- applesmc_io_cmd_writeb, s);
+ memory_region_init_io(&s->io_data, &applesmc_data_io_ops, s,
+ "applesmc-data", 4);
+ isa_register_ioport(&s->parent_obj, &s->io_data,
+ s->iobase + APPLESMC_DATA_PORT);
+
+ memory_region_init_io(&s->io_cmd, &applesmc_cmd_io_ops, s,
+ "applesmc-cmd", 4);
+ isa_register_ioport(&s->parent_obj, &s->io_cmd,
+ s->iobase + APPLESMC_CMD_PORT);
if (!s->osk || (strlen(s->osk) != 64)) {
fprintf(stderr, "WARNING: Using AppleSMC with invalid key\n");
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 06/66] wdt_ib700: replace register_ioport*
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (4 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 05/66] applesmc: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 07/66] i82374: " Paolo Bonzini
` (59 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka
From: Jan Kiszka <jan.kiszka@siemens.com>
Convert over to memory regions to obsolete register_ioport*.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/watchdog/wdt_ib700.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/hw/watchdog/wdt_ib700.c b/hw/watchdog/wdt_ib700.c
index d85c894..597a923 100644
--- a/hw/watchdog/wdt_ib700.c
+++ b/hw/watchdog/wdt_ib700.c
@@ -97,15 +97,23 @@ static const VMStateDescription vmstate_ib700 = {
}
};
+static const MemoryRegionPortio wdt_portio_list[] = {
+ { 0x441, 2, 1, .write = ib700_write_disable_reg, },
+ { 0x443, 2, 1, .write = ib700_write_enable_reg, },
+ PORTIO_END_OF_LIST(),
+};
+
static void wdt_ib700_realize(DeviceState *dev, Error **errp)
{
IB700State *s = IB700(dev);
+ PortioList *port_list = g_new(PortioList, 1);
ib700_debug("watchdog init\n");
s->timer = qemu_new_timer_ns(vm_clock, ib700_timer_expired, s);
- register_ioport_write(0x441, 2, 1, ib700_write_disable_reg, s);
- register_ioport_write(0x443, 2, 1, ib700_write_enable_reg, s);
+
+ portio_list_init(port_list, wdt_portio_list, s, "ib700");
+ portio_list_add(port_list, isa_address_space_io(&s->parent_obj), 0);
}
static void wdt_ib700_reset(DeviceState *dev)
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 07/66] i82374: replace register_ioport*
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (5 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 06/66] wdt_ib700: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 08/66] prep: " Paolo Bonzini
` (58 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka
From: Jan Kiszka <jan.kiszka@siemens.com>
Convert over to memory regions to obsolete register_ioport*.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/dma/i82374.c | 18 +++++++++++++-----
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/hw/dma/i82374.c b/hw/dma/i82374.c
index 6192780..ecda5cb 100644
--- a/hw/dma/i82374.c
+++ b/hw/dma/i82374.c
@@ -124,16 +124,24 @@ static const VMStateDescription vmstate_isa_i82374 = {
},
};
+static const MemoryRegionPortio i82374_portio_list[] = {
+ { 0x0A, 1, 1, .read = i82374_read_isr, },
+ { 0x10, 8, 1, .write = i82374_write_command, },
+ { 0x18, 8, 1, .read = i82374_read_status, },
+ { 0x20, 0x20, 1,
+ .write = i82374_write_descriptor, .read = i82374_read_descriptor, },
+ PORTIO_END_OF_LIST(),
+};
+
static void i82374_isa_realize(DeviceState *dev, Error **errp)
{
ISAi82374State *isa = I82374(dev);
I82374State *s = &isa->state;
+ PortioList *port_list = g_new(PortioList, 1);
- register_ioport_read(isa->iobase + 0x0A, 1, 1, i82374_read_isr, s);
- register_ioport_write(isa->iobase + 0x10, 8, 1, i82374_write_command, s);
- register_ioport_read(isa->iobase + 0x18, 8, 1, i82374_read_status, s);
- register_ioport_write(isa->iobase + 0x20, 0x20, 1, i82374_write_descriptor, s);
- register_ioport_read(isa->iobase + 0x20, 0x20, 1, i82374_read_descriptor, s);
+ portio_list_init(port_list, i82374_portio_list, s, "i82374");
+ portio_list_add(port_list, isa_address_space_io(&isa->parent_obj),
+ isa->iobase);
i82374_realize(s, errp);
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 08/66] prep: replace register_ioport*
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (6 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 07/66] i82374: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 09/66] vt82c686: " Paolo Bonzini
` (57 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka
From: Jan Kiszka <jan.kiszka@siemens.com>
Convert over to memory regions to obsolete register_ioport*.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/ppc/prep.c | 23 +++++++++++++++--------
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 90828f2..560a59a 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -434,6 +434,16 @@ static void ppc_prep_reset(void *opaque)
cpu->env.nip = 0xfffffffc;
}
+static const MemoryRegionPortio prep_portio_list[] = {
+ /* System control ports */
+ { 0x0092, 1, 1, .read = PREP_io_800_readb, .write = PREP_io_800_writeb, },
+ { 0x0800, 0x52, 1,
+ .read = PREP_io_800_readb, .write = PREP_io_800_writeb, },
+ /* Special port to get debug messages from Open-Firmware */
+ { 0x0F00, 4, 1, .write = PPC_debug_write, },
+ PORTIO_END_OF_LIST(),
+};
+
/* PowerPC PREP hardware initialisation */
static void ppc_prep_init(QEMUMachineInitArgs *args)
{
@@ -450,6 +460,7 @@ static void ppc_prep_init(QEMUMachineInitArgs *args)
nvram_t nvram;
M48t59State *m48t59;
MemoryRegion *PPC_io_memory = g_new(MemoryRegion, 1);
+ PortioList *port_list = g_new(PortioList, 1);
#if 0
MemoryRegion *xcsr = g_new(MemoryRegion, 1);
#endif
@@ -641,11 +652,10 @@ static void ppc_prep_init(QEMUMachineInitArgs *args)
isa_create_simple(isa_bus, "i8042");
sysctrl->reset_irq = first_cpu->irq_inputs[PPC6xx_INPUT_HRESET];
- /* System control ports */
- register_ioport_read(0x0092, 0x01, 1, &PREP_io_800_readb, sysctrl);
- register_ioport_write(0x0092, 0x01, 1, &PREP_io_800_writeb, sysctrl);
- register_ioport_read(0x0800, 0x52, 1, &PREP_io_800_readb, sysctrl);
- register_ioport_write(0x0800, 0x52, 1, &PREP_io_800_writeb, sysctrl);
+
+ portio_list_init(port_list, prep_portio_list, sysctrl, "prep");
+ portio_list_add(port_list, get_system_io(), 0x0);
+
/* PowerPC control and status register group */
#if 0
memory_region_init_io(xcsr, &PPC_XCSR_ops, NULL, "ppc-xcsr", 0x1000);
@@ -672,9 +682,6 @@ static void ppc_prep_init(QEMUMachineInitArgs *args)
/* XXX: need an option to load a NVRAM image */
0,
graphic_width, graphic_height, graphic_depth);
-
- /* Special port to get debug messages from Open-Firmware */
- register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
}
static QEMUMachine prep_machine = {
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 09/66] vt82c686: replace register_ioport*
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (7 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 08/66] prep: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 10/66] Privatize register_ioport_read/write Paolo Bonzini
` (56 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka
From: Jan Kiszka <jan.kiszka@siemens.com>
Convert over to memory regions to obsolete register_ioport*.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/isa/vt82c686.c | 40 ++++++++++++++++++++++++++--------------
1 file changed, 26 insertions(+), 14 deletions(-)
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index 391d90d..e5cd4cd 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -43,10 +43,12 @@ typedef struct SuperIOConfig
typedef struct VT82C686BState {
PCIDevice dev;
+ MemoryRegion superio;
SuperIOConfig superio_conf;
} VT82C686BState;
-static void superio_ioport_writeb(void *opaque, uint32_t addr, uint32_t data)
+static void superio_ioport_writeb(void *opaque, hwaddr addr, uint64_t data,
+ unsigned size)
{
int can_write;
SuperIOConfig *superio_conf = opaque;
@@ -93,7 +95,7 @@ static void superio_ioport_writeb(void *opaque, uint32_t addr, uint32_t data)
}
}
-static uint32_t superio_ioport_readb(void *opaque, uint32_t addr)
+static uint64_t superio_ioport_readb(void *opaque, hwaddr addr, unsigned size)
{
SuperIOConfig *superio_conf = opaque;
@@ -101,6 +103,16 @@ static uint32_t superio_ioport_readb(void *opaque, uint32_t addr)
return (superio_conf->config[superio_conf->index]);
}
+static const MemoryRegionOps superio_ops = {
+ .read = superio_ioport_readb,
+ .write = superio_ioport_writeb,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 1,
+ },
+};
+
static void vt82c686b_reset(void * opaque)
{
PCIDevice *d = opaque;
@@ -140,17 +152,7 @@ static void vt82c686b_write_config(PCIDevice * d, uint32_t address,
pci_default_write_config(d, address, val, len);
if (address == 0x85) { /* enable or disable super IO configure */
- if (val & 0x2) {
- /* floppy also uses 0x3f0 and 0x3f1.
- * But we do not emulate flopy,so just set it here. */
- isa_unassign_ioport(0x3f0, 2);
- register_ioport_read(0x3f0, 2, 1, superio_ioport_readb,
- &vt686->superio_conf);
- register_ioport_write(0x3f0, 2, 1, superio_ioport_writeb,
- &vt686->superio_conf);
- } else {
- isa_unassign_ioport(0x3f0, 2);
- }
+ memory_region_set_enabled(&vt686->superio, val & 0x2);
}
}
@@ -423,11 +425,13 @@ static const VMStateDescription vmstate_via = {
/* init the PCI-to-ISA bridge */
static int vt82c686b_initfn(PCIDevice *d)
{
+ VT82C686BState *vt82c = DO_UPCAST(VT82C686BState, dev, d);
uint8_t *pci_conf;
+ ISABus *isa_bus;
uint8_t *wmask;
int i;
- isa_bus_new(&d->qdev, pci_address_space_io(d));
+ isa_bus = isa_bus_new(&d->qdev, pci_address_space_io(d));
pci_conf = d->config;
pci_config_set_prog_interface(pci_conf, 0x0);
@@ -439,6 +443,14 @@ static int vt82c686b_initfn(PCIDevice *d)
}
}
+ memory_region_init_io(&vt82c->superio, &superio_ops, &vt82c->superio_conf,
+ "superio", 2);
+ memory_region_set_enabled(&vt82c->superio, false);
+ /* The floppy also uses 0x3f0 and 0x3f1.
+ * But we do not emulate a floppy, so just set it here. */
+ memory_region_add_subregion(isa_bus->address_space_io, 0x3f0,
+ &vt82c->superio);
+
qemu_register_reset(vt82c686b_reset, d);
return 0;
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 10/66] Privatize register_ioport_read/write
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (8 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 09/66] vt82c686: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 11/66] isa: implement isa_is_ioport_assigned via memory_region_find Paolo Bonzini
` (55 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka
From: Jan Kiszka <jan.kiszka@siemens.com>
No more users outside of ioport.c.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
include/exec/ioport.h | 4 ----
ioport.c | 8 ++++----
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/include/exec/ioport.h b/include/exec/ioport.h
index fc28350..4953892 100644
--- a/include/exec/ioport.h
+++ b/include/exec/ioport.h
@@ -39,10 +39,6 @@ typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
typedef void (IOPortDestructor)(void *opaque);
void ioport_register(IORange *iorange);
-int register_ioport_read(pio_addr_t start, int length, int size,
- IOPortReadFunc *func, void *opaque);
-int register_ioport_write(pio_addr_t start, int length, int size,
- IOPortWriteFunc *func, void *opaque);
void isa_unassign_ioport(pio_addr_t start, int length);
bool isa_is_ioport_assigned(pio_addr_t start);
diff --git a/ioport.c b/ioport.c
index a0ac2a0..d5b7fbd 100644
--- a/ioport.c
+++ b/ioport.c
@@ -139,8 +139,8 @@ static int ioport_bsize(int size, int *bsize)
}
/* size is the word size in byte */
-int register_ioport_read(pio_addr_t start, int length, int size,
- IOPortReadFunc *func, void *opaque)
+static int register_ioport_read(pio_addr_t start, int length, int size,
+ IOPortReadFunc *func, void *opaque)
{
int i, bsize;
@@ -159,8 +159,8 @@ int register_ioport_read(pio_addr_t start, int length, int size,
}
/* size is the word size in byte */
-int register_ioport_write(pio_addr_t start, int length, int size,
- IOPortWriteFunc *func, void *opaque)
+static int register_ioport_write(pio_addr_t start, int length, int size,
+ IOPortWriteFunc *func, void *opaque)
{
int i, bsize;
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 11/66] isa: implement isa_is_ioport_assigned via memory_region_find
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (9 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 10/66] Privatize register_ioport_read/write Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 12/66] vmware-vga: Accept unaligned I/O accesses Paolo Bonzini
` (54 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka
From: Jan Kiszka <jan.kiszka@siemens.com>
Open-code isa_is_ioport_assigned via a memory region lookup. As all IO
ports are now directly or indirectly registered via the memory API, this
becomes possible and will finally allow us to drop the ioport tables.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/acpi/piix4.c | 9 +++++----
hw/isa/lpc_ich9.c | 9 +++++----
include/exec/ioport.h | 1 -
ioport.c | 7 -------
4 files changed, 10 insertions(+), 16 deletions(-)
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index 756df3b..ff559c0 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -383,14 +383,15 @@ static void piix4_pm_powerdown_req(Notifier *n, void *opaque)
static void piix4_pm_machine_ready(Notifier *n, void *opaque)
{
PIIX4PMState *s = container_of(n, PIIX4PMState, machine_ready);
+ MemoryRegion *io_as = pci_address_space_io(&s->dev);
uint8_t *pci_conf;
pci_conf = s->dev.config;
- pci_conf[0x5f] = (isa_is_ioport_assigned(0x378) ? 0x80 : 0) | 0x10;
+ pci_conf[0x5f] = 0x10 |
+ (memory_region_find(io_as, 0x378, 1).mr ? 0x80 : 0);
pci_conf[0x63] = 0x60;
- pci_conf[0x67] = (isa_is_ioport_assigned(0x3f8) ? 0x08 : 0) |
- (isa_is_ioport_assigned(0x2f8) ? 0x90 : 0);
-
+ pci_conf[0x67] = (memory_region_find(io_as, 0x3f8, 1).mr ? 0x08 : 0) |
+ (memory_region_find(io_as, 0x2f8, 1).mr ? 0x90 : 0);
}
static int piix4_pm_initfn(PCIDevice *dev)
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 667e882..461ab7c 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -477,22 +477,23 @@ static const MemoryRegionOps rbca_mmio_ops = {
static void ich9_lpc_machine_ready(Notifier *n, void *opaque)
{
ICH9LPCState *s = container_of(n, ICH9LPCState, machine_ready);
+ MemoryRegion *io_as = pci_address_space_io(&s->d);
uint8_t *pci_conf;
pci_conf = s->d.config;
- if (isa_is_ioport_assigned(0x3f8)) {
+ if (memory_region_find(io_as, 0x3f8, 1).mr) {
/* com1 */
pci_conf[0x82] |= 0x01;
}
- if (isa_is_ioport_assigned(0x2f8)) {
+ if (memory_region_find(io_as, 0x2f8, 1).mr) {
/* com2 */
pci_conf[0x82] |= 0x02;
}
- if (isa_is_ioport_assigned(0x378)) {
+ if (memory_region_find(io_as, 0x378, 1).mr) {
/* lpt */
pci_conf[0x82] |= 0x04;
}
- if (isa_is_ioport_assigned(0x3f0)) {
+ if (memory_region_find(io_as, 0x3f0, 1).mr) {
/* floppy */
pci_conf[0x82] |= 0x08;
}
diff --git a/include/exec/ioport.h b/include/exec/ioport.h
index 4953892..eb99ffe 100644
--- a/include/exec/ioport.h
+++ b/include/exec/ioport.h
@@ -40,7 +40,6 @@ typedef void (IOPortDestructor)(void *opaque);
void ioport_register(IORange *iorange);
void isa_unassign_ioport(pio_addr_t start, int length);
-bool isa_is_ioport_assigned(pio_addr_t start);
void cpu_outb(pio_addr_t addr, uint8_t val);
void cpu_outw(pio_addr_t addr, uint16_t val);
diff --git a/ioport.c b/ioport.c
index d5b7fbd..56470c5 100644
--- a/ioport.c
+++ b/ioport.c
@@ -273,13 +273,6 @@ void isa_unassign_ioport(pio_addr_t start, int length)
}
}
-bool isa_is_ioport_assigned(pio_addr_t start)
-{
- return (ioport_read_table[0][start] || ioport_write_table[0][start] ||
- ioport_read_table[1][start] || ioport_write_table[1][start] ||
- ioport_read_table[2][start] || ioport_write_table[2][start]);
-}
-
/***********************************************************/
void cpu_outb(pio_addr_t addr, uint8_t val)
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 12/66] vmware-vga: Accept unaligned I/O accesses
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (10 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 11/66] isa: implement isa_is_ioport_assigned via memory_region_find Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 13/66] xen: Mark fixed platform I/O as unaligned Paolo Bonzini
` (53 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka
From: Jan Kiszka <jan.kiszka@siemens.com>
Before switching to the memory core dispatcher, we need to make sure
that this pv-device will continue to receive unaligned portio accesses.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/display/vmware_vga.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
index fd3569d..ec41681 100644
--- a/hw/display/vmware_vga.c
+++ b/hw/display/vmware_vga.c
@@ -1241,6 +1241,10 @@ static const MemoryRegionOps vmsvga_io_ops = {
.valid = {
.min_access_size = 4,
.max_access_size = 4,
+ .unaligned = true,
+ },
+ .impl = {
+ .unaligned = true,
},
};
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 13/66] xen: Mark fixed platform I/O as unaligned
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (11 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 12/66] vmware-vga: Accept unaligned I/O accesses Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 14/66] ioport: Switch dispatching to memory core layer Paolo Bonzini
` (52 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka
From: Jan Kiszka <jan.kiszka@siemens.com>
Before switching to the memory core dispatcher, we need to make sure
that this pv-device will continue to receive unaligned portio accesses.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/xen/xen_platform.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/xen/xen_platform.c b/hw/xen/xen_platform.c
index b6c6793..f8f5dd5 100644
--- a/hw/xen/xen_platform.c
+++ b/hw/xen/xen_platform.c
@@ -262,9 +262,13 @@ static void platform_fixed_ioport_write(void *opaque, hwaddr addr,
static const MemoryRegionOps platform_fixed_io_ops = {
.read = platform_fixed_ioport_read,
.write = platform_fixed_ioport_write,
+ .valid = {
+ .unaligned = true,
+ },
.impl = {
.min_access_size = 1,
.max_access_size = 4,
+ .unaligned = true,
},
.endianness = DEVICE_LITTLE_ENDIAN,
};
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 14/66] ioport: Switch dispatching to memory core layer
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (12 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 13/66] xen: Mark fixed platform I/O as unaligned Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 15/66] ioport: Remove unused old dispatching services Paolo Bonzini
` (51 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka
From: Jan Kiszka <jan.kiszka@siemens.com>
The current ioport dispatcher is a complex beast, mostly due to the
need to deal with old portio interface users. But we can overcome it
without converting all portio users by embedding the required base
address of a MemoryRegionPortio access into that data structure. That
removes the need to have the additional MemoryRegionIORange structure
in the loop on every access.
To handle old portio memory ops, we simply install dispatching handlers
for portio memory regions when registering them with the memory core.
This removes the need for the old_portio field.
We can drop the additional aliasing of ioport regions and also the
special address space listener. cpu_in and cpu_out now simply call
address_space_read/write. And we can concentrate portio handling in a
single source file.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 27 --------
include/exec/ioport.h | 1 -
include/exec/memory-internal.h | 2 -
include/exec/memory.h | 5 +-
ioport.c | 138 ++++++++++++++++++++++++++++++-----------
memory.c | 88 --------------------------
6 files changed, 102 insertions(+), 159 deletions(-)
diff --git a/exec.c b/exec.c
index c49806c..5a55d2a 100644
--- a/exec.c
+++ b/exec.c
@@ -1752,26 +1752,6 @@ static void core_log_global_stop(MemoryListener *listener)
cpu_physical_memory_set_dirty_tracking(0);
}
-static void io_region_add(MemoryListener *listener,
- MemoryRegionSection *section)
-{
- MemoryRegionIORange *mrio = g_new(MemoryRegionIORange, 1);
-
- mrio->mr = section->mr;
- mrio->offset = section->offset_within_region;
- iorange_init(&mrio->iorange, &memory_region_iorange_ops,
- section->offset_within_address_space,
- int128_get64(section->size));
- ioport_register(&mrio->iorange);
-}
-
-static void io_region_del(MemoryListener *listener,
- MemoryRegionSection *section)
-{
- isa_unassign_ioport(section->offset_within_address_space,
- int128_get64(section->size));
-}
-
static MemoryListener core_memory_listener = {
.begin = core_begin,
.log_global_start = core_log_global_start,
@@ -1779,12 +1759,6 @@ static MemoryListener core_memory_listener = {
.priority = 1,
};
-static MemoryListener io_memory_listener = {
- .region_add = io_region_add,
- .region_del = io_region_del,
- .priority = 0,
-};
-
static MemoryListener tcg_memory_listener = {
.commit = tcg_commit,
};
@@ -1826,7 +1800,6 @@ static void memory_map_init(void)
address_space_init(&address_space_io, system_io, "I/O");
memory_listener_register(&core_memory_listener, &address_space_memory);
- memory_listener_register(&io_memory_listener, &address_space_io);
memory_listener_register(&tcg_memory_listener, &address_space_memory);
}
diff --git a/include/exec/ioport.h b/include/exec/ioport.h
index eb99ffe..b476857 100644
--- a/include/exec/ioport.h
+++ b/include/exec/ioport.h
@@ -56,7 +56,6 @@ typedef struct PortioList {
struct MemoryRegion *address_space;
unsigned nr;
struct MemoryRegion **regions;
- struct MemoryRegion **aliases;
void *opaque;
const char *name;
} PortioList;
diff --git a/include/exec/memory-internal.h b/include/exec/memory-internal.h
index 26689fe..d0e0633 100644
--- a/include/exec/memory-internal.h
+++ b/include/exec/memory-internal.h
@@ -119,8 +119,6 @@ static inline void cpu_physical_memory_mask_dirty_range(ram_addr_t start,
void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,
int dirty_flags);
-extern const IORangeOps memory_region_iorange_ops;
-
#endif
#endif
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 2ddc3c5..cfdda3c 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -126,10 +126,6 @@ struct MemoryRegionOps {
bool unaligned;
} impl;
- /* If .read and .write are not present, old_portio may be used for
- * backwards compatibility with old portio registration
- */
- const MemoryRegionPortio *old_portio;
/* If .read and .write are not present, old_mmio may be used for
* backwards compatibility with old mmio registration
*/
@@ -185,6 +181,7 @@ struct MemoryRegionPortio {
unsigned size;
IOPortReadFunc *read;
IOPortWriteFunc *write;
+ uint32_t base; /* private field */
};
#define PORTIO_END_OF_LIST() { }
diff --git a/ioport.c b/ioport.c
index 56470c5..347da2c 100644
--- a/ioport.c
+++ b/ioport.c
@@ -28,6 +28,7 @@
#include "exec/ioport.h"
#include "trace.h"
#include "exec/memory.h"
+#include "exec/address-spaces.h"
/***********************************************************/
/* IO Port */
@@ -47,6 +48,12 @@
# define LOG_IOPORT(...) do { } while (0)
#endif
+typedef struct MemoryRegionPortioList {
+ MemoryRegion mr;
+ void *portio_opaque;
+ MemoryRegionPortio ports[];
+} MemoryRegionPortioList;
+
/* XXX: use a two level table to limit memory usage */
static void *ioport_opaque[MAX_IOPORTS];
@@ -279,27 +286,34 @@ void cpu_outb(pio_addr_t addr, uint8_t val)
{
LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
trace_cpu_out(addr, val);
- ioport_write(0, addr, val);
+ address_space_write(&address_space_io, addr, &val, 1);
}
void cpu_outw(pio_addr_t addr, uint16_t val)
{
+ uint8_t buf[2];
+
LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
trace_cpu_out(addr, val);
- ioport_write(1, addr, val);
+ stw_p(buf, val);
+ address_space_write(&address_space_io, addr, buf, 2);
}
void cpu_outl(pio_addr_t addr, uint32_t val)
{
+ uint8_t buf[4];
+
LOG_IOPORT("outl: %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
trace_cpu_out(addr, val);
- ioport_write(2, addr, val);
+ stl_p(buf, val);
+ address_space_write(&address_space_io, addr, buf, 4);
}
uint8_t cpu_inb(pio_addr_t addr)
{
uint8_t val;
- val = ioport_read(0, addr);
+
+ address_space_read(&address_space_io, addr, &val, 1);
trace_cpu_in(addr, val);
LOG_IOPORT("inb : %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
return val;
@@ -307,8 +321,11 @@ uint8_t cpu_inb(pio_addr_t addr)
uint16_t cpu_inw(pio_addr_t addr)
{
+ uint8_t buf[2];
uint16_t val;
- val = ioport_read(1, addr);
+
+ address_space_read(&address_space_io, addr, buf, 2);
+ val = lduw_p(buf);
trace_cpu_in(addr, val);
LOG_IOPORT("inw : %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
return val;
@@ -316,8 +333,11 @@ uint16_t cpu_inw(pio_addr_t addr)
uint32_t cpu_inl(pio_addr_t addr)
{
+ uint8_t buf[4];
uint32_t val;
- val = ioport_read(2, addr);
+
+ address_space_read(&address_space_io, addr, buf, 4);
+ val = ldl_p(buf);
trace_cpu_in(addr, val);
LOG_IOPORT("inl : %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
return val;
@@ -336,7 +356,6 @@ void portio_list_init(PortioList *piolist,
piolist->ports = callbacks;
piolist->nr = 0;
piolist->regions = g_new0(MemoryRegion *, n);
- piolist->aliases = g_new0(MemoryRegion *, n);
piolist->address_space = NULL;
piolist->opaque = opaque;
piolist->name = name;
@@ -345,46 +364,96 @@ void portio_list_init(PortioList *piolist,
void portio_list_destroy(PortioList *piolist)
{
g_free(piolist->regions);
- g_free(piolist->aliases);
}
+static const MemoryRegionPortio *find_portio(MemoryRegionPortioList *mrpio,
+ uint64_t offset, unsigned size,
+ bool write)
+{
+ const MemoryRegionPortio *mrp;
+
+ for (mrp = mrpio->ports; mrp->size; ++mrp) {
+ if (offset >= mrp->offset && offset < mrp->offset + mrp->len &&
+ size == mrp->size &&
+ (write ? (bool)mrp->write : (bool)mrp->read)) {
+ return mrp;
+ }
+ }
+ return NULL;
+}
+
+static uint64_t portio_read(void *opaque, hwaddr addr, unsigned size)
+{
+ MemoryRegionPortioList *mrpio = opaque;
+ const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, false);
+ uint64_t data;
+
+ data = ((uint64_t)1 << (size * 8)) - 1;
+ if (mrp) {
+ data = mrp->read(mrpio->portio_opaque, mrp->base + addr);
+ } else if (size == 2) {
+ mrp = find_portio(mrpio, addr, 1, false);
+ assert(mrp);
+ data = mrp->read(mrpio->portio_opaque, mrp->base + addr) |
+ (mrp->read(mrpio->portio_opaque, mrp->base + addr + 1) << 8);
+ }
+ return data;
+}
+
+static void portio_write(void *opaque, hwaddr addr, uint64_t data,
+ unsigned size)
+{
+ MemoryRegionPortioList *mrpio = opaque;
+ const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, true);
+
+ if (mrp) {
+ mrp->write(mrpio->portio_opaque, mrp->base + addr, data);
+ } else if (size == 2) {
+ mrp = find_portio(mrpio, addr, 1, true);
+ assert(mrp);
+ mrp->write(mrpio->portio_opaque, mrp->base + addr, data & 0xff);
+ mrp->write(mrpio->portio_opaque, mrp->base + addr + 1, data >> 8);
+ }
+}
+
+static const MemoryRegionOps portio_ops = {
+ .read = portio_read,
+ .write = portio_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .valid.unaligned = true,
+ .impl.unaligned = true,
+};
+
static void portio_list_add_1(PortioList *piolist,
const MemoryRegionPortio *pio_init,
unsigned count, unsigned start,
unsigned off_low, unsigned off_high)
{
- MemoryRegionPortio *pio;
- MemoryRegionOps *ops;
- MemoryRegion *region, *alias;
+ MemoryRegionPortioList *mrpio;
unsigned i;
/* Copy the sub-list and null-terminate it. */
- pio = g_new(MemoryRegionPortio, count + 1);
- memcpy(pio, pio_init, sizeof(MemoryRegionPortio) * count);
- memset(pio + count, 0, sizeof(MemoryRegionPortio));
+ mrpio = g_malloc0(sizeof(MemoryRegionPortioList) +
+ sizeof(MemoryRegionPortio) * (count + 1));
+ mrpio->portio_opaque = piolist->opaque;
+ memcpy(mrpio->ports, pio_init, sizeof(MemoryRegionPortio) * count);
+ memset(mrpio->ports + count, 0, sizeof(MemoryRegionPortio));
/* Adjust the offsets to all be zero-based for the region. */
for (i = 0; i < count; ++i) {
- pio[i].offset -= off_low;
+ mrpio->ports[i].offset -= off_low;
+ mrpio->ports[i].base = start + off_low;
}
- ops = g_new0(MemoryRegionOps, 1);
- ops->old_portio = pio;
-
- region = g_new(MemoryRegion, 1);
- alias = g_new(MemoryRegion, 1);
/*
* Use an alias so that the callback is called with an absolute address,
* rather than an offset relative to to start + off_low.
*/
- memory_region_init_io(region, ops, piolist->opaque, piolist->name,
- INT64_MAX);
- memory_region_init_alias(alias, piolist->name,
- region, start + off_low, off_high - off_low);
+ memory_region_init_io(&mrpio->mr, &portio_ops, mrpio, piolist->name,
+ off_high - off_low);
memory_region_add_subregion(piolist->address_space,
- start + off_low, alias);
- piolist->regions[piolist->nr] = region;
- piolist->aliases[piolist->nr] = alias;
+ start + off_low, &mrpio->mr);
+ piolist->regions[piolist->nr] = &mrpio->mr;
++piolist->nr;
}
@@ -427,19 +496,14 @@ void portio_list_add(PortioList *piolist,
void portio_list_del(PortioList *piolist)
{
- MemoryRegion *mr, *alias;
+ MemoryRegionPortioList *mrpio;
unsigned i;
for (i = 0; i < piolist->nr; ++i) {
- mr = piolist->regions[i];
- alias = piolist->aliases[i];
- memory_region_del_subregion(piolist->address_space, alias);
- memory_region_destroy(alias);
- memory_region_destroy(mr);
- g_free((MemoryRegionOps *)mr->ops);
- g_free(mr);
- g_free(alias);
+ mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr);
+ memory_region_del_subregion(piolist->address_space, &mrpio->mr);
+ memory_region_destroy(&mrpio->mr);
+ g_free(mrpio);
piolist->regions[i] = NULL;
- piolist->aliases[i] = NULL;
}
}
diff --git a/memory.c b/memory.c
index 757e9a5..1431356 100644
--- a/memory.c
+++ b/memory.c
@@ -401,94 +401,6 @@ static void access_with_adjusted_size(hwaddr addr,
}
}
-static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
- unsigned width, bool write)
-{
- const MemoryRegionPortio *mrp;
-
- for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
- if (offset >= mrp->offset && offset < mrp->offset + mrp->len
- && width == mrp->size
- && (write ? (bool)mrp->write : (bool)mrp->read)) {
- return mrp;
- }
- }
- return NULL;
-}
-
-static void memory_region_iorange_read(IORange *iorange,
- uint64_t offset,
- unsigned width,
- uint64_t *data)
-{
- MemoryRegionIORange *mrio
- = container_of(iorange, MemoryRegionIORange, iorange);
- MemoryRegion *mr = mrio->mr;
-
- offset += mrio->offset;
- if (mr->ops->old_portio) {
- const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
- width, false);
-
- *data = ((uint64_t)1 << (width * 8)) - 1;
- if (mrp) {
- *data = mrp->read(mr->opaque, offset);
- } else if (width == 2) {
- mrp = find_portio(mr, offset - mrio->offset, 1, false);
- assert(mrp);
- *data = mrp->read(mr->opaque, offset) |
- (mrp->read(mr->opaque, offset + 1) << 8);
- }
- return;
- }
- *data = 0;
- access_with_adjusted_size(offset, data, width,
- mr->ops->impl.min_access_size,
- mr->ops->impl.max_access_size,
- memory_region_read_accessor, mr);
-}
-
-static void memory_region_iorange_write(IORange *iorange,
- uint64_t offset,
- unsigned width,
- uint64_t data)
-{
- MemoryRegionIORange *mrio
- = container_of(iorange, MemoryRegionIORange, iorange);
- MemoryRegion *mr = mrio->mr;
-
- offset += mrio->offset;
- if (mr->ops->old_portio) {
- const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
- width, true);
-
- if (mrp) {
- mrp->write(mr->opaque, offset, data);
- } else if (width == 2) {
- mrp = find_portio(mr, offset - mrio->offset, 1, true);
- assert(mrp);
- mrp->write(mr->opaque, offset, data & 0xff);
- mrp->write(mr->opaque, offset + 1, data >> 8);
- }
- return;
- }
- access_with_adjusted_size(offset, &data, width,
- mr->ops->impl.min_access_size,
- mr->ops->impl.max_access_size,
- memory_region_write_accessor, mr);
-}
-
-static void memory_region_iorange_destructor(IORange *iorange)
-{
- g_free(container_of(iorange, MemoryRegionIORange, iorange));
-}
-
-const IORangeOps memory_region_iorange_ops = {
- .read = memory_region_iorange_read,
- .write = memory_region_iorange_write,
- .destructor = memory_region_iorange_destructor,
-};
-
static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
{
AddressSpace *as;
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 15/66] ioport: Remove unused old dispatching services
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (13 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 14/66] ioport: Switch dispatching to memory core layer Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 16/66] vmport: Disentangle read handler type from portio Paolo Bonzini
` (50 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka
From: Jan Kiszka <jan.kiszka@siemens.com>
Remove unused ioport_register and isa_unassign_ioport along with
everything that only those services used.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
include/exec/ioport.h | 5 --
include/exec/iorange.h | 31 -------
include/exec/memory.h | 9 --
ioport.c | 238 -------------------------------------------------
4 files changed, 283 deletions(-)
delete mode 100644 include/exec/iorange.h
diff --git a/include/exec/ioport.h b/include/exec/ioport.h
index b476857..ba3ebb8 100644
--- a/include/exec/ioport.h
+++ b/include/exec/ioport.h
@@ -25,7 +25,6 @@
#define IOPORT_H
#include "qemu-common.h"
-#include "exec/iorange.h"
typedef uint32_t pio_addr_t;
#define FMT_pioaddr PRIx32
@@ -36,10 +35,6 @@ typedef uint32_t pio_addr_t;
/* These should really be in isa.h, but are here to make pc.h happy. */
typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
-typedef void (IOPortDestructor)(void *opaque);
-
-void ioport_register(IORange *iorange);
-void isa_unassign_ioport(pio_addr_t start, int length);
void cpu_outb(pio_addr_t addr, uint8_t val);
void cpu_outw(pio_addr_t addr, uint16_t val);
diff --git a/include/exec/iorange.h b/include/exec/iorange.h
deleted file mode 100644
index cd980a8..0000000
--- a/include/exec/iorange.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#ifndef IORANGE_H
-#define IORANGE_H
-
-#include <stdint.h>
-
-typedef struct IORange IORange;
-typedef struct IORangeOps IORangeOps;
-
-struct IORangeOps {
- void (*read)(IORange *iorange, uint64_t offset, unsigned width,
- uint64_t *data);
- void (*write)(IORange *iorange, uint64_t offset, unsigned width,
- uint64_t data);
- void (*destructor)(IORange *iorange);
-};
-
-struct IORange {
- const IORangeOps *ops;
- uint64_t base;
- uint64_t len;
-};
-
-static inline void iorange_init(IORange *iorange, const IORangeOps *ops,
- uint64_t base, uint64_t len)
-{
- iorange->ops = ops;
- iorange->base = base;
- iorange->len = len;
-}
-
-#endif
diff --git a/include/exec/memory.h b/include/exec/memory.h
index cfdda3c..2d7f49c 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -24,7 +24,6 @@
#include "exec/hwaddr.h"
#endif
#include "qemu/queue.h"
-#include "exec/iorange.h"
#include "exec/ioport.h"
#include "qemu/int128.h"
#include "qemu/notify.h"
@@ -48,14 +47,6 @@ struct MemoryRegionMmio {
CPUWriteMemoryFunc *write[3];
};
-/* Internal use; thunks between old-style IORange and MemoryRegions. */
-typedef struct MemoryRegionIORange MemoryRegionIORange;
-struct MemoryRegionIORange {
- IORange iorange;
- MemoryRegion *mr;
- hwaddr offset;
-};
-
typedef struct IOMMUTLBEntry IOMMUTLBEntry;
/* See address_space_translate: bit 0 is read, bit 1 is write. */
diff --git a/ioport.c b/ioport.c
index 347da2c..ef6fb96 100644
--- a/ioport.c
+++ b/ioport.c
@@ -30,18 +30,8 @@
#include "exec/memory.h"
#include "exec/address-spaces.h"
-/***********************************************************/
-/* IO Port */
-
-//#define DEBUG_UNUSED_IOPORT
//#define DEBUG_IOPORT
-#ifdef DEBUG_UNUSED_IOPORT
-# define LOG_UNUSED_IOPORT(fmt, ...) fprintf(stderr, fmt, ## __VA_ARGS__)
-#else
-# define LOG_UNUSED_IOPORT(fmt, ...) do{ } while (0)
-#endif
-
#ifdef DEBUG_IOPORT
# define LOG_IOPORT(...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
#else
@@ -54,234 +44,6 @@ typedef struct MemoryRegionPortioList {
MemoryRegionPortio ports[];
} MemoryRegionPortioList;
-/* XXX: use a two level table to limit memory usage */
-
-static void *ioport_opaque[MAX_IOPORTS];
-static IOPortReadFunc *ioport_read_table[3][MAX_IOPORTS];
-static IOPortWriteFunc *ioport_write_table[3][MAX_IOPORTS];
-static IOPortDestructor *ioport_destructor_table[MAX_IOPORTS];
-
-static IOPortReadFunc default_ioport_readb, default_ioport_readw, default_ioport_readl;
-static IOPortWriteFunc default_ioport_writeb, default_ioport_writew, default_ioport_writel;
-
-static uint32_t ioport_read(int index, uint32_t address)
-{
- static IOPortReadFunc * const default_func[3] = {
- default_ioport_readb,
- default_ioport_readw,
- default_ioport_readl
- };
- IOPortReadFunc *func = ioport_read_table[index][address];
- if (!func)
- func = default_func[index];
- return func(ioport_opaque[address], address);
-}
-
-static void ioport_write(int index, uint32_t address, uint32_t data)
-{
- static IOPortWriteFunc * const default_func[3] = {
- default_ioport_writeb,
- default_ioport_writew,
- default_ioport_writel
- };
- IOPortWriteFunc *func = ioport_write_table[index][address];
- if (!func)
- func = default_func[index];
- func(ioport_opaque[address], address, data);
-}
-
-static uint32_t default_ioport_readb(void *opaque, uint32_t address)
-{
- LOG_UNUSED_IOPORT("unused inb: port=0x%04"PRIx32"\n", address);
- return 0xff;
-}
-
-static void default_ioport_writeb(void *opaque, uint32_t address, uint32_t data)
-{
- LOG_UNUSED_IOPORT("unused outb: port=0x%04"PRIx32" data=0x%02"PRIx32"\n",
- address, data);
-}
-
-/* default is to make two byte accesses */
-static uint32_t default_ioport_readw(void *opaque, uint32_t address)
-{
- uint32_t data;
- data = ioport_read(0, address);
- address = (address + 1) & IOPORTS_MASK;
- data |= ioport_read(0, address) << 8;
- return data;
-}
-
-static void default_ioport_writew(void *opaque, uint32_t address, uint32_t data)
-{
- ioport_write(0, address, data & 0xff);
- address = (address + 1) & IOPORTS_MASK;
- ioport_write(0, address, (data >> 8) & 0xff);
-}
-
-static uint32_t default_ioport_readl(void *opaque, uint32_t address)
-{
- LOG_UNUSED_IOPORT("unused inl: port=0x%04"PRIx32"\n", address);
- return 0xffffffff;
-}
-
-static void default_ioport_writel(void *opaque, uint32_t address, uint32_t data)
-{
- LOG_UNUSED_IOPORT("unused outl: port=0x%04"PRIx32" data=0x%02"PRIx32"\n",
- address, data);
-}
-
-static int ioport_bsize(int size, int *bsize)
-{
- if (size == 1) {
- *bsize = 0;
- } else if (size == 2) {
- *bsize = 1;
- } else if (size == 4) {
- *bsize = 2;
- } else {
- return -1;
- }
- return 0;
-}
-
-/* size is the word size in byte */
-static int register_ioport_read(pio_addr_t start, int length, int size,
- IOPortReadFunc *func, void *opaque)
-{
- int i, bsize;
-
- if (ioport_bsize(size, &bsize)) {
- hw_error("register_ioport_read: invalid size");
- return -1;
- }
- for(i = start; i < start + length; ++i) {
- ioport_read_table[bsize][i] = func;
- if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
- hw_error("register_ioport_read: invalid opaque for address 0x%x",
- i);
- ioport_opaque[i] = opaque;
- }
- return 0;
-}
-
-/* size is the word size in byte */
-static int register_ioport_write(pio_addr_t start, int length, int size,
- IOPortWriteFunc *func, void *opaque)
-{
- int i, bsize;
-
- if (ioport_bsize(size, &bsize)) {
- hw_error("register_ioport_write: invalid size");
- return -1;
- }
- for(i = start; i < start + length; ++i) {
- ioport_write_table[bsize][i] = func;
- if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
- hw_error("register_ioport_write: invalid opaque for address 0x%x",
- i);
- ioport_opaque[i] = opaque;
- }
- return 0;
-}
-
-static uint32_t ioport_readb_thunk(void *opaque, uint32_t addr)
-{
- IORange *ioport = opaque;
- uint64_t data;
-
- ioport->ops->read(ioport, addr - ioport->base, 1, &data);
- return data;
-}
-
-static uint32_t ioport_readw_thunk(void *opaque, uint32_t addr)
-{
- IORange *ioport = opaque;
- uint64_t data;
-
- ioport->ops->read(ioport, addr - ioport->base, 2, &data);
- return data;
-}
-
-static uint32_t ioport_readl_thunk(void *opaque, uint32_t addr)
-{
- IORange *ioport = opaque;
- uint64_t data;
-
- ioport->ops->read(ioport, addr - ioport->base, 4, &data);
- return data;
-}
-
-static void ioport_writeb_thunk(void *opaque, uint32_t addr, uint32_t data)
-{
- IORange *ioport = opaque;
-
- ioport->ops->write(ioport, addr - ioport->base, 1, data);
-}
-
-static void ioport_writew_thunk(void *opaque, uint32_t addr, uint32_t data)
-{
- IORange *ioport = opaque;
-
- ioport->ops->write(ioport, addr - ioport->base, 2, data);
-}
-
-static void ioport_writel_thunk(void *opaque, uint32_t addr, uint32_t data)
-{
- IORange *ioport = opaque;
-
- ioport->ops->write(ioport, addr - ioport->base, 4, data);
-}
-
-static void iorange_destructor_thunk(void *opaque)
-{
- IORange *iorange = opaque;
-
- if (iorange->ops->destructor) {
- iorange->ops->destructor(iorange);
- }
-}
-
-void ioport_register(IORange *ioport)
-{
- register_ioport_read(ioport->base, ioport->len, 1,
- ioport_readb_thunk, ioport);
- register_ioport_read(ioport->base, ioport->len, 2,
- ioport_readw_thunk, ioport);
- register_ioport_read(ioport->base, ioport->len, 4,
- ioport_readl_thunk, ioport);
- register_ioport_write(ioport->base, ioport->len, 1,
- ioport_writeb_thunk, ioport);
- register_ioport_write(ioport->base, ioport->len, 2,
- ioport_writew_thunk, ioport);
- register_ioport_write(ioport->base, ioport->len, 4,
- ioport_writel_thunk, ioport);
- ioport_destructor_table[ioport->base] = iorange_destructor_thunk;
-}
-
-void isa_unassign_ioport(pio_addr_t start, int length)
-{
- int i;
-
- if (ioport_destructor_table[start]) {
- ioport_destructor_table[start](ioport_opaque[start]);
- ioport_destructor_table[start] = NULL;
- }
- for(i = start; i < start + length; i++) {
- ioport_read_table[0][i] = NULL;
- ioport_read_table[1][i] = NULL;
- ioport_read_table[2][i] = NULL;
-
- ioport_write_table[0][i] = NULL;
- ioport_write_table[1][i] = NULL;
- ioport_write_table[2][i] = NULL;
-
- ioport_opaque[i] = NULL;
- }
-}
-
-/***********************************************************/
-
void cpu_outb(pio_addr_t addr, uint8_t val)
{
LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 16/66] vmport: Disentangle read handler type from portio
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (14 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 15/66] ioport: Remove unused old dispatching services Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 17/66] ioport: Move portio types to ioport.h Paolo Bonzini
` (49 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka
From: Jan Kiszka <jan.kiszka@siemens.com>
In case the latter may vanish one day, make sure the vmport read handler
type will remain unaffected. This is also conceptually cleaner.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/misc/vmport.c | 4 ++--
include/hw/i386/pc.h | 6 ++++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/misc/vmport.c b/hw/misc/vmport.c
index 8363dfd..8639072 100644
--- a/hw/misc/vmport.c
+++ b/hw/misc/vmport.c
@@ -43,13 +43,13 @@ typedef struct VMPortState
ISADevice parent_obj;
MemoryRegion io;
- IOPortReadFunc *func[VMPORT_ENTRIES];
+ VMPortReadFunc *func[VMPORT_ENTRIES];
void *opaque[VMPORT_ENTRIES];
} VMPortState;
static VMPortState *port_state;
-void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque)
+void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque)
{
if (command >= VMPORT_ENTRIES)
return;
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index a417402..a350d8f 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -3,7 +3,6 @@
#include "qemu-common.h"
#include "exec/memory.h"
-#include "exec/ioport.h"
#include "hw/isa/isa.h"
#include "hw/block/fdc.h"
#include "net/net.h"
@@ -56,11 +55,14 @@ typedef struct GSIState {
void gsi_handler(void *opaque, int n, int level);
/* vmport.c */
+typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
+
static inline void vmport_init(ISABus *bus)
{
isa_create_simple(bus, "vmport");
}
-void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
+
+void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
void vmmouse_get_data(uint32_t *data);
void vmmouse_set_data(const uint32_t *data);
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 17/66] ioport: Move portio types to ioport.h
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (15 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 16/66] vmport: Disentangle read handler type from portio Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 19/66] memory: destroy phys_sections one by one Paolo Bonzini
` (48 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka
From: Jan Kiszka <jan.kiszka@siemens.com>
This decouples memory.h from ioport.h, concentrating all portio related
types in a single header.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
include/exec/ioport.h | 17 +++++++++++------
include/exec/memory.h | 13 -------------
2 files changed, 11 insertions(+), 19 deletions(-)
diff --git a/include/exec/ioport.h b/include/exec/ioport.h
index ba3ebb8..6fb237d 100644
--- a/include/exec/ioport.h
+++ b/include/exec/ioport.h
@@ -25,6 +25,7 @@
#define IOPORT_H
#include "qemu-common.h"
+#include "exec/memory.h"
typedef uint32_t pio_addr_t;
#define FMT_pioaddr PRIx32
@@ -32,9 +33,16 @@ typedef uint32_t pio_addr_t;
#define MAX_IOPORTS (64 * 1024)
#define IOPORTS_MASK (MAX_IOPORTS - 1)
-/* These should really be in isa.h, but are here to make pc.h happy. */
-typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
-typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
+typedef struct MemoryRegionPortio {
+ uint32_t offset;
+ uint32_t len;
+ unsigned size;
+ uint32_t (*read)(void *opaque, uint32_t address);
+ void (*write)(void *opaque, uint32_t address, uint32_t data);
+ uint32_t base; /* private field */
+} MemoryRegionPortio;
+
+#define PORTIO_END_OF_LIST() { }
void cpu_outb(pio_addr_t addr, uint8_t val);
void cpu_outw(pio_addr_t addr, uint16_t val);
@@ -43,9 +51,6 @@ uint8_t cpu_inb(pio_addr_t addr);
uint16_t cpu_inw(pio_addr_t addr);
uint32_t cpu_inl(pio_addr_t addr);
-struct MemoryRegion;
-struct MemoryRegionPortio;
-
typedef struct PortioList {
const struct MemoryRegionPortio *ports;
struct MemoryRegion *address_space;
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 2d7f49c..4eec2f7 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -24,7 +24,6 @@
#include "exec/hwaddr.h"
#endif
#include "qemu/queue.h"
-#include "exec/ioport.h"
#include "qemu/int128.h"
#include "qemu/notify.h"
@@ -32,7 +31,6 @@
#define MAX_PHYS_ADDR (((hwaddr)1 << MAX_PHYS_ADDR_SPACE_BITS) - 1)
typedef struct MemoryRegionOps MemoryRegionOps;
-typedef struct MemoryRegionPortio MemoryRegionPortio;
typedef struct MemoryRegionMmio MemoryRegionMmio;
/* Must match *_DIRTY_FLAGS in cpu-all.h. To be replaced with dynamic
@@ -166,17 +164,6 @@ struct MemoryRegion {
NotifierList iommu_notify;
};
-struct MemoryRegionPortio {
- uint32_t offset;
- uint32_t len;
- unsigned size;
- IOPortReadFunc *read;
- IOPortWriteFunc *write;
- uint32_t base; /* private field */
-};
-
-#define PORTIO_END_OF_LIST() { }
-
/**
* AddressSpace: describes a mapping of addresses to #MemoryRegion objects
*/
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 19/66] memory: destroy phys_sections one by one
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (16 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 17/66] ioport: Move portio types to ioport.h Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 20/66] exec: simplify destruction of the phys map Paolo Bonzini
` (47 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
phys_sections_clear is invoked after the dispatch tree has been
destroyed. This leaves a window where phys_sections_nb > 0 but the
subpages are not valid anymore, which is a recipe for use-after-free
bugs.
Move the destruction of subpages in phys_sections_clear. We will
still destroy the subpages when an address space is cleaned up,
because address_space_destroy will clear as->root and commit the
change before it calls address_space_destroy_dispatch.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 27 +++++++++++++--------------
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/exec.c b/exec.c
index 5094746..78be4f5 100644
--- a/exec.c
+++ b/exec.c
@@ -754,17 +754,6 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env,
static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
uint16_t section);
static subpage_t *subpage_init(AddressSpace *as, hwaddr base);
-static void destroy_page_desc(uint16_t section_index)
-{
- MemoryRegionSection *section = &phys_sections[section_index];
- MemoryRegion *mr = section->mr;
-
- if (mr->subpage) {
- subpage_t *subpage = container_of(mr, subpage_t, iomem);
- memory_region_destroy(&subpage->iomem);
- g_free(subpage);
- }
-}
static void destroy_l2_mapping(PhysPageEntry *lp, unsigned level)
{
@@ -779,8 +768,6 @@ static void destroy_l2_mapping(PhysPageEntry *lp, unsigned level)
for (i = 0; i < L2_SIZE; ++i) {
if (!p[i].is_leaf) {
destroy_l2_mapping(&p[i], level - 1);
- } else {
- destroy_page_desc(p[i].ptr);
}
}
lp->is_leaf = 0;
@@ -810,9 +797,21 @@ static uint16_t phys_section_add(MemoryRegionSection *section)
return phys_sections_nb++;
}
+static void phys_section_destroy(MemoryRegion *mr)
+{
+ if (mr->subpage) {
+ subpage_t *subpage = container_of(mr, subpage_t, iomem);
+ memory_region_destroy(&subpage->iomem);
+ g_free(subpage);
+ }
+}
+
static void phys_sections_clear(void)
{
- phys_sections_nb = 0;
+ while (phys_sections_nb > 0) {
+ MemoryRegionSection *section = &phys_sections[--phys_sections_nb];
+ phys_section_destroy(section->mr);
+ }
}
static void register_subpage(AddressSpaceDispatch *d, MemoryRegionSection *section)
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 20/66] exec: simplify destruction of the phys map
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (17 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 19/66] memory: destroy phys_sections one by one Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 21/66] memory: add getter for owner Paolo Bonzini
` (46 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Do not bother visiting the radix tree when an address space is destroyed.
After the previous patch, this has become a pointless exercise. When
called from address_space_destroy_dispatch, all you're doing is zeroing
out a structure that will be freed as soon as you come back. When called
from mem_begin, when phys_page_set_level will call phys_map_node_alloc the
radix tree's array will be zeroed too.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 34 +---------------------------------
1 file changed, 1 insertion(+), 33 deletions(-)
diff --git a/exec.c b/exec.c
index 78be4f5..f926bd7 100644
--- a/exec.c
+++ b/exec.c
@@ -154,12 +154,6 @@ static uint16_t phys_map_node_alloc(void)
return ret;
}
-static void phys_map_nodes_reset(void)
-{
- phys_map_nodes_nb = 0;
-}
-
-
static void phys_page_set_level(PhysPageEntry *lp, hwaddr *index,
hwaddr *nb, uint16_t leaf,
int level)
@@ -755,31 +749,6 @@ static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
uint16_t section);
static subpage_t *subpage_init(AddressSpace *as, hwaddr base);
-static void destroy_l2_mapping(PhysPageEntry *lp, unsigned level)
-{
- unsigned i;
- PhysPageEntry *p;
-
- if (lp->ptr == PHYS_MAP_NODE_NIL) {
- return;
- }
-
- p = phys_map_nodes[lp->ptr];
- for (i = 0; i < L2_SIZE; ++i) {
- if (!p[i].is_leaf) {
- destroy_l2_mapping(&p[i], level - 1);
- }
- }
- lp->is_leaf = 0;
- lp->ptr = PHYS_MAP_NODE_NIL;
-}
-
-static void destroy_all_mappings(AddressSpaceDispatch *d)
-{
- destroy_l2_mapping(&d->phys_map, P_L2_LEVELS - 1);
- phys_map_nodes_reset();
-}
-
static uint16_t phys_section_add(MemoryRegionSection *section)
{
/* The physical section number is ORed with a page-aligned
@@ -812,6 +781,7 @@ static void phys_sections_clear(void)
MemoryRegionSection *section = &phys_sections[--phys_sections_nb];
phys_section_destroy(section->mr);
}
+ phys_map_nodes_nb = 0;
}
static void register_subpage(AddressSpaceDispatch *d, MemoryRegionSection *section)
@@ -1716,7 +1686,6 @@ static void mem_begin(MemoryListener *listener)
{
AddressSpaceDispatch *d = container_of(listener, AddressSpaceDispatch, listener);
- destroy_all_mappings(d);
d->phys_map.ptr = PHYS_MAP_NODE_NIL;
}
@@ -1783,7 +1752,6 @@ void address_space_destroy_dispatch(AddressSpace *as)
AddressSpaceDispatch *d = as->dispatch;
memory_listener_unregister(&d->listener);
- destroy_l2_mapping(&d->phys_map, P_L2_LEVELS - 1);
g_free(d);
as->dispatch = NULL;
}
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 21/66] memory: add getter for owner
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (18 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 20/66] exec: simplify destruction of the phys map Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 22/66] memory: add ref/unref Paolo Bonzini
` (45 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Whenever memory regions are accessed outside the BQL, they need to be
preserved against hot-unplug. MemoryRegions actually do not have their
own reference count; they piggyback on a QOM object, their "owner".
The owner is set at creation time, and there is a function to retrieve
the owner.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
include/exec/memory.h | 7 +++++++
memory.c | 6 ++++++
2 files changed, 13 insertions(+)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 3f48f07..2f3e8e4 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -382,6 +382,13 @@ void memory_region_init_iommu(MemoryRegion *mr,
void memory_region_destroy(MemoryRegion *mr);
/**
+ * memory_region_owner: get a memory region's owner.
+ *
+ * @mr: the memory region being queried.
+ */
+struct Object *memory_region_owner(MemoryRegion *mr);
+
+/**
* memory_region_size: get a memory region's size.
*
* @mr: the memory region being queried.
diff --git a/memory.c b/memory.c
index 56ef4ba..f85774a 100644
--- a/memory.c
+++ b/memory.c
@@ -738,6 +738,7 @@ void memory_region_init(MemoryRegion *mr,
mr->owner = owner;
mr->iommu_ops = NULL;
mr->parent = NULL;
+ mr->owner = NULL;
mr->size = int128_make64(size);
if (size == UINT64_MAX) {
mr->size = int128_2_64();
@@ -1013,6 +1014,11 @@ void memory_region_destroy(MemoryRegion *mr)
g_free(mr->ioeventfds);
}
+Object *memory_region_owner(MemoryRegion *mr)
+{
+ return mr->owner;
+}
+
uint64_t memory_region_size(MemoryRegion *mr)
{
if (int128_eq(mr->size, int128_2_64())) {
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 22/66] memory: add ref/unref
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (19 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 21/66] memory: add getter for owner Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 23/66] memory: introduce memory_region_present Paolo Bonzini
` (44 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
include/exec/memory.h | 30 ++++++++++++++++++++++++++++++
memory.c | 14 ++++++++++++++
2 files changed, 44 insertions(+)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 2f3e8e4..d2466a7 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -247,6 +247,36 @@ void memory_region_init(MemoryRegion *mr,
struct Object *owner,
const char *name,
uint64_t size);
+
+/**
+ * memory_region_ref: Add 1 to a memory region's reference count
+ *
+ * Whenever memory regions are accessed outside the BQL, they need to be
+ * preserved against hot-unplug. MemoryRegions actually do not have their
+ * own reference count; they piggyback on a QOM object, their "owner".
+ * This function adds a reference to the owner.
+ *
+ * All MemoryRegions must have an owner if they can disappear, even if the
+ * device they belong to operates exclusively under the BQL. This is because
+ * the region could be returned at any time by memory_region_find, and this
+ * is usually under guest control.
+ *
+ * @mr: the #MemoryRegion
+ */
+void memory_region_ref(MemoryRegion *mr);
+
+/**
+ * memory_region_unref: Remove 1 to a memory region's reference count
+ *
+ * Whenever memory regions are accessed outside the BQL, they need to be
+ * preserved against hot-unplug. MemoryRegions actually do not have their
+ * own reference count; they piggyback on a QOM object, their "owner".
+ * This function removes a reference to the owner and possibly destroys it.
+ *
+ * @mr: the #MemoryRegion
+ */
+void memory_region_unref(MemoryRegion *mr);
+
/**
* memory_region_init_io: Initialize an I/O memory region.
*
diff --git a/memory.c b/memory.c
index f85774a..e04d519 100644
--- a/memory.c
+++ b/memory.c
@@ -1019,6 +1019,20 @@ Object *memory_region_owner(MemoryRegion *mr)
return mr->owner;
}
+void memory_region_ref(MemoryRegion *mr)
+{
+ if (mr && mr->owner) {
+ object_ref(mr->owner);
+ }
+}
+
+void memory_region_unref(MemoryRegion *mr)
+{
+ if (mr && mr->owner) {
+ object_unref(mr->owner);
+ }
+}
+
uint64_t memory_region_size(MemoryRegion *mr)
{
if (int128_eq(mr->size, int128_2_64())) {
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 23/66] memory: introduce memory_region_present
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (20 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 22/66] memory: add ref/unref Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 24/66] memory: add ref/unref calls Paolo Bonzini
` (43 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
This new API will avoid having too many memory_region_ref/unref
in paths that currently use memory_region_find.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/acpi/piix4.c | 6 +++---
hw/isa/lpc_ich9.c | 8 ++++----
include/exec/memory.h | 12 ++++++++++++
memory.c | 9 +++++++++
4 files changed, 28 insertions(+), 7 deletions(-)
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index 3b95c69..10fc925 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -388,10 +388,10 @@ static void piix4_pm_machine_ready(Notifier *n, void *opaque)
pci_conf = s->dev.config;
pci_conf[0x5f] = 0x10 |
- (memory_region_find(io_as, 0x378, 1).mr ? 0x80 : 0);
+ (memory_region_present(io_as, 0x378) ? 0x80 : 0);
pci_conf[0x63] = 0x60;
- pci_conf[0x67] = (memory_region_find(io_as, 0x3f8, 1).mr ? 0x08 : 0) |
- (memory_region_find(io_as, 0x2f8, 1).mr ? 0x90 : 0);
+ pci_conf[0x67] = (memory_region_present(io_as, 0x3f8) ? 0x08 : 0) |
+ (memory_region_present(io_as, 0x2f8) ? 0x90 : 0);
}
static int piix4_pm_initfn(PCIDevice *dev)
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 82f8ea6..f704c42 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -481,19 +481,19 @@ static void ich9_lpc_machine_ready(Notifier *n, void *opaque)
uint8_t *pci_conf;
pci_conf = s->d.config;
- if (memory_region_find(io_as, 0x3f8, 1).mr) {
+ if (memory_region_present(io_as, 0x3f8)) {
/* com1 */
pci_conf[0x82] |= 0x01;
}
- if (memory_region_find(io_as, 0x2f8, 1).mr) {
+ if (memory_region_present(io_as, 0x2f8)) {
/* com2 */
pci_conf[0x82] |= 0x02;
}
- if (memory_region_find(io_as, 0x378, 1).mr) {
+ if (memory_region_present(io_as, 0x378)) {
/* lpt */
pci_conf[0x82] |= 0x04;
}
- if (memory_region_find(io_as, 0x3f0, 1).mr) {
+ if (memory_region_present(io_as, 0x3f0)) {
/* floppy */
pci_conf[0x82] |= 0x08;
}
diff --git a/include/exec/memory.h b/include/exec/memory.h
index d2466a7..c8d0bf4 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -837,6 +837,18 @@ void memory_region_set_alias_offset(MemoryRegion *mr,
hwaddr offset);
/**
+ * memory_region_present: translate an address/size relative to a
+ * MemoryRegion into a #MemoryRegionSection.
+ *
+ * Answer whether a #MemoryRegion within @parent covers the address
+ * @addr.
+ *
+ * @parent: a MemoryRegion within which @addr is a relative address
+ * @addr: the area within @parent to be searched
+ */
+bool memory_region_present(MemoryRegion *parent, hwaddr addr);
+
+/**
* memory_region_find: translate an address/size relative to a
* MemoryRegion into a #MemoryRegionSection.
*
diff --git a/memory.c b/memory.c
index e04d519..24027c5 100644
--- a/memory.c
+++ b/memory.c
@@ -1478,6 +1478,15 @@ static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
sizeof(FlatRange), cmp_flatrange_addr);
}
+bool memory_region_present(MemoryRegion *parent, hwaddr addr)
+{
+ MemoryRegion *mr = memory_region_find(parent, addr, 1).mr;
+ if (!mr) {
+ return false;
+ }
+ return true;
+}
+
MemoryRegionSection memory_region_find(MemoryRegion *mr,
hwaddr addr, uint64_t size)
{
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 24/66] memory: add ref/unref calls
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (21 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 23/66] memory: introduce memory_region_present Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 25/66] exec: check MRU in qemu_ram_addr_from_host Paolo Bonzini
` (42 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Add ref/unref calls at the following places:
- places where memory regions are stashed by a listener and
used outside the BQL (including in Xen or KVM).
- memory_region_find callsites
- creation of aliases and containers (only the aliased/contained
region gets a reference to avoid loops)
- around calls to del_subregion/add_subregion, where the region
could disappear after the first call
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 3 +++
hw/core/loader.c | 1 +
hw/display/exynos4210_fimd.c | 6 ++++++
hw/display/framebuffer.c | 12 +++++++-----
hw/i386/kvmvapic.c | 1 +
hw/misc/vfio.c | 2 ++
hw/virtio/dataplane/hostmem.c | 7 +++++++
hw/virtio/vhost.c | 2 ++
hw/virtio/virtio-balloon.c | 1 +
hw/xen/xen_pt.c | 4 ++++
include/hw/virtio/dataplane/hostmem.h | 1 +
kvm-all.c | 2 ++
memory.c | 21 +++++++++++++++++++++
target-arm/kvm.c | 2 ++
target-sparc/mmu_helper.c | 1 +
xen-all.c | 2 ++
16 files changed, 63 insertions(+), 5 deletions(-)
diff --git a/exec.c b/exec.c
index f926bd7..e3ac1a1 100644
--- a/exec.c
+++ b/exec.c
@@ -763,11 +763,14 @@ static uint16_t phys_section_add(MemoryRegionSection *section)
phys_sections_nb_alloc);
}
phys_sections[phys_sections_nb] = *section;
+ memory_region_ref(section->mr);
return phys_sections_nb++;
}
static void phys_section_destroy(MemoryRegion *mr)
{
+ memory_region_unref(mr);
+
if (mr->subpage) {
subpage_t *subpage = container_of(mr, subpage_t, iomem);
memory_region_destroy(&subpage->iomem);
diff --git a/hw/core/loader.c b/hw/core/loader.c
index d569636..44311ff 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -727,6 +727,7 @@ int rom_load_all(void)
addr += rom->romsize;
section = memory_region_find(get_system_memory(), rom->addr, 1);
rom->isrom = int128_nz(section.size) && memory_region_is_rom(section.mr);
+ memory_region_unref(section.mr);
}
qemu_register_reset(rom_reset, NULL);
roms_loaded = 1;
diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c
index d9088d9..b520f52 100644
--- a/hw/display/exynos4210_fimd.c
+++ b/hw/display/exynos4210_fimd.c
@@ -1126,6 +1126,11 @@ static void fimd_update_memory_section(Exynos4210fimdState *s, unsigned win)
/* Total number of bytes of virtual screen used by current window */
w->fb_len = fb_mapped_len = (w->virtpage_width + w->virtpage_offsize) *
(w->rightbot_y - w->lefttop_y + 1);
+
+ /* TODO: add .exit and unref the region there. Not needed yet since sysbus
+ * does not support hot-unplug.
+ */
+ memory_region_unref(w->mem_section.mr);
w->mem_section = memory_region_find(sysbus_address_space(&s->busdev),
fb_start_addr, w->fb_len);
assert(w->mem_section.mr);
@@ -1154,6 +1159,7 @@ static void fimd_update_memory_section(Exynos4210fimdState *s, unsigned win)
return;
error_return:
+ memory_region_unref(w->mem_section.mr);
w->mem_section.mr = NULL;
w->mem_section.size = int128_zero();
w->host_fb_addr = NULL;
diff --git a/hw/display/framebuffer.c b/hw/display/framebuffer.c
index 49c9e59..4546e42 100644
--- a/hw/display/framebuffer.c
+++ b/hw/display/framebuffer.c
@@ -54,11 +54,11 @@ void framebuffer_update_display(
src_len = src_width * rows;
mem_section = memory_region_find(address_space, base, src_len);
+ mem = mem_section.mr;
if (int128_get64(mem_section.size) != src_len ||
!memory_region_is_ram(mem_section.mr)) {
- return;
+ goto out;
}
- mem = mem_section.mr;
assert(mem);
assert(mem_section.offset_within_address_space == base);
@@ -68,10 +68,10 @@ void framebuffer_update_display(
but it's not really worth it as dirty flag tracking will probably
already have failed above. */
if (!src_base)
- return;
+ goto out;
if (src_len != src_width * rows) {
cpu_physical_memory_unmap(src_base, src_len, 0, 0);
- return;
+ goto out;
}
src = src_base;
dest = surface_data(ds);
@@ -102,10 +102,12 @@ void framebuffer_update_display(
}
cpu_physical_memory_unmap(src_base, src_len, 0, 0);
if (first < 0) {
- return;
+ goto out;
}
memory_region_reset_dirty(mem, mem_section.offset_within_region, src_len,
DIRTY_MEMORY_VGA);
*first_row = first;
*last_row = last;
+out:
+ memory_region_unref(mem);
}
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
index 08da69e..21b5912 100644
--- a/hw/i386/kvmvapic.c
+++ b/hw/i386/kvmvapic.c
@@ -605,6 +605,7 @@ static void vapic_map_rom_writable(VAPICROMState *s)
rom_size);
memory_region_add_subregion_overlap(as, rom_paddr, &s->rom, 1000);
s->rom_mapped_writable = true;
+ memory_region_unref(section.mr);
}
static int vapic_prepare(VAPICROMState *s)
diff --git a/hw/misc/vfio.c b/hw/misc/vfio.c
index e2e957d..675bbfc 100644
--- a/hw/misc/vfio.c
+++ b/hw/misc/vfio.c
@@ -1969,6 +1969,7 @@ static void vfio_listener_region_add(MemoryListener *listener,
DPRINTF("region_add %"HWADDR_PRIx" - %"HWADDR_PRIx" [%p]\n",
iova, end - 1, vaddr);
+ memory_region_ref(section->mr);
ret = vfio_dma_map(container, iova, end - iova, vaddr, section->readonly);
if (ret) {
error_report("vfio_dma_map(%p, 0x%"HWADDR_PRIx", "
@@ -2010,6 +2011,7 @@ static void vfio_listener_region_del(MemoryListener *listener,
iova, end - 1);
ret = vfio_dma_unmap(container, iova, end - iova);
+ memory_region_unref(section->mr);
if (ret) {
error_report("vfio_dma_unmap(%p, 0x%"HWADDR_PRIx", "
"0x%"HWADDR_PRIx") = %d (%m)",
diff --git a/hw/virtio/dataplane/hostmem.c b/hw/virtio/dataplane/hostmem.c
index 7e46723..901d98b 100644
--- a/hw/virtio/dataplane/hostmem.c
+++ b/hw/virtio/dataplane/hostmem.c
@@ -64,8 +64,12 @@ out:
static void hostmem_listener_commit(MemoryListener *listener)
{
HostMem *hostmem = container_of(listener, HostMem, listener);
+ int i;
qemu_mutex_lock(&hostmem->current_regions_lock);
+ for (i = 0; i < hostmem->num_current_regions; i++) {
+ memory_region_unref(hostmem->current_regions[i].mr);
+ }
g_free(hostmem->current_regions);
hostmem->current_regions = hostmem->new_regions;
hostmem->num_current_regions = hostmem->num_new_regions;
@@ -92,8 +96,11 @@ static void hostmem_append_new_region(HostMem *hostmem,
.guest_addr = section->offset_within_address_space,
.size = int128_get64(section->size),
.readonly = section->readonly,
+ .mr = section->mr,
};
hostmem->num_new_regions++;
+
+ memory_region_ref(section->mr);
}
static void hostmem_listener_append_region(MemoryListener *listener,
diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c
index baf84ea..96ab625 100644
--- a/hw/virtio/vhost.c
+++ b/hw/virtio/vhost.c
@@ -497,6 +497,7 @@ static void vhost_region_add(MemoryListener *listener,
dev->mem_sections = g_renew(MemoryRegionSection, dev->mem_sections,
dev->n_mem_sections);
dev->mem_sections[dev->n_mem_sections - 1] = *section;
+ memory_region_ref(section->mr);
vhost_set_memory(listener, section, true);
}
@@ -512,6 +513,7 @@ static void vhost_region_del(MemoryListener *listener,
}
vhost_set_memory(listener, section, false);
+ memory_region_unref(section->mr);
for (i = 0; i < dev->n_mem_sections; ++i) {
if (dev->mem_sections[i].offset_within_address_space
== section->offset_within_address_space) {
diff --git a/hw/virtio/virtio-balloon.c b/hw/virtio/virtio-balloon.c
index a27051c..3fa72a9 100644
--- a/hw/virtio/virtio-balloon.c
+++ b/hw/virtio/virtio-balloon.c
@@ -205,6 +205,7 @@ static void virtio_balloon_handle_output(VirtIODevice *vdev, VirtQueue *vq)
addr = section.offset_within_region;
balloon_page(memory_region_get_ram_ptr(section.mr) + addr,
!!(vq == s->dvq));
+ memory_region_unref(section.mr);
}
virtqueue_push(vq, &elem, offset);
diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
index 15b4896..c06a018 100644
--- a/hw/xen/xen_pt.c
+++ b/hw/xen/xen_pt.c
@@ -606,6 +606,7 @@ static void xen_pt_region_add(MemoryListener *l, MemoryRegionSection *sec)
XenPCIPassthroughState *s = container_of(l, XenPCIPassthroughState,
memory_listener);
+ memory_region_ref(sec->mr);
xen_pt_region_update(s, sec, true);
}
@@ -615,6 +616,7 @@ static void xen_pt_region_del(MemoryListener *l, MemoryRegionSection *sec)
memory_listener);
xen_pt_region_update(s, sec, false);
+ memory_region_unref(sec->mr);
}
static void xen_pt_io_region_add(MemoryListener *l, MemoryRegionSection *sec)
@@ -622,6 +624,7 @@ static void xen_pt_io_region_add(MemoryListener *l, MemoryRegionSection *sec)
XenPCIPassthroughState *s = container_of(l, XenPCIPassthroughState,
io_listener);
+ memory_region_ref(sec->mr);
xen_pt_region_update(s, sec, true);
}
@@ -631,6 +634,7 @@ static void xen_pt_io_region_del(MemoryListener *l, MemoryRegionSection *sec)
io_listener);
xen_pt_region_update(s, sec, false);
+ memory_region_unref(sec->mr);
}
static const MemoryListener xen_pt_memory_listener = {
diff --git a/include/hw/virtio/dataplane/hostmem.h b/include/hw/virtio/dataplane/hostmem.h
index b2cf093..2810f4b 100644
--- a/include/hw/virtio/dataplane/hostmem.h
+++ b/include/hw/virtio/dataplane/hostmem.h
@@ -18,6 +18,7 @@
#include "qemu/thread.h"
typedef struct {
+ MemoryRegion *mr;
void *host_addr;
hwaddr guest_addr;
uint64_t size;
diff --git a/kvm-all.c b/kvm-all.c
index c757dd2..66a86c2 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -789,6 +789,7 @@ static void kvm_set_phys_mem(MemoryRegionSection *section, bool add)
static void kvm_region_add(MemoryListener *listener,
MemoryRegionSection *section)
{
+ memory_region_ref(section->mr);
kvm_set_phys_mem(section, true);
}
@@ -796,6 +797,7 @@ static void kvm_region_del(MemoryListener *listener,
MemoryRegionSection *section)
{
kvm_set_phys_mem(section, false);
+ memory_region_unref(section->mr);
}
static void kvm_log_sync(MemoryListener *listener,
diff --git a/memory.c b/memory.c
index 24027c5..543e0cc 100644
--- a/memory.c
+++ b/memory.c
@@ -148,6 +148,7 @@ static bool memory_listener_match(MemoryListener *listener,
} \
} while (0)
+/* No need to ref/unref .mr, the FlatRange keeps it alive. */
#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
.mr = (fr)->mr, \
@@ -263,11 +264,17 @@ static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
memmove(view->ranges + pos + 1, view->ranges + pos,
(view->nr - pos) * sizeof(FlatRange));
view->ranges[pos] = *range;
+ memory_region_ref(range->mr);
++view->nr;
}
static void flatview_destroy(FlatView *view)
{
+ int i;
+
+ for (i = 0; i < view->nr; i++) {
+ memory_region_unref(view->ranges[i].mr);
+ }
g_free(view->ranges);
}
@@ -709,6 +716,11 @@ static void memory_region_destructor_ram(MemoryRegion *mr)
qemu_ram_free(mr->ram_addr);
}
+static void memory_region_destructor_alias(MemoryRegion *mr)
+{
+ memory_region_unref(mr->alias);
+}
+
static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
{
qemu_ram_free_from_ptr(mr->ram_addr);
@@ -964,6 +976,8 @@ void memory_region_init_alias(MemoryRegion *mr,
uint64_t size)
{
memory_region_init(mr, owner, name, size);
+ memory_region_ref(orig);
+ mr->destructor = memory_region_destructor_alias;
mr->alias = orig;
mr->alias_offset = offset;
}
@@ -1342,6 +1356,7 @@ static void memory_region_add_subregion_common(MemoryRegion *mr,
memory_region_transaction_begin();
assert(!subregion->parent);
+ memory_region_ref(subregion);
subregion->parent = mr;
subregion->addr = offset;
QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
@@ -1404,6 +1419,7 @@ void memory_region_del_subregion(MemoryRegion *mr,
assert(subregion->parent == mr);
subregion->parent = NULL;
QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
+ memory_region_unref(subregion);
memory_region_update_pending |= mr->enabled && subregion->enabled;
memory_region_transaction_commit();
}
@@ -1431,12 +1447,14 @@ void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
}
memory_region_transaction_begin();
+ memory_region_ref(mr);
memory_region_del_subregion(parent, mr);
if (may_overlap) {
memory_region_add_subregion_overlap(parent, addr, mr, priority);
} else {
memory_region_add_subregion(parent, addr, mr);
}
+ memory_region_unref(mr);
memory_region_transaction_commit();
}
@@ -1484,6 +1502,7 @@ bool memory_region_present(MemoryRegion *parent, hwaddr addr)
if (!mr) {
return false;
}
+ memory_region_unref(mr);
return true;
}
@@ -1523,6 +1542,8 @@ MemoryRegionSection memory_region_find(MemoryRegion *mr,
ret.size = range.size;
ret.offset_within_address_space = int128_get64(range.start);
ret.readonly = fr->readonly;
+ memory_region_ref(ret.mr);
+
return ret;
}
diff --git a/target-arm/kvm.c b/target-arm/kvm.c
index d3937a2..b92e00d 100644
--- a/target-arm/kvm.c
+++ b/target-arm/kvm.c
@@ -233,6 +233,7 @@ static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
abort();
}
}
+ memory_region_unref(kd->mr);
g_free(kd);
}
}
@@ -258,6 +259,7 @@ void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid)
kd->kda.id = devid;
kd->kda.addr = -1;
QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
+ memory_region_ref(kd->mr);
}
bool write_kvmstate_to_list(ARMCPU *cpu)
diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c
index 3983c96..740cbe8 100644
--- a/target-sparc/mmu_helper.c
+++ b/target-sparc/mmu_helper.c
@@ -845,6 +845,7 @@ hwaddr cpu_get_phys_page_debug(CPUSPARCState *env, target_ulong addr)
}
}
section = memory_region_find(get_system_memory(), phys_addr, 1);
+ memory_region_unref(section.mr);
if (!int128_nz(section.size)) {
return -1;
}
diff --git a/xen-all.c b/xen-all.c
index 1f040c0..21246e0 100644
--- a/xen-all.c
+++ b/xen-all.c
@@ -459,6 +459,7 @@ static void xen_set_memory(struct MemoryListener *listener,
static void xen_region_add(MemoryListener *listener,
MemoryRegionSection *section)
{
+ memory_region_ref(section->mr);
xen_set_memory(listener, section, true);
}
@@ -466,6 +467,7 @@ static void xen_region_del(MemoryListener *listener,
MemoryRegionSection *section)
{
xen_set_memory(listener, section, false);
+ memory_region_unref(section->mr);
}
static void xen_sync_dirty_bitmap(XenIOState *state,
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 25/66] exec: check MRU in qemu_ram_addr_from_host
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (22 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 24/66] memory: add ref/unref calls Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 26/66] exec: move qemu_ram_addr_from_host_nofail to cputlb.c Paolo Bonzini
` (41 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
This function is not used outside the iothread mutex, so it
can use ram_list.mru_block.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/exec.c b/exec.c
index e3ac1a1..69af46e 100644
--- a/exec.c
+++ b/exec.c
@@ -1400,18 +1400,26 @@ int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr)
return 0;
}
+ block = ram_list.mru_block;
+ if (block && block->host && host - block->host < block->length) {
+ goto found;
+ }
+
QTAILQ_FOREACH(block, &ram_list.blocks, next) {
/* This case append when the block is not mapped. */
if (block->host == NULL) {
continue;
}
if (host - block->host < block->length) {
- *ram_addr = block->offset + (host - block->host);
- return 0;
+ goto found;
}
}
return -1;
+
+found:
+ *ram_addr = block->offset + (host - block->host);
+ return 0;
}
/* Some of the softmmu routines need to translate from a host pointer
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 26/66] exec: move qemu_ram_addr_from_host_nofail to cputlb.c
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (23 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 25/66] exec: check MRU in qemu_ram_addr_from_host Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 27/66] memory: return MemoryRegion from qemu_ram_addr_from_host Paolo Bonzini
` (40 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
After the next patch it would not be used elsewhere anyway. Also,
the _nofail and the standard versions of this function return different
things, which is confusing. Removing the function from the public headers
limits the confusion.
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
cputlb.c | 11 +++++++++++
exec.c | 19 +++++--------------
include/exec/cpu-common.h | 1 -
3 files changed, 16 insertions(+), 15 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index 80b2a94..be24080 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -158,6 +158,17 @@ void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry, uintptr_t start,
}
}
+static inline ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr)
+{
+ ram_addr_t ram_addr;
+
+ if (qemu_ram_addr_from_host(ptr, &ram_addr)) {
+ fprintf(stderr, "Bad ram pointer %p\n", ptr);
+ abort();
+ }
+ return ram_addr;
+}
+
static inline void tlb_update_dirty(CPUTLBEntry *tlb_entry)
{
ram_addr_t ram_addr;
diff --git a/exec.c b/exec.c
index 69af46e..55c0750 100644
--- a/exec.c
+++ b/exec.c
@@ -1390,6 +1390,8 @@ static void *qemu_ram_ptr_length(ram_addr_t addr, ram_addr_t *size)
}
}
+/* Some of the softmmu routines need to translate from a host pointer
+ (typically a TLB entry) back to a ram offset. */
int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr)
{
RAMBlock *block;
@@ -1422,19 +1424,6 @@ found:
return 0;
}
-/* Some of the softmmu routines need to translate from a host pointer
- (typically a TLB entry) back to a ram offset. */
-ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr)
-{
- ram_addr_t ram_addr;
-
- if (qemu_ram_addr_from_host(ptr, &ram_addr)) {
- fprintf(stderr, "Bad ram pointer %p\n", ptr);
- abort();
- }
- return ram_addr;
-}
-
static void notdirty_mem_write(void *opaque, hwaddr ram_addr,
uint64_t val, unsigned size)
{
@@ -2121,7 +2110,9 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
{
if (buffer != bounce.buffer) {
if (is_write) {
- ram_addr_t addr1 = qemu_ram_addr_from_host_nofail(buffer);
+ ram_addr_t addr1;
+ int rc = qemu_ram_addr_from_host(buffer, &addr1);
+ assert(rc == 0);
while (access_len) {
unsigned l;
l = TARGET_PAGE_SIZE;
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 5240ae2..7abb70f 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -53,7 +53,6 @@ typedef uint32_t CPUReadMemoryFunc(void *opaque, hwaddr addr);
void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
/* This should not be used by devices. */
int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr);
-ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr);
void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev);
void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 27/66] memory: return MemoryRegion from qemu_ram_addr_from_host
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (24 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 26/66] exec: move qemu_ram_addr_from_host_nofail to cputlb.c Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 28/66] exec: reorganize address_space_map Paolo Bonzini
` (39 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
It will be needed in the next patch.
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
cputlb.c | 2 +-
exec.c | 37 ++++++++++++++++++++++---------------
include/exec/cpu-common.h | 2 +-
target-i386/kvm.c | 4 ++--
4 files changed, 26 insertions(+), 19 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index be24080..828007c 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -162,7 +162,7 @@ static inline ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr)
{
ram_addr_t ram_addr;
- if (qemu_ram_addr_from_host(ptr, &ram_addr)) {
+ if (qemu_ram_addr_from_host(ptr, &ram_addr) == NULL) {
fprintf(stderr, "Bad ram pointer %p\n", ptr);
abort();
}
diff --git a/exec.c b/exec.c
index 55c0750..307efea 100644
--- a/exec.c
+++ b/exec.c
@@ -1288,15 +1288,7 @@ void qemu_ram_remap(ram_addr_t addr, ram_addr_t length)
}
#endif /* !_WIN32 */
-/* Return a host pointer to ram allocated with qemu_ram_alloc.
- With the exception of the softmmu code in this file, this should
- only be used for local memory (e.g. video ram) that the device owns,
- and knows it isn't going to access beyond the end of the block.
-
- It should not be used for general purpose DMA.
- Use cpu_physical_memory_map/cpu_physical_memory_rw instead.
- */
-void *qemu_get_ram_ptr(ram_addr_t addr)
+static RAMBlock *qemu_get_ram_block(ram_addr_t addr)
{
RAMBlock *block;
@@ -1316,6 +1308,21 @@ void *qemu_get_ram_ptr(ram_addr_t addr)
found:
ram_list.mru_block = block;
+ return block;
+}
+
+/* Return a host pointer to ram allocated with qemu_ram_alloc.
+ With the exception of the softmmu code in this file, this should
+ only be used for local memory (e.g. video ram) that the device owns,
+ and knows it isn't going to access beyond the end of the block.
+
+ It should not be used for general purpose DMA.
+ Use cpu_physical_memory_map/cpu_physical_memory_rw instead.
+ */
+void *qemu_get_ram_ptr(ram_addr_t addr)
+{
+ RAMBlock *block = qemu_get_ram_block(addr);
+
if (xen_enabled()) {
/* We need to check if the requested address is in the RAM
* because we don't want to map the entire memory in QEMU.
@@ -1392,14 +1399,14 @@ static void *qemu_ram_ptr_length(ram_addr_t addr, ram_addr_t *size)
/* Some of the softmmu routines need to translate from a host pointer
(typically a TLB entry) back to a ram offset. */
-int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr)
+MemoryRegion *qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr)
{
RAMBlock *block;
uint8_t *host = ptr;
if (xen_enabled()) {
*ram_addr = xen_ram_addr_from_mapcache(ptr);
- return 0;
+ return qemu_get_ram_block(*ram_addr)->mr;
}
block = ram_list.mru_block;
@@ -1417,11 +1424,11 @@ int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr)
}
}
- return -1;
+ return NULL;
found:
*ram_addr = block->offset + (host - block->host);
- return 0;
+ return block->mr;
}
static void notdirty_mem_write(void *opaque, hwaddr ram_addr,
@@ -2111,8 +2118,8 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
if (buffer != bounce.buffer) {
if (is_write) {
ram_addr_t addr1;
- int rc = qemu_ram_addr_from_host(buffer, &addr1);
- assert(rc == 0);
+ MemoryRegion *mr = qemu_ram_addr_from_host(buffer, &addr1);
+ assert(mr != NULL);
while (access_len) {
unsigned l;
l = TARGET_PAGE_SIZE;
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 7abb70f..e4996e1 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -52,7 +52,7 @@ typedef uint32_t CPUReadMemoryFunc(void *opaque, hwaddr addr);
void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
/* This should not be used by devices. */
-int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr);
+MemoryRegion *qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr);
void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev);
void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 39f4fbb..4b557b3 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -318,7 +318,7 @@ int kvm_arch_on_sigbus_vcpu(CPUState *c, int code, void *addr)
if ((env->mcg_cap & MCG_SER_P) && addr
&& (code == BUS_MCEERR_AR || code == BUS_MCEERR_AO)) {
- if (qemu_ram_addr_from_host(addr, &ram_addr) ||
+ if (qemu_ram_addr_from_host(addr, &ram_addr) == NULL ||
!kvm_physical_memory_addr_from_host(c->kvm_state, addr, &paddr)) {
fprintf(stderr, "Hardware memory error for memory used by "
"QEMU itself instead of guest system!\n");
@@ -350,7 +350,7 @@ int kvm_arch_on_sigbus(int code, void *addr)
hwaddr paddr;
/* Hope we are lucky for AO MCE */
- if (qemu_ram_addr_from_host(addr, &ram_addr) ||
+ if (qemu_ram_addr_from_host(addr, &ram_addr) == NULL ||
!kvm_physical_memory_addr_from_host(CPU(first_cpu)->kvm_state,
addr, &paddr)) {
fprintf(stderr, "Hardware memory error for memory used by "
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 28/66] exec: reorganize address_space_map
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (25 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 27/66] memory: return MemoryRegion from qemu_ram_addr_from_host Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-08 8:21 ` Peter Maydell
2013-07-04 15:13 ` [Qemu-devel] [PATCH 29/66] memory: ref/unref memory across address_space_map/unmap Paolo Bonzini
` (38 subsequent siblings)
65 siblings, 1 reply; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
First of all, rename "todo" to "done".
Second, clearly separate the case of done == 0 with the case of done != 0.
This will help handling reference counting in the next patch.
Third, this test:
if (memory_region_get_ram_addr(mr) + xlat != raddr + todo) {
does not guarantee that the memory region is the same across two iterations
of the while loop. For example, you could have two blocks:
A) size 640 K, mapped at physical address 0, ram_addr_t 0
B) size 64 K, mapped at physical address 0xa0000, ram_addr_t 0xa0000
then mapping 1 M starting at physical address zero will erroneously treat
B as the continuation of block A. qemu_ram_ptr_length ensures that no
invalid memory is accessed, but it is still a pointless complication of
the algorithm. The patch makes the logic clearer with an explicit test
that the memory region is the same.
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 71 +++++++++++++++++++++++++++++++++++-------------------------------
1 file changed, 38 insertions(+), 33 deletions(-)
diff --git a/exec.c b/exec.c
index 307efea..a994bc8 100644
--- a/exec.c
+++ b/exec.c
@@ -2065,47 +2065,52 @@ void *address_space_map(AddressSpace *as,
bool is_write)
{
hwaddr len = *plen;
- hwaddr todo = 0;
- hwaddr l, xlat;
- MemoryRegion *mr;
- ram_addr_t raddr = RAM_ADDR_MAX;
- ram_addr_t rlen;
- void *ret;
+ hwaddr done = 0;
+ hwaddr l, xlat, base;
+ MemoryRegion *mr, *this_mr;
+ ram_addr_t raddr;
- while (len > 0) {
- l = len;
- mr = address_space_translate(as, addr, &xlat, &l, is_write);
-
- if (!memory_access_is_direct(mr, is_write)) {
- if (todo || bounce.buffer) {
- break;
- }
- bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, TARGET_PAGE_SIZE);
- bounce.addr = addr;
- bounce.len = l;
- if (!is_write) {
- address_space_read(as, addr, bounce.buffer, l);
- }
+ if (len == 0) {
+ return NULL;
+ }
- *plen = l;
- return bounce.buffer;
+ l = len;
+ mr = address_space_translate(as, addr, &xlat, &l, is_write);
+ if (!memory_access_is_direct(mr, is_write)) {
+ if (bounce.buffer) {
+ return NULL;
}
- if (!todo) {
- raddr = memory_region_get_ram_addr(mr) + xlat;
- } else {
- if (memory_region_get_ram_addr(mr) + xlat != raddr + todo) {
- break;
- }
+ bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, TARGET_PAGE_SIZE);
+ bounce.addr = addr;
+ bounce.len = l;
+ if (!is_write) {
+ address_space_read(as, addr, bounce.buffer, l);
}
+ *plen = l;
+ return bounce.buffer;
+ }
+
+ base = xlat;
+ raddr = memory_region_get_ram_addr(mr);
+
+ for (;;) {
len -= l;
addr += l;
- todo += l;
+ done += l;
+ if (len == 0) {
+ break;
+ }
+
+ l = len;
+ this_mr = address_space_translate(as, addr, &xlat, &l, is_write);
+ if (this_mr != mr || xlat != base + done) {
+ break;
+ }
}
- rlen = todo;
- ret = qemu_ram_ptr_length(raddr, &rlen);
- *plen = rlen;
- return ret;
+
+ *plen = done;
+ return qemu_ram_ptr_length(raddr + base, plen);
}
/* Unmaps a memory region previously mapped by address_space_map().
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 29/66] memory: ref/unref memory across address_space_map/unmap
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (26 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 28/66] exec: reorganize address_space_map Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 30/66] escc: rename struct to ESCCState Paolo Bonzini
` (37 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
The iothread mutex might be released between map and unmap, so the
mapped region might disappear.
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/exec.c b/exec.c
index a994bc8..b339c23 100644
--- a/exec.c
+++ b/exec.c
@@ -1986,6 +1986,7 @@ void cpu_physical_memory_write_rom(hwaddr addr,
}
typedef struct {
+ MemoryRegion *mr;
void *buffer;
hwaddr addr;
hwaddr len;
@@ -2083,6 +2084,9 @@ void *address_space_map(AddressSpace *as,
bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, TARGET_PAGE_SIZE);
bounce.addr = addr;
bounce.len = l;
+
+ memory_region_ref(mr);
+ bounce.mr = mr;
if (!is_write) {
address_space_read(as, addr, bounce.buffer, l);
}
@@ -2109,6 +2113,7 @@ void *address_space_map(AddressSpace *as,
}
}
+ memory_region_ref(mr);
*plen = done;
return qemu_ram_ptr_length(raddr + base, plen);
}
@@ -2121,10 +2126,12 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
int is_write, hwaddr access_len)
{
if (buffer != bounce.buffer) {
+ MemoryRegion *mr;
+ ram_addr_t addr1;
+
+ mr = qemu_ram_addr_from_host(buffer, &addr1);
+ assert(mr != NULL);
if (is_write) {
- ram_addr_t addr1;
- MemoryRegion *mr = qemu_ram_addr_from_host(buffer, &addr1);
- assert(mr != NULL);
while (access_len) {
unsigned l;
l = TARGET_PAGE_SIZE;
@@ -2138,6 +2145,7 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
if (xen_enabled()) {
xen_invalidate_map_cache_entry(buffer);
}
+ memory_region_unref(mr);
return;
}
if (is_write) {
@@ -2145,6 +2153,7 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
}
qemu_vfree(bounce.buffer);
bounce.buffer = NULL;
+ memory_region_unref(bounce.mr);
cpu_notify_map_clients();
}
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 30/66] escc: rename struct to ESCCState
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (27 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 29/66] memory: ref/unref memory across address_space_map/unmap Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 31/66] vga: pass owner to vga_init Paolo Bonzini
` (36 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
We are using the same struct name for two devices. 8250 is widespread
enough that this causes some confusion, rename the other instance.
Reviewed-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/char/escc.c | 34 +++++++++++++++++-----------------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/hw/char/escc.c b/hw/char/escc.c
index 29ecbaa..422adf2 100644
--- a/hw/char/escc.c
+++ b/hw/char/escc.c
@@ -96,14 +96,14 @@ typedef struct ChannelState {
uint8_t rx, tx;
} ChannelState;
-struct SerialState {
+typedef struct ESCCState {
SysBusDevice busdev;
struct ChannelState chn[2];
uint32_t it_shift;
MemoryRegion mmio;
uint32_t disabled;
uint32_t frequency;
-};
+} ESCCState;
#define SERIAL_CTRL 0
#define SERIAL_DATA 1
@@ -309,7 +309,7 @@ static void escc_reset_chn(ChannelState *s)
static void escc_reset(DeviceState *d)
{
- SerialState *s = container_of(d, SerialState, busdev.qdev);
+ ESCCState *s = container_of(d, ESCCState, busdev.qdev);
escc_reset_chn(&s->chn[0]);
escc_reset_chn(&s->chn[1]);
@@ -466,7 +466,7 @@ static void escc_update_parameters(ChannelState *s)
static void escc_mem_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
- SerialState *serial = opaque;
+ ESCCState *serial = opaque;
ChannelState *s;
uint32_t saddr;
int newreg, channel;
@@ -568,7 +568,7 @@ static void escc_mem_write(void *opaque, hwaddr addr,
static uint64_t escc_mem_read(void *opaque, hwaddr addr,
unsigned size)
{
- SerialState *serial = opaque;
+ ESCCState *serial = opaque;
ChannelState *s;
uint32_t saddr;
uint32_t ret;
@@ -677,7 +677,7 @@ static const VMStateDescription vmstate_escc = {
.minimum_version_id = 1,
.minimum_version_id_old = 1,
.fields = (VMStateField []) {
- VMSTATE_STRUCT_ARRAY(chn, SerialState, 2, 2, vmstate_escc_chn,
+ VMSTATE_STRUCT_ARRAY(chn, ESCCState, 2, 2, vmstate_escc_chn,
ChannelState),
VMSTATE_END_OF_LIST()
}
@@ -689,7 +689,7 @@ MemoryRegion *escc_init(hwaddr base, qemu_irq irqA, qemu_irq irqB,
{
DeviceState *dev;
SysBusDevice *s;
- SerialState *d;
+ ESCCState *d;
dev = qdev_create(NULL, "escc");
qdev_prop_set_uint32(dev, "disabled", 0);
@@ -707,7 +707,7 @@ MemoryRegion *escc_init(hwaddr base, qemu_irq irqA, qemu_irq irqB,
sysbus_mmio_map(s, 0, base);
}
- d = FROM_SYSBUS(SerialState, s);
+ d = FROM_SYSBUS(ESCCState, s);
return &d->mmio;
}
@@ -869,7 +869,7 @@ void slavio_serial_ms_kbd_init(hwaddr base, qemu_irq irq,
static int escc_init1(SysBusDevice *dev)
{
- SerialState *s = FROM_SYSBUS(SerialState, dev);
+ ESCCState *s = FROM_SYSBUS(ESCCState, dev);
unsigned int i;
s->chn[0].disabled = s->disabled;
@@ -902,13 +902,13 @@ static int escc_init1(SysBusDevice *dev)
}
static Property escc_properties[] = {
- DEFINE_PROP_UINT32("frequency", SerialState, frequency, 0),
- DEFINE_PROP_UINT32("it_shift", SerialState, it_shift, 0),
- DEFINE_PROP_UINT32("disabled", SerialState, disabled, 0),
- DEFINE_PROP_UINT32("chnBtype", SerialState, chn[0].type, 0),
- DEFINE_PROP_UINT32("chnAtype", SerialState, chn[1].type, 0),
- DEFINE_PROP_CHR("chrB", SerialState, chn[0].chr),
- DEFINE_PROP_CHR("chrA", SerialState, chn[1].chr),
+ DEFINE_PROP_UINT32("frequency", ESCCState, frequency, 0),
+ DEFINE_PROP_UINT32("it_shift", ESCCState, it_shift, 0),
+ DEFINE_PROP_UINT32("disabled", ESCCState, disabled, 0),
+ DEFINE_PROP_UINT32("chnBtype", ESCCState, chn[0].type, 0),
+ DEFINE_PROP_UINT32("chnAtype", ESCCState, chn[1].type, 0),
+ DEFINE_PROP_CHR("chrB", ESCCState, chn[0].chr),
+ DEFINE_PROP_CHR("chrA", ESCCState, chn[1].chr),
DEFINE_PROP_END_OF_LIST(),
};
@@ -926,7 +926,7 @@ static void escc_class_init(ObjectClass *klass, void *data)
static const TypeInfo escc_info = {
.name = "escc",
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(SerialState),
+ .instance_size = sizeof(ESCCState),
.class_init = escc_class_init,
};
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 31/66] vga: pass owner to vga_init
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (28 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 30/66] escc: rename struct to ESCCState Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 32/66] vga: pass owner to vga_common_init Paolo Bonzini
` (35 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/display/qxl.c | 3 ++-
hw/display/vga-pci.c | 3 ++-
hw/display/vga.c | 2 +-
hw/display/vga_int.h | 2 +-
hw/display/vmware_vga.c | 2 +-
5 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/hw/display/qxl.c b/hw/display/qxl.c
index bcfcce4..5754fdc 100644
--- a/hw/display/qxl.c
+++ b/hw/display/qxl.c
@@ -2068,7 +2068,8 @@ static int qxl_init_primary(PCIDevice *dev)
qxl_init_ramsize(qxl);
vga->vram_size_mb = qxl->vga.vram_size >> 20;
vga_common_init(vga);
- vga_init(vga, pci_address_space(dev), pci_address_space_io(dev), false);
+ vga_init(vga, OBJECT(dev),
+ pci_address_space(dev), pci_address_space_io(dev), false);
portio_list_init(qxl_vga_port_list, qxl_vga_portio_list, vga, "vga");
portio_list_add(qxl_vga_port_list, pci_address_space_io(dev), 0x3b0);
diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c
index 23d5b56..4716230 100644
--- a/hw/display/vga-pci.c
+++ b/hw/display/vga-pci.c
@@ -148,7 +148,8 @@ static int pci_std_vga_initfn(PCIDevice *dev)
/* vga + console init */
vga_common_init(s);
- vga_init(s, pci_address_space(dev), pci_address_space_io(dev), true);
+ vga_init(s, OBJECT(dev), pci_address_space(dev), pci_address_space_io(dev),
+ true);
s->con = graphic_console_init(DEVICE(dev), s->hw_ops, s);
diff --git a/hw/display/vga.c b/hw/display/vga.c
index 21e3763..24b8b45 100644
--- a/hw/display/vga.c
+++ b/hw/display/vga.c
@@ -2350,7 +2350,7 @@ MemoryRegion *vga_init_io(VGACommonState *s,
return vga_mem;
}
-void vga_init(VGACommonState *s, MemoryRegion *address_space,
+void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space,
MemoryRegion *address_space_io, bool init_vga_ports)
{
MemoryRegion *vga_io_memory;
diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h
index 66f9f3c..accc9f5 100644
--- a/hw/display/vga_int.h
+++ b/hw/display/vga_int.h
@@ -178,7 +178,7 @@ static inline int c6_to_8(int v)
}
void vga_common_init(VGACommonState *s);
-void vga_init(VGACommonState *s, MemoryRegion *address_space,
+void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space,
MemoryRegion *address_space_io, bool init_vga_ports);
MemoryRegion *vga_init_io(VGACommonState *s,
const MemoryRegionPortio **vga_ports,
diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
index 05be1fa..358bcc0 100644
--- a/hw/display/vmware_vga.c
+++ b/hw/display/vmware_vga.c
@@ -1199,7 +1199,7 @@ static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s,
s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram);
vga_common_init(&s->vga);
- vga_init(&s->vga, address_space, io, true);
+ vga_init(&s->vga, OBJECT(dev), address_space, io, true);
vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga);
s->new_depth = 32;
}
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 32/66] vga: pass owner to vga_common_init
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (29 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 31/66] vga: pass owner to vga_init Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 33/66] vga: pass owner to cirrus_init_common Paolo Bonzini
` (34 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/display/cirrus_vga.c | 4 ++--
hw/display/qxl.c | 2 +-
hw/display/vga-isa-mm.c | 2 +-
hw/display/vga-isa.c | 2 +-
hw/display/vga-pci.c | 2 +-
hw/display/vga.c | 4 ++--
hw/display/vga_int.h | 2 +-
hw/display/vmware_vga.c | 2 +-
8 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c
index 00ac9a3..80510ac 100644
--- a/hw/display/cirrus_vga.c
+++ b/hw/display/cirrus_vga.c
@@ -2912,7 +2912,7 @@ static void isa_cirrus_vga_realizefn(DeviceState *dev, Error **errp)
ISACirrusVGAState *d = ISA_CIRRUS_VGA(dev);
VGACommonState *s = &d->cirrus_vga.vga;
- vga_common_init(s);
+ vga_common_init(s, OBJECT(dev));
cirrus_init_common(&d->cirrus_vga, CIRRUS_ID_CLGD5430, 0,
isa_address_space(isadev),
isa_address_space_io(isadev));
@@ -2958,7 +2958,7 @@ static int pci_cirrus_vga_initfn(PCIDevice *dev)
int16_t device_id = pc->device_id;
/* setup VGA */
- vga_common_init(&s->vga);
+ vga_common_init(&s->vga, OBJECT(dev));
cirrus_init_common(s, device_id, 1, pci_address_space(dev),
pci_address_space_io(dev));
s->vga.con = graphic_console_init(DEVICE(dev), s->vga.hw_ops, &s->vga);
diff --git a/hw/display/qxl.c b/hw/display/qxl.c
index 5754fdc..59925ec 100644
--- a/hw/display/qxl.c
+++ b/hw/display/qxl.c
@@ -2067,7 +2067,7 @@ static int qxl_init_primary(PCIDevice *dev)
qxl->id = 0;
qxl_init_ramsize(qxl);
vga->vram_size_mb = qxl->vga.vram_size >> 20;
- vga_common_init(vga);
+ vga_common_init(vga, OBJECT(dev));
vga_init(vga, OBJECT(dev),
pci_address_space(dev), pci_address_space_io(dev), false);
portio_list_init(qxl_vga_port_list, qxl_vga_portio_list, vga, "vga");
diff --git a/hw/display/vga-isa-mm.c b/hw/display/vga-isa-mm.c
index 95707a8..695c128 100644
--- a/hw/display/vga-isa-mm.c
+++ b/hw/display/vga-isa-mm.c
@@ -132,7 +132,7 @@ int isa_vga_mm_init(hwaddr vram_base,
s = g_malloc0(sizeof(*s));
s->vga.vram_size_mb = VGA_RAM_SIZE >> 20;
- vga_common_init(&s->vga);
+ vga_common_init(&s->vga, NULL);
vga_mm_init(s, vram_base, ctrl_base, it_shift, address_space);
s->vga.con = graphic_console_init(NULL, s->vga.hw_ops, s);
diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c
index d1691a9..fbf6db5 100644
--- a/hw/display/vga-isa.c
+++ b/hw/display/vga-isa.c
@@ -56,7 +56,7 @@ static void vga_isa_realizefn(DeviceState *dev, Error **errp)
MemoryRegion *vga_io_memory;
const MemoryRegionPortio *vga_ports, *vbe_ports;
- vga_common_init(s);
+ vga_common_init(s, OBJECT(dev));
s->legacy_address_space = isa_address_space(isadev);
vga_io_memory = vga_init_io(s, &vga_ports, &vbe_ports);
isa_register_portio_list(isadev, 0x3b0, vga_ports, s, "vga");
diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c
index 4716230..62652bd 100644
--- a/hw/display/vga-pci.c
+++ b/hw/display/vga-pci.c
@@ -147,7 +147,7 @@ static int pci_std_vga_initfn(PCIDevice *dev)
VGACommonState *s = &d->vga;
/* vga + console init */
- vga_common_init(s);
+ vga_common_init(s, OBJECT(dev));
vga_init(s, OBJECT(dev), pci_address_space(dev), pci_address_space_io(dev),
true);
diff --git a/hw/display/vga.c b/hw/display/vga.c
index 24b8b45..d3e0f33 100644
--- a/hw/display/vga.c
+++ b/hw/display/vga.c
@@ -2256,7 +2256,7 @@ static const GraphicHwOps vga_ops = {
.text_update = vga_update_text,
};
-void vga_common_init(VGACommonState *s)
+void vga_common_init(VGACommonState *s, Object *obj)
{
int i, j, v, b;
@@ -2292,7 +2292,7 @@ void vga_common_init(VGACommonState *s)
s->vram_size_mb = s->vram_size >> 20;
s->is_vbe_vmstate = 1;
- memory_region_init_ram(&s->vram, NULL, "vga.vram", s->vram_size);
+ memory_region_init_ram(&s->vram, obj, "vga.vram", s->vram_size);
vmstate_register_ram_global(&s->vram);
xen_register_framebuffer(&s->vram);
s->vram_ptr = memory_region_get_ram_ptr(&s->vram);
diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h
index accc9f5..bac366c 100644
--- a/hw/display/vga_int.h
+++ b/hw/display/vga_int.h
@@ -177,7 +177,7 @@ static inline int c6_to_8(int v)
return (v << 2) | (b << 1) | b;
}
-void vga_common_init(VGACommonState *s);
+void vga_common_init(VGACommonState *s, Object *obj);
void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space,
MemoryRegion *address_space_io, bool init_vga_ports);
MemoryRegion *vga_init_io(VGACommonState *s,
diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
index 358bcc0..ce97870 100644
--- a/hw/display/vmware_vga.c
+++ b/hw/display/vmware_vga.c
@@ -1198,7 +1198,7 @@ static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s,
vmstate_register_ram_global(&s->fifo_ram);
s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram);
- vga_common_init(&s->vga);
+ vga_common_init(&s->vga, OBJECT(dev));
vga_init(&s->vga, OBJECT(dev), address_space, io, true);
vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga);
s->new_depth = 32;
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 33/66] vga: pass owner to cirrus_init_common
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (30 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 32/66] vga: pass owner to vga_common_init Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 34/66] vga: pass owner to vga_init_vbe Paolo Bonzini
` (33 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/display/cirrus_vga.c | 22 ++++++++++++----------
1 file changed, 12 insertions(+), 10 deletions(-)
diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c
index 80510ac..3d579e2 100644
--- a/hw/display/cirrus_vga.c
+++ b/hw/display/cirrus_vga.c
@@ -2805,7 +2805,8 @@ static const MemoryRegionOps cirrus_vga_io_ops = {
},
};
-static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci,
+static void cirrus_init_common(CirrusVGAState *s, Object *owner,
+ int device_id, int is_pci,
MemoryRegion *system_memory,
MemoryRegion *system_io)
{
@@ -2840,21 +2841,22 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci,
}
/* Register ioport 0x3b0 - 0x3df */
- memory_region_init_io(&s->cirrus_vga_io, NULL, &cirrus_vga_io_ops, s,
+ memory_region_init_io(&s->cirrus_vga_io, owner, &cirrus_vga_io_ops, s,
"cirrus-io", 0x30);
memory_region_add_subregion(system_io, 0x3b0, &s->cirrus_vga_io);
- memory_region_init(&s->low_mem_container, NULL,
+ memory_region_init(&s->low_mem_container, owner,
"cirrus-lowmem-container",
0x20000);
- memory_region_init_io(&s->low_mem, NULL, &cirrus_vga_mem_ops, s,
+ memory_region_init_io(&s->low_mem, owner, &cirrus_vga_mem_ops, s,
"cirrus-low-memory", 0x20000);
memory_region_add_subregion(&s->low_mem_container, 0, &s->low_mem);
for (i = 0; i < 2; ++i) {
static const char *names[] = { "vga.bank0", "vga.bank1" };
MemoryRegion *bank = &s->cirrus_bank[i];
- memory_region_init_alias(bank, NULL, names[i], &s->vga.vram, 0, 0x8000);
+ memory_region_init_alias(bank, owner, names[i], &s->vga.vram,
+ 0, 0x8000);
memory_region_set_enabled(bank, false);
memory_region_add_subregion_overlap(&s->low_mem_container, i * 0x8000,
bank, 1);
@@ -2866,13 +2868,13 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci,
memory_region_set_coalescing(&s->low_mem);
/* I/O handler for LFB */
- memory_region_init_io(&s->cirrus_linear_io, NULL, &cirrus_linear_io_ops, s,
+ memory_region_init_io(&s->cirrus_linear_io, owner, &cirrus_linear_io_ops, s,
"cirrus-linear-io", s->vga.vram_size_mb
* 1024 * 1024);
memory_region_set_flush_coalesced(&s->cirrus_linear_io);
/* I/O handler for LFB */
- memory_region_init_io(&s->cirrus_linear_bitblt_io, NULL,
+ memory_region_init_io(&s->cirrus_linear_bitblt_io, owner,
&cirrus_linear_bitblt_io_ops,
s,
"cirrus-bitblt-mmio",
@@ -2880,7 +2882,7 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci,
memory_region_set_flush_coalesced(&s->cirrus_linear_bitblt_io);
/* I/O handler for memory-mapped I/O */
- memory_region_init_io(&s->cirrus_mmio_io, NULL, &cirrus_mmio_io_ops, s,
+ memory_region_init_io(&s->cirrus_mmio_io, owner, &cirrus_mmio_io_ops, s,
"cirrus-mmio", CIRRUS_PNPMMIO_SIZE);
memory_region_set_flush_coalesced(&s->cirrus_mmio_io);
@@ -2913,7 +2915,7 @@ static void isa_cirrus_vga_realizefn(DeviceState *dev, Error **errp)
VGACommonState *s = &d->cirrus_vga.vga;
vga_common_init(s, OBJECT(dev));
- cirrus_init_common(&d->cirrus_vga, CIRRUS_ID_CLGD5430, 0,
+ cirrus_init_common(&d->cirrus_vga, OBJECT(dev), CIRRUS_ID_CLGD5430, 0,
isa_address_space(isadev),
isa_address_space_io(isadev));
s->con = graphic_console_init(dev, s->hw_ops, s);
@@ -2959,7 +2961,7 @@ static int pci_cirrus_vga_initfn(PCIDevice *dev)
/* setup VGA */
vga_common_init(&s->vga, OBJECT(dev));
- cirrus_init_common(s, device_id, 1, pci_address_space(dev),
+ cirrus_init_common(s, OBJECT(dev), device_id, 1, pci_address_space(dev),
pci_address_space_io(dev));
s->vga.con = graphic_console_init(DEVICE(dev), s->vga.hw_ops, &s->vga);
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 34/66] vga: pass owner to vga_init_vbe
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (31 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 33/66] vga: pass owner to cirrus_init_common Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 35/66] vga: pass owner to vga_init_io Paolo Bonzini
` (32 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/display/vga-isa-mm.c | 2 +-
hw/display/vga-isa.c | 2 +-
hw/display/vga-pci.c | 2 +-
hw/display/vga.c | 4 ++--
hw/display/vga_int.h | 2 +-
hw/display/vmware_vga.c | 2 +-
6 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/display/vga-isa-mm.c b/hw/display/vga-isa-mm.c
index 695c128..8b514cc 100644
--- a/hw/display/vga-isa-mm.c
+++ b/hw/display/vga-isa-mm.c
@@ -137,6 +137,6 @@ int isa_vga_mm_init(hwaddr vram_base,
s->vga.con = graphic_console_init(NULL, s->vga.hw_ops, s);
- vga_init_vbe(&s->vga, address_space);
+ vga_init_vbe(&s->vga, NULL, address_space);
return 0;
}
diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c
index fbf6db5..5f253a9 100644
--- a/hw/display/vga-isa.c
+++ b/hw/display/vga-isa.c
@@ -69,7 +69,7 @@ static void vga_isa_realizefn(DeviceState *dev, Error **errp)
memory_region_set_coalescing(vga_io_memory);
s->con = graphic_console_init(DEVICE(dev), s->hw_ops, s);
- vga_init_vbe(s, isa_address_space(isadev));
+ vga_init_vbe(s, OBJECT(dev), isa_address_space(isadev));
/* ROM BIOS */
rom_add_vga(VGABIOS_FILENAME);
}
diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c
index 62652bd..3e150ab 100644
--- a/hw/display/vga-pci.c
+++ b/hw/display/vga-pci.c
@@ -173,7 +173,7 @@ static int pci_std_vga_initfn(PCIDevice *dev)
if (!dev->rom_bar) {
/* compatibility with pc-0.13 and older */
- vga_init_vbe(s, pci_address_space(dev));
+ vga_init_vbe(s, OBJECT(dev), pci_address_space(dev));
}
return 0;
diff --git a/hw/display/vga.c b/hw/display/vga.c
index d3e0f33..ce3ca7e 100644
--- a/hw/display/vga.c
+++ b/hw/display/vga.c
@@ -2380,12 +2380,12 @@ void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space,
}
}
-void vga_init_vbe(VGACommonState *s, MemoryRegion *system_memory)
+void vga_init_vbe(VGACommonState *s, Object *obj, MemoryRegion *system_memory)
{
/* With pc-0.12 and below we map both the PCI BAR and the fixed VBE region,
* so use an alias to avoid double-mapping the same region.
*/
- memory_region_init_alias(&s->vram_vbe, NULL, "vram.vbe",
+ memory_region_init_alias(&s->vram_vbe, obj, "vram.vbe",
&s->vram, 0, memory_region_size(&s->vram));
/* XXX: use optimized standard vga accesses */
memory_region_add_subregion(system_memory,
diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h
index bac366c..5121a35 100644
--- a/hw/display/vga_int.h
+++ b/hw/display/vga_int.h
@@ -198,7 +198,7 @@ void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2);
int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
-void vga_init_vbe(VGACommonState *s, MemoryRegion *address_space);
+void vga_init_vbe(VGACommonState *s, Object *obj, MemoryRegion *address_space);
uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr);
void vbe_ioport_write_index(void *opaque, uint32_t addr, uint32_t val);
void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val);
diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
index ce97870..714908f 100644
--- a/hw/display/vmware_vga.c
+++ b/hw/display/vmware_vga.c
@@ -1272,7 +1272,7 @@ static int pci_vmsvga_initfn(PCIDevice *dev)
if (!dev->rom_bar) {
/* compatibility with pc-0.13 and older */
- vga_init_vbe(&s->chip.vga, pci_address_space(dev));
+ vga_init_vbe(&s->chip.vga, OBJECT(dev), pci_address_space(dev));
}
return 0;
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 35/66] vga: pass owner to vga_init_io
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (32 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 34/66] vga: pass owner to vga_init_vbe Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 36/66] vga: set owner in vga_update_memory_access Paolo Bonzini
` (31 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/display/vga-isa.c | 2 +-
hw/display/vga.c | 6 +++---
hw/display/vga_int.h | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c
index 5f253a9..8d560ec 100644
--- a/hw/display/vga-isa.c
+++ b/hw/display/vga-isa.c
@@ -58,7 +58,7 @@ static void vga_isa_realizefn(DeviceState *dev, Error **errp)
vga_common_init(s, OBJECT(dev));
s->legacy_address_space = isa_address_space(isadev);
- vga_io_memory = vga_init_io(s, &vga_ports, &vbe_ports);
+ vga_io_memory = vga_init_io(s, OBJECT(dev), &vga_ports, &vbe_ports);
isa_register_portio_list(isadev, 0x3b0, vga_ports, s, "vga");
if (vbe_ports) {
isa_register_portio_list(isadev, 0x1ce, vbe_ports, s, "vbe");
diff --git a/hw/display/vga.c b/hw/display/vga.c
index ce3ca7e..7a6e935 100644
--- a/hw/display/vga.c
+++ b/hw/display/vga.c
@@ -2333,7 +2333,7 @@ static const MemoryRegionPortio vbe_portio_list[] = {
};
/* Used by both ISA and PCI */
-MemoryRegion *vga_init_io(VGACommonState *s,
+MemoryRegion *vga_init_io(VGACommonState *s, Object *obj,
const MemoryRegionPortio **vga_ports,
const MemoryRegionPortio **vbe_ports)
{
@@ -2343,7 +2343,7 @@ MemoryRegion *vga_init_io(VGACommonState *s,
*vbe_ports = vbe_portio_list;
vga_mem = g_malloc(sizeof(*vga_mem));
- memory_region_init_io(vga_mem, NULL, &vga_mem_ops, s,
+ memory_region_init_io(vga_mem, obj, &vga_mem_ops, s,
"vga-lowmem", 0x20000);
memory_region_set_flush_coalesced(vga_mem);
@@ -2364,7 +2364,7 @@ void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space,
s->legacy_address_space = address_space;
- vga_io_memory = vga_init_io(s, &vga_ports, &vbe_ports);
+ vga_io_memory = vga_init_io(s, obj, &vga_ports, &vbe_ports);
memory_region_add_subregion_overlap(address_space,
isa_mem_base + 0x000a0000,
vga_io_memory,
diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h
index 5121a35..e641890 100644
--- a/hw/display/vga_int.h
+++ b/hw/display/vga_int.h
@@ -180,7 +180,7 @@ static inline int c6_to_8(int v)
void vga_common_init(VGACommonState *s, Object *obj);
void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space,
MemoryRegion *address_space_io, bool init_vga_ports);
-MemoryRegion *vga_init_io(VGACommonState *s,
+MemoryRegion *vga_init_io(VGACommonState *s, Object *obj,
const MemoryRegionPortio **vga_ports,
const MemoryRegionPortio **vbe_ports);
void vga_common_reset(VGACommonState *s);
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 36/66] vga: set owner in vga_update_memory_access
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (33 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 35/66] vga: pass owner to vga_init_io Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 37/66] ne2000: pass device to ne2000_setup_io, use it as owner Paolo Bonzini
` (30 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/display/vga.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/display/vga.c b/hw/display/vga.c
index 7a6e935..1657356 100644
--- a/hw/display/vga.c
+++ b/hw/display/vga.c
@@ -198,7 +198,8 @@ static void vga_update_memory_access(VGACommonState *s)
}
base += isa_mem_base;
region = g_malloc(sizeof(*region));
- memory_region_init_alias(region, NULL, "vga.chain4", &s->vram, offset, size);
+ memory_region_init_alias(region, memory_region_owner(&s->vram),
+ "vga.chain4", &s->vram, offset, size);
memory_region_add_subregion_overlap(s->legacy_address_space, base,
region, 2);
s->chain4_alias = region;
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 37/66] ne2000: pass device to ne2000_setup_io, use it as owner
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (34 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 36/66] vga: set owner in vga_update_memory_access Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 38/66] vfio: pass device to vfio_mmap_bar and use it to set owner Paolo Bonzini
` (29 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/net/ne2000-isa.c | 2 +-
hw/net/ne2000.c | 6 +++---
hw/net/ne2000.h | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/net/ne2000-isa.c b/hw/net/ne2000-isa.c
index 9232abd..e3c8076 100644
--- a/hw/net/ne2000-isa.c
+++ b/hw/net/ne2000-isa.c
@@ -72,7 +72,7 @@ static void isa_ne2000_realizefn(DeviceState *dev, Error **errp)
ISANE2000State *isa = ISA_NE2000(dev);
NE2000State *s = &isa->ne2000;
- ne2000_setup_io(s, 0x20);
+ ne2000_setup_io(s, DEVICE(isadev), 0x20);
isa_register_ioport(isadev, &s->io, isa->iobase);
isa_init_irq(isadev, &s->irq, isa->isairq);
diff --git a/hw/net/ne2000.c b/hw/net/ne2000.c
index 00940af..8d43fd9 100644
--- a/hw/net/ne2000.c
+++ b/hw/net/ne2000.c
@@ -699,9 +699,9 @@ static const MemoryRegionOps ne2000_ops = {
/***********************************************************/
/* PCI NE2000 definitions */
-void ne2000_setup_io(NE2000State *s, unsigned size)
+void ne2000_setup_io(NE2000State *s, DeviceState *dev, unsigned size)
{
- memory_region_init_io(&s->io, NULL, &ne2000_ops, s, "ne2000", size);
+ memory_region_init_io(&s->io, OBJECT(dev), &ne2000_ops, s, "ne2000", size);
}
static void ne2000_cleanup(NetClientState *nc)
@@ -729,7 +729,7 @@ static int pci_ne2000_init(PCIDevice *pci_dev)
pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin A */
s = &d->ne2000;
- ne2000_setup_io(s, 0x100);
+ ne2000_setup_io(s, DEVICE(pci_dev), 0x100);
pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
s->irq = d->dev.irq[0];
diff --git a/hw/net/ne2000.h b/hw/net/ne2000.h
index b31ae03..e500306 100644
--- a/hw/net/ne2000.h
+++ b/hw/net/ne2000.h
@@ -31,7 +31,7 @@ typedef struct NE2000State {
uint8_t mem[NE2000_MEM_SIZE];
} NE2000State;
-void ne2000_setup_io(NE2000State *s, unsigned size);
+void ne2000_setup_io(NE2000State *s, DeviceState *dev, unsigned size);
extern const VMStateDescription vmstate_ne2000;
void ne2000_reset(NE2000State *s);
int ne2000_can_receive(NetClientState *nc);
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 38/66] vfio: pass device to vfio_mmap_bar and use it to set owner
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (35 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 37/66] ne2000: pass device to ne2000_setup_io, use it as owner Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 39/66] spapr_iommu: pass device to spapr_tce_new_table " Paolo Bonzini
` (28 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Alex Williamson
Cc: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/misc/vfio.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/hw/misc/vfio.c b/hw/misc/vfio.c
index 675bbfc..58013eb 100644
--- a/hw/misc/vfio.c
+++ b/hw/misc/vfio.c
@@ -2205,7 +2205,8 @@ static void vfio_unmap_bar(VFIODevice *vdev, int nr)
memory_region_destroy(&bar->mem);
}
-static int vfio_mmap_bar(VFIOBAR *bar, MemoryRegion *mem, MemoryRegion *submem,
+static int vfio_mmap_bar(VFIODevice *vdev, VFIOBAR *bar,
+ MemoryRegion *mem, MemoryRegion *submem,
void **map, size_t size, off_t offset,
const char *name)
{
@@ -2230,11 +2231,11 @@ static int vfio_mmap_bar(VFIOBAR *bar, MemoryRegion *mem, MemoryRegion *submem,
goto empty_region;
}
- memory_region_init_ram_ptr(submem, NULL, name, size, *map);
+ memory_region_init_ram_ptr(submem, OBJECT(vdev), name, size, *map);
} else {
empty_region:
/* Create a zero sized sub-region to make cleanup easy. */
- memory_region_init(submem, NULL, name, 0);
+ memory_region_init(submem, OBJECT(vdev), name, 0);
}
memory_region_add_subregion(mem, offset, submem);
@@ -2285,7 +2286,7 @@ static void vfio_map_bar(VFIODevice *vdev, int nr)
}
strncat(name, " mmap", sizeof(name) - strlen(name) - 1);
- if (vfio_mmap_bar(bar, &bar->mem,
+ if (vfio_mmap_bar(vdev, bar, &bar->mem,
&bar->mmap_mem, &bar->mmap, size, 0, name)) {
error_report("%s unsupported. Performance may be slow", name);
}
@@ -2299,7 +2300,7 @@ static void vfio_map_bar(VFIODevice *vdev, int nr)
size = start < bar->size ? bar->size - start : 0;
strncat(name, " msix-hi", sizeof(name) - strlen(name) - 1);
/* VFIOMSIXInfo contains another MemoryRegion for this mapping */
- if (vfio_mmap_bar(bar, &bar->mem, &vdev->msix->mmap_mem,
+ if (vfio_mmap_bar(vdev, bar, &bar->mem, &vdev->msix->mmap_mem,
&vdev->msix->mmap, size, start, name)) {
error_report("%s unsupported. Performance may be slow", name);
}
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 39/66] spapr_iommu: pass device to spapr_tce_new_table and use it to set owner
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (36 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 38/66] vfio: pass device to vfio_mmap_bar and use it to set owner Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 40/66] pam: pass device to init_pam " Paolo Bonzini
` (27 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/ppc/spapr_iommu.c | 4 ++--
hw/ppc/spapr_pci.c | 3 ++-
hw/ppc/spapr_vio.c | 2 +-
include/hw/ppc/spapr.h | 3 ++-
4 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c
index 3976af6..89b33a5 100644
--- a/hw/ppc/spapr_iommu.c
+++ b/hw/ppc/spapr_iommu.c
@@ -116,7 +116,7 @@ static MemoryRegionIOMMUOps spapr_iommu_ops = {
.translate = spapr_tce_translate_iommu,
};
-sPAPRTCETable *spapr_tce_new_table(uint32_t liobn, size_t window_size)
+sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn, size_t window_size)
{
sPAPRTCETable *tcet;
@@ -151,7 +151,7 @@ sPAPRTCETable *spapr_tce_new_table(uint32_t liobn, size_t window_size)
"table @ %p, fd=%d\n", tcet, liobn, tcet->table, tcet->fd);
#endif
- memory_region_init_iommu(&tcet->iommu, NULL, &spapr_iommu_ops,
+ memory_region_init_iommu(&tcet->iommu, OBJECT(owner), &spapr_iommu_ops,
"iommu-spapr", UINT64_MAX);
QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list);
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 65e05d5..7710aa0 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -646,7 +646,8 @@ static int spapr_phb_init(SysBusDevice *s)
sphb->dma_window_start = 0;
sphb->dma_window_size = 0x40000000;
- sphb->tcet = spapr_tce_new_table(sphb->dma_liobn, sphb->dma_window_size);
+ sphb->tcet = spapr_tce_new_table(DEVICE(sphb), sphb->dma_liobn,
+ sphb->dma_window_size);
if (!sphb->tcet) {
fprintf(stderr, "Unable to create TCE table for %s\n", sphb->dtbusname);
return -1;
diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c
index 9c18741..7c6f6e4 100644
--- a/hw/ppc/spapr_vio.c
+++ b/hw/ppc/spapr_vio.c
@@ -455,7 +455,7 @@ static int spapr_vio_busdev_init(DeviceState *qdev)
if (pc->rtce_window_size) {
uint32_t liobn = SPAPR_VIO_BASE_LIOBN | dev->reg;
- dev->tcet = spapr_tce_new_table(liobn, pc->rtce_window_size);
+ dev->tcet = spapr_tce_new_table(qdev, liobn, pc->rtce_window_size);
address_space_init(&dev->as, spapr_tce_get_iommu(dev->tcet), qdev->id);
}
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 09c4570..de95480 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -348,7 +348,8 @@ typedef struct sPAPRTCETable sPAPRTCETable;
void spapr_iommu_init(void);
void spapr_events_init(sPAPREnvironment *spapr);
void spapr_events_fdt_skel(void *fdt, uint32_t epow_irq);
-sPAPRTCETable *spapr_tce_new_table(uint32_t liobn, size_t window_size);
+sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn,
+ size_t window_size);
MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet);
void spapr_tce_free(sPAPRTCETable *tcet);
void spapr_tce_reset(sPAPRTCETable *tcet);
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 40/66] pam: pass device to init_pam and use it to set owner
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (37 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 39/66] spapr_iommu: pass device to spapr_tce_new_table " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 41/66] piolist: add owner argument to initialization functions and pass devices Paolo Bonzini
` (26 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/pci-host/pam.c | 16 +++++++++-------
hw/pci-host/piix.c | 4 ++--
hw/pci-host/q35.c | 4 ++--
include/hw/pci-host/pam.h | 4 ++--
4 files changed, 15 insertions(+), 13 deletions(-)
diff --git a/hw/pci-host/pam.c b/hw/pci-host/pam.c
index ec935f440..ec6be46 100644
--- a/hw/pci-host/pam.c
+++ b/hw/pci-host/pam.c
@@ -26,6 +26,8 @@
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
+
+#include "qom/object.h"
#include "sysemu/sysemu.h"
#include "hw/pci-host/pam.h"
@@ -49,24 +51,24 @@ void smram_set_smm(uint8_t *host_smm_enabled, int smm, uint8_t smram,
}
}
-void init_pam(MemoryRegion *ram_memory, MemoryRegion *system_memory,
- MemoryRegion *pci_address_space, PAMMemoryRegion *mem,
- uint32_t start, uint32_t size)
+void init_pam(DeviceState *dev, MemoryRegion *ram_memory,
+ MemoryRegion *system_memory, MemoryRegion *pci_address_space,
+ PAMMemoryRegion *mem, uint32_t start, uint32_t size)
{
int i;
/* RAM */
- memory_region_init_alias(&mem->alias[3], NULL, "pam-ram", ram_memory,
+ memory_region_init_alias(&mem->alias[3], OBJECT(dev), "pam-ram", ram_memory,
start, size);
/* ROM (XXX: not quite correct) */
- memory_region_init_alias(&mem->alias[1], NULL, "pam-rom", ram_memory,
+ memory_region_init_alias(&mem->alias[1], OBJECT(dev), "pam-rom", ram_memory,
start, size);
memory_region_set_readonly(&mem->alias[1], true);
/* XXX: should distinguish read/write cases */
- memory_region_init_alias(&mem->alias[0], NULL, "pam-pci", pci_address_space,
+ memory_region_init_alias(&mem->alias[0], OBJECT(dev), "pam-pci", pci_address_space,
start, size);
- memory_region_init_alias(&mem->alias[2], NULL, "pam-pci", pci_address_space,
+ memory_region_init_alias(&mem->alias[2], OBJECT(dev), "pam-pci", pci_address_space,
start, size);
for (i = 0; i < 4; ++i) {
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 4d77b1e..e179912 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -275,10 +275,10 @@ static PCIBus *i440fx_common_init(const char *device_name,
memory_region_add_subregion_overlap(f->system_memory, 0xa0000,
&f->smram_region, 1);
memory_region_set_enabled(&f->smram_region, false);
- init_pam(f->ram_memory, f->system_memory, f->pci_address_space,
+ init_pam(dev, f->ram_memory, f->system_memory, f->pci_address_space,
&f->pam_regions[0], PAM_BIOS_BASE, PAM_BIOS_SIZE);
for (i = 0; i < 12; ++i) {
- init_pam(f->ram_memory, f->system_memory, f->pci_address_space,
+ init_pam(dev, f->ram_memory, f->system_memory, f->pci_address_space,
&f->pam_regions[i+1], PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE,
PAM_EXPAN_SIZE);
}
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 70e7d8b..49ccf80 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -269,10 +269,10 @@ static int mch_init(PCIDevice *d)
memory_region_add_subregion_overlap(mch->system_memory, 0xa0000,
&mch->smram_region, 1);
memory_region_set_enabled(&mch->smram_region, false);
- init_pam(mch->ram_memory, mch->system_memory, mch->pci_address_space,
+ init_pam(DEVICE(mch), mch->ram_memory, mch->system_memory, mch->pci_address_space,
&mch->pam_regions[0], PAM_BIOS_BASE, PAM_BIOS_SIZE);
for (i = 0; i < 12; ++i) {
- init_pam(mch->ram_memory, mch->system_memory, mch->pci_address_space,
+ init_pam(DEVICE(mch), mch->ram_memory, mch->system_memory, mch->pci_address_space,
&mch->pam_regions[i+1], PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE,
PAM_EXPAN_SIZE);
}
diff --git a/include/hw/pci-host/pam.h b/include/hw/pci-host/pam.h
index 8e9e349..a8b87b8 100644
--- a/include/hw/pci-host/pam.h
+++ b/include/hw/pci-host/pam.h
@@ -90,8 +90,8 @@ void smram_update(MemoryRegion *smram_region, uint8_t smram,
uint8_t smm_enabled);
void smram_set_smm(uint8_t *host_smm_enabled, int smm, uint8_t smram,
MemoryRegion *smram_region);
-void init_pam(MemoryRegion *ram, MemoryRegion *system, MemoryRegion *pci,
- PAMMemoryRegion *mem, uint32_t start, uint32_t size);
+void init_pam(DeviceState *dev, MemoryRegion *ram, MemoryRegion *system,
+ MemoryRegion *pci, PAMMemoryRegion *mem, uint32_t start, uint32_t size);
void pam_update(PAMMemoryRegion *mem, int idx, uint8_t val);
#endif /* QEMU_PAM_H */
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 41/66] piolist: add owner argument to initialization functions and pass devices
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (38 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 40/66] pam: pass device to init_pam " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 42/66] hw/a*: pass owner to memory_region_init* functions Paolo Bonzini
` (25 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/audio/adlib.c | 2 +-
hw/display/qxl.c | 3 ++-
hw/display/vga.c | 4 ++--
hw/dma/i82374.c | 2 +-
hw/isa/isa-bus.c | 2 +-
hw/isa/vt82c686.c | 2 +-
hw/ppc/prep.c | 2 +-
hw/watchdog/wdt_ib700.c | 2 +-
include/exec/ioport.h | 4 +++-
ioport.c | 6 ++++--
10 files changed, 17 insertions(+), 12 deletions(-)
diff --git a/hw/audio/adlib.c b/hw/audio/adlib.c
index 8b9b81e..f72e6ee 100644
--- a/hw/audio/adlib.c
+++ b/hw/audio/adlib.c
@@ -349,7 +349,7 @@ static void adlib_realizefn (DeviceState *dev, Error **errp)
adlib_portio_list[1].offset = s->port;
adlib_portio_list[2].offset = s->port + 8;
- portio_list_init (port_list, adlib_portio_list, s, "adlib");
+ portio_list_init (port_list, OBJECT(s), adlib_portio_list, s, "adlib");
portio_list_add (port_list, isa_address_space_io(&s->parent_obj), 0);
}
diff --git a/hw/display/qxl.c b/hw/display/qxl.c
index 59925ec..3804fe2 100644
--- a/hw/display/qxl.c
+++ b/hw/display/qxl.c
@@ -2070,7 +2070,8 @@ static int qxl_init_primary(PCIDevice *dev)
vga_common_init(vga, OBJECT(dev));
vga_init(vga, OBJECT(dev),
pci_address_space(dev), pci_address_space_io(dev), false);
- portio_list_init(qxl_vga_port_list, qxl_vga_portio_list, vga, "vga");
+ portio_list_init(qxl_vga_port_list, OBJECT(dev), qxl_vga_portio_list,
+ vga, "vga");
portio_list_add(qxl_vga_port_list, pci_address_space_io(dev), 0x3b0);
vga->con = graphic_console_init(DEVICE(dev), &qxl_ops, qxl);
diff --git a/hw/display/vga.c b/hw/display/vga.c
index 1657356..06f44a8 100644
--- a/hw/display/vga.c
+++ b/hw/display/vga.c
@@ -2372,11 +2372,11 @@ void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space,
1);
memory_region_set_coalescing(vga_io_memory);
if (init_vga_ports) {
- portio_list_init(vga_port_list, vga_ports, s, "vga");
+ portio_list_init(vga_port_list, obj, vga_ports, s, "vga");
portio_list_add(vga_port_list, address_space_io, 0x3b0);
}
if (vbe_ports) {
- portio_list_init(vbe_port_list, vbe_ports, s, "vbe");
+ portio_list_init(vbe_port_list, obj, vbe_ports, s, "vbe");
portio_list_add(vbe_port_list, address_space_io, 0x1ce);
}
}
diff --git a/hw/dma/i82374.c b/hw/dma/i82374.c
index ecda5cb..a5b891f 100644
--- a/hw/dma/i82374.c
+++ b/hw/dma/i82374.c
@@ -139,7 +139,7 @@ static void i82374_isa_realize(DeviceState *dev, Error **errp)
I82374State *s = &isa->state;
PortioList *port_list = g_new(PortioList, 1);
- portio_list_init(port_list, i82374_portio_list, s, "i82374");
+ portio_list_init(port_list, OBJECT(isa), i82374_portio_list, s, "i82374");
portio_list_add(port_list, isa_address_space_io(&isa->parent_obj),
isa->iobase);
diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c
index 136d17e..cfd610c 100644
--- a/hw/isa/isa-bus.c
+++ b/hw/isa/isa-bus.c
@@ -115,7 +115,7 @@ void isa_register_portio_list(ISADevice *dev, uint16_t start,
actually handled e.g. the FDC device. */
isa_init_ioport(dev, start);
- portio_list_init(piolist, pio_start, opaque, name);
+ portio_list_init(piolist, OBJECT(dev), pio_start, opaque, name);
portio_list_add(piolist, isabus->address_space_io, start);
}
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index 1f63197..19c887d 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -443,7 +443,7 @@ static int vt82c686b_initfn(PCIDevice *d)
}
}
- memory_region_init_io(&vt82c->superio, NULL, &superio_ops,
+ memory_region_init_io(&vt82c->superio, OBJECT(d), &superio_ops,
&vt82c->superio_conf, "superio", 2);
memory_region_set_enabled(&vt82c->superio, false);
/* The floppy also uses 0x3f0 and 0x3f1.
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 899aa30..0081c70 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -653,7 +653,7 @@ static void ppc_prep_init(QEMUMachineInitArgs *args)
sysctrl->reset_irq = first_cpu->irq_inputs[PPC6xx_INPUT_HRESET];
- portio_list_init(port_list, prep_portio_list, sysctrl, "prep");
+ portio_list_init(port_list, NULL, prep_portio_list, sysctrl, "prep");
portio_list_add(port_list, get_system_io(), 0x0);
/* PowerPC control and status register group */
diff --git a/hw/watchdog/wdt_ib700.c b/hw/watchdog/wdt_ib700.c
index 597a923..c788554 100644
--- a/hw/watchdog/wdt_ib700.c
+++ b/hw/watchdog/wdt_ib700.c
@@ -112,7 +112,7 @@ static void wdt_ib700_realize(DeviceState *dev, Error **errp)
s->timer = qemu_new_timer_ns(vm_clock, ib700_timer_expired, s);
- portio_list_init(port_list, wdt_portio_list, s, "ib700");
+ portio_list_init(port_list, OBJECT(s), wdt_portio_list, s, "ib700");
portio_list_add(port_list, isa_address_space_io(&s->parent_obj), 0);
}
diff --git a/include/exec/ioport.h b/include/exec/ioport.h
index 6fb237d..bdd4e96 100644
--- a/include/exec/ioport.h
+++ b/include/exec/ioport.h
@@ -25,6 +25,7 @@
#define IOPORT_H
#include "qemu-common.h"
+#include "qom/object.h"
#include "exec/memory.h"
typedef uint32_t pio_addr_t;
@@ -53,6 +54,7 @@ uint32_t cpu_inl(pio_addr_t addr);
typedef struct PortioList {
const struct MemoryRegionPortio *ports;
+ Object *owner;
struct MemoryRegion *address_space;
unsigned nr;
struct MemoryRegion **regions;
@@ -60,7 +62,7 @@ typedef struct PortioList {
const char *name;
} PortioList;
-void portio_list_init(PortioList *piolist,
+void portio_list_init(PortioList *piolist, Object *owner,
const struct MemoryRegionPortio *callbacks,
void *opaque, const char *name);
void portio_list_destroy(PortioList *piolist);
diff --git a/ioport.c b/ioport.c
index 3a6a73d..79b7f1a 100644
--- a/ioport.c
+++ b/ioport.c
@@ -106,6 +106,7 @@ uint32_t cpu_inl(pio_addr_t addr)
}
void portio_list_init(PortioList *piolist,
+ Object *owner,
const MemoryRegionPortio *callbacks,
void *opaque, const char *name)
{
@@ -120,6 +121,7 @@ void portio_list_init(PortioList *piolist,
piolist->regions = g_new0(MemoryRegion *, n);
piolist->address_space = NULL;
piolist->opaque = opaque;
+ piolist->owner = owner;
piolist->name = name;
}
@@ -211,8 +213,8 @@ static void portio_list_add_1(PortioList *piolist,
* Use an alias so that the callback is called with an absolute address,
* rather than an offset relative to to start + off_low.
*/
- memory_region_init_io(&mrpio->mr, NULL, &portio_ops, mrpio, piolist->name,
- off_high - off_low);
+ memory_region_init_io(&mrpio->mr, piolist->owner, &portio_ops, mrpio,
+ piolist->name, off_high - off_low);
memory_region_add_subregion(piolist->address_space,
start + off_low, &mrpio->mr);
piolist->regions[piolist->nr] = &mrpio->mr;
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 42/66] hw/a*: pass owner to memory_region_init* functions
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (39 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 41/66] piolist: add owner argument to initialization functions and pass devices Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 43/66] hw/block: " Paolo Bonzini
` (24 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/acpi/core.c | 9 ++++++---
hw/acpi/ich9.c | 10 +++++-----
hw/acpi/piix4.c | 14 +++++++-------
hw/alpha/typhoon.c | 21 ++++++++++++---------
hw/arm/armv7m.c | 4 ++--
hw/arm/highbank.c | 4 ++--
hw/arm/integratorcp.c | 7 ++++---
hw/arm/musicpal.c | 20 ++++++++++----------
hw/arm/pxa2xx.c | 10 ++++++----
hw/arm/pxa2xx_gpio.c | 2 +-
hw/arm/pxa2xx_pic.c | 2 +-
hw/arm/spitz.c | 2 +-
hw/arm/stellaris.c | 6 +++---
hw/arm/strongarm.c | 18 ++++++++++++------
hw/arm/versatilepb.c | 3 ++-
hw/audio/ac97.c | 6 ++++--
hw/audio/cs4231.c | 3 ++-
hw/audio/cs4231a.c | 3 ++-
hw/audio/es1370.c | 2 +-
hw/audio/intel-hda.c | 2 +-
hw/audio/marvell_88w8618.c | 2 +-
hw/audio/milkymist-ac97.c | 2 +-
hw/audio/pcspk.c | 2 +-
hw/audio/pl041.c | 2 +-
24 files changed, 88 insertions(+), 68 deletions(-)
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index 7206e9c..b07feda 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -419,7 +419,8 @@ void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
MemoryRegion *parent)
{
ar->pm1.evt.update_sci = update_sci;
- memory_region_init_io(&ar->pm1.evt.io, NULL, &acpi_pm_evt_ops, ar, "acpi-evt", 4);
+ memory_region_init_io(&ar->pm1.evt.io, memory_region_owner(parent),
+ &acpi_pm_evt_ops, ar, "acpi-evt", 4);
memory_region_add_subregion(parent, 0, &ar->pm1.evt.io);
}
@@ -481,7 +482,8 @@ void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
{
ar->tmr.update_sci = update_sci;
ar->tmr.timer = qemu_new_timer_ns(vm_clock, acpi_pm_tmr_timer, ar);
- memory_region_init_io(&ar->tmr.io, NULL, &acpi_pm_tmr_ops, ar, "acpi-tmr", 4);
+ memory_region_init_io(&ar->tmr.io, memory_region_owner(parent),
+ &acpi_pm_tmr_ops, ar, "acpi-tmr", 4);
memory_region_add_subregion(parent, 8, &ar->tmr.io);
}
@@ -552,7 +554,8 @@ void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, uint8_t s4_val)
ar->pm1.cnt.s4_val = s4_val;
ar->wakeup.notify = acpi_notify_wakeup;
qemu_register_wakeup_notifier(&ar->wakeup);
- memory_region_init_io(&ar->pm1.cnt.io, NULL, &acpi_pm_cnt_ops, ar, "acpi-cnt", 2);
+ memory_region_init_io(&ar->pm1.cnt.io, memory_region_owner(parent),
+ &acpi_pm_cnt_ops, ar, "acpi-cnt", 2);
memory_region_add_subregion(parent, 4, &ar->pm1.cnt.io);
}
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 8ce52e7..3fb443d 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -205,7 +205,7 @@ static void pm_powerdown_req(Notifier *n, void *opaque)
void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
qemu_irq sci_irq)
{
- memory_region_init(&pm->io, NULL, "ich9-pm", ICH9_PMIO_SIZE);
+ memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE);
memory_region_set_enabled(&pm->io, false);
memory_region_add_subregion(pci_address_space_io(lpc_pci),
0, &pm->io);
@@ -215,12 +215,12 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, 2);
acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN);
- memory_region_init_io(&pm->io_gpe, NULL, &ich9_gpe_ops, pm, "apci-gpe0",
- ICH9_PMIO_GPE0_LEN);
+ memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm,
+ "apci-gpe0", ICH9_PMIO_GPE0_LEN);
memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe);
- memory_region_init_io(&pm->io_smi, NULL, &ich9_smi_ops, pm, "apci-smi",
- 8);
+ memory_region_init_io(&pm->io_smi, OBJECT(lpc_pci), &ich9_smi_ops, pm,
+ "apci-smi", 8);
memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi);
pm->irq = sci_irq;
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index 10fc925..948ea87 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -424,7 +424,7 @@ static int piix4_pm_initfn(PCIDevice *dev)
memory_region_add_subregion(pci_address_space_io(dev),
s->smb_io_base, &s->smb.io);
- memory_region_init(&s->io, NULL, "piix4-pm", 64);
+ memory_region_init(&s->io, OBJECT(s), "piix4-pm", 64);
memory_region_set_enabled(&s->io, false);
memory_region_add_subregion(pci_address_space_io(dev),
0, &s->io);
@@ -671,19 +671,19 @@ static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev,
static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,
PCIBus *bus, PIIX4PMState *s)
{
- memory_region_init_io(&s->io_gpe, NULL, &piix4_gpe_ops, s, "apci-gpe0",
- GPE_LEN);
+ memory_region_init_io(&s->io_gpe, OBJECT(s), &piix4_gpe_ops, s,
+ "acpi-gpe0", GPE_LEN);
memory_region_add_subregion(parent, GPE_BASE, &s->io_gpe);
- memory_region_init_io(&s->io_pci, NULL, &piix4_pci_ops, s, "apci-pci-hotplug",
- PCI_HOTPLUG_SIZE);
+ memory_region_init_io(&s->io_pci, OBJECT(s), &piix4_pci_ops, s,
+ "acpi-pci-hotplug", PCI_HOTPLUG_SIZE);
memory_region_add_subregion(parent, PCI_HOTPLUG_ADDR,
&s->io_pci);
pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev);
qemu_for_each_cpu(piix4_init_cpu_status, &s->gpe_cpu);
- memory_region_init_io(&s->io_cpu, NULL, &cpu_hotplug_ops, s, "apci-cpu-hotplug",
- PIIX4_PROC_LEN);
+ memory_region_init_io(&s->io_cpu, OBJECT(s), &cpu_hotplug_ops, s,
+ "acpi-cpu-hotplug", PIIX4_PROC_LEN);
memory_region_add_subregion(parent, PIIX4_PROC_BASE, &s->io_cpu);
s->cpu_added_notifier.notify = piix4_cpu_added_req;
qemu_register_cpu_added_notifier(&s->cpu_added_notifier);
diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
index 99427e8..63cc2cb 100644
--- a/hw/alpha/typhoon.c
+++ b/hw/alpha/typhoon.c
@@ -741,7 +741,7 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
/* Main memory region, 0x00.0000.0000. Real hardware supports 32GB,
but the address space hole reserved at this point is 8TB. */
- memory_region_init_ram(&s->ram_region, NULL, "ram", ram_size);
+ memory_region_init_ram(&s->ram_region, OBJECT(s), "ram", ram_size);
vmstate_register_ram_global(&s->ram_region);
memory_region_add_subregion(addr_space, 0, &s->ram_region);
@@ -750,22 +750,25 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
the flash ROM. I'm not sure that we need to implement it at all. */
/* Pchip0 CSRs, 0x801.8000.0000, 256MB. */
- memory_region_init_io(&s->pchip.region, NULL, &pchip_ops, s, "pchip0", 256*MB);
+ memory_region_init_io(&s->pchip.region, OBJECT(s), &pchip_ops, s, "pchip0",
+ 256*MB);
memory_region_add_subregion(addr_space, 0x80180000000ULL,
&s->pchip.region);
/* Cchip CSRs, 0x801.A000.0000, 256MB. */
- memory_region_init_io(&s->cchip.region, NULL, &cchip_ops, s, "cchip0", 256*MB);
+ memory_region_init_io(&s->cchip.region, OBJECT(s), &cchip_ops, s, "cchip0",
+ 256*MB);
memory_region_add_subregion(addr_space, 0x801a0000000ULL,
&s->cchip.region);
/* Dchip CSRs, 0x801.B000.0000, 256MB. */
- memory_region_init_io(&s->dchip_region, NULL, &dchip_ops, s, "dchip0", 256*MB);
+ memory_region_init_io(&s->dchip_region, OBJECT(s), &dchip_ops, s, "dchip0",
+ 256*MB);
memory_region_add_subregion(addr_space, 0x801b0000000ULL,
&s->dchip_region);
/* Pchip0 PCI memory, 0x800.0000.0000, 4GB. */
- memory_region_init(&s->pchip.reg_mem, NULL, "pci0-mem", 4*GB);
+ memory_region_init(&s->pchip.reg_mem, OBJECT(s), "pci0-mem", 4*GB);
memory_region_add_subregion(addr_space, 0x80000000000ULL,
&s->pchip.reg_mem);
@@ -773,8 +776,8 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
/* ??? Ideally we drop the "system" i/o space on the floor and give the
PCI subsystem the full address space reserved by the chipset.
We can't do that until the MEM and IO paths in memory.c are unified. */
- memory_region_init_io(&s->pchip.reg_io, NULL, &alpha_pci_bw_io_ops, NULL,
- "pci0-io", 32*MB);
+ memory_region_init_io(&s->pchip.reg_io, OBJECT(s), &alpha_pci_bw_io_ops,
+ NULL, "pci0-io", 32*MB);
memory_region_add_subregion(addr_space, 0x801fc000000ULL,
&s->pchip.reg_io);
@@ -784,13 +787,13 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
phb->bus = b;
/* Pchip0 PCI special/interrupt acknowledge, 0x801.F800.0000, 64MB. */
- memory_region_init_io(&s->pchip.reg_iack, NULL, &alpha_pci_iack_ops, b,
+ memory_region_init_io(&s->pchip.reg_iack, OBJECT(s), &alpha_pci_iack_ops, b,
"pci0-iack", 64*MB);
memory_region_add_subregion(addr_space, 0x801f8000000ULL,
&s->pchip.reg_iack);
/* Pchip0 PCI configuration, 0x801.FE00.0000, 16MB. */
- memory_region_init_io(&s->pchip.reg_conf, NULL, &alpha_pci_conf1_ops, b,
+ memory_region_init_io(&s->pchip.reg_conf, OBJECT(s), &alpha_pci_conf1_ops, b,
"pci0-conf", 16*MB);
memory_region_add_subregion(addr_space, 0x801fe000000ULL,
&s->pchip.reg_conf);
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 4b82bba..5b22e84 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -124,8 +124,8 @@ static int bitband_init(SysBusDevice *dev)
{
BitBandState *s = FROM_SYSBUS(BitBandState, dev);
- memory_region_init_io(&s->iomem, NULL, &bitband_ops, &s->base, "bitband",
- 0x02000000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &bitband_ops, &s->base,
+ "bitband", 0x02000000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
index c02afce..de6c98a 100644
--- a/hw/arm/highbank.c
+++ b/hw/arm/highbank.c
@@ -149,8 +149,8 @@ static int highbank_regs_init(SysBusDevice *dev)
HighbankRegsState *s = FROM_SYSBUS(HighbankRegsState, dev);
s->iomem = g_new(MemoryRegion, 1);
- memory_region_init_io(s->iomem, NULL, &hb_mem_ops, s->regs, "highbank_regs",
- 0x1000);
+ memory_region_init_io(s->iomem, OBJECT(s), &hb_mem_ops, s->regs,
+ "highbank_regs", 0x1000);
sysbus_init_mmio(dev, s->iomem);
return 0;
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index 436d89b..249a430 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -249,10 +249,10 @@ static int integratorcm_init(SysBusDevice *dev)
}
memcpy(integrator_spd + 73, "QEMU-MEMORY", 11);
s->cm_init = 0x00000112;
- memory_region_init_ram(&s->flash, NULL, "integrator.flash", 0x100000);
+ memory_region_init_ram(&s->flash, OBJECT(s), "integrator.flash", 0x100000);
vmstate_register_ram_global(&s->flash);
- memory_region_init_io(&s->iomem, NULL, &integratorcm_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &integratorcm_ops, s,
"integratorcm", 0x00800000);
sysbus_init_mmio(dev, &s->iomem);
@@ -374,7 +374,8 @@ static int icp_pic_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, icp_pic_set_irq, 32);
sysbus_init_irq(dev, &s->parent_irq);
sysbus_init_irq(dev, &s->parent_fiq);
- memory_region_init_io(&s->iomem, NULL, &icp_pic_ops, s, "icp-pic", 0x00800000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &icp_pic_ops, s,
+ "icp-pic", 0x00800000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index bca8fdf..b06d442 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -389,8 +389,8 @@ static int mv88w8618_eth_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
s->nic = qemu_new_nic(&net_mv88w8618_info, &s->conf,
object_get_typename(OBJECT(dev)), dev->qdev.id, s);
- memory_region_init_io(&s->iomem, NULL, &mv88w8618_eth_ops, s, "mv88w8618-eth",
- MP_ETH_SIZE);
+ memory_region_init_io(&s->iomem, OBJECT(s), &mv88w8618_eth_ops, s,
+ "mv88w8618-eth", MP_ETH_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
@@ -612,7 +612,7 @@ static int musicpal_lcd_init(SysBusDevice *dev)
s->brightness = 7;
- memory_region_init_io(&s->iomem, NULL, &musicpal_lcd_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &musicpal_lcd_ops, s,
"musicpal-lcd", MP_LCD_SIZE);
sysbus_init_mmio(dev, &s->iomem);
@@ -740,7 +740,7 @@ static int mv88w8618_pic_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, mv88w8618_pic_set_irq, 32);
sysbus_init_irq(dev, &s->parent_irq);
- memory_region_init_io(&s->iomem, NULL, &mv88w8618_pic_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &mv88w8618_pic_ops, s,
"musicpal-pic", MP_PIC_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -905,7 +905,7 @@ static int mv88w8618_pit_init(SysBusDevice *dev)
mv88w8618_timer_init(dev, &s->timer[i], 1000000);
}
- memory_region_init_io(&s->iomem, NULL, &mv88w8618_pit_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &mv88w8618_pit_ops, s,
"musicpal-pit", MP_PIT_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -999,7 +999,7 @@ static int mv88w8618_flashcfg_init(SysBusDevice *dev)
mv88w8618_flashcfg_state *s = FROM_SYSBUS(mv88w8618_flashcfg_state, dev);
s->cfgr0 = 0xfffe4285; /* Default as set by U-Boot for 8 MB flash */
- memory_region_init_io(&s->iomem, NULL, &mv88w8618_flashcfg_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &mv88w8618_flashcfg_ops, s,
"musicpal-flashcfg", MP_FLASHCFG_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -1074,7 +1074,7 @@ static void musicpal_misc_init(Object *obj)
SysBusDevice *sd = SYS_BUS_DEVICE(obj);
MusicPalMiscState *s = MUSICPAL_MISC(obj);
- memory_region_init_io(&s->iomem, NULL, &musicpal_misc_ops, NULL,
+ memory_region_init_io(&s->iomem, OBJECT(s), &musicpal_misc_ops, NULL,
"musicpal-misc", MP_MISC_SIZE);
sysbus_init_mmio(sd, &s->iomem);
}
@@ -1121,7 +1121,7 @@ static int mv88w8618_wlan_init(SysBusDevice *dev)
{
MemoryRegion *iomem = g_new(MemoryRegion, 1);
- memory_region_init_io(iomem, NULL, &mv88w8618_wlan_ops, NULL,
+ memory_region_init_io(iomem, OBJECT(dev), &mv88w8618_wlan_ops, NULL,
"musicpal-wlan", MP_WLAN_SIZE);
sysbus_init_mmio(dev, iomem);
return 0;
@@ -1327,7 +1327,7 @@ static int musicpal_gpio_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->iomem, NULL, &musicpal_gpio_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &musicpal_gpio_ops, s,
"musicpal-gpio", MP_GPIO_SIZE);
sysbus_init_mmio(dev, &s->iomem);
@@ -1484,7 +1484,7 @@ static int musicpal_key_init(SysBusDevice *dev)
{
musicpal_key_state *s = FROM_SYSBUS(musicpal_key_state, dev);
- memory_region_init(&s->iomem, NULL, "dummy", 0);
+ memory_region_init(&s->iomem, OBJECT(s), "dummy", 0);
sysbus_init_mmio(dev, &s->iomem);
s->kbd_extended = 0;
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c
index d046edc..5a22654 100644
--- a/hw/arm/pxa2xx.c
+++ b/hw/arm/pxa2xx.c
@@ -764,7 +764,8 @@ static int pxa2xx_ssp_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->iomem, NULL, &pxa2xx_ssp_ops, s, "pxa2xx-ssp", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pxa2xx_ssp_ops, s,
+ "pxa2xx-ssp", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
register_savevm(&dev->qdev, "pxa2xx_ssp", -1, 0,
pxa2xx_ssp_save, pxa2xx_ssp_load, s);
@@ -1131,7 +1132,8 @@ static int pxa2xx_rtc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->rtc_irq);
- memory_region_init_io(&s->iomem, NULL, &pxa2xx_rtc_ops, s, "pxa2xx-rtc", 0x10000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pxa2xx_rtc_ops, s,
+ "pxa2xx-rtc", 0x10000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -1481,8 +1483,8 @@ static int pxa2xx_i2c_initfn(SysBusDevice *dev)
s->bus = i2c_init_bus(&dev->qdev, "i2c");
- memory_region_init_io(&s->iomem, NULL, &pxa2xx_i2c_ops, s,
- "pxa2xx-i2x", s->region_size);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pxa2xx_i2c_ops, s,
+ "pxa2xx-i2c", s->region_size);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c
index abf41dc..f8c3ee0 100644
--- a/hw/arm/pxa2xx_gpio.c
+++ b/hw/arm/pxa2xx_gpio.c
@@ -283,7 +283,7 @@ static int pxa2xx_gpio_initfn(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, pxa2xx_gpio_set, s->lines);
qdev_init_gpio_out(&dev->qdev, s->handler, s->lines);
- memory_region_init_io(&s->iomem, NULL, &pxa_gpio_ops, s, "pxa2xx-gpio", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pxa_gpio_ops, s, "pxa2xx-gpio", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq0);
sysbus_init_irq(dev, &s->irq1);
diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c
index 042d422..8929b6d 100644
--- a/hw/arm/pxa2xx_pic.c
+++ b/hw/arm/pxa2xx_pic.c
@@ -278,7 +278,7 @@ DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu)
qdev_init_gpio_in(dev, pxa2xx_pic_set_irq, PXA2XX_PIC_SRCS);
/* Enable IC memory-mapped registers access. */
- memory_region_init_io(&s->iomem, NULL, &pxa2xx_pic_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &pxa2xx_pic_ops, s,
"pxa2xx-pic", 0x00100000);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c
index 60ad30d..593b75e 100644
--- a/hw/arm/spitz.c
+++ b/hw/arm/spitz.c
@@ -169,7 +169,7 @@ static int sl_nand_init(SysBusDevice *dev) {
nand = drive_get(IF_MTD, 0, 0);
s->nand = nand_init(nand ? nand->bdrv : NULL, s->manf_id, s->chip_id);
- memory_region_init_io(&s->iomem, NULL, &sl_ops, s, "sl", 0x40);
+ memory_region_init_io(&s->iomem, OBJECT(s), &sl_ops, s, "sl", 0x40);
sysbus_init_mmio(dev, &s->iomem);
return 0;
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 30e7b76..a2b6b17 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -307,7 +307,7 @@ static int stellaris_gptm_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
qdev_init_gpio_out(&dev->qdev, &s->trigger, 1);
- memory_region_init_io(&s->iomem, NULL, &gptm_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &gptm_ops, s,
"gptm", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
@@ -862,7 +862,7 @@ static int stellaris_i2c_init(SysBusDevice * dev)
bus = i2c_init_bus(&dev->qdev, "i2c");
s->bus = bus;
- memory_region_init_io(&s->iomem, NULL, &stellaris_i2c_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &stellaris_i2c_ops, s,
"i2c", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
/* ??? For now we only implement the master interface. */
@@ -1145,7 +1145,7 @@ static int stellaris_adc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq[n]);
}
- memory_region_init_io(&s->iomem, NULL, &stellaris_adc_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &stellaris_adc_ops, s,
"adc", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
stellaris_adc_reset(s);
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index 0f5a545..feaaf45 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -173,7 +173,8 @@ static int strongarm_pic_initfn(SysBusDevice *dev)
StrongARMPICState *s = FROM_SYSBUS(StrongARMPICState, dev);
qdev_init_gpio_in(&dev->qdev, strongarm_pic_set_irq, SA_PIC_SRCS);
- memory_region_init_io(&s->iomem, NULL, &strongarm_pic_ops, s, "pic", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &strongarm_pic_ops, s,
+ "pic", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
sysbus_init_irq(dev, &s->fiq);
@@ -383,7 +384,8 @@ static int strongarm_rtc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->rtc_irq);
sysbus_init_irq(dev, &s->rtc_hz_irq);
- memory_region_init_io(&s->iomem, NULL, &strongarm_rtc_ops, s, "rtc", 0x10000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &strongarm_rtc_ops, s,
+ "rtc", 0x10000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -637,7 +639,8 @@ static int strongarm_gpio_initfn(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, strongarm_gpio_set, 28);
qdev_init_gpio_out(&dev->qdev, s->handler, 28);
- memory_region_init_io(&s->iomem, NULL, &strongarm_gpio_ops, s, "gpio", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &strongarm_gpio_ops, s,
+ "gpio", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
for (i = 0; i < 11; i++) {
@@ -808,7 +811,8 @@ static int strongarm_ppc_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, strongarm_ppc_set, 22);
qdev_init_gpio_out(&dev->qdev, s->handler, 22);
- memory_region_init_io(&s->iomem, NULL, &strongarm_ppc_ops, s, "ppc", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &strongarm_ppc_ops, s,
+ "ppc", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
@@ -1204,7 +1208,8 @@ static int strongarm_uart_init(SysBusDevice *dev)
{
StrongARMUARTState *s = FROM_SYSBUS(StrongARMUARTState, dev);
- memory_region_init_io(&s->iomem, NULL, &strongarm_uart_ops, s, "uart", 0x10000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &strongarm_uart_ops, s,
+ "uart", 0x10000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
@@ -1496,7 +1501,8 @@ static int strongarm_ssp_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->iomem, NULL, &strongarm_ssp_ops, s, "ssp", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &strongarm_ssp_ops, s,
+ "ssp", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
s->bus = ssi_create_bus(&dev->qdev, "ssi");
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index cc06165..08878b9 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -154,7 +154,8 @@ static int vpb_sic_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->parent[i]);
}
s->irq = 31;
- memory_region_init_io(&s->iomem, NULL, &vpb_sic_ops, s, "vpb-sic", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &vpb_sic_ops, s,
+ "vpb-sic", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
diff --git a/hw/audio/ac97.c b/hw/audio/ac97.c
index 47e6f19..365b2f1 100644
--- a/hw/audio/ac97.c
+++ b/hw/audio/ac97.c
@@ -1378,8 +1378,10 @@ static int ac97_initfn (PCIDevice *dev)
c[PCI_INTERRUPT_LINE] = 0x00; /* intr_ln interrupt line rw */
c[PCI_INTERRUPT_PIN] = 0x01; /* intr_pn interrupt pin ro */
- memory_region_init_io (&s->io_nam, NULL, &ac97_io_nam_ops, s, "ac97-nam", 1024);
- memory_region_init_io (&s->io_nabm, NULL, &ac97_io_nabm_ops, s, "ac97-nabm", 256);
+ memory_region_init_io (&s->io_nam, OBJECT(s), &ac97_io_nam_ops, s,
+ "ac97-nam", 1024);
+ memory_region_init_io (&s->io_nabm, OBJECT(s), &ac97_io_nabm_ops, s,
+ "ac97-nabm", 256);
pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_nam);
pci_register_bar (&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io_nabm);
qemu_register_reset (ac97_on_reset, s);
diff --git a/hw/audio/cs4231.c b/hw/audio/cs4231.c
index fb9b700..fabe9e6 100644
--- a/hw/audio/cs4231.c
+++ b/hw/audio/cs4231.c
@@ -144,7 +144,8 @@ static int cs4231_init1(SysBusDevice *dev)
{
CSState *s = FROM_SYSBUS(CSState, dev);
- memory_region_init_io(&s->iomem, NULL, &cs_mem_ops, s, "cs4321", CS_SIZE);
+ memory_region_init_io(&s->iomem, OBJECT(s), &cs_mem_ops, s, "cs4321",
+ CS_SIZE);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
diff --git a/hw/audio/cs4231a.c b/hw/audio/cs4231a.c
index c31da2e..7365c3c 100644
--- a/hw/audio/cs4231a.c
+++ b/hw/audio/cs4231a.c
@@ -648,7 +648,8 @@ static void cs4231a_initfn (Object *obj)
{
CSState *s = CS4231A (obj);
- memory_region_init_io (&s->ioports, NULL, &cs_ioport_ops, s, "cs4231a", 4);
+ memory_region_init_io (&s->ioports, OBJECT(s), &cs_ioport_ops, s,
+ "cs4231a", 4);
}
static void cs4231a_realizefn (DeviceState *dev, Error **errp)
diff --git a/hw/audio/es1370.c b/hw/audio/es1370.c
index b953df2..f2c40da 100644
--- a/hw/audio/es1370.c
+++ b/hw/audio/es1370.c
@@ -1035,7 +1035,7 @@ static int es1370_initfn (PCIDevice *dev)
c[PCI_MIN_GNT] = 0x0c;
c[PCI_MAX_LAT] = 0x80;
- memory_region_init_io (&s->io, NULL, &es1370_io_ops, s, "es1370", 256);
+ memory_region_init_io (&s->io, OBJECT(s), &es1370_io_ops, s, "es1370", 256);
pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
qemu_register_reset (es1370_on_reset, s);
diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c
index e94602f..58984dc 100644
--- a/hw/audio/intel-hda.c
+++ b/hw/audio/intel-hda.c
@@ -1135,7 +1135,7 @@ static int intel_hda_init(PCIDevice *pci)
/* HDCTL off 0x40 bit 0 selects signaling mode (1-HDA, 0 - Ac97) 18.1.19 */
conf[0x40] = 0x01;
- memory_region_init_io(&d->mmio, NULL, &intel_hda_mmio_ops, d,
+ memory_region_init_io(&d->mmio, OBJECT(d), &intel_hda_mmio_ops, d,
"intel-hda", 0x4000);
pci_register_bar(&d->pci, 0, 0, &d->mmio);
if (d->msi) {
diff --git a/hw/audio/marvell_88w8618.c b/hw/audio/marvell_88w8618.c
index e04e932..b40ea43 100644
--- a/hw/audio/marvell_88w8618.c
+++ b/hw/audio/marvell_88w8618.c
@@ -244,7 +244,7 @@ static int mv88w8618_audio_init(SysBusDevice *dev)
wm8750_data_req_set(s->wm, mv88w8618_audio_callback, s);
- memory_region_init_io(&s->iomem, NULL, &mv88w8618_audio_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &mv88w8618_audio_ops, s,
"audio", MP_AUDIO_SIZE);
sysbus_init_mmio(dev, &s->iomem);
diff --git a/hw/audio/milkymist-ac97.c b/hw/audio/milkymist-ac97.c
index 79a00fd..133de4e 100644
--- a/hw/audio/milkymist-ac97.c
+++ b/hw/audio/milkymist-ac97.c
@@ -300,7 +300,7 @@ static int milkymist_ac97_init(SysBusDevice *dev)
s->voice_out = AUD_open_out(&s->card, s->voice_out,
"mm_ac97.out", s, ac97_out_cb, &as);
- memory_region_init_io(&s->regs_region, NULL, &ac97_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, OBJECT(s), &ac97_mmio_ops, s,
"milkymist-ac97", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
diff --git a/hw/audio/pcspk.c b/hw/audio/pcspk.c
index 123793b..7ad59a1 100644
--- a/hw/audio/pcspk.c
+++ b/hw/audio/pcspk.c
@@ -167,7 +167,7 @@ static void pcspk_initfn(Object *obj)
{
PCSpkState *s = PC_SPEAKER(obj);
- memory_region_init_io(&s->ioport, NULL, &pcspk_io_ops, s, "elcr", 1);
+ memory_region_init_io(&s->ioport, OBJECT(s), &pcspk_io_ops, s, "elcr", 1);
}
static void pcspk_realizefn(DeviceState *dev, Error **errp)
diff --git a/hw/audio/pl041.c b/hw/audio/pl041.c
index 5dd18c7..7d331b9 100644
--- a/hw/audio/pl041.c
+++ b/hw/audio/pl041.c
@@ -543,7 +543,7 @@ static int pl041_init(SysBusDevice *dev)
}
/* Connect the device to the sysbus */
- memory_region_init_io(&s->iomem, NULL, &pl041_ops, s, "pl041", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pl041_ops, s, "pl041", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 43/66] hw/block: pass owner to memory_region_init* functions
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (40 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 42/66] hw/a*: pass owner to memory_region_init* functions Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 44/66] hw/c*: " Paolo Bonzini
` (23 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/block/fdc.c | 7 ++++---
hw/block/nvme.c | 3 ++-
hw/block/onenand.c | 10 ++++++----
hw/block/pflash_cfi01.c | 2 +-
hw/block/pflash_cfi02.c | 8 ++++----
5 files changed, 17 insertions(+), 13 deletions(-)
diff --git a/hw/block/fdc.c b/hw/block/fdc.c
index 1bec805..cdc00e5 100644
--- a/hw/block/fdc.c
+++ b/hw/block/fdc.c
@@ -2149,7 +2149,8 @@ static int sysbus_fdc_init1(SysBusDevice *dev)
FDCtrl *fdctrl = &sys->state;
int ret;
- memory_region_init_io(&fdctrl->iomem, NULL, &fdctrl_mem_ops, fdctrl, "fdc", 0x08);
+ memory_region_init_io(&fdctrl->iomem, OBJECT(sys), &fdctrl_mem_ops, fdctrl,
+ "fdc", 0x08);
sysbus_init_mmio(dev, &fdctrl->iomem);
sysbus_init_irq(dev, &fdctrl->irq);
qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
@@ -2165,8 +2166,8 @@ static int sun4m_fdc_init1(SysBusDevice *dev)
{
FDCtrl *fdctrl = &(FROM_SYSBUS(FDCtrlSysBus, dev)->state);
- memory_region_init_io(&fdctrl->iomem, NULL, &fdctrl_mem_strict_ops, fdctrl,
- "fdctrl", 0x08);
+ memory_region_init_io(&fdctrl->iomem, OBJECT(dev), &fdctrl_mem_strict_ops,
+ fdctrl, "fdctrl", 0x08);
sysbus_init_mmio(dev, &fdctrl->iomem);
sysbus_init_irq(dev, &fdctrl->irq);
qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index aa3d9a9..f15f04a 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -777,7 +777,8 @@ static int nvme_init(PCIDevice *pci_dev)
n->sq = g_malloc0(sizeof(*n->sq)*n->num_queues);
n->cq = g_malloc0(sizeof(*n->cq)*n->num_queues);
- memory_region_init_io(&n->iomem, NULL, &nvme_mmio_ops, n, "nvme", n->reg_size);
+ memory_region_init_io(&n->iomem, OBJECT(n), &nvme_mmio_ops, n,
+ "nvme", n->reg_size);
pci_register_bar(&n->parent_obj, 0,
PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64,
&n->iomem);
diff --git a/hw/block/onenand.c b/hw/block/onenand.c
index edbce3c..2776f64 100644
--- a/hw/block/onenand.c
+++ b/hw/block/onenand.c
@@ -113,9 +113,10 @@ static void onenand_mem_setup(OneNANDState *s)
/* XXX: We should use IO_MEM_ROMD but we broke it earlier...
* Both 0x0000 ... 0x01ff and 0x8000 ... 0x800f can be used to
* write boot commands. Also take note of the BWPS bit. */
- memory_region_init(&s->container, NULL, "onenand", 0x10000 << s->shift);
+ memory_region_init(&s->container, OBJECT(s), "onenand",
+ 0x10000 << s->shift);
memory_region_add_subregion(&s->container, 0, &s->iomem);
- memory_region_init_alias(&s->mapped_ram, NULL, "onenand-mapped-ram",
+ memory_region_init_alias(&s->mapped_ram, OBJECT(s), "onenand-mapped-ram",
&s->ram, 0x0200 << s->shift,
0xbe00 << s->shift);
memory_region_add_subregion_overlap(&s->container,
@@ -768,7 +769,7 @@ static int onenand_initfn(SysBusDevice *dev)
s->blockwp = g_malloc(s->blocks);
s->density_mask = (s->id.dev & 0x08)
? (1 << (6 + ((s->id.dev >> 4) & 7))) : 0;
- memory_region_init_io(&s->iomem, NULL, &onenand_ops, s, "onenand",
+ memory_region_init_io(&s->iomem, OBJECT(s), &onenand_ops, s, "onenand",
0x10000 << s->shift);
if (!s->bdrv) {
s->image = memset(g_malloc(size + (size >> 5)),
@@ -782,7 +783,8 @@ static int onenand_initfn(SysBusDevice *dev)
}
s->otp = memset(g_malloc((64 + 2) << PAGE_SHIFT),
0xff, (64 + 2) << PAGE_SHIFT);
- memory_region_init_ram(&s->ram, NULL, "onenand.ram", 0xc000 << s->shift);
+ memory_region_init_ram(&s->ram, OBJECT(s), "onenand.ram",
+ 0xc000 << s->shift);
vmstate_register_ram_global(&s->ram);
ram = memory_region_get_ram_ptr(&s->ram);
s->boot[0] = ram + (0x0000 << s->shift);
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index 5d51e58..6898a25 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -579,7 +579,7 @@ static int pflash_cfi01_init(SysBusDevice *dev)
#endif
memory_region_init_rom_device(
- &pfl->mem, NULL,
+ &pfl->mem, OBJECT(dev),
pfl->be ? &pflash_cfi01_ops_be : &pflash_cfi01_ops_le, pfl,
pfl->name, total_len);
vmstate_register_ram(&pfl->mem, DEVICE(pfl));
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
index 8c1d570..d6cd3da 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -100,11 +100,11 @@ static void pflash_setup_mappings(pflash_t *pfl)
unsigned i;
hwaddr size = memory_region_size(&pfl->orig_mem);
- memory_region_init(&pfl->mem, NULL, "pflash", pfl->mappings * size);
+ memory_region_init(&pfl->mem, OBJECT(pfl), "pflash", pfl->mappings * size);
pfl->mem_mappings = g_new(MemoryRegion, pfl->mappings);
for (i = 0; i < pfl->mappings; ++i) {
- memory_region_init_alias(&pfl->mem_mappings[i], NULL, "pflash-alias",
- &pfl->orig_mem, 0, size);
+ memory_region_init_alias(&pfl->mem_mappings[i], OBJECT(pfl),
+ "pflash-alias", &pfl->orig_mem, 0, size);
memory_region_add_subregion(&pfl->mem, i * size, &pfl->mem_mappings[i]);
}
}
@@ -600,7 +600,7 @@ static int pflash_cfi02_init(SysBusDevice *dev)
return NULL;
#endif
- memory_region_init_rom_device(&pfl->orig_mem, NULL, pfl->be ?
+ memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl), pfl->be ?
&pflash_cfi02_ops_be : &pflash_cfi02_ops_le,
pfl, pfl->name, chip_len);
vmstate_register_ram(&pfl->orig_mem, DEVICE(pfl));
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 44/66] hw/c*: pass owner to memory_region_init* functions
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (41 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 43/66] hw/block: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 45/66] hw/d*: " Paolo Bonzini
` (22 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/char/cadence_uart.c | 2 +-
hw/char/debugcon.c | 2 +-
hw/char/escc.c | 2 +-
hw/char/etraxfs_ser.c | 3 ++-
hw/char/exynos4210_uart.c | 4 ++--
hw/char/grlib_apbuart.c | 2 +-
hw/char/imx_serial.c | 3 ++-
hw/char/lm32_uart.c | 3 ++-
hw/char/milkymist-uart.c | 2 +-
hw/char/pl011.c | 2 +-
hw/char/serial-isa.c | 2 +-
hw/char/serial-pci.c | 7 ++++---
hw/char/tpci200.c | 12 ++++++------
hw/char/xilinx_uartlite.c | 4 ++--
hw/core/empty_slot.c | 2 +-
hw/cpu/a15mpcore.c | 3 ++-
hw/cpu/a9mpcore.c | 2 +-
hw/cpu/arm11mpcore.c | 6 ++++--
hw/cpu/icc_bus.c | 2 +-
19 files changed, 36 insertions(+), 29 deletions(-)
diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index 36e8cd5..131370a 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -442,7 +442,7 @@ static int cadence_uart_init(SysBusDevice *dev)
{
UartState *s = FROM_SYSBUS(UartState, dev);
- memory_region_init_io(&s->iomem, NULL, &uart_ops, s, "uart", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &uart_ops, s, "uart", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
diff --git a/hw/char/debugcon.c b/hw/char/debugcon.c
index c62fead..03db12f 100644
--- a/hw/char/debugcon.c
+++ b/hw/char/debugcon.c
@@ -103,7 +103,7 @@ static void debugcon_isa_realizefn(DeviceState *dev, Error **errp)
error_propagate(errp, err);
return;
}
- memory_region_init_io(&s->io, NULL, &debugcon_ops, s,
+ memory_region_init_io(&s->io, OBJECT(dev), &debugcon_ops, s,
TYPE_ISA_DEBUGCON_DEVICE, 1);
memory_region_add_subregion(isa_address_space_io(d),
isa->iobase, &s->io);
diff --git a/hw/char/escc.c b/hw/char/escc.c
index 422adf2..4c42198 100644
--- a/hw/char/escc.c
+++ b/hw/char/escc.c
@@ -886,7 +886,7 @@ static int escc_init1(SysBusDevice *dev)
s->chn[0].otherchn = &s->chn[1];
s->chn[1].otherchn = &s->chn[0];
- memory_region_init_io(&s->mmio, NULL, &escc_mem_ops, s, "escc",
+ memory_region_init_io(&s->mmio, OBJECT(s), &escc_mem_ops, s, "escc",
ESCC_SIZE << s->it_shift);
sysbus_init_mmio(dev, &s->mmio);
diff --git a/hw/char/etraxfs_ser.c b/hw/char/etraxfs_ser.c
index ffd9767..d19af00 100644
--- a/hw/char/etraxfs_ser.c
+++ b/hw/char/etraxfs_ser.c
@@ -211,7 +211,8 @@ static int etraxfs_ser_init(SysBusDevice *dev)
struct etrax_serial *s = FROM_SYSBUS(typeof (*s), dev);
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->mmio, NULL, &ser_ops, s, "etraxfs-serial", R_MAX * 4);
+ memory_region_init_io(&s->mmio, OBJECT(s), &ser_ops, s,
+ "etraxfs-serial", R_MAX * 4);
sysbus_init_mmio(dev, &s->mmio);
s->chr = qemu_char_get_next_serial();
diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c
index b879ba4..855ce7a 100644
--- a/hw/char/exynos4210_uart.c
+++ b/hw/char/exynos4210_uart.c
@@ -630,8 +630,8 @@ static int exynos4210_uart_init(SysBusDevice *dev)
Exynos4210UartState *s = FROM_SYSBUS(Exynos4210UartState, dev);
/* memory mapping */
- memory_region_init_io(&s->iomem, NULL, &exynos4210_uart_ops, s, "exynos4210.uart",
- EXYNOS4210_UART_REGS_MEM_SIZE);
+ memory_region_init_io(&s->iomem, OBJECT(s), &exynos4210_uart_ops, s,
+ "exynos4210.uart", EXYNOS4210_UART_REGS_MEM_SIZE);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
diff --git a/hw/char/grlib_apbuart.c b/hw/char/grlib_apbuart.c
index a1587dc..82e1b95 100644
--- a/hw/char/grlib_apbuart.c
+++ b/hw/char/grlib_apbuart.c
@@ -242,7 +242,7 @@ static int grlib_apbuart_init(SysBusDevice *dev)
sysbus_init_irq(dev, &uart->irq);
- memory_region_init_io(&uart->iomem, NULL, &grlib_apbuart_ops, uart,
+ memory_region_init_io(&uart->iomem, OBJECT(uart), &grlib_apbuart_ops, uart,
"uart", UART_REG_SIZE);
sysbus_init_mmio(dev, &uart->iomem);
diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c
index 9fa4da7..69b9ed2 100644
--- a/hw/char/imx_serial.c
+++ b/hw/char/imx_serial.c
@@ -386,7 +386,8 @@ static int imx_serial_init(SysBusDevice *dev)
IMXSerialState *s = FROM_SYSBUS(IMXSerialState, dev);
- memory_region_init_io(&s->iomem, NULL, &imx_serial_ops, s, "imx-serial", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &imx_serial_ops, s,
+ "imx-serial", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
diff --git a/hw/char/lm32_uart.c b/hw/char/lm32_uart.c
index e8fdbe4..37b38ba 100644
--- a/hw/char/lm32_uart.c
+++ b/hw/char/lm32_uart.c
@@ -250,7 +250,8 @@ static int lm32_uart_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->iomem, NULL, &uart_ops, s, "uart", R_MAX * 4);
+ memory_region_init_io(&s->iomem, OBJECT(s), &uart_ops, s,
+ "uart", R_MAX * 4);
sysbus_init_mmio(dev, &s->iomem);
s->chr = qemu_char_get_next_serial();
diff --git a/hw/char/milkymist-uart.c b/hw/char/milkymist-uart.c
index 22faf4c..46deab2 100644
--- a/hw/char/milkymist-uart.c
+++ b/hw/char/milkymist-uart.c
@@ -196,7 +196,7 @@ static int milkymist_uart_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->regs_region, NULL, &uart_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, OBJECT(s), &uart_mmio_ops, s,
"milkymist-uart", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index bd26e6d..ebec64f 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -265,7 +265,7 @@ static int pl011_init(SysBusDevice *dev, const unsigned char *id)
{
pl011_state *s = FROM_SYSBUS(pl011_state, dev);
- memory_region_init_io(&s->iomem, NULL, &pl011_ops, s, "pl011", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pl011_ops, s, "pl011", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->id = id;
diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c
index 0bce75b..cea8212 100644
--- a/hw/char/serial-isa.c
+++ b/hw/char/serial-isa.c
@@ -72,7 +72,7 @@ static void serial_isa_realizefn(DeviceState *dev, Error **errp)
serial_realize_core(s, errp);
qdev_set_legacy_instance_id(dev, isa->iobase, 3);
- memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8);
+ memory_region_init_io(&s->io, OBJECT(isa), &serial_io_ops, s, "serial", 8);
isa_register_ioport(isadev, &s->io, isa->iobase);
}
diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c
index 6adfbe6..a17c702 100644
--- a/hw/char/serial-pci.c
+++ b/hw/char/serial-pci.c
@@ -63,7 +63,7 @@ static int serial_pci_init(PCIDevice *dev)
pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
s->irq = pci->dev.irq[0];
- memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8);
+ memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, "serial", 8);
pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
return 0;
}
@@ -102,7 +102,7 @@ static int multi_serial_pci_init(PCIDevice *dev)
assert(pci->ports <= PCI_SERIAL_MAX_PORTS);
pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
- memory_region_init(&pci->iobar, NULL, "multiserial", 8 * pci->ports);
+ memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * pci->ports);
pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar);
pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci,
pci->ports);
@@ -118,7 +118,8 @@ static int multi_serial_pci_init(PCIDevice *dev)
}
s->irq = pci->irqs[i];
pci->name[i] = g_strdup_printf("uart #%d", i+1);
- memory_region_init_io(&s->io, NULL, &serial_io_ops, s, pci->name[i], 8);
+ memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s,
+ pci->name[i], 8);
memory_region_add_subregion(&pci->iobar, 8 * i, &s->io);
}
return 0;
diff --git a/hw/char/tpci200.c b/hw/char/tpci200.c
index 9174042..a199e57 100644
--- a/hw/char/tpci200.c
+++ b/hw/char/tpci200.c
@@ -588,17 +588,17 @@ static int tpci200_initfn(PCIDevice *pci_dev)
pci_set_long(c + 0x48, 0x00024C06);
pci_set_long(c + 0x4C, 0x00000003);
- memory_region_init_io(&s->mmio, NULL, &tpci200_cfg_ops,
+ memory_region_init_io(&s->mmio, OBJECT(s), &tpci200_cfg_ops,
s, "tpci200_mmio", 128);
- memory_region_init_io(&s->io, NULL, &tpci200_cfg_ops,
+ memory_region_init_io(&s->io, OBJECT(s), &tpci200_cfg_ops,
s, "tpci200_io", 128);
- memory_region_init_io(&s->las0, NULL, &tpci200_las0_ops,
+ memory_region_init_io(&s->las0, OBJECT(s), &tpci200_las0_ops,
s, "tpci200_las0", 256);
- memory_region_init_io(&s->las1, NULL, &tpci200_las1_ops,
+ memory_region_init_io(&s->las1, OBJECT(s), &tpci200_las1_ops,
s, "tpci200_las1", 1024);
- memory_region_init_io(&s->las2, NULL, &tpci200_las2_ops,
+ memory_region_init_io(&s->las2, OBJECT(s), &tpci200_las2_ops,
s, "tpci200_las2", 1024*1024*32);
- memory_region_init_io(&s->las3, NULL, &tpci200_las3_ops,
+ memory_region_init_io(&s->las3, OBJECT(s), &tpci200_las3_ops,
s, "tpci200_las3", 1024*1024*16);
pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio);
pci_register_bar(&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c
index 241bf1f..feca497 100644
--- a/hw/char/xilinx_uartlite.c
+++ b/hw/char/xilinx_uartlite.c
@@ -199,8 +199,8 @@ static int xilinx_uartlite_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
uart_update_status(s);
- memory_region_init_io(&s->mmio, NULL, &uart_ops, s, "xlnx.xps-uartlite",
- R_MAX * 4);
+ memory_region_init_io(&s->mmio, OBJECT(s), &uart_ops, s,
+ "xlnx.xps-uartlite", R_MAX * 4);
sysbus_init_mmio(dev, &s->mmio);
s->chr = qemu_char_get_next_serial();
diff --git a/hw/core/empty_slot.c b/hw/core/empty_slot.c
index 35e32f9..e624991 100644
--- a/hw/core/empty_slot.c
+++ b/hw/core/empty_slot.c
@@ -70,7 +70,7 @@ static int empty_slot_init1(SysBusDevice *dev)
{
EmptySlot *s = FROM_SYSBUS(EmptySlot, dev);
- memory_region_init_io(&s->iomem, NULL, &empty_slot_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &empty_slot_ops, s,
"empty-slot", s->size);
sysbus_init_mmio(dev, &s->iomem);
return 0;
diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index 773c83a..967b080 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -68,7 +68,8 @@ static int a15mp_priv_init(SysBusDevice *dev)
* 0x5000-0x5fff -- GIC virtual interface control (not modelled)
* 0x6000-0x7fff -- GIC virtual CPU interface (not modelled)
*/
- memory_region_init(&s->container, NULL, "a15mp-priv-container", 0x8000);
+ memory_region_init(&s->container, OBJECT(s),
+ "a15mp-priv-container", 0x8000);
memory_region_add_subregion(&s->container, 0x1000,
sysbus_mmio_get_region(busdev, 0));
memory_region_add_subregion(&s->container, 0x2000,
diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c
index 26a3858..6c00a59 100644
--- a/hw/cpu/a9mpcore.c
+++ b/hw/cpu/a9mpcore.c
@@ -71,7 +71,7 @@ static int a9mp_priv_init(SysBusDevice *dev)
*
* We should implement the global timer but don't currently do so.
*/
- memory_region_init(&s->container, NULL, "a9mp-priv-container", 0x2000);
+ memory_region_init(&s->container, OBJECT(s), "a9mp-priv-container", 0x2000);
memory_region_add_subregion(&s->container, 0,
sysbus_mmio_get_region(scubusdev, 0));
/* GIC CPU interface */
diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c
index 67e2828..8eeb53e 100644
--- a/hw/cpu/arm11mpcore.c
+++ b/hw/cpu/arm11mpcore.c
@@ -87,8 +87,10 @@ static void mpcore_priv_map_setup(ARM11MPCorePriveState *s)
SysBusDevice *gicbusdev = SYS_BUS_DEVICE(s->gic);
SysBusDevice *timerbusdev = SYS_BUS_DEVICE(s->mptimer);
SysBusDevice *wdtbusdev = SYS_BUS_DEVICE(s->wdtimer);
- memory_region_init(&s->container, NULL, "mpcode-priv-container", 0x2000);
- memory_region_init_io(&s->iomem, NULL, &mpcore_scu_ops, s, "mpcore-scu", 0x100);
+ memory_region_init(&s->container, OBJECT(s),
+ "mpcode-priv-container", 0x2000);
+ memory_region_init_io(&s->iomem, OBJECT(s),
+ &mpcore_scu_ops, s, "mpcore-scu", 0x100);
memory_region_add_subregion(&s->container, 0, &s->iomem);
/* GIC CPU interfaces: "current CPU" at 0x100, then specific CPUs
* at 0x200, 0x300...
diff --git a/hw/cpu/icc_bus.c b/hw/cpu/icc_bus.c
index 9e901e9..8788144 100644
--- a/hw/cpu/icc_bus.c
+++ b/hw/cpu/icc_bus.c
@@ -95,7 +95,7 @@ static void icc_bridge_init(Object *obj)
/* Do not change order of registering regions,
* APIC must be first registered region, board maps it by 0 index
*/
- memory_region_init(&s->apic_container, NULL, "icc-apic-container",
+ memory_region_init(&s->apic_container, obj, "icc-apic-container",
APIC_SPACE_SIZE);
sysbus_init_mmio(sb, &s->apic_container);
s->icc_bus.apic_address_space = &s->apic_container;
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 45/66] hw/d*: pass owner to memory_region_init* functions
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (42 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 44/66] hw/c*: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 46/66] hw/gpio: " Paolo Bonzini
` (21 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/display/cirrus_vga.c | 2 +-
hw/display/exynos4210_fimd.c | 2 +-
hw/display/jazz_led.c | 2 +-
hw/display/milkymist-tmu2.c | 2 +-
hw/display/milkymist-vgafb.c | 2 +-
hw/display/pl110.c | 2 +-
hw/display/qxl.c | 15 +++++++++------
hw/display/tcx.c | 18 ++++++++++--------
hw/dma/pl080.c | 2 +-
hw/dma/pl330.c | 3 ++-
hw/dma/puv3_dma.c | 2 +-
hw/dma/pxa2xx_dma.c | 2 +-
hw/dma/sparc32_dma.c | 3 ++-
hw/dma/sun4m_iommu.c | 2 +-
hw/dma/xilinx_axidma.c | 2 +-
15 files changed, 34 insertions(+), 27 deletions(-)
diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c
index 3d579e2..a440575 100644
--- a/hw/display/cirrus_vga.c
+++ b/hw/display/cirrus_vga.c
@@ -2967,7 +2967,7 @@ static int pci_cirrus_vga_initfn(PCIDevice *dev)
/* setup PCI */
- memory_region_init(&s->pci_bar, NULL, "cirrus-pci-bar0", 0x2000000);
+ memory_region_init(&s->pci_bar, OBJECT(dev), "cirrus-pci-bar0", 0x2000000);
/* XXX: add byte swapping apertures */
memory_region_add_subregion(&s->pci_bar, 0, &s->cirrus_linear_io);
diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c
index b520f52..eb168ea 100644
--- a/hw/display/exynos4210_fimd.c
+++ b/hw/display/exynos4210_fimd.c
@@ -1908,7 +1908,7 @@ static int exynos4210_fimd_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq[1]);
sysbus_init_irq(dev, &s->irq[2]);
- memory_region_init_io(&s->iomem, NULL, &exynos4210_fimd_mmio_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &exynos4210_fimd_mmio_ops, s,
"exynos4210.fimd", FIMD_REGS_SIZE);
sysbus_init_mmio(dev, &s->iomem);
s->console = graphic_console_init(DEVICE(dev), &exynos4210_fimd_ops, s);
diff --git a/hw/display/jazz_led.c b/hw/display/jazz_led.c
index e6a508e..7f82037 100644
--- a/hw/display/jazz_led.c
+++ b/hw/display/jazz_led.c
@@ -264,7 +264,7 @@ static int jazz_led_init(SysBusDevice *dev)
{
LedState *s = FROM_SYSBUS(LedState, dev);
- memory_region_init_io(&s->iomem, NULL, &led_ops, s, "led", 1);
+ memory_region_init_io(&s->iomem, OBJECT(s), &led_ops, s, "led", 1);
sysbus_init_mmio(dev, &s->iomem);
s->con = graphic_console_init(DEVICE(dev), &jazz_led_ops, s);
diff --git a/hw/display/milkymist-tmu2.c b/hw/display/milkymist-tmu2.c
index 31da796..efda082 100644
--- a/hw/display/milkymist-tmu2.c
+++ b/hw/display/milkymist-tmu2.c
@@ -447,7 +447,7 @@ static int milkymist_tmu2_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->regs_region, NULL, &tmu2_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, OBJECT(s), &tmu2_mmio_ops, s,
"milkymist-tmu2", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
diff --git a/hw/display/milkymist-vgafb.c b/hw/display/milkymist-vgafb.c
index b1f9c16..870b339 100644
--- a/hw/display/milkymist-vgafb.c
+++ b/hw/display/milkymist-vgafb.c
@@ -279,7 +279,7 @@ static int milkymist_vgafb_init(SysBusDevice *dev)
{
MilkymistVgafbState *s = FROM_SYSBUS(typeof(*s), dev);
- memory_region_init_io(&s->regs_region, NULL, &vgafb_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, OBJECT(s), &vgafb_mmio_ops, s,
"milkymist-vgafb", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
diff --git a/hw/display/pl110.c b/hw/display/pl110.c
index 15c2f38..60afcf3 100644
--- a/hw/display/pl110.c
+++ b/hw/display/pl110.c
@@ -453,7 +453,7 @@ static int pl110_init(SysBusDevice *dev)
{
pl110_state *s = FROM_SYSBUS(pl110_state, dev);
- memory_region_init_io(&s->iomem, NULL, &pl110_ops, s, "pl110", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pl110_ops, s, "pl110", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
qdev_init_gpio_in(&s->busdev.qdev, pl110_mux_ctrl_set, 1);
diff --git a/hw/display/qxl.c b/hw/display/qxl.c
index 3804fe2..3862d7a 100644
--- a/hw/display/qxl.c
+++ b/hw/display/qxl.c
@@ -1981,18 +1981,20 @@ static int qxl_init_common(PCIQXLDevice *qxl)
pci_set_byte(&config[PCI_INTERRUPT_PIN], 1);
qxl->rom_size = qxl_rom_size();
- memory_region_init_ram(&qxl->rom_bar, NULL, "qxl.vrom", qxl->rom_size);
+ memory_region_init_ram(&qxl->rom_bar, OBJECT(qxl), "qxl.vrom",
+ qxl->rom_size);
vmstate_register_ram(&qxl->rom_bar, &qxl->pci.qdev);
init_qxl_rom(qxl);
init_qxl_ram(qxl);
qxl->guest_surfaces.cmds = g_new0(QXLPHYSICAL, qxl->ssd.num_surfaces);
- memory_region_init_ram(&qxl->vram_bar, NULL, "qxl.vram", qxl->vram_size);
+ memory_region_init_ram(&qxl->vram_bar, OBJECT(qxl), "qxl.vram",
+ qxl->vram_size);
vmstate_register_ram(&qxl->vram_bar, &qxl->pci.qdev);
- memory_region_init_alias(&qxl->vram32_bar, NULL, "qxl.vram32", &qxl->vram_bar,
- 0, qxl->vram32_size);
+ memory_region_init_alias(&qxl->vram32_bar, OBJECT(qxl), "qxl.vram32",
+ &qxl->vram_bar, 0, qxl->vram32_size);
- memory_region_init_io(&qxl->io_bar, NULL, &qxl_io_ops, qxl,
+ memory_region_init_io(&qxl->io_bar, OBJECT(qxl), &qxl_io_ops, qxl,
"qxl-ioports", io_size);
if (qxl->id == 0) {
vga_dirty_log_start(&qxl->vga);
@@ -2095,7 +2097,8 @@ static int qxl_init_secondary(PCIDevice *dev)
qxl->id = device_id++;
qxl_init_ramsize(qxl);
- memory_region_init_ram(&qxl->vga.vram, NULL, "qxl.vgavram", qxl->vga.vram_size);
+ memory_region_init_ram(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram",
+ qxl->vga.vram_size);
vmstate_register_ram(&qxl->vga.vram, &qxl->pci.qdev);
qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram);
qxl->vga.con = graphic_console_init(DEVICE(dev), &qxl_ops, qxl);
diff --git a/hw/display/tcx.c b/hw/display/tcx.c
index 24b5478..9fd48b5 100644
--- a/hw/display/tcx.c
+++ b/hw/display/tcx.c
@@ -528,7 +528,7 @@ static int tcx_init1(SysBusDevice *dev)
int size;
uint8_t *vram_base;
- memory_region_init_ram(&s->vram_mem, NULL, "tcx.vram",
+ memory_region_init_ram(&s->vram_mem, OBJECT(s), "tcx.vram",
s->vram_size * (1 + 4 + 4));
vmstate_register_ram_global(&s->vram_mem);
vram_base = memory_region_get_ram_ptr(&s->vram_mem);
@@ -536,21 +536,23 @@ static int tcx_init1(SysBusDevice *dev)
/* 8-bit plane */
s->vram = vram_base;
size = s->vram_size;
- memory_region_init_alias(&s->vram_8bit, NULL, "tcx.vram.8bit",
+ memory_region_init_alias(&s->vram_8bit, OBJECT(s), "tcx.vram.8bit",
&s->vram_mem, vram_offset, size);
sysbus_init_mmio(dev, &s->vram_8bit);
vram_offset += size;
vram_base += size;
/* DAC */
- memory_region_init_io(&s->dac, NULL, &tcx_dac_ops, s, "tcx.dac", TCX_DAC_NREGS);
+ memory_region_init_io(&s->dac, OBJECT(s), &tcx_dac_ops, s,
+ "tcx.dac", TCX_DAC_NREGS);
sysbus_init_mmio(dev, &s->dac);
/* TEC (dummy) */
- memory_region_init_io(&s->tec, NULL, &dummy_ops, s, "tcx.tec", TCX_TEC_NREGS);
+ memory_region_init_io(&s->tec, OBJECT(s), &dummy_ops, s,
+ "tcx.tec", TCX_TEC_NREGS);
sysbus_init_mmio(dev, &s->tec);
/* THC: NetBSD writes here even with 8-bit display: dummy */
- memory_region_init_io(&s->thc24, NULL, &dummy_ops, s, "tcx.thc24",
+ memory_region_init_io(&s->thc24, OBJECT(s), &dummy_ops, s, "tcx.thc24",
TCX_THC_NREGS_24);
sysbus_init_mmio(dev, &s->thc24);
@@ -559,7 +561,7 @@ static int tcx_init1(SysBusDevice *dev)
size = s->vram_size * 4;
s->vram24 = (uint32_t *)vram_base;
s->vram24_offset = vram_offset;
- memory_region_init_alias(&s->vram_24bit, NULL, "tcx.vram.24bit",
+ memory_region_init_alias(&s->vram_24bit, OBJECT(s), "tcx.vram.24bit",
&s->vram_mem, vram_offset, size);
sysbus_init_mmio(dev, &s->vram_24bit);
vram_offset += size;
@@ -569,14 +571,14 @@ static int tcx_init1(SysBusDevice *dev)
size = s->vram_size * 4;
s->cplane = (uint32_t *)vram_base;
s->cplane_offset = vram_offset;
- memory_region_init_alias(&s->vram_cplane, NULL, "tcx.vram.cplane",
+ memory_region_init_alias(&s->vram_cplane, OBJECT(s), "tcx.vram.cplane",
&s->vram_mem, vram_offset, size);
sysbus_init_mmio(dev, &s->vram_cplane);
s->con = graphic_console_init(DEVICE(dev), &tcx24_ops, s);
} else {
/* THC 8 bit (dummy) */
- memory_region_init_io(&s->thc8, NULL, &dummy_ops, s, "tcx.thc8",
+ memory_region_init_io(&s->thc8, OBJECT(s), &dummy_ops, s, "tcx.thc8",
TCX_THC_NREGS_8);
sysbus_init_mmio(dev, &s->thc8);
diff --git a/hw/dma/pl080.c b/hw/dma/pl080.c
index 588c7b2..7937c3e 100644
--- a/hw/dma/pl080.c
+++ b/hw/dma/pl080.c
@@ -359,7 +359,7 @@ static int pl08x_init(SysBusDevice *dev, int nchannels)
{
pl080_state *s = FROM_SYSBUS(pl080_state, dev);
- memory_region_init_io(&s->iomem, NULL, &pl080_ops, s, "pl080", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pl080_ops, s, "pl080", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->nchannels = nchannels;
diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c
index b366f8a..ddcc413 100644
--- a/hw/dma/pl330.c
+++ b/hw/dma/pl330.c
@@ -1528,7 +1528,8 @@ static void pl330_realize(DeviceState *dev, Error **errp)
PL330State *s = PL330(dev);
sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq_abort);
- memory_region_init_io(&s->iomem, NULL, &pl330_ops, s, "dma", PL330_IOMEM_SIZE);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pl330_ops, s,
+ "dma", PL330_IOMEM_SIZE);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
s->timer = qemu_new_timer_ns(vm_clock, pl330_exec_cycle_timer, s);
diff --git a/hw/dma/puv3_dma.c b/hw/dma/puv3_dma.c
index 787e9a1..36004ae 100644
--- a/hw/dma/puv3_dma.c
+++ b/hw/dma/puv3_dma.c
@@ -80,7 +80,7 @@ static int puv3_dma_init(SysBusDevice *dev)
s->reg_CFG[i] = 0x0;
}
- memory_region_init_io(&s->iomem, NULL, &puv3_dma_ops, s, "puv3_dma",
+ memory_region_init_io(&s->iomem, OBJECT(s), &puv3_dma_ops, s, "puv3_dma",
PUV3_REGS_OFFSET);
sysbus_init_mmio(dev, &s->iomem);
diff --git a/hw/dma/pxa2xx_dma.c b/hw/dma/pxa2xx_dma.c
index 43e2dc3..bc7bf4c 100644
--- a/hw/dma/pxa2xx_dma.c
+++ b/hw/dma/pxa2xx_dma.c
@@ -465,7 +465,7 @@ static int pxa2xx_dma_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, pxa2xx_dma_request, PXA2XX_DMA_NUM_REQUESTS);
- memory_region_init_io(&s->iomem, NULL, &pxa2xx_dma_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &pxa2xx_dma_ops, s,
"pxa2xx.dma", 0x00010000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c
index 4abb024..be6275f 100644
--- a/hw/dma/sparc32_dma.c
+++ b/hw/dma/sparc32_dma.c
@@ -274,7 +274,8 @@ static int sparc32_dma_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
reg_size = s->is_ledma ? DMA_ETH_SIZE : DMA_SIZE;
- memory_region_init_io(&s->iomem, NULL, &dma_mem_ops, s, "dma", reg_size);
+ memory_region_init_io(&s->iomem, OBJECT(s), &dma_mem_ops, s,
+ "dma", reg_size);
sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_in(&dev->qdev, dma_set_irq, 1);
diff --git a/hw/dma/sun4m_iommu.c b/hw/dma/sun4m_iommu.c
index eafb991..edb93f3 100644
--- a/hw/dma/sun4m_iommu.c
+++ b/hw/dma/sun4m_iommu.c
@@ -349,7 +349,7 @@ static int iommu_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->iomem, NULL, &iommu_mem_ops, s, "iommu",
+ memory_region_init_io(&s->iomem, OBJECT(s), &iommu_mem_ops, s, "iommu",
IOMMU_NREGS * sizeof(uint32_t));
sysbus_init_mmio(dev, &s->iomem);
diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c
index bdce635..a48e3ba 100644
--- a/hw/dma/xilinx_axidma.c
+++ b/hw/dma/xilinx_axidma.c
@@ -590,7 +590,7 @@ static void xilinx_axidma_init(Object *obj)
sysbus_init_irq(sbd, &s->streams[0].irq);
sysbus_init_irq(sbd, &s->streams[1].irq);
- memory_region_init_io(&s->iomem, NULL, &axidma_ops, s,
+ memory_region_init_io(&s->iomem, obj, &axidma_ops, s,
"xlnx.axi-dma", R_MAX * 4 * 2);
sysbus_init_mmio(sbd, &s->iomem);
}
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 46/66] hw/gpio: pass owner to memory_region_init* functions
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (43 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 45/66] hw/d*: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 47/66] hw/i*: " Paolo Bonzini
` (20 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/gpio/omap_gpio.c | 6 +++---
hw/gpio/pl061.c | 2 +-
hw/gpio/puv3_gpio.c | 2 +-
hw/gpio/zaurus.c | 2 +-
4 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/gpio/omap_gpio.c b/hw/gpio/omap_gpio.c
index 13399f9..855afae 100644
--- a/hw/gpio/omap_gpio.c
+++ b/hw/gpio/omap_gpio.c
@@ -677,7 +677,7 @@ static int omap_gpio_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, omap_gpio_set, 16);
qdev_init_gpio_out(&dev->qdev, s->omap1.handler, 16);
sysbus_init_irq(dev, &s->omap1.irq);
- memory_region_init_io(&s->iomem, NULL, &omap_gpio_ops, &s->omap1,
+ memory_region_init_io(&s->iomem, OBJECT(s), &omap_gpio_ops, &s->omap1,
"omap.gpio", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -692,7 +692,7 @@ static int omap2_gpio_init(SysBusDevice *dev)
}
if (s->mpu_model < omap3430) {
s->modulecount = (s->mpu_model < omap2430) ? 4 : 5;
- memory_region_init_io(&s->iomem, NULL, &omap2_gpif_top_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &omap2_gpif_top_ops, s,
"omap2.gpio", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
} else {
@@ -712,7 +712,7 @@ static int omap2_gpio_init(SysBusDevice *dev)
sysbus_init_irq(dev, &m->irq[0]); /* mpu irq */
sysbus_init_irq(dev, &m->irq[1]); /* dsp irq */
sysbus_init_irq(dev, &m->wkup);
- memory_region_init_io(&m->iomem, NULL, &omap2_gpio_module_ops, m,
+ memory_region_init_io(&m->iomem, OBJECT(s), &omap2_gpio_module_ops, m,
"omap.gpio-module", 0x1000);
sysbus_init_mmio(dev, &m->iomem);
}
diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c
index d0dd636..a0bbf08 100644
--- a/hw/gpio/pl061.c
+++ b/hw/gpio/pl061.c
@@ -276,7 +276,7 @@ static int pl061_init(SysBusDevice *dev, const unsigned char *id)
{
pl061_state *s = FROM_SYSBUS(pl061_state, dev);
s->id = id;
- memory_region_init_io(&s->iomem, NULL, &pl061_ops, s, "pl061", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pl061_ops, s, "pl061", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
qdev_init_gpio_in(&dev->qdev, pl061_set_irq, 8);
diff --git a/hw/gpio/puv3_gpio.c b/hw/gpio/puv3_gpio.c
index 333c920..18671eb 100644
--- a/hw/gpio/puv3_gpio.c
+++ b/hw/gpio/puv3_gpio.c
@@ -112,7 +112,7 @@ static int puv3_gpio_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq[PUV3_IRQS_GPIOLOW7]);
sysbus_init_irq(dev, &s->irq[PUV3_IRQS_GPIOHIGH]);
- memory_region_init_io(&s->iomem, NULL, &puv3_gpio_ops, s, "puv3_gpio",
+ memory_region_init_io(&s->iomem, OBJECT(s), &puv3_gpio_ops, s, "puv3_gpio",
PUV3_REGS_OFFSET);
sysbus_init_mmio(dev, &s->iomem);
diff --git a/hw/gpio/zaurus.c b/hw/gpio/zaurus.c
index a0e18c3..c235c3e 100644
--- a/hw/gpio/zaurus.c
+++ b/hw/gpio/zaurus.c
@@ -169,7 +169,7 @@ static int scoop_init(SysBusDevice *dev)
s->status = 0x02;
qdev_init_gpio_out(&s->busdev.qdev, s->handler, 16);
qdev_init_gpio_in(&s->busdev.qdev, scoop_gpio_set, 16);
- memory_region_init_io(&s->iomem, NULL, &scoop_ops, s, "scoop", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &scoop_ops, s, "scoop", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 47/66] hw/i*: pass owner to memory_region_init* functions
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (44 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 46/66] hw/gpio: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 48/66] hw/m*: " Paolo Bonzini
` (19 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/i2c/bitbang_i2c.c | 2 +-
hw/i2c/exynos4210_i2c.c | 4 ++--
hw/i2c/omap_i2c.c | 2 +-
hw/i2c/pm_smbus.c | 3 ++-
hw/i2c/versatile_i2c.c | 2 +-
hw/i386/kvm/pci-assign.c | 28 +++++++++++++++-------------
hw/i386/kvmvapic.c | 6 +++---
hw/i386/pc.c | 2 +-
hw/ide/ahci.c | 6 ++++--
hw/ide/cmd646.c | 13 ++++++++-----
hw/ide/macio.c | 2 +-
hw/ide/mmio.c | 4 ++--
hw/ide/piix.c | 8 ++++----
hw/ide/via.c | 8 ++++----
hw/input/milkymist-softusb.c | 6 +++---
hw/input/pckbd.c | 6 ++++--
hw/input/pl050.c | 2 +-
hw/intc/apic.c | 2 +-
hw/intc/arm_gic.c | 9 +++++----
hw/intc/arm_gic_kvm.c | 6 ++++--
hw/intc/armv7m_nvic.c | 7 ++++---
hw/intc/etraxfs_pic.c | 3 ++-
hw/intc/exynos4210_combiner.c | 2 +-
hw/intc/exynos4210_gic.c | 8 ++++----
hw/intc/grlib_irqmp.c | 2 +-
hw/intc/i8259.c | 6 ++++--
hw/intc/imx_avic.c | 3 ++-
hw/intc/ioapic.c | 3 ++-
hw/intc/omap_intc.c | 4 ++--
hw/intc/openpic.c | 6 +++---
hw/intc/openpic_kvm.c | 2 +-
hw/intc/pl190.c | 2 +-
hw/intc/puv3_intc.c | 2 +-
hw/intc/realview_gic.c | 3 ++-
hw/intc/slavio_intctl.c | 5 +++--
hw/intc/xilinx_intc.c | 3 ++-
hw/isa/apm.c | 2 +-
hw/isa/i82378.c | 6 ++++--
hw/isa/lpc_ich9.c | 4 ++--
hw/isa/pc87312.c | 2 +-
hw/isa/vt82c686.c | 2 +-
41 files changed, 111 insertions(+), 87 deletions(-)
diff --git a/hw/i2c/bitbang_i2c.c b/hw/i2c/bitbang_i2c.c
index f550ba4..5f8b972 100644
--- a/hw/i2c/bitbang_i2c.c
+++ b/hw/i2c/bitbang_i2c.c
@@ -209,7 +209,7 @@ static int gpio_i2c_init(SysBusDevice *dev)
GPIOI2CState *s = FROM_SYSBUS(GPIOI2CState, dev);
i2c_bus *bus;
- memory_region_init(&s->dummy_iomem, NULL, "gpio_i2c", 0);
+ memory_region_init(&s->dummy_iomem, OBJECT(s), "gpio_i2c", 0);
sysbus_init_mmio(dev, &s->dummy_iomem);
bus = i2c_init_bus(&dev->qdev, "i2c");
diff --git a/hw/i2c/exynos4210_i2c.c b/hw/i2c/exynos4210_i2c.c
index bc6eb34..52bffa5 100644
--- a/hw/i2c/exynos4210_i2c.c
+++ b/hw/i2c/exynos4210_i2c.c
@@ -301,8 +301,8 @@ static int exynos4210_i2c_realize(SysBusDevice *dev)
{
Exynos4210I2CState *s = EXYNOS4_I2C(dev);
- memory_region_init_io(&s->iomem, NULL, &exynos4210_i2c_ops, s, TYPE_EXYNOS4_I2C,
- EXYNOS4_I2C_MEM_SIZE);
+ memory_region_init_io(&s->iomem, OBJECT(s), &exynos4210_i2c_ops, s,
+ TYPE_EXYNOS4_I2C, EXYNOS4_I2C_MEM_SIZE);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->bus = i2c_init_bus(&dev->qdev, "i2c");
diff --git a/hw/i2c/omap_i2c.c b/hw/i2c/omap_i2c.c
index 1a8b39c..f0eb448 100644
--- a/hw/i2c/omap_i2c.c
+++ b/hw/i2c/omap_i2c.c
@@ -448,7 +448,7 @@ static int omap_i2c_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
sysbus_init_irq(dev, &s->drq[0]);
sysbus_init_irq(dev, &s->drq[1]);
- memory_region_init_io(&s->iomem, NULL, &omap_i2c_ops, s, "omap.i2c",
+ memory_region_init_io(&s->iomem, OBJECT(s), &omap_i2c_ops, s, "omap.i2c",
(s->revision < OMAP2_INTR_REV) ? 0x800 : 0x1000);
sysbus_init_mmio(dev, &s->iomem);
s->bus = i2c_init_bus(&dev->qdev, NULL);
diff --git a/hw/i2c/pm_smbus.c b/hw/i2c/pm_smbus.c
index f425ad8..6df0fa9 100644
--- a/hw/i2c/pm_smbus.c
+++ b/hw/i2c/pm_smbus.c
@@ -181,5 +181,6 @@ static const MemoryRegionOps pm_smbus_ops = {
void pm_smbus_init(DeviceState *parent, PMSMBus *smb)
{
smb->smbus = i2c_init_bus(parent, "i2c");
- memory_region_init_io(&smb->io, NULL, &pm_smbus_ops, smb, "pm-smbus", 64);
+ memory_region_init_io(&smb->io, OBJECT(parent), &pm_smbus_ops, smb,
+ "pm-smbus", 64);
}
diff --git a/hw/i2c/versatile_i2c.c b/hw/i2c/versatile_i2c.c
index a239963..204dd3d 100644
--- a/hw/i2c/versatile_i2c.c
+++ b/hw/i2c/versatile_i2c.c
@@ -79,7 +79,7 @@ static int versatile_i2c_init(SysBusDevice *dev)
bus = i2c_init_bus(&dev->qdev, "i2c");
s->bitbang = bitbang_i2c_init(bus);
- memory_region_init_io(&s->iomem, NULL, &versatile_i2c_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &versatile_i2c_ops, s,
"versatile_i2c", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
diff --git a/hw/i386/kvm/pci-assign.c b/hw/i386/kvm/pci-assign.c
index f1a5554..8e2c530 100644
--- a/hw/i386/kvm/pci-assign.c
+++ b/hw/i386/kvm/pci-assign.c
@@ -298,8 +298,8 @@ static void assigned_dev_iomem_setup(PCIDevice *pci_dev, int region_num,
PCIRegion *real_region = &r_dev->real_device.regions[region_num];
if (e_size > 0) {
- memory_region_init(®ion->container, NULL, "assigned-dev-container",
- e_size);
+ memory_region_init(®ion->container, OBJECT(pci_dev),
+ "assigned-dev-container", e_size);
memory_region_add_subregion(®ion->container, 0, ®ion->real_iomem);
/* deal with MSI-X MMIO page */
@@ -329,9 +329,10 @@ static void assigned_dev_ioport_setup(PCIDevice *pci_dev, int region_num,
AssignedDevRegion *region = &r_dev->v_addrs[region_num];
region->e_size = size;
- memory_region_init(®ion->container, NULL, "assigned-dev-container", size);
- memory_region_init_io(®ion->real_iomem, NULL, &assigned_dev_ioport_ops,
- r_dev->v_addrs + region_num,
+ memory_region_init(®ion->container, OBJECT(pci_dev),
+ "assigned-dev-container", size);
+ memory_region_init_io(®ion->real_iomem, OBJECT(pci_dev),
+ &assigned_dev_ioport_ops, r_dev->v_addrs + region_num,
"assigned-dev-iomem", size);
memory_region_add_subregion(®ion->container, 0, ®ion->real_iomem);
}
@@ -478,8 +479,9 @@ static int assigned_dev_register_regions(PCIRegion *io_regions,
"4K. You might experience some performance hit "
"due to that.",
i, cur_region->base_addr, cur_region->size);
- memory_region_init_io(&pci_dev->v_addrs[i].real_iomem, NULL,
- &slow_bar_ops, &pci_dev->v_addrs[i],
+ memory_region_init_io(&pci_dev->v_addrs[i].real_iomem,
+ OBJECT(pci_dev), &slow_bar_ops,
+ &pci_dev->v_addrs[i],
"assigned-dev-slow-bar",
cur_region->size);
} else {
@@ -487,9 +489,9 @@ static int assigned_dev_register_regions(PCIRegion *io_regions,
char name[32];
snprintf(name, sizeof(name), "%s.bar%d",
object_get_typename(OBJECT(pci_dev)), i);
- memory_region_init_ram_ptr(&pci_dev->v_addrs[i].real_iomem, NULL,
- name, cur_region->size,
- virtbase);
+ memory_region_init_ram_ptr(&pci_dev->v_addrs[i].real_iomem,
+ OBJECT(pci_dev), name,
+ cur_region->size, virtbase);
vmstate_register_ram(&pci_dev->v_addrs[i].real_iomem,
&pci_dev->dev.qdev);
}
@@ -1650,8 +1652,8 @@ static int assigned_dev_register_msix_mmio(AssignedDevice *dev)
assigned_dev_msix_reset(dev);
- memory_region_init_io(&dev->mmio, NULL, &assigned_dev_msix_mmio_ops, dev,
- "assigned-dev-msix", MSIX_PAGE_SIZE);
+ memory_region_init_io(&dev->mmio, OBJECT(dev), &assigned_dev_msix_mmio_ops,
+ dev, "assigned-dev-msix", MSIX_PAGE_SIZE);
return 0;
}
@@ -1916,7 +1918,7 @@ static void assigned_dev_load_option_rom(AssignedDevice *dev)
snprintf(name, sizeof(name), "%s.rom",
object_get_typename(OBJECT(dev)));
- memory_region_init_ram(&dev->dev.rom, NULL, name, st.st_size);
+ memory_region_init_ram(&dev->dev.rom, OBJECT(dev), name, st.st_size);
vmstate_register_ram(&dev->dev.rom, &dev->dev.qdev);
ptr = memory_region_get_ram_ptr(&dev->dev.rom);
memset(ptr, 0xff, st.st_size);
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
index 21b5912..9850a85 100644
--- a/hw/i386/kvmvapic.c
+++ b/hw/i386/kvmvapic.c
@@ -601,8 +601,8 @@ static void vapic_map_rom_writable(VAPICROMState *s)
rom_paddr &= TARGET_PAGE_MASK;
rom_size = TARGET_PAGE_ALIGN(rom_size);
- memory_region_init_alias(&s->rom, NULL, "kvmvapic-rom", section.mr, rom_paddr,
- rom_size);
+ memory_region_init_alias(&s->rom, OBJECT(s), "kvmvapic-rom", section.mr,
+ rom_paddr, rom_size);
memory_region_add_subregion_overlap(as, rom_paddr, &s->rom, 1000);
s->rom_mapped_writable = true;
memory_region_unref(section.mr);
@@ -703,7 +703,7 @@ static int vapic_init(SysBusDevice *dev)
{
VAPICROMState *s = VAPIC(dev);
- memory_region_init_io(&s->io, NULL, &vapic_ops, s, "kvmvapic", 2);
+ memory_region_init_io(&s->io, OBJECT(s), &vapic_ops, s, "kvmvapic", 2);
sysbus_add_io(dev, VAPIC_IO_PORT, &s->io);
sysbus_init_ioports(dev, VAPIC_IO_PORT, 2);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 4345187..e7ad931 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -525,7 +525,7 @@ static void port92_initfn(Object *obj)
{
Port92State *s = PORT92(obj);
- memory_region_init_io(&s->io, NULL, &port92_ops, s, "port92", 1);
+ memory_region_init_io(&s->io, OBJECT(s), &port92_ops, s, "port92", 1);
s->outport = 0;
}
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index e18e1b1..bae484a 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -1156,8 +1156,10 @@ void ahci_init(AHCIState *s, DeviceState *qdev, AddressSpace *as, int ports)
s->dev = g_malloc0(sizeof(AHCIDevice) * ports);
ahci_reg_init(s);
/* XXX BAR size should be 1k, but that breaks, so bump it to 4k for now */
- memory_region_init_io(&s->mem, NULL, &ahci_mem_ops, s, "ahci", AHCI_MEM_BAR_SIZE);
- memory_region_init_io(&s->idp, NULL, &ahci_idp_ops, s, "ahci-idp", 32);
+ memory_region_init_io(&s->mem, OBJECT(qdev), &ahci_mem_ops, s,
+ "ahci", AHCI_MEM_BAR_SIZE);
+ memory_region_init_io(&s->idp, OBJECT(qdev), &ahci_idp_ops, s,
+ "ahci-idp", 32);
irqs = qemu_allocate_irqs(ahci_irq_set, s, s->ports);
diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
index a695dfb..33be386 100644
--- a/hw/ide/cmd646.c
+++ b/hw/ide/cmd646.c
@@ -117,8 +117,10 @@ static void setup_cmd646_bar(PCIIDEState *d, int bus_num)
bar->bus = bus;
bar->pci_dev = d;
- memory_region_init_io(&bar->cmd, NULL, &cmd646_cmd_ops, bar, "cmd646-cmd", 4);
- memory_region_init_io(&bar->data, NULL, &cmd646_data_ops, bar, "cmd646-data", 8);
+ memory_region_init_io(&bar->cmd, OBJECT(d), &cmd646_cmd_ops, bar,
+ "cmd646-cmd", 4);
+ memory_region_init_io(&bar->data, OBJECT(d), &cmd646_data_ops, bar,
+ "cmd646-data", 8);
}
static uint64_t bmdma_read(void *opaque, hwaddr addr,
@@ -203,13 +205,14 @@ static void bmdma_setup_bar(PCIIDEState *d)
BMDMAState *bm;
int i;
- memory_region_init(&d->bmdma_bar, NULL, "cmd646-bmdma", 16);
+ memory_region_init(&d->bmdma_bar, OBJECT(d), "cmd646-bmdma", 16);
for(i = 0;i < 2; i++) {
bm = &d->bmdma[i];
- memory_region_init_io(&bm->extra_io, NULL, &cmd646_bmdma_ops, bm,
+ memory_region_init_io(&bm->extra_io, OBJECT(d), &cmd646_bmdma_ops, bm,
"cmd646-bmdma-bus", 4);
memory_region_add_subregion(&d->bmdma_bar, i * 8, &bm->extra_io);
- memory_region_init_io(&bm->addr_ioport, NULL, &bmdma_addr_ioport_ops, bm,
+ memory_region_init_io(&bm->addr_ioport, OBJECT(d),
+ &bmdma_addr_ioport_ops, bm,
"cmd646-bmdma-ioport", 4);
memory_region_add_subregion(&d->bmdma_bar, i * 8 + 4, &bm->addr_ioport);
}
diff --git a/hw/ide/macio.c b/hw/ide/macio.c
index 0c14009..4798202 100644
--- a/hw/ide/macio.c
+++ b/hw/ide/macio.c
@@ -335,7 +335,7 @@ static void macio_ide_initfn(Object *obj)
MACIOIDEState *s = MACIO_IDE(obj);
ide_bus_new(&s->bus, DEVICE(obj), 0, 2);
- memory_region_init_io(&s->mem, NULL, &pmac_ide_ops, s, "pmac-ide", 0x1000);
+ memory_region_init_io(&s->mem, obj, &pmac_ide_ops, s, "pmac-ide", 0x1000);
sysbus_init_mmio(d, &s->mem);
sysbus_init_irq(d, &s->irq);
sysbus_init_irq(d, &s->dma_irq);
diff --git a/hw/ide/mmio.c b/hw/ide/mmio.c
index 8ae57d6..d251ff9 100644
--- a/hw/ide/mmio.c
+++ b/hw/ide/mmio.c
@@ -124,9 +124,9 @@ static void mmio_ide_realizefn(DeviceState *dev, Error **errp)
ide_init2(&s->bus, s->irq);
- memory_region_init_io(&s->iomem1, NULL, &mmio_ide_ops, s,
+ memory_region_init_io(&s->iomem1, OBJECT(s), &mmio_ide_ops, s,
"ide-mmio.1", 16 << s->shift);
- memory_region_init_io(&s->iomem2, NULL, &mmio_ide_cs_ops, s,
+ memory_region_init_io(&s->iomem2, OBJECT(s), &mmio_ide_cs_ops, s,
"ide-mmio.2", 2 << s->shift);
sysbus_init_mmio(d, &s->iomem1);
sysbus_init_mmio(d, &s->iomem2);
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index af445db..58532fe 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -90,15 +90,15 @@ static void bmdma_setup_bar(PCIIDEState *d)
{
int i;
- memory_region_init(&d->bmdma_bar, NULL, "piix-bmdma-container", 16);
+ memory_region_init(&d->bmdma_bar, OBJECT(d), "piix-bmdma-container", 16);
for(i = 0;i < 2; i++) {
BMDMAState *bm = &d->bmdma[i];
- memory_region_init_io(&bm->extra_io, NULL, &piix_bmdma_ops, bm,
+ memory_region_init_io(&bm->extra_io, OBJECT(d), &piix_bmdma_ops, bm,
"piix-bmdma", 4);
memory_region_add_subregion(&d->bmdma_bar, i * 8, &bm->extra_io);
- memory_region_init_io(&bm->addr_ioport, NULL, &bmdma_addr_ioport_ops, bm,
- "bmdma", 4);
+ memory_region_init_io(&bm->addr_ioport, OBJECT(d),
+ &bmdma_addr_ioport_ops, bm, "bmdma", 4);
memory_region_add_subregion(&d->bmdma_bar, i * 8 + 4, &bm->addr_ioport);
}
}
diff --git a/hw/ide/via.c b/hw/ide/via.c
index 1691717..5a83191 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -92,15 +92,15 @@ static void bmdma_setup_bar(PCIIDEState *d)
{
int i;
- memory_region_init(&d->bmdma_bar, NULL, "via-bmdma-container", 16);
+ memory_region_init(&d->bmdma_bar, OBJECT(d), "via-bmdma-container", 16);
for(i = 0;i < 2; i++) {
BMDMAState *bm = &d->bmdma[i];
- memory_region_init_io(&bm->extra_io, NULL, &via_bmdma_ops, bm,
+ memory_region_init_io(&bm->extra_io, OBJECT(d), &via_bmdma_ops, bm,
"via-bmdma", 4);
memory_region_add_subregion(&d->bmdma_bar, i * 8, &bm->extra_io);
- memory_region_init_io(&bm->addr_ioport, NULL, &bmdma_addr_ioport_ops, bm,
- "bmdma", 4);
+ memory_region_init_io(&bm->addr_ioport, OBJECT(d),
+ &bmdma_addr_ioport_ops, bm, "bmdma", 4);
memory_region_add_subregion(&d->bmdma_bar, i * 8 + 4, &bm->addr_ioport);
}
}
diff --git a/hw/input/milkymist-softusb.c b/hw/input/milkymist-softusb.c
index 69e6485..942cb79 100644
--- a/hw/input/milkymist-softusb.c
+++ b/hw/input/milkymist-softusb.c
@@ -265,17 +265,17 @@ static int milkymist_softusb_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->regs_region, NULL, &softusb_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, OBJECT(s), &softusb_mmio_ops, s,
"milkymist-softusb", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
/* register pmem and dmem */
- memory_region_init_ram(&s->pmem, NULL, "milkymist-softusb.pmem",
+ memory_region_init_ram(&s->pmem, OBJECT(s), "milkymist-softusb.pmem",
s->pmem_size);
vmstate_register_ram_global(&s->pmem);
s->pmem_ptr = memory_region_get_ram_ptr(&s->pmem);
sysbus_init_mmio(dev, &s->pmem);
- memory_region_init_ram(&s->dmem, NULL, "milkymist-softusb.dmem",
+ memory_region_init_ram(&s->dmem, OBJECT(s), "milkymist-softusb.dmem",
s->dmem_size);
vmstate_register_ram_global(&s->dmem);
s->dmem_ptr = memory_region_get_ram_ptr(&s->dmem);
diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c
index 8d1d6a7..ce86237 100644
--- a/hw/input/pckbd.c
+++ b/hw/input/pckbd.c
@@ -494,8 +494,10 @@ static void i8042_initfn(Object *obj)
ISAKBDState *isa_s = I8042(obj);
KBDState *s = &isa_s->kbd;
- memory_region_init_io(isa_s->io + 0, NULL, &i8042_data_ops, s, "i8042-data", 1);
- memory_region_init_io(isa_s->io + 1, NULL, &i8042_cmd_ops, s, "i8042-cmd", 1);
+ memory_region_init_io(isa_s->io + 0, obj, &i8042_data_ops, s,
+ "i8042-data", 1);
+ memory_region_init_io(isa_s->io + 1, obj, &i8042_cmd_ops, s,
+ "i8042-cmd", 1);
}
static void i8042_realizefn(DeviceState *dev, Error **errp)
diff --git a/hw/input/pl050.c b/hw/input/pl050.c
index 871ffba..2312ffc 100644
--- a/hw/input/pl050.c
+++ b/hw/input/pl050.c
@@ -137,7 +137,7 @@ static int pl050_init(SysBusDevice *dev, int is_mouse)
{
pl050_state *s = FROM_SYSBUS(pl050_state, dev);
- memory_region_init_io(&s->iomem, NULL, &pl050_ops, s, "pl050", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pl050_ops, s, "pl050", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->is_mouse = is_mouse;
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index d15c8be..5e3b96e 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -873,7 +873,7 @@ static const MemoryRegionOps apic_io_ops = {
static void apic_init(APICCommonState *s)
{
- memory_region_init_io(&s->io_memory, NULL, &apic_io_ops, s, "apic-msi",
+ memory_region_init_io(&s->io_memory, OBJECT(s), &apic_io_ops, s, "apic-msi",
APIC_SPACE_SIZE);
s->timer = qemu_new_timer_ns(vm_clock, apic_timer, s);
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index a5ff762..b59df06 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -656,7 +656,8 @@ void gic_init_irqs_and_distributor(GICState *s, int num_irq)
for (i = 0; i < NUM_CPU(s); i++) {
sysbus_init_irq(&s->busdev, &s->parent_irq[i]);
}
- memory_region_init_io(&s->iomem, NULL, &gic_dist_ops, s, "gic_dist", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &gic_dist_ops, s,
+ "gic_dist", 0x1000);
}
static void arm_gic_realize(DeviceState *dev, Error **errp)
@@ -682,12 +683,12 @@ static void arm_gic_realize(DeviceState *dev, Error **errp)
* GIC v2 defines a larger memory region (0x1000) so this will need
* to be extended when we implement A15.
*/
- memory_region_init_io(&s->cpuiomem[0], NULL, &gic_thiscpu_ops, s,
+ memory_region_init_io(&s->cpuiomem[0], OBJECT(s), &gic_thiscpu_ops, s,
"gic_cpu", 0x100);
for (i = 0; i < NUM_CPU(s); i++) {
s->backref[i] = s;
- memory_region_init_io(&s->cpuiomem[i+1], NULL, &gic_cpu_ops, &s->backref[i],
- "gic_cpu", 0x100);
+ memory_region_init_io(&s->cpuiomem[i+1], OBJECT(s), &gic_cpu_ops,
+ &s->backref[i], "gic_cpu", 0x100);
}
/* Distributor */
sysbus_init_mmio(sbd, &s->iomem);
diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c
index 687d1e2..f713975 100644
--- a/hw/intc/arm_gic_kvm.c
+++ b/hw/intc/arm_gic_kvm.c
@@ -120,7 +120,8 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp)
sysbus_init_irq(sbd, &s->parent_irq[i]);
}
/* Distributor */
- memory_region_init_reservation(&s->iomem, NULL, "kvm-gic_dist", 0x1000);
+ memory_region_init_reservation(&s->iomem, OBJECT(s),
+ "kvm-gic_dist", 0x1000);
sysbus_init_mmio(sbd, &s->iomem);
kvm_arm_register_device(&s->iomem,
(KVM_ARM_DEVICE_VGIC_V2 << KVM_ARM_DEVICE_ID_SHIFT)
@@ -129,7 +130,8 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp)
* provide the "interface for core #N" memory regions, because
* cores with a VGIC don't have those.
*/
- memory_region_init_reservation(&s->cpuiomem[0], NULL, "kvm-gic_cpu", 0x1000);
+ memory_region_init_reservation(&s->cpuiomem[0], OBJECT(s),
+ "kvm-gic_cpu", 0x1000);
sysbus_init_mmio(sbd, &s->cpuiomem[0]);
kvm_arm_register_device(&s->cpuiomem[0],
(KVM_ARM_DEVICE_VGIC_V2 << KVM_ARM_DEVICE_ID_SHIFT)
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 74baa72..2a57f77 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -487,17 +487,18 @@ static void armv7m_nvic_realize(DeviceState *dev, Error **errp)
* We use overlaying to put the GIC like registers
* over the top of the system control register region.
*/
- memory_region_init(&s->container, NULL, "nvic", 0x1000);
+ memory_region_init(&s->container, OBJECT(s), "nvic", 0x1000);
/* The system register region goes at the bottom of the priority
* stack as it covers the whole page.
*/
- memory_region_init_io(&s->sysregmem, NULL, &nvic_sysreg_ops, s,
+ memory_region_init_io(&s->sysregmem, OBJECT(s), &nvic_sysreg_ops, s,
"nvic_sysregs", 0x1000);
memory_region_add_subregion(&s->container, 0, &s->sysregmem);
/* Alias the GIC region so we can get only the section of it
* we need, and layer it on top of the system register region.
*/
- memory_region_init_alias(&s->gic_iomem_alias, NULL, "nvic-gic", &s->gic.iomem,
+ memory_region_init_alias(&s->gic_iomem_alias, OBJECT(s),
+ "nvic-gic", &s->gic.iomem,
0x100, 0xc00);
memory_region_add_subregion_overlap(&s->container, 0x100,
&s->gic_iomem_alias, 1);
diff --git a/hw/intc/etraxfs_pic.c b/hw/intc/etraxfs_pic.c
index 81e1ab9..ce3a3f6 100644
--- a/hw/intc/etraxfs_pic.c
+++ b/hw/intc/etraxfs_pic.c
@@ -146,7 +146,8 @@ static int etraxfs_pic_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->parent_irq);
sysbus_init_irq(dev, &s->parent_nmi);
- memory_region_init_io(&s->mmio, NULL, &pic_ops, s, "etraxfs-pic", R_MAX * 4);
+ memory_region_init_io(&s->mmio, OBJECT(s), &pic_ops, s,
+ "etraxfs-pic", R_MAX * 4);
sysbus_init_mmio(dev, &s->mmio);
return 0;
}
diff --git a/hw/intc/exynos4210_combiner.c b/hw/intc/exynos4210_combiner.c
index 644d6b3..3b40976 100644
--- a/hw/intc/exynos4210_combiner.c
+++ b/hw/intc/exynos4210_combiner.c
@@ -417,7 +417,7 @@ static int exynos4210_combiner_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->output_irq[i]);
}
- memory_region_init_io(&s->iomem, NULL, &exynos4210_combiner_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &exynos4210_combiner_ops, s,
"exynos4210-combiner", IIC_REGION_SIZE);
sysbus_init_mmio(dev, &s->iomem);
diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c
index f9c4218..6147f04 100644
--- a/hw/intc/exynos4210_gic.c
+++ b/hw/intc/exynos4210_gic.c
@@ -299,15 +299,15 @@ static int exynos4210_gic_init(SysBusDevice *dev)
qdev_init_gpio_in(&s->busdev.qdev, exynos4210_gic_set_irq,
EXYNOS4210_GIC_NIRQ - 32);
- memory_region_init(&s->cpu_container, NULL, "exynos4210-cpu-container",
+ memory_region_init(&s->cpu_container, OBJECT(s), "exynos4210-cpu-container",
EXYNOS4210_EXT_GIC_CPU_REGION_SIZE);
- memory_region_init(&s->dist_container, NULL, "exynos4210-dist-container",
+ memory_region_init(&s->dist_container, OBJECT(s), "exynos4210-dist-container",
EXYNOS4210_EXT_GIC_DIST_REGION_SIZE);
for (i = 0; i < s->num_cpu; i++) {
/* Map CPU interface per SMP Core */
sprintf(cpu_alias_name, "%s%x", cpu_prefix, i);
- memory_region_init_alias(&s->cpu_alias[i], NULL,
+ memory_region_init_alias(&s->cpu_alias[i], OBJECT(s),
cpu_alias_name,
sysbus_mmio_get_region(busdev, 1),
0,
@@ -317,7 +317,7 @@ static int exynos4210_gic_init(SysBusDevice *dev)
/* Map Distributor per SMP Core */
sprintf(dist_alias_name, "%s%x", dist_prefix, i);
- memory_region_init_alias(&s->dist_alias[i], NULL,
+ memory_region_init_alias(&s->dist_alias[i], OBJECT(s),
dist_alias_name,
sysbus_mmio_get_region(busdev, 0),
0,
diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c
index f933e6a..181f614 100644
--- a/hw/intc/grlib_irqmp.c
+++ b/hw/intc/grlib_irqmp.c
@@ -344,7 +344,7 @@ static int grlib_irqmp_init(SysBusDevice *dev)
return -1;
}
- memory_region_init_io(&irqmp->iomem, NULL, &grlib_irqmp_ops, irqmp,
+ memory_region_init_io(&irqmp->iomem, OBJECT(dev), &grlib_irqmp_ops, irqmp,
"irqmp", IRQMP_REG_SIZE);
irqmp->state = g_malloc0(sizeof *irqmp->state);
diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c
index 13250f1..1415bda 100644
--- a/hw/intc/i8259.c
+++ b/hw/intc/i8259.c
@@ -417,8 +417,10 @@ static void pic_realize(DeviceState *dev, Error **err)
PICCommonState *s = PIC_COMMON(dev);
PICClass *pc = PIC_GET_CLASS(dev);
- memory_region_init_io(&s->base_io, NULL, &pic_base_ioport_ops, s, "pic", 2);
- memory_region_init_io(&s->elcr_io, NULL, &pic_elcr_ioport_ops, s, "elcr", 1);
+ memory_region_init_io(&s->base_io, OBJECT(s), &pic_base_ioport_ops, s,
+ "pic", 2);
+ memory_region_init_io(&s->elcr_io, OBJECT(s), &pic_elcr_ioport_ops, s,
+ "elcr", 1);
qdev_init_gpio_out(dev, s->int_out, ARRAY_SIZE(s->int_out));
qdev_init_gpio_in(dev, pic_set_irq, 8);
diff --git a/hw/intc/imx_avic.c b/hw/intc/imx_avic.c
index 870d56f..75c8ffd 100644
--- a/hw/intc/imx_avic.c
+++ b/hw/intc/imx_avic.c
@@ -372,7 +372,8 @@ static int imx_avic_init(SysBusDevice *dev)
{
IMXAVICState *s = FROM_SYSBUS(IMXAVICState, dev);
- memory_region_init_io(&s->iomem, NULL, &imx_avic_ops, s, "imx_avic", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &imx_avic_ops, s,
+ "imx_avic", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_in(&dev->qdev, imx_avic_set_irq, IMX_AVIC_NUM_IRQS);
diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
index 7299b50..5d064fe 100644
--- a/hw/intc/ioapic.c
+++ b/hw/intc/ioapic.c
@@ -227,7 +227,8 @@ static const MemoryRegionOps ioapic_io_ops = {
static void ioapic_init(IOAPICCommonState *s, int instance_no)
{
- memory_region_init_io(&s->io_memory, NULL, &ioapic_io_ops, s, "ioapic", 0x1000);
+ memory_region_init_io(&s->io_memory, OBJECT(s), &ioapic_io_ops, s,
+ "ioapic", 0x1000);
qdev_init_gpio_in(&s->busdev.qdev, ioapic_set_irq, IOAPIC_NUM_PINS);
diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c
index 00cb6ca..bca8585 100644
--- a/hw/intc/omap_intc.c
+++ b/hw/intc/omap_intc.c
@@ -367,7 +367,7 @@ static int omap_intc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->parent_intr[0]);
sysbus_init_irq(dev, &s->parent_intr[1]);
qdev_init_gpio_in(&dev->qdev, omap_set_intr, s->nbanks * 32);
- memory_region_init_io(&s->mmio, NULL, &omap_inth_mem_ops, s,
+ memory_region_init_io(&s->mmio, OBJECT(s), &omap_inth_mem_ops, s,
"omap-intc", s->size);
sysbus_init_mmio(dev, &s->mmio);
return 0;
@@ -609,7 +609,7 @@ static int omap2_intc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->parent_intr[0]);
sysbus_init_irq(dev, &s->parent_intr[1]);
qdev_init_gpio_in(&dev->qdev, omap_set_intr_noedge, s->nbanks * 32);
- memory_region_init_io(&s->mmio, NULL, &omap2_inth_mem_ops, s,
+ memory_region_init_io(&s->mmio, OBJECT(s), &omap2_inth_mem_ops, s,
"omap2-intc", 0x1000);
sysbus_init_mmio(dev, &s->mmio);
return 0;
diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c
index b9e025f..937e292 100644
--- a/hw/intc/openpic.c
+++ b/hw/intc/openpic.c
@@ -1516,8 +1516,8 @@ static void map_list(OpenPICState *opp, const MemReg *list, int *count)
while (list->name) {
assert(*count < ARRAY_SIZE(opp->sub_io_mem));
- memory_region_init_io(&opp->sub_io_mem[*count], NULL, list->ops, opp,
- list->name, list->size);
+ memory_region_init_io(&opp->sub_io_mem[*count], OBJECT(opp), list->ops,
+ opp, list->name, list->size);
memory_region_add_subregion(&opp->mem, list->start_addr,
&opp->sub_io_mem[*count]);
@@ -1531,7 +1531,7 @@ static void openpic_init(Object *obj)
{
OpenPICState *opp = OPENPIC(obj);
- memory_region_init(&opp->mem, NULL, "openpic", 0x40000);
+ memory_region_init(&opp->mem, obj, "openpic", 0x40000);
}
static void openpic_realize(DeviceState *dev, Error **errp)
diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c
index dc08031..c7f7b84 100644
--- a/hw/intc/openpic_kvm.c
+++ b/hw/intc/openpic_kvm.c
@@ -155,7 +155,7 @@ static void kvm_openpic_init(Object *obj)
{
KVMOpenPICState *opp = KVM_OPENPIC(obj);
- memory_region_init_io(&opp->mem, NULL, &kvm_openpic_mem_ops, opp,
+ memory_region_init_io(&opp->mem, OBJECT(opp), &kvm_openpic_mem_ops, opp,
"kvm-openpic", 0x40000);
}
diff --git a/hw/intc/pl190.c b/hw/intc/pl190.c
index 5f0f9b7..fdb29d7 100644
--- a/hw/intc/pl190.c
+++ b/hw/intc/pl190.c
@@ -236,7 +236,7 @@ static int pl190_init(SysBusDevice *dev)
{
pl190_state *s = FROM_SYSBUS(pl190_state, dev);
- memory_region_init_io(&s->iomem, NULL, &pl190_ops, s, "pl190", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pl190_ops, s, "pl190", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_in(&dev->qdev, pl190_set_irq, 32);
sysbus_init_irq(dev, &s->irq);
diff --git a/hw/intc/puv3_intc.c b/hw/intc/puv3_intc.c
index b327f0e..44b6651 100644
--- a/hw/intc/puv3_intc.c
+++ b/hw/intc/puv3_intc.c
@@ -106,7 +106,7 @@ static int puv3_intc_init(SysBusDevice *dev)
s->reg_ICMR = 0;
s->reg_ICPR = 0;
- memory_region_init_io(&s->iomem, NULL, &puv3_intc_ops, s, "puv3_intc",
+ memory_region_init_io(&s->iomem, OBJECT(s), &puv3_intc_ops, s, "puv3_intc",
PUV3_REGS_OFFSET);
sysbus_init_mmio(dev, &s->iomem);
diff --git a/hw/intc/realview_gic.c b/hw/intc/realview_gic.c
index 1731a70..e122c2c 100644
--- a/hw/intc/realview_gic.c
+++ b/hw/intc/realview_gic.c
@@ -43,7 +43,8 @@ static int realview_gic_init(SysBusDevice *dev)
/* Pass through inbound GPIO lines to the GIC */
qdev_init_gpio_in(&s->busdev.qdev, realview_gic_set_irq, numirq - 32);
- memory_region_init(&s->container, NULL, "realview-gic-container", 0x2000);
+ memory_region_init(&s->container, OBJECT(s),
+ "realview-gic-container", 0x2000);
memory_region_add_subregion(&s->container, 0,
sysbus_mmio_get_region(busdev, 1));
memory_region_add_subregion(&s->container, 0x1000,
diff --git a/hw/intc/slavio_intctl.c b/hw/intc/slavio_intctl.c
index 716e36d..b47d0f0 100644
--- a/hw/intc/slavio_intctl.c
+++ b/hw/intc/slavio_intctl.c
@@ -426,7 +426,7 @@ static int slavio_intctl_init1(SysBusDevice *dev)
char slave_name[45];
qdev_init_gpio_in(&dev->qdev, slavio_set_irq_all, 32 + MAX_CPUS);
- memory_region_init_io(&s->iomem, NULL, &slavio_intctlm_mem_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &slavio_intctlm_mem_ops, s,
"master-interrupt-controller", INTCTLM_SIZE);
sysbus_init_mmio(dev, &s->iomem);
@@ -436,7 +436,8 @@ static int slavio_intctl_init1(SysBusDevice *dev)
for (j = 0; j < MAX_PILS; j++) {
sysbus_init_irq(dev, &s->cpu_irqs[i][j]);
}
- memory_region_init_io(&s->slaves[i].iomem, NULL, &slavio_intctl_mem_ops,
+ memory_region_init_io(&s->slaves[i].iomem, OBJECT(s),
+ &slavio_intctl_mem_ops,
&s->slaves[i], slave_name, INTCTL_SIZE);
sysbus_init_mmio(dev, &s->slaves[i].iomem);
s->slaves[i].cpu = i;
diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c
index 9ba35f6..25d2057 100644
--- a/hw/intc/xilinx_intc.c
+++ b/hw/intc/xilinx_intc.c
@@ -160,7 +160,8 @@ static int xilinx_intc_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, irq_handler, 32);
sysbus_init_irq(dev, &p->parent_irq);
- memory_region_init_io(&p->mmio, NULL, &pic_ops, p, "xlnx.xps-intc", R_MAX * 4);
+ memory_region_init_io(&p->mmio, OBJECT(p), &pic_ops, p, "xlnx.xps-intc",
+ R_MAX * 4);
sysbus_init_mmio(dev, &p->mmio);
return 0;
}
diff --git a/hw/isa/apm.c b/hw/isa/apm.c
index daed6f1..f97e7a0 100644
--- a/hw/isa/apm.c
+++ b/hw/isa/apm.c
@@ -96,7 +96,7 @@ void apm_init(PCIDevice *dev, APMState *apm, apm_ctrl_changed_t callback,
apm->arg = arg;
/* ioport 0xb2, 0xb3 */
- memory_region_init_io(&apm->io, NULL, &apm_ops, apm, "apm-io", 2);
+ memory_region_init_io(&apm->io, OBJECT(dev), &apm_ops, apm, "apm-io", 2);
memory_region_add_subregion(pci_address_space_io(dev), APM_CNT_IOPORT,
&apm->io);
}
diff --git a/hw/isa/i82378.c b/hw/isa/i82378.c
index 90f36d5..b25ed04 100644
--- a/hw/isa/i82378.c
+++ b/hw/isa/i82378.c
@@ -221,10 +221,12 @@ static int pci_i82378_init(PCIDevice *dev)
pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin 0 */
- memory_region_init_io(&s->io, NULL, &i82378_io_ops, s, "i82378-io", 0x00010000);
+ memory_region_init_io(&s->io, OBJECT(pci), &i82378_io_ops, s,
+ "i82378-io", 0x00010000);
pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->io);
- memory_region_init_io(&s->mem, NULL, &i82378_mem_ops, s, "i82378-mem", 0x01000000);
+ memory_region_init_io(&s->mem, OBJECT(pci), &i82378_mem_ops, s,
+ "i82378-mem", 0x01000000);
pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
/* Make I/O address read only */
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index f704c42..b49be4d 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -535,7 +535,7 @@ static int ich9_lpc_initfn(PCIDevice *d)
pci_set_long(d->wmask + ICH9_LPC_PMBASE,
ICH9_LPC_PMBASE_BASE_ADDRESS_MASK);
- memory_region_init_io(&lpc->rbca_mem, NULL, &rbca_mmio_ops, lpc,
+ memory_region_init_io(&lpc->rbca_mem, OBJECT(d), &rbca_mmio_ops, lpc,
"lpc-rbca-mmio", ICH9_CC_SIZE);
lpc->isa_bus = isa_bus;
@@ -546,7 +546,7 @@ static int ich9_lpc_initfn(PCIDevice *d)
lpc->machine_ready.notify = ich9_lpc_machine_ready;
qemu_add_machine_init_done_notifier(&lpc->machine_ready);
- memory_region_init_io(&lpc->rst_cnt_mem, NULL, &ich9_rst_cnt_ops, lpc,
+ memory_region_init_io(&lpc->rst_cnt_mem, OBJECT(d), &ich9_rst_cnt_ops, lpc,
"lpc-reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(d),
ICH9_RST_CNT_IOPORT, &lpc->rst_cnt_mem,
diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c
index 7b3e7fb..46a23fb 100644
--- a/hw/isa/pc87312.c
+++ b/hw/isa/pc87312.c
@@ -352,7 +352,7 @@ static void pc87312_initfn(Object *obj)
{
PC87312State *s = PC87312(obj);
- memory_region_init_io(&s->io, NULL, &pc87312_io_ops, s, "pc87312", 2);
+ memory_region_init_io(&s->io, obj, &pc87312_io_ops, s, "pc87312", 2);
}
static const VMStateDescription vmstate_pc87312 = {
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index 19c887d..2174eaa 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -356,7 +356,7 @@ static int vt82c686b_pm_initfn(PCIDevice *dev)
apm_init(dev, &s->apm, NULL, s);
- memory_region_init(&s->io, NULL, "vt82c686-pm", 64);
+ memory_region_init(&s->io, OBJECT(dev), "vt82c686-pm", 64);
memory_region_set_enabled(&s->io, false);
memory_region_add_subregion(get_system_io(), 0, &s->io);
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 48/66] hw/m*: pass owner to memory_region_init* functions
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (45 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 47/66] hw/i*: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 49/66] hw/n*: " Paolo Bonzini
` (18 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/mips/gt64xxx_pci.c | 2 +-
hw/misc/a9scu.c | 3 ++-
hw/misc/applesmc.c | 4 ++--
hw/misc/arm_l2x0.c | 3 ++-
hw/misc/arm_sysctl.c | 3 ++-
hw/misc/debugexit.c | 2 +-
hw/misc/eccmemctl.c | 4 ++--
hw/misc/exynos4210_pmu.c | 4 ++--
hw/misc/imx_ccm.c | 3 ++-
hw/misc/ivshmem.c | 8 ++++----
hw/misc/lm32_sys.c | 3 ++-
hw/misc/milkymist-hpdmc.c | 2 +-
hw/misc/milkymist-pfpu.c | 2 +-
hw/misc/mst_fpga.c | 2 +-
hw/misc/pc-testdev.c | 8 ++++----
hw/misc/pci-testdev.c | 4 ++--
hw/misc/puv3_pm.c | 2 +-
hw/misc/pvpanic.c | 2 +-
hw/misc/slavio_misc.c | 16 ++++++++--------
hw/misc/vfio.c | 30 +++++++++++++++---------------
hw/misc/vmport.c | 2 +-
hw/misc/zynq_slcr.c | 2 +-
22 files changed, 58 insertions(+), 53 deletions(-)
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c
index d2739eb..5843417 100644
--- a/hw/mips/gt64xxx_pci.c
+++ b/hw/mips/gt64xxx_pci.c
@@ -1108,7 +1108,7 @@ PCIBus *gt64120_register(qemu_irq *pic)
get_system_memory(),
get_system_io(),
PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS);
- memory_region_init_io(&d->ISD_mem, NULL, &isd_mem_ops, d, "isd-mem", 0x1000);
+ memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, "isd-mem", 0x1000);
pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci");
return phb->bus;
diff --git a/hw/misc/a9scu.c b/hw/misc/a9scu.c
index c8f26f9..601b573 100644
--- a/hw/misc/a9scu.c
+++ b/hw/misc/a9scu.c
@@ -119,7 +119,8 @@ static void a9_scu_realize(DeviceState *dev, Error ** errp)
A9SCUState *s = A9_SCU(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
- memory_region_init_io(&s->iomem, NULL, &a9_scu_ops, s, "a9-scu", 0x100);
+ memory_region_init_io(&s->iomem, OBJECT(dev), &a9_scu_ops, s,
+ "a9-scu", 0x100);
sysbus_init_mmio(sbd, &s->iomem);
}
diff --git a/hw/misc/applesmc.c b/hw/misc/applesmc.c
index ca4077f..bfafa51 100644
--- a/hw/misc/applesmc.c
+++ b/hw/misc/applesmc.c
@@ -230,12 +230,12 @@ static void applesmc_isa_realize(DeviceState *dev, Error **errp)
{
AppleSMCState *s = APPLE_SMC(dev);
- memory_region_init_io(&s->io_data, NULL, &applesmc_data_io_ops, s,
+ memory_region_init_io(&s->io_data, OBJECT(s), &applesmc_data_io_ops, s,
"applesmc-data", 4);
isa_register_ioport(&s->parent_obj, &s->io_data,
s->iobase + APPLESMC_DATA_PORT);
- memory_region_init_io(&s->io_cmd, NULL, &applesmc_cmd_io_ops, s,
+ memory_region_init_io(&s->io_cmd, OBJECT(s), &applesmc_cmd_io_ops, s,
"applesmc-cmd", 4);
isa_register_ioport(&s->parent_obj, &s->io_cmd,
s->iobase + APPLESMC_CMD_PORT);
diff --git a/hw/misc/arm_l2x0.c b/hw/misc/arm_l2x0.c
index 954343f..3d6acee 100644
--- a/hw/misc/arm_l2x0.c
+++ b/hw/misc/arm_l2x0.c
@@ -157,7 +157,8 @@ static int l2x0_priv_init(SysBusDevice *dev)
{
l2x0_state *s = FROM_SYSBUS(l2x0_state, dev);
- memory_region_init_io(&s->iomem, NULL, &l2x0_mem_ops, s, "l2x0_cc", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(dev), &l2x0_mem_ops, s,
+ "l2x0_cc", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
diff --git a/hw/misc/arm_sysctl.c b/hw/misc/arm_sysctl.c
index 9b07355..5906ae5 100644
--- a/hw/misc/arm_sysctl.c
+++ b/hw/misc/arm_sysctl.c
@@ -589,7 +589,8 @@ static void arm_sysctl_init(Object *obj)
SysBusDevice *sd = SYS_BUS_DEVICE(obj);
arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, sd);
- memory_region_init_io(&s->iomem, NULL, &arm_sysctl_ops, s, "arm-sysctl", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(dev), &arm_sysctl_ops, s,
+ "arm-sysctl", 0x1000);
sysbus_init_mmio(sd, &s->iomem);
qdev_init_gpio_in(dev, arm_sysctl_gpio_set, 2);
qdev_init_gpio_out(dev, &s->pl110_mux_ctrl, 1);
diff --git a/hw/misc/debugexit.c b/hw/misc/debugexit.c
index e3a13f0..d754cf1 100644
--- a/hw/misc/debugexit.c
+++ b/hw/misc/debugexit.c
@@ -40,7 +40,7 @@ static void debug_exit_realizefn(DeviceState *d, Error **errp)
ISADevice *dev = ISA_DEVICE(d);
ISADebugExitState *isa = ISA_DEBUG_EXIT_DEVICE(d);
- memory_region_init_io(&isa->io, NULL, &debug_exit_ops, isa,
+ memory_region_init_io(&isa->io, OBJECT(dev), &debug_exit_ops, isa,
TYPE_ISA_DEBUG_EXIT_DEVICE, isa->iosize);
memory_region_add_subregion(isa_address_space_io(dev),
isa->iobase, &isa->io);
diff --git a/hw/misc/eccmemctl.c b/hw/misc/eccmemctl.c
index 71d62cc..3de9675 100644
--- a/hw/misc/eccmemctl.c
+++ b/hw/misc/eccmemctl.c
@@ -296,11 +296,11 @@ static int ecc_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
s->regs[0] = s->version;
- memory_region_init_io(&s->iomem, NULL, &ecc_mem_ops, s, "ecc", ECC_SIZE);
+ memory_region_init_io(&s->iomem, OBJECT(dev), &ecc_mem_ops, s, "ecc", ECC_SIZE);
sysbus_init_mmio(dev, &s->iomem);
if (s->version == ECC_MCC) { // SS-600MP only
- memory_region_init_io(&s->iomem_diag, NULL, &ecc_diag_mem_ops, s,
+ memory_region_init_io(&s->iomem_diag, OBJECT(dev), &ecc_diag_mem_ops, s,
"ecc.diag", ECC_DIAG_SIZE);
sysbus_init_mmio(dev, &s->iomem_diag);
}
diff --git a/hw/misc/exynos4210_pmu.c b/hw/misc/exynos4210_pmu.c
index 465e72f..28395ba 100644
--- a/hw/misc/exynos4210_pmu.c
+++ b/hw/misc/exynos4210_pmu.c
@@ -458,8 +458,8 @@ static int exynos4210_pmu_init(SysBusDevice *dev)
Exynos4210PmuState *s = FROM_SYSBUS(Exynos4210PmuState, dev);
/* memory mapping */
- memory_region_init_io(&s->iomem, NULL, &exynos4210_pmu_ops, s, "exynos4210.pmu",
- EXYNOS4210_PMU_REGS_MEM_SIZE);
+ memory_region_init_io(&s->iomem, OBJECT(dev), &exynos4210_pmu_ops, s,
+ "exynos4210.pmu", EXYNOS4210_PMU_REGS_MEM_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
diff --git a/hw/misc/imx_ccm.c b/hw/misc/imx_ccm.c
index 863c219..816d5e8 100644
--- a/hw/misc/imx_ccm.c
+++ b/hw/misc/imx_ccm.c
@@ -281,7 +281,8 @@ static int imx_ccm_init(SysBusDevice *dev)
{
IMXCCMState *s = FROM_SYSBUS(typeof(*s), dev);
- memory_region_init_io(&s->iomem, NULL, &imx_ccm_ops, s, "imx_ccm", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(dev), &imx_ccm_ops, s,
+ "imx_ccm", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c
index 522740d..3594b84 100644
--- a/hw/misc/ivshmem.c
+++ b/hw/misc/ivshmem.c
@@ -339,7 +339,7 @@ static void create_shared_memory_BAR(IVShmemState *s, int fd) {
ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
- memory_region_init_ram_ptr(&s->ivshmem, NULL, "ivshmem.bar2",
+ memory_region_init_ram_ptr(&s->ivshmem, OBJECT(s), "ivshmem.bar2",
s->ivshmem_size, ptr);
vmstate_register_ram(&s->ivshmem, &s->dev.qdev);
memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
@@ -467,7 +467,7 @@ static void ivshmem_read(void *opaque, const uint8_t * buf, int flags)
/* mmap the region and map into the BAR2 */
map_ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED,
incoming_fd, 0);
- memory_region_init_ram_ptr(&s->ivshmem, NULL,
+ memory_region_init_ram_ptr(&s->ivshmem, OBJECT(s),
"ivshmem.bar2", s->ivshmem_size, map_ptr);
vmstate_register_ram(&s->ivshmem, &s->dev.qdev);
@@ -685,14 +685,14 @@ static int pci_ivshmem_init(PCIDevice *dev)
s->shm_fd = 0;
- memory_region_init_io(&s->ivshmem_mmio, NULL, &ivshmem_mmio_ops, s,
+ memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s,
"ivshmem-mmio", IVSHMEM_REG_BAR_SIZE);
/* region for registers*/
pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
&s->ivshmem_mmio);
- memory_region_init(&s->bar, NULL, "ivshmem-bar2-container", s->ivshmem_size);
+ memory_region_init(&s->bar, OBJECT(s), "ivshmem-bar2-container", s->ivshmem_size);
s->ivshmem_attr = PCI_BASE_ADDRESS_SPACE_MEMORY |
PCI_BASE_ADDRESS_MEM_PREFETCH;
if (s->ivshmem_64bit) {
diff --git a/hw/misc/lm32_sys.c b/hw/misc/lm32_sys.c
index accfbe3..060a5bf 100644
--- a/hw/misc/lm32_sys.c
+++ b/hw/misc/lm32_sys.c
@@ -117,7 +117,8 @@ static int lm32_sys_init(SysBusDevice *dev)
{
LM32SysState *s = FROM_SYSBUS(typeof(*s), dev);
- memory_region_init_io(&s->iomem, NULL, &sys_ops , s, "sys", R_MAX * 4);
+ memory_region_init_io(&s->iomem, OBJECT(dev), &sys_ops , s,
+ "sys", R_MAX * 4);
sysbus_init_mmio(dev, &s->iomem);
/* Note: This device is not created in the board initialization,
diff --git a/hw/misc/milkymist-hpdmc.c b/hw/misc/milkymist-hpdmc.c
index f4826b9..a498881 100644
--- a/hw/misc/milkymist-hpdmc.c
+++ b/hw/misc/milkymist-hpdmc.c
@@ -127,7 +127,7 @@ static int milkymist_hpdmc_init(SysBusDevice *dev)
{
MilkymistHpdmcState *s = FROM_SYSBUS(typeof(*s), dev);
- memory_region_init_io(&s->regs_region, NULL, &hpdmc_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, OBJECT(dev), &hpdmc_mmio_ops, s,
"milkymist-hpdmc", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
diff --git a/hw/misc/milkymist-pfpu.c b/hw/misc/milkymist-pfpu.c
index 0051bc9..2b64ee7 100644
--- a/hw/misc/milkymist-pfpu.c
+++ b/hw/misc/milkymist-pfpu.c
@@ -497,7 +497,7 @@ static int milkymist_pfpu_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->regs_region, NULL, &pfpu_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, OBJECT(dev), &pfpu_mmio_ops, s,
"milkymist-pfpu", MICROCODE_END * 4);
sysbus_init_mmio(dev, &s->regs_region);
diff --git a/hw/misc/mst_fpga.c b/hw/misc/mst_fpga.c
index b727dab..604be5e 100644
--- a/hw/misc/mst_fpga.c
+++ b/hw/misc/mst_fpga.c
@@ -208,7 +208,7 @@ static int mst_fpga_init(SysBusDevice *dev)
/* alloc the external 16 irqs */
qdev_init_gpio_in(&dev->qdev, mst_fpga_set_irq, MST_NUM_IRQS);
- memory_region_init_io(&s->iomem, NULL, &mst_fpga_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &mst_fpga_ops, s,
"fpga", 0x00100000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
diff --git a/hw/misc/pc-testdev.c b/hw/misc/pc-testdev.c
index 31c9878..699a16f 100644
--- a/hw/misc/pc-testdev.c
+++ b/hw/misc/pc-testdev.c
@@ -149,13 +149,13 @@ static void testdev_realizefn(DeviceState *d, Error **errp)
MemoryRegion *mem = isa_address_space(isa);
MemoryRegion *io = isa_address_space_io(isa);
- memory_region_init_io(&dev->ioport, NULL, &test_ioport_ops, dev,
+ memory_region_init_io(&dev->ioport, OBJECT(dev), &test_ioport_ops, dev,
"pc-testdev-ioport", 4);
- memory_region_init_io(&dev->flush, NULL, &test_flush_ops, dev,
+ memory_region_init_io(&dev->flush, OBJECT(dev), &test_flush_ops, dev,
"pc-testdev-flush-page", 4);
- memory_region_init_io(&dev->irq, NULL, &test_irq_ops, dev,
+ memory_region_init_io(&dev->irq, OBJECT(dev), &test_irq_ops, dev,
"pc-testdev-irq-line", 24);
- memory_region_init_io(&dev->iomem, NULL, &test_iomem_ops, dev,
+ memory_region_init_io(&dev->iomem, OBJECT(dev), &test_iomem_ops, dev,
"pc-testdev-iomem", IOMEM_LEN);
memory_region_add_subregion(io, 0xe0, &dev->ioport);
diff --git a/hw/misc/pci-testdev.c b/hw/misc/pci-testdev.c
index fb9a58c..8b0b73f 100644
--- a/hw/misc/pci-testdev.c
+++ b/hw/misc/pci-testdev.c
@@ -236,9 +236,9 @@ static int pci_testdev_init(PCIDevice *pci_dev)
pci_conf[PCI_INTERRUPT_PIN] = 0; /* no interrupt pin */
- memory_region_init_io(&d->mmio, NULL, &pci_testdev_mmio_ops, d,
+ memory_region_init_io(&d->mmio, OBJECT(d), &pci_testdev_mmio_ops, d,
"pci-testdev-mmio", IOTEST_MEMSIZE * 2);
- memory_region_init_io(&d->portio, NULL, &pci_testdev_pio_ops, d,
+ memory_region_init_io(&d->portio, OBJECT(d), &pci_testdev_pio_ops, d,
"pci-testdev-portio", IOTEST_IOSIZE * 2);
pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
pci_register_bar(&d->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->portio);
diff --git a/hw/misc/puv3_pm.c b/hw/misc/puv3_pm.c
index d4a863f..5592560 100644
--- a/hw/misc/puv3_pm.c
+++ b/hw/misc/puv3_pm.c
@@ -120,7 +120,7 @@ static int puv3_pm_init(SysBusDevice *dev)
s->reg_PCGR = 0x0;
- memory_region_init_io(&s->iomem, NULL, &puv3_pm_ops, s, "puv3_pm",
+ memory_region_init_io(&s->iomem, OBJECT(s), &puv3_pm_ops, s, "puv3_pm",
PUV3_REGS_OFFSET);
sysbus_init_mmio(dev, &s->iomem);
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 00d6e63..a3be9e0 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -90,7 +90,7 @@ static void pvpanic_isa_initfn(Object *obj)
{
PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
- memory_region_init_io(&s->io, NULL, &pvpanic_ops, s, "pvpanic", 1);
+ memory_region_init_io(&s->io, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
diff --git a/hw/misc/slavio_misc.c b/hw/misc/slavio_misc.c
index dbc6081..d274fb4 100644
--- a/hw/misc/slavio_misc.c
+++ b/hw/misc/slavio_misc.c
@@ -412,7 +412,7 @@ static int apc_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->cpu_halt);
/* Power management (APC) XXX: not a Slavio device */
- memory_region_init_io(&s->iomem, NULL, &apc_mem_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &apc_mem_ops, s,
"apc", MISC_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -427,39 +427,39 @@ static int slavio_misc_init1(SysBusDevice *dev)
/* 8 bit registers */
/* Slavio control */
- memory_region_init_io(&s->cfg_iomem, NULL, &slavio_cfg_mem_ops, s,
+ memory_region_init_io(&s->cfg_iomem, OBJECT(s), &slavio_cfg_mem_ops, s,
"configuration", MISC_SIZE);
sysbus_init_mmio(dev, &s->cfg_iomem);
/* Diagnostics */
- memory_region_init_io(&s->diag_iomem, NULL, &slavio_diag_mem_ops, s,
+ memory_region_init_io(&s->diag_iomem, OBJECT(s), &slavio_diag_mem_ops, s,
"diagnostic", MISC_SIZE);
sysbus_init_mmio(dev, &s->diag_iomem);
/* Modem control */
- memory_region_init_io(&s->mdm_iomem, NULL, &slavio_mdm_mem_ops, s,
+ memory_region_init_io(&s->mdm_iomem, OBJECT(s), &slavio_mdm_mem_ops, s,
"modem", MISC_SIZE);
sysbus_init_mmio(dev, &s->mdm_iomem);
/* 16 bit registers */
/* ss600mp diag LEDs */
- memory_region_init_io(&s->led_iomem, NULL, &slavio_led_mem_ops, s,
+ memory_region_init_io(&s->led_iomem, OBJECT(s), &slavio_led_mem_ops, s,
"leds", MISC_SIZE);
sysbus_init_mmio(dev, &s->led_iomem);
/* 32 bit registers */
/* System control */
- memory_region_init_io(&s->sysctrl_iomem, NULL, &slavio_sysctrl_mem_ops, s,
+ memory_region_init_io(&s->sysctrl_iomem, OBJECT(s), &slavio_sysctrl_mem_ops, s,
"system-control", MISC_SIZE);
sysbus_init_mmio(dev, &s->sysctrl_iomem);
/* AUX 1 (Misc System Functions) */
- memory_region_init_io(&s->aux1_iomem, NULL, &slavio_aux1_mem_ops, s,
+ memory_region_init_io(&s->aux1_iomem, OBJECT(s), &slavio_aux1_mem_ops, s,
"misc-system-functions", MISC_SIZE);
sysbus_init_mmio(dev, &s->aux1_iomem);
/* AUX 2 (Software Powerdown Control) */
- memory_region_init_io(&s->aux2_iomem, NULL, &slavio_aux2_mem_ops, s,
+ memory_region_init_io(&s->aux2_iomem, OBJECT(s), &slavio_aux2_mem_ops, s,
"software-powerdown-control", MISC_SIZE);
sysbus_init_mmio(dev, &s->aux2_iomem);
diff --git a/hw/misc/vfio.c b/hw/misc/vfio.c
index 58013eb..540c377 100644
--- a/hw/misc/vfio.c
+++ b/hw/misc/vfio.c
@@ -1154,7 +1154,7 @@ static void vfio_vga_probe_ati_3c3_quirk(VFIODevice *vdev)
quirk->vdev = vdev;
quirk->data = (physbar >> 8) & 0xff;
- memory_region_init_io(&quirk->mem, NULL, &vfio_ati_3c3_quirk, quirk,
+ memory_region_init_io(&quirk->mem, OBJECT(vdev), &vfio_ati_3c3_quirk, quirk,
"vfio-ati-3c3-quirk", 1);
memory_region_add_subregion(&vdev->vga.region[QEMU_PCI_VGA_IO_HI].mem, 3,
&quirk->mem);
@@ -1245,7 +1245,7 @@ static void vfio_probe_ati_4010_quirk(VFIODevice *vdev, int nr)
quirk = g_malloc0(sizeof(*quirk));
quirk->vdev = vdev;
- memory_region_init_io(&quirk->mem, NULL, &vfio_ati_4010_quirk, quirk,
+ memory_region_init_io(&quirk->mem, OBJECT(vdev), &vfio_ati_4010_quirk, quirk,
"vfio-ati-4010-quirk", 8);
memory_region_add_subregion_overlap(&vdev->bars[nr].mem, 0, &quirk->mem, 1);
@@ -1331,7 +1331,7 @@ static void vfio_probe_ati_f10_quirk(VFIODevice *vdev, int nr)
quirk = g_malloc0(sizeof(*quirk));
quirk->vdev = vdev;
- memory_region_init_io(&quirk->mem, NULL, &vfio_ati_f10_quirk, quirk,
+ memory_region_init_io(&quirk->mem, OBJECT(vdev), &vfio_ati_f10_quirk, quirk,
"vfio-ati-f10-quirk", 8);
memory_region_add_subregion_overlap(&vdev->bars[nr].mem, 0, &quirk->mem, 1);
@@ -1451,7 +1451,7 @@ static void vfio_vga_probe_nvidia_3d0_quirk(VFIODevice *vdev)
quirk = g_malloc0(sizeof(*quirk));
quirk->vdev = vdev;
- memory_region_init_io(&quirk->mem, NULL, &vfio_nvidia_3d0_quirk, quirk,
+ memory_region_init_io(&quirk->mem, OBJECT(vdev), &vfio_nvidia_3d0_quirk, quirk,
"vfio-nvidia-3d0-quirk", 6);
memory_region_add_subregion(&vdev->vga.region[QEMU_PCI_VGA_IO_HI].mem,
0x10, &quirk->mem);
@@ -1566,7 +1566,7 @@ static void vfio_probe_nvidia_bar5_window_quirk(VFIODevice *vdev, int nr)
quirk = g_malloc0(sizeof(*quirk));
quirk->vdev = vdev;
- memory_region_init_io(&quirk->mem, NULL, &vfio_nvidia_bar5_window_quirk, quirk,
+ memory_region_init_io(&quirk->mem, OBJECT(vdev), &vfio_nvidia_bar5_window_quirk, quirk,
"vfio-nvidia-bar5-window-quirk", 16);
memory_region_add_subregion_overlap(&vdev->bars[nr].mem, 0, &quirk->mem, 1);
@@ -1644,7 +1644,7 @@ static void vfio_probe_nvidia_bar0_88000_quirk(VFIODevice *vdev, int nr)
quirk = g_malloc0(sizeof(*quirk));
quirk->vdev = vdev;
- memory_region_init_io(&quirk->mem, NULL, &vfio_nvidia_bar0_88000_quirk, quirk,
+ memory_region_init_io(&quirk->mem, OBJECT(vdev), &vfio_nvidia_bar0_88000_quirk, quirk,
"vfio-nvidia-bar0-88000-quirk",
TARGET_PAGE_ALIGN(PCIE_CONFIG_SPACE_SIZE));
memory_region_add_subregion_overlap(&vdev->bars[nr].mem,
@@ -1723,7 +1723,7 @@ static void vfio_probe_nvidia_bar0_1800_quirk(VFIODevice *vdev, int nr)
quirk = g_malloc0(sizeof(*quirk));
quirk->vdev = vdev;
- memory_region_init_io(&quirk->mem, NULL, &vfio_nvidia_bar0_1800_quirk, quirk,
+ memory_region_init_io(&quirk->mem, OBJECT(vdev), &vfio_nvidia_bar0_1800_quirk, quirk,
"vfio-nvidia-bar0-1800-quirk",
TARGET_PAGE_ALIGN(PCI_CONFIG_SPACE_SIZE));
memory_region_add_subregion_overlap(&vdev->bars[nr].mem,
@@ -2274,7 +2274,7 @@ static void vfio_map_bar(VFIODevice *vdev, int nr)
~PCI_BASE_ADDRESS_IO_MASK : ~PCI_BASE_ADDRESS_MEM_MASK);
/* A "slow" read/write mapping underlies all BARs */
- memory_region_init_io(&bar->mem, NULL, &vfio_bar_ops, bar, name, size);
+ memory_region_init_io(&bar->mem, OBJECT(vdev), &vfio_bar_ops, bar, name, size);
pci_register_bar(&vdev->pdev, nr, type, &bar->mem);
/*
@@ -2318,18 +2318,18 @@ static void vfio_map_bars(VFIODevice *vdev)
}
if (vdev->has_vga) {
- memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_MEM].mem, NULL,
- &vfio_vga_ops,
+ memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_MEM].mem,
+ OBJECT(vdev), &vfio_vga_ops,
&vdev->vga.region[QEMU_PCI_VGA_MEM],
"vfio-vga-mmio@0xa0000",
QEMU_PCI_VGA_MEM_SIZE);
- memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_IO_LO].mem, NULL,
- &vfio_vga_ops,
+ memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_IO_LO].mem,
+ OBJECT(vdev), &vfio_vga_ops,
&vdev->vga.region[QEMU_PCI_VGA_IO_LO],
"vfio-vga-io@0x3b0",
QEMU_PCI_VGA_IO_LO_SIZE);
- memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_IO_HI].mem, NULL,
- &vfio_vga_ops,
+ memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_IO_HI].mem,
+ OBJECT(vdev), &vfio_vga_ops,
&vdev->vga.region[QEMU_PCI_VGA_IO_HI],
"vfio-vga-io@0x3c0",
QEMU_PCI_VGA_IO_HI_SIZE);
@@ -2591,7 +2591,7 @@ static int vfio_load_rom(VFIODevice *vdev)
snprintf(name, sizeof(name), "vfio[%04x:%02x:%02x.%x].rom",
vdev->host.domain, vdev->host.bus, vdev->host.slot,
vdev->host.function);
- memory_region_init_ram(&vdev->pdev.rom, NULL, name, size);
+ memory_region_init_ram(&vdev->pdev.rom, OBJECT(vdev), name, size);
ptr = memory_region_get_ram_ptr(&vdev->pdev.rom);
memset(ptr, 0xff, size);
diff --git a/hw/misc/vmport.c b/hw/misc/vmport.c
index 7f64ccd..7463776 100644
--- a/hw/misc/vmport.c
+++ b/hw/misc/vmport.c
@@ -142,7 +142,7 @@ static void vmport_realizefn(DeviceState *dev, Error **errp)
ISADevice *isadev = ISA_DEVICE(dev);
VMPortState *s = VMPORT(dev);
- memory_region_init_io(&s->io, NULL, &vmport_ops, s, "vmport", 1);
+ memory_region_init_io(&s->io, OBJECT(s), &vmport_ops, s, "vmport", 1);
isa_register_ioport(isadev, &s->io, 0x5658);
port_state = s;
diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c
index d7c2d19..fc7a85f 100644
--- a/hw/misc/zynq_slcr.c
+++ b/hw/misc/zynq_slcr.c
@@ -494,7 +494,7 @@ static int zynq_slcr_init(SysBusDevice *dev)
{
ZynqSLCRState *s = FROM_SYSBUS(ZynqSLCRState, dev);
- memory_region_init_io(&s->iomem, NULL, &slcr_ops, s, "slcr", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &slcr_ops, s, "slcr", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 49/66] hw/n*: pass owner to memory_region_init* functions
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (46 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 48/66] hw/m*: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 50/66] hw/p*: " Paolo Bonzini
` (17 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/net/cadence_gem.c | 3 ++-
hw/net/e1000.c | 6 +++---
hw/net/eepro100.c | 12 ++++++------
hw/net/etraxfs_eth.c | 3 ++-
hw/net/lan9118.c | 3 ++-
hw/net/lance.c | 3 ++-
hw/net/milkymist-minimac2.c | 4 ++--
hw/net/mipsnet.c | 3 ++-
hw/net/opencores_eth.c | 4 ++--
hw/net/pcnet-pci.c | 6 +++---
hw/net/rtl8139.c | 6 ++++--
hw/net/smc91c111.c | 2 +-
hw/net/stellaris_enet.c | 4 ++--
hw/net/vmxnet3.c | 6 +++---
hw/net/xgmac.c | 3 ++-
hw/net/xilinx_axienet.c | 2 +-
hw/net/xilinx_ethlite.c | 4 ++--
hw/nvram/ds1225y.c | 3 ++-
hw/nvram/fw_cfg.c | 6 +++---
hw/nvram/mac_nvram.c | 4 ++--
20 files changed, 48 insertions(+), 39 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index c94d3e7..ac929cb 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -1163,7 +1163,8 @@ static int gem_init(SysBusDevice *dev)
s = FROM_SYSBUS(GemState, dev);
gem_init_register_masks(s);
- memory_region_init_io(&s->iomem, NULL, &gem_ops, s, "enet", sizeof(s->regs));
+ memory_region_init_io(&s->iomem, OBJECT(s), &gem_ops, s,
+ "enet", sizeof(s->regs));
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
diff --git a/hw/net/e1000.c b/hw/net/e1000.c
index e5c0978..c8c3a06 100644
--- a/hw/net/e1000.c
+++ b/hw/net/e1000.c
@@ -1276,13 +1276,13 @@ e1000_mmio_setup(E1000State *d)
E1000_IMC, E1000_TCTL, E1000_TDT, PNPMMIO_SIZE
};
- memory_region_init_io(&d->mmio, NULL, &e1000_mmio_ops, d, "e1000-mmio",
- PNPMMIO_SIZE);
+ memory_region_init_io(&d->mmio, OBJECT(d), &e1000_mmio_ops, d,
+ "e1000-mmio", PNPMMIO_SIZE);
memory_region_add_coalescing(&d->mmio, 0, excluded_regs[0]);
for (i = 0; excluded_regs[i] != PNPMMIO_SIZE; i++)
memory_region_add_coalescing(&d->mmio, excluded_regs[i] + 4,
excluded_regs[i+1] - excluded_regs[i] - 4);
- memory_region_init_io(&d->io, NULL, &e1000_io_ops, d, "e1000-io", IOPORT_SIZE);
+ memory_region_init_io(&d->io, OBJECT(d), &e1000_io_ops, d, "e1000-io", IOPORT_SIZE);
}
static void
diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c
index abfcdbd..e0befb2 100644
--- a/hw/net/eepro100.c
+++ b/hw/net/eepro100.c
@@ -1876,15 +1876,15 @@ static int e100_nic_init(PCIDevice *pci_dev)
s->eeprom = eeprom93xx_new(&pci_dev->qdev, EEPROM_SIZE);
/* Handler for memory-mapped I/O */
- memory_region_init_io(&s->mmio_bar, NULL, &eepro100_ops, s, "eepro100-mmio",
- PCI_MEM_SIZE);
+ memory_region_init_io(&s->mmio_bar, OBJECT(s), &eepro100_ops, s,
+ "eepro100-mmio", PCI_MEM_SIZE);
pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->mmio_bar);
- memory_region_init_io(&s->io_bar, NULL, &eepro100_ops, s, "eepro100-io",
- PCI_IO_SIZE);
+ memory_region_init_io(&s->io_bar, OBJECT(s), &eepro100_ops, s,
+ "eepro100-io", PCI_IO_SIZE);
pci_register_bar(&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar);
/* FIXME: flash aliases to mmio?! */
- memory_region_init_io(&s->flash_bar, NULL, &eepro100_ops, s, "eepro100-flash",
- PCI_FLASH_SIZE);
+ memory_region_init_io(&s->flash_bar, OBJECT(s), &eepro100_ops, s,
+ "eepro100-flash", PCI_FLASH_SIZE);
pci_register_bar(&s->dev, 2, 0, &s->flash_bar);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
diff --git a/hw/net/etraxfs_eth.c b/hw/net/etraxfs_eth.c
index 2ade0c0..ab9a215 100644
--- a/hw/net/etraxfs_eth.c
+++ b/hw/net/etraxfs_eth.c
@@ -610,7 +610,8 @@ static int fs_eth_init(SysBusDevice *dev)
s->dma_in->client.opaque = s;
s->dma_in->client.pull = NULL;
- memory_region_init_io(&s->mmio, NULL, ð_ops, s, "etraxfs-eth", 0x5c);
+ memory_region_init_io(&s->mmio, OBJECT(dev), ð_ops, s,
+ "etraxfs-eth", 0x5c);
sysbus_init_mmio(dev, &s->mmio);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c
index ce68399..3323f48 100644
--- a/hw/net/lan9118.c
+++ b/hw/net/lan9118.c
@@ -1328,7 +1328,8 @@ static int lan9118_init1(SysBusDevice *dev)
const MemoryRegionOps *mem_ops =
s->mode_16bit ? &lan9118_16bit_mem_ops : &lan9118_mem_ops;
- memory_region_init_io(&s->mmio, NULL, mem_ops, s, "lan9118-mmio", 0x100);
+ memory_region_init_io(&s->mmio, OBJECT(dev), mem_ops, s,
+ "lan9118-mmio", 0x100);
sysbus_init_mmio(dev, &s->mmio);
sysbus_init_irq(dev, &s->irq);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
diff --git a/hw/net/lance.c b/hw/net/lance.c
index 1d3999d..98bcdfc 100644
--- a/hw/net/lance.c
+++ b/hw/net/lance.c
@@ -117,7 +117,8 @@ static int lance_init(SysBusDevice *dev)
SysBusPCNetState *d = FROM_SYSBUS(SysBusPCNetState, dev);
PCNetState *s = &d->state;
- memory_region_init_io(&s->mmio, NULL, &lance_mem_ops, d, "lance-mmio", 4);
+ memory_region_init_io(&s->mmio, OBJECT(d), &lance_mem_ops, d,
+ "lance-mmio", 4);
qdev_init_gpio_in(&dev->qdev, parent_lance_reset, 1);
diff --git a/hw/net/milkymist-minimac2.c b/hw/net/milkymist-minimac2.c
index 73fe307..2ef4ac3 100644
--- a/hw/net/milkymist-minimac2.c
+++ b/hw/net/milkymist-minimac2.c
@@ -461,12 +461,12 @@ static int milkymist_minimac2_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->rx_irq);
sysbus_init_irq(dev, &s->tx_irq);
- memory_region_init_io(&s->regs_region, NULL, &minimac2_ops, s,
+ memory_region_init_io(&s->regs_region, OBJECT(dev), &minimac2_ops, s,
"milkymist-minimac2", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
/* register buffers memory */
- memory_region_init_ram(&s->buffers, NULL, "milkymist-minimac2.buffers",
+ memory_region_init_ram(&s->buffers, OBJECT(dev), "milkymist-minimac2.buffers",
buffers_size);
vmstate_register_ram_global(&s->buffers);
s->rx0_buf = memory_region_get_ram_ptr(&s->buffers);
diff --git a/hw/net/mipsnet.c b/hw/net/mipsnet.c
index c973a21..9080850 100644
--- a/hw/net/mipsnet.c
+++ b/hw/net/mipsnet.c
@@ -235,7 +235,8 @@ static int mipsnet_sysbus_init(SysBusDevice *dev)
{
MIPSnetState *s = DO_UPCAST(MIPSnetState, busdev, dev);
- memory_region_init_io(&s->io, NULL, &mipsnet_ioport_ops, s, "mipsnet-io", 36);
+ memory_region_init_io(&s->io, OBJECT(dev), &mipsnet_ioport_ops, s,
+ "mipsnet-io", 36);
sysbus_init_mmio(dev, &s->io);
sysbus_init_irq(dev, &s->irq);
diff --git a/hw/net/opencores_eth.c b/hw/net/opencores_eth.c
index a1baa3c..4637557 100644
--- a/hw/net/opencores_eth.c
+++ b/hw/net/opencores_eth.c
@@ -681,11 +681,11 @@ static int sysbus_open_eth_init(SysBusDevice *dev)
{
OpenEthState *s = DO_UPCAST(OpenEthState, dev, dev);
- memory_region_init_io(&s->reg_io, NULL, &open_eth_reg_ops, s,
+ memory_region_init_io(&s->reg_io, OBJECT(dev), &open_eth_reg_ops, s,
"open_eth.regs", 0x54);
sysbus_init_mmio(dev, &s->reg_io);
- memory_region_init_io(&s->desc_io, NULL, &open_eth_desc_ops, s,
+ memory_region_init_io(&s->desc_io, OBJECT(dev), &open_eth_desc_ops, s,
"open_eth.desc", 0x400);
sysbus_init_mmio(dev, &s->desc_io);
diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c
index e098bf2..f4a5aef 100644
--- a/hw/net/pcnet-pci.c
+++ b/hw/net/pcnet-pci.c
@@ -315,10 +315,10 @@ static int pci_pcnet_init(PCIDevice *pci_dev)
pci_conf[PCI_MAX_LAT] = 0xff;
/* Handler for memory-mapped I/O */
- memory_region_init_io(&d->state.mmio, NULL, &pcnet_mmio_ops, s, "pcnet-mmio",
- PCNET_PNPMMIO_SIZE);
+ memory_region_init_io(&d->state.mmio, OBJECT(d), &pcnet_mmio_ops, s,
+ "pcnet-mmio", PCNET_PNPMMIO_SIZE);
- memory_region_init_io(&d->io_bar, NULL, &pcnet_io_ops, s, "pcnet-io",
+ memory_region_init_io(&d->io_bar, OBJECT(d), &pcnet_io_ops, s, "pcnet-io",
PCNET_IOPORT_SIZE);
pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->io_bar);
diff --git a/hw/net/rtl8139.c b/hw/net/rtl8139.c
index a96eb62..a00ff58 100644
--- a/hw/net/rtl8139.c
+++ b/hw/net/rtl8139.c
@@ -3486,8 +3486,10 @@ static int pci_rtl8139_init(PCIDevice *dev)
* list bit in status register, and offset 0xdc seems unused. */
pci_conf[PCI_CAPABILITY_LIST] = 0xdc;
- memory_region_init_io(&s->bar_io, NULL, &rtl8139_io_ops, s, "rtl8139", 0x100);
- memory_region_init_io(&s->bar_mem, NULL, &rtl8139_mmio_ops, s, "rtl8139", 0x100);
+ memory_region_init_io(&s->bar_io, OBJECT(s), &rtl8139_io_ops, s,
+ "rtl8139", 0x100);
+ memory_region_init_io(&s->bar_mem, OBJECT(s), &rtl8139_mmio_ops, s,
+ "rtl8139", 0x100);
pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->bar_io);
pci_register_bar(&s->dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar_mem);
diff --git a/hw/net/smc91c111.c b/hw/net/smc91c111.c
index 6429709..c49e37a 100644
--- a/hw/net/smc91c111.c
+++ b/hw/net/smc91c111.c
@@ -747,7 +747,7 @@ static NetClientInfo net_smc91c111_info = {
static int smc91c111_init1(SysBusDevice *dev)
{
smc91c111_state *s = FROM_SYSBUS(smc91c111_state, dev);
- memory_region_init_io(&s->mmio, NULL, &smc91c111_mem_ops, s,
+ memory_region_init_io(&s->mmio, OBJECT(s), &smc91c111_mem_ops, s,
"smc91c111-mmio", 16);
sysbus_init_mmio(dev, &s->mmio);
sysbus_init_irq(dev, &s->irq);
diff --git a/hw/net/stellaris_enet.c b/hw/net/stellaris_enet.c
index b1394a2..aac7c76 100644
--- a/hw/net/stellaris_enet.c
+++ b/hw/net/stellaris_enet.c
@@ -405,8 +405,8 @@ static int stellaris_enet_init(SysBusDevice *dev)
{
stellaris_enet_state *s = FROM_SYSBUS(stellaris_enet_state, dev);
- memory_region_init_io(&s->mmio, NULL, &stellaris_enet_ops, s, "stellaris_enet",
- 0x1000);
+ memory_region_init_io(&s->mmio, OBJECT(s), &stellaris_enet_ops, s,
+ "stellaris_enet", 0x1000);
sysbus_init_mmio(dev, &s->mmio);
sysbus_init_irq(dev, &s->irq);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
index 23a6b07..b39ff08 100644
--- a/hw/net/vmxnet3.c
+++ b/hw/net/vmxnet3.c
@@ -2073,17 +2073,17 @@ static int vmxnet3_pci_init(PCIDevice *pci_dev)
VMW_CBPRN("Starting init...");
- memory_region_init_io(&s->bar0, NULL, &b0_ops, s,
+ memory_region_init_io(&s->bar0, OBJECT(s), &b0_ops, s,
"vmxnet3-b0", VMXNET3_PT_REG_SIZE);
pci_register_bar(pci_dev, VMXNET3_BAR0_IDX,
PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar0);
- memory_region_init_io(&s->bar1, NULL, &b1_ops, s,
+ memory_region_init_io(&s->bar1, OBJECT(s), &b1_ops, s,
"vmxnet3-b1", VMXNET3_VD_REG_SIZE);
pci_register_bar(pci_dev, VMXNET3_BAR1_IDX,
PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar1);
- memory_region_init(&s->msix_bar, NULL, "vmxnet3-msix-bar",
+ memory_region_init(&s->msix_bar, OBJECT(s), "vmxnet3-msix-bar",
VMXNET3_MSIX_BAR_SIZE);
pci_register_bar(pci_dev, VMXNET3_MSIX_BAR_IDX,
PCI_BASE_ADDRESS_SPACE_MEMORY, &s->msix_bar);
diff --git a/hw/net/xgmac.c b/hw/net/xgmac.c
index d334dc5..997a5b5 100644
--- a/hw/net/xgmac.c
+++ b/hw/net/xgmac.c
@@ -382,7 +382,8 @@ static int xgmac_enet_init(SysBusDevice *dev)
{
struct XgmacState *s = FROM_SYSBUS(typeof(*s), dev);
- memory_region_init_io(&s->iomem, NULL, &enet_mem_ops, s, "xgmac", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &enet_mem_ops, s,
+ "xgmac", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->sbd_irq);
sysbus_init_irq(dev, &s->pmt_irq);
diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c
index 4a4fbd6..f173429 100644
--- a/hw/net/xilinx_axienet.c
+++ b/hw/net/xilinx_axienet.c
@@ -1001,7 +1001,7 @@ static void xilinx_enet_init(Object *obj)
sysbus_init_irq(sbd, &s->irq);
- memory_region_init_io(&s->iomem, NULL, &enet_ops, s, "enet", 0x40000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &enet_ops, s, "enet", 0x40000);
sysbus_init_mmio(sbd, &s->iomem);
}
diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c
index 9d7cb8f..2afc91a 100644
--- a/hw/net/xilinx_ethlite.c
+++ b/hw/net/xilinx_ethlite.c
@@ -221,8 +221,8 @@ static int xilinx_ethlite_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
s->rxbuf = 0;
- memory_region_init_io(&s->mmio, NULL, ð_ops, s, "xlnx.xps-ethernetlite",
- R_MAX * 4);
+ memory_region_init_io(&s->mmio, OBJECT(s), ð_ops, s,
+ "xlnx.xps-ethernetlite", R_MAX * 4);
sysbus_init_mmio(dev, &s->mmio);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
diff --git a/hw/nvram/ds1225y.c b/hw/nvram/ds1225y.c
index 1697562..fa218ce 100644
--- a/hw/nvram/ds1225y.c
+++ b/hw/nvram/ds1225y.c
@@ -117,7 +117,8 @@ static int nvram_sysbus_initfn(SysBusDevice *dev)
s->contents = g_malloc0(s->chip_size);
- memory_region_init_io(&s->iomem, NULL, &nvram_ops, s, "nvram", s->chip_size);
+ memory_region_init_io(&s->iomem, OBJECT(s), &nvram_ops, s,
+ "nvram", s->chip_size);
sysbus_init_mmio(dev, &s->iomem);
/* Read current file */
diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
index a37db77..e455282 100644
--- a/hw/nvram/fw_cfg.c
+++ b/hw/nvram/fw_cfg.c
@@ -526,14 +526,14 @@ static int fw_cfg_init1(SysBusDevice *dev)
{
FWCfgState *s = FROM_SYSBUS(FWCfgState, dev);
- memory_region_init_io(&s->ctl_iomem, NULL, &fw_cfg_ctl_mem_ops, s,
+ memory_region_init_io(&s->ctl_iomem, OBJECT(s), &fw_cfg_ctl_mem_ops, s,
"fwcfg.ctl", FW_CFG_SIZE);
sysbus_init_mmio(dev, &s->ctl_iomem);
- memory_region_init_io(&s->data_iomem, NULL, &fw_cfg_data_mem_ops, s,
+ memory_region_init_io(&s->data_iomem, OBJECT(s), &fw_cfg_data_mem_ops, s,
"fwcfg.data", FW_CFG_DATA_SIZE);
sysbus_init_mmio(dev, &s->data_iomem);
/* In case ctl and data overlap: */
- memory_region_init_io(&s->comb_iomem, NULL, &fw_cfg_comb_mem_ops, s,
+ memory_region_init_io(&s->comb_iomem, OBJECT(s), &fw_cfg_comb_mem_ops, s,
"fwcfg", FW_CFG_SIZE);
if (s->ctl_iobase + 1 == s->data_iobase) {
diff --git a/hw/nvram/mac_nvram.c b/hw/nvram/mac_nvram.c
index c91ee58..2eb0081 100644
--- a/hw/nvram/mac_nvram.c
+++ b/hw/nvram/mac_nvram.c
@@ -115,8 +115,8 @@ static void macio_nvram_realizefn(DeviceState *dev, Error **errp)
s->data = g_malloc0(s->size);
- memory_region_init_io(&s->mem, NULL, &macio_nvram_ops, s, "macio-nvram",
- s->size << s->it_shift);
+ memory_region_init_io(&s->mem, OBJECT(s), &macio_nvram_ops, s,
+ "macio-nvram", s->size << s->it_shift);
sysbus_init_mmio(d, &s->mem);
}
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 50/66] hw/p*: pass owner to memory_region_init* functions
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (47 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 49/66] hw/n*: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 51/66] hw/s*: " Paolo Bonzini
` (16 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/pci-bridge/dec.c | 4 ++--
hw/pci-bridge/pci_bridge_dev.c | 2 +-
hw/pci-host/apb.c | 12 ++++++------
hw/pci-host/bonito.c | 10 +++++-----
hw/pci-host/grackle.c | 8 ++++----
hw/pci-host/piix.c | 13 +++++++------
hw/pci-host/ppce500.c | 12 ++++++------
hw/pci-host/prep.c | 8 ++++----
hw/pci-host/q35.c | 10 +++++-----
hw/pci-host/uninorth.c | 24 ++++++++++++------------
hw/pci-host/versatile.c | 16 ++++++++--------
hw/pci/msix.c | 6 +++---
hw/pci/pci.c | 5 +++--
hw/pci/pci_bridge.c | 12 ++++++------
hw/pci/pcie_host.c | 3 ++-
hw/pci/shpc.c | 4 ++--
hw/ppc/e500.c | 2 +-
hw/ppc/mpc8544_guts.c | 2 +-
hw/ppc/ppc4xx_pci.c | 8 ++++----
hw/ppc/ppce500_spin.c | 4 ++--
hw/ppc/spapr_pci.c | 12 +++++++-----
21 files changed, 91 insertions(+), 86 deletions(-)
diff --git a/hw/pci-bridge/dec.c b/hw/pci-bridge/dec.c
index 3e84473..efc07c4 100644
--- a/hw/pci-bridge/dec.c
+++ b/hw/pci-bridge/dec.c
@@ -98,9 +98,9 @@ static int pci_dec_21154_device_init(SysBusDevice *dev)
phb = PCI_HOST_BRIDGE(dev);
- memory_region_init_io(&phb->conf_mem, NULL, &pci_host_conf_le_ops,
+ memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000);
- memory_region_init_io(&phb->data_mem, NULL, &pci_host_data_le_ops,
+ memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops,
dev, "pci-data-idx", 0x1000);
sysbus_init_mmio(dev, &phb->conf_mem);
sysbus_init_mmio(dev, &phb->data_mem);
diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c
index c2660f1..5f11323 100644
--- a/hw/pci-bridge/pci_bridge_dev.c
+++ b/hw/pci-bridge/pci_bridge_dev.c
@@ -46,7 +46,7 @@ static int pci_bridge_dev_initfn(PCIDevice *dev)
if (err) {
goto bridge_error;
}
- memory_region_init(&bridge_dev->bar, NULL, "shpc-bar", shpc_bar_size(dev));
+ memory_region_init(&bridge_dev->bar, OBJECT(dev), "shpc-bar", shpc_bar_size(dev));
err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0);
if (err) {
goto shpc_error;
diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
index 7a8ce25..06ace08 100644
--- a/hw/pci-host/apb.c
+++ b/hw/pci-host/apb.c
@@ -447,7 +447,7 @@ PCIBus *pci_apb_init(hwaddr special_base,
sysbus_mmio_map(s, 2, special_base + 0x2000000ULL);
d = FROM_SYSBUS(APBState, s);
- memory_region_init(&d->pci_mmio, NULL, "pci-mmio", 0x100000000ULL);
+ memory_region_init(&d->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL);
memory_region_add_subregion(get_system_memory(), mem_base, &d->pci_mmio);
d->bus = pci_register_bus(&d->busdev.qdev, "pci",
@@ -525,18 +525,18 @@ static int pci_pbm_init_device(SysBusDevice *dev)
s->pci_irq_in = 0ULL;
/* apb_config */
- memory_region_init_io(&s->apb_config, NULL, &apb_config_ops, s, "apb-config",
- 0x10000);
+ memory_region_init_io(&s->apb_config, OBJECT(s), &apb_config_ops, s,
+ "apb-config", 0x10000);
/* at region 0 */
sysbus_init_mmio(dev, &s->apb_config);
- memory_region_init_io(&s->pci_config, NULL, &pci_config_ops, s, "apb-pci-config",
- 0x1000000);
+ memory_region_init_io(&s->pci_config, OBJECT(s), &pci_config_ops, s,
+ "apb-pci-config", 0x1000000);
/* at region 1 */
sysbus_init_mmio(dev, &s->pci_config);
/* pci_ioport */
- memory_region_init_io(&s->pci_ioport, NULL, &pci_ioport_ops, s,
+ memory_region_init_io(&s->pci_ioport, OBJECT(s), &pci_ioport_ops, s,
"apb-pci-ioport", 0x10000);
/* at region 2 */
sysbus_init_mmio(dev, &s->pci_ioport);
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index ae00775..592d666 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -722,29 +722,29 @@ static int bonito_initfn(PCIDevice *dev)
pci_config_set_prog_interface(dev->config, 0x00);
/* set the north bridge register mapping */
- memory_region_init_io(&s->iomem, NULL, &bonito_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &bonito_ops, s,
"north-bridge-register", BONITO_INTERNAL_REG_SIZE);
sysbus_init_mmio(sysbus, &s->iomem);
sysbus_mmio_map(sysbus, 0, BONITO_INTERNAL_REG_BASE);
/* set the north bridge pci configure mapping */
- memory_region_init_io(&phb->conf_mem, NULL, &bonito_pciconf_ops, s,
+ memory_region_init_io(&phb->conf_mem, OBJECT(s), &bonito_pciconf_ops, s,
"north-bridge-pci-config", BONITO_PCICONFIG_SIZE);
sysbus_init_mmio(sysbus, &phb->conf_mem);
sysbus_mmio_map(sysbus, 1, BONITO_PCICONFIG_BASE);
/* set the south bridge pci configure mapping */
- memory_region_init_io(&phb->data_mem, NULL, &bonito_spciconf_ops, s,
+ memory_region_init_io(&phb->data_mem, OBJECT(s), &bonito_spciconf_ops, s,
"south-bridge-pci-config", BONITO_SPCICONFIG_SIZE);
sysbus_init_mmio(sysbus, &phb->data_mem);
sysbus_mmio_map(sysbus, 2, BONITO_SPCICONFIG_BASE);
- memory_region_init_io(&s->iomem_ldma, NULL, &bonito_ldma_ops, s,
+ memory_region_init_io(&s->iomem_ldma, OBJECT(s), &bonito_ldma_ops, s,
"ldma", 0x100);
sysbus_init_mmio(sysbus, &s->iomem_ldma);
sysbus_mmio_map(sysbus, 3, 0xbfe00200);
- memory_region_init_io(&s->iomem_cop, NULL, &bonito_cop_ops, s,
+ memory_region_init_io(&s->iomem_cop, OBJECT(s), &bonito_cop_ops, s,
"cop", 0x100);
sysbus_init_mmio(sysbus, &s->iomem_cop);
sysbus_mmio_map(sysbus, 4, 0xbfe00300);
diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
index da0fedb..4991ec4 100644
--- a/hw/pci-host/grackle.c
+++ b/hw/pci-host/grackle.c
@@ -76,8 +76,8 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
phb = PCI_HOST_BRIDGE(dev);
d = GRACKLE_PCI_HOST_BRIDGE(dev);
- memory_region_init(&d->pci_mmio, NULL, "pci-mmio", 0x100000000ULL);
- memory_region_init_alias(&d->pci_hole, NULL, "pci-hole", &d->pci_mmio,
+ memory_region_init(&d->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL);
+ memory_region_init_alias(&d->pci_hole, OBJECT(s), "pci-hole", &d->pci_mmio,
0x80000000ULL, 0x7e000000ULL);
memory_region_add_subregion(address_space_mem, 0x80000000ULL,
&d->pci_hole);
@@ -104,9 +104,9 @@ static int pci_grackle_init_device(SysBusDevice *dev)
phb = PCI_HOST_BRIDGE(dev);
- memory_region_init_io(&phb->conf_mem, NULL, &pci_host_conf_le_ops,
+ memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000);
- memory_region_init_io(&phb->data_mem, NULL, &pci_host_data_le_ops,
+ memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops,
dev, "pci-data-idx", 0x1000);
sysbus_init_mmio(dev, &phb->conf_mem);
sysbus_init_mmio(dev, &phb->data_mem);
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index e179912..2ab1599 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -201,12 +201,12 @@ static int i440fx_pcihost_initfn(SysBusDevice *dev)
{
PCIHostState *s = PCI_HOST_BRIDGE(dev);
- memory_region_init_io(&s->conf_mem, NULL, &pci_host_conf_le_ops, s,
+ memory_region_init_io(&s->conf_mem, OBJECT(dev), &pci_host_conf_le_ops, s,
"pci-conf-idx", 4);
sysbus_add_io(dev, 0xcf8, &s->conf_mem);
sysbus_init_ioports(&s->busdev, 0xcf8, 4);
- memory_region_init_io(&s->data_mem, NULL, &pci_host_data_le_ops, s,
+ memory_region_init_io(&s->data_mem, OBJECT(dev), &pci_host_data_le_ops, s,
"pci-conf-data", 4);
sysbus_add_io(dev, 0xcfc, &s->data_mem);
sysbus_init_ioports(&s->busdev, 0xcfc, 4);
@@ -260,17 +260,17 @@ static PCIBus *i440fx_common_init(const char *device_name,
f->system_memory = address_space_mem;
f->pci_address_space = pci_address_space;
f->ram_memory = ram_memory;
- memory_region_init_alias(&f->pci_hole, NULL, "pci-hole", f->pci_address_space,
+ memory_region_init_alias(&f->pci_hole, OBJECT(d), "pci-hole", f->pci_address_space,
pci_hole_start, pci_hole_size);
memory_region_add_subregion(f->system_memory, pci_hole_start, &f->pci_hole);
- memory_region_init_alias(&f->pci_hole_64bit, NULL, "pci-hole64",
+ memory_region_init_alias(&f->pci_hole_64bit, OBJECT(d), "pci-hole64",
f->pci_address_space,
pci_hole64_start, pci_hole64_size);
if (pci_hole64_size) {
memory_region_add_subregion(f->system_memory, pci_hole64_start,
&f->pci_hole_64bit);
}
- memory_region_init_alias(&f->smram_region, NULL, "smram-region",
+ memory_region_init_alias(&f->smram_region, OBJECT(d), "smram-region",
f->pci_address_space, 0xa0000, 0x20000);
memory_region_add_subregion_overlap(f->system_memory, 0xa0000,
&f->smram_region, 1);
@@ -549,7 +549,8 @@ static int piix3_initfn(PCIDevice *dev)
isa_bus_new(DEVICE(d), pci_address_space_io(dev));
- memory_region_init_io(&d->rcr_mem, NULL, &rcr_ops, d, "piix3-reset-control", 1);
+ memory_region_init_io(&d->rcr_mem, OBJECT(dev), &rcr_ops, d,
+ "piix3-reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(dev), RCR_IOPORT,
&d->rcr_mem, 1);
diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c
index 7d8c59b..646204e 100644
--- a/hw/pci-host/ppce500.c
+++ b/hw/pci-host/ppce500.c
@@ -330,7 +330,7 @@ static int e500_pcihost_bridge_initfn(PCIDevice *d)
(d->config[PCI_HEADER_TYPE] & PCI_HEADER_TYPE_MULTI_FUNCTION) |
PCI_HEADER_TYPE_BRIDGE;
- memory_region_init_alias(&b->bar0, NULL, "e500-pci-bar0", &ccsr->ccsr_space,
+ memory_region_init_alias(&b->bar0, OBJECT(ccsr), "e500-pci-bar0", &ccsr->ccsr_space,
0, int128_get64(ccsr->ccsr_space.size));
pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &b->bar0);
@@ -352,7 +352,7 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq[i]);
}
- memory_region_init(&s->pio, NULL, "pci-pio", PCIE500_PCI_IOLEN);
+ memory_region_init(&s->pio, OBJECT(s), "pci-pio", PCIE500_PCI_IOLEN);
b = pci_register_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq,
mpc85xx_pci_map_irq, s->irq, address_space_mem,
@@ -361,12 +361,12 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
pci_create_simple(b, 0, "e500-host-bridge");
- memory_region_init(&s->container, NULL, "pci-container", PCIE500_ALL_SIZE);
- memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_be_ops, h,
+ memory_region_init(&s->container, OBJECT(h), "pci-container", PCIE500_ALL_SIZE);
+ memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_be_ops, h,
"pci-conf-idx", 4);
- memory_region_init_io(&h->data_mem, NULL, &pci_host_data_le_ops, h,
+ memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops, h,
"pci-conf-data", 4);
- memory_region_init_io(&s->iomem, NULL, &e500_pci_reg_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &e500_pci_reg_ops, s,
"pci.reg", PCIE500_REG_SIZE);
memory_region_add_subregion(&s->container, PCIE500_CFGADDR, &h->conf_mem);
memory_region_add_subregion(&s->container, PCIE500_CFGDATA, &h->data_mem);
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index 024cd51..b41d564 100644
--- a/hw/pci-host/prep.c
+++ b/hw/pci-host/prep.c
@@ -125,20 +125,20 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp)
pci_bus_irqs(&s->pci_bus, prep_set_irq, prep_map_irq, s->irq, 4);
- memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_be_ops, s,
+ memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_be_ops, s,
"pci-conf-idx", 1);
sysbus_add_io(dev, 0xcf8, &h->conf_mem);
sysbus_init_ioports(&h->busdev, 0xcf8, 1);
- memory_region_init_io(&h->data_mem, NULL, &pci_host_data_be_ops, s,
+ memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_be_ops, s,
"pci-conf-data", 1);
sysbus_add_io(dev, 0xcfc, &h->data_mem);
sysbus_init_ioports(&h->busdev, 0xcfc, 1);
- memory_region_init_io(&h->mmcfg, NULL, &PPC_PCIIO_ops, s, "pciio", 0x00400000);
+ memory_region_init_io(&h->mmcfg, OBJECT(s), &PPC_PCIIO_ops, s, "pciio", 0x00400000);
memory_region_add_subregion(address_space_mem, 0x80800000, &h->mmcfg);
- memory_region_init_io(&s->intack, NULL, &PPC_intack_ops, s, "pci-intack", 1);
+ memory_region_init_io(&s->intack, OBJECT(s), &PPC_intack_ops, s, "pci-intack", 1);
memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->intack);
/* TODO Remove once realize propagates to child devices. */
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 49ccf80..5661ace 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -40,12 +40,12 @@ static int q35_host_init(SysBusDevice *dev)
PCIHostState *pci = FROM_SYSBUS(PCIHostState, dev);
Q35PCIHost *s = Q35_HOST_DEVICE(&dev->qdev);
- memory_region_init_io(&pci->conf_mem, NULL, &pci_host_conf_le_ops, pci,
+ memory_region_init_io(&pci->conf_mem, OBJECT(pci), &pci_host_conf_le_ops, pci,
"pci-conf-idx", 4);
sysbus_add_io(dev, MCH_HOST_BRIDGE_CONFIG_ADDR, &pci->conf_mem);
sysbus_init_ioports(&pci->busdev, MCH_HOST_BRIDGE_CONFIG_ADDR, 4);
- memory_region_init_io(&pci->data_mem, NULL, &pci_host_data_le_ops, pci,
+ memory_region_init_io(&pci->data_mem, OBJECT(pci), &pci_host_data_le_ops, pci,
"pci-conf-data", 4);
sysbus_add_io(dev, MCH_HOST_BRIDGE_CONFIG_DATA, &pci->data_mem);
sysbus_init_ioports(&pci->busdev, MCH_HOST_BRIDGE_CONFIG_DATA, 4);
@@ -245,7 +245,7 @@ static int mch_init(PCIDevice *d)
MCHPCIState *mch = MCH_PCI_DEVICE(d);
/* setup pci memory regions */
- memory_region_init_alias(&mch->pci_hole, NULL, "pci-hole",
+ memory_region_init_alias(&mch->pci_hole, OBJECT(mch), "pci-hole",
mch->pci_address_space,
mch->below_4g_mem_size,
0x100000000ULL - mch->below_4g_mem_size);
@@ -253,7 +253,7 @@ static int mch_init(PCIDevice *d)
&mch->pci_hole);
pci_hole64_size = (sizeof(hwaddr) == 4 ? 0 :
((uint64_t)1 << 62));
- memory_region_init_alias(&mch->pci_hole_64bit, NULL, "pci-hole64",
+ memory_region_init_alias(&mch->pci_hole_64bit, OBJECT(mch), "pci-hole64",
mch->pci_address_space,
0x100000000ULL + mch->above_4g_mem_size,
pci_hole64_size);
@@ -264,7 +264,7 @@ static int mch_init(PCIDevice *d)
}
/* smram */
cpu_smm_register(&mch_set_smm, mch);
- memory_region_init_alias(&mch->smram_region, NULL, "smram-region",
+ memory_region_init_alias(&mch->smram_region, OBJECT(mch), "smram-region",
mch->pci_address_space, 0xa0000, 0x20000);
memory_region_add_subregion_overlap(mch->system_memory, 0xa0000,
&mch->smram_region, 1);
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index b72659d..91530cd 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -152,9 +152,9 @@ static int pci_unin_main_init_device(SysBusDevice *dev)
/* Uninorth main bus */
h = PCI_HOST_BRIDGE(dev);
- memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops,
+ memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000);
- memory_region_init_io(&h->data_mem, NULL, &unin_data_ops, dev,
+ memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev,
"pci-conf-data", 0x1000);
sysbus_init_mmio(dev, &h->conf_mem);
sysbus_init_mmio(dev, &h->data_mem);
@@ -170,9 +170,9 @@ static int pci_u3_agp_init_device(SysBusDevice *dev)
/* Uninorth U3 AGP bus */
h = PCI_HOST_BRIDGE(dev);
- memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops,
+ memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000);
- memory_region_init_io(&h->data_mem, NULL, &unin_data_ops, dev,
+ memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev,
"pci-conf-data", 0x1000);
sysbus_init_mmio(dev, &h->conf_mem);
sysbus_init_mmio(dev, &h->data_mem);
@@ -187,9 +187,9 @@ static int pci_unin_agp_init_device(SysBusDevice *dev)
/* Uninorth AGP bus */
h = PCI_HOST_BRIDGE(dev);
- memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops,
+ memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000);
- memory_region_init_io(&h->data_mem, NULL, &pci_host_data_le_ops,
+ memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
dev, "pci-conf-data", 0x1000);
sysbus_init_mmio(dev, &h->conf_mem);
sysbus_init_mmio(dev, &h->data_mem);
@@ -203,9 +203,9 @@ static int pci_unin_internal_init_device(SysBusDevice *dev)
/* Uninorth internal bus */
h = PCI_HOST_BRIDGE(dev);
- memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops,
+ memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000);
- memory_region_init_io(&h->data_mem, NULL, &pci_host_data_le_ops,
+ memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
dev, "pci-conf-data", 0x1000);
sysbus_init_mmio(dev, &h->conf_mem);
sysbus_init_mmio(dev, &h->data_mem);
@@ -228,8 +228,8 @@ PCIBus *pci_pmac_init(qemu_irq *pic,
s = SYS_BUS_DEVICE(dev);
h = PCI_HOST_BRIDGE(s);
d = UNI_NORTH_PCI_HOST_BRIDGE(dev);
- memory_region_init(&d->pci_mmio, NULL, "pci-mmio", 0x100000000ULL);
- memory_region_init_alias(&d->pci_hole, NULL, "pci-hole", &d->pci_mmio,
+ memory_region_init(&d->pci_mmio, OBJECT(d), "pci-mmio", 0x100000000ULL);
+ memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio,
0x80000000ULL, 0x70000000ULL);
memory_region_add_subregion(address_space_mem, 0x80000000ULL,
&d->pci_hole);
@@ -294,8 +294,8 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
h = PCI_HOST_BRIDGE(dev);
d = U3_AGP_HOST_BRIDGE(dev);
- memory_region_init(&d->pci_mmio, NULL, "pci-mmio", 0x100000000ULL);
- memory_region_init_alias(&d->pci_hole, NULL, "pci-hole", &d->pci_mmio,
+ memory_region_init(&d->pci_mmio, OBJECT(d), "pci-mmio", 0x100000000ULL);
+ memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio,
0x80000000ULL, 0x70000000ULL);
memory_region_add_subregion(address_space_mem, 0x80000000ULL,
&d->pci_hole);
diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
index f7df274..9238d39 100644
--- a/hw/pci-host/versatile.c
+++ b/hw/pci-host/versatile.c
@@ -381,8 +381,8 @@ static void pci_vpb_init(Object *obj)
PCIHostState *h = PCI_HOST_BRIDGE(obj);
PCIVPBState *s = PCI_VPB(obj);
- memory_region_init(&s->pci_io_space, NULL, "pci_io", 1ULL << 32);
- memory_region_init(&s->pci_mem_space, NULL, "pci_mem", 1ULL << 32);
+ memory_region_init(&s->pci_io_space, OBJECT(s), "pci_io", 1ULL << 32);
+ memory_region_init(&s->pci_mem_space, OBJECT(s), "pci_mem", 1ULL << 32);
pci_bus_new_inplace(&s->pci_bus, DEVICE(obj), "pci",
&s->pci_mem_space, &s->pci_io_space,
@@ -424,20 +424,20 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp)
* 3 : PCI IO window
* 4..6 : PCI memory windows
*/
- memory_region_init_io(&s->controlregs, NULL, &pci_vpb_reg_ops, s, "pci-vpb-regs",
- 0x1000);
+ memory_region_init_io(&s->controlregs, OBJECT(s), &pci_vpb_reg_ops, s,
+ "pci-vpb-regs", 0x1000);
sysbus_init_mmio(sbd, &s->controlregs);
- memory_region_init_io(&s->mem_config, NULL, &pci_vpb_config_ops, s,
+ memory_region_init_io(&s->mem_config, OBJECT(s), &pci_vpb_config_ops, s,
"pci-vpb-selfconfig", 0x1000000);
sysbus_init_mmio(sbd, &s->mem_config);
- memory_region_init_io(&s->mem_config2, NULL, &pci_vpb_config_ops, s,
+ memory_region_init_io(&s->mem_config2, OBJECT(s), &pci_vpb_config_ops, s,
"pci-vpb-config", 0x1000000);
sysbus_init_mmio(sbd, &s->mem_config2);
/* The window into I/O space is always into a fixed base address;
* its size is the same for both realview and versatile.
*/
- memory_region_init_alias(&s->pci_io_window, NULL, "pci-vbp-io-window",
+ memory_region_init_alias(&s->pci_io_window, OBJECT(s), "pci-vbp-io-window",
&s->pci_io_space, 0, 0x100000);
sysbus_init_mmio(sbd, &s->pci_io_space);
@@ -447,7 +447,7 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp)
* offsets are guest controllable via the IMAP registers.
*/
for (i = 0; i < 3; i++) {
- memory_region_init_alias(&s->pci_mem_window[i], NULL, "pci-vbp-window",
+ memory_region_init_alias(&s->pci_mem_window[i], OBJECT(s), "pci-vbp-window",
&s->pci_mem_space, 0, s->mem_win_size[i]);
sysbus_init_mmio(sbd, &s->pci_mem_window[i]);
}
diff --git a/hw/pci/msix.c b/hw/pci/msix.c
index 83dfc7a..3430770 100644
--- a/hw/pci/msix.c
+++ b/hw/pci/msix.c
@@ -280,10 +280,10 @@ int msix_init(struct PCIDevice *dev, unsigned short nentries,
msix_mask_all(dev, nentries);
- memory_region_init_io(&dev->msix_table_mmio, NULL, &msix_table_mmio_ops, dev,
+ memory_region_init_io(&dev->msix_table_mmio, OBJECT(dev), &msix_table_mmio_ops, dev,
"msix-table", table_size);
memory_region_add_subregion(table_bar, table_offset, &dev->msix_table_mmio);
- memory_region_init_io(&dev->msix_pba_mmio, NULL, &msix_pba_mmio_ops, dev,
+ memory_region_init_io(&dev->msix_pba_mmio, OBJECT(dev), &msix_pba_mmio_ops, dev,
"msix-pba", pba_size);
memory_region_add_subregion(pba_bar, pba_offset, &dev->msix_pba_mmio);
@@ -311,7 +311,7 @@ int msix_init_exclusive_bar(PCIDevice *dev, unsigned short nentries,
}
name = g_strdup_printf("%s-msix", dev->name);
- memory_region_init(&dev->msix_exclusive_bar, NULL, name, MSIX_EXCLUSIVE_BAR_SIZE);
+ memory_region_init(&dev->msix_exclusive_bar, OBJECT(dev), name, MSIX_EXCLUSIVE_BAR_SIZE);
g_free(name);
ret = msix_init(dev, nentries, &dev->msix_exclusive_bar, bar_nr,
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index a29a385..ceb6a5d 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -811,7 +811,8 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
dma_as = &address_space_memory;
}
- memory_region_init_alias(&pci_dev->bus_master_enable_region, NULL, "bus master",
+ memory_region_init_alias(&pci_dev->bus_master_enable_region,
+ OBJECT(pci_dev), "bus master",
dma_as->root, 0, memory_region_size(dma_as->root));
memory_region_set_enabled(&pci_dev->bus_master_enable_region, false);
address_space_init(&pci_dev->bus_master_as, &pci_dev->bus_master_enable_region,
@@ -1945,7 +1946,7 @@ static int pci_add_option_rom(PCIDevice *pdev, bool is_default_rom)
snprintf(name, sizeof(name), "%s.rom", object_get_typename(OBJECT(pdev)));
}
pdev->has_rom = true;
- memory_region_init_ram(&pdev->rom, NULL, name, size);
+ memory_region_init_ram(&pdev->rom, OBJECT(pdev), name, size);
vmstate_register_ram(&pdev->rom, &pdev->qdev);
ptr = memory_region_get_ram_ptr(&pdev->rom);
load_image(path, ptr);
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 28ae65e..ecdeab0 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -147,7 +147,7 @@ static void pci_bridge_init_alias(PCIBridge *bridge, MemoryRegion *alias,
* Apparently no way to do this with existing memory APIs. */
pcibus_t size = enabled && limit >= base ? limit + 1 - base : 0;
- memory_region_init_alias(alias, NULL, name, space, base, size);
+ memory_region_init_alias(alias, OBJECT(bridge), name, space, base, size);
memory_region_add_subregion_overlap(parent_space, base, alias, 1);
}
@@ -156,13 +156,13 @@ static void pci_bridge_init_vga_aliases(PCIBridge *br, PCIBus *parent,
{
uint16_t brctl = pci_get_word(br->dev.config + PCI_BRIDGE_CONTROL);
- memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_IO_LO], NULL,
+ memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_IO_LO], OBJECT(br),
"pci_bridge_vga_io_lo", &br->address_space_io,
QEMU_PCI_VGA_IO_LO_BASE, QEMU_PCI_VGA_IO_LO_SIZE);
- memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_IO_HI], NULL,
+ memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_IO_HI], OBJECT(br),
"pci_bridge_vga_io_hi", &br->address_space_io,
QEMU_PCI_VGA_IO_HI_BASE, QEMU_PCI_VGA_IO_HI_SIZE);
- memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_MEM], NULL,
+ memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_MEM], OBJECT(br),
"pci_bridge_vga_mem", &br->address_space_mem,
QEMU_PCI_VGA_MEM_BASE, QEMU_PCI_VGA_MEM_SIZE);
@@ -367,9 +367,9 @@ int pci_bridge_initfn(PCIDevice *dev, const char *typename)
sec_bus->parent_dev = dev;
sec_bus->map_irq = br->map_irq ? br->map_irq : pci_swizzle_map_irq_fn;
sec_bus->address_space_mem = &br->address_space_mem;
- memory_region_init(&br->address_space_mem, NULL, "pci_bridge_pci", INT64_MAX);
+ memory_region_init(&br->address_space_mem, OBJECT(br), "pci_bridge_pci", INT64_MAX);
sec_bus->address_space_io = &br->address_space_io;
- memory_region_init(&br->address_space_io, NULL, "pci_bridge_io", 65536);
+ memory_region_init(&br->address_space_io, OBJECT(br), "pci_bridge_io", 65536);
br->windows = pci_bridge_region_init(br);
QLIST_INIT(&sec_bus->child);
QLIST_INSERT_HEAD(&parent->child, sec_bus, sibling);
diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c
index 26f2007..b70e5ad 100644
--- a/hw/pci/pcie_host.c
+++ b/hw/pci/pcie_host.c
@@ -130,7 +130,8 @@ void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr,
assert(size >= PCIE_MMCFG_SIZE_MIN);
assert(size <= PCIE_MMCFG_SIZE_MAX);
e->size = size;
- memory_region_init_io(&e->mmio, NULL, &pcie_mmcfg_ops, e, "pcie-mmcfg", e->size);
+ memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e,
+ "pcie-mmcfg", e->size);
e->base_addr = addr;
memory_region_add_subregion(get_system_memory(), e->base_addr, &e->mmio);
}
diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c
index c4eae07..eb092fd 100644
--- a/hw/pci/shpc.c
+++ b/hw/pci/shpc.c
@@ -612,8 +612,8 @@ int shpc_init(PCIDevice *d, PCIBus *sec_bus, MemoryRegion *bar, unsigned offset)
}
/* TODO: init cmask */
- memory_region_init_io(&shpc->mmio, NULL, &shpc_mmio_ops, d, "shpc-mmio",
- SHPC_SIZEOF(d));
+ memory_region_init_io(&shpc->mmio, OBJECT(d), &shpc_mmio_ops,
+ d, "shpc-mmio", SHPC_SIZEOF(d));
shpc_cap_update_dword(d);
memory_region_add_subregion(bar, offset, &shpc->mmio);
pci_bus_hotplug(sec_bus, shpc_device_hotplug, &d->qdev);
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index b45fe91..a385b51 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -783,7 +783,7 @@ static int e500_ccsr_initfn(SysBusDevice *dev)
PPCE500CCSRState *ccsr;
ccsr = CCSR(dev);
- memory_region_init(&ccsr->ccsr_space, NULL, "e500-ccsr",
+ memory_region_init(&ccsr->ccsr_space, OBJECT(ccsr), "e500-ccsr",
MPC8544_CCSRBAR_SIZE);
return 0;
}
diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c
index 56249b4..2e2f2eb 100644
--- a/hw/ppc/mpc8544_guts.c
+++ b/hw/ppc/mpc8544_guts.c
@@ -119,7 +119,7 @@ static void mpc8544_guts_initfn(Object *obj)
SysBusDevice *d = SYS_BUS_DEVICE(obj);
GutsState *s = MPC8544_GUTS(obj);
- memory_region_init_io(&s->iomem, NULL, &mpc8544_guts_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &mpc8544_guts_ops, s,
"mpc8544.guts", MPC8544_GUTS_MMIO_SIZE);
sysbus_init_mmio(d, &s->iomem);
}
diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c
index f227043..d2d6f65 100644
--- a/hw/ppc/ppc4xx_pci.c
+++ b/hw/ppc/ppc4xx_pci.c
@@ -355,12 +355,12 @@ static int ppc4xx_pcihost_initfn(SysBusDevice *dev)
pci_create_simple(b, 0, "ppc4xx-host-bridge");
/* XXX split into 2 memory regions, one for config space, one for regs */
- memory_region_init(&s->container, NULL, "pci-container", PCI_ALL_SIZE);
- memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops, h,
+ memory_region_init(&s->container, OBJECT(s), "pci-container", PCI_ALL_SIZE);
+ memory_region_init_io(&h->conf_mem, OBJECT(s), &pci_host_conf_le_ops, h,
"pci-conf-idx", 4);
- memory_region_init_io(&h->data_mem, NULL, &pci_host_data_le_ops, h,
+ memory_region_init_io(&h->data_mem, OBJECT(s), &pci_host_data_le_ops, h,
"pci-conf-data", 4);
- memory_region_init_io(&s->iomem, NULL, &pci_reg_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &pci_reg_ops, s,
"pci.reg", PCI_REG_SIZE);
memory_region_add_subregion(&s->container, PCIC0_CFGADDR, &h->conf_mem);
memory_region_add_subregion(&s->container, PCIC0_CFGDATA, &h->data_mem);
diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c
index 0817f14..11b7de2 100644
--- a/hw/ppc/ppce500_spin.c
+++ b/hw/ppc/ppce500_spin.c
@@ -191,8 +191,8 @@ static int ppce500_spin_initfn(SysBusDevice *dev)
s = FROM_SYSBUS(SpinState, SYS_BUS_DEVICE(dev));
- memory_region_init_io(&s->iomem, NULL, &spin_rw_ops, s, "e500 spin pv device",
- sizeof(SpinInfo) * MAX_CPUS);
+ memory_region_init_io(&s->iomem, OBJECT(s), &spin_rw_ops, s,
+ "e500 spin pv device", sizeof(SpinInfo) * MAX_CPUS);
sysbus_init_mmio(dev, &s->iomem);
qemu_register_reset(spin_reset, s);
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 7710aa0..232b0a8 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -581,10 +581,11 @@ static int spapr_phb_init(SysBusDevice *s)
/* Initialize memory regions */
sprintf(namebuf, "%s.mmio", sphb->dtbusname);
- memory_region_init(&sphb->memspace, NULL, namebuf, INT64_MAX);
+ memory_region_init(&sphb->memspace, OBJECT(sphb), namebuf, INT64_MAX);
sprintf(namebuf, "%s.mmio-alias", sphb->dtbusname);
- memory_region_init_alias(&sphb->memwindow, NULL, namebuf, &sphb->memspace,
+ memory_region_init_alias(&sphb->memwindow, OBJECT(sphb),
+ namebuf, &sphb->memspace,
SPAPR_PCI_MEM_WIN_BUS_OFFSET, sphb->mem_win_size);
memory_region_add_subregion(get_system_memory(), sphb->mem_win_addr,
&sphb->memwindow);
@@ -598,12 +599,13 @@ static int spapr_phb_init(SysBusDevice *s)
* system_io works around the problem until all the users of
* old_portion are updated */
sprintf(namebuf, "%s.io", sphb->dtbusname);
- memory_region_init(&sphb->iospace, NULL, namebuf, SPAPR_PCI_IO_WIN_SIZE);
+ memory_region_init(&sphb->iospace, OBJECT(sphb),
+ namebuf, SPAPR_PCI_IO_WIN_SIZE);
/* FIXME: fix to support multiple PHBs */
memory_region_add_subregion(get_system_io(), 0, &sphb->iospace);
sprintf(namebuf, "%s.io-alias", sphb->dtbusname);
- memory_region_init_io(&sphb->iowindow, NULL, &spapr_io_ops, sphb,
+ memory_region_init_io(&sphb->iowindow, OBJECT(sphb), &spapr_io_ops, sphb,
namebuf, SPAPR_PCI_IO_WIN_SIZE);
memory_region_add_subregion(get_system_memory(), sphb->io_win_addr,
&sphb->iowindow);
@@ -613,7 +615,7 @@ static int spapr_phb_init(SysBusDevice *s)
* from msi_notify()/msix_notify() */
if (msi_supported) {
sprintf(namebuf, "%s.msi", sphb->dtbusname);
- memory_region_init_io(&sphb->msiwindow, NULL, &spapr_msi_ops, sphb,
+ memory_region_init_io(&sphb->msiwindow, OBJECT(sphb), &spapr_msi_ops, sphb,
namebuf, SPAPR_MSIX_MAX_DEVS * 0x10000);
memory_region_add_subregion(get_system_memory(), sphb->msi_win_addr,
&sphb->msiwindow);
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 51/66] hw/s*: pass owner to memory_region_init* functions
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (48 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 50/66] hw/p*: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 52/66] hw/t*: " Paolo Bonzini
` (15 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/scsi/esp-pci.c | 3 ++-
hw/scsi/esp.c | 4 ++--
hw/scsi/lsi53c895a.c | 9 ++++++---
hw/scsi/megasas.c | 6 +++---
hw/scsi/vmw_pvscsi.c | 2 +-
hw/sd/milkymist-memcard.c | 2 +-
hw/sd/pl181.c | 2 +-
hw/sd/sdhci.c | 2 +-
hw/sh4/sh_pci.c | 6 +++---
hw/sparc/sun4m.c | 9 +++++----
hw/sparc64/sun4u.c | 4 ++--
hw/ssi/pl022.c | 2 +-
hw/ssi/xilinx_spi.c | 3 ++-
hw/ssi/xilinx_spips.c | 5 +++--
14 files changed, 33 insertions(+), 26 deletions(-)
diff --git a/hw/scsi/esp-pci.c b/hw/scsi/esp-pci.c
index 384224f..8f97c5a 100644
--- a/hw/scsi/esp-pci.c
+++ b/hw/scsi/esp-pci.c
@@ -349,7 +349,8 @@ static int esp_pci_scsi_init(PCIDevice *dev)
s->dma_memory_write = esp_pci_dma_memory_write;
s->dma_opaque = pci;
s->chip_id = TCHI_AM53C974;
- memory_region_init_io(&pci->io, NULL, &esp_pci_io_ops, pci, "esp-io", 0x80);
+ memory_region_init_io(&pci->io, OBJECT(pci), &esp_pci_io_ops, pci,
+ "esp-io", 0x80);
pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->io);
s->irq = pci->dev.irq[0];
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 5da5d7a..c6166c5 100644
--- a/hw/scsi/esp.c
+++ b/hw/scsi/esp.c
@@ -675,8 +675,8 @@ static int sysbus_esp_init(SysBusDevice *dev)
assert(sysbus->it_shift != -1);
s->chip_id = TCHI_FAS100A;
- memory_region_init_io(&sysbus->iomem, NULL, &sysbus_esp_mem_ops, sysbus,
- "esp", ESP_REGS << sysbus->it_shift);
+ memory_region_init_io(&sysbus->iomem, OBJECT(sysbus), &sysbus_esp_mem_ops,
+ sysbus, "esp", ESP_REGS << sysbus->it_shift);
sysbus_init_mmio(dev, &sysbus->iomem);
qdev_init_gpio_in(&dev->qdev, sysbus_esp_gpio_demux, 2);
diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c
index b31f0b7..2c17ae5 100644
--- a/hw/scsi/lsi53c895a.c
+++ b/hw/scsi/lsi53c895a.c
@@ -2090,9 +2090,12 @@ static int lsi_scsi_init(PCIDevice *dev)
/* Interrupt pin A */
pci_conf[PCI_INTERRUPT_PIN] = 0x01;
- memory_region_init_io(&s->mmio_io, NULL, &lsi_mmio_ops, s, "lsi-mmio", 0x400);
- memory_region_init_io(&s->ram_io, NULL, &lsi_ram_ops, s, "lsi-ram", 0x2000);
- memory_region_init_io(&s->io_io, NULL, &lsi_io_ops, s, "lsi-io", 256);
+ memory_region_init_io(&s->mmio_io, OBJECT(s), &lsi_mmio_ops, s,
+ "lsi-mmio", 0x400);
+ memory_region_init_io(&s->ram_io, OBJECT(s), &lsi_ram_ops, s,
+ "lsi-ram", 0x2000);
+ memory_region_init_io(&s->io_io, OBJECT(s), &lsi_io_ops, s,
+ "lsi-io", 256);
pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_io);
pci_register_bar(&s->dev, 1, 0, &s->mmio_io);
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index ba74f0b..45d0c77 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -2098,11 +2098,11 @@ static int megasas_scsi_init(PCIDevice *dev)
/* Interrupt pin 1 */
pci_conf[PCI_INTERRUPT_PIN] = 0x01;
- memory_region_init_io(&s->mmio_io, NULL, &megasas_mmio_ops, s,
+ memory_region_init_io(&s->mmio_io, OBJECT(s), &megasas_mmio_ops, s,
"megasas-mmio", 0x4000);
- memory_region_init_io(&s->port_io, NULL, &megasas_port_ops, s,
+ memory_region_init_io(&s->port_io, OBJECT(s), &megasas_port_ops, s,
"megasas-io", 256);
- memory_region_init_io(&s->queue_io, NULL, &megasas_queue_ops, s,
+ memory_region_init_io(&s->queue_io, OBJECT(s), &megasas_queue_ops, s,
"megasas-queue", 0x40000);
#ifdef USE_MSIX
diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c
index b7a1275..97d3aa3 100644
--- a/hw/scsi/vmw_pvscsi.c
+++ b/hw/scsi/vmw_pvscsi.c
@@ -1075,7 +1075,7 @@ pvscsi_init(PCIDevice *pci_dev)
/* Interrupt pin A */
pci_config_set_interrupt_pin(pci_dev->config, 1);
- memory_region_init_io(&s->io_space, NULL, &pvscsi_ops, s,
+ memory_region_init_io(&s->io_space, OBJECT(s), &pvscsi_ops, s,
"pvscsi-io", PVSCSI_MEM_SPACE_SIZE);
pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->io_space);
diff --git a/hw/sd/milkymist-memcard.c b/hw/sd/milkymist-memcard.c
index 6de050f..f69775c 100644
--- a/hw/sd/milkymist-memcard.c
+++ b/hw/sd/milkymist-memcard.c
@@ -253,7 +253,7 @@ static int milkymist_memcard_init(SysBusDevice *dev)
s->card = sd_init(dinfo ? dinfo->bdrv : NULL, false);
s->enabled = dinfo ? bdrv_is_inserted(dinfo->bdrv) : 0;
- memory_region_init_io(&s->regs_region, NULL, &memcard_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, OBJECT(s), &memcard_mmio_ops, s,
"milkymist-memcard", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
diff --git a/hw/sd/pl181.c b/hw/sd/pl181.c
index 15f7890..4b17234 100644
--- a/hw/sd/pl181.c
+++ b/hw/sd/pl181.c
@@ -479,7 +479,7 @@ static int pl181_init(SysBusDevice *dev)
pl181_state *s = FROM_SYSBUS(pl181_state, dev);
DriveInfo *dinfo;
- memory_region_init_io(&s->iomem, NULL, &pl181_ops, s, "pl181", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pl181_ops, s, "pl181", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq[0]);
sysbus_init_irq(dev, &s->irq[1]);
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index ac219c0..d2dbddc 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1245,7 +1245,7 @@ static void sdhci_realize(DeviceState *dev, Error ** errp)
s->buf_maxsz = sdhci_get_fifolen(s);
s->fifo_buffer = g_malloc0(s->buf_maxsz);
sysbus_init_irq(sbd, &s->irq);
- memory_region_init_io(&s->iomem, NULL, &sdhci_mmio_ops, s, "sdhci",
+ memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci",
SDHC_REGISTERS_MAP_SIZE);
sysbus_init_mmio(sbd, &s->iomem);
}
diff --git a/hw/sh4/sh_pci.c b/hw/sh4/sh_pci.c
index 8b842bc..c33a72f 100644
--- a/hw/sh4/sh_pci.c
+++ b/hw/sh4/sh_pci.c
@@ -125,10 +125,10 @@ static int sh_pci_device_init(SysBusDevice *dev)
get_system_memory(),
get_system_io(),
PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS);
- memory_region_init_io(&s->memconfig_p4, NULL, &sh_pci_reg_ops, s,
+ memory_region_init_io(&s->memconfig_p4, OBJECT(s), &sh_pci_reg_ops, s,
"sh_pci", 0x224);
- memory_region_init_alias(&s->memconfig_a7, NULL, "sh_pci.2", &s->memconfig_p4,
- 0, 0x224);
+ memory_region_init_alias(&s->memconfig_a7, OBJECT(s), "sh_pci.2",
+ &s->memconfig_p4, 0, 0x224);
isa_mmio_setup(&s->isa, 0x40000);
sysbus_init_mmio(dev, &s->memconfig_p4);
sysbus_init_mmio(dev, &s->memconfig_a7);
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 1a16c82..90b7b60 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -582,7 +582,8 @@ static int idreg_init1(SysBusDevice *dev)
{
IDRegState *s = FROM_SYSBUS(IDRegState, dev);
- memory_region_init_ram(&s->mem, NULL, "sun4m.idreg", sizeof(idreg_data));
+ memory_region_init_ram(&s->mem, OBJECT(s),
+ "sun4m.idreg", sizeof(idreg_data));
vmstate_register_ram_global(&s->mem);
memory_region_set_readonly(&s->mem, true);
sysbus_init_mmio(dev, &s->mem);
@@ -625,7 +626,7 @@ static int afx_init1(SysBusDevice *dev)
{
AFXState *s = FROM_SYSBUS(AFXState, dev);
- memory_region_init_ram(&s->mem, NULL, "sun4m.afx", 4);
+ memory_region_init_ram(&s->mem, OBJECT(s), "sun4m.afx", 4);
vmstate_register_ram_global(&s->mem);
sysbus_init_mmio(dev, &s->mem);
return 0;
@@ -695,7 +696,7 @@ static int prom_init1(SysBusDevice *dev)
{
PROMState *s = FROM_SYSBUS(PROMState, dev);
- memory_region_init_ram(&s->prom, NULL, "sun4m.prom", PROM_SIZE_MAX);
+ memory_region_init_ram(&s->prom, OBJECT(s), "sun4m.prom", PROM_SIZE_MAX);
vmstate_register_ram_global(&s->prom);
memory_region_set_readonly(&s->prom, true);
sysbus_init_mmio(dev, &s->prom);
@@ -734,7 +735,7 @@ static int ram_init1(SysBusDevice *dev)
{
RamDevice *d = FROM_SYSBUS(RamDevice, dev);
- memory_region_init_ram(&d->ram, NULL, "sun4m.ram", d->size);
+ memory_region_init_ram(&d->ram, OBJECT(d), "sun4m.ram", d->size);
vmstate_register_ram_global(&d->ram);
sysbus_init_mmio(dev, &d->ram);
return 0;
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 4643a83..0df4dfc 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -680,7 +680,7 @@ static int prom_init1(SysBusDevice *dev)
{
PROMState *s = FROM_SYSBUS(PROMState, dev);
- memory_region_init_ram(&s->prom, NULL, "sun4u.prom", PROM_SIZE_MAX);
+ memory_region_init_ram(&s->prom, OBJECT(s), "sun4u.prom", PROM_SIZE_MAX);
vmstate_register_ram_global(&s->prom);
memory_region_set_readonly(&s->prom, true);
sysbus_init_mmio(dev, &s->prom);
@@ -720,7 +720,7 @@ static int ram_init1(SysBusDevice *dev)
{
RamDevice *d = FROM_SYSBUS(RamDevice, dev);
- memory_region_init_ram(&d->ram, NULL, "sun4u.ram", d->size);
+ memory_region_init_ram(&d->ram, OBJECT(d), "sun4u.ram", d->size);
vmstate_register_ram_global(&d->ram);
sysbus_init_mmio(dev, &d->ram);
return 0;
diff --git a/hw/ssi/pl022.c b/hw/ssi/pl022.c
index ab569d6..711a0c1 100644
--- a/hw/ssi/pl022.c
+++ b/hw/ssi/pl022.c
@@ -277,7 +277,7 @@ static int pl022_init(SysBusDevice *dev)
{
pl022_state *s = FROM_SYSBUS(pl022_state, dev);
- memory_region_init_io(&s->iomem, NULL, &pl022_ops, s, "pl022", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pl022_ops, s, "pl022", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->ssi = ssi_create_bus(&dev->qdev, "ssi");
diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c
index 7a3c356..7a9fd81 100644
--- a/hw/ssi/xilinx_spi.c
+++ b/hw/ssi/xilinx_spi.c
@@ -330,7 +330,8 @@ static int xilinx_spi_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->cs_lines[i]);
}
- memory_region_init_io(&s->mmio, NULL, &spi_ops, s, "xilinx-spi", R_MAX * 4);
+ memory_region_init_io(&s->mmio, OBJECT(s), &spi_ops, s,
+ "xilinx-spi", R_MAX * 4);
sysbus_init_mmio(dev, &s->mmio);
s->irqline = -1;
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index d7b5074..6a28746 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -663,7 +663,8 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp)
sysbus_init_irq(sbd, &s->cs_lines[i]);
}
- memory_region_init_io(&s->iomem, NULL, xsc->reg_ops, s, "spi", R_MAX*4);
+ memory_region_init_io(&s->iomem, OBJECT(s), xsc->reg_ops, s,
+ "spi", R_MAX*4);
sysbus_init_mmio(sbd, &s->iomem);
s->irqline = -1;
@@ -685,7 +686,7 @@ static void xilinx_qspips_realize(DeviceState *dev, Error **errp)
s->num_txrx_bytes = 4;
xilinx_spips_realize(dev, errp);
- memory_region_init_io(&s->mmlqspi, NULL, &lqspi_ops, s, "lqspi",
+ memory_region_init_io(&s->mmlqspi, OBJECT(s), &lqspi_ops, s, "lqspi",
(1 << LQSPI_ADDRESS_BITS) * 2);
sysbus_init_mmio(sbd, &s->mmlqspi);
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 52/66] hw/t*: pass owner to memory_region_init* functions
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (49 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 51/66] hw/s*: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 53/66] hw/[u-x]*: " Paolo Bonzini
` (14 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/timer/arm_mptimer.c | 4 ++--
hw/timer/arm_timer.c | 6 ++++--
hw/timer/cadence_ttc.c | 3 ++-
hw/timer/etraxfs_timer.c | 3 ++-
hw/timer/exynos4210_mct.c | 4 ++--
hw/timer/exynos4210_pwm.c | 4 ++--
hw/timer/exynos4210_rtc.c | 4 ++--
hw/timer/grlib_gptimer.c | 3 ++-
hw/timer/hpet.c | 2 +-
hw/timer/i8254.c | 3 ++-
hw/timer/imx_epit.c | 2 +-
hw/timer/imx_gpt.c | 2 +-
hw/timer/lm32_timer.c | 3 ++-
hw/timer/m48t59.c | 8 +++++---
hw/timer/mc146818rtc.c | 2 +-
hw/timer/milkymist-sysctl.c | 2 +-
hw/timer/pl031.c | 2 +-
hw/timer/puv3_ost.c | 2 +-
hw/timer/pxa2xx_timer.c | 2 +-
hw/timer/slavio_timer.c | 2 +-
hw/timer/tusb6010.c | 4 ++--
hw/timer/xilinx_timer.c | 2 +-
hw/tpm/tpm_tis.c | 3 ++-
23 files changed, 41 insertions(+), 31 deletions(-)
diff --git a/hw/timer/arm_mptimer.c b/hw/timer/arm_mptimer.c
index e78f820..d23462d 100644
--- a/hw/timer/arm_mptimer.c
+++ b/hw/timer/arm_mptimer.c
@@ -236,14 +236,14 @@ static int arm_mptimer_init(SysBusDevice *dev)
* * timer for core 1
* and so on.
*/
- memory_region_init_io(&s->iomem, NULL, &arm_thistimer_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &arm_thistimer_ops, s,
"arm_mptimer_timer", 0x20);
sysbus_init_mmio(dev, &s->iomem);
for (i = 0; i < s->num_cpu; i++) {
TimerBlock *tb = &s->timerblock[i];
tb->timer = qemu_new_timer_ns(vm_clock, timerblock_tick, tb);
sysbus_init_irq(dev, &tb->irq);
- memory_region_init_io(&tb->iomem, NULL, &timerblock_ops, tb,
+ memory_region_init_io(&tb->iomem, OBJECT(s), &timerblock_ops, tb,
"arm_mptimer_timerblock", 0x20);
sysbus_init_mmio(dev, &tb->iomem);
}
diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c
index f1a501f..798a8da 100644
--- a/hw/timer/arm_timer.c
+++ b/hw/timer/arm_timer.c
@@ -284,7 +284,8 @@ static int sp804_init(SysBusDevice *dev)
s->timer[1] = arm_timer_init(s->freq1);
s->timer[0]->irq = qi[0];
s->timer[1]->irq = qi[1];
- memory_region_init_io(&s->iomem, NULL, &sp804_ops, s, "sp804", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &sp804_ops, s,
+ "sp804", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
vmstate_register(&dev->qdev, -1, &vmstate_sp804, s);
return 0;
@@ -347,7 +348,8 @@ static int icp_pit_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->timer[1]->irq);
sysbus_init_irq(dev, &s->timer[2]->irq);
- memory_region_init_io(&s->iomem, NULL, &icp_pit_ops, s, "icp_pit", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &icp_pit_ops, s,
+ "icp_pit", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
/* This device has no state to save/restore. The component timers will
save themselves. */
diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c
index 4879cb0..a861049 100644
--- a/hw/timer/cadence_ttc.c
+++ b/hw/timer/cadence_ttc.c
@@ -409,7 +409,8 @@ static int cadence_ttc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->timer[i].irq);
}
- memory_region_init_io(&s->iomem, NULL, &cadence_ttc_ops, s, "timer", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &cadence_ttc_ops, s,
+ "timer", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c
index 8a7b177..6dd1072 100644
--- a/hw/timer/etraxfs_timer.c
+++ b/hw/timer/etraxfs_timer.c
@@ -323,7 +323,8 @@ static int etraxfs_timer_init(SysBusDevice *dev)
sysbus_init_irq(dev, &t->irq);
sysbus_init_irq(dev, &t->nmi);
- memory_region_init_io(&t->mmio, NULL, &timer_ops, t, "etraxfs-timer", 0x5c);
+ memory_region_init_io(&t->mmio, OBJECT(t), &timer_ops, t,
+ "etraxfs-timer", 0x5c);
sysbus_init_mmio(dev, &t->mmio);
qemu_register_reset(etraxfs_timer_reset, t);
return 0;
diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c
index ba74d2b..28ebe5d 100644
--- a/hw/timer/exynos4210_mct.c
+++ b/hw/timer/exynos4210_mct.c
@@ -1449,8 +1449,8 @@ static int exynos4210_mct_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->l_timer[i].irq);
}
- memory_region_init_io(&s->iomem, NULL, &exynos4210_mct_ops, s, "exynos4210-mct",
- MCT_SFR_SIZE);
+ memory_region_init_io(&s->iomem, OBJECT(s), &exynos4210_mct_ops, s,
+ "exynos4210-mct", MCT_SFR_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
diff --git a/hw/timer/exynos4210_pwm.c b/hw/timer/exynos4210_pwm.c
index 62c42b4..8fa0bb2 100644
--- a/hw/timer/exynos4210_pwm.c
+++ b/hw/timer/exynos4210_pwm.c
@@ -390,8 +390,8 @@ static int exynos4210_pwm_init(SysBusDevice *dev)
s->timer[i].parent = s;
}
- memory_region_init_io(&s->iomem, NULL, &exynos4210_pwm_ops, s, "exynos4210-pwm",
- EXYNOS4210_PWM_REG_MEM_SIZE);
+ memory_region_init_io(&s->iomem, OBJECT(s), &exynos4210_pwm_ops, s,
+ "exynos4210-pwm", EXYNOS4210_PWM_REG_MEM_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
diff --git a/hw/timer/exynos4210_rtc.c b/hw/timer/exynos4210_rtc.c
index 779dc77..7fca071 100644
--- a/hw/timer/exynos4210_rtc.c
+++ b/hw/timer/exynos4210_rtc.c
@@ -559,8 +559,8 @@ static int exynos4210_rtc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->alm_irq);
sysbus_init_irq(dev, &s->tick_irq);
- memory_region_init_io(&s->iomem, NULL, &exynos4210_rtc_ops, s, "exynos4210-rtc",
- EXYNOS4210_RTC_REG_MEM_SIZE);
+ memory_region_init_io(&s->iomem, OBJECT(s), &exynos4210_rtc_ops, s,
+ "exynos4210-rtc", EXYNOS4210_RTC_REG_MEM_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c
index 749ed31..37ba47d 100644
--- a/hw/timer/grlib_gptimer.c
+++ b/hw/timer/grlib_gptimer.c
@@ -365,7 +365,8 @@ static int grlib_gptimer_init(SysBusDevice *dev)
ptimer_set_freq(timer->ptimer, unit->freq_hz);
}
- memory_region_init_io(&unit->iomem, NULL, &grlib_gptimer_ops, unit, "gptimer",
+ memory_region_init_io(&unit->iomem, OBJECT(unit), &grlib_gptimer_ops,
+ unit, "gptimer",
UNIT_REG_SIZE + GPTIMER_REG_SIZE * unit->nr_timers);
sysbus_init_mmio(dev, &unit->iomem);
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 2e7fdb5..90bd584 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -722,7 +722,7 @@ static int hpet_init(SysBusDevice *dev)
qdev_init_gpio_out(&dev->qdev, &s->pit_enabled, 1);
/* HPET Area */
- memory_region_init_io(&s->iomem, NULL, &hpet_ram_ops, s, "hpet", 0x400);
+ memory_region_init_io(&s->iomem, OBJECT(s), &hpet_ram_ops, s, "hpet", 0x400);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
diff --git a/hw/timer/i8254.c b/hw/timer/i8254.c
index fdb23da..cd52140 100644
--- a/hw/timer/i8254.c
+++ b/hw/timer/i8254.c
@@ -333,7 +333,8 @@ static void pit_realizefn(DeviceState *dev, Error **err)
s->irq_timer = qemu_new_timer_ns(vm_clock, pit_irq_timer, s);
qdev_init_gpio_out(dev, &s->irq, 1);
- memory_region_init_io(&pit->ioports, NULL, &pit_ioport_ops, pit, "pit", 4);
+ memory_region_init_io(&pit->ioports, OBJECT(pit), &pit_ioport_ops,
+ pit, "pit", 4);
qdev_init_gpio_in(dev, pit_irq_control, 1);
diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c
index d2e0895..e24e0c4 100644
--- a/hw/timer/imx_epit.c
+++ b/hw/timer/imx_epit.c
@@ -396,7 +396,7 @@ static void imx_epit_realize(DeviceState *dev, Error **errp)
DPRINTF("\n");
sysbus_init_irq(sbd, &s->irq);
- memory_region_init_io(&s->iomem, NULL, &imx_epit_ops, s, TYPE_IMX_EPIT,
+ memory_region_init_io(&s->iomem, OBJECT(s), &imx_epit_ops, s, TYPE_IMX_EPIT,
0x00001000);
sysbus_init_mmio(sbd, &s->iomem);
diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c
index 6e6442d..97fbebb 100644
--- a/hw/timer/imx_gpt.c
+++ b/hw/timer/imx_gpt.c
@@ -514,7 +514,7 @@ static void imx_gpt_realize(DeviceState *dev, Error **errp)
QEMUBH *bh;
sysbus_init_irq(sbd, &s->irq);
- memory_region_init_io(&s->iomem, NULL, &imx_gpt_ops, s, TYPE_IMX_GPT,
+ memory_region_init_io(&s->iomem, OBJECT(s), &imx_gpt_ops, s, TYPE_IMX_GPT,
0x00001000);
sysbus_init_mmio(sbd, &s->iomem);
diff --git a/hw/timer/lm32_timer.c b/hw/timer/lm32_timer.c
index 2ab8588..016dade 100644
--- a/hw/timer/lm32_timer.c
+++ b/hw/timer/lm32_timer.c
@@ -180,7 +180,8 @@ static int lm32_timer_init(SysBusDevice *dev)
s->ptimer = ptimer_init(s->bh);
ptimer_set_freq(s->ptimer, s->freq_hz);
- memory_region_init_io(&s->iomem, NULL, &timer_ops, s, "timer", R_MAX * 4);
+ memory_region_init_io(&s->iomem, OBJECT(s), &timer_ops, s,
+ "timer", R_MAX * 4);
sysbus_init_mmio(dev, &s->iomem);
return 0;
diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c
index fdda6d6..be3490b 100644
--- a/hw/timer/m48t59.c
+++ b/hw/timer/m48t59.c
@@ -655,7 +655,8 @@ M48t59State *m48t59_init(qemu_irq IRQ, hwaddr mem_base,
d = FROM_SYSBUS(M48t59SysBusState, s);
state = &d->state;
sysbus_connect_irq(s, 0, IRQ);
- memory_region_init_io(&d->io, NULL, &m48t59_io_ops, state, "m48t59", 4);
+ memory_region_init_io(&d->io, OBJECT(d), &m48t59_io_ops, state,
+ "m48t59", 4);
if (io_base != 0) {
memory_region_add_subregion(get_system_io(), io_base, &d->io);
}
@@ -683,7 +684,7 @@ M48t59State *m48t59_init_isa(ISABus *bus, uint32_t io_base, uint16_t size,
d = ISA_M48T59(isadev);
s = &d->state;
- memory_region_init_io(&d->io, NULL, &m48t59_io_ops, s, "m48t59", 4);
+ memory_region_init_io(&d->io, OBJECT(d), &m48t59_io_ops, s, "m48t59", 4);
if (io_base != 0) {
isa_register_ioport(isadev, &d->io, io_base);
}
@@ -721,7 +722,8 @@ static int m48t59_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->IRQ);
- memory_region_init_io(&s->iomem, NULL, &nvram_ops, s, "m48t59.nvram", s->size);
+ memory_region_init_io(&s->iomem, OBJECT(d), &nvram_ops, s,
+ "m48t59.nvram", s->size);
sysbus_init_mmio(dev, &s->iomem);
m48t59_realize_common(s, &err);
if (err != NULL) {
diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c
index 4110a37..3c3baac 100644
--- a/hw/timer/mc146818rtc.c
+++ b/hw/timer/mc146818rtc.c
@@ -863,7 +863,7 @@ static void rtc_realizefn(DeviceState *dev, Error **errp)
s->suspend_notifier.notify = rtc_notify_suspend;
qemu_register_suspend_notifier(&s->suspend_notifier);
- memory_region_init_io(&s->io, NULL, &cmos_ops, s, "rtc", 2);
+ memory_region_init_io(&s->io, OBJECT(s), &cmos_ops, s, "rtc", 2);
isa_register_ioport(isadev, &s->io, base);
qdev_set_legacy_instance_id(dev, base, 3);
diff --git a/hw/timer/milkymist-sysctl.c b/hw/timer/milkymist-sysctl.c
index f253f21..5009394 100644
--- a/hw/timer/milkymist-sysctl.c
+++ b/hw/timer/milkymist-sysctl.c
@@ -280,7 +280,7 @@ static int milkymist_sysctl_init(SysBusDevice *dev)
ptimer_set_freq(s->ptimer0, s->freq_hz);
ptimer_set_freq(s->ptimer1, s->freq_hz);
- memory_region_init_io(&s->regs_region, NULL, &sysctl_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, OBJECT(s), &sysctl_mmio_ops, s,
"milkymist-sysctl", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
diff --git a/hw/timer/pl031.c b/hw/timer/pl031.c
index cba4e87..3ce6ed8 100644
--- a/hw/timer/pl031.c
+++ b/hw/timer/pl031.c
@@ -192,7 +192,7 @@ static int pl031_init(SysBusDevice *dev)
pl031_state *s = FROM_SYSBUS(pl031_state, dev);
struct tm tm;
- memory_region_init_io(&s->iomem, NULL, &pl031_ops, s, "pl031", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &pl031_ops, s, "pl031", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
diff --git a/hw/timer/puv3_ost.c b/hw/timer/puv3_ost.c
index 375d368..63f2c9f 100644
--- a/hw/timer/puv3_ost.c
+++ b/hw/timer/puv3_ost.c
@@ -122,7 +122,7 @@ static int puv3_ost_init(SysBusDevice *dev)
s->ptimer = ptimer_init(s->bh);
ptimer_set_freq(s->ptimer, 50 * 1000 * 1000);
- memory_region_init_io(&s->iomem, NULL, &puv3_ost_ops, s, "puv3_ost",
+ memory_region_init_io(&s->iomem, OBJECT(s), &puv3_ost_ops, s, "puv3_ost",
PUV3_REGS_OFFSET);
sysbus_init_mmio(dev, &s->iomem);
diff --git a/hw/timer/pxa2xx_timer.c b/hw/timer/pxa2xx_timer.c
index dd41a10..4d28719 100644
--- a/hw/timer/pxa2xx_timer.c
+++ b/hw/timer/pxa2xx_timer.c
@@ -461,7 +461,7 @@ static int pxa2xx_timer_init(SysBusDevice *dev)
}
}
- memory_region_init_io(&s->iomem, NULL, &pxa2xx_timer_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), &pxa2xx_timer_ops, s,
"pxa2xx-timer", 0x00001000);
sysbus_init_mmio(dev, &s->iomem);
diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer.c
index cad81a3..7f844d7 100644
--- a/hw/timer/slavio_timer.c
+++ b/hw/timer/slavio_timer.c
@@ -394,7 +394,7 @@ static int slavio_timer_init1(SysBusDevice *dev)
size = i == 0 ? SYS_TIMER_SIZE : CPU_TIMER_SIZE;
snprintf(timer_name, sizeof(timer_name), "timer-%i", i);
- memory_region_init_io(&tc->iomem, NULL, &slavio_timer_mem_ops, tc,
+ memory_region_init_io(&tc->iomem, OBJECT(s), &slavio_timer_mem_ops, tc,
timer_name, size);
sysbus_init_mmio(dev, &tc->iomem);
diff --git a/hw/timer/tusb6010.c b/hw/timer/tusb6010.c
index fcce4ac..47b6809 100644
--- a/hw/timer/tusb6010.c
+++ b/hw/timer/tusb6010.c
@@ -779,8 +779,8 @@ static int tusb6010_init(SysBusDevice *dev)
TUSBState *s = FROM_SYSBUS(TUSBState, dev);
s->otg_timer = qemu_new_timer_ns(vm_clock, tusb_otg_tick, s);
s->pwr_timer = qemu_new_timer_ns(vm_clock, tusb_power_tick, s);
- memory_region_init_io(&s->iomem[1], NULL, &tusb_async_ops, s, "tusb-async",
- UINT32_MAX);
+ memory_region_init_io(&s->iomem[1], OBJECT(s), &tusb_async_ops, s,
+ "tusb-async", UINT32_MAX);
sysbus_init_mmio(dev, &s->iomem[0]);
sysbus_init_mmio(dev, &s->iomem[1]);
sysbus_init_irq(dev, &s->irq);
diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c
index f4b4fb5..ee53834 100644
--- a/hw/timer/xilinx_timer.c
+++ b/hw/timer/xilinx_timer.c
@@ -218,7 +218,7 @@ static int xilinx_timer_init(SysBusDevice *dev)
ptimer_set_freq(xt->ptimer, t->freq_hz);
}
- memory_region_init_io(&t->mmio, NULL, &timer_ops, t, "xlnx.xps-timer",
+ memory_region_init_io(&t->mmio, OBJECT(t), &timer_ops, t, "xlnx.xps-timer",
R_MAX * 4 * num_timers(t));
sysbus_init_mmio(dev, &t->mmio);
return 0;
diff --git a/hw/tpm/tpm_tis.c b/hw/tpm/tpm_tis.c
index 5504fb4..abe384b 100644
--- a/hw/tpm/tpm_tis.c
+++ b/hw/tpm/tpm_tis.c
@@ -888,7 +888,8 @@ static void tpm_tis_initfn(Object *obj)
ISADevice *dev = ISA_DEVICE(obj);
TPMState *s = TPM(obj);
- memory_region_init_io(&s->mmio, NULL, &tpm_tis_memory_ops, s, "tpm-tis-mmio",
+ memory_region_init_io(&s->mmio, OBJECT(s), &tpm_tis_memory_ops,
+ s, "tpm-tis-mmio",
TPM_TIS_NUM_LOCALITIES << TPM_TIS_LOCALITY_SHIFT);
memory_region_add_subregion(isa_address_space(dev), TPM_TIS_ADDR_BASE,
&s->mmio);
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 53/66] hw/[u-x]*: pass owner to memory_region_init* functions
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (50 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 52/66] hw/t*: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 54/66] add a header file for atomic operations Paolo Bonzini
` (13 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/usb/hcd-ehci-sysbus.c | 2 +-
hw/usb/hcd-ehci.c | 8 ++++----
hw/usb/hcd-ohci.c | 3 ++-
hw/usb/hcd-uhci.c | 4 +++-
hw/usb/hcd-xhci.c | 12 ++++++------
hw/virtio/virtio-pci.c | 4 ++--
hw/watchdog/wdt_i6300esb.c | 3 ++-
hw/xen/xen_apic.c | 4 ++--
hw/xen/xen_platform.c | 7 ++++---
hw/xen/xen_pt.c | 4 ++--
hw/xen/xen_pt_msi.c | 3 ++-
hw/xtensa/xtensa_lx60.c | 2 +-
12 files changed, 31 insertions(+), 25 deletions(-)
diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c
index 76b4c05..54147b5 100644
--- a/hw/usb/hcd-ehci-sysbus.c
+++ b/hw/usb/hcd-ehci-sysbus.c
@@ -173,7 +173,7 @@ static void fusbh200_ehci_init(Object *obj)
FUSBH200EHCIState *f = FUSBH200_EHCI(obj);
EHCIState *s = &i->ehci;
- memory_region_init_io(&f->mem_vendor, NULL, &fusbh200_ehci_mmio_ops, s,
+ memory_region_init_io(&f->mem_vendor, OBJECT(f), &fusbh200_ehci_mmio_ops, s,
"fusbh200", 0x4c);
memory_region_add_subregion(&s->mem,
s->opregbase + s->portscbase + 4 * s->portnr,
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index 07d72e6..cdc932b 100644
--- a/hw/usb/hcd-ehci.c
+++ b/hw/usb/hcd-ehci.c
@@ -2551,12 +2551,12 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
QTAILQ_INIT(&s->pqueues);
usb_packet_init(&s->ipacket);
- memory_region_init(&s->mem, NULL, "ehci", MMIO_SIZE);
- memory_region_init_io(&s->mem_caps, NULL, &ehci_mmio_caps_ops, s,
+ memory_region_init(&s->mem, OBJECT(dev), "ehci", MMIO_SIZE);
+ memory_region_init_io(&s->mem_caps, OBJECT(dev), &ehci_mmio_caps_ops, s,
"capabilities", CAPA_SIZE);
- memory_region_init_io(&s->mem_opreg, NULL, &ehci_mmio_opreg_ops, s,
+ memory_region_init_io(&s->mem_opreg, OBJECT(dev), &ehci_mmio_opreg_ops, s,
"operational", s->portscbase);
- memory_region_init_io(&s->mem_ports, NULL, &ehci_mmio_port_ops, s,
+ memory_region_init_io(&s->mem_ports, OBJECT(dev), &ehci_mmio_port_ops, s,
"ports", 4 * s->portnr);
memory_region_add_subregion(&s->mem, s->capsbase, &s->mem_caps);
diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c
index aa51042..a096ecf 100644
--- a/hw/usb/hcd-ohci.c
+++ b/hw/usb/hcd-ohci.c
@@ -1830,7 +1830,8 @@ static int usb_ohci_init(OHCIState *ohci, DeviceState *dev,
}
}
- memory_region_init_io(&ohci->mem, NULL, &ohci_mem_ops, ohci, "ohci", 256);
+ memory_region_init_io(&ohci->mem, OBJECT(dev), &ohci_mem_ops,
+ ohci, "ohci", 256);
ohci->localmem_base = localmem_base;
ohci->name = object_get_typename(OBJECT(dev));
diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c
index 502228b..066072e 100644
--- a/hw/usb/hcd-uhci.c
+++ b/hw/usb/hcd-uhci.c
@@ -1259,7 +1259,9 @@ static int usb_uhci_common_initfn(PCIDevice *dev)
qemu_register_reset(uhci_reset, s);
- memory_region_init_io(&s->io_bar, NULL, &uhci_ioport_ops, s, "uhci", 0x20);
+ memory_region_init_io(&s->io_bar, OBJECT(s), &uhci_ioport_ops, s,
+ "uhci", 0x20);
+
/* Use region 4 for consistency with real hardware. BSD guests seem
to rely on this. */
pci_register_bar(&s->dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar);
diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
index 493d759..d7a54fd 100644
--- a/hw/usb/hcd-xhci.c
+++ b/hw/usb/hcd-xhci.c
@@ -3342,14 +3342,14 @@ static int usb_xhci_initfn(struct PCIDevice *dev)
xhci->irq = xhci->pci_dev.irq[0];
- memory_region_init(&xhci->mem, NULL, "xhci", LEN_REGS);
- memory_region_init_io(&xhci->mem_cap, NULL, &xhci_cap_ops, xhci,
+ memory_region_init(&xhci->mem, OBJECT(xhci), "xhci", LEN_REGS);
+ memory_region_init_io(&xhci->mem_cap, OBJECT(xhci), &xhci_cap_ops, xhci,
"capabilities", LEN_CAP);
- memory_region_init_io(&xhci->mem_oper, NULL, &xhci_oper_ops, xhci,
+ memory_region_init_io(&xhci->mem_oper, OBJECT(xhci), &xhci_oper_ops, xhci,
"operational", 0x400);
- memory_region_init_io(&xhci->mem_runtime, NULL, &xhci_runtime_ops, xhci,
+ memory_region_init_io(&xhci->mem_runtime, OBJECT(xhci), &xhci_runtime_ops, xhci,
"runtime", LEN_RUNTIME);
- memory_region_init_io(&xhci->mem_doorbell, NULL, &xhci_doorbell_ops, xhci,
+ memory_region_init_io(&xhci->mem_doorbell, OBJECT(xhci), &xhci_doorbell_ops, xhci,
"doorbell", LEN_DOORBELL);
memory_region_add_subregion(&xhci->mem, 0, &xhci->mem_cap);
@@ -3361,7 +3361,7 @@ static int usb_xhci_initfn(struct PCIDevice *dev)
XHCIPort *port = &xhci->ports[i];
uint32_t offset = OFF_OPER + 0x400 + 0x10 * i;
port->xhci = xhci;
- memory_region_init_io(&port->mem, NULL, &xhci_port_ops, port,
+ memory_region_init_io(&port->mem, OBJECT(xhci), &xhci_port_ops, port,
port->name, 0x10);
memory_region_add_subregion(&xhci->mem, offset, &port->mem);
}
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index c8ecc8e..c38cfd1 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -966,8 +966,8 @@ static void virtio_pci_device_plugged(DeviceState *d)
size = 1 << qemu_fls(size);
}
- memory_region_init_io(&proxy->bar, NULL, &virtio_pci_config_ops, proxy,
- "virtio-pci", size);
+ memory_region_init_io(&proxy->bar, OBJECT(proxy), &virtio_pci_config_ops,
+ proxy, "virtio-pci", size);
pci_register_bar(&proxy->pci_dev, 0, PCI_BASE_ADDRESS_SPACE_IO,
&proxy->bar);
diff --git a/hw/watchdog/wdt_i6300esb.c b/hw/watchdog/wdt_i6300esb.c
index 2c75014..85aebc2 100644
--- a/hw/watchdog/wdt_i6300esb.c
+++ b/hw/watchdog/wdt_i6300esb.c
@@ -417,7 +417,8 @@ static int i6300esb_init(PCIDevice *dev)
d->timer = qemu_new_timer_ns(vm_clock, i6300esb_timer_expired, d);
d->previous_reboot_flag = 0;
- memory_region_init_io(&d->io_mem, NULL, &i6300esb_ops, d, "i6300esb", 0x10);
+ memory_region_init_io(&d->io_mem, OBJECT(d), &i6300esb_ops, d,
+ "i6300esb", 0x10);
pci_register_bar(&d->dev, 0, 0, &d->io_mem);
/* qemu_register_coalesced_mmio (addr, 0x10); ? */
diff --git a/hw/xen/xen_apic.c b/hw/xen/xen_apic.c
index 3526ffe..9f91e0f 100644
--- a/hw/xen/xen_apic.c
+++ b/hw/xen/xen_apic.c
@@ -38,8 +38,8 @@ static const MemoryRegionOps xen_apic_io_ops = {
static void xen_apic_init(APICCommonState *s)
{
- memory_region_init_io(&s->io_memory, NULL, &xen_apic_io_ops, s, "xen-apic-msi",
- APIC_SPACE_SIZE);
+ memory_region_init_io(&s->io_memory, OBJECT(s), &xen_apic_io_ops, s,
+ "xen-apic-msi", APIC_SPACE_SIZE);
#if defined(CONFIG_XEN_CTRL_INTERFACE_VERSION) \
&& CONFIG_XEN_CTRL_INTERFACE_VERSION >= 420
diff --git a/hw/xen/xen_platform.c b/hw/xen/xen_platform.c
index 8855309..15d7cf0 100644
--- a/hw/xen/xen_platform.c
+++ b/hw/xen/xen_platform.c
@@ -275,7 +275,7 @@ static const MemoryRegionOps platform_fixed_io_ops = {
static void platform_fixed_ioport_init(PCIXenPlatformState* s)
{
- memory_region_init_io(&s->fixed_io, NULL, &platform_fixed_io_ops, s,
+ memory_region_init_io(&s->fixed_io, OBJECT(s), &platform_fixed_io_ops, s,
"xen-fixed", 16);
memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT,
&s->fixed_io);
@@ -319,7 +319,8 @@ static const MemoryRegionOps xen_pci_io_ops = {
static void platform_ioport_bar_setup(PCIXenPlatformState *d)
{
- memory_region_init_io(&d->bar, NULL, &xen_pci_io_ops, d, "xen-pci", 0x100);
+ memory_region_init_io(&d->bar, OBJECT(d), &xen_pci_io_ops, d,
+ "xen-pci", 0x100);
}
static uint64_t platform_mmio_read(void *opaque, hwaddr addr,
@@ -347,7 +348,7 @@ static const MemoryRegionOps platform_mmio_handler = {
static void platform_mmio_setup(PCIXenPlatformState *d)
{
- memory_region_init_io(&d->mmio_bar, NULL, &platform_mmio_handler, d,
+ memory_region_init_io(&d->mmio_bar, OBJECT(d), &platform_mmio_handler, d,
"xen-mmio", 0x1000000);
}
diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
index c06a018..d7ee774 100644
--- a/hw/xen/xen_pt.c
+++ b/hw/xen/xen_pt.c
@@ -416,7 +416,7 @@ static int xen_pt_register_regions(XenPCIPassthroughState *s)
}
}
- memory_region_init_io(&s->bar[i], NULL, &ops, &s->dev,
+ memory_region_init_io(&s->bar[i], OBJECT(s), &ops, &s->dev,
"xen-pci-pt-bar", r->size);
pci_register_bar(&s->dev, i, type, &s->bar[i]);
@@ -440,7 +440,7 @@ static int xen_pt_register_regions(XenPCIPassthroughState *s)
s->bases[PCI_ROM_SLOT].access.maddr = d->rom.base_addr;
- memory_region_init_rom_device(&s->rom, NULL, NULL, NULL,
+ memory_region_init_rom_device(&s->rom, OBJECT(s), NULL, NULL,
"xen-pci-pt-rom", d->rom.size);
pci_register_bar(&s->dev, PCI_ROM_SLOT, PCI_BASE_ADDRESS_MEM_PREFETCH,
&s->rom);
diff --git a/hw/xen/xen_pt_msi.c b/hw/xen/xen_pt_msi.c
index 9c7d43b..6fbe0cc 100644
--- a/hw/xen/xen_pt_msi.c
+++ b/hw/xen/xen_pt_msi.c
@@ -544,7 +544,8 @@ int xen_pt_msix_init(XenPCIPassthroughState *s, uint32_t base)
msix->msix_entry[i].pirq = XEN_PT_UNASSIGNED_PIRQ;
}
- memory_region_init_io(&msix->mmio, NULL, &pci_msix_ops, s, "xen-pci-pt-msix",
+ memory_region_init_io(&msix->mmio, OBJECT(s), &pci_msix_ops,
+ s, "xen-pci-pt-msix",
(total_entries * PCI_MSIX_ENTRY_SIZE
+ XC_PAGE_SIZE - 1)
& XC_PAGE_MASK);
diff --git a/hw/xtensa/xtensa_lx60.c b/hw/xtensa/xtensa_lx60.c
index 11c30c2..075daf1 100644
--- a/hw/xtensa/xtensa_lx60.c
+++ b/hw/xtensa/xtensa_lx60.c
@@ -139,7 +139,7 @@ static void lx60_net_init(MemoryRegion *address_space,
sysbus_mmio_get_region(s, 1));
ram = g_malloc(sizeof(*ram));
- memory_region_init_ram(ram, NULL, "open_eth.ram", 16384);
+ memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space, buffers, ram);
}
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 54/66] add a header file for atomic operations
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (51 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 53/66] hw/[u-x]*: " Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-10-20 16:20 ` Peter Maydell
2013-07-04 15:13 ` [Qemu-devel] [PATCH 55/66] memory: access FlatView from a local variable Paolo Bonzini
` (12 subsequent siblings)
65 siblings, 1 reply; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
We're already using them in several places, but __sync builtins are just
too ugly to type, and do not provide seqcst load/store operations.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
docs/atomics.txt | 352 +++++++++++++++++++++++++++++++++++++++++++++++
hw/display/qxl.c | 3 +-
hw/virtio/vhost.c | 9 +-
include/qemu/atomic.h | 198 +++++++++++++++++++++-----
migration.c | 3 +-
tests/test-thread-pool.c | 8 +-
6 files changed, 529 insertions(+), 44 deletions(-)
create mode 100644 docs/atomics.txt
diff --git a/docs/atomics.txt b/docs/atomics.txt
new file mode 100644
index 0000000..6f2997b
--- /dev/null
+++ b/docs/atomics.txt
@@ -0,0 +1,352 @@
+CPUs perform independent memory operations effectively in random order.
+but this can be a problem for CPU-CPU interaction (including interactions
+between QEMU and the guest). Multi-threaded programs use various tools
+to instruct the compiler and the CPU to restrict the order to something
+that is consistent with the expectations of the programmer.
+
+The most basic tool is locking. Mutexes, condition variables and
+semaphores are used in QEMU, and should be the default approach to
+synchronization. Anything else is considerably harder, but it's
+also justified more often than one would like. The two tools that
+are provided by qemu/atomic.h are memory barriers and atomic operations.
+
+Macros defined by qemu/atomic.h fall in three camps:
+
+- compiler barriers: barrier();
+
+- weak atomic access and manual memory barriers: atomic_read(),
+ atomic_set(), smp_rmb(), smp_wmb(), smp_mb(), smp_read_barrier_depends();
+
+- sequentially consistent atomic access: everything else.
+
+
+COMPILER MEMORY BARRIER
+=======================
+
+barrier() prevents the compiler from moving the memory accesses either
+side of it to the other side. The compiler barrier has no direct effect
+on the CPU, which may then reorder things however it wishes.
+
+barrier() is mostly used within qemu/atomic.h itself. On some
+architectures, CPU guarantees are strong enough that blocking compiler
+optimizations already ensures the correct order of execution. In this
+case, qemu/atomic.h will reduce stronger memory barriers to simple
+compiler barriers.
+
+Still, barrier() can be useful when writing code that can be interrupted
+by signal handlers.
+
+
+SEQUENTIALLY CONSISTENT ATOMIC ACCESS
+=====================================
+
+Most of the operations in the qemu/atomic.h header ensure *sequential
+consistency*, where "the result of any execution is the same as if the
+operations of all the processors were executed in some sequential order,
+and the operations of each individual processor appear in this sequence
+in the order specified by its program".
+
+qemu/atomic.h provides the following set of atomic read-modify-write
+operations:
+
+ void atomic_inc(ptr)
+ void atomic_dec(ptr)
+ void atomic_add(ptr, val)
+ void atomic_sub(ptr, val)
+ void atomic_and(ptr, val)
+ void atomic_or(ptr, val)
+
+ typeof(*ptr) atomic_fetch_inc(ptr)
+ typeof(*ptr) atomic_fetch_dec(ptr)
+ typeof(*ptr) atomic_fetch_add(ptr, val)
+ typeof(*ptr) atomic_fetch_sub(ptr, val)
+ typeof(*ptr) atomic_fetch_and(ptr, val)
+ typeof(*ptr) atomic_fetch_or(ptr, val)
+ typeof(*ptr) atomic_xchg(ptr, val
+ typeof(*ptr) atomic_cmpxchg(ptr, old, new)
+
+all of which return the old value of *ptr. These operations are
+polymorphic; they operate on any type that is as wide as an int.
+
+Sequentially consistent loads and stores can be done using:
+
+ atomic_fetch_add(ptr, 0) for loads
+ atomic_xchg(ptr, val) for stores
+
+However, they are quite expensive on some platforms, notably POWER and
+ARM. Therefore, qemu/atomic.h provides two primitives with slightly
+weaker constraints:
+
+ typeof(*ptr) atomic_mb_read(ptr)
+ void atomic_mb_set(ptr, val)
+
+The semantics of these primitives map to Java volatile variables,
+and are strongly related to memory barriers as used in the Linux
+kernel (see below).
+
+As long as you use atomic_mb_read and atomic_mb_set, accesses cannot
+be reordered with each other, and it is also not possible to reorder
+"normal" accesses around them.
+
+However, and this is the important difference between
+atomic_mb_read/atomic_mb_set and sequential consistency, it is important
+for both threads to access the same volatile variable. It is not the
+case that everything visible to thread A when it writes volatile field f
+becomes visible to thread B after it reads volatile field g. The store
+and load have to "match" (i.e., be performed on the same volatile
+field) to achieve the right semantics.
+
+
+These operations operate on any type that is as wide as an int or smaller.
+
+
+WEAK ATOMIC ACCESS AND MANUAL MEMORY BARRIERS
+=============================================
+
+Compared to sequentially consistent atomic access, programming with
+weaker consistency models can be considerably more complicated.
+In general, if the algorithm you are writing includes both writes
+and reads on the same side, it is generally simpler to use sequentially
+consistent primitives.
+
+When using this model, variables are accessed with atomic_read() and
+atomic_set(), and restrictions to the ordering of accesses is enforced
+using the smp_rmb(), smp_wmb(), smp_mb() and smp_read_barrier_depends()
+memory barriers.
+
+atomic_read() and atomic_set() prevents the compiler from using
+optimizations that might otherwise optimize accesses out of existence
+on the one hand, or that might create unsolicited accesses on the other.
+In general this should not have any effect, because the same compiler
+barriers are already implied by memory barriers. However, it is useful
+to do so, because it tells readers which variables are shared with
+other threads, and which are local to the current thread or protected
+by other, more mundane means.
+
+Memory barriers control the order of references to shared memory.
+They come in four kinds:
+
+- smp_rmb() guarantees that all the LOAD operations specified before
+ the barrier will appear to happen before all the LOAD operations
+ specified after the barrier with respect to the other components of
+ the system.
+
+ In other words, smp_rmb() puts a partial ordering on loads, but is not
+ required to have any effect on stores.
+
+- smp_wmb() guarantees that all the STORE operations specified before
+ the barrier will appear to happen before all the STORE operations
+ specified after the barrier with respect to the other components of
+ the system.
+
+ In other words, smp_wmb() puts a partial ordering on stores, but is not
+ required to have any effect on loads.
+
+- smp_mb() guarantees that all the LOAD and STORE operations specified
+ before the barrier will appear to happen before all the LOAD and
+ STORE operations specified after the barrier with respect to the other
+ components of the system.
+
+ smp_mb() puts a partial ordering on both loads and stores. It is
+ stronger than both a read and a write memory barrier; it implies both
+ smp_rmb() and smp_wmb(), but it also prevents STOREs coming before the
+ barrier from overtaking LOADs coming after the barrier and vice versa.
+
+- smp_read_barrier_depends() is a weaker kind of read barrier. On
+ most processors, whenever two loads are performed such that the
+ second depends on the result of the first (e.g., the first load
+ retrieves the address to which the second load will be directed),
+ the processor will guarantee that the first LOAD will appear to happen
+ before the second with respect to the other components of the system.
+ However, this is not always true---for example, it was not true on
+ Alpha processors. Whenever this kind of access happens to shared
+ memory (that is not protected by a lock), a read barrier is needed,
+ and smp_read_barrier_depends() can be used instead of smp_rmb().
+
+ Note that the first load really has to have a _data_ dependency and not
+ a control dependency. If the address for the second load is dependent
+ on the first load, but the dependency is through a conditional rather
+ than actually loading the address itself, then it's a _control_
+ dependency and a full read barrier or better is required.
+
+
+This is the set of barriers that is required *between* two atomic_read()
+and atomic_set() operations to achieve sequential consistency:
+
+ | 2nd operation |
+ |-----------------------------------------|
+ 1st operation | (after last) | atomic_read | atomic_set |
+ ---------------+--------------+-------------+------------|
+ (before first) | | none | smp_wmb() |
+ ---------------+--------------+-------------+------------|
+ atomic_read | smp_rmb() | smp_rmb()* | ** |
+ ---------------+--------------+-------------+------------|
+ atomic_set | none | smp_mb()*** | smp_wmb() |
+ ---------------+--------------+-------------+------------|
+
+ * Or smp_read_barrier_depends().
+
+ ** This requires a load-store barrier. How to achieve this varies
+ depending on the machine, but in practice smp_rmb()+smp_wmb()
+ should have the desired effect. For example, on PowerPC the
+ lwsync instruction is a combined load-load, load-store and
+ store-store barrier.
+
+ *** This requires a store-load barrier. On most machines, the only
+ way to achieve this is a full barrier.
+
+
+You can see that the two possible definitions of atomic_mb_read()
+and atomic_mb_set() are the following:
+
+ 1) atomic_mb_read(p) = atomic_read(p); smp_rmb()
+ atomic_mb_set(p, v) = smp_wmb(); atomic_set(p, v); smp_mb()
+
+ 2) atomic_mb_read(p) = smp_mb() atomic_read(p); smp_rmb()
+ atomic_mb_set(p, v) = smp_wmb(); atomic_set(p, v);
+
+Usually the former is used, because smp_mb() is expensive and a program
+normally has more reads than writes. Therefore it makes more sense to
+make atomic_mb_set() the more expensive operation.
+
+There are two common cases in which atomic_mb_read and atomic_mb_set
+generate too many memory barriers, and thus it can be useful to manually
+place barriers instead:
+
+- when a data structure has one thread that is always a writer
+ and one thread that is always a reader, manual placement of
+ memory barriers makes the write side faster. Furthermore,
+ correctness is easy to check for in this case using the "pairing"
+ trick that is explained below:
+
+ thread 1 thread 1
+ ------------------------- ------------------------
+ (other writes)
+ smp_wmb()
+ atomic_mb_set(&a, x) atomic_set(&a, x)
+ smp_wmb()
+ atomic_mb_set(&b, y) atomic_set(&b, y)
+
+ =>
+ thread 2 thread 2
+ ------------------------- ------------------------
+ y = atomic_mb_read(&b) y = atomic_read(&b)
+ smp_rmb()
+ x = atomic_mb_read(&a) x = atomic_read(&a)
+ smp_rmb()
+
+- sometimes, a thread is accessing many variables that are otherwise
+ unrelated to each other (for example because, apart from the current
+ thread, exactly one other thread will read or write each of these
+ variables). In this case, it is possible to "hoist" the implicit
+ barriers provided by atomic_mb_read() and atomic_mb_set() outside
+ a loop. For example, the above definition atomic_mb_read() gives
+ the following transformation:
+
+ n = 0; n = 0;
+ for (i = 0; i < 10; i++) => for (i = 0; i < 10; i++)
+ n += atomic_mb_read(&a[i]); n += atomic_read(&a[i]);
+ smp_rmb();
+
+ Similarly, atomic_mb_set() can be transformed as follows:
+ smp_mb():
+
+ smp_wmb();
+ for (i = 0; i < 10; i++) => for (i = 0; i < 10; i++)
+ atomic_mb_set(&a[i], false); atomic_set(&a[i], false);
+ smp_mb();
+
+
+The two tricks can be combined. In this case, splitting a loop in
+two lets you hoist the barriers out of the loops _and_ eliminate the
+expensive smp_mb():
+
+ smp_wmb();
+ for (i = 0; i < 10; i++) { => for (i = 0; i < 10; i++)
+ atomic_mb_set(&a[i], false); atomic_set(&a[i], false);
+ atomic_mb_set(&b[i], false); smb_wmb();
+ } for (i = 0; i < 10; i++)
+ atomic_set(&a[i], false);
+ smp_mb();
+
+ The other thread can still use atomic_mb_read()/atomic_mb_set()
+
+
+Memory barrier pairing
+----------------------
+
+A useful rule of thumb is that memory barriers should always, or almost
+always, be paired with another barrier. In the case of QEMU, however,
+note that the other barrier may actually be in a driver that runs in
+the guest!
+
+For the purposes of pairing, smp_read_barrier_depends() and smp_rmb()
+both count as read barriers. A read barriers shall pair with a write
+barrier or a full barrier; a write barrier shall pair with a read
+barrier or a full barrier. A full barrier can pair with anything.
+For example:
+
+ thread 1 thread 2
+ =============== ===============
+ a = 1;
+ smp_wmb();
+ b = 2; x = b;
+ smp_rmb();
+ y = a;
+
+Note that the "writing" thread are accessing the variables in the
+opposite order as the "reading" thread. This is expected: stores
+before the write barrier will normally match the loads after the
+read barrier, and vice versa. The same is true for more than 2
+access and for data dependency barriers:
+
+ thread 1 thread 2
+ =============== ===============
+ b[2] = 1;
+ smp_wmb();
+ x->i = 2;
+ smp_wmb();
+ a = x; x = a;
+ smp_read_barrier_depends();
+ y = x->i;
+ smp_read_barrier_depends();
+ z = b[y];
+
+smp_wmb() also pairs with atomic_mb_read(), and smp_rmb() also pairs
+with atomic_mb_set().
+
+
+COMPARISON WITH LINUX KERNEL MEMORY BARRIERS
+============================================
+
+Here is a list of differences between Linux kernel atomic operations
+and memory barriers, and the equivalents in QEMU:
+
+- atomic operations in Linux are always on a 32-bit int type and
+ use a boxed atomic_t type; atomic operations in QEMU are polymorphic
+ and use normal C types.
+
+- atomic_read and atomic_set in Linux give no guarantee at all;
+ atomic_read and atomic_set in QEMU include a compiler barrier
+ (similar to the ACCESS_ONCE macro in Linux).
+
+- most atomic read-modify-write operations in Linux return void;
+ in QEMU, all of them return the old value of the variable.
+
+- different atomic read-modify-write operations in Linux imply
+ a different set of memory barriers; in QEMU, all of them enforce
+ sequential consistency, which means they imply full memory barriers
+ before and after the operation.
+
+- Linux does not have an equivalent of atomic_mb_read() and
+ atomic_mb_set(). In particular, note that set_mb() is a little
+ weaker than atomic_mb_set().
+
+
+SOURCES
+=======
+
+* Documentation/memory-barriers.txt from the Linux kernel
+
+* "The JSR-133 Cookbook for Compiler Writers", available at
+ http://g.oswego.edu/dl/jmm/cookbook.html
diff --git a/hw/display/qxl.c b/hw/display/qxl.c
index 3862d7a..ddefa06 100644
--- a/hw/display/qxl.c
+++ b/hw/display/qxl.c
@@ -23,6 +23,7 @@
#include "qemu-common.h"
#include "qemu/timer.h"
#include "qemu/queue.h"
+#include "qemu/atomic.h"
#include "monitor/monitor.h"
#include "sysemu/sysemu.h"
#include "trace.h"
@@ -1726,7 +1727,7 @@ static void qxl_send_events(PCIQXLDevice *d, uint32_t events)
trace_qxl_send_events_vm_stopped(d->id, events);
return;
}
- old_pending = __sync_fetch_and_or(&d->ram->int_pending, le_events);
+ old_pending = atomic_fetch_or(&d->ram->int_pending, le_events);
if ((old_pending & le_events) == le_events) {
return;
}
diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c
index 96ab625..8f6ab13 100644
--- a/hw/virtio/vhost.c
+++ b/hw/virtio/vhost.c
@@ -16,6 +16,7 @@
#include <sys/ioctl.h>
#include "hw/virtio/vhost.h"
#include "hw/hw.h"
+#include "qemu/atomic.h"
#include "qemu/range.h"
#include <linux/vhost.h>
#include "exec/address-spaces.h"
@@ -47,11 +48,9 @@ static void vhost_dev_sync_region(struct vhost_dev *dev,
addr += VHOST_LOG_CHUNK;
continue;
}
- /* Data must be read atomically. We don't really
- * need the barrier semantics of __sync
- * builtins, but it's easier to use them than
- * roll our own. */
- log = __sync_fetch_and_and(from, 0);
+ /* Data must be read atomically. We don't really need barrier semantics
+ * but it's easier to use atomic_* than roll our own. */
+ log = atomic_xchg(from, 0);
while ((bit = sizeof(log) > sizeof(int) ?
ffsll(log) : ffs(log))) {
hwaddr page_addr;
diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h
index 10becb6..0aa8913 100644
--- a/include/qemu/atomic.h
+++ b/include/qemu/atomic.h
@@ -1,68 +1,202 @@
-#ifndef __QEMU_BARRIER_H
-#define __QEMU_BARRIER_H 1
+/*
+ * Simple interface for atomic operations.
+ *
+ * Copyright (C) 2013 Red Hat, Inc.
+ *
+ * Author: Paolo Bonzini <pbonzini@redhat.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ */
-/* Compiler barrier */
-#define barrier() asm volatile("" ::: "memory")
+#ifndef __QEMU_ATOMIC_H
+#define __QEMU_ATOMIC_H 1
-#if defined(__i386__)
+#include "qemu/compiler.h"
-#include "qemu/compiler.h" /* QEMU_GNUC_PREREQ */
+/* For C11 atomic ops */
-/*
- * Because of the strongly ordered x86 storage model, wmb() and rmb() are nops
- * on x86(well, a compiler barrier only). Well, at least as long as
- * qemu doesn't do accesses to write-combining memory or non-temporal
- * load/stores from C code.
- */
-#define smp_wmb() barrier()
-#define smp_rmb() barrier()
+/* Compiler barrier */
+#define barrier() ({ asm volatile("" ::: "memory"); (void)0; })
+
+#ifndef __ATOMIC_RELAXED
/*
- * We use GCC builtin if it's available, as that can use
- * mfence on 32 bit as well, e.g. if built with -march=pentium-m.
- * However, on i386, there seem to be known bugs as recently as 4.3.
- * */
-#if QEMU_GNUC_PREREQ(4, 4)
-#define smp_mb() __sync_synchronize()
+ * We use GCC builtin if it's available, as that can use mfence on
+ * 32-bit as well, e.g. if built with -march=pentium-m. However, on
+ * i386 the spec is buggy, and the implementation followed it until
+ * 4.3 (http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36793).
+ */
+#if defined(__i386__) || defined(__x86_64__)
+#if !QEMU_GNUC_PREREQ(4, 4)
+#if defined __x86_64__
+#define smp_mb() ({ asm volatile("mfence" ::: "memory"); (void)0; })
#else
-#define smp_mb() asm volatile("lock; addl $0,0(%%esp) " ::: "memory")
+#define smp_mb() ({ asm volatile("lock; addl $0,0(%%esp) " ::: "memory"); (void)0; })
+#endif
+#endif
+#endif
+
+
+#ifdef __alpha__
+#define smp_read_barrier_depends() asm volatile("mb":::"memory")
#endif
-#elif defined(__x86_64__)
+#if defined(__i386__) || defined(__x86_64__) || defined(__s390x__)
+/*
+ * Because of the strongly ordered storage model, wmb() and rmb() are nops
+ * here (a compiler barrier only). QEMU doesn't do accesses to write-combining
+ * qemu memory or non-temporal load/stores from C code.
+ */
#define smp_wmb() barrier()
#define smp_rmb() barrier()
-#define smp_mb() asm volatile("mfence" ::: "memory")
+
+/*
+ * __sync_lock_test_and_set() is documented to be an acquire barrier only,
+ * but it is a full barrier at the hardware level. Add a compiler barrier
+ * to make it a full barrier also at the compiler level.
+ */
+#define atomic_xchg(ptr, i) (barrier(), __sync_lock_test_and_set(ptr, i))
+
+/*
+ * Load/store with Java volatile semantics.
+ */
+#define atomic_mb_set(ptr, i) ((void)atomic_xchg(ptr, i))
#elif defined(_ARCH_PPC)
/*
* We use an eieio() for wmb() on powerpc. This assumes we don't
* need to order cacheable and non-cacheable stores with respect to
- * each other
+ * each other.
+ *
+ * smp_mb has the same problem as on x86 for not-very-new GCC
+ * (http://patchwork.ozlabs.org/patch/126184/, Nov 2011).
*/
-#define smp_wmb() asm volatile("eieio" ::: "memory")
-
+#define smp_wmb() ({ asm volatile("eieio" ::: "memory"); (void)0; })
#if defined(__powerpc64__)
-#define smp_rmb() asm volatile("lwsync" ::: "memory")
+#define smp_rmb() ({ asm volatile("lwsync" ::: "memory"); (void)0; })
#else
-#define smp_rmb() asm volatile("sync" ::: "memory")
+#define smp_rmb() ({ asm volatile("sync" ::: "memory"); (void)0; })
#endif
+#define smp_mb() ({ asm volatile("sync" ::: "memory"); (void)0; })
-#define smp_mb() asm volatile("sync" ::: "memory")
+#endif /* _ARCH_PPC */
-#else
+#endif /* C11 atomics */
/*
* For (host) platforms we don't have explicit barrier definitions
* for, we use the gcc __sync_synchronize() primitive to generate a
* full barrier. This should be safe on all platforms, though it may
- * be overkill for wmb() and rmb().
+ * be overkill for smp_wmb() and smp_rmb().
*/
+#ifndef smp_mb
+#define smp_mb() __sync_synchronize()
+#endif
+
+#ifndef smp_wmb
+#ifdef __ATOMIC_RELEASE
+#define smp_wmb() __atomic_thread_fence(__ATOMIC_RELEASE)
+#else
#define smp_wmb() __sync_synchronize()
-#define smp_mb() __sync_synchronize()
+#endif
+#endif
+
+#ifndef smp_rmb
+#ifdef __ATOMIC_ACQUIRE
+#define smp_rmb() __atomic_thread_fence(__ATOMIC_ACQUIRE)
+#else
#define smp_rmb() __sync_synchronize()
+#endif
+#endif
+
+#ifndef smp_read_barrier_depends
+#ifdef __ATOMIC_CONSUME
+#define smp_read_barrier_depends() __atomic_thread_fence(__ATOMIC_CONSUME)
+#else
+#define smp_read_barrier_depends() barrier()
+#endif
+#endif
+#ifndef atomic_read
+#define atomic_read(ptr) (*(__typeof__(*ptr) *volatile) (ptr))
#endif
+#ifndef atomic_set
+#define atomic_set(ptr, i) ((*(__typeof__(*ptr) *volatile) (ptr)) = (i))
+#endif
+
+/* These have the same semantics as Java volatile variables.
+ * See http://gee.cs.oswego.edu/dl/jmm/cookbook.html:
+ * "1. Issue a StoreStore barrier (wmb) before each volatile store."
+ * 2. Issue a StoreLoad barrier after each volatile store.
+ * Note that you could instead issue one before each volatile load, but
+ * this would be slower for typical programs using volatiles in which
+ * reads greatly outnumber writes. Alternatively, if available, you
+ * can implement volatile store as an atomic instruction (for example
+ * XCHG on x86) and omit the barrier. This may be more efficient if
+ * atomic instructions are cheaper than StoreLoad barriers.
+ * 3. Issue LoadLoad and LoadStore barriers after each volatile load."
+ *
+ * If you prefer to think in terms of "pairing" of memory barriers,
+ * an atomic_mb_read pairs with an atomic_mb_set.
+ *
+ * And for the few ia64 lovers that exist, an atomic_mb_read is a ld.acq,
+ * while an atomic_mb_set is a st.rel followed by a memory barrier.
+ *
+ * These are a bit weaker than __atomic_load/store with __ATOMIC_SEQ_CST
+ * (see docs/atomics.txt), and I'm not sure that __ATOMIC_ACQ_REL is enough.
+ * Just always use the barriers manually by the rules above.
+ */
+#ifndef atomic_mb_read
+#define atomic_mb_read(ptr) ({ \
+ typeof(*ptr) _val = atomic_read(ptr); \
+ smp_rmb(); \
+ _val; \
+})
+#endif
+
+#ifndef atomic_mb_set
+#define atomic_mb_set(ptr, i) do { \
+ smp_wmb(); \
+ atomic_set(ptr, i); \
+ smp_mb(); \
+} while (0)
+#endif
+
+#ifndef atomic_xchg
+#ifdef __ATOMIC_SEQ_CST
+#define atomic_xchg(ptr, i) ({ \
+ typeof(*ptr) _new = (i), _old; \
+ __atomic_exchange(ptr, &_new, &_old, __ATOMIC_SEQ_CST); \
+ _old; \
+})
+#elif defined __clang__
+#define atomic_xchg(ptr, i) __sync_exchange(ptr, i)
+#else
+/* __sync_lock_test_and_set() is documented to be an acquire barrier only. */
+#define atomic_xchg(ptr, i) (smp_mb(), __sync_lock_test_and_set(ptr, i))
+#endif
+#endif
+
+/* Provide shorter names for GCC atomic builtins. */
+#define atomic_fetch_inc(ptr) __sync_fetch_and_add(ptr, 1)
+#define atomic_fetch_dec(ptr) __sync_fetch_and_add(ptr, -1)
+#define atomic_fetch_add __sync_fetch_and_add
+#define atomic_fetch_sub __sync_fetch_and_sub
+#define atomic_fetch_and __sync_fetch_and_and
+#define atomic_fetch_or __sync_fetch_and_or
+#define atomic_cmpxchg __sync_val_compare_and_swap
+
+/* And even shorter names that return void. */
+#define atomic_inc(ptr) ((void) __sync_fetch_and_add(ptr, 1))
+#define atomic_dec(ptr) ((void) __sync_fetch_and_add(ptr, -1))
+#define atomic_add(ptr, n) ((void) __sync_fetch_and_add(ptr, n))
+#define atomic_sub(ptr, n) ((void) __sync_fetch_and_sub(ptr, n))
+#define atomic_and(ptr, n) ((void) __sync_fetch_and_and(ptr, n))
+#define atomic_or(ptr, n) ((void) __sync_fetch_and_or(ptr, n))
+
#endif
diff --git a/migration.c b/migration.c
index a704d48..635a7e7 100644
--- a/migration.c
+++ b/migration.c
@@ -293,8 +293,7 @@ static void migrate_fd_cleanup(void *opaque)
static void migrate_finish_set_state(MigrationState *s, int new_state)
{
- if (__sync_val_compare_and_swap(&s->state, MIG_STATE_ACTIVE,
- new_state) == new_state) {
+ if (atomic_cmpxchg(&s->state, MIG_STATE_ACTIVE, new_state) == new_state) {
trace_migrate_set_state(new_state);
}
}
diff --git a/tests/test-thread-pool.c b/tests/test-thread-pool.c
index 22915aa..b62338f 100644
--- a/tests/test-thread-pool.c
+++ b/tests/test-thread-pool.c
@@ -17,15 +17,15 @@ typedef struct {
static int worker_cb(void *opaque)
{
WorkerTestData *data = opaque;
- return __sync_fetch_and_add(&data->n, 1);
+ return atomic_fetch_inc(&data->n);
}
static int long_cb(void *opaque)
{
WorkerTestData *data = opaque;
- __sync_fetch_and_add(&data->n, 1);
+ atomic_inc(&data->n);
g_usleep(2000000);
- __sync_fetch_and_add(&data->n, 1);
+ atomic_inc(&data->n);
return 0;
}
@@ -169,7 +169,7 @@ static void test_cancel(void)
/* Cancel the jobs that haven't been started yet. */
num_canceled = 0;
for (i = 0; i < 100; i++) {
- if (__sync_val_compare_and_swap(&data[i].n, 0, 3) == 0) {
+ if (atomic_cmpxchg(&data[i].n, 0, 3) == 0) {
data[i].ret = -ECANCELED;
bdrv_aio_cancel(data[i].aiocb);
active--;
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 55/66] memory: access FlatView from a local variable
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (52 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 54/66] add a header file for atomic operations Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 56/66] memory: use a new FlatView pointer on every topology update Paolo Bonzini
` (11 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
We will soon require accesses to as->current_map to be placed under
a lock (with reference counting so as to keep the critical section
small). To simplify this change, always fetch as->current_map into
a local variable and access it through that variable.
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
memory.c | 31 +++++++++++++++++++++----------
1 file changed, 21 insertions(+), 10 deletions(-)
diff --git a/memory.c b/memory.c
index 543e0cc..4449462 100644
--- a/memory.c
+++ b/memory.c
@@ -578,13 +578,15 @@ static void address_space_add_del_ioeventfds(AddressSpace *as,
static void address_space_update_ioeventfds(AddressSpace *as)
{
+ FlatView *view;
FlatRange *fr;
unsigned ioeventfd_nb = 0;
MemoryRegionIoeventfd *ioeventfds = NULL;
AddrRange tmp;
unsigned i;
- FOR_EACH_FLAT_RANGE(fr, as->current_map) {
+ view = as->current_map;
+ FOR_EACH_FLAT_RANGE(fr, view) {
for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
int128_sub(fr->addr.start,
@@ -1144,7 +1146,8 @@ void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
FlatRange *fr;
QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
- FOR_EACH_FLAT_RANGE(fr, as->current_map) {
+ FlatView *view = as->current_map;
+ FOR_EACH_FLAT_RANGE(fr, view) {
if (fr->mr == mr) {
MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
}
@@ -1194,12 +1197,14 @@ void *memory_region_get_ram_ptr(MemoryRegion *mr)
static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
{
+ FlatView *view;
FlatRange *fr;
CoalescedMemoryRange *cmr;
AddrRange tmp;
MemoryRegionSection section;
- FOR_EACH_FLAT_RANGE(fr, as->current_map) {
+ view = as->current_map;
+ FOR_EACH_FLAT_RANGE(fr, view) {
if (fr->mr == mr) {
section = (MemoryRegionSection) {
.address_space = as,
@@ -1490,9 +1495,9 @@ static int cmp_flatrange_addr(const void *addr_, const void *fr_)
return 0;
}
-static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
+static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
{
- return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
+ return bsearch(&addr, view->ranges, view->nr,
sizeof(FlatRange), cmp_flatrange_addr);
}
@@ -1513,6 +1518,7 @@ MemoryRegionSection memory_region_find(MemoryRegion *mr,
MemoryRegion *root;
AddressSpace *as;
AddrRange range;
+ FlatView *view;
FlatRange *fr;
addr += mr->addr;
@@ -1523,13 +1529,14 @@ MemoryRegionSection memory_region_find(MemoryRegion *mr,
as = memory_region_to_address_space(root);
range = addrrange_make(int128_make64(addr), int128_make64(size));
- fr = address_space_lookup(as, range);
+
+ view = as->current_map;
+ fr = flatview_lookup(view, range);
if (!fr) {
return ret;
}
- while (fr > as->current_map->ranges
- && addrrange_intersects(fr[-1].addr, range)) {
+ while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
--fr;
}
@@ -1549,9 +1556,11 @@ MemoryRegionSection memory_region_find(MemoryRegion *mr,
void address_space_sync_dirty_bitmap(AddressSpace *as)
{
+ FlatView *view;
FlatRange *fr;
- FOR_EACH_FLAT_RANGE(fr, as->current_map) {
+ view = as->current_map;
+ FOR_EACH_FLAT_RANGE(fr, view) {
MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
}
}
@@ -1571,6 +1580,7 @@ void memory_global_dirty_log_stop(void)
static void listener_add_address_space(MemoryListener *listener,
AddressSpace *as)
{
+ FlatView *view;
FlatRange *fr;
if (listener->address_space_filter
@@ -1584,7 +1594,8 @@ static void listener_add_address_space(MemoryListener *listener,
}
}
- FOR_EACH_FLAT_RANGE(fr, as->current_map) {
+ view = as->current_map;
+ FOR_EACH_FLAT_RANGE(fr, view) {
MemoryRegionSection section = {
.mr = fr->mr,
.address_space = as,
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 56/66] memory: use a new FlatView pointer on every topology update
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (53 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 55/66] memory: access FlatView from a local variable Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 57/66] memory: add reference counting to FlatView Paolo Bonzini
` (10 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
This is the first step towards converting as->current_map to
RCU-style updates, where the FlatView updates run concurrently
with uses of an old FlatView.
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
memory.c | 34 ++++++++++++++++++----------------
1 file changed, 18 insertions(+), 16 deletions(-)
diff --git a/memory.c b/memory.c
index 4449462..2774cc8 100644
--- a/memory.c
+++ b/memory.c
@@ -276,6 +276,7 @@ static void flatview_destroy(FlatView *view)
memory_region_unref(view->ranges[i].mr);
}
g_free(view->ranges);
+ g_free(view);
}
static bool can_merge(FlatRange *r1, FlatRange *r2)
@@ -512,17 +513,18 @@ static void render_memory_region(FlatView *view,
}
/* Render a memory topology into a list of disjoint absolute ranges. */
-static FlatView generate_memory_topology(MemoryRegion *mr)
+static FlatView *generate_memory_topology(MemoryRegion *mr)
{
- FlatView view;
+ FlatView *view;
- flatview_init(&view);
+ view = g_new(FlatView, 1);
+ flatview_init(view);
if (mr) {
- render_memory_region(&view, mr, int128_zero(),
+ render_memory_region(view, mr, int128_zero(),
addrrange_make(int128_zero(), int128_2_64()), false);
}
- flatview_simplify(&view);
+ flatview_simplify(view);
return view;
}
@@ -610,8 +612,8 @@ static void address_space_update_ioeventfds(AddressSpace *as)
}
static void address_space_update_topology_pass(AddressSpace *as,
- FlatView old_view,
- FlatView new_view,
+ const FlatView *old_view,
+ const FlatView *new_view,
bool adding)
{
unsigned iold, inew;
@@ -621,14 +623,14 @@ static void address_space_update_topology_pass(AddressSpace *as,
* Kill ranges in the old map, and instantiate ranges in the new map.
*/
iold = inew = 0;
- while (iold < old_view.nr || inew < new_view.nr) {
- if (iold < old_view.nr) {
- frold = &old_view.ranges[iold];
+ while (iold < old_view->nr || inew < new_view->nr) {
+ if (iold < old_view->nr) {
+ frold = &old_view->ranges[iold];
} else {
frold = NULL;
}
- if (inew < new_view.nr) {
- frnew = &new_view.ranges[inew];
+ if (inew < new_view->nr) {
+ frnew = &new_view->ranges[inew];
} else {
frnew = NULL;
}
@@ -674,14 +676,14 @@ static void address_space_update_topology_pass(AddressSpace *as,
static void address_space_update_topology(AddressSpace *as)
{
- FlatView old_view = *as->current_map;
- FlatView new_view = generate_memory_topology(as->root);
+ FlatView *old_view = as->current_map;
+ FlatView *new_view = generate_memory_topology(as->root);
address_space_update_topology_pass(as, old_view, new_view, false);
address_space_update_topology_pass(as, old_view, new_view, true);
- *as->current_map = new_view;
- flatview_destroy(&old_view);
+ as->current_map = new_view;
+ flatview_destroy(old_view);
address_space_update_ioeventfds(as);
}
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 57/66] memory: add reference counting to FlatView
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (54 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 56/66] memory: use a new FlatView pointer on every topology update Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 58/66] qom: Use atomics for object refcounting Paolo Bonzini
` (9 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
With this change, a FlatView can be used even after a concurrent
update has replaced it. Because we do not yet have RCU, we use a
mutex to protect the small critical sections that read/write the
as->current_map pointer. Accesses to the FlatView can be done
outside the mutex.
If a MemoryRegion will be used after the FlatView is unref-ed (or after
a MemoryListener callback is returned), a reference has to be added to
that MemoryRegion. memory_region_find already does it for the region
that it returns. The same will be done for address_space_translate
as soon as the dispatch tree is also converted to RCU-style.
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
memory.c | 79 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++--------
1 file changed, 69 insertions(+), 10 deletions(-)
diff --git a/memory.c b/memory.c
index 2774cc8..35553b5 100644
--- a/memory.c
+++ b/memory.c
@@ -29,12 +29,26 @@ static unsigned memory_region_transaction_depth;
static bool memory_region_update_pending;
static bool global_dirty_log = false;
+/* flat_view_mutex is taken around reading as->current_map; the critical
+ * section is extremely short, so I'm using a single mutex for every AS.
+ * We could also RCU for the read-side.
+ *
+ * The BQL is taken around transaction commits, hence both locks are taken
+ * while writing to as->current_map (with the BQL taken outside).
+ */
+static QemuMutex flat_view_mutex;
+
static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
= QTAILQ_HEAD_INITIALIZER(memory_listeners);
static QTAILQ_HEAD(, AddressSpace) address_spaces
= QTAILQ_HEAD_INITIALIZER(address_spaces);
+static void memory_init(void)
+{
+ qemu_mutex_init(&flat_view_mutex);
+}
+
typedef struct AddrRange AddrRange;
/*
@@ -225,6 +239,7 @@ struct FlatRange {
* order.
*/
struct FlatView {
+ unsigned ref;
FlatRange *ranges;
unsigned nr;
unsigned nr_allocated;
@@ -246,6 +261,7 @@ static bool flatrange_equal(FlatRange *a, FlatRange *b)
static void flatview_init(FlatView *view)
{
+ view->ref = 1;
view->ranges = NULL;
view->nr = 0;
view->nr_allocated = 0;
@@ -279,6 +295,18 @@ static void flatview_destroy(FlatView *view)
g_free(view);
}
+static void flatview_ref(FlatView *view)
+{
+ atomic_inc(&view->ref);
+}
+
+static void flatview_unref(FlatView *view)
+{
+ if (atomic_fetch_dec(&view->ref) == 1) {
+ flatview_destroy(view);
+ }
+}
+
static bool can_merge(FlatRange *r1, FlatRange *r2)
{
return int128_eq(addrrange_end(r1->addr), r2->addr.start)
@@ -578,6 +606,17 @@ static void address_space_add_del_ioeventfds(AddressSpace *as,
}
}
+static FlatView *address_space_get_flatview(AddressSpace *as)
+{
+ FlatView *view;
+
+ qemu_mutex_lock(&flat_view_mutex);
+ view = as->current_map;
+ flatview_ref(view);
+ qemu_mutex_unlock(&flat_view_mutex);
+ return view;
+}
+
static void address_space_update_ioeventfds(AddressSpace *as)
{
FlatView *view;
@@ -587,7 +626,7 @@ static void address_space_update_ioeventfds(AddressSpace *as)
AddrRange tmp;
unsigned i;
- view = as->current_map;
+ view = address_space_get_flatview(as);
FOR_EACH_FLAT_RANGE(fr, view) {
for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
@@ -609,6 +648,7 @@ static void address_space_update_ioeventfds(AddressSpace *as)
g_free(as->ioeventfds);
as->ioeventfds = ioeventfds;
as->ioeventfd_nb = ioeventfd_nb;
+ flatview_unref(view);
}
static void address_space_update_topology_pass(AddressSpace *as,
@@ -676,14 +716,25 @@ static void address_space_update_topology_pass(AddressSpace *as,
static void address_space_update_topology(AddressSpace *as)
{
- FlatView *old_view = as->current_map;
+ FlatView *old_view = address_space_get_flatview(as);
FlatView *new_view = generate_memory_topology(as->root);
address_space_update_topology_pass(as, old_view, new_view, false);
address_space_update_topology_pass(as, old_view, new_view, true);
+ qemu_mutex_lock(&flat_view_mutex);
+ flatview_unref(as->current_map);
as->current_map = new_view;
- flatview_destroy(old_view);
+ qemu_mutex_unlock(&flat_view_mutex);
+
+ /* Note that all the old MemoryRegions are still alive up to this
+ * point. This relieves most MemoryListeners from the need to
+ * ref/unref the MemoryRegions they get---unless they use them
+ * outside the iothread mutex, in which case precise reference
+ * counting is necessary.
+ */
+ flatview_unref(old_view);
+
address_space_update_ioeventfds(as);
}
@@ -1148,12 +1199,13 @@ void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
FlatRange *fr;
QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
- FlatView *view = as->current_map;
+ FlatView *view = address_space_get_flatview(as);
FOR_EACH_FLAT_RANGE(fr, view) {
if (fr->mr == mr) {
MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
}
}
+ flatview_unref(view);
}
}
@@ -1205,7 +1257,7 @@ static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpa
AddrRange tmp;
MemoryRegionSection section;
- view = as->current_map;
+ view = address_space_get_flatview(as);
FOR_EACH_FLAT_RANGE(fr, view) {
if (fr->mr == mr) {
section = (MemoryRegionSection) {
@@ -1231,6 +1283,7 @@ static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpa
}
}
}
+ flatview_unref(view);
}
static void memory_region_update_coalesced_range(MemoryRegion *mr)
@@ -1532,7 +1585,7 @@ MemoryRegionSection memory_region_find(MemoryRegion *mr,
as = memory_region_to_address_space(root);
range = addrrange_make(int128_make64(addr), int128_make64(size));
- view = as->current_map;
+ view = address_space_get_flatview(as);
fr = flatview_lookup(view, range);
if (!fr) {
return ret;
@@ -1553,6 +1606,7 @@ MemoryRegionSection memory_region_find(MemoryRegion *mr,
ret.readonly = fr->readonly;
memory_region_ref(ret.mr);
+ flatview_unref(view);
return ret;
}
@@ -1561,10 +1615,11 @@ void address_space_sync_dirty_bitmap(AddressSpace *as)
FlatView *view;
FlatRange *fr;
- view = as->current_map;
+ view = address_space_get_flatview(as);
FOR_EACH_FLAT_RANGE(fr, view) {
MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
}
+ flatview_unref(view);
}
void memory_global_dirty_log_start(void)
@@ -1596,7 +1651,7 @@ static void listener_add_address_space(MemoryListener *listener,
}
}
- view = as->current_map;
+ view = address_space_get_flatview(as);
FOR_EACH_FLAT_RANGE(fr, view) {
MemoryRegionSection section = {
.mr = fr->mr,
@@ -1610,6 +1665,7 @@ static void listener_add_address_space(MemoryListener *listener,
listener->region_add(listener, §ion);
}
}
+ flatview_unref(view);
}
void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
@@ -1643,6 +1699,10 @@ void memory_listener_unregister(MemoryListener *listener)
void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
{
+ if (QTAILQ_EMPTY(&address_spaces)) {
+ memory_init();
+ }
+
memory_region_transaction_begin();
as->root = root;
as->current_map = g_new(FlatView, 1);
@@ -1664,9 +1724,8 @@ void address_space_destroy(AddressSpace *as)
memory_region_transaction_commit();
QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
address_space_destroy_dispatch(as);
- flatview_destroy(as->current_map);
+ flatview_unref(as->current_map);
g_free(as->name);
- g_free(as->current_map);
g_free(as->ioeventfds);
}
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 58/66] qom: Use atomics for object refcounting
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (55 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 57/66] memory: add reference counting to FlatView Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 59/66] exec: change well-known physical sections to macros Paolo Bonzini
` (8 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka, Liu Ping Fan
From: Jan Kiszka <jan.kiszka@siemens.com>
Object reference counts will soon be changed outside the BQL. So we need
to use atomics in object_ref/unref.
Based on a patch by Liu Ping Fan.
Signed-off-by: Liu Ping Fan <qemulist@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
qom/object.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/qom/object.c b/qom/object.c
index 803b94b..cbd7e86 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -683,16 +683,15 @@ GSList *object_class_get_list(const char *implements_type,
void object_ref(Object *obj)
{
- obj->ref++;
+ atomic_inc(&obj->ref);
}
void object_unref(Object *obj)
{
g_assert(obj->ref > 0);
- obj->ref--;
/* parent always holds a reference to its children */
- if (obj->ref == 0) {
+ if (atomic_fetch_dec(&obj->ref) == 1) {
object_finalize(obj);
}
}
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 59/66] exec: change well-known physical sections to macros
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (56 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 58/66] qom: Use atomics for object refcounting Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 60/66] exec: separate current memory map from the one being built Paolo Bonzini
` (7 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Liu Ping Fan, Liu Ping Fan
From: Liu Ping Fan <qemulist@gmail.com>
Sections like phys_section_unassigned always have fixed address
in phys_sections. Declared as macro, so we can use them
when having more than one phys_sections array.
Signed-off-by: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
Signed-off-by: Liu Ping Fan <qemulist@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 34 ++++++++++++++++++++--------------
1 file changed, 20 insertions(+), 14 deletions(-)
diff --git a/exec.c b/exec.c
index b339c23..ada2ff2 100644
--- a/exec.c
+++ b/exec.c
@@ -107,10 +107,10 @@ typedef struct subpage_t {
static MemoryRegionSection *phys_sections;
static unsigned phys_sections_nb, phys_sections_nb_alloc;
-static uint16_t phys_section_unassigned;
-static uint16_t phys_section_notdirty;
-static uint16_t phys_section_rom;
-static uint16_t phys_section_watch;
+#define PHYS_SECTION_UNASSIGNED 0
+#define PHYS_SECTION_NOTDIRTY 1
+#define PHYS_SECTION_ROM 2
+#define PHYS_SECTION_WATCH 3
/* Simple allocator for PhysPageEntry nodes */
static PhysPageEntry (*phys_map_nodes)[L2_SIZE];
@@ -168,7 +168,7 @@ static void phys_page_set_level(PhysPageEntry *lp, hwaddr *index,
if (level == 0) {
for (i = 0; i < L2_SIZE; i++) {
p[i].is_leaf = 1;
- p[i].ptr = phys_section_unassigned;
+ p[i].ptr = PHYS_SECTION_UNASSIGNED;
}
}
} else {
@@ -207,7 +207,7 @@ static MemoryRegionSection *phys_page_find(AddressSpaceDispatch *d, hwaddr index
for (i = P_L2_LEVELS - 1; i >= 0 && !lp.is_leaf; i--) {
if (lp.ptr == PHYS_MAP_NODE_NIL) {
- return &phys_sections[phys_section_unassigned];
+ return &phys_sections[PHYS_SECTION_UNASSIGNED];
}
p = phys_map_nodes[lp.ptr];
lp = p[(index >> (i * L2_BITS)) & (L2_SIZE - 1)];
@@ -717,9 +717,9 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env,
iotlb = (memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK)
+ xlat;
if (!section->readonly) {
- iotlb |= phys_section_notdirty;
+ iotlb |= PHYS_SECTION_NOTDIRTY;
} else {
- iotlb |= phys_section_rom;
+ iotlb |= PHYS_SECTION_ROM;
}
} else {
iotlb = section - phys_sections;
@@ -732,7 +732,7 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env,
if (vaddr == (wp->vaddr & TARGET_PAGE_MASK)) {
/* Avoid trapping reads of pages with a write breakpoint. */
if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) {
- iotlb = phys_section_watch + paddr;
+ iotlb = PHYS_SECTION_WATCH + paddr;
*address |= TLB_MMIO;
break;
}
@@ -1656,7 +1656,7 @@ static subpage_t *subpage_init(AddressSpace *as, hwaddr base)
printf("%s: %p base " TARGET_FMT_plx " len %08x %d\n", __func__,
mmio, base, TARGET_PAGE_SIZE, subpage_memory);
#endif
- subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, phys_section_unassigned);
+ subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED);
return mmio;
}
@@ -1698,11 +1698,17 @@ static void mem_begin(MemoryListener *listener)
static void core_begin(MemoryListener *listener)
{
+ uint16_t n;
+
phys_sections_clear();
- phys_section_unassigned = dummy_section(&io_mem_unassigned);
- phys_section_notdirty = dummy_section(&io_mem_notdirty);
- phys_section_rom = dummy_section(&io_mem_rom);
- phys_section_watch = dummy_section(&io_mem_watch);
+ n = dummy_section(&io_mem_unassigned);
+ assert(n == PHYS_SECTION_UNASSIGNED);
+ n = dummy_section(&io_mem_notdirty);
+ assert(n == PHYS_SECTION_NOTDIRTY);
+ n = dummy_section(&io_mem_rom);
+ assert(n == PHYS_SECTION_ROM);
+ n = dummy_section(&io_mem_watch);
+ assert(n == PHYS_SECTION_WATCH);
}
static void tcg_commit(MemoryListener *listener)
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 60/66] exec: separate current memory map from the one being built
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (57 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 59/66] exec: change well-known physical sections to macros Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 61/66] memory: move MemoryListener declaration earlier Paolo Bonzini
` (6 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Liu Ping Fan
Currently, phys_node_map and phys_sections are shared by all
of the AddressSpaceDispatch. When updating mem topology, all
AddressSpaceDispatch will rebuild dispatch tables sequentially
on them. In order to prepare for RCU access, leave the old
memory map alive while the next one is being accessed.
When rebuilding, the new dispatch tables will build and lookup
next_map; after all dispatch tables are rebuilt, we can switch
to next_* and free the previous table.
Based on a patch from Liu Ping Fan.
Signed-off-by: Liu Ping Fan <qemulist@gmail.com>
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 103 ++++++++++++++++++++++++++++++++++++++++-------------------------
1 file changed, 63 insertions(+), 40 deletions(-)
diff --git a/exec.c b/exec.c
index ada2ff2..598ac3a 100644
--- a/exec.c
+++ b/exec.c
@@ -105,16 +105,24 @@ typedef struct subpage_t {
uint16_t sub_section[TARGET_PAGE_SIZE];
} subpage_t;
-static MemoryRegionSection *phys_sections;
-static unsigned phys_sections_nb, phys_sections_nb_alloc;
#define PHYS_SECTION_UNASSIGNED 0
#define PHYS_SECTION_NOTDIRTY 1
#define PHYS_SECTION_ROM 2
#define PHYS_SECTION_WATCH 3
-/* Simple allocator for PhysPageEntry nodes */
-static PhysPageEntry (*phys_map_nodes)[L2_SIZE];
-static unsigned phys_map_nodes_nb, phys_map_nodes_nb_alloc;
+typedef PhysPageEntry Node[L2_SIZE];
+
+typedef struct PhysPageMap {
+ unsigned sections_nb;
+ unsigned sections_nb_alloc;
+ unsigned nodes_nb;
+ unsigned nodes_nb_alloc;
+ Node *nodes;
+ MemoryRegionSection *sections;
+} PhysPageMap;
+
+static PhysPageMap cur_map;
+static PhysPageMap next_map;
#define PHYS_MAP_NODE_NIL (((uint16_t)~0) >> 1)
@@ -129,13 +137,13 @@ static MemoryRegion io_mem_watch;
static void phys_map_node_reserve(unsigned nodes)
{
- if (phys_map_nodes_nb + nodes > phys_map_nodes_nb_alloc) {
- typedef PhysPageEntry Node[L2_SIZE];
- phys_map_nodes_nb_alloc = MAX(phys_map_nodes_nb_alloc * 2, 16);
- phys_map_nodes_nb_alloc = MAX(phys_map_nodes_nb_alloc,
- phys_map_nodes_nb + nodes);
- phys_map_nodes = g_renew(Node, phys_map_nodes,
- phys_map_nodes_nb_alloc);
+ if (next_map.nodes_nb + nodes > next_map.nodes_nb_alloc) {
+ next_map.nodes_nb_alloc = MAX(next_map.nodes_nb_alloc * 2,
+ 16);
+ next_map.nodes_nb_alloc = MAX(next_map.nodes_nb_alloc,
+ next_map.nodes_nb + nodes);
+ next_map.nodes = g_renew(Node, next_map.nodes,
+ next_map.nodes_nb_alloc);
}
}
@@ -144,12 +152,12 @@ static uint16_t phys_map_node_alloc(void)
unsigned i;
uint16_t ret;
- ret = phys_map_nodes_nb++;
+ ret = next_map.nodes_nb++;
assert(ret != PHYS_MAP_NODE_NIL);
- assert(ret != phys_map_nodes_nb_alloc);
+ assert(ret != next_map.nodes_nb_alloc);
for (i = 0; i < L2_SIZE; ++i) {
- phys_map_nodes[ret][i].is_leaf = 0;
- phys_map_nodes[ret][i].ptr = PHYS_MAP_NODE_NIL;
+ next_map.nodes[ret][i].is_leaf = 0;
+ next_map.nodes[ret][i].ptr = PHYS_MAP_NODE_NIL;
}
return ret;
}
@@ -164,7 +172,7 @@ static void phys_page_set_level(PhysPageEntry *lp, hwaddr *index,
if (!lp->is_leaf && lp->ptr == PHYS_MAP_NODE_NIL) {
lp->ptr = phys_map_node_alloc();
- p = phys_map_nodes[lp->ptr];
+ p = next_map.nodes[lp->ptr];
if (level == 0) {
for (i = 0; i < L2_SIZE; i++) {
p[i].is_leaf = 1;
@@ -172,7 +180,7 @@ static void phys_page_set_level(PhysPageEntry *lp, hwaddr *index,
}
}
} else {
- p = phys_map_nodes[lp->ptr];
+ p = next_map.nodes[lp->ptr];
}
lp = &p[(*index >> (level * L2_BITS)) & (L2_SIZE - 1)];
@@ -199,20 +207,20 @@ static void phys_page_set(AddressSpaceDispatch *d,
phys_page_set_level(&d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1);
}
-static MemoryRegionSection *phys_page_find(AddressSpaceDispatch *d, hwaddr index)
+static MemoryRegionSection *phys_page_find(PhysPageEntry lp, hwaddr index,
+ Node *nodes, MemoryRegionSection *sections)
{
- PhysPageEntry lp = d->phys_map;
PhysPageEntry *p;
int i;
for (i = P_L2_LEVELS - 1; i >= 0 && !lp.is_leaf; i--) {
if (lp.ptr == PHYS_MAP_NODE_NIL) {
- return &phys_sections[PHYS_SECTION_UNASSIGNED];
+ return §ions[PHYS_SECTION_UNASSIGNED];
}
- p = phys_map_nodes[lp.ptr];
+ p = nodes[lp.ptr];
lp = p[(index >> (i * L2_BITS)) & (L2_SIZE - 1)];
}
- return &phys_sections[lp.ptr];
+ return §ions[lp.ptr];
}
bool memory_region_is_unassigned(MemoryRegion *mr)
@@ -228,10 +236,11 @@ static MemoryRegionSection *address_space_lookup_region(AddressSpace *as,
MemoryRegionSection *section;
subpage_t *subpage;
- section = phys_page_find(as->dispatch, addr >> TARGET_PAGE_BITS);
+ section = phys_page_find(as->dispatch->phys_map, addr >> TARGET_PAGE_BITS,
+ cur_map.nodes, cur_map.sections);
if (resolve_subpage && section->mr->subpage) {
subpage = container_of(section->mr, subpage_t, iomem);
- section = &phys_sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
+ section = &cur_map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
}
return section;
}
@@ -722,7 +731,7 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env,
iotlb |= PHYS_SECTION_ROM;
}
} else {
- iotlb = section - phys_sections;
+ iotlb = section - cur_map.sections;
iotlb += xlat;
}
@@ -755,16 +764,17 @@ static uint16_t phys_section_add(MemoryRegionSection *section)
* pointer to produce the iotlb entries. Thus it should
* never overflow into the page-aligned value.
*/
- assert(phys_sections_nb < TARGET_PAGE_SIZE);
+ assert(next_map.sections_nb < TARGET_PAGE_SIZE);
- if (phys_sections_nb == phys_sections_nb_alloc) {
- phys_sections_nb_alloc = MAX(phys_sections_nb_alloc * 2, 16);
- phys_sections = g_renew(MemoryRegionSection, phys_sections,
- phys_sections_nb_alloc);
+ if (next_map.sections_nb == next_map.sections_nb_alloc) {
+ next_map.sections_nb_alloc = MAX(next_map.sections_nb_alloc * 2,
+ 16);
+ next_map.sections = g_renew(MemoryRegionSection, next_map.sections,
+ next_map.sections_nb_alloc);
}
- phys_sections[phys_sections_nb] = *section;
+ next_map.sections[next_map.sections_nb] = *section;
memory_region_ref(section->mr);
- return phys_sections_nb++;
+ return next_map.sections_nb++;
}
static void phys_section_destroy(MemoryRegion *mr)
@@ -778,13 +788,14 @@ static void phys_section_destroy(MemoryRegion *mr)
}
}
-static void phys_sections_clear(void)
+static void phys_sections_clear(PhysPageMap *map)
{
- while (phys_sections_nb > 0) {
- MemoryRegionSection *section = &phys_sections[--phys_sections_nb];
+ while (map->sections_nb > 0) {
+ MemoryRegionSection *section = &map->sections[--map->sections_nb];
phys_section_destroy(section->mr);
}
- phys_map_nodes_nb = 0;
+ g_free(map->sections);
+ g_free(map->nodes);
}
static void register_subpage(AddressSpaceDispatch *d, MemoryRegionSection *section)
@@ -792,7 +803,8 @@ static void register_subpage(AddressSpaceDispatch *d, MemoryRegionSection *secti
subpage_t *subpage;
hwaddr base = section->offset_within_address_space
& TARGET_PAGE_MASK;
- MemoryRegionSection *existing = phys_page_find(d, base >> TARGET_PAGE_BITS);
+ MemoryRegionSection *existing = phys_page_find(d->phys_map, base >> TARGET_PAGE_BITS,
+ next_map.nodes, next_map.sections);
MemoryRegionSection subsection = {
.offset_within_address_space = base,
.size = int128_make64(TARGET_PAGE_SIZE),
@@ -1675,7 +1687,7 @@ static uint16_t dummy_section(MemoryRegion *mr)
MemoryRegion *iotlb_to_region(hwaddr index)
{
- return phys_sections[index & ~TARGET_PAGE_MASK].mr;
+ return cur_map.sections[index & ~TARGET_PAGE_MASK].mr;
}
static void io_mem_init(void)
@@ -1700,7 +1712,7 @@ static void core_begin(MemoryListener *listener)
{
uint16_t n;
- phys_sections_clear();
+ memset(&next_map, 0, sizeof(next_map));
n = dummy_section(&io_mem_unassigned);
assert(n == PHYS_SECTION_UNASSIGNED);
n = dummy_section(&io_mem_notdirty);
@@ -1711,6 +1723,16 @@ static void core_begin(MemoryListener *listener)
assert(n == PHYS_SECTION_WATCH);
}
+/* This listener's commit run after the other AddressSpaceDispatch listeners'.
+ * All AddressSpaceDispatch instances have switched to the next map.
+ */
+static void core_commit(MemoryListener *listener)
+{
+ PhysPageMap info = cur_map;
+ cur_map = next_map;
+ phys_sections_clear(&info);
+}
+
static void tcg_commit(MemoryListener *listener)
{
CPUArchState *env;
@@ -1735,6 +1757,7 @@ static void core_log_global_stop(MemoryListener *listener)
static MemoryListener core_memory_listener = {
.begin = core_begin,
+ .commit = core_commit,
.log_global_start = core_log_global_start,
.log_global_stop = core_log_global_stop,
.priority = 1,
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 61/66] memory: move MemoryListener declaration earlier
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (58 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 60/66] exec: separate current memory map from the one being built Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 62/66] exec: move listener from AddressSpaceDispatch to AddressSpace Paolo Bonzini
` (5 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
include/exec/memory.h | 66 +++++++++++++++++++++++++--------------------------
1 file changed, 33 insertions(+), 33 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index c8d0bf4..8355bdb 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -165,6 +165,39 @@ struct MemoryRegion {
NotifierList iommu_notify;
};
+typedef struct MemoryListener MemoryListener;
+
+/**
+ * MemoryListener: callbacks structure for updates to the physical memory map
+ *
+ * Allows a component to adjust to changes in the guest-visible memory map.
+ * Use with memory_listener_register() and memory_listener_unregister().
+ */
+struct MemoryListener {
+ void (*begin)(MemoryListener *listener);
+ void (*commit)(MemoryListener *listener);
+ void (*region_add)(MemoryListener *listener, MemoryRegionSection *section);
+ void (*region_del)(MemoryListener *listener, MemoryRegionSection *section);
+ void (*region_nop)(MemoryListener *listener, MemoryRegionSection *section);
+ void (*log_start)(MemoryListener *listener, MemoryRegionSection *section);
+ void (*log_stop)(MemoryListener *listener, MemoryRegionSection *section);
+ void (*log_sync)(MemoryListener *listener, MemoryRegionSection *section);
+ void (*log_global_start)(MemoryListener *listener);
+ void (*log_global_stop)(MemoryListener *listener);
+ void (*eventfd_add)(MemoryListener *listener, MemoryRegionSection *section,
+ bool match_data, uint64_t data, EventNotifier *e);
+ void (*eventfd_del)(MemoryListener *listener, MemoryRegionSection *section,
+ bool match_data, uint64_t data, EventNotifier *e);
+ void (*coalesced_mmio_add)(MemoryListener *listener, MemoryRegionSection *section,
+ hwaddr addr, hwaddr len);
+ void (*coalesced_mmio_del)(MemoryListener *listener, MemoryRegionSection *section,
+ hwaddr addr, hwaddr len);
+ /* Lower = earlier (during add), later (during del) */
+ unsigned priority;
+ AddressSpace *address_space_filter;
+ QTAILQ_ENTRY(MemoryListener) link;
+};
+
/**
* AddressSpace: describes a mapping of addresses to #MemoryRegion objects
*/
@@ -199,39 +232,6 @@ struct MemoryRegionSection {
bool readonly;
};
-typedef struct MemoryListener MemoryListener;
-
-/**
- * MemoryListener: callbacks structure for updates to the physical memory map
- *
- * Allows a component to adjust to changes in the guest-visible memory map.
- * Use with memory_listener_register() and memory_listener_unregister().
- */
-struct MemoryListener {
- void (*begin)(MemoryListener *listener);
- void (*commit)(MemoryListener *listener);
- void (*region_add)(MemoryListener *listener, MemoryRegionSection *section);
- void (*region_del)(MemoryListener *listener, MemoryRegionSection *section);
- void (*region_nop)(MemoryListener *listener, MemoryRegionSection *section);
- void (*log_start)(MemoryListener *listener, MemoryRegionSection *section);
- void (*log_stop)(MemoryListener *listener, MemoryRegionSection *section);
- void (*log_sync)(MemoryListener *listener, MemoryRegionSection *section);
- void (*log_global_start)(MemoryListener *listener);
- void (*log_global_stop)(MemoryListener *listener);
- void (*eventfd_add)(MemoryListener *listener, MemoryRegionSection *section,
- bool match_data, uint64_t data, EventNotifier *e);
- void (*eventfd_del)(MemoryListener *listener, MemoryRegionSection *section,
- bool match_data, uint64_t data, EventNotifier *e);
- void (*coalesced_mmio_add)(MemoryListener *listener, MemoryRegionSection *section,
- hwaddr addr, hwaddr len);
- void (*coalesced_mmio_del)(MemoryListener *listener, MemoryRegionSection *section,
- hwaddr addr, hwaddr len);
- /* Lower = earlier (during add), later (during del) */
- unsigned priority;
- AddressSpace *address_space_filter;
- QTAILQ_ENTRY(MemoryListener) link;
-};
-
/**
* memory_region_init: Initialize a memory region
*
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 62/66] exec: move listener from AddressSpaceDispatch to AddressSpace
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (59 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 61/66] memory: move MemoryListener declaration earlier Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 63/66] exec: separate current radix tree from the one being built Paolo Bonzini
` (4 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
This will help having two copies of AddressSpaceDispatch during the
recreation of the radix tree (one being built, and one that is complete
and will be protected by RCU). We do not want to have to unregister and
re-register the listener.
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 17 +++++++++--------
include/exec/memory.h | 2 ++
2 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/exec.c b/exec.c
index 598ac3a..2eb279c 100644
--- a/exec.c
+++ b/exec.c
@@ -93,7 +93,6 @@ struct AddressSpaceDispatch {
* The bottom level has pointers to MemoryRegionSections.
*/
PhysPageEntry phys_map;
- MemoryListener listener;
AddressSpace *as;
};
@@ -841,7 +840,8 @@ static void register_multipage(AddressSpaceDispatch *d,
static void mem_add(MemoryListener *listener, MemoryRegionSection *section)
{
- AddressSpaceDispatch *d = container_of(listener, AddressSpaceDispatch, listener);
+ AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
+ AddressSpaceDispatch *d = as->dispatch;
MemoryRegionSection now = *section, remain = *section;
Int128 page_size = int128_make64(TARGET_PAGE_SIZE);
@@ -1703,7 +1703,8 @@ static void io_mem_init(void)
static void mem_begin(MemoryListener *listener)
{
- AddressSpaceDispatch *d = container_of(listener, AddressSpaceDispatch, listener);
+ AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
+ AddressSpaceDispatch *d = as->dispatch;
d->phys_map.ptr = PHYS_MAP_NODE_NIL;
}
@@ -1772,22 +1773,22 @@ void address_space_init_dispatch(AddressSpace *as)
AddressSpaceDispatch *d = g_new(AddressSpaceDispatch, 1);
d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .is_leaf = 0 };
- d->listener = (MemoryListener) {
+ d->as = as;
+ as->dispatch = d;
+ as->dispatch_listener = (MemoryListener) {
.begin = mem_begin,
.region_add = mem_add,
.region_nop = mem_add,
.priority = 0,
};
- d->as = as;
- as->dispatch = d;
- memory_listener_register(&d->listener, as);
+ memory_listener_register(&as->dispatch_listener, as);
}
void address_space_destroy_dispatch(AddressSpace *as)
{
AddressSpaceDispatch *d = as->dispatch;
- memory_listener_unregister(&d->listener);
+ memory_listener_unregister(&as->dispatch_listener);
g_free(d);
as->dispatch = NULL;
}
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 8355bdb..248c89b 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -209,6 +209,8 @@ struct AddressSpace {
int ioeventfd_nb;
struct MemoryRegionIoeventfd *ioeventfds;
struct AddressSpaceDispatch *dispatch;
+ MemoryListener dispatch_listener;
+
QTAILQ_ENTRY(AddressSpace) address_spaces_link;
};
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 63/66] exec: separate current radix tree from the one being built
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (60 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 62/66] exec: move listener from AddressSpaceDispatch to AddressSpace Paolo Bonzini
@ 2013-07-04 15:13 ` Paolo Bonzini
2013-07-04 15:14 ` [Qemu-devel] [PATCH 64/66] exec: put memory map in AddressSpaceDispatch Paolo Bonzini
` (3 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:13 UTC (permalink / raw)
To: qemu-devel
This same treatment previously done to phys_node_map and phys_sections
is now applied to the dispatch field of AddressSpace. Topology updates
use as->next_dispatch while accesses use as->dispatch.
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 23 ++++++++++++++++-------
include/exec/memory.h | 1 +
2 files changed, 17 insertions(+), 7 deletions(-)
diff --git a/exec.c b/exec.c
index 2eb279c..bd05c40 100644
--- a/exec.c
+++ b/exec.c
@@ -841,7 +841,7 @@ static void register_multipage(AddressSpaceDispatch *d,
static void mem_add(MemoryListener *listener, MemoryRegionSection *section)
{
AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
- AddressSpaceDispatch *d = as->dispatch;
+ AddressSpaceDispatch *d = as->next_dispatch;
MemoryRegionSection now = *section, remain = *section;
Int128 page_size = int128_make64(TARGET_PAGE_SIZE);
@@ -1704,9 +1704,21 @@ static void io_mem_init(void)
static void mem_begin(MemoryListener *listener)
{
AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
+ AddressSpaceDispatch *d = g_new(AddressSpaceDispatch, 1);
+
+ d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .is_leaf = 0 };
+ d->as = as;
+ as->next_dispatch = d;
+}
+
+static void mem_commit(MemoryListener *listener)
+{
+ AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
AddressSpaceDispatch *d = as->dispatch;
- d->phys_map.ptr = PHYS_MAP_NODE_NIL;
+ /* cur_map will soon be switched to next_map, too. */
+ as->dispatch = as->next_dispatch;
+ g_free(d);
}
static void core_begin(MemoryListener *listener)
@@ -1770,13 +1782,10 @@ static MemoryListener tcg_memory_listener = {
void address_space_init_dispatch(AddressSpace *as)
{
- AddressSpaceDispatch *d = g_new(AddressSpaceDispatch, 1);
-
- d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .is_leaf = 0 };
- d->as = as;
- as->dispatch = d;
+ as->dispatch = NULL;
as->dispatch_listener = (MemoryListener) {
.begin = mem_begin,
+ .commit = mem_commit,
.region_add = mem_add,
.region_nop = mem_add,
.priority = 0,
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 248c89b..ebe0d24 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -209,6 +209,7 @@ struct AddressSpace {
int ioeventfd_nb;
struct MemoryRegionIoeventfd *ioeventfds;
struct AddressSpaceDispatch *dispatch;
+ struct AddressSpaceDispatch *next_dispatch;
MemoryListener dispatch_listener;
QTAILQ_ENTRY(AddressSpace) address_spaces_link;
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 64/66] exec: put memory map in AddressSpaceDispatch
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (61 preceding siblings ...)
2013-07-04 15:13 ` [Qemu-devel] [PATCH 63/66] exec: separate current radix tree from the one being built Paolo Bonzini
@ 2013-07-04 15:14 ` Paolo Bonzini
2013-07-04 15:14 ` [Qemu-devel] [PATCH 65/66] exec: remove cur_map Paolo Bonzini
` (2 subsequent siblings)
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:14 UTC (permalink / raw)
To: qemu-devel
After this patch, AddressSpaceDispatch holds a constistent tuple of
(phys_map, nodes, sections). This will be important when updates
of the topology will run concurrently with reads.
cur_map is not used anymore except for freeing it at the end of the
topology update.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 28 +++++++++++++++++-----------
1 file changed, 17 insertions(+), 11 deletions(-)
diff --git a/exec.c b/exec.c
index bd05c40..6d3492e 100644
--- a/exec.c
+++ b/exec.c
@@ -88,11 +88,15 @@ struct PhysPageEntry {
uint16_t ptr : 15;
};
+typedef PhysPageEntry Node[L2_SIZE];
+
struct AddressSpaceDispatch {
/* This is a multi-level map on the physical address space.
* The bottom level has pointers to MemoryRegionSections.
*/
PhysPageEntry phys_map;
+ Node *nodes;
+ MemoryRegionSection *sections;
AddressSpace *as;
};
@@ -109,8 +113,6 @@ typedef struct subpage_t {
#define PHYS_SECTION_ROM 2
#define PHYS_SECTION_WATCH 3
-typedef PhysPageEntry Node[L2_SIZE];
-
typedef struct PhysPageMap {
unsigned sections_nb;
unsigned sections_nb_alloc;
@@ -232,14 +234,15 @@ static MemoryRegionSection *address_space_lookup_region(AddressSpace *as,
hwaddr addr,
bool resolve_subpage)
{
+ AddressSpaceDispatch *d = as->dispatch;
MemoryRegionSection *section;
subpage_t *subpage;
- section = phys_page_find(as->dispatch->phys_map, addr >> TARGET_PAGE_BITS,
- cur_map.nodes, cur_map.sections);
+ section = phys_page_find(d->phys_map, addr >> TARGET_PAGE_BITS,
+ d->nodes, d->sections);
if (resolve_subpage && section->mr->subpage) {
subpage = container_of(section->mr, subpage_t, iomem);
- section = &cur_map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
+ section = &d->sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
}
return section;
}
@@ -730,7 +733,7 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env,
iotlb |= PHYS_SECTION_ROM;
}
} else {
- iotlb = section - cur_map.sections;
+ iotlb = section - address_space_memory.dispatch->sections;
iotlb += xlat;
}
@@ -1687,7 +1690,7 @@ static uint16_t dummy_section(MemoryRegion *mr)
MemoryRegion *iotlb_to_region(hwaddr index)
{
- return cur_map.sections[index & ~TARGET_PAGE_MASK].mr;
+ return address_space_memory.dispatch->sections[index & ~TARGET_PAGE_MASK].mr;
}
static void io_mem_init(void)
@@ -1714,11 +1717,14 @@ static void mem_begin(MemoryListener *listener)
static void mem_commit(MemoryListener *listener)
{
AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
- AddressSpaceDispatch *d = as->dispatch;
+ AddressSpaceDispatch *cur = as->dispatch;
+ AddressSpaceDispatch *next = as->next_dispatch;
- /* cur_map will soon be switched to next_map, too. */
- as->dispatch = as->next_dispatch;
- g_free(d);
+ next->nodes = next_map.nodes;
+ next->sections = next_map.sections;
+
+ as->dispatch = next;
+ g_free(cur);
}
static void core_begin(MemoryListener *listener)
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 65/66] exec: remove cur_map
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (62 preceding siblings ...)
2013-07-04 15:14 ` [Qemu-devel] [PATCH 64/66] exec: put memory map in AddressSpaceDispatch Paolo Bonzini
@ 2013-07-04 15:14 ` Paolo Bonzini
2013-07-04 15:14 ` [Qemu-devel] [PATCH 66/66] exec: change some APIs to take AddressSpaceDispatch Paolo Bonzini
2013-07-04 15:52 ` [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:14 UTC (permalink / raw)
To: qemu-devel
cur_map is not used anymore; instead, each AddressSpaceDispatch
has its own nodes/sections pair. The priorities of the
MemoryListeners, and in the future RCU, guarantee that the
nodes/sections are not freed while they are still in use.
(In fact, next_map itself is not needed except to free the data on the
next update).
To avoid incorrect use, replace cur_map with a temporary copy that
is only valid while the topology is being updated. If you use it,
the name prev_map makes it clear that you're doing something weird.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/exec.c b/exec.c
index 6d3492e..7a6d969 100644
--- a/exec.c
+++ b/exec.c
@@ -122,7 +122,7 @@ typedef struct PhysPageMap {
MemoryRegionSection *sections;
} PhysPageMap;
-static PhysPageMap cur_map;
+static PhysPageMap *prev_map;
static PhysPageMap next_map;
#define PHYS_MAP_NODE_NIL (((uint16_t)~0) >> 1)
@@ -790,7 +790,7 @@ static void phys_section_destroy(MemoryRegion *mr)
}
}
-static void phys_sections_clear(PhysPageMap *map)
+static void phys_sections_free(PhysPageMap *map)
{
while (map->sections_nb > 0) {
MemoryRegionSection *section = &map->sections[--map->sections_nb];
@@ -798,6 +798,7 @@ static void phys_sections_clear(PhysPageMap *map)
}
g_free(map->sections);
g_free(map->nodes);
+ g_free(map);
}
static void register_subpage(AddressSpaceDispatch *d, MemoryRegionSection *section)
@@ -1731,6 +1732,9 @@ static void core_begin(MemoryListener *listener)
{
uint16_t n;
+ prev_map = g_new(PhysPageMap, 1);
+ *prev_map = next_map;
+
memset(&next_map, 0, sizeof(next_map));
n = dummy_section(&io_mem_unassigned);
assert(n == PHYS_SECTION_UNASSIGNED);
@@ -1747,9 +1751,7 @@ static void core_begin(MemoryListener *listener)
*/
static void core_commit(MemoryListener *listener)
{
- PhysPageMap info = cur_map;
- cur_map = next_map;
- phys_sections_clear(&info);
+ phys_sections_free(prev_map);
}
static void tcg_commit(MemoryListener *listener)
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [Qemu-devel] [PATCH 66/66] exec: change some APIs to take AddressSpaceDispatch
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (63 preceding siblings ...)
2013-07-04 15:14 ` [Qemu-devel] [PATCH 65/66] exec: remove cur_map Paolo Bonzini
@ 2013-07-04 15:14 ` Paolo Bonzini
2013-07-04 15:52 ` [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
65 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:14 UTC (permalink / raw)
To: qemu-devel
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/exec.c b/exec.c
index 7a6d969..03fdf7e 100644
--- a/exec.c
+++ b/exec.c
@@ -230,11 +230,10 @@ bool memory_region_is_unassigned(MemoryRegion *mr)
&& mr != &io_mem_watch;
}
-static MemoryRegionSection *address_space_lookup_region(AddressSpace *as,
+static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d,
hwaddr addr,
bool resolve_subpage)
{
- AddressSpaceDispatch *d = as->dispatch;
MemoryRegionSection *section;
subpage_t *subpage;
@@ -248,13 +247,13 @@ static MemoryRegionSection *address_space_lookup_region(AddressSpace *as,
}
static MemoryRegionSection *
-address_space_translate_internal(AddressSpace *as, hwaddr addr, hwaddr *xlat,
+address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat,
hwaddr *plen, bool resolve_subpage)
{
MemoryRegionSection *section;
Int128 diff;
- section = address_space_lookup_region(as, addr, resolve_subpage);
+ section = address_space_lookup_region(d, addr, resolve_subpage);
/* Compute offset within MemoryRegionSection */
addr -= section->offset_within_address_space;
@@ -276,7 +275,7 @@ MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,
hwaddr len = *plen;
for (;;) {
- section = address_space_translate_internal(as, addr, &addr, plen, true);
+ section = address_space_translate_internal(as->dispatch, addr, &addr, plen, true);
mr = section->mr;
if (!mr->iommu_ops) {
@@ -305,7 +304,7 @@ address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat,
hwaddr *plen)
{
MemoryRegionSection *section;
- section = address_space_translate_internal(as, addr, xlat, plen, false);
+ section = address_space_translate_internal(as->dispatch, addr, xlat, plen, false);
assert(!section->mr->iommu_ops);
return section;
--
1.8.1.4
^ permalink raw reply related [flat|nested] 78+ messages in thread
* Re: [Qemu-devel] [PATCH 03/66] dma: keep a device alive while it has SGLists
2013-07-04 15:12 ` [Qemu-devel] [PATCH 03/66] dma: keep a device alive while it has SGLists Paolo Bonzini
@ 2013-07-04 15:51 ` Jan Kiszka
2013-07-04 15:59 ` Jan Kiszka
2013-07-04 16:00 ` Paolo Bonzini
0 siblings, 2 replies; 78+ messages in thread
From: Jan Kiszka @ 2013-07-04 15:51 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: qemu-devel, Gerd Hoffmann
On 2013-07-04 17:12, Paolo Bonzini wrote:
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
> dma-helpers.c | 6 +++++-
> hw/ide/ahci.c | 3 ++-
> hw/ide/macio.c | 4 ++--
> hw/scsi/virtio-scsi.c | 10 ++++++----
> hw/usb/hcd-ehci.c | 4 ++--
> include/hw/pci/pci.h | 2 +-
> include/sysemu/dma.h | 4 +++-
> 7 files changed, 21 insertions(+), 12 deletions(-)
>
> diff --git a/dma-helpers.c b/dma-helpers.c
> index 5afba47..499550f 100644
> --- a/dma-helpers.c
> +++ b/dma-helpers.c
> @@ -34,13 +34,16 @@ int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len)
> return error;
> }
>
> -void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint, AddressSpace *as)
> +void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev, int alloc_hint,
> + AddressSpace *as)
> {
> qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry));
> qsg->nsg = 0;
> qsg->nalloc = alloc_hint;
> qsg->size = 0;
> qsg->as = as;
> + qsg->dev = dev;
> + object_ref(OBJECT(dev));
> }
>
> void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
> @@ -57,6 +60,7 @@ void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
>
> void qemu_sglist_destroy(QEMUSGList *qsg)
> {
> + object_unref(OBJECT(qsg->dev));
> g_free(qsg->sg);
> memset(qsg, 0, sizeof(*qsg));
> }
> diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
> index 1adfa0b..6b87549 100644
> --- a/hw/ide/ahci.c
> +++ b/hw/ide/ahci.c
> @@ -691,7 +691,8 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset)
> goto out;
> }
>
> - qemu_sglist_init(sglist, (sglist_alloc_hint - off_idx), ad->hba->as);
> + qemu_sglist_init(sglist, DEVICE(ad->hba), (sglist_alloc_hint - off_idx),
> + ad->hba->as);
> qemu_sglist_add(sglist, le64_to_cpu(tbl[off_idx].addr + off_pos),
> le32_to_cpu(tbl[off_idx].flags_size) + 1 - off_pos);
>
> diff --git a/hw/ide/macio.c b/hw/ide/macio.c
> index a1952b0..84288ae 100644
> --- a/hw/ide/macio.c
> +++ b/hw/ide/macio.c
> @@ -70,7 +70,7 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
>
> s->io_buffer_size = io->len;
>
> - qemu_sglist_init(&s->sg, io->len / MACIO_PAGE_SIZE + 1,
> + qemu_sglist_init(&s->sg, DEVICE(m), io->len / MACIO_PAGE_SIZE + 1,
> &address_space_memory);
> qemu_sglist_add(&s->sg, io->addr, io->len);
> io->addr += io->len;
> @@ -127,7 +127,7 @@ static void pmac_ide_transfer_cb(void *opaque, int ret)
> s->io_buffer_index = 0;
> s->io_buffer_size = io->len;
>
> - qemu_sglist_init(&s->sg, io->len / MACIO_PAGE_SIZE + 1,
> + qemu_sglist_init(&s->sg, DEVICE(m), io->len / MACIO_PAGE_SIZE + 1,
> &address_space_memory);
> qemu_sglist_add(&s->sg, io->addr, io->len);
> io->addr += io->len;
> diff --git a/hw/scsi/virtio-scsi.c b/hw/scsi/virtio-scsi.c
> index b8a0abf..712f0ad 100644
> --- a/hw/scsi/virtio-scsi.c
> +++ b/hw/scsi/virtio-scsi.c
> @@ -77,10 +77,12 @@ static void virtio_scsi_bad_req(void)
> exit(1);
> }
>
> -static void qemu_sgl_init_external(QEMUSGList *qsgl, struct iovec *sg,
> +static void qemu_sgl_init_external(VirtIOSCSIReq *req, struct iovec *sg,
> hwaddr *addr, int num)
> {
> - qemu_sglist_init(qsgl, num, &address_space_memory);
> + QEMUSGList *qsgl = &req->qsgl;
> +
> + qemu_sglist_init(qsgl, DEVICE(req->dev), num, &address_space_memory);
> while (num--) {
> qemu_sglist_add(qsgl, *(addr++), (sg++)->iov_len);
> }
> @@ -99,11 +101,11 @@ static void virtio_scsi_parse_req(VirtIOSCSI *s, VirtQueue *vq,
> req->resp.buf = req->elem.in_sg[0].iov_base;
>
> if (req->elem.out_num > 1) {
> - qemu_sgl_init_external(&req->qsgl, &req->elem.out_sg[1],
> + qemu_sgl_init_external(req, &req->elem.out_sg[1],
> &req->elem.out_addr[1],
> req->elem.out_num - 1);
> } else {
> - qemu_sgl_init_external(&req->qsgl, &req->elem.in_sg[1],
> + qemu_sgl_init_external(req, &req->elem.in_sg[1],
> &req->elem.in_addr[1],
> req->elem.in_num - 1);
> }
> diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
> index 16d6356..65e6680 100644
> --- a/hw/usb/hcd-ehci.c
> +++ b/hw/usb/hcd-ehci.c
> @@ -1245,7 +1245,7 @@ static int ehci_init_transfer(EHCIPacket *p)
> cpage = get_field(p->qtd.token, QTD_TOKEN_CPAGE);
> bytes = get_field(p->qtd.token, QTD_TOKEN_TBYTES);
> offset = p->qtd.bufptr[0] & ~QTD_BUFPTR_MASK;
> - qemu_sglist_init(&p->sgl, 5, p->queue->ehci->as);
> + qemu_sglist_init(&p->sgl, DEVICE(p->queue->ehci), 5, p->queue->ehci->as);
I was just testing this from your current git tree, and it causes
qemu/hw/usb/hcd-ehci.c:1248:ehci_init_transfer: Object 0x7f3eb39c6500 is
not an instance of type device
when booting a q35 machine (as it pulls in EHCI). The cast is obviously
wrong, but I didn't spot yet what is required instead.
Jan
--
Siemens AG, Corporate Technology, CT RTC ITP SES-DE
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
` (64 preceding siblings ...)
2013-07-04 15:14 ` [Qemu-devel] [PATCH 66/66] exec: change some APIs to take AddressSpaceDispatch Paolo Bonzini
@ 2013-07-04 15:52 ` Paolo Bonzini
2013-07-04 16:08 ` Paolo Bonzini
2013-07-08 13:20 ` Anthony Liguori
65 siblings, 2 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 15:52 UTC (permalink / raw)
To: qemu-devel
Il 04/07/2013 17:12, Paolo Bonzini ha scritto:
> Anthony,
>
> the following changes since commit 1acd5a373905ddb28957842256a038956941f332:
>
> Merge remote-tracking branch 'agraf/ppc-for-upstream' into staging (2013-07-01 09:03:04 -0500)
>
> are available in the git repository at:
>
>
> git://github.com/bonzini/qemu.git iommu-for-anthony
>
> for you to fetch changes up to 28bb1ad4daef9949fc2c3f66879c2c0f0673df04:
>
> exec: change some APIs to take AddressSpaceDispatch (2013-07-04 16:29:06 +0200)
>
> This is a pretty large pull request that includes:
>
> 1) Jan's refactoring of ioport access, which is now dispatched using
> the memory core
>
> 2) region ownership, where all regions are attached to an Object. This
> is a prerequisite for memory hot-unplug, among other things.
>
> 3) RCU preparatory patches, where all data structures use "copy on update"
> even though they are still read under the BQL.
>
> Everything else is delayed to 1.7---at least as far as I'm concerned:
> since this subsystem is "community maintained", other people may of course
> submit more stuff from this point on.
I forgot some Reviewed-bys, so the new commit is
c7086b4a237520d2bbe5146d8b1ace1894c2b2bf.
Paolo
> Paolo
> ----------------------------------------------------------------
> Jan Kiszka (15):
> adlib: replace register_ioport*
> applesmc: replace register_ioport*
> wdt_ib700: replace register_ioport*
> i82374: replace register_ioport*
> prep: replace register_ioport*
> vt82c686: replace register_ioport*
> Privatize register_ioport_read/write
> isa: implement isa_is_ioport_assigned via memory_region_find
> vmware-vga: Accept unaligned I/O accesses
> xen: Mark fixed platform I/O as unaligned
> ioport: Switch dispatching to memory core layer
> ioport: Remove unused old dispatching services
> vmport: Disentangle read handler type from portio
> ioport: Move portio types to ioport.h
> qom: Use atomics for object refcounting
>
> Liu Ping Fan (1):
> exec: change well-known physical sections to macros
>
> Paolo Bonzini (50):
> int128: optimize and add test cases
> scsi: keep device alive while it has requests
> dma: keep a device alive while it has SGLists
> memory: add owner argument to initialization functions
> memory: destroy phys_sections one by one
> exec: simplify destruction of the phys map
> memory: add getter for owner
> memory: add ref/unref
> memory: introduce memory_region_present
> memory: add ref/unref calls
> exec: check MRU in qemu_ram_addr_from_host
> exec: move qemu_ram_addr_from_host_nofail to cputlb.c
> memory: return MemoryRegion from qemu_ram_addr_from_host
> exec: reorganize address_space_map
> memory: ref/unref memory across address_space_map/unmap
> escc: rename struct to ESCCState
> vga: pass owner to vga_init
> vga: pass owner to vga_common_init
> vga: pass owner to cirrus_init_common
> vga: pass owner to vga_init_vbe
> vga: pass owner to vga_init_io
> vga: set owner in vga_update_memory_access
> ne2000: pass device to ne2000_setup_io, use it as owner
> vfio: pass device to vfio_mmap_bar and use it to set owner
> spapr_iommu: pass device to spapr_tce_new_table and use it to set owner
> pam: pass device to init_pam and use it to set owner
> piolist: add owner argument to initialization functions and pass devices
> hw/a*: pass owner to memory_region_init* functions
> hw/block: pass owner to memory_region_init* functions
> hw/c*: pass owner to memory_region_init* functions
> hw/d*: pass owner to memory_region_init* functions
> hw/gpio: pass owner to memory_region_init* functions
> hw/i*: pass owner to memory_region_init* functions
> hw/m*: pass owner to memory_region_init* functions
> hw/n*: pass owner to memory_region_init* functions
> hw/p*: pass owner to memory_region_init* functions
> hw/s*: pass owner to memory_region_init* functions
> hw/t*: pass owner to memory_region_init* functions
> hw/[u-x]*: pass owner to memory_region_init* functions
> add a header file for atomic operations
> memory: access FlatView from a local variable
> memory: use a new FlatView pointer on every topology update
> memory: add reference counting to FlatView
> exec: separate current memory map from the one being built
> memory: move MemoryListener declaration earlier
> exec: move listener from AddressSpaceDispatch to AddressSpace
> exec: separate current radix tree from the one being built
> exec: put memory map in AddressSpaceDispatch
> exec: remove cur_map
> exec: change some APIs to take AddressSpaceDispatch
>
> cputlb.c | 11 +
> dma-helpers.c | 6 +-
> docs/atomics.txt | 352 +++++++++++++++++++++++++
> exec.c | 425 ++++++++++++++++---------------
> hw/acpi/core.c | 9 +-
> hw/acpi/ich9.c | 10 +-
> hw/acpi/piix4.c | 23 +-
> hw/alpha/typhoon.c | 21 +-
> hw/arm/armv7m.c | 10 +-
> hw/arm/exynos4210.c | 12 +-
> hw/arm/highbank.c | 8 +-
> hw/arm/integratorcp.c | 13 +-
> hw/arm/kzm.c | 6 +-
> hw/arm/mainstone.c | 2 +-
> hw/arm/musicpal.c | 24 +-
> hw/arm/omap1.c | 52 ++--
> hw/arm/omap2.c | 16 +-
> hw/arm/omap_sx1.c | 14 +-
> hw/arm/palm.c | 10 +-
> hw/arm/pxa2xx.c | 34 +--
> hw/arm/pxa2xx_gpio.c | 2 +-
> hw/arm/pxa2xx_pic.c | 2 +-
> hw/arm/realview.c | 8 +-
> hw/arm/spitz.c | 4 +-
> hw/arm/stellaris.c | 8 +-
> hw/arm/strongarm.c | 20 +-
> hw/arm/tosa.c | 2 +-
> hw/arm/versatilepb.c | 5 +-
> hw/arm/vexpress.c | 12 +-
> hw/arm/xilinx_zynq.c | 4 +-
> hw/audio/ac97.c | 6 +-
> hw/audio/adlib.c | 20 +-
> hw/audio/cs4231.c | 3 +-
> hw/audio/cs4231a.c | 3 +-
> hw/audio/es1370.c | 2 +-
> hw/audio/intel-hda.c | 2 +-
> hw/audio/marvell_88w8618.c | 2 +-
> hw/audio/milkymist-ac97.c | 2 +-
> hw/audio/pcspk.c | 2 +-
> hw/audio/pl041.c | 2 +-
> hw/block/fdc.c | 7 +-
> hw/block/nvme.c | 3 +-
> hw/block/onenand.c | 10 +-
> hw/block/pc_sysfw.c | 6 +-
> hw/block/pflash_cfi01.c | 3 +-
> hw/block/pflash_cfi02.c | 8 +-
> hw/char/cadence_uart.c | 2 +-
> hw/char/debugcon.c | 2 +-
> hw/char/escc.c | 36 +--
> hw/char/etraxfs_ser.c | 3 +-
> hw/char/exynos4210_uart.c | 4 +-
> hw/char/grlib_apbuart.c | 2 +-
> hw/char/imx_serial.c | 3 +-
> hw/char/lm32_uart.c | 3 +-
> hw/char/mcf_uart.c | 2 +-
> hw/char/milkymist-uart.c | 2 +-
> hw/char/omap_uart.c | 2 +-
> hw/char/parallel.c | 2 +-
> hw/char/pl011.c | 2 +-
> hw/char/serial-isa.c | 2 +-
> hw/char/serial-pci.c | 7 +-
> hw/char/serial.c | 4 +-
> hw/char/sh_serial.c | 6 +-
> hw/char/tpci200.c | 12 +-
> hw/char/xilinx_uartlite.c | 4 +-
> hw/core/empty_slot.c | 2 +-
> hw/core/loader.c | 1 +
> hw/cpu/a15mpcore.c | 3 +-
> hw/cpu/a9mpcore.c | 2 +-
> hw/cpu/arm11mpcore.c | 6 +-
> hw/cpu/icc_bus.c | 2 +-
> hw/cris/axis_dev88.c | 8 +-
> hw/display/cirrus_vga.c | 28 +-
> hw/display/exynos4210_fimd.c | 8 +-
> hw/display/framebuffer.c | 12 +-
> hw/display/g364fb.c | 4 +-
> hw/display/jazz_led.c | 2 +-
> hw/display/milkymist-tmu2.c | 2 +-
> hw/display/milkymist-vgafb.c | 2 +-
> hw/display/omap_dss.c | 10 +-
> hw/display/omap_lcdc.c | 2 +-
> hw/display/pl110.c | 2 +-
> hw/display/pxa2xx_lcd.c | 2 +-
> hw/display/qxl.c | 26 +-
> hw/display/sm501.c | 8 +-
> hw/display/tc6393xb.c | 4 +-
> hw/display/tcx.c | 18 +-
> hw/display/vga-isa-mm.c | 8 +-
> hw/display/vga-isa.c | 6 +-
> hw/display/vga-pci.c | 13 +-
> hw/display/vga.c | 23 +-
> hw/display/vga_int.h | 8 +-
> hw/display/vmware_vga.c | 14 +-
> hw/dma/etraxfs_dma.c | 2 +-
> hw/dma/i82374.c | 18 +-
> hw/dma/i8257.c | 4 +-
> hw/dma/omap_dma.c | 4 +-
> hw/dma/pl080.c | 2 +-
> hw/dma/pl330.c | 3 +-
> hw/dma/puv3_dma.c | 2 +-
> hw/dma/pxa2xx_dma.c | 2 +-
> hw/dma/rc4030.c | 4 +-
> hw/dma/sparc32_dma.c | 3 +-
> hw/dma/sun4m_iommu.c | 2 +-
> hw/dma/xilinx_axidma.c | 2 +-
> hw/gpio/omap_gpio.c | 6 +-
> hw/gpio/pl061.c | 2 +-
> hw/gpio/puv3_gpio.c | 2 +-
> hw/gpio/zaurus.c | 2 +-
> hw/i2c/bitbang_i2c.c | 2 +-
> hw/i2c/exynos4210_i2c.c | 4 +-
> hw/i2c/omap_i2c.c | 2 +-
> hw/i2c/pm_smbus.c | 3 +-
> hw/i2c/versatile_i2c.c | 2 +-
> hw/i386/kvm/apic.c | 2 +-
> hw/i386/kvm/i8254.c | 2 +-
> hw/i386/kvm/i8259.c | 4 +-
> hw/i386/kvm/ioapic.c | 2 +-
> hw/i386/kvm/pci-assign.c | 24 +-
> hw/i386/kvmvapic.c | 7 +-
> hw/i386/pc.c | 14 +-
> hw/i386/pc_piix.c | 2 +-
> hw/i386/pc_q35.c | 2 +-
> hw/ide/ahci.c | 9 +-
> hw/ide/cmd646.c | 13 +-
> hw/ide/macio.c | 6 +-
> hw/ide/mmio.c | 4 +-
> hw/ide/piix.c | 8 +-
> hw/ide/via.c | 8 +-
> hw/input/milkymist-softusb.c | 6 +-
> hw/input/pckbd.c | 8 +-
> hw/input/pl050.c | 2 +-
> hw/input/pxa2xx_keypad.c | 2 +-
> hw/intc/apic.c | 2 +-
> hw/intc/arm_gic.c | 9 +-
> hw/intc/arm_gic_kvm.c | 6 +-
> hw/intc/armv7m_nvic.c | 7 +-
> hw/intc/etraxfs_pic.c | 3 +-
> hw/intc/exynos4210_combiner.c | 2 +-
> hw/intc/exynos4210_gic.c | 8 +-
> hw/intc/grlib_irqmp.c | 2 +-
> hw/intc/heathrow_pic.c | 2 +-
> hw/intc/i8259.c | 6 +-
> hw/intc/imx_avic.c | 3 +-
> hw/intc/ioapic.c | 3 +-
> hw/intc/omap_intc.c | 4 +-
> hw/intc/openpic.c | 6 +-
> hw/intc/openpic_kvm.c | 2 +-
> hw/intc/pl190.c | 2 +-
> hw/intc/puv3_intc.c | 2 +-
> hw/intc/realview_gic.c | 3 +-
> hw/intc/sh_intc.c | 6 +-
> hw/intc/slavio_intctl.c | 5 +-
> hw/intc/xilinx_intc.c | 3 +-
> hw/isa/apm.c | 2 +-
> hw/isa/i82378.c | 6 +-
> hw/isa/isa-bus.c | 2 +-
> hw/isa/isa_mmio.c | 2 +-
> hw/isa/lpc_ich9.c | 13 +-
> hw/isa/pc87312.c | 2 +-
> hw/isa/vt82c686.c | 42 +--
> hw/lm32/lm32_boards.c | 4 +-
> hw/lm32/milkymist.c | 2 +-
> hw/m68k/an5206.c | 4 +-
> hw/m68k/dummy_m68k.c | 2 +-
> hw/m68k/mcf5206.c | 2 +-
> hw/m68k/mcf5208.c | 8 +-
> hw/m68k/mcf_intc.c | 2 +-
> hw/microblaze/petalogix_ml605_mmu.c | 4 +-
> hw/microblaze/petalogix_s3adsp1800_mmu.c | 4 +-
> hw/mips/gt64xxx_pci.c | 2 +-
> hw/mips/mips_fulong2e.c | 4 +-
> hw/mips/mips_jazz.c | 12 +-
> hw/mips/mips_malta.c | 10 +-
> hw/mips/mips_mipssim.c | 4 +-
> hw/mips/mips_r4k.c | 6 +-
> hw/misc/a9scu.c | 3 +-
> hw/misc/applesmc.c | 50 +++-
> hw/misc/arm_l2x0.c | 3 +-
> hw/misc/arm_sysctl.c | 3 +-
> hw/misc/debugexit.c | 2 +-
> hw/misc/eccmemctl.c | 4 +-
> hw/misc/exynos4210_pmu.c | 4 +-
> hw/misc/imx_ccm.c | 3 +-
> hw/misc/ivshmem.c | 8 +-
> hw/misc/lm32_sys.c | 3 +-
> hw/misc/macio/cuda.c | 2 +-
> hw/misc/macio/mac_dbdma.c | 2 +-
> hw/misc/macio/macio.c | 8 +-
> hw/misc/milkymist-hpdmc.c | 2 +-
> hw/misc/milkymist-pfpu.c | 2 +-
> hw/misc/mst_fpga.c | 2 +-
> hw/misc/omap_gpmc.c | 8 +-
> hw/misc/omap_l4.c | 2 +-
> hw/misc/omap_sdrc.c | 2 +-
> hw/misc/omap_tap.c | 2 +-
> hw/misc/pc-testdev.c | 8 +-
> hw/misc/pci-testdev.c | 4 +-
> hw/misc/puv3_pm.c | 2 +-
> hw/misc/pvpanic.c | 2 +-
> hw/misc/pxa2xx_pcmcia.c | 6 +-
> hw/misc/slavio_misc.c | 16 +-
> hw/misc/vfio.c | 37 +--
> hw/misc/vmport.c | 6 +-
> hw/misc/zynq_slcr.c | 2 +-
> hw/moxie/moxiesim.c | 4 +-
> hw/net/cadence_gem.c | 3 +-
> hw/net/dp8393x.c | 2 +-
> hw/net/e1000.c | 6 +-
> hw/net/eepro100.c | 12 +-
> hw/net/etraxfs_eth.c | 3 +-
> hw/net/lan9118.c | 3 +-
> hw/net/lance.c | 3 +-
> hw/net/mcf_fec.c | 2 +-
> hw/net/milkymist-minimac2.c | 4 +-
> hw/net/mipsnet.c | 3 +-
> hw/net/ne2000-isa.c | 2 +-
> hw/net/ne2000.c | 6 +-
> hw/net/ne2000.h | 2 +-
> hw/net/opencores_eth.c | 4 +-
> hw/net/pcnet-pci.c | 6 +-
> hw/net/rtl8139.c | 6 +-
> hw/net/smc91c111.c | 2 +-
> hw/net/stellaris_enet.c | 4 +-
> hw/net/vmxnet3.c | 6 +-
> hw/net/xgmac.c | 3 +-
> hw/net/xilinx_axienet.c | 2 +-
> hw/net/xilinx_ethlite.c | 4 +-
> hw/nvram/ds1225y.c | 3 +-
> hw/nvram/fw_cfg.c | 6 +-
> hw/nvram/mac_nvram.c | 4 +-
> hw/openrisc/openrisc_sim.c | 2 +-
> hw/pci-bridge/dec.c | 4 +-
> hw/pci-bridge/pci_bridge_dev.c | 2 +-
> hw/pci-host/apb.c | 12 +-
> hw/pci-host/bonito.c | 10 +-
> hw/pci-host/grackle.c | 8 +-
> hw/pci-host/pam.c | 16 +-
> hw/pci-host/piix.c | 17 +-
> hw/pci-host/ppce500.c | 12 +-
> hw/pci-host/prep.c | 8 +-
> hw/pci-host/q35.c | 14 +-
> hw/pci-host/uninorth.c | 24 +-
> hw/pci-host/versatile.c | 16 +-
> hw/pci/msix.c | 6 +-
> hw/pci/pci.c | 5 +-
> hw/pci/pci_bridge.c | 12 +-
> hw/pci/pcie_host.c | 3 +-
> hw/pci/shpc.c | 4 +-
> hw/ppc/e500.c | 4 +-
> hw/ppc/mac_newworld.c | 10 +-
> hw/ppc/mac_oldworld.c | 6 +-
> hw/ppc/mpc8544_guts.c | 2 +-
> hw/ppc/ppc405_boards.c | 18 +-
> hw/ppc/ppc405_uc.c | 12 +-
> hw/ppc/ppc4xx_devs.c | 4 +-
> hw/ppc/ppc4xx_pci.c | 8 +-
> hw/ppc/ppce500_spin.c | 4 +-
> hw/ppc/prep.c | 31 ++-
> hw/ppc/spapr.c | 2 +-
> hw/ppc/spapr_iommu.c | 4 +-
> hw/ppc/spapr_pci.c | 15 +-
> hw/ppc/spapr_vio.c | 2 +-
> hw/ppc/virtex_ml507.c | 2 +-
> hw/s390x/s390-virtio-ccw.c | 2 +-
> hw/s390x/s390-virtio.c | 2 +-
> hw/scsi/esp-pci.c | 3 +-
> hw/scsi/esp.c | 4 +-
> hw/scsi/lsi53c895a.c | 9 +-
> hw/scsi/megasas.c | 6 +-
> hw/scsi/scsi-bus.c | 4 +
> hw/scsi/virtio-scsi.c | 10 +-
> hw/scsi/vmw_pvscsi.c | 2 +-
> hw/sd/milkymist-memcard.c | 2 +-
> hw/sd/omap_mmc.c | 4 +-
> hw/sd/pl181.c | 2 +-
> hw/sd/pxa2xx_mmci.c | 2 +-
> hw/sd/sdhci.c | 2 +-
> hw/sh4/r2d.c | 4 +-
> hw/sh4/sh7750.c | 16 +-
> hw/sh4/sh_pci.c | 6 +-
> hw/sh4/shix.c | 6 +-
> hw/sparc/leon3.c | 4 +-
> hw/sparc/sun4m.c | 9 +-
> hw/sparc64/sun4u.c | 4 +-
> hw/ssi/omap_spi.c | 2 +-
> hw/ssi/pl022.c | 2 +-
> hw/ssi/xilinx_spi.c | 3 +-
> hw/ssi/xilinx_spips.c | 5 +-
> hw/timer/arm_mptimer.c | 4 +-
> hw/timer/arm_timer.c | 6 +-
> hw/timer/cadence_ttc.c | 3 +-
> hw/timer/etraxfs_timer.c | 3 +-
> hw/timer/exynos4210_mct.c | 4 +-
> hw/timer/exynos4210_pwm.c | 4 +-
> hw/timer/exynos4210_rtc.c | 4 +-
> hw/timer/grlib_gptimer.c | 3 +-
> hw/timer/hpet.c | 2 +-
> hw/timer/i8254.c | 3 +-
> hw/timer/imx_epit.c | 2 +-
> hw/timer/imx_gpt.c | 2 +-
> hw/timer/lm32_timer.c | 3 +-
> hw/timer/m48t59.c | 8 +-
> hw/timer/mc146818rtc.c | 2 +-
> hw/timer/milkymist-sysctl.c | 2 +-
> hw/timer/omap_gptimer.c | 2 +-
> hw/timer/omap_synctimer.c | 2 +-
> hw/timer/pl031.c | 2 +-
> hw/timer/puv3_ost.c | 2 +-
> hw/timer/pxa2xx_timer.c | 2 +-
> hw/timer/sh_timer.c | 6 +-
> hw/timer/slavio_timer.c | 2 +-
> hw/timer/tusb6010.c | 4 +-
> hw/timer/xilinx_timer.c | 2 +-
> hw/tpm/tpm_tis.c | 3 +-
> hw/unicore32/puv3.c | 2 +-
> hw/usb/hcd-ehci-sysbus.c | 2 +-
> hw/usb/hcd-ehci.c | 12 +-
> hw/usb/hcd-ohci.c | 3 +-
> hw/usb/hcd-uhci.c | 4 +-
> hw/usb/hcd-xhci.c | 12 +-
> hw/virtio/dataplane/hostmem.c | 7 +
> hw/virtio/vhost.c | 11 +-
> hw/virtio/virtio-balloon.c | 1 +
> hw/virtio/virtio-pci.c | 4 +-
> hw/watchdog/wdt_i6300esb.c | 3 +-
> hw/watchdog/wdt_ib700.c | 12 +-
> hw/xen/xen_apic.c | 4 +-
> hw/xen/xen_platform.c | 11 +-
> hw/xen/xen_pt.c | 8 +-
> hw/xen/xen_pt_msi.c | 3 +-
> hw/xtensa/xtensa_lx60.c | 12 +-
> hw/xtensa/xtensa_sim.c | 4 +-
> include/exec/cpu-common.h | 3 +-
> include/exec/ioport.h | 30 +--
> include/exec/iorange.h | 31 ---
> include/exec/memory-internal.h | 2 -
> include/exec/memory.h | 156 ++++++++----
> include/hw/i386/pc.h | 6 +-
> include/hw/pci-host/pam.h | 4 +-
> include/hw/pci/pci.h | 2 +-
> include/hw/ppc/spapr.h | 3 +-
> include/hw/virtio/dataplane/hostmem.h | 1 +
> include/qemu/atomic.h | 198 +++++++++++---
> include/qemu/int128.h | 25 +-
> include/sysemu/dma.h | 4 +-
> ioport.c | 383 ++++++++--------------------
> kvm-all.c | 2 +
> memory.c | 290 ++++++++++++---------
> migration.c | 3 +-
> qom/object.c | 5 +-
> target-arm/kvm.c | 2 +
> target-i386/kvm.c | 4 +-
> target-ppc/kvm.c | 2 +-
> target-sparc/mmu_helper.c | 1 +
> tests/Makefile | 6 +-
> tests/test-int128.c | 212 +++++++++++++++
> tests/test-thread-pool.c | 8 +-
> xen-all.c | 10 +-
> 359 files changed, 2551 insertions(+), 1711 deletions(-)
> create mode 100644 docs/atomics.txt
> delete mode 100644 include/exec/iorange.h
> create mode 100644 tests/test-int128.c
>
^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [Qemu-devel] [PATCH 03/66] dma: keep a device alive while it has SGLists
2013-07-04 15:51 ` Jan Kiszka
@ 2013-07-04 15:59 ` Jan Kiszka
2013-07-04 16:00 ` Paolo Bonzini
1 sibling, 0 replies; 78+ messages in thread
From: Jan Kiszka @ 2013-07-04 15:59 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: qemu-devel, Gerd Hoffmann
On 2013-07-04 17:51, Jan Kiszka wrote:
> On 2013-07-04 17:12, Paolo Bonzini wrote:
>> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
>> ---
>> dma-helpers.c | 6 +++++-
>> hw/ide/ahci.c | 3 ++-
>> hw/ide/macio.c | 4 ++--
>> hw/scsi/virtio-scsi.c | 10 ++++++----
>> hw/usb/hcd-ehci.c | 4 ++--
>> include/hw/pci/pci.h | 2 +-
>> include/sysemu/dma.h | 4 +++-
>> 7 files changed, 21 insertions(+), 12 deletions(-)
>>
>> diff --git a/dma-helpers.c b/dma-helpers.c
>> index 5afba47..499550f 100644
>> --- a/dma-helpers.c
>> +++ b/dma-helpers.c
>> @@ -34,13 +34,16 @@ int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len)
>> return error;
>> }
>>
>> -void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint, AddressSpace *as)
>> +void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev, int alloc_hint,
>> + AddressSpace *as)
>> {
>> qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry));
>> qsg->nsg = 0;
>> qsg->nalloc = alloc_hint;
>> qsg->size = 0;
>> qsg->as = as;
>> + qsg->dev = dev;
>> + object_ref(OBJECT(dev));
>> }
>>
>> void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
>> @@ -57,6 +60,7 @@ void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
>>
>> void qemu_sglist_destroy(QEMUSGList *qsg)
>> {
>> + object_unref(OBJECT(qsg->dev));
>> g_free(qsg->sg);
>> memset(qsg, 0, sizeof(*qsg));
>> }
>> diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
>> index 1adfa0b..6b87549 100644
>> --- a/hw/ide/ahci.c
>> +++ b/hw/ide/ahci.c
>> @@ -691,7 +691,8 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset)
>> goto out;
>> }
>>
>> - qemu_sglist_init(sglist, (sglist_alloc_hint - off_idx), ad->hba->as);
>> + qemu_sglist_init(sglist, DEVICE(ad->hba), (sglist_alloc_hint - off_idx),
>> + ad->hba->as);
>> qemu_sglist_add(sglist, le64_to_cpu(tbl[off_idx].addr + off_pos),
>> le32_to_cpu(tbl[off_idx].flags_size) + 1 - off_pos);
>>
>> diff --git a/hw/ide/macio.c b/hw/ide/macio.c
>> index a1952b0..84288ae 100644
>> --- a/hw/ide/macio.c
>> +++ b/hw/ide/macio.c
>> @@ -70,7 +70,7 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
>>
>> s->io_buffer_size = io->len;
>>
>> - qemu_sglist_init(&s->sg, io->len / MACIO_PAGE_SIZE + 1,
>> + qemu_sglist_init(&s->sg, DEVICE(m), io->len / MACIO_PAGE_SIZE + 1,
>> &address_space_memory);
>> qemu_sglist_add(&s->sg, io->addr, io->len);
>> io->addr += io->len;
>> @@ -127,7 +127,7 @@ static void pmac_ide_transfer_cb(void *opaque, int ret)
>> s->io_buffer_index = 0;
>> s->io_buffer_size = io->len;
>>
>> - qemu_sglist_init(&s->sg, io->len / MACIO_PAGE_SIZE + 1,
>> + qemu_sglist_init(&s->sg, DEVICE(m), io->len / MACIO_PAGE_SIZE + 1,
>> &address_space_memory);
>> qemu_sglist_add(&s->sg, io->addr, io->len);
>> io->addr += io->len;
>> diff --git a/hw/scsi/virtio-scsi.c b/hw/scsi/virtio-scsi.c
>> index b8a0abf..712f0ad 100644
>> --- a/hw/scsi/virtio-scsi.c
>> +++ b/hw/scsi/virtio-scsi.c
>> @@ -77,10 +77,12 @@ static void virtio_scsi_bad_req(void)
>> exit(1);
>> }
>>
>> -static void qemu_sgl_init_external(QEMUSGList *qsgl, struct iovec *sg,
>> +static void qemu_sgl_init_external(VirtIOSCSIReq *req, struct iovec *sg,
>> hwaddr *addr, int num)
>> {
>> - qemu_sglist_init(qsgl, num, &address_space_memory);
>> + QEMUSGList *qsgl = &req->qsgl;
>> +
>> + qemu_sglist_init(qsgl, DEVICE(req->dev), num, &address_space_memory);
>> while (num--) {
>> qemu_sglist_add(qsgl, *(addr++), (sg++)->iov_len);
>> }
>> @@ -99,11 +101,11 @@ static void virtio_scsi_parse_req(VirtIOSCSI *s, VirtQueue *vq,
>> req->resp.buf = req->elem.in_sg[0].iov_base;
>>
>> if (req->elem.out_num > 1) {
>> - qemu_sgl_init_external(&req->qsgl, &req->elem.out_sg[1],
>> + qemu_sgl_init_external(req, &req->elem.out_sg[1],
>> &req->elem.out_addr[1],
>> req->elem.out_num - 1);
>> } else {
>> - qemu_sgl_init_external(&req->qsgl, &req->elem.in_sg[1],
>> + qemu_sgl_init_external(req, &req->elem.in_sg[1],
>> &req->elem.in_addr[1],
>> req->elem.in_num - 1);
>> }
>> diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
>> index 16d6356..65e6680 100644
>> --- a/hw/usb/hcd-ehci.c
>> +++ b/hw/usb/hcd-ehci.c
>> @@ -1245,7 +1245,7 @@ static int ehci_init_transfer(EHCIPacket *p)
>> cpage = get_field(p->qtd.token, QTD_TOKEN_CPAGE);
>> bytes = get_field(p->qtd.token, QTD_TOKEN_TBYTES);
>> offset = p->qtd.bufptr[0] & ~QTD_BUFPTR_MASK;
>> - qemu_sglist_init(&p->sgl, 5, p->queue->ehci->as);
>> + qemu_sglist_init(&p->sgl, DEVICE(p->queue->ehci), 5, p->queue->ehci->as);
>
> I was just testing this from your current git tree, and it causes
>
> qemu/hw/usb/hcd-ehci.c:1248:ehci_init_transfer: Object 0x7f3eb39c6500 is
> not an instance of type device
>
> when booting a q35 machine (as it pulls in EHCI). The cast is obviously
> wrong, but I didn't spot yet what is required instead.
The problem is that EHCIState is embedded into the actual QOM device
states, but not at a known location. So you likely need a generic device
pointer from EHCIState back to the device using it.
Jan
--
Siemens AG, Corporate Technology, CT RTC ITP SES-DE
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [Qemu-devel] [PATCH 03/66] dma: keep a device alive while it has SGLists
2013-07-04 15:51 ` Jan Kiszka
2013-07-04 15:59 ` Jan Kiszka
@ 2013-07-04 16:00 ` Paolo Bonzini
2013-07-04 16:17 ` Jan Kiszka
1 sibling, 1 reply; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 16:00 UTC (permalink / raw)
To: Jan Kiszka; +Cc: qemu-devel, Andreas Färber, Gerd Hoffmann
Il 04/07/2013 17:51, Jan Kiszka ha scritto:
>> > diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
>> > index 16d6356..65e6680 100644
>> > --- a/hw/usb/hcd-ehci.c
>> > +++ b/hw/usb/hcd-ehci.c
>> > @@ -1245,7 +1245,7 @@ static int ehci_init_transfer(EHCIPacket *p)
>> > cpage = get_field(p->qtd.token, QTD_TOKEN_CPAGE);
>> > bytes = get_field(p->qtd.token, QTD_TOKEN_TBYTES);
>> > offset = p->qtd.bufptr[0] & ~QTD_BUFPTR_MASK;
>> > - qemu_sglist_init(&p->sgl, 5, p->queue->ehci->as);
>> > + qemu_sglist_init(&p->sgl, DEVICE(p->queue->ehci), 5, p->queue->ehci->as);
> I was just testing this from your current git tree, and it causes
>
> qemu/hw/usb/hcd-ehci.c:1248:ehci_init_transfer: Object 0x7f3eb39c6500 is
> not an instance of type device
>
> when booting a q35 machine (as it pulls in EHCI). The cast is obviously
> wrong, but I didn't spot yet what is required instead.
EHCIState and AHCIDevice are not qdev structs. You need to go
through the bus to get the DeviceState. But I had fixed this once...
/me checks
Yes, I had fixed it at the same time I fixed Andreas's requested
BUS(). I thought I had fixed it _before_ posting this patch first.
Pulling in the "Reviewed-by"s (as I just replied to the cover
letter) also pulled in the right version of the patch. So it
should be fixed _now_ in git (commit c7086b4a).
I tested both AHCI and EHCI and they work.
(BTW, Andreas, I'll do a SCSI_BUS pass over hw/scsi when I
have some time).
Paolo
git diff mirror/iommu-for-anthony@{1} iommu-for-anthony
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index bae484a..97eddec 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -650,6 +650,8 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset)
int off_idx = -1;
int off_pos = -1;
int tbl_entry_size;
+ IDEBus *bus = &ad->port;
+ BusState *qbus = BUS(bus);
if (!sglist_alloc_hint) {
DPRINTF(ad->port_no, "no sg list given by guest: 0x%08x\n", opts);
@@ -691,7 +693,7 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset)
goto out;
}
- qemu_sglist_init(sglist, DEVICE(ad->hba), (sglist_alloc_hint - off_idx),
+ qemu_sglist_init(sglist, qbus->parent, (sglist_alloc_hint - off_idx),
ad->hba->as);
qemu_sglist_add(sglist, le64_to_cpu(tbl[off_idx].addr + off_pos),
le32_to_cpu(tbl[off_idx].flags_size) + 1 - off_pos);
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index cdc932b..67e4b24 100644
--- a/hw/usb/hcd-ehci.c
+++ b/hw/usb/hcd-ehci.c
@@ -1241,11 +1241,13 @@ static int ehci_init_transfer(EHCIPacket *p)
{
uint32_t cpage, offset, bytes, plen;
dma_addr_t page;
+ USBBus *bus = &p->queue->ehci->bus;
+ BusState *qbus = BUS(bus);
cpage = get_field(p->qtd.token, QTD_TOKEN_CPAGE);
bytes = get_field(p->qtd.token, QTD_TOKEN_TBYTES);
offset = p->qtd.bufptr[0] & ~QTD_BUFPTR_MASK;
- qemu_sglist_init(&p->sgl, DEVICE(p->queue->ehci), 5, p->queue->ehci->as);
+ qemu_sglist_init(&p->sgl, qbus->parent, 5, p->queue->ehci->as);
while (bytes > 0) {
if (cpage > 4) {
^ permalink raw reply related [flat|nested] 78+ messages in thread
* Re: [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation
2013-07-04 15:52 ` [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
@ 2013-07-04 16:08 ` Paolo Bonzini
2013-07-08 13:20 ` Anthony Liguori
1 sibling, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-07-04 16:08 UTC (permalink / raw)
Cc: qemu-devel
Il 04/07/2013 17:52, Paolo Bonzini ha scritto:
>> > Anthony,
>> >
>> > the following changes since commit 1acd5a373905ddb28957842256a038956941f332:
>> >
>> > Merge remote-tracking branch 'agraf/ppc-for-upstream' into staging (2013-07-01 09:03:04 -0500)
>> >
>> > are available in the git repository at:
>> >
>> >
>> > git://github.com/bonzini/qemu.git iommu-for-anthony
>> >
>> > for you to fetch changes up to 28bb1ad4daef9949fc2c3f66879c2c0f0673df04:
>> >
>> > exec: change some APIs to take AddressSpaceDispatch (2013-07-04 16:29:06 +0200)
>> >
>> > This is a pretty large pull request that includes:
>> >
>> > 1) Jan's refactoring of ioport access, which is now dispatched using
>> > the memory core
>> >
>> > 2) region ownership, where all regions are attached to an Object. This
>> > is a prerequisite for memory hot-unplug, among other things.
>> >
>> > 3) RCU preparatory patches, where all data structures use "copy on update"
>> > even though they are still read under the BQL.
>> >
>> > Everything else is delayed to 1.7---at least as far as I'm concerned:
>> > since this subsystem is "community maintained", other people may of course
>> > submit more stuff from this point on.
> I forgot some Reviewed-bys, so the new commit is
> c7086b4a237520d2bbe5146d8b1ace1894c2b2bf.
And as Jan found out, it's not just some Reviewed-bys.
Paolo
^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [Qemu-devel] [PATCH 03/66] dma: keep a device alive while it has SGLists
2013-07-04 16:00 ` Paolo Bonzini
@ 2013-07-04 16:17 ` Jan Kiszka
0 siblings, 0 replies; 78+ messages in thread
From: Jan Kiszka @ 2013-07-04 16:17 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: qemu-devel, Andreas Färber, Gerd Hoffmann
On 2013-07-04 18:00, Paolo Bonzini wrote:
> Il 04/07/2013 17:51, Jan Kiszka ha scritto:
>>>> diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
>>>> index 16d6356..65e6680 100644
>>>> --- a/hw/usb/hcd-ehci.c
>>>> +++ b/hw/usb/hcd-ehci.c
>>>> @@ -1245,7 +1245,7 @@ static int ehci_init_transfer(EHCIPacket *p)
>>>> cpage = get_field(p->qtd.token, QTD_TOKEN_CPAGE);
>>>> bytes = get_field(p->qtd.token, QTD_TOKEN_TBYTES);
>>>> offset = p->qtd.bufptr[0] & ~QTD_BUFPTR_MASK;
>>>> - qemu_sglist_init(&p->sgl, 5, p->queue->ehci->as);
>>>> + qemu_sglist_init(&p->sgl, DEVICE(p->queue->ehci), 5, p->queue->ehci->as);
>> I was just testing this from your current git tree, and it causes
>>
>> qemu/hw/usb/hcd-ehci.c:1248:ehci_init_transfer: Object 0x7f3eb39c6500 is
>> not an instance of type device
>>
>> when booting a q35 machine (as it pulls in EHCI). The cast is obviously
>> wrong, but I didn't spot yet what is required instead.
>
> EHCIState and AHCIDevice are not qdev structs. You need to go
> through the bus to get the DeviceState. But I had fixed this once...
>
> /me checks
>
> Yes, I had fixed it at the same time I fixed Andreas's requested
> BUS(). I thought I had fixed it _before_ posting this patch first.
>
> Pulling in the "Reviewed-by"s (as I just replied to the cover
> letter) also pulled in the right version of the patch. So it
> should be fixed _now_ in git (commit c7086b4a).
>
> I tested both AHCI and EHCI and they work.
Yes, it's now fine here as well.
Jan
--
Siemens AG, Corporate Technology, CT RTC ITP SES-DE
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [Qemu-devel] [PATCH 28/66] exec: reorganize address_space_map
2013-07-04 15:13 ` [Qemu-devel] [PATCH 28/66] exec: reorganize address_space_map Paolo Bonzini
@ 2013-07-08 8:21 ` Peter Maydell
0 siblings, 0 replies; 78+ messages in thread
From: Peter Maydell @ 2013-07-08 8:21 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: qemu-devel
On 4 July 2013 16:13, Paolo Bonzini <pbonzini@redhat.com> wrote:
> - rlen = todo;
> - ret = qemu_ram_ptr_length(raddr, &rlen);
> - *plen = rlen;
> - return ret;
> +
> + *plen = done;
> + return qemu_ram_ptr_length(raddr + base, plen);
This change provokes a warning from clang on MacOSX:
CC arm-softmmu/exec.o
/Users/pm215/src/qemu/exec.c:2164:46: warning: incompatible pointer
types passing 'hwaddr *' (aka 'unsigned long long *') to parameter
of type 'ram_addr_t *' (aka 'unsigned long *')
[-Wincompatible-pointer-types]
return qemu_ram_ptr_length(raddr + base, plen);
^~~~
/Users/pm215/src/qemu/exec.c:1392:63: note: passing argument to
parameter 'size' here
static void *qemu_ram_ptr_length(ram_addr_t addr, ram_addr_t *size)
^
1 warning generated.
I'll cook up a patch...
thanks
-- PMM
^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation
2013-07-04 15:52 ` [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
2013-07-04 16:08 ` Paolo Bonzini
@ 2013-07-08 13:20 ` Anthony Liguori
1 sibling, 0 replies; 78+ messages in thread
From: Anthony Liguori @ 2013-07-08 13:20 UTC (permalink / raw)
To: Paolo Bonzini, qemu-devel
Paolo Bonzini <pbonzini@redhat.com> writes:
> Il 04/07/2013 17:12, Paolo Bonzini ha scritto:
>> Anthony,
>>
>> the following changes since commit 1acd5a373905ddb28957842256a038956941f332:
>>
>> Merge remote-tracking branch 'agraf/ppc-for-upstream' into staging (2013-07-01 09:03:04 -0500)
>>
>> are available in the git repository at:
>>
>>
>> git://github.com/bonzini/qemu.git iommu-for-anthony
>>
>> for you to fetch changes up to 28bb1ad4daef9949fc2c3f66879c2c0f0673df04:
>>
>> exec: change some APIs to take AddressSpaceDispatch (2013-07-04 16:29:06 +0200)
>>
>> This is a pretty large pull request that includes:
>>
>> 1) Jan's refactoring of ioport access, which is now dispatched using
>> the memory core
>>
>> 2) region ownership, where all regions are attached to an Object. This
>> is a prerequisite for memory hot-unplug, among other things.
>>
>> 3) RCU preparatory patches, where all data structures use "copy on update"
>> even though they are still read under the BQL.
>>
>> Everything else is delayed to 1.7---at least as far as I'm concerned:
>> since this subsystem is "community maintained", other people may of course
>> submit more stuff from this point on.
>
> I forgot some Reviewed-bys, so the new commit is
> c7086b4a237520d2bbe5146d8b1ace1894c2b2bf.
Pulled, thanks.
In the future, please send a v2 when this happens. My scripts scan the
pull request message and find the "up to XXXXX". It then determines
whether the merge has been processed by searching for a commit with a
head of "XXXXX".
Regards,
Anthony Liguori
>
> Paolo
>
>> Paolo
>> ----------------------------------------------------------------
>> Jan Kiszka (15):
>> adlib: replace register_ioport*
>> applesmc: replace register_ioport*
>> wdt_ib700: replace register_ioport*
>> i82374: replace register_ioport*
>> prep: replace register_ioport*
>> vt82c686: replace register_ioport*
>> Privatize register_ioport_read/write
>> isa: implement isa_is_ioport_assigned via memory_region_find
>> vmware-vga: Accept unaligned I/O accesses
>> xen: Mark fixed platform I/O as unaligned
>> ioport: Switch dispatching to memory core layer
>> ioport: Remove unused old dispatching services
>> vmport: Disentangle read handler type from portio
>> ioport: Move portio types to ioport.h
>> qom: Use atomics for object refcounting
>>
>> Liu Ping Fan (1):
>> exec: change well-known physical sections to macros
>>
>> Paolo Bonzini (50):
>> int128: optimize and add test cases
>> scsi: keep device alive while it has requests
>> dma: keep a device alive while it has SGLists
>> memory: add owner argument to initialization functions
>> memory: destroy phys_sections one by one
>> exec: simplify destruction of the phys map
>> memory: add getter for owner
>> memory: add ref/unref
>> memory: introduce memory_region_present
>> memory: add ref/unref calls
>> exec: check MRU in qemu_ram_addr_from_host
>> exec: move qemu_ram_addr_from_host_nofail to cputlb.c
>> memory: return MemoryRegion from qemu_ram_addr_from_host
>> exec: reorganize address_space_map
>> memory: ref/unref memory across address_space_map/unmap
>> escc: rename struct to ESCCState
>> vga: pass owner to vga_init
>> vga: pass owner to vga_common_init
>> vga: pass owner to cirrus_init_common
>> vga: pass owner to vga_init_vbe
>> vga: pass owner to vga_init_io
>> vga: set owner in vga_update_memory_access
>> ne2000: pass device to ne2000_setup_io, use it as owner
>> vfio: pass device to vfio_mmap_bar and use it to set owner
>> spapr_iommu: pass device to spapr_tce_new_table and use it to set owner
>> pam: pass device to init_pam and use it to set owner
>> piolist: add owner argument to initialization functions and pass devices
>> hw/a*: pass owner to memory_region_init* functions
>> hw/block: pass owner to memory_region_init* functions
>> hw/c*: pass owner to memory_region_init* functions
>> hw/d*: pass owner to memory_region_init* functions
>> hw/gpio: pass owner to memory_region_init* functions
>> hw/i*: pass owner to memory_region_init* functions
>> hw/m*: pass owner to memory_region_init* functions
>> hw/n*: pass owner to memory_region_init* functions
>> hw/p*: pass owner to memory_region_init* functions
>> hw/s*: pass owner to memory_region_init* functions
>> hw/t*: pass owner to memory_region_init* functions
>> hw/[u-x]*: pass owner to memory_region_init* functions
>> add a header file for atomic operations
>> memory: access FlatView from a local variable
>> memory: use a new FlatView pointer on every topology update
>> memory: add reference counting to FlatView
>> exec: separate current memory map from the one being built
>> memory: move MemoryListener declaration earlier
>> exec: move listener from AddressSpaceDispatch to AddressSpace
>> exec: separate current radix tree from the one being built
>> exec: put memory map in AddressSpaceDispatch
>> exec: remove cur_map
>> exec: change some APIs to take AddressSpaceDispatch
>>
>> cputlb.c | 11 +
>> dma-helpers.c | 6 +-
>> docs/atomics.txt | 352 +++++++++++++++++++++++++
>> exec.c | 425 ++++++++++++++++---------------
>> hw/acpi/core.c | 9 +-
>> hw/acpi/ich9.c | 10 +-
>> hw/acpi/piix4.c | 23 +-
>> hw/alpha/typhoon.c | 21 +-
>> hw/arm/armv7m.c | 10 +-
>> hw/arm/exynos4210.c | 12 +-
>> hw/arm/highbank.c | 8 +-
>> hw/arm/integratorcp.c | 13 +-
>> hw/arm/kzm.c | 6 +-
>> hw/arm/mainstone.c | 2 +-
>> hw/arm/musicpal.c | 24 +-
>> hw/arm/omap1.c | 52 ++--
>> hw/arm/omap2.c | 16 +-
>> hw/arm/omap_sx1.c | 14 +-
>> hw/arm/palm.c | 10 +-
>> hw/arm/pxa2xx.c | 34 +--
>> hw/arm/pxa2xx_gpio.c | 2 +-
>> hw/arm/pxa2xx_pic.c | 2 +-
>> hw/arm/realview.c | 8 +-
>> hw/arm/spitz.c | 4 +-
>> hw/arm/stellaris.c | 8 +-
>> hw/arm/strongarm.c | 20 +-
>> hw/arm/tosa.c | 2 +-
>> hw/arm/versatilepb.c | 5 +-
>> hw/arm/vexpress.c | 12 +-
>> hw/arm/xilinx_zynq.c | 4 +-
>> hw/audio/ac97.c | 6 +-
>> hw/audio/adlib.c | 20 +-
>> hw/audio/cs4231.c | 3 +-
>> hw/audio/cs4231a.c | 3 +-
>> hw/audio/es1370.c | 2 +-
>> hw/audio/intel-hda.c | 2 +-
>> hw/audio/marvell_88w8618.c | 2 +-
>> hw/audio/milkymist-ac97.c | 2 +-
>> hw/audio/pcspk.c | 2 +-
>> hw/audio/pl041.c | 2 +-
>> hw/block/fdc.c | 7 +-
>> hw/block/nvme.c | 3 +-
>> hw/block/onenand.c | 10 +-
>> hw/block/pc_sysfw.c | 6 +-
>> hw/block/pflash_cfi01.c | 3 +-
>> hw/block/pflash_cfi02.c | 8 +-
>> hw/char/cadence_uart.c | 2 +-
>> hw/char/debugcon.c | 2 +-
>> hw/char/escc.c | 36 +--
>> hw/char/etraxfs_ser.c | 3 +-
>> hw/char/exynos4210_uart.c | 4 +-
>> hw/char/grlib_apbuart.c | 2 +-
>> hw/char/imx_serial.c | 3 +-
>> hw/char/lm32_uart.c | 3 +-
>> hw/char/mcf_uart.c | 2 +-
>> hw/char/milkymist-uart.c | 2 +-
>> hw/char/omap_uart.c | 2 +-
>> hw/char/parallel.c | 2 +-
>> hw/char/pl011.c | 2 +-
>> hw/char/serial-isa.c | 2 +-
>> hw/char/serial-pci.c | 7 +-
>> hw/char/serial.c | 4 +-
>> hw/char/sh_serial.c | 6 +-
>> hw/char/tpci200.c | 12 +-
>> hw/char/xilinx_uartlite.c | 4 +-
>> hw/core/empty_slot.c | 2 +-
>> hw/core/loader.c | 1 +
>> hw/cpu/a15mpcore.c | 3 +-
>> hw/cpu/a9mpcore.c | 2 +-
>> hw/cpu/arm11mpcore.c | 6 +-
>> hw/cpu/icc_bus.c | 2 +-
>> hw/cris/axis_dev88.c | 8 +-
>> hw/display/cirrus_vga.c | 28 +-
>> hw/display/exynos4210_fimd.c | 8 +-
>> hw/display/framebuffer.c | 12 +-
>> hw/display/g364fb.c | 4 +-
>> hw/display/jazz_led.c | 2 +-
>> hw/display/milkymist-tmu2.c | 2 +-
>> hw/display/milkymist-vgafb.c | 2 +-
>> hw/display/omap_dss.c | 10 +-
>> hw/display/omap_lcdc.c | 2 +-
>> hw/display/pl110.c | 2 +-
>> hw/display/pxa2xx_lcd.c | 2 +-
>> hw/display/qxl.c | 26 +-
>> hw/display/sm501.c | 8 +-
>> hw/display/tc6393xb.c | 4 +-
>> hw/display/tcx.c | 18 +-
>> hw/display/vga-isa-mm.c | 8 +-
>> hw/display/vga-isa.c | 6 +-
>> hw/display/vga-pci.c | 13 +-
>> hw/display/vga.c | 23 +-
>> hw/display/vga_int.h | 8 +-
>> hw/display/vmware_vga.c | 14 +-
>> hw/dma/etraxfs_dma.c | 2 +-
>> hw/dma/i82374.c | 18 +-
>> hw/dma/i8257.c | 4 +-
>> hw/dma/omap_dma.c | 4 +-
>> hw/dma/pl080.c | 2 +-
>> hw/dma/pl330.c | 3 +-
>> hw/dma/puv3_dma.c | 2 +-
>> hw/dma/pxa2xx_dma.c | 2 +-
>> hw/dma/rc4030.c | 4 +-
>> hw/dma/sparc32_dma.c | 3 +-
>> hw/dma/sun4m_iommu.c | 2 +-
>> hw/dma/xilinx_axidma.c | 2 +-
>> hw/gpio/omap_gpio.c | 6 +-
>> hw/gpio/pl061.c | 2 +-
>> hw/gpio/puv3_gpio.c | 2 +-
>> hw/gpio/zaurus.c | 2 +-
>> hw/i2c/bitbang_i2c.c | 2 +-
>> hw/i2c/exynos4210_i2c.c | 4 +-
>> hw/i2c/omap_i2c.c | 2 +-
>> hw/i2c/pm_smbus.c | 3 +-
>> hw/i2c/versatile_i2c.c | 2 +-
>> hw/i386/kvm/apic.c | 2 +-
>> hw/i386/kvm/i8254.c | 2 +-
>> hw/i386/kvm/i8259.c | 4 +-
>> hw/i386/kvm/ioapic.c | 2 +-
>> hw/i386/kvm/pci-assign.c | 24 +-
>> hw/i386/kvmvapic.c | 7 +-
>> hw/i386/pc.c | 14 +-
>> hw/i386/pc_piix.c | 2 +-
>> hw/i386/pc_q35.c | 2 +-
>> hw/ide/ahci.c | 9 +-
>> hw/ide/cmd646.c | 13 +-
>> hw/ide/macio.c | 6 +-
>> hw/ide/mmio.c | 4 +-
>> hw/ide/piix.c | 8 +-
>> hw/ide/via.c | 8 +-
>> hw/input/milkymist-softusb.c | 6 +-
>> hw/input/pckbd.c | 8 +-
>> hw/input/pl050.c | 2 +-
>> hw/input/pxa2xx_keypad.c | 2 +-
>> hw/intc/apic.c | 2 +-
>> hw/intc/arm_gic.c | 9 +-
>> hw/intc/arm_gic_kvm.c | 6 +-
>> hw/intc/armv7m_nvic.c | 7 +-
>> hw/intc/etraxfs_pic.c | 3 +-
>> hw/intc/exynos4210_combiner.c | 2 +-
>> hw/intc/exynos4210_gic.c | 8 +-
>> hw/intc/grlib_irqmp.c | 2 +-
>> hw/intc/heathrow_pic.c | 2 +-
>> hw/intc/i8259.c | 6 +-
>> hw/intc/imx_avic.c | 3 +-
>> hw/intc/ioapic.c | 3 +-
>> hw/intc/omap_intc.c | 4 +-
>> hw/intc/openpic.c | 6 +-
>> hw/intc/openpic_kvm.c | 2 +-
>> hw/intc/pl190.c | 2 +-
>> hw/intc/puv3_intc.c | 2 +-
>> hw/intc/realview_gic.c | 3 +-
>> hw/intc/sh_intc.c | 6 +-
>> hw/intc/slavio_intctl.c | 5 +-
>> hw/intc/xilinx_intc.c | 3 +-
>> hw/isa/apm.c | 2 +-
>> hw/isa/i82378.c | 6 +-
>> hw/isa/isa-bus.c | 2 +-
>> hw/isa/isa_mmio.c | 2 +-
>> hw/isa/lpc_ich9.c | 13 +-
>> hw/isa/pc87312.c | 2 +-
>> hw/isa/vt82c686.c | 42 +--
>> hw/lm32/lm32_boards.c | 4 +-
>> hw/lm32/milkymist.c | 2 +-
>> hw/m68k/an5206.c | 4 +-
>> hw/m68k/dummy_m68k.c | 2 +-
>> hw/m68k/mcf5206.c | 2 +-
>> hw/m68k/mcf5208.c | 8 +-
>> hw/m68k/mcf_intc.c | 2 +-
>> hw/microblaze/petalogix_ml605_mmu.c | 4 +-
>> hw/microblaze/petalogix_s3adsp1800_mmu.c | 4 +-
>> hw/mips/gt64xxx_pci.c | 2 +-
>> hw/mips/mips_fulong2e.c | 4 +-
>> hw/mips/mips_jazz.c | 12 +-
>> hw/mips/mips_malta.c | 10 +-
>> hw/mips/mips_mipssim.c | 4 +-
>> hw/mips/mips_r4k.c | 6 +-
>> hw/misc/a9scu.c | 3 +-
>> hw/misc/applesmc.c | 50 +++-
>> hw/misc/arm_l2x0.c | 3 +-
>> hw/misc/arm_sysctl.c | 3 +-
>> hw/misc/debugexit.c | 2 +-
>> hw/misc/eccmemctl.c | 4 +-
>> hw/misc/exynos4210_pmu.c | 4 +-
>> hw/misc/imx_ccm.c | 3 +-
>> hw/misc/ivshmem.c | 8 +-
>> hw/misc/lm32_sys.c | 3 +-
>> hw/misc/macio/cuda.c | 2 +-
>> hw/misc/macio/mac_dbdma.c | 2 +-
>> hw/misc/macio/macio.c | 8 +-
>> hw/misc/milkymist-hpdmc.c | 2 +-
>> hw/misc/milkymist-pfpu.c | 2 +-
>> hw/misc/mst_fpga.c | 2 +-
>> hw/misc/omap_gpmc.c | 8 +-
>> hw/misc/omap_l4.c | 2 +-
>> hw/misc/omap_sdrc.c | 2 +-
>> hw/misc/omap_tap.c | 2 +-
>> hw/misc/pc-testdev.c | 8 +-
>> hw/misc/pci-testdev.c | 4 +-
>> hw/misc/puv3_pm.c | 2 +-
>> hw/misc/pvpanic.c | 2 +-
>> hw/misc/pxa2xx_pcmcia.c | 6 +-
>> hw/misc/slavio_misc.c | 16 +-
>> hw/misc/vfio.c | 37 +--
>> hw/misc/vmport.c | 6 +-
>> hw/misc/zynq_slcr.c | 2 +-
>> hw/moxie/moxiesim.c | 4 +-
>> hw/net/cadence_gem.c | 3 +-
>> hw/net/dp8393x.c | 2 +-
>> hw/net/e1000.c | 6 +-
>> hw/net/eepro100.c | 12 +-
>> hw/net/etraxfs_eth.c | 3 +-
>> hw/net/lan9118.c | 3 +-
>> hw/net/lance.c | 3 +-
>> hw/net/mcf_fec.c | 2 +-
>> hw/net/milkymist-minimac2.c | 4 +-
>> hw/net/mipsnet.c | 3 +-
>> hw/net/ne2000-isa.c | 2 +-
>> hw/net/ne2000.c | 6 +-
>> hw/net/ne2000.h | 2 +-
>> hw/net/opencores_eth.c | 4 +-
>> hw/net/pcnet-pci.c | 6 +-
>> hw/net/rtl8139.c | 6 +-
>> hw/net/smc91c111.c | 2 +-
>> hw/net/stellaris_enet.c | 4 +-
>> hw/net/vmxnet3.c | 6 +-
>> hw/net/xgmac.c | 3 +-
>> hw/net/xilinx_axienet.c | 2 +-
>> hw/net/xilinx_ethlite.c | 4 +-
>> hw/nvram/ds1225y.c | 3 +-
>> hw/nvram/fw_cfg.c | 6 +-
>> hw/nvram/mac_nvram.c | 4 +-
>> hw/openrisc/openrisc_sim.c | 2 +-
>> hw/pci-bridge/dec.c | 4 +-
>> hw/pci-bridge/pci_bridge_dev.c | 2 +-
>> hw/pci-host/apb.c | 12 +-
>> hw/pci-host/bonito.c | 10 +-
>> hw/pci-host/grackle.c | 8 +-
>> hw/pci-host/pam.c | 16 +-
>> hw/pci-host/piix.c | 17 +-
>> hw/pci-host/ppce500.c | 12 +-
>> hw/pci-host/prep.c | 8 +-
>> hw/pci-host/q35.c | 14 +-
>> hw/pci-host/uninorth.c | 24 +-
>> hw/pci-host/versatile.c | 16 +-
>> hw/pci/msix.c | 6 +-
>> hw/pci/pci.c | 5 +-
>> hw/pci/pci_bridge.c | 12 +-
>> hw/pci/pcie_host.c | 3 +-
>> hw/pci/shpc.c | 4 +-
>> hw/ppc/e500.c | 4 +-
>> hw/ppc/mac_newworld.c | 10 +-
>> hw/ppc/mac_oldworld.c | 6 +-
>> hw/ppc/mpc8544_guts.c | 2 +-
>> hw/ppc/ppc405_boards.c | 18 +-
>> hw/ppc/ppc405_uc.c | 12 +-
>> hw/ppc/ppc4xx_devs.c | 4 +-
>> hw/ppc/ppc4xx_pci.c | 8 +-
>> hw/ppc/ppce500_spin.c | 4 +-
>> hw/ppc/prep.c | 31 ++-
>> hw/ppc/spapr.c | 2 +-
>> hw/ppc/spapr_iommu.c | 4 +-
>> hw/ppc/spapr_pci.c | 15 +-
>> hw/ppc/spapr_vio.c | 2 +-
>> hw/ppc/virtex_ml507.c | 2 +-
>> hw/s390x/s390-virtio-ccw.c | 2 +-
>> hw/s390x/s390-virtio.c | 2 +-
>> hw/scsi/esp-pci.c | 3 +-
>> hw/scsi/esp.c | 4 +-
>> hw/scsi/lsi53c895a.c | 9 +-
>> hw/scsi/megasas.c | 6 +-
>> hw/scsi/scsi-bus.c | 4 +
>> hw/scsi/virtio-scsi.c | 10 +-
>> hw/scsi/vmw_pvscsi.c | 2 +-
>> hw/sd/milkymist-memcard.c | 2 +-
>> hw/sd/omap_mmc.c | 4 +-
>> hw/sd/pl181.c | 2 +-
>> hw/sd/pxa2xx_mmci.c | 2 +-
>> hw/sd/sdhci.c | 2 +-
>> hw/sh4/r2d.c | 4 +-
>> hw/sh4/sh7750.c | 16 +-
>> hw/sh4/sh_pci.c | 6 +-
>> hw/sh4/shix.c | 6 +-
>> hw/sparc/leon3.c | 4 +-
>> hw/sparc/sun4m.c | 9 +-
>> hw/sparc64/sun4u.c | 4 +-
>> hw/ssi/omap_spi.c | 2 +-
>> hw/ssi/pl022.c | 2 +-
>> hw/ssi/xilinx_spi.c | 3 +-
>> hw/ssi/xilinx_spips.c | 5 +-
>> hw/timer/arm_mptimer.c | 4 +-
>> hw/timer/arm_timer.c | 6 +-
>> hw/timer/cadence_ttc.c | 3 +-
>> hw/timer/etraxfs_timer.c | 3 +-
>> hw/timer/exynos4210_mct.c | 4 +-
>> hw/timer/exynos4210_pwm.c | 4 +-
>> hw/timer/exynos4210_rtc.c | 4 +-
>> hw/timer/grlib_gptimer.c | 3 +-
>> hw/timer/hpet.c | 2 +-
>> hw/timer/i8254.c | 3 +-
>> hw/timer/imx_epit.c | 2 +-
>> hw/timer/imx_gpt.c | 2 +-
>> hw/timer/lm32_timer.c | 3 +-
>> hw/timer/m48t59.c | 8 +-
>> hw/timer/mc146818rtc.c | 2 +-
>> hw/timer/milkymist-sysctl.c | 2 +-
>> hw/timer/omap_gptimer.c | 2 +-
>> hw/timer/omap_synctimer.c | 2 +-
>> hw/timer/pl031.c | 2 +-
>> hw/timer/puv3_ost.c | 2 +-
>> hw/timer/pxa2xx_timer.c | 2 +-
>> hw/timer/sh_timer.c | 6 +-
>> hw/timer/slavio_timer.c | 2 +-
>> hw/timer/tusb6010.c | 4 +-
>> hw/timer/xilinx_timer.c | 2 +-
>> hw/tpm/tpm_tis.c | 3 +-
>> hw/unicore32/puv3.c | 2 +-
>> hw/usb/hcd-ehci-sysbus.c | 2 +-
>> hw/usb/hcd-ehci.c | 12 +-
>> hw/usb/hcd-ohci.c | 3 +-
>> hw/usb/hcd-uhci.c | 4 +-
>> hw/usb/hcd-xhci.c | 12 +-
>> hw/virtio/dataplane/hostmem.c | 7 +
>> hw/virtio/vhost.c | 11 +-
>> hw/virtio/virtio-balloon.c | 1 +
>> hw/virtio/virtio-pci.c | 4 +-
>> hw/watchdog/wdt_i6300esb.c | 3 +-
>> hw/watchdog/wdt_ib700.c | 12 +-
>> hw/xen/xen_apic.c | 4 +-
>> hw/xen/xen_platform.c | 11 +-
>> hw/xen/xen_pt.c | 8 +-
>> hw/xen/xen_pt_msi.c | 3 +-
>> hw/xtensa/xtensa_lx60.c | 12 +-
>> hw/xtensa/xtensa_sim.c | 4 +-
>> include/exec/cpu-common.h | 3 +-
>> include/exec/ioport.h | 30 +--
>> include/exec/iorange.h | 31 ---
>> include/exec/memory-internal.h | 2 -
>> include/exec/memory.h | 156 ++++++++----
>> include/hw/i386/pc.h | 6 +-
>> include/hw/pci-host/pam.h | 4 +-
>> include/hw/pci/pci.h | 2 +-
>> include/hw/ppc/spapr.h | 3 +-
>> include/hw/virtio/dataplane/hostmem.h | 1 +
>> include/qemu/atomic.h | 198 +++++++++++---
>> include/qemu/int128.h | 25 +-
>> include/sysemu/dma.h | 4 +-
>> ioport.c | 383 ++++++++--------------------
>> kvm-all.c | 2 +
>> memory.c | 290 ++++++++++++---------
>> migration.c | 3 +-
>> qom/object.c | 5 +-
>> target-arm/kvm.c | 2 +
>> target-i386/kvm.c | 4 +-
>> target-ppc/kvm.c | 2 +-
>> target-sparc/mmu_helper.c | 1 +
>> tests/Makefile | 6 +-
>> tests/test-int128.c | 212 +++++++++++++++
>> tests/test-thread-pool.c | 8 +-
>> xen-all.c | 10 +-
>> 359 files changed, 2551 insertions(+), 1711 deletions(-)
>> create mode 100644 docs/atomics.txt
>> delete mode 100644 include/exec/iorange.h
>> create mode 100644 tests/test-int128.c
>>
^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [Qemu-devel] [PATCH 54/66] add a header file for atomic operations
2013-07-04 15:13 ` [Qemu-devel] [PATCH 54/66] add a header file for atomic operations Paolo Bonzini
@ 2013-10-20 16:20 ` Peter Maydell
2013-10-21 6:06 ` Paolo Bonzini
0 siblings, 1 reply; 78+ messages in thread
From: Peter Maydell @ 2013-10-20 16:20 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: QEMU Developers
On 4 July 2013 16:13, Paolo Bonzini <pbonzini@redhat.com> wrote:
> +#ifndef atomic_xchg
> +#ifdef __ATOMIC_SEQ_CST
> +#define atomic_xchg(ptr, i) ({ \
> + typeof(*ptr) _new = (i), _old; \
> + __atomic_exchange(ptr, &_new, &_old, __ATOMIC_SEQ_CST); \
> + _old; \
> +})
> +#elif defined __clang__
> +#define atomic_xchg(ptr, i) __sync_exchange(ptr, i)
> +#else
> +/* __sync_lock_test_and_set() is documented to be an acquire barrier only. */
> +#define atomic_xchg(ptr, i) (smp_mb(), __sync_lock_test_and_set(ptr, i))
> +#endif
> +#endif
Hi. I'm afraid this doesn't compile on MacOSX/clang:
CC util/qemu-thread-posix.o
util/qemu-thread-posix.c:351:13: error: too many arguments to function
call, expected 3, have 4
if (atomic_xchg(&ev->value, EV_SET) == EV_BUSY) {
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/Users/pm215/src/qemu/include/qemu/atomic.h:174:42: note: expanded
from macro 'atomic_xchg'
__atomic_exchange(ptr, &_new, &_old, __ATOMIC_SEQ_CST); \
~~~~~~~~~~~~~~~~~ ^
<built-in>:16:26: note: expanded from macro '__ATOMIC_SEQ_CST'
#define __ATOMIC_SEQ_CST 5
^
1 error generated.
make: *** [util/qemu-thread-posix.o] Error 1
I tried the '#elif defined__clang__' block instead and
that doesn't work either:
CC util/qemu-thread-posix.o
util/qemu-thread-posix.c:351:13: warning: implicit declaration of
function '__sync_exchange' is invalid in
C99 [-Wimplicit-function-declaration]
if (atomic_xchg(&ev->value, EV_SET) == EV_BUSY) {
^
/Users/pm215/src/qemu/include/qemu/atomic.h:179:32: note: expanded
from macro 'atomic_xchg'
#define atomic_xchg(ptr, i) __sync_exchange(ptr, i)
^
1 warning generated.
LINK qemu-nbd
Undefined symbols for architecture x86_64:
"___sync_exchange", referenced from:
_qemu_event_set in libqemuutil.a(qemu-thread-posix.o)
ld: symbol(s) not found for architecture x86_64
clang: error: linker command failed with exit code 1 (use -v to see invocation)
make: *** [qemu-nbd] Error 1
It looks like we need to select the '#else' case for MacOSX...
any suggestions about how best to do that?
thanks
-- PMM
^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [Qemu-devel] [PATCH 54/66] add a header file for atomic operations
2013-10-20 16:20 ` Peter Maydell
@ 2013-10-21 6:06 ` Paolo Bonzini
2013-10-21 13:53 ` Peter Maydell
0 siblings, 1 reply; 78+ messages in thread
From: Paolo Bonzini @ 2013-10-21 6:06 UTC (permalink / raw)
To: Peter Maydell; +Cc: QEMU Developers
Il 20/10/2013 17:20, Peter Maydell ha scritto:
> CC util/qemu-thread-posix.o
> util/qemu-thread-posix.c:351:13: warning: implicit declaration of
> function '__sync_exchange' is invalid in
> C99 [-Wimplicit-function-declaration]
> if (atomic_xchg(&ev->value, EV_SET) == EV_BUSY) {
> ^
> /Users/pm215/src/qemu/include/qemu/atomic.h:179:32: note: expanded
> from macro 'atomic_xchg'
> #define atomic_xchg(ptr, i) __sync_exchange(ptr, i)
> ^
That's a typo/thinko, it should be __sync_swap according to the
documentation.
> 1 warning generated.
> LINK qemu-nbd
> Undefined symbols for architecture x86_64:
> "___sync_exchange", referenced from:
> _qemu_event_set in libqemuutil.a(qemu-thread-posix.o)
> ld: symbol(s) not found for architecture x86_64
> clang: error: linker command failed with exit code 1 (use -v to see invocation)
> make: *** [qemu-nbd] Error 1
>
> It looks like we need to select the '#else' case for MacOSX...
> any suggestions about how best to do that?
Or just the #elif if __sync_swap works.
Paolo
^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [Qemu-devel] [PATCH 54/66] add a header file for atomic operations
2013-10-21 6:06 ` Paolo Bonzini
@ 2013-10-21 13:53 ` Peter Maydell
2013-10-22 5:45 ` Paolo Bonzini
0 siblings, 1 reply; 78+ messages in thread
From: Peter Maydell @ 2013-10-21 13:53 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: QEMU Developers
On 21 October 2013 07:06, Paolo Bonzini <pbonzini@redhat.com> wrote:
> Il 20/10/2013 17:20, Peter Maydell ha scritto:
>> CC util/qemu-thread-posix.o
>> util/qemu-thread-posix.c:351:13: warning: implicit declaration of
>> function '__sync_exchange' is invalid in
>> C99 [-Wimplicit-function-declaration]
>> if (atomic_xchg(&ev->value, EV_SET) == EV_BUSY) {
>> ^
>> /Users/pm215/src/qemu/include/qemu/atomic.h:179:32: note: expanded
>> from macro 'atomic_xchg'
>> #define atomic_xchg(ptr, i) __sync_exchange(ptr, i)
>> ^
>
> That's a typo/thinko, it should be __sync_swap according to the
> documentation.
Yes, using __sync_swap seems to work OK. Does clang on linux
require the four-argument __atomic_exchange() or can we just
make the #ifdef __clang__ come first in the #if ladder?
http://libcxx.llvm.org/atomic_design_a.html suggests llvm/clang's
__atomic_exchange() is three argument on all platforms, ie this
isn't just a macos weirdness.
-- PMM
^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [Qemu-devel] [PATCH 54/66] add a header file for atomic operations
2013-10-21 13:53 ` Peter Maydell
@ 2013-10-22 5:45 ` Paolo Bonzini
0 siblings, 0 replies; 78+ messages in thread
From: Paolo Bonzini @ 2013-10-22 5:45 UTC (permalink / raw)
To: Peter Maydell; +Cc: QEMU Developers
Il 21/10/2013 14:53, Peter Maydell ha scritto:
> Yes, using __sync_swap seems to work OK. Does clang on linux
> require the four-argument __atomic_exchange() or can we just
> make the #ifdef __clang__ come first in the #if ladder?
Please do that (change the ladder), it's definitely a good idea.
> http://libcxx.llvm.org/atomic_design_a.html suggests llvm/clang's
> __atomic_exchange() is three argument on all platforms, ie this
> isn't just a macos weirdness.
It's not. It's definitely a pity that GCC and LLVM disagree. :( Mystery...
Paolo
^ permalink raw reply [flat|nested] 78+ messages in thread
end of thread, other threads:[~2013-10-22 5:46 UTC | newest]
Thread overview: 78+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-07-04 15:12 [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
2013-07-04 15:12 ` [Qemu-devel] [PATCH 01/66] int128: optimize and add test cases Paolo Bonzini
2013-07-04 15:12 ` [Qemu-devel] [PATCH 02/66] scsi: keep device alive while it has requests Paolo Bonzini
2013-07-04 15:12 ` [Qemu-devel] [PATCH 03/66] dma: keep a device alive while it has SGLists Paolo Bonzini
2013-07-04 15:51 ` Jan Kiszka
2013-07-04 15:59 ` Jan Kiszka
2013-07-04 16:00 ` Paolo Bonzini
2013-07-04 16:17 ` Jan Kiszka
2013-07-04 15:13 ` [Qemu-devel] [PATCH 04/66] adlib: replace register_ioport* Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 05/66] applesmc: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 06/66] wdt_ib700: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 07/66] i82374: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 08/66] prep: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 09/66] vt82c686: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 10/66] Privatize register_ioport_read/write Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 11/66] isa: implement isa_is_ioport_assigned via memory_region_find Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 12/66] vmware-vga: Accept unaligned I/O accesses Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 13/66] xen: Mark fixed platform I/O as unaligned Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 14/66] ioport: Switch dispatching to memory core layer Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 15/66] ioport: Remove unused old dispatching services Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 16/66] vmport: Disentangle read handler type from portio Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 17/66] ioport: Move portio types to ioport.h Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 19/66] memory: destroy phys_sections one by one Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 20/66] exec: simplify destruction of the phys map Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 21/66] memory: add getter for owner Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 22/66] memory: add ref/unref Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 23/66] memory: introduce memory_region_present Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 24/66] memory: add ref/unref calls Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 25/66] exec: check MRU in qemu_ram_addr_from_host Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 26/66] exec: move qemu_ram_addr_from_host_nofail to cputlb.c Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 27/66] memory: return MemoryRegion from qemu_ram_addr_from_host Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 28/66] exec: reorganize address_space_map Paolo Bonzini
2013-07-08 8:21 ` Peter Maydell
2013-07-04 15:13 ` [Qemu-devel] [PATCH 29/66] memory: ref/unref memory across address_space_map/unmap Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 30/66] escc: rename struct to ESCCState Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 31/66] vga: pass owner to vga_init Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 32/66] vga: pass owner to vga_common_init Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 33/66] vga: pass owner to cirrus_init_common Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 34/66] vga: pass owner to vga_init_vbe Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 35/66] vga: pass owner to vga_init_io Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 36/66] vga: set owner in vga_update_memory_access Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 37/66] ne2000: pass device to ne2000_setup_io, use it as owner Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 38/66] vfio: pass device to vfio_mmap_bar and use it to set owner Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 39/66] spapr_iommu: pass device to spapr_tce_new_table " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 40/66] pam: pass device to init_pam " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 41/66] piolist: add owner argument to initialization functions and pass devices Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 42/66] hw/a*: pass owner to memory_region_init* functions Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 43/66] hw/block: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 44/66] hw/c*: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 45/66] hw/d*: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 46/66] hw/gpio: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 47/66] hw/i*: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 48/66] hw/m*: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 49/66] hw/n*: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 50/66] hw/p*: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 51/66] hw/s*: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 52/66] hw/t*: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 53/66] hw/[u-x]*: " Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 54/66] add a header file for atomic operations Paolo Bonzini
2013-10-20 16:20 ` Peter Maydell
2013-10-21 6:06 ` Paolo Bonzini
2013-10-21 13:53 ` Peter Maydell
2013-10-22 5:45 ` Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 55/66] memory: access FlatView from a local variable Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 56/66] memory: use a new FlatView pointer on every topology update Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 57/66] memory: add reference counting to FlatView Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 58/66] qom: Use atomics for object refcounting Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 59/66] exec: change well-known physical sections to macros Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 60/66] exec: separate current memory map from the one being built Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 61/66] memory: move MemoryListener declaration earlier Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 62/66] exec: move listener from AddressSpaceDispatch to AddressSpace Paolo Bonzini
2013-07-04 15:13 ` [Qemu-devel] [PATCH 63/66] exec: separate current radix tree from the one being built Paolo Bonzini
2013-07-04 15:14 ` [Qemu-devel] [PATCH 64/66] exec: put memory map in AddressSpaceDispatch Paolo Bonzini
2013-07-04 15:14 ` [Qemu-devel] [PATCH 65/66] exec: remove cur_map Paolo Bonzini
2013-07-04 15:14 ` [Qemu-devel] [PATCH 66/66] exec: change some APIs to take AddressSpaceDispatch Paolo Bonzini
2013-07-04 15:52 ` [Qemu-devel] [PULL 00/66] Memory API changes for 1.6: ownership, I/O ports, RCU preparation Paolo Bonzini
2013-07-04 16:08 ` Paolo Bonzini
2013-07-08 13:20 ` Anthony Liguori
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.