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From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Mark Zhang <markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	achew-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 2/5] clk: tegra: Add reset only clock node flag and COP
Date: Wed, 07 Aug 2013 10:58:03 -0600	[thread overview]
Message-ID: <52027C9B.2030009@wwwdotorg.org> (raw)
In-Reply-To: <1375874709-10438-2-git-send-email-markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

On 08/07/2013 05:25 AM, Mark Zhang wrote:
> From: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> 
> COP is a reset only clock. So this patch adds NO_CLK support
> then adds the COP clock.

Do we actually need this clock upstream yet?

IIRC, Prashant was working on implementing the common reset API, so I'd
prefer not to add any reset-only "clocks" to the clock driver, but
rather to simply make sure that the new reset driver exposes them.

> diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c

>  enum tegra114_clk {
> -	rtc = 4, timer = 5, uarta = 6, sdmmc2 = 9, i2s1 = 11, i2c1 = 12,
> +	cop = 1, rtc = 4, timer = 5, uarta = 6, sdmmc2 = 9, i2s1 = 11, i2c1 = 12,

To make this change, you would also need to edit
include/dt-bindings/clock/tegra114-car.h. BTW, why doesn't the Tegra
clock driver include that file rather than defining its own enum?

WARNING: multiple messages have this Message-ID (diff)
From: swarren@wwwdotorg.org (Stephen Warren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/5] clk: tegra: Add reset only clock node flag and COP
Date: Wed, 07 Aug 2013 10:58:03 -0600	[thread overview]
Message-ID: <52027C9B.2030009@wwwdotorg.org> (raw)
In-Reply-To: <1375874709-10438-2-git-send-email-markz@nvidia.com>

On 08/07/2013 05:25 AM, Mark Zhang wrote:
> From: Peter De Schrijver <pdeschrijver@nvidia.com>
> 
> COP is a reset only clock. So this patch adds NO_CLK support
> then adds the COP clock.

Do we actually need this clock upstream yet?

IIRC, Prashant was working on implementing the common reset API, so I'd
prefer not to add any reset-only "clocks" to the clock driver, but
rather to simply make sure that the new reset driver exposes them.

> diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c

>  enum tegra114_clk {
> -	rtc = 4, timer = 5, uarta = 6, sdmmc2 = 9, i2s1 = 11, i2c1 = 12,
> +	cop = 1, rtc = 4, timer = 5, uarta = 6, sdmmc2 = 9, i2s1 = 11, i2c1 = 12,

To make this change, you would also need to edit
include/dt-bindings/clock/tegra114-car.h. BTW, why doesn't the Tegra
clock driver include that file rather than defining its own enum?

  parent reply	other threads:[~2013-08-07 16:58 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-07 11:25 [PATCH 1/5] clk: tegra: Correct sbc mux width & parent Mark Zhang
2013-08-07 11:25 ` Mark Zhang
     [not found] ` <1375874709-10438-1-git-send-email-markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-08-07 11:25   ` [PATCH 2/5] clk: tegra: Add reset only clock node flag and COP Mark Zhang
2013-08-07 11:25     ` Mark Zhang
     [not found]     ` <1375874709-10438-2-git-send-email-markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-08-07 16:58       ` Stephen Warren [this message]
2013-08-07 16:58         ` Stephen Warren
     [not found]         ` <52027C9B.2030009-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-08-08  5:50           ` Mark Zhang
2013-08-08  5:50             ` Mark Zhang
2013-08-19 14:53           ` Peter De Schrijver
2013-08-19 14:53             ` Peter De Schrijver
     [not found]             ` <20130819145353.GP18810-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-08-19 16:25               ` Stephen Warren
2013-08-19 16:25                 ` Stephen Warren
2013-08-07 11:25   ` [PATCH 3/5] clk: tegra: Fix vde/2d/3d clock src offset Mark Zhang
2013-08-07 11:25     ` Mark Zhang
     [not found]     ` <1375874709-10438-3-git-send-email-markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-08-07 17:00       ` Stephen Warren
2013-08-07 17:00         ` Stephen Warren
2013-08-20  8:47       ` Peter De Schrijver
2013-08-20  8:47         ` Peter De Schrijver
2013-08-07 11:25   ` [PATCH 4/5] clk: tegra: Set the clock parent of gr2d/gr3d to pll_c2 Mark Zhang
2013-08-07 11:25     ` Mark Zhang
2013-08-20  8:47     ` Peter De Schrijver
2013-08-20  8:47       ` Peter De Schrijver
2013-08-07 11:25   ` [PATCH 5/5] clk: tegra: Set the clk parent of host1x to pll_p Mark Zhang
2013-08-07 11:25     ` Mark Zhang
2013-08-07 16:56   ` [PATCH 1/5] clk: tegra: Correct sbc mux width & parent Stephen Warren
2013-08-07 16:56     ` Stephen Warren
     [not found]     ` <52027C22.9080707-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-08-08  1:26       ` Mark Zhang
2013-08-08  1:26         ` Mark Zhang

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