[PATCHv4 1/4] arm: dts: Add clock entries for timers in SOCFPGA

[PATCHv4 1/4] arm: dts: Add clock entries for timers in SOCFPGA

[dinguyen at altera.com]

From: Dinh Nguyen <dinguyen@altera.com>

Set the correct clock entries for the the timers, and also clean up
the timer entries for SOCFPGA by removing timer<n> in the timer entry.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
CC: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Ian Campbell <ian.campbell@citrix.com>
CC: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
CC: Jamie Iles <jamie@jamieiles.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: devicetree at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
---
 arch/arm/boot/dts/socfpga.dtsi         |   16 ++++++++--------
 arch/arm/boot/dts/socfpga_cyclone5.dts |    8 ++++----
 arch/arm/boot/dts/socfpga_vt.dts       |    8 ++++----
 3 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index bee62a2..2cb5cb7 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -26,10 +26,6 @@
 		ethernet1 = &gmac1;
 		serial0 = &uart0;
 		serial1 = &uart1;
-		timer0 = &timer0;
-		timer1 = &timer1;
-		timer2 = &timer2;
-		timer3 = &timer3;
 	};
 
 	cpus {
@@ -475,28 +471,32 @@
 			interrupts = <1 13 0xf04>;
 		};
 
-		timer0: timer0 at ffc08000 {
+		timer at ffc08000 {
 			compatible = "snps,dw-apb-timer-sp";
 			interrupts = <0 167 4>;
 			reg = <0xffc08000 0x1000>;
+			clocks = <&osc>;
 		};
 
-		timer1: timer1 at ffc09000 {
+		timer at ffc09000 {
 			compatible = "snps,dw-apb-timer-sp";
 			interrupts = <0 168 4>;
 			reg = <0xffc09000 0x1000>;
+			clocks = <&osc>;
 		};
 
-		timer2: timer2 at ffd00000 {
+		timer at ffd00000 {
 			compatible = "snps,dw-apb-timer-osc";
 			interrupts = <0 169 4>;
 			reg = <0xffd00000 0x1000>;
+			clocks = <&l4_sp_clk>;
 		};
 
-		timer3: timer3 at ffd01000 {
+		timer at ffd01000 {
 			compatible = "snps,dw-apb-timer-osc";
 			interrupts = <0 170 4>;
 			reg = <0xffd01000 0x1000>;
+			clocks = <&l4_sp_clk>;
 		};
 
 		uart0: serial0 at ffc02000 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts
index 973999d..8978790 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dts
@@ -54,19 +54,19 @@
 			status = "okay";
 		};
 
-		timer0 at ffc08000 {
+		timer at ffc08000 {
 			clock-frequency = <100000000>;
 		};
 
-		timer1 at ffc09000 {
+		timer at ffc09000 {
 			clock-frequency = <100000000>;
 		};
 
-		timer2 at ffd00000 {
+		timer at ffd00000 {
 			clock-frequency = <25000000>;
 		};
 
-		timer3 at ffd01000 {
+		timer at ffd01000 {
 			clock-frequency = <25000000>;
 		};
 
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index d1ec0ca..679320f 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -46,19 +46,19 @@
 			status = "okay";
 		};
 
-		timer0 at ffc08000 {
+		timer at ffc08000 {
 			clock-frequency = <7000000>;
 		};
 
-		timer1 at ffc09000 {
+		timer at ffc09000 {
 			clock-frequency = <7000000>;
 		};
 
-		timer2 at ffd00000 {
+		timer at ffd00000 {
 			clock-frequency = <7000000>;
 		};
 
-		timer3 at ffd01000 {
+		timer at ffd01000 {
 			clock-frequency = <7000000>;
 		};
 
-- 
1.7.9.5

[PATCHv4 2/4] arm: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer

[dinguyen at altera.com]

From: Dinh Nguyen <dinguyen@altera.com>

"dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the
DW APB timer, just fed by different clocks. Thus, deprecate both
"dw-apb-timer-osc" and "dw-apb-timer-sp" in lieu of "dw-apb-timer".

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
CC: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Ian Campbell <ian.campbell@citrix.com>
CC: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
CC: Jamie Iles <jamie@jamieiles.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: devicetree at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org

v3:
- Split out a separate that cleans up the timer entries and clock information.
- Clearly states which binding is deprecated in the bindingd doc.

v2:
- Deprecate the "dw-apb-timer-osc" and "dw-apb-timer-sp" but maintain
  backwards compatibility in the driver.
---
 Documentation/devicetree/bindings/rtc/dw-apb.txt |   34 +++++++---------------
 arch/arm/boot/dts/socfpga.dtsi                   |    8 ++---
 2 files changed, 15 insertions(+), 27 deletions(-)

diff --git a/Documentation/devicetree/bindings/rtc/dw-apb.txt b/Documentation/devicetree/bindings/rtc/dw-apb.txt
index eb2327b..c703d51 100644
--- a/Documentation/devicetree/bindings/rtc/dw-apb.txt
+++ b/Documentation/devicetree/bindings/rtc/dw-apb.txt
@@ -1,7 +1,10 @@
 * Designware APB timer
 
 Required properties:
-- compatible: "snps,dw-apb-timer-sp" or "snps,dw-apb-timer-osc"
+- compatible: One of:
+ 	"snps,dw-apb-timer"
+	"snps,dw-apb-timer-sp" <DEPRECATED>
+	"snps,dw-apb-timer-osc" <DEPRECATED>
 - reg: physical base address of the controller and length of memory mapped
   region.
 - interrupts: IRQ line for the timer.
@@ -20,25 +23,10 @@ systems may use one.
 
 
 Example:
-
-		timer1: timer at ffc09000 {
-				compatible = "snps,dw-apb-timer-sp";
-				interrupts = <0 168 4>;
-				clock-frequency = <200000000>;
-				reg = <0xffc09000 0x1000>;
-			};
-
-		timer2: timer at ffd00000 {
-				compatible = "snps,dw-apb-timer-osc";
-				interrupts = <0 169 4>;
-				clock-frequency = <200000000>;
-				reg = <0xffd00000 0x1000>;
-			};
-
-		timer3: timer at ffe00000 {
-				compatible = "snps,dw-apb-timer-osc";
-				interrupts = <0 170 4>;
-				reg = <0xffe00000 0x1000>;
-				clocks = <&timer_clk>, <&timer_pclk>;
-				clock-names = "timer", "pclk";
-			};
+	timer at ffe00000 {
+		compatible = "snps,dw-apb-timer";
+		interrupts = <0 170 4>;
+		reg = <0xffe00000 0x1000>;
+		clocks = <&timer_clk>, <&timer_pclk>;
+		clock-names = "timer", "pclk";
+	};
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 2cb5cb7..d9fda91 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -472,28 +472,28 @@
 		};
 
 		timer at ffc08000 {
-			compatible = "snps,dw-apb-timer-sp";
+			compatible = "snps,dw-apb-timer";
 			interrupts = <0 167 4>;
 			reg = <0xffc08000 0x1000>;
 			clocks = <&osc>;
 		};
 
 		timer at ffc09000 {
-			compatible = "snps,dw-apb-timer-sp";
+			compatible = "snps,dw-apb-timer";
 			interrupts = <0 168 4>;
 			reg = <0xffc09000 0x1000>;
 			clocks = <&osc>;
 		};
 
 		timer at ffd00000 {
-			compatible = "snps,dw-apb-timer-osc";
+			compatible = "snps,dw-apb-timer";
 			interrupts = <0 169 4>;
 			reg = <0xffd00000 0x1000>;
 			clocks = <&l4_sp_clk>;
 		};
 
 		timer at ffd01000 {
-			compatible = "snps,dw-apb-timer-osc";
+			compatible = "snps,dw-apb-timer";
 			interrupts = <0 170 4>;
 			reg = <0xffd01000 0x1000>;
 			clocks = <&l4_sp_clk>;
-- 
1.7.9.5

[PATCHv4 3/4] clocksource: dw_apb_timer: Move timer defines to header file.

[dinguyen at altera.com]

From: Dinh Nguyen <dinguyen@altera.com>

Move all dw_apb_timer defines to include/linux/dw_apb_timer.h.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
CC: Rob Herring <rob.herring@calxeda.com>
CC: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
CC: Jamie Iles <jamie@jamieiles.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Pavel Machek <pavel@denx.de>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-arm-kernel at lists.infradead.org

v2:
- Remove the defines in dw_apb_timer.c
---
 drivers/clocksource/dw_apb_timer.c |   19 -------------------
 include/linux/dw_apb_timer.h       |   19 +++++++++++++++++++
 2 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/clocksource/dw_apb_timer.c b/drivers/clocksource/dw_apb_timer.c
index e54ca10..c3a8f52 100644
--- a/drivers/clocksource/dw_apb_timer.c
+++ b/drivers/clocksource/dw_apb_timer.c
@@ -18,25 +18,6 @@
 #include <linux/io.h>
 #include <linux/slab.h>
 
-#define APBT_MIN_PERIOD			4
-#define APBT_MIN_DELTA_USEC		200
-
-#define APBTMR_N_LOAD_COUNT		0x00
-#define APBTMR_N_CURRENT_VALUE		0x04
-#define APBTMR_N_CONTROL		0x08
-#define APBTMR_N_EOI			0x0c
-#define APBTMR_N_INT_STATUS		0x10
-
-#define APBTMRS_INT_STATUS		0xa0
-#define APBTMRS_EOI			0xa4
-#define APBTMRS_RAW_INT_STATUS		0xa8
-#define APBTMRS_COMP_VERSION		0xac
-
-#define APBTMR_CONTROL_ENABLE		(1 << 0)
-/* 1: periodic, 0:free running. */
-#define APBTMR_CONTROL_MODE_PERIODIC	(1 << 1)
-#define APBTMR_CONTROL_INT		(1 << 2)
-
 static inline struct dw_apb_clock_event_device *
 ced_to_dw_apb_ced(struct clock_event_device *evt)
 {
diff --git a/include/linux/dw_apb_timer.h b/include/linux/dw_apb_timer.h
index 1f79b20..1d2b949 100644
--- a/include/linux/dw_apb_timer.h
+++ b/include/linux/dw_apb_timer.h
@@ -19,6 +19,25 @@
 
 #define APBTMRS_REG_SIZE       0x14
 
+#define APBT_MIN_PERIOD                 4
+#define APBT_MIN_DELTA_USEC             200
+
+#define APBTMR_N_LOAD_COUNT             0x00
+#define APBTMR_N_CURRENT_VALUE          0x04
+#define APBTMR_N_CONTROL                0x08
+#define APBTMR_N_EOI                    0x0c
+#define APBTMR_N_INT_STATUS             0x10
+
+#define APBTMRS_INT_STATUS              0xa0
+#define APBTMRS_EOI                     0xa4
+#define APBTMRS_RAW_INT_STATUS          0xa8
+#define APBTMRS_COMP_VERSION            0xac
+
+#define APBTMR_CONTROL_ENABLE           (1 << 0)
+/* 1: periodic, 0:free running. */
+#define APBTMR_CONTROL_MODE_PERIODIC    (1 << 1)
+#define APBTMR_CONTROL_INT              (1 << 2)
+
 struct dw_apb_timer {
 	void __iomem				*base;
 	unsigned long				freq;
-- 
1.7.9.5

[PATCHv4 4/4] clocksource: dw_apb_timer_of: Fix read_sched_clock

[dinguyen at altera.com]

From: Dinh Nguyen <dinguyen@altera.com>

The read_sched_clock should return the ~value because the clock is a
countdown implementation. read_sched_clock() should be the same as
__apbt_read_clocksource().

If a separate timer for the sched_clock exist, then read_sched_clock()
will return an incorrect value. The (sched_io_base + 0x4) needs to be in
the function for both cases.

Maintain backwards compatibility for "dw-apb-timer-sp" and
"dw-apb-timer-osc".

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Jamie Iles <jamie@jamieiles.com>
CC: Rob Herring <rob.herring@calxeda.com>
CC: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
CC: Jamie Iles <jamie@jamieiles.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Pavel Machek <pavel@denx.de>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-arm-kernel at lists.infradead.org

v3:
- Use APBTMR_N_CURRENT_VALUE define in read_sched_clock()

v2:
- Maintain backwards compatibility for "dw-apb-timer-sp" and
  "dw-apb-timer-osc".
---
 drivers/clocksource/dw_apb_timer_of.c |    9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/clocksource/dw_apb_timer_of.c b/drivers/clocksource/dw_apb_timer_of.c
index 4cbae4f..01c1238 100644
--- a/drivers/clocksource/dw_apb_timer_of.c
+++ b/drivers/clocksource/dw_apb_timer_of.c
@@ -102,18 +102,17 @@ static void add_clocksource(struct device_node *source_timer)
 	 * timer is found. sched_io_base then points to the current_value
 	 * register of the clocksource timer.
 	 */
-	sched_io_base = iobase + 0x04;
+	sched_io_base = iobase;
 	sched_rate = rate;
 }
 
 static u32 read_sched_clock(void)
 {
-	return __raw_readl(sched_io_base);
+	return ~__raw_readl(sched_io_base + APBTMR_N_CURRENT_VALUE);
 }
 
 static const struct of_device_id sptimer_ids[] __initconst = {
 	{ .compatible = "picochip,pc3x2-rtc" },
-	{ .compatible = "snps,dw-apb-timer-sp" },
 	{ /* Sentinel */ },
 };
 
@@ -153,4 +152,6 @@ static void __init dw_apb_timer_init(struct device_node *timer)
 	num_called++;
 }
 CLOCKSOURCE_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init);
-CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer-osc", dw_apb_timer_init);
+CLOCKSOURCE_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init);
+CLOCKSOURCE_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init);
+CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init);
-- 
1.7.9.5

[PATCHv4 2/4] arm: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer

[Stephen Warren]

On 08/22/2013 10:30 AM, dinguyen at altera.com wrote:
> From: Dinh Nguyen <dinguyen@altera.com>
> 
> "dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the
> DW APB timer, just fed by different clocks. Thus, deprecate both
> "dw-apb-timer-osc" and "dw-apb-timer-sp" in lieu of "dw-apb-timer".

The binding change looks reasonable to me.

The *.dtsi change will cause the new DT not to work with older kernels
that don't support the new compatible values. Perhaps you're fine with that?

I assume that the driver has already been updated to support the new
values, and that the driver change is guaranteed to be merged before
this change? Otherwise, git bisect will be broken for a while.

[PATCHv4 2/4] arm: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer

[Dinh Nguyen]

On Thu, 2013-08-22 at 16:20 -0600, Stephen Warren wrote:
> On 08/22/2013 10:30 AM, dinguyen at altera.com wrote:
> > From: Dinh Nguyen <dinguyen@altera.com>
> > 
> > "dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the
> > DW APB timer, just fed by different clocks. Thus, deprecate both
> > "dw-apb-timer-osc" and "dw-apb-timer-sp" in lieu of "dw-apb-timer".
> 
> The binding change looks reasonable to me.
> 
> The *.dtsi change will cause the new DT not to work with older kernels
> that don't support the new compatible values. Perhaps you're fine with that?

I am okay with the older kernels not working as SOCFPGA is pretty new
and older kernel don't really have too much support for it.

> 
> I assume that the driver has already been updated to support the new
> values, and that the driver change is guaranteed to be merged before
> this change? Otherwise, git bisect will be broken for a while.

Yes, the patch to update the driver was part of this series, but not
merged yet. The driver's V1 patch was Acked-By: Jamie Iles who is the
maintainer for Picoxcell and is the only other platform using this timer
driver at the moment. The only changes since V1 is to maintain
compatibility for the new binding values.

Thanks,
Dinh
> 

[PATCHv4 4/4] clocksource: dw_apb_timer_of: Fix read_sched_clock

[Linus Walleij]

On Thu, Aug 22, 2013 at 6:30 PM,  <dinguyen@altera.com> wrote:

> From: Dinh Nguyen <dinguyen@altera.com>
>
> The read_sched_clock should return the ~value because the clock is a
> countdown implementation. read_sched_clock() should be the same as
> __apbt_read_clocksource().
>
> If a separate timer for the sched_clock exist, then read_sched_clock()
> will return an incorrect value. The (sched_io_base + 0x4) needs to be in
> the function for both cases.
>
> Maintain backwards compatibility for "dw-apb-timer-sp" and
> "dw-apb-timer-osc".
>
> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
> Acked-by: Jamie Iles <jamie@jamieiles.com>
> CC: Rob Herring <rob.herring@calxeda.com>
> CC: Arnd Bergmann <arnd@arndb.de>
> Cc: Olof Johansson <olof@lixom.net>
> CC: Jamie Iles <jamie@jamieiles.com>
> Cc: John Stultz <john.stultz@linaro.org>
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Heiko Stuebner <heiko@sntech.de>
> Cc: linux-arm-kernel at lists.infradead.org
>
> v3:
> - Use APBTMR_N_CURRENT_VALUE define in read_sched_clock()

Acked-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

[PATCHv4 2/4] arm: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer

[Dinh Nguyen]

On Thu, 2013-08-22 at 16:20 -0600, Stephen Warren wrote:
> On 08/22/2013 10:30 AM, dinguyen at altera.com wrote:
> > From: Dinh Nguyen <dinguyen@altera.com>
> > 
> > "dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the
> > DW APB timer, just fed by different clocks. Thus, deprecate both
> > "dw-apb-timer-osc" and "dw-apb-timer-sp" in lieu of "dw-apb-timer".
> 
> The binding change looks reasonable to me.
> 
> The *.dtsi change will cause the new DT not to work with older kernels
> that don't support the new compatible values. Perhaps you're fine with that?
> 
> I assume that the driver has already been updated to support the new
> values, and that the driver change is guaranteed to be merged before
> this change? Otherwise, git bisect will be broken for a while.
> 

Can I have your Acked-by: for these bindings? I just received an Ack
from Linus Walleij for the driver portion.

Thanks,
Dinh

[PATCHv4 2/4] arm: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer

[Stephen Warren]

On 08/23/2013 04:44 PM, Dinh Nguyen wrote:
> On Thu, 2013-08-22 at 16:20 -0600, Stephen Warren wrote:
>> On 08/22/2013 10:30 AM, dinguyen at altera.com wrote:
>>> From: Dinh Nguyen <dinguyen@altera.com>
>>>
>>> "dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the
>>> DW APB timer, just fed by different clocks. Thus, deprecate both
>>> "dw-apb-timer-osc" and "dw-apb-timer-sp" in lieu of "dw-apb-timer".
>>
>> The binding change looks reasonable to me.
>>
>> The *.dtsi change will cause the new DT not to work with older kernels
>> that don't support the new compatible values. Perhaps you're fine with that?
>>
>> I assume that the driver has already been updated to support the new
>> values, and that the driver change is guaranteed to be merged before
>> this change? Otherwise, git bisect will be broken for a while.
>>
> 
> Can I have your Acked-by: for these bindings? I just received an Ack
> from Linus Walleij for the driver portion.

Yes, the binding change,
Acked-by: Stephen Warren <swarren@nvidia.com>

[PATCHv4 1/4] arm: dts: Add clock entries for timers in SOCFPGA

[Dinh Nguyen]

Hi Stephen,

On Thu, 2013-08-22 at 11:30 -0500, Dinh Nguyen wrote:
> From: Dinh Nguyen <dinguyen@altera.com>
> 
> Set the correct clock entries for the the timers, and also clean up
> the timer entries for SOCFPGA by removing timer<n> in the timer entry.
> 
> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
> Reviewed-by: Pavel Machek <pavel@denx.de>
> CC: Rob Herring <rob.herring@calxeda.com>
> Cc: Pawel Moll <pawel.moll@arm.com>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Stephen Warren <swarren@wwwdotorg.org>
> Cc: Ian Campbell <ian.campbell@citrix.com>
> CC: Arnd Bergmann <arnd@arndb.de>
> Cc: Olof Johansson <olof@lixom.net>
> CC: Jamie Iles <jamie@jamieiles.com>
> Cc: John Stultz <john.stultz@linaro.org>
> Cc: Heiko Stuebner <heiko@sntech.de>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: devicetree at vger.kernel.org
> Cc: linux-arm-kernel at lists.infradead.org
> ---
>  arch/arm/boot/dts/socfpga.dtsi         |   16 ++++++++--------
>  arch/arm/boot/dts/socfpga_cyclone5.dts |    8 ++++----
>  arch/arm/boot/dts/socfpga_vt.dts       |    8 ++++----
>  3 files changed, 16 insertions(+), 16 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
> index bee62a2..2cb5cb7 100644
> --- a/arch/arm/boot/dts/socfpga.dtsi
> +++ b/arch/arm/boot/dts/socfpga.dtsi
> @@ -26,10 +26,6 @@
>  		ethernet1 = &gmac1;
>  		serial0 = &uart0;
>  		serial1 = &uart1;
> -		timer0 = &timer0;
> -		timer1 = &timer1;
> -		timer2 = &timer2;
> -		timer3 = &timer3;
>  	};
>  
>  	cpus {
> @@ -475,28 +471,32 @@
>  			interrupts = <1 13 0xf04>;
>  		};
>  
> -		timer0: timer0 at ffc08000 {
> +		timer at ffc08000 {
>  			compatible = "snps,dw-apb-timer-sp";
>  			interrupts = <0 167 4>;
>  			reg = <0xffc08000 0x1000>;
> +			clocks = <&osc>;
>  		};
>  
> -		timer1: timer1 at ffc09000 {
> +		timer at ffc09000 {
>  			compatible = "snps,dw-apb-timer-sp";
>  			interrupts = <0 168 4>;
>  			reg = <0xffc09000 0x1000>;
> +			clocks = <&osc>;
>  		};
>  
> -		timer2: timer2 at ffd00000 {
> +		timer at ffd00000 {
>  			compatible = "snps,dw-apb-timer-osc";
>  			interrupts = <0 169 4>;
>  			reg = <0xffd00000 0x1000>;
> +			clocks = <&l4_sp_clk>;
>  		};
>  
> -		timer3: timer3 at ffd01000 {
> +		timer at ffd01000 {
>  			compatible = "snps,dw-apb-timer-osc";
>  			interrupts = <0 170 4>;
>  			reg = <0xffd01000 0x1000>;
> +			clocks = <&l4_sp_clk>;
>  		};
>  
>  		uart0: serial0 at ffc02000 {
> diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts
> index 973999d..8978790 100644
> --- a/arch/arm/boot/dts/socfpga_cyclone5.dts
> +++ b/arch/arm/boot/dts/socfpga_cyclone5.dts
> @@ -54,19 +54,19 @@
>  			status = "okay";
>  		};
>  
> -		timer0 at ffc08000 {
> +		timer at ffc08000 {
>  			clock-frequency = <100000000>;
>  		};
>  
> -		timer1 at ffc09000 {
> +		timer at ffc09000 {
>  			clock-frequency = <100000000>;
>  		};
>  
> -		timer2 at ffd00000 {
> +		timer at ffd00000 {
>  			clock-frequency = <25000000>;
>  		};
>  
> -		timer3 at ffd01000 {
> +		timer at ffd01000 {
>  			clock-frequency = <25000000>;
>  		};
>  
> diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
> index d1ec0ca..679320f 100644
> --- a/arch/arm/boot/dts/socfpga_vt.dts
> +++ b/arch/arm/boot/dts/socfpga_vt.dts
> @@ -46,19 +46,19 @@
>  			status = "okay";
>  		};
>  
> -		timer0 at ffc08000 {
> +		timer at ffc08000 {
>  			clock-frequency = <7000000>;
>  		};
>  
> -		timer1 at ffc09000 {
> +		timer at ffc09000 {
>  			clock-frequency = <7000000>;
>  		};
>  
> -		timer2 at ffd00000 {
> +		timer at ffd00000 {
>  			clock-frequency = <7000000>;
>  		};
>  
> -		timer3 at ffd01000 {
> +		timer at ffd01000 {
>  			clock-frequency = <7000000>;
>  		};
>  

Not sure if you our Ack for:
[
PATCHv4 2/4] arm: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to
just dw-apb-timer

applies to this one too. But just in case, can I get your Ack for this
one too?

Thanks,
Dinh

[PATCHv4 3/4] clocksource: dw_apb_timer: Move timer defines to header file.

[Pavel Machek]

On Thu 2013-08-22 11:30:25, dinguyen at altera.com wrote:
> From: Dinh Nguyen <dinguyen@altera.com>
> 
> Move all dw_apb_timer defines to include/linux/dw_apb_timer.h.
> 
> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
> CC: Rob Herring <rob.herring@calxeda.com>
> CC: Arnd Bergmann <arnd@arndb.de>
> Cc: Olof Johansson <olof@lixom.net>
> CC: Jamie Iles <jamie@jamieiles.com>
> Cc: John Stultz <john.stultz@linaro.org>
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Pavel Machek <pavel@denx.de>

Reviewed-by: Pavel Machek <pavel@denx.de>

Thanks!
									Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

Re: [PATCHv4 1/4] arm: dts: Add clock entries for timers in SOCFPGA

[Stephen Warren]

On 08/23/2013 05:39 PM, Dinh Nguyen wrote:
> Hi Stephen,
> 
> On Thu, 2013-08-22 at 11:30 -0500, Dinh Nguyen wrote:
>> From: Dinh Nguyen <dinguyen@altera.com>
>>
>> Set the correct clock entries for the the timers, and also clean up
>> the timer entries for SOCFPGA by removing timer<n> in the timer entry.
...
> Not sure if you our Ack for:
> [
> PATCHv4 2/4] arm: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to
> just dw-apb-timer
> 
> applies to this one too. But just in case, can I get your Ack for this
> one too?

I only reviewed the binding changes, not the DT file changes themselves;
I don't really want to set a precedent for that, or it'll increase the
review volume too much.

[PATCHv4 1/4] arm: dts: Add clock entries for timers in SOCFPGA

[Stephen Warren]

On 08/23/2013 05:39 PM, Dinh Nguyen wrote:
> Hi Stephen,
> 
> On Thu, 2013-08-22 at 11:30 -0500, Dinh Nguyen wrote:
>> From: Dinh Nguyen <dinguyen@altera.com>
>>
>> Set the correct clock entries for the the timers, and also clean up
>> the timer entries for SOCFPGA by removing timer<n> in the timer entry.
...
> Not sure if you our Ack for:
> [
> PATCHv4 2/4] arm: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to
> just dw-apb-timer
> 
> applies to this one too. But just in case, can I get your Ack for this
> one too?

I only reviewed the binding changes, not the DT file changes themselves;
I don't really want to set a precedent for that, or it'll increase the
review volume too much.