[PATCH 1/5] usb: ohci-generic: ignore ENOSYS and ENOTSUPP errors from clk and reset

[PATCH 1/5] usb: ohci-generic: ignore ENOSYS and ENOTSUPP errors from clk and reset

[Piotr Wojtaszczyk]

If a machine doesn't have CONFIG_CLK set the call to clk_get_bulk()
returns '-ENOSYS' error which should be handled the same way as
'-ENOENT' error. The same applies to reset_get_bulk() and 'ENOTSUPP'.

Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
---

 drivers/usb/host/ohci-generic.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index ceed1911a9..28512c081f 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -28,7 +28,7 @@ static int ohci_usb_probe(struct udevice *dev)
 	int err, ret;
 
 	ret = clk_get_bulk(dev, &priv->clocks);
-	if (ret && ret != -ENOENT) {
+	if (ret && !((ret == -ENOENT) || (ret == -ENOSYS))) {
 		dev_err(dev, "Failed to get clocks (ret=%d)\n", ret);
 		return ret;
 	}
@@ -40,7 +40,7 @@ static int ohci_usb_probe(struct udevice *dev)
 	}
 
 	err = reset_get_bulk(dev, &priv->resets);
-	if (err && err != -ENOENT) {
+	if (err && !((err == -ENOENT) || (err == -ENOTSUPP))) {
 		dev_err(dev, "failed to get resets (err=%d)\n", err);
 		goto clk_err;
 	}
@@ -72,7 +72,7 @@ reset_err:
 		dev_err(dev, "failed to release resets (ret=%d)\n", ret);
 clk_err:
 	ret = clk_release_bulk(&priv->clocks);
-	if (ret)
+	if (ret && (ret != -ENOSYS))
 		dev_err(dev, "failed to release clocks (ret=%d)\n", ret);
 
 	return err;
@@ -95,7 +95,11 @@ static int ohci_usb_remove(struct udevice *dev)
 	if (ret)
 		return ret;
 
-	return clk_release_bulk(&priv->clocks);
+	ret = clk_release_bulk(&priv->clocks);
+	if (ret && (ret != -ENOSYS))
+		return ret;
+
+	return 0;
 }
 
 static const struct udevice_id ohci_usb_ids[] = {
-- 
2.25.1

[PATCH 2/5] binman: Add basic 'file_size' and 'int32' entry types

[Piotr Wojtaszczyk]

Entry 'int32' type can inject arbitrary 32bit integer value into a firmware
file. Entry 'file_size' type can inject file size as 32bit integer value into a
firmware file.
Both entries are helpful when a boot ROM requires magic value and/or
firmware length in header.

Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
---

 tools/binman/entries.rst        | 25 +++++++++++++++++++++++++
 tools/binman/etype/file_size.py | 28 ++++++++++++++++++++++++++++
 tools/binman/etype/int32.py     | 24 ++++++++++++++++++++++++
 3 files changed, 77 insertions(+)
 create mode 100644 tools/binman/etype/file_size.py
 create mode 100644 tools/binman/etype/int32.py

diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index 254afe7607..7696ea7023 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -712,6 +712,18 @@ without the fdtmap header, so it can be viewed with `fdtdump`.
 
 
 
+.. _etype_file_size:
+
+Entry: file_size: Size of a file as 32bit integer
+--------------------------------------------------
+
+Properties / Entry arguments:
+    - filename: relative file path
+
+This entry reads file size and places it as 32bit integer.
+
+
+
 .. _etype_files:
 
 Entry: files: A set of files arranged in a section
@@ -1138,6 +1150,19 @@ first/last in the entry list.
 
 
 
+.. _etype_int32:
+
+Entry: int32: Arbitrary 32bit integer
+--------------------------------------------------
+
+Properties / Entry arguments:
+    - value: 32bit integer value
+
+This entry places arbitrary 32bit integer. Useful when a magic value is
+required in a firmware.
+
+
+
 .. _etype_intel_cmc:
 
 Entry: intel-cmc: Intel Chipset Micro Code (CMC) file
diff --git a/tools/binman/etype/file_size.py b/tools/binman/etype/file_size.py
new file mode 100644
index 0000000000..d99ca1c067
--- /dev/null
+++ b/tools/binman/etype/file_size.py
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2023 Timesys
+# Written by Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
+#
+
+from binman.entry import Entry
+from dtoc import fdt_util
+from u_boot_pylib import tools
+import sys
+
+class Entry_file_size(Entry):
+    """An entry which is filled size of a file
+
+    Properties / Entry arguments:
+        - file: path to the file
+
+    Useful where a firmware header needs length of the firmware.
+    """
+    def __init__(self, section, etype, node):
+        super().__init__(section, etype, node)
+        self._filename = fdt_util.GetString(self._node, 'filename', self.etype)
+
+    def ObtainContents(self):
+        self._pathname = tools.get_input_filename(self._filename,
+            self.external and self.section.GetAllowMissing())
+        self._file_size = len(tools.read_file(self._pathname))
+        self.SetContents(self._file_size.to_bytes(4, sys.byteorder))
+        return True
diff --git a/tools/binman/etype/int32.py b/tools/binman/etype/int32.py
new file mode 100644
index 0000000000..463dfe46fd
--- /dev/null
+++ b/tools/binman/etype/int32.py
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2023 Timesys
+# Written by Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
+#
+
+from binman.entry import Entry
+from dtoc import fdt_util
+import sys
+
+class Entry_int32(Entry):
+    """An entry which is filled with arbitrary int32 data
+
+    Properties / Entry arguments:
+        - value: int32 value
+
+    Useful where a magic header is needed.
+    """
+    def __init__(self, section, etype, node):
+        super().__init__(section, etype, node)
+        self._int32_value = fdt_util.GetInt(self._node, 'value', 0)
+
+    def ObtainContents(self):
+        self.SetContents(self._int32_value.to_bytes(4, sys.byteorder))
+        return True
-- 
2.25.1

[PATCH 3/5] lpc32xx: Build firmware files using binman instead a rule in Makefile

[Piotr Wojtaszczyk]

Also fixed rounding up in the header verification function. Previously
Makefile was showing the header verification error but it was ignored.

Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
---

 Makefile                         |   2 +-
 arch/arm/Kconfig                 |   1 +
 arch/arm/dts/lpc32xx-u-boot.dtsi | 127 +++++++++++++++++++++++++++++++
 tools/lpc32xximage.c             |   3 +-
 4 files changed, 131 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/dts/lpc32xx-u-boot.dtsi

diff --git a/Makefile b/Makefile
index 7a3209bd9e..9bc6fe41e0 100644
--- a/Makefile
+++ b/Makefile
@@ -1481,7 +1481,7 @@ OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \
 u-boot-with-spl.bin: $(SPL_IMAGE) $(SPL_PAYLOAD) FORCE
 	$(call if_changed,pad_cat)
 
-ifeq ($(CONFIG_ARCH_LPC32XX)$(CONFIG_SPL),yy)
+ifeq ($(CONFIG_ARCH_LPC32XX)_$(CONFIG_SPL)_$(CONFIG_BINMAN),y_y_)
 MKIMAGEFLAGS_lpc32xx-spl.img = -T lpc32xximage -a $(CONFIG_SPL_TEXT_BASE)
 
 lpc32xx-spl.img: spl/u-boot-spl.bin FORCE
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index abd7c6c79a..95d8952e09 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -848,6 +848,7 @@ config ARCH_LPC32XX
 	select GPIO_EXTRA_HEADER
 	select SPL_DM if SPL
 	select SUPPORT_SPL
+	select BINMAN if SPL && OF_CONTROL
 	imply CMD_DM
 
 config ARCH_IMX8
diff --git a/arch/arm/dts/lpc32xx-u-boot.dtsi b/arch/arm/dts/lpc32xx-u-boot.dtsi
new file mode 100644
index 0000000000..1df71d16a3
--- /dev/null
+++ b/arch/arm/dts/lpc32xx-u-boot.dtsi
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright 2023 Timesys
+ * Author: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
+ */
+
+#include <config.h>
+
+#ifdef CONFIG_SPL
+/ {
+	binman: binman {
+		multiple-images;
+
+		/* SPL U-boot format for SPI NOR flash */
+		lpc32xx-spl-spi {
+			filename = "lpc32xx-spl-spi.bin";
+			pad-byte = <0xff>;
+			int32 {
+				value = <0x13579BDF>;
+			};
+			file_size {
+				filename = "spl/u-boot-spl.bin";
+			};
+			blob {
+				filename = "spl/u-boot-spl.bin";
+			};
+		};
+
+		/* Full U-boot format for SPI NOR flash */
+		lpc32xx-full-spi {
+			filename = "lpc32xx-full-spi.bin";
+			pad-byte = <0xff>;
+			int32 {
+				value = <0x13579BDF>;
+			};
+			file_size {
+				filename = "spl/u-boot-spl.bin";
+			};
+			blob@0 {
+				filename = "spl/u-boot-spl.bin";
+				size = <CONFIG_SPL_PAD_TO>;
+			};
+			blob@1 {
+				filename = "u-boot.img";
+			};
+		};
+
+		/* U-boot format for external, 32bit wide, static memory */
+		lpc32xx-full-emc-32b {
+			filename = "lpc32xx-full-emc-32b.bin";
+			pad-byte = <0xff>;
+			int32 {
+				value = <0x13579BD2>;
+			};
+			blob@0 {
+				filename = "spl/u-boot-spl.bin";
+				size = <CONFIG_SPL_PAD_TO>;
+			};
+			blob@1 {
+				filename = "u-boot.img";
+			};
+		};
+
+		/* U-boot format for external, 16bit wide, static memory */
+		lpc32xx-full-emc-16b {
+			filename = "lpc32xx-full-emc-16b.bin";
+			pad-byte = <0xff>;
+			int32 {
+				value = <0x13579BD1>;
+			};
+			blob@0 {
+				filename = "spl/u-boot-spl.bin";
+				size = <CONFIG_SPL_PAD_TO>;
+			};
+			blob@1 {
+				filename = "u-boot.img";
+			};
+		};
+
+		/* U-boot format for external, 8bit wide, static memory */
+		lpc32xx-full-emc-8b {
+			filename = "lpc32xx-full-emc-8b.bin";
+			pad-byte = <0xff>;
+			int32 {
+				value = <0x13579BD0>;
+			};
+			blob@0 {
+				filename = "spl/u-boot-spl.bin";
+				size = <CONFIG_SPL_PAD_TO>;
+			};
+			blob@1 {
+				filename = "u-boot.img";
+			};
+		};
+
+		/* SPL U-boot format for NAND flash */
+		lpc32xx-spl {
+			filename = "lpc32xx-spl.img";
+			mkimage {
+				args = "-T lpc32xximage -a 0x0";
+				blob {
+					filename = "spl/u-boot-spl.bin";
+				};
+			};
+		};
+
+		/* Full U-boot format for NAND flash */
+		/* CONFIG_SPL_PAD_TO should be set to NAND block size */
+		lpc32xx-full {
+			filename = "lpc32xx-full.bin";
+			pad-byte = <0xff>;
+			blob@0 {
+				filename = "lpc32xx-spl.img";
+				size = <CONFIG_SPL_PAD_TO>;
+			};
+			blob@1 {
+				filename = "lpc32xx-spl.img";
+				size = <CONFIG_SPL_PAD_TO>;
+			};
+			blob@2 {
+				filename = "u-boot.img";
+			};
+		};
+
+	};
+};
+#endif
diff --git a/tools/lpc32xximage.c b/tools/lpc32xximage.c
index 715a55a5b5..33f1a39174 100644
--- a/tools/lpc32xximage.c
+++ b/tools/lpc32xximage.c
@@ -86,7 +86,8 @@ static int lpc32xximage_verify_header(unsigned char *ptr, int image_size,
 		(struct nand_page_0_boot_header *)ptr;
 
 	/* turn image size from bytes to NAND pages, page 0 included */
-	int image_size_in_pages = ((image_size - 1)
+	int image_size_in_pages = ((image_size
+				  + LPC32XX_BOOT_NAND_PAGESIZE - 1)
 				  / LPC32XX_BOOT_NAND_PAGESIZE);
 
 	if (hdr->data[0] != (0xff & LPC32XX_BOOT_ICR))
-- 
2.25.1

[PATCH 4/5] lpc32xx: Make XTAL OSC freq configurable, add UART input clock selection

[Piotr Wojtaszczyk]

Allow to configure external XTAL OSC or external clock frequency.
Add source clock selection for UART, selecting HCLK may be needed for
higher clock resolution for specific XTAL OSC and baud rate combinations.
HSUART is always driven by PERIPH_CLK.

Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
---

 arch/arm/include/asm/arch-lpc32xx/clk.h    |  3 +-
 arch/arm/include/asm/arch-lpc32xx/config.h |  2 +-
 arch/arm/mach-lpc32xx/Kconfig              | 23 +++++++++++++
 arch/arm/mach-lpc32xx/clk.c                |  8 +++--
 arch/arm/mach-lpc32xx/devices.c            | 38 +++++++++++++++++-----
 5 files changed, 60 insertions(+), 14 deletions(-)

diff --git a/arch/arm/include/asm/arch-lpc32xx/clk.h b/arch/arm/include/asm/arch-lpc32xx/clk.h
index 5ab48a9d3c..75dce06104 100644
--- a/arch/arm/include/asm/arch-lpc32xx/clk.h
+++ b/arch/arm/include/asm/arch-lpc32xx/clk.h
@@ -8,8 +8,7 @@
 
 #include <asm/types.h>
 
-#define OSC_CLK_FREQUENCY	13000000
-#define RTC_CLK_FREQUENCY	32768
+#define LPC32XX_RTC_CLK_FREQUENCY	32768
 
 /* Clocking and Power Control Registers */
 struct clk_pm_regs {
diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h
index 41160384a4..836e29bd96 100644
--- a/arch/arm/include/asm/arch-lpc32xx/config.h
+++ b/arch/arm/include/asm/arch-lpc32xx/config.h
@@ -12,7 +12,7 @@
 /* Basic CPU architecture */
 
 #if !defined(CFG_SYS_NS16550_CLK)
-#define CFG_SYS_NS16550_CLK		13000000
+#define CFG_SYS_NS16550_CLK		get_serial_clock()
 #endif
 
 #define CFG_SYS_BAUDRATE_TABLE	\
diff --git a/arch/arm/mach-lpc32xx/Kconfig b/arch/arm/mach-lpc32xx/Kconfig
index 185bda41c2..6b54ec6220 100644
--- a/arch/arm/mach-lpc32xx/Kconfig
+++ b/arch/arm/mach-lpc32xx/Kconfig
@@ -17,6 +17,29 @@ config TARGET_EA_LPC3250DEVKITV2
 
 endchoice
 
+choice
+	prompt "LPC32xx clock source for standard UARTs"
+	help
+		Select clock source for standard UART baudrate divider.
+
+config LPC32XX_UART_PERIPH_CLK
+	bool "PERIPH as clock source"
+	help
+		Slower than HCLK, less resolution, lower power consumption.
+
+config LPC32XX_UART_HCLK_CLK
+	bool "HCLK as clock source"
+	help
+		Faster than PERIPH, better resolution, higher power consumption.
+
+endchoice
+
+config LPC32XX_OSC_CLK_FREQUENCY
+	int "LPC32xx external XTAL OSC or clock source frequency"
+	default 13000000
+	help
+		LPC32xx external XTAL OSC or clock source frequency.
+
 source "board/timll/devkit3250/Kconfig"
 source "board/work-microwave/work_92105/Kconfig"
 source "board/ea/ea-lpc3250devkitv2/Kconfig"
diff --git a/arch/arm/mach-lpc32xx/clk.c b/arch/arm/mach-lpc32xx/clk.c
index cb2344d79f..f327e0e876 100644
--- a/arch/arm/mach-lpc32xx/clk.c
+++ b/arch/arm/mach-lpc32xx/clk.c
@@ -15,9 +15,9 @@ static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
 unsigned int get_sys_clk_rate(void)
 {
 	if (readl(&clk->sysclk_ctrl) & CLK_SYSCLK_PLL397)
-		return RTC_CLK_FREQUENCY * 397;
+		return LPC32XX_RTC_CLK_FREQUENCY * 397;
 	else
-		return OSC_CLK_FREQUENCY;
+		return CONFIG_LPC32XX_OSC_CLK_FREQUENCY;
 }
 
 unsigned int get_hclk_pll_rate(void)
@@ -134,5 +134,9 @@ unsigned int get_sdram_clk_rate(void)
 
 int get_serial_clock(void)
 {
+#if IS_ENABLED(CONFIG_LPC32XX_UART_HCLK_CLK)
+	return get_hclk_clk_rate();
+#else
 	return get_periph_clk_rate();
+#endif
 }
diff --git a/arch/arm/mach-lpc32xx/devices.c b/arch/arm/mach-lpc32xx/devices.c
index 6a67a3591a..27061b6212 100644
--- a/arch/arm/mach-lpc32xx/devices.c
+++ b/arch/arm/mach-lpc32xx/devices.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <ns16550.h>
+#include <clock_legacy.h>
 
 #include <asm/arch/clk.h>
 #include <asm/arch/uart.h>
@@ -16,6 +17,13 @@ static struct clk_pm_regs    *clk  = (struct clk_pm_regs *)CLK_PM_BASE;
 static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;
 static struct mux_regs *mux = (struct mux_regs *)MUX_BASE;
 
+#define LPC32XX_USB_RATE 1000000
+#define LPC32XX_USB_DIV ((CONFIG_LPC32XX_OSC_CLK_FREQUENCY/LPC32XX_USB_RATE)-1)
+
+#if !CONFIG_IS_ENABLED(OF_CONTROL)
+static struct ns16550_plat lpc32xx_uart[4];
+#endif
+
 void lpc32xx_uart_init(unsigned int uart_id)
 {
 	if (uart_id < 1 || uart_id > 7)
@@ -36,20 +44,30 @@ void lpc32xx_uart_init(unsigned int uart_id)
 			UART_CLKMODE_AUTO(uart_id));
 
 	/* Bypass pre-divider of UART clock */
+#if IS_ENABLED(CONFIG_LPC32XX_UART_HCLK_CLK)
+	/* Use HCLK as input for baudrate divider */
+	writel(CLK_UART_HCLK | CLK_UART_X_DIV(1) | CLK_UART_Y_DIV(1),
+	       &clk->u3clk + (uart_id - 3));
+#else
+	/* Use PERIPH as input for baudrate divider */
 	writel(CLK_UART_X_DIV(1) | CLK_UART_Y_DIV(1),
 	       &clk->u3clk + (uart_id - 3));
+#endif
+
+#if !CONFIG_IS_ENABLED(OF_CONTROL)
+	int i;
+	for (i = 0; i < ARRAY_SIZE(lpc32xx_uart); i++) {
+		lpc32xx_uart[i].clock = get_serial_clock();
+	}
+#endif
 }
 
 #if !CONFIG_IS_ENABLED(OF_CONTROL)
-static const struct ns16550_plat lpc32xx_uart[] = {
-	{ .base = UART3_BASE, .reg_shift = 2,
-	  .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
-	{ .base = UART4_BASE, .reg_shift = 2,
-	  .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
-	{ .base = UART5_BASE, .reg_shift = 2,
-	  .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
-	{ .base = UART6_BASE, .reg_shift = 2,
-	  .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
+static struct ns16550_plat lpc32xx_uart[] = {
+	{ .base = UART3_BASE, .reg_shift = 2, .fcr = UART_FCR_DEFVAL, },
+	{ .base = UART4_BASE, .reg_shift = 2, .fcr = UART_FCR_DEFVAL, },
+	{ .base = UART5_BASE, .reg_shift = 2, .fcr = UART_FCR_DEFVAL, },
+	{ .base = UART6_BASE, .reg_shift = 2, .fcr = UART_FCR_DEFVAL, },
 };
 
 U_BOOT_DRVINFOS(lpc32xx_uarts) = {
@@ -94,6 +112,8 @@ void lpc32xx_usb_init(void)
 {
 	/* Do not route the UART 5 Tx/Rx pins to the USB D+ and USB D- pins. */
 	clrbits_le32(&ctrl->ctrl, UART_CTRL_UART5_USB_MODE);
+
+	writel(LPC32XX_USB_DIV, &clk->usbdiv_ctrl);
 }
 
 void lpc32xx_i2c_init(unsigned int devnum)
-- 
2.25.1

[PATCH 5/5] usb: lpc32xx: add DM_USB support

[Piotr Wojtaszczyk]

The legacy USB driver is modified into UCLASS_PHY which works with
drivers/usb/host/ohci-generic.c
This brings back USB functionality for LPC32xx.

Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
---

 arch/arm/dts/lpc3250-ea3250-u-boot.dtsi |  9 +++
 arch/arm/dts/lpc32xx-u-boot.dtsi        |  4 ++
 configs/ea-lpc3250devkitv2_defconfig    |  5 ++
 drivers/usb/host/Kconfig                | 13 ++--
 drivers/usb/host/ohci-lpc32xx.c         | 79 ++++++++++++++-----------
 5 files changed, 71 insertions(+), 39 deletions(-)

diff --git a/arch/arm/dts/lpc3250-ea3250-u-boot.dtsi b/arch/arm/dts/lpc3250-ea3250-u-boot.dtsi
index 0c82e512c6..5c15302bf7 100644
--- a/arch/arm/dts/lpc3250-ea3250-u-boot.dtsi
+++ b/arch/arm/dts/lpc3250-ea3250-u-boot.dtsi
@@ -13,3 +13,12 @@
 &uart5 {
 	compatible = "nxp,lpc3220-uart", "ns16550a";
 };
+
+&isp1301 {
+	#phy-cells = <0>;
+};
+
+&ohci {
+	phys = <&isp1301>;
+	phy-names = "usb";
+};
diff --git a/arch/arm/dts/lpc32xx-u-boot.dtsi b/arch/arm/dts/lpc32xx-u-boot.dtsi
index 1df71d16a3..d950192eb3 100644
--- a/arch/arm/dts/lpc32xx-u-boot.dtsi
+++ b/arch/arm/dts/lpc32xx-u-boot.dtsi
@@ -6,6 +6,10 @@
 
 #include <config.h>
 
+&ohci {
+	compatible = "generic-ohci";
+};
+
 #ifdef CONFIG_SPL
 / {
 	binman: binman {
diff --git a/configs/ea-lpc3250devkitv2_defconfig b/configs/ea-lpc3250devkitv2_defconfig
index af9fc5f2f5..73108835c9 100644
--- a/configs/ea-lpc3250devkitv2_defconfig
+++ b/configs/ea-lpc3250devkitv2_defconfig
@@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SYS_PROMPT="EA-LPC3250v2=> "
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
 CONFIG_OF_CONTROL=y
 # CONFIG_NET is not set
 CONFIG_LPC32XX_GPIO=y
@@ -32,4 +33,8 @@ CONFIG_SYS_I2C_LPC32XX=y
 CONFIG_SPECIFY_CONSOLE_INDEX=y
 CONFIG_CONS_INDEX=5
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_OHCI_LPC32XX=y
 CONFIG_PANIC_HANG=y
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 0dd5736433..b3a2c1c14e 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -363,6 +363,13 @@ config USB_OHCI_DA8XX
 	help
 	  Enable support for the da850 USB controller.
 
+config USB_OHCI_LPC32XX
+	bool "Support for LPC32xx OHCI USB"
+	depends on ARCH_LPC32XX && DM_I2C && USB_OHCI_GENERIC
+	select USB_OHCI_NEW
+	help
+	  Enable support for the LPC32xx USB controller with ISP1301/STOTG04 phy.
+
 config USB_OHCI_NPCM
 	bool "Support for Nuvoton NPCM on-chip OHCI USB controller"
 	depends on ARCH_NPCM
@@ -447,12 +454,6 @@ config USB_ATMEL_CLK_SEL_UPLL
 
 endchoice
 
-config USB_OHCI_LPC32XX
-	bool "LPC32xx USB OHCI support"
-	depends on ARCH_LPC32XX
-	select SYS_USB_OHCI_CPU_INIT
-	select USB_OHCI_NEW
-
 config USB_MAX_CONTROLLER_COUNT
 	int "Maximum number of USB host controllers"
 	depends on USB_EHCI_FSL || USB_XHCI_FSL || \
diff --git a/drivers/usb/host/ohci-lpc32xx.c b/drivers/usb/host/ohci-lpc32xx.c
index a04b2961b9..7163bef71a 100644
--- a/drivers/usb/host/ohci-lpc32xx.c
+++ b/drivers/usb/host/ohci-lpc32xx.c
@@ -5,6 +5,7 @@
  * @Descr: USB driver - Embedded Artists LPC3250 OEM Board support functions
  *
  * Copyright (c) 2015 Tyco Fire Protection Products.
+ * Copyright 2024 Timesys <piotr.wojtaszczyk@timesys.com>
  */
 
 #include <common.h>
@@ -19,6 +20,7 @@
 #include <asm/arch/i2c.h>
 #include <usb.h>
 #include <i2c.h>
+#include <generic-phy.h>
 
 /* OTG I2C controller module register structures */
 struct otgi2c_regs {
@@ -69,8 +71,6 @@ struct otg_regs {
 #define OTG1_DM_PULLDOWN		(1 << 3)
 #define OTG1_VBUS_DRV			(1 << 5)
 
-#define ISP1301_I2C_ADDR		CFG_USB_ISP1301_I2C_ADDR
-
 #define ISP1301_I2C_MODE_CONTROL_1_SET		0x04
 #define ISP1301_I2C_MODE_CONTROL_1_CLR		0x05
 #define ISP1301_I2C_MODE_CONTROL_2_SET		0x12
@@ -86,19 +86,11 @@ static struct clk_pm_regs *clk_pwr = (struct clk_pm_regs *)CLK_PM_BASE;
 
 static int isp1301_set_value(struct udevice *dev, int reg, u8 value)
 {
-#if !CONFIG_IS_ENABLED(DM_I2C)
-	return i2c_write(ISP1301_I2C_ADDR, reg, 1, &value, 1);
-#else
 	return dm_i2c_write(dev, reg, &value, 1);
-#endif
 }
 
 static void isp1301_configure(struct udevice *dev)
 {
-#if !CONFIG_IS_ENABLED(DM_I2C)
-	i2c_set_bus_num(I2C_2);
-#endif
-
 	/*
 	 * LPC32XX only supports DAT_SE0 USB mode
 	 * This sequence is important
@@ -155,18 +147,10 @@ static int usbpll_setup(void)
 	return 0;
 }
 
-int usb_cpu_init(void)
+static int isp1301_phy_init(struct phy *usb_phy)
 {
 	u32 ret;
-	struct udevice *dev = NULL;
-
-#if CONFIG_IS_ENABLED(DM_I2C)
-	ret = i2c_get_chip_for_busnum(I2C_2, ISP1301_I2C_ADDR, 1, &dev);
-	if (ret) {
-		debug("%s: No bus %d\n", __func__, I2C_2);
-		return ret;
-	}
-#endif
+	struct udevice *dev = usb_phy->dev;
 
 	/*
 	 * USB pins routing setup is done by "lpc32xx_usb_init()" and should
@@ -211,21 +195,13 @@ int usb_cpu_init(void)
 	return 0;
 }
 
-int usb_cpu_stop(void)
+int isp1301_phy_exit(struct phy *usb_phy)
 {
-	struct udevice *dev = NULL;
+	struct udevice *dev = usb_phy->dev;
 	int ret = 0;
 
-#if CONFIG_IS_ENABLED(DM_I2C)
-	ret = i2c_get_chip_for_busnum(I2C_2, ISP1301_I2C_ADDR, 1, &dev);
-	if (ret) {
-		debug("%s: No bus %d\n", __func__, I2C_2);
-		return ret;
-	}
-#endif
-
 	/* vbus off */
-	isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_VBUS_DRV);
+	isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_CLR, OTG1_VBUS_DRV);
 
 	clrbits_le32(&otg->otg_sts_ctrl, OTG_HOST_EN);
 
@@ -234,7 +210,44 @@ int usb_cpu_stop(void)
 	return ret;
 }
 
-int usb_cpu_init_fail(void)
+static int isp1301_phy_set_on(struct phy *usb_phy)
+{
+	struct udevice *dev = usb_phy->dev;
+	int ret;
+	ret = isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_VBUS_DRV);
+	mdelay(10); /* ramp up delay */
+	return ret;
+}
+
+static int isp1301_phy_set_off(struct phy *usb_phy)
+{
+	struct udevice *dev = usb_phy->dev;
+	int ret;
+	ret = isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_CLR, OTG1_VBUS_DRV);
+	return ret;
+}
+
+int isp1301_probe(struct udevice *dev)
 {
-	return usb_cpu_stop();
+	return 0;
 }
+
+static const struct udevice_id isp1301_usb_phy_of_match[] = {
+	{.compatible = "nxp,isp1301" },
+	{},
+};
+
+struct phy_ops isp1301_usb_phy_ops = {
+	.init = isp1301_phy_init,
+	.power_on = isp1301_phy_set_on,
+	.power_off = isp1301_phy_set_off,
+	.exit = isp1301_phy_exit,
+};
+
+U_BOOT_DRIVER(nxp_isp1301_usb_phy) = {
+	.name = "nxp_isp1301_usb_phy",
+	.id = UCLASS_PHY,
+	.of_match = isp1301_usb_phy_of_match,
+	.probe = isp1301_probe,
+	.ops = &isp1301_usb_phy_ops,
+};
-- 
2.25.1

Re: [PATCH 1/5] usb: ohci-generic: ignore ENOSYS and ENOTSUPP errors from clk and reset

[Marek Vasut]

On 1/26/24 10:25, Piotr Wojtaszczyk wrote:
> If a machine doesn't have CONFIG_CLK set the call to clk_get_bulk()
> returns '-ENOSYS' error which should be handled the same way as
> '-ENOENT' error. The same applies to reset_get_bulk() and 'ENOTSUPP'.
> 
> Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
> ---
> 
>   drivers/usb/host/ohci-generic.c | 12 ++++++++----
>   1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
> index ceed1911a9..28512c081f 100644
> --- a/drivers/usb/host/ohci-generic.c
> +++ b/drivers/usb/host/ohci-generic.c
> @@ -28,7 +28,7 @@ static int ohci_usb_probe(struct udevice *dev)
>   	int err, ret;
>   
>   	ret = clk_get_bulk(dev, &priv->clocks);
> -	if (ret && ret != -ENOENT) {
> +	if (ret && !((ret == -ENOENT) || (ret == -ENOSYS))) {
>   		dev_err(dev, "Failed to get clocks (ret=%d)\n", ret);

This simpler form should work too I think ?
"
if (ret && ret != -ENOENT && ret != -ENOSYS)
"