* [PATCH v2 1/4] clocksource: move PXA timer to clocksource framework
@ 2014-07-05 11:12 ` Robert Jarzmik
0 siblings, 0 replies; 13+ messages in thread
From: Robert Jarzmik @ 2014-07-05 11:12 UTC (permalink / raw)
To: Daniel Lezcano, Haojian Zhuang
Cc: linux-arm-kernel, linux-kernel, devicetree, Thomas Gleixner,
Robert Jarzmik
Move time.c from arch/arm/mach-pxa/time.c to
drivers/clocksource/pxa_timer.c.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
arch/arm/mach-pxa/Makefile | 2 +-
drivers/clocksource/Makefile | 1 +
arch/arm/mach-pxa/time.c => drivers/clocksource/pxa_timer.c | 0
3 files changed, 2 insertions(+), 1 deletion(-)
rename arch/arm/mach-pxa/time.c => drivers/clocksource/pxa_timer.c (100%)
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 648867a..2fe1824 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -4,7 +4,7 @@
# Common support (must be linked before board specific support)
obj-y += clock.o devices.o generic.o irq.o \
- time.o reset.o
+ reset.o
obj-$(CONFIG_PM) += pm.o sleep.o standby.o
# Generic drivers that other drivers may depend upon
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 800b130..fc61ef8 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
obj-$(CONFIG_ARCH_MARCO) += timer-marco.o
obj-$(CONFIG_ARCH_MOXART) += moxart_timer.o
obj-$(CONFIG_ARCH_MXS) += mxs_timer.o
+obj-$(CONFIG_ARCH_PXA) += pxa_timer.o
obj-$(CONFIG_ARCH_PRIMA2) += timer-prima2.o
obj-$(CONFIG_ARCH_U300) += timer-u300.o
obj-$(CONFIG_SUN4I_TIMER) += sun4i_timer.o
diff --git a/arch/arm/mach-pxa/time.c b/drivers/clocksource/pxa_timer.c
similarity index 100%
rename from arch/arm/mach-pxa/time.c
rename to drivers/clocksource/pxa_timer.c
--
2.0.0.rc2
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 1/4] clocksource: move PXA timer to clocksource framework
@ 2014-07-05 11:12 ` Robert Jarzmik
0 siblings, 0 replies; 13+ messages in thread
From: Robert Jarzmik @ 2014-07-05 11:12 UTC (permalink / raw)
To: linux-arm-kernel
Move time.c from arch/arm/mach-pxa/time.c to
drivers/clocksource/pxa_timer.c.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
arch/arm/mach-pxa/Makefile | 2 +-
drivers/clocksource/Makefile | 1 +
arch/arm/mach-pxa/time.c => drivers/clocksource/pxa_timer.c | 0
3 files changed, 2 insertions(+), 1 deletion(-)
rename arch/arm/mach-pxa/time.c => drivers/clocksource/pxa_timer.c (100%)
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 648867a..2fe1824 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -4,7 +4,7 @@
# Common support (must be linked before board specific support)
obj-y += clock.o devices.o generic.o irq.o \
- time.o reset.o
+ reset.o
obj-$(CONFIG_PM) += pm.o sleep.o standby.o
# Generic drivers that other drivers may depend upon
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 800b130..fc61ef8 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
obj-$(CONFIG_ARCH_MARCO) += timer-marco.o
obj-$(CONFIG_ARCH_MOXART) += moxart_timer.o
obj-$(CONFIG_ARCH_MXS) += mxs_timer.o
+obj-$(CONFIG_ARCH_PXA) += pxa_timer.o
obj-$(CONFIG_ARCH_PRIMA2) += timer-prima2.o
obj-$(CONFIG_ARCH_U300) += timer-u300.o
obj-$(CONFIG_SUN4I_TIMER) += sun4i_timer.o
diff --git a/arch/arm/mach-pxa/time.c b/drivers/clocksource/pxa_timer.c
similarity index 100%
rename from arch/arm/mach-pxa/time.c
rename to drivers/clocksource/pxa_timer.c
--
2.0.0.rc2
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 2/4] clocksource: add device-tree support for PXA timer
@ 2014-07-05 11:12 ` Robert Jarzmik
0 siblings, 0 replies; 13+ messages in thread
From: Robert Jarzmik @ 2014-07-05 11:12 UTC (permalink / raw)
To: Daniel Lezcano, Haojian Zhuang
Cc: linux-arm-kernel, linux-kernel, devicetree, Thomas Gleixner,
Robert Jarzmik
Add device-tree support to PXA platforms.
The driver still needs to maintain backward non device-tree
compatibility as well, which implies :
- a non device-tree init function
- a static registers base address in the driver
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
Since V1: Daniel's review:
- comments for registers
- registers clean-up
- mach includes removed
- panic() removed
---
drivers/clocksource/pxa_timer.c | 129 +++++++++++++++++++++++++++++-----------
1 file changed, 93 insertions(+), 36 deletions(-)
diff --git a/drivers/clocksource/pxa_timer.c b/drivers/clocksource/pxa_timer.c
index fca174e..5caedd3 100644
--- a/drivers/clocksource/pxa_timer.c
+++ b/drivers/clocksource/pxa_timer.c
@@ -15,14 +15,30 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
+#include <linux/clk.h>
#include <linux/clockchips.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
#include <linux/sched_clock.h>
#include <asm/div64.h>
-#include <asm/mach/irq.h>
-#include <asm/mach/time.h>
-#include <mach/regs-ost.h>
-#include <mach/irqs.h>
+
+#define OSMR0 0x00 /* OS Timer 0 Match Register */
+#define OSMR1 0x04 /* OS Timer 1 Match Register */
+#define OSMR2 0x08 /* OS Timer 2 Match Register */
+#define OSMR3 0x0C /* OS Timer 3 Match Register */
+
+#define OSCR 0x10 /* OS Timer Counter Register */
+#define OSSR 0x14 /* OS Timer Status Register */
+#define OWER 0x18 /* OS Timer Watchdog Enable Register */
+#define OIER 0x1C /* OS Timer Interrupt Enable Register */
+
+#define OSSR_M3 (1 << 3) /* Match status channel 3 */
+#define OSSR_M2 (1 << 2) /* Match status channel 2 */
+#define OSSR_M1 (1 << 1) /* Match status channel 1 */
+#define OSSR_M0 (1 << 0) /* Match status channel 0 */
+
+#define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */
/*
* This is PXA's sched_clock implementation. This has a resolution
@@ -33,9 +49,14 @@
* calls to sched_clock() which should always be the case in practice.
*/
+#define timer_readl(reg) readl_relaxed(timer_base + (reg))
+#define timer_writel(val, reg) writel_relaxed((val), timer_base + (reg))
+
+static void __iomem *timer_base;
+
static u64 notrace pxa_read_sched_clock(void)
{
- return readl_relaxed(OSCR);
+ return timer_readl(OSCR);
}
@@ -47,8 +68,8 @@ pxa_ost0_interrupt(int irq, void *dev_id)
struct clock_event_device *c = dev_id;
/* Disarm the compare/match, signal the event. */
- writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) & ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
c->event_handler(c);
return IRQ_HANDLED;
@@ -59,10 +80,10 @@ pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
{
unsigned long next, oscr;
- writel_relaxed(readl_relaxed(OIER) | OIER_E0, OIER);
- next = readl_relaxed(OSCR) + delta;
- writel_relaxed(next, OSMR0);
- oscr = readl_relaxed(OSCR);
+ timer_writel(timer_readl(OIER) | OIER_E0, OIER);
+ next = timer_readl(OSCR) + delta;
+ timer_writel(next, OSMR0);
+ oscr = timer_readl(OSCR);
return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
}
@@ -72,15 +93,15 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
{
switch (mode) {
case CLOCK_EVT_MODE_ONESHOT:
- writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) & ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
break;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
/* initializing, released, or preparing for suspend */
- writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) & ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
break;
case CLOCK_EVT_MODE_RESUME:
@@ -94,12 +115,12 @@ static unsigned long osmr[4], oier, oscr;
static void pxa_timer_suspend(struct clock_event_device *cedev)
{
- osmr[0] = readl_relaxed(OSMR0);
- osmr[1] = readl_relaxed(OSMR1);
- osmr[2] = readl_relaxed(OSMR2);
- osmr[3] = readl_relaxed(OSMR3);
- oier = readl_relaxed(OIER);
- oscr = readl_relaxed(OSCR);
+ osmr[0] = timer_readl(OSMR0);
+ osmr[1] = timer_readl(OSMR1);
+ osmr[2] = timer_readl(OSMR2);
+ osmr[3] = timer_readl(OSMR3);
+ oier = timer_readl(OIER);
+ oscr = timer_readl(OSCR);
}
static void pxa_timer_resume(struct clock_event_device *cedev)
@@ -113,12 +134,12 @@ static void pxa_timer_resume(struct clock_event_device *cedev)
if (osmr[0] - oscr < MIN_OSCR_DELTA)
osmr[0] += MIN_OSCR_DELTA;
- writel_relaxed(osmr[0], OSMR0);
- writel_relaxed(osmr[1], OSMR1);
- writel_relaxed(osmr[2], OSMR2);
- writel_relaxed(osmr[3], OSMR3);
- writel_relaxed(oier, OIER);
- writel_relaxed(oscr, OSCR);
+ timer_writel(osmr[0], OSMR0);
+ timer_writel(osmr[1], OSMR1);
+ timer_writel(osmr[2], OSMR2);
+ timer_writel(osmr[3], OSMR3);
+ timer_writel(oier, OIER);
+ timer_writel(oscr, OSCR);
}
#else
#define pxa_timer_suspend NULL
@@ -142,21 +163,57 @@ static struct irqaction pxa_ost0_irq = {
.dev_id = &ckevt_pxa_osmr0,
};
-void __init pxa_timer_init(void)
+static void pxa_timer_common_init(int irq, unsigned long clock_tick_rate)
{
- unsigned long clock_tick_rate = get_clock_tick_rate();
-
- writel_relaxed(0, OIER);
- writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
+ timer_writel(0, OIER);
+ timer_writel(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
sched_clock_register(pxa_read_sched_clock, 32, clock_tick_rate);
ckevt_pxa_osmr0.cpumask = cpumask_of(0);
- setup_irq(IRQ_OST0, &pxa_ost0_irq);
+ setup_irq(irq, &pxa_ost0_irq);
- clocksource_mmio_init(OSCR, "oscr0", clock_tick_rate, 200, 32,
- clocksource_mmio_readl_up);
+ clocksource_mmio_init(timer_base + OSCR, "oscr0", clock_tick_rate, 200,
+ 32, clocksource_mmio_readl_up);
clockevents_config_and_register(&ckevt_pxa_osmr0, clock_tick_rate,
- MIN_OSCR_DELTA * 2, 0x7fffffff);
+ MIN_OSCR_DELTA * 2, 0x7fffffff);
+}
+
+static void __init pxa_timer_dt_init(struct device_node *np)
+{
+ struct clk *clk;
+ int irq;
+
+ /* timer registers are shared with watchdog timer */
+ timer_base = of_iomap(np, 0);
+ if (!timer_base)
+ panic("%s: unable to map resource\n", np->name);
+
+ clk = of_clk_get(np, 0);
+ if (IS_ERR(clk)) {
+ pr_crit("%s: unable to get clk\n", np->name);
+ return;
+ }
+ clk_prepare_enable(clk);
+
+ /* we are only interested in OS-timer0 irq */
+ irq = irq_of_parse_and_map(np, 0);
+ if (irq <= 0) {
+ pr_crit("%s: unable to parse OS-timer0 irq\n", np->name);
+ return;
+ }
+
+ pxa_timer_common_init(irq, clk_get_rate(clk));
+}
+CLOCKSOURCE_OF_DECLARE(pxa_timer, "marvell,pxa-timer", pxa_timer_dt_init);
+
+/*
+ * Legacy timer init for non device-tree boards.
+ */
+void __init pxa_timer_nodt_init(int irq, void __iomem *base,
+ unsigned long clock_tick_rate)
+{
+ timer_base = base;
+ pxa_timer_common_init(irq, clock_tick_rate);
}
--
2.0.0.rc2
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 2/4] clocksource: add device-tree support for PXA timer
@ 2014-07-05 11:12 ` Robert Jarzmik
0 siblings, 0 replies; 13+ messages in thread
From: Robert Jarzmik @ 2014-07-05 11:12 UTC (permalink / raw)
To: Daniel Lezcano, Haojian Zhuang
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, Thomas Gleixner,
Robert Jarzmik
Add device-tree support to PXA platforms.
The driver still needs to maintain backward non device-tree
compatibility as well, which implies :
- a non device-tree init function
- a static registers base address in the driver
Signed-off-by: Robert Jarzmik <robert.jarzmik-GANU6spQydw@public.gmane.org>
---
Since V1: Daniel's review:
- comments for registers
- registers clean-up
- mach includes removed
- panic() removed
---
drivers/clocksource/pxa_timer.c | 129 +++++++++++++++++++++++++++++-----------
1 file changed, 93 insertions(+), 36 deletions(-)
diff --git a/drivers/clocksource/pxa_timer.c b/drivers/clocksource/pxa_timer.c
index fca174e..5caedd3 100644
--- a/drivers/clocksource/pxa_timer.c
+++ b/drivers/clocksource/pxa_timer.c
@@ -15,14 +15,30 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
+#include <linux/clk.h>
#include <linux/clockchips.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
#include <linux/sched_clock.h>
#include <asm/div64.h>
-#include <asm/mach/irq.h>
-#include <asm/mach/time.h>
-#include <mach/regs-ost.h>
-#include <mach/irqs.h>
+
+#define OSMR0 0x00 /* OS Timer 0 Match Register */
+#define OSMR1 0x04 /* OS Timer 1 Match Register */
+#define OSMR2 0x08 /* OS Timer 2 Match Register */
+#define OSMR3 0x0C /* OS Timer 3 Match Register */
+
+#define OSCR 0x10 /* OS Timer Counter Register */
+#define OSSR 0x14 /* OS Timer Status Register */
+#define OWER 0x18 /* OS Timer Watchdog Enable Register */
+#define OIER 0x1C /* OS Timer Interrupt Enable Register */
+
+#define OSSR_M3 (1 << 3) /* Match status channel 3 */
+#define OSSR_M2 (1 << 2) /* Match status channel 2 */
+#define OSSR_M1 (1 << 1) /* Match status channel 1 */
+#define OSSR_M0 (1 << 0) /* Match status channel 0 */
+
+#define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */
/*
* This is PXA's sched_clock implementation. This has a resolution
@@ -33,9 +49,14 @@
* calls to sched_clock() which should always be the case in practice.
*/
+#define timer_readl(reg) readl_relaxed(timer_base + (reg))
+#define timer_writel(val, reg) writel_relaxed((val), timer_base + (reg))
+
+static void __iomem *timer_base;
+
static u64 notrace pxa_read_sched_clock(void)
{
- return readl_relaxed(OSCR);
+ return timer_readl(OSCR);
}
@@ -47,8 +68,8 @@ pxa_ost0_interrupt(int irq, void *dev_id)
struct clock_event_device *c = dev_id;
/* Disarm the compare/match, signal the event. */
- writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) & ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
c->event_handler(c);
return IRQ_HANDLED;
@@ -59,10 +80,10 @@ pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
{
unsigned long next, oscr;
- writel_relaxed(readl_relaxed(OIER) | OIER_E0, OIER);
- next = readl_relaxed(OSCR) + delta;
- writel_relaxed(next, OSMR0);
- oscr = readl_relaxed(OSCR);
+ timer_writel(timer_readl(OIER) | OIER_E0, OIER);
+ next = timer_readl(OSCR) + delta;
+ timer_writel(next, OSMR0);
+ oscr = timer_readl(OSCR);
return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
}
@@ -72,15 +93,15 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
{
switch (mode) {
case CLOCK_EVT_MODE_ONESHOT:
- writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) & ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
break;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
/* initializing, released, or preparing for suspend */
- writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) & ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
break;
case CLOCK_EVT_MODE_RESUME:
@@ -94,12 +115,12 @@ static unsigned long osmr[4], oier, oscr;
static void pxa_timer_suspend(struct clock_event_device *cedev)
{
- osmr[0] = readl_relaxed(OSMR0);
- osmr[1] = readl_relaxed(OSMR1);
- osmr[2] = readl_relaxed(OSMR2);
- osmr[3] = readl_relaxed(OSMR3);
- oier = readl_relaxed(OIER);
- oscr = readl_relaxed(OSCR);
+ osmr[0] = timer_readl(OSMR0);
+ osmr[1] = timer_readl(OSMR1);
+ osmr[2] = timer_readl(OSMR2);
+ osmr[3] = timer_readl(OSMR3);
+ oier = timer_readl(OIER);
+ oscr = timer_readl(OSCR);
}
static void pxa_timer_resume(struct clock_event_device *cedev)
@@ -113,12 +134,12 @@ static void pxa_timer_resume(struct clock_event_device *cedev)
if (osmr[0] - oscr < MIN_OSCR_DELTA)
osmr[0] += MIN_OSCR_DELTA;
- writel_relaxed(osmr[0], OSMR0);
- writel_relaxed(osmr[1], OSMR1);
- writel_relaxed(osmr[2], OSMR2);
- writel_relaxed(osmr[3], OSMR3);
- writel_relaxed(oier, OIER);
- writel_relaxed(oscr, OSCR);
+ timer_writel(osmr[0], OSMR0);
+ timer_writel(osmr[1], OSMR1);
+ timer_writel(osmr[2], OSMR2);
+ timer_writel(osmr[3], OSMR3);
+ timer_writel(oier, OIER);
+ timer_writel(oscr, OSCR);
}
#else
#define pxa_timer_suspend NULL
@@ -142,21 +163,57 @@ static struct irqaction pxa_ost0_irq = {
.dev_id = &ckevt_pxa_osmr0,
};
-void __init pxa_timer_init(void)
+static void pxa_timer_common_init(int irq, unsigned long clock_tick_rate)
{
- unsigned long clock_tick_rate = get_clock_tick_rate();
-
- writel_relaxed(0, OIER);
- writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
+ timer_writel(0, OIER);
+ timer_writel(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
sched_clock_register(pxa_read_sched_clock, 32, clock_tick_rate);
ckevt_pxa_osmr0.cpumask = cpumask_of(0);
- setup_irq(IRQ_OST0, &pxa_ost0_irq);
+ setup_irq(irq, &pxa_ost0_irq);
- clocksource_mmio_init(OSCR, "oscr0", clock_tick_rate, 200, 32,
- clocksource_mmio_readl_up);
+ clocksource_mmio_init(timer_base + OSCR, "oscr0", clock_tick_rate, 200,
+ 32, clocksource_mmio_readl_up);
clockevents_config_and_register(&ckevt_pxa_osmr0, clock_tick_rate,
- MIN_OSCR_DELTA * 2, 0x7fffffff);
+ MIN_OSCR_DELTA * 2, 0x7fffffff);
+}
+
+static void __init pxa_timer_dt_init(struct device_node *np)
+{
+ struct clk *clk;
+ int irq;
+
+ /* timer registers are shared with watchdog timer */
+ timer_base = of_iomap(np, 0);
+ if (!timer_base)
+ panic("%s: unable to map resource\n", np->name);
+
+ clk = of_clk_get(np, 0);
+ if (IS_ERR(clk)) {
+ pr_crit("%s: unable to get clk\n", np->name);
+ return;
+ }
+ clk_prepare_enable(clk);
+
+ /* we are only interested in OS-timer0 irq */
+ irq = irq_of_parse_and_map(np, 0);
+ if (irq <= 0) {
+ pr_crit("%s: unable to parse OS-timer0 irq\n", np->name);
+ return;
+ }
+
+ pxa_timer_common_init(irq, clk_get_rate(clk));
+}
+CLOCKSOURCE_OF_DECLARE(pxa_timer, "marvell,pxa-timer", pxa_timer_dt_init);
+
+/*
+ * Legacy timer init for non device-tree boards.
+ */
+void __init pxa_timer_nodt_init(int irq, void __iomem *base,
+ unsigned long clock_tick_rate)
+{
+ timer_base = base;
+ pxa_timer_common_init(irq, clock_tick_rate);
}
--
2.0.0.rc2
--
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^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 2/4] clocksource: add device-tree support for PXA timer
@ 2014-07-05 11:12 ` Robert Jarzmik
0 siblings, 0 replies; 13+ messages in thread
From: Robert Jarzmik @ 2014-07-05 11:12 UTC (permalink / raw)
To: linux-arm-kernel
Add device-tree support to PXA platforms.
The driver still needs to maintain backward non device-tree
compatibility as well, which implies :
- a non device-tree init function
- a static registers base address in the driver
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
Since V1: Daniel's review:
- comments for registers
- registers clean-up
- mach includes removed
- panic() removed
---
drivers/clocksource/pxa_timer.c | 129 +++++++++++++++++++++++++++++-----------
1 file changed, 93 insertions(+), 36 deletions(-)
diff --git a/drivers/clocksource/pxa_timer.c b/drivers/clocksource/pxa_timer.c
index fca174e..5caedd3 100644
--- a/drivers/clocksource/pxa_timer.c
+++ b/drivers/clocksource/pxa_timer.c
@@ -15,14 +15,30 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
+#include <linux/clk.h>
#include <linux/clockchips.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
#include <linux/sched_clock.h>
#include <asm/div64.h>
-#include <asm/mach/irq.h>
-#include <asm/mach/time.h>
-#include <mach/regs-ost.h>
-#include <mach/irqs.h>
+
+#define OSMR0 0x00 /* OS Timer 0 Match Register */
+#define OSMR1 0x04 /* OS Timer 1 Match Register */
+#define OSMR2 0x08 /* OS Timer 2 Match Register */
+#define OSMR3 0x0C /* OS Timer 3 Match Register */
+
+#define OSCR 0x10 /* OS Timer Counter Register */
+#define OSSR 0x14 /* OS Timer Status Register */
+#define OWER 0x18 /* OS Timer Watchdog Enable Register */
+#define OIER 0x1C /* OS Timer Interrupt Enable Register */
+
+#define OSSR_M3 (1 << 3) /* Match status channel 3 */
+#define OSSR_M2 (1 << 2) /* Match status channel 2 */
+#define OSSR_M1 (1 << 1) /* Match status channel 1 */
+#define OSSR_M0 (1 << 0) /* Match status channel 0 */
+
+#define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */
/*
* This is PXA's sched_clock implementation. This has a resolution
@@ -33,9 +49,14 @@
* calls to sched_clock() which should always be the case in practice.
*/
+#define timer_readl(reg) readl_relaxed(timer_base + (reg))
+#define timer_writel(val, reg) writel_relaxed((val), timer_base + (reg))
+
+static void __iomem *timer_base;
+
static u64 notrace pxa_read_sched_clock(void)
{
- return readl_relaxed(OSCR);
+ return timer_readl(OSCR);
}
@@ -47,8 +68,8 @@ pxa_ost0_interrupt(int irq, void *dev_id)
struct clock_event_device *c = dev_id;
/* Disarm the compare/match, signal the event. */
- writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) & ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
c->event_handler(c);
return IRQ_HANDLED;
@@ -59,10 +80,10 @@ pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
{
unsigned long next, oscr;
- writel_relaxed(readl_relaxed(OIER) | OIER_E0, OIER);
- next = readl_relaxed(OSCR) + delta;
- writel_relaxed(next, OSMR0);
- oscr = readl_relaxed(OSCR);
+ timer_writel(timer_readl(OIER) | OIER_E0, OIER);
+ next = timer_readl(OSCR) + delta;
+ timer_writel(next, OSMR0);
+ oscr = timer_readl(OSCR);
return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
}
@@ -72,15 +93,15 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
{
switch (mode) {
case CLOCK_EVT_MODE_ONESHOT:
- writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) & ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
break;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
/* initializing, released, or preparing for suspend */
- writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) & ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
break;
case CLOCK_EVT_MODE_RESUME:
@@ -94,12 +115,12 @@ static unsigned long osmr[4], oier, oscr;
static void pxa_timer_suspend(struct clock_event_device *cedev)
{
- osmr[0] = readl_relaxed(OSMR0);
- osmr[1] = readl_relaxed(OSMR1);
- osmr[2] = readl_relaxed(OSMR2);
- osmr[3] = readl_relaxed(OSMR3);
- oier = readl_relaxed(OIER);
- oscr = readl_relaxed(OSCR);
+ osmr[0] = timer_readl(OSMR0);
+ osmr[1] = timer_readl(OSMR1);
+ osmr[2] = timer_readl(OSMR2);
+ osmr[3] = timer_readl(OSMR3);
+ oier = timer_readl(OIER);
+ oscr = timer_readl(OSCR);
}
static void pxa_timer_resume(struct clock_event_device *cedev)
@@ -113,12 +134,12 @@ static void pxa_timer_resume(struct clock_event_device *cedev)
if (osmr[0] - oscr < MIN_OSCR_DELTA)
osmr[0] += MIN_OSCR_DELTA;
- writel_relaxed(osmr[0], OSMR0);
- writel_relaxed(osmr[1], OSMR1);
- writel_relaxed(osmr[2], OSMR2);
- writel_relaxed(osmr[3], OSMR3);
- writel_relaxed(oier, OIER);
- writel_relaxed(oscr, OSCR);
+ timer_writel(osmr[0], OSMR0);
+ timer_writel(osmr[1], OSMR1);
+ timer_writel(osmr[2], OSMR2);
+ timer_writel(osmr[3], OSMR3);
+ timer_writel(oier, OIER);
+ timer_writel(oscr, OSCR);
}
#else
#define pxa_timer_suspend NULL
@@ -142,21 +163,57 @@ static struct irqaction pxa_ost0_irq = {
.dev_id = &ckevt_pxa_osmr0,
};
-void __init pxa_timer_init(void)
+static void pxa_timer_common_init(int irq, unsigned long clock_tick_rate)
{
- unsigned long clock_tick_rate = get_clock_tick_rate();
-
- writel_relaxed(0, OIER);
- writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
+ timer_writel(0, OIER);
+ timer_writel(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
sched_clock_register(pxa_read_sched_clock, 32, clock_tick_rate);
ckevt_pxa_osmr0.cpumask = cpumask_of(0);
- setup_irq(IRQ_OST0, &pxa_ost0_irq);
+ setup_irq(irq, &pxa_ost0_irq);
- clocksource_mmio_init(OSCR, "oscr0", clock_tick_rate, 200, 32,
- clocksource_mmio_readl_up);
+ clocksource_mmio_init(timer_base + OSCR, "oscr0", clock_tick_rate, 200,
+ 32, clocksource_mmio_readl_up);
clockevents_config_and_register(&ckevt_pxa_osmr0, clock_tick_rate,
- MIN_OSCR_DELTA * 2, 0x7fffffff);
+ MIN_OSCR_DELTA * 2, 0x7fffffff);
+}
+
+static void __init pxa_timer_dt_init(struct device_node *np)
+{
+ struct clk *clk;
+ int irq;
+
+ /* timer registers are shared with watchdog timer */
+ timer_base = of_iomap(np, 0);
+ if (!timer_base)
+ panic("%s: unable to map resource\n", np->name);
+
+ clk = of_clk_get(np, 0);
+ if (IS_ERR(clk)) {
+ pr_crit("%s: unable to get clk\n", np->name);
+ return;
+ }
+ clk_prepare_enable(clk);
+
+ /* we are only interested in OS-timer0 irq */
+ irq = irq_of_parse_and_map(np, 0);
+ if (irq <= 0) {
+ pr_crit("%s: unable to parse OS-timer0 irq\n", np->name);
+ return;
+ }
+
+ pxa_timer_common_init(irq, clk_get_rate(clk));
+}
+CLOCKSOURCE_OF_DECLARE(pxa_timer, "marvell,pxa-timer", pxa_timer_dt_init);
+
+/*
+ * Legacy timer init for non device-tree boards.
+ */
+void __init pxa_timer_nodt_init(int irq, void __iomem *base,
+ unsigned long clock_tick_rate)
+{
+ timer_base = base;
+ pxa_timer_common_init(irq, clock_tick_rate);
}
--
2.0.0.rc2
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 3/4] arm: pxa: add CLKSRC_OF dependency
2014-07-05 11:12 ` Robert Jarzmik
@ 2014-07-05 11:13 ` Robert Jarzmik
-1 siblings, 0 replies; 13+ messages in thread
From: Robert Jarzmik @ 2014-07-05 11:13 UTC (permalink / raw)
To: Daniel Lezcano, Haojian Zhuang
Cc: linux-arm-kernel, linux-kernel, devicetree, Thomas Gleixner,
Robert Jarzmik
Select CLKSRC_OF for PXA architectures.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
arch/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 87b63fd..472dea1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -644,6 +644,7 @@ config ARCH_PXA
select AUTO_ZRELADDR
select CLKDEV_LOOKUP
select CLKSRC_MMIO
+ select CLKSRC_OF
select GENERIC_CLOCKEVENTS
select GPIO_PXA
select HAVE_IDE
--
2.0.0.rc2
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 3/4] arm: pxa: add CLKSRC_OF dependency
@ 2014-07-05 11:13 ` Robert Jarzmik
0 siblings, 0 replies; 13+ messages in thread
From: Robert Jarzmik @ 2014-07-05 11:13 UTC (permalink / raw)
To: linux-arm-kernel
Select CLKSRC_OF for PXA architectures.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
arch/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 87b63fd..472dea1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -644,6 +644,7 @@ config ARCH_PXA
select AUTO_ZRELADDR
select CLKDEV_LOOKUP
select CLKSRC_MMIO
+ select CLKSRC_OF
select GENERIC_CLOCKEVENTS
select GPIO_PXA
select HAVE_IDE
--
2.0.0.rc2
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 4/4] arm: pxa: add non device-tree timer link to clocksource
@ 2014-07-05 11:13 ` Robert Jarzmik
0 siblings, 0 replies; 13+ messages in thread
From: Robert Jarzmik @ 2014-07-05 11:13 UTC (permalink / raw)
To: Daniel Lezcano, Haojian Zhuang
Cc: linux-arm-kernel, linux-kernel, devicetree, Thomas Gleixner,
Robert Jarzmik
As clocksource pxa_timer was moved to clocksource framework, the
pxa_timer initialization needs to be a bit amended, to pass the
necessary informations to clocksource, ie :
- the timer interrupt (mach specific)
- the timer registers base (ditto)
- the timer clockrate
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
arch/arm/mach-pxa/generic.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 4225417..2dcded5 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -25,6 +25,7 @@
#include <asm/mach/map.h>
#include <asm/mach-types.h>
+#include <mach/irqs.h>
#include <mach/reset.h>
#include <mach/smemc.h>
#include <mach/pxa3xx-regs.h>
@@ -57,6 +58,17 @@ unsigned long get_clock_tick_rate(void)
EXPORT_SYMBOL(get_clock_tick_rate);
/*
+ * For non device-tree builds, keep legacy timer init
+ */
+extern void pxa_timer_nodt_init(int irq, void __iomem *base,
+ unsigned long clock_tick_rate);
+void pxa_timer_init(void)
+{
+ pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000),
+ get_clock_tick_rate());
+}
+
+/*
* Get the clock frequency as reflected by CCCR and the turbo flag.
* We assume these values have been applied via a fcs.
* If info is not 0 we also display the current settings.
--
2.0.0.rc2
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 4/4] arm: pxa: add non device-tree timer link to clocksource
@ 2014-07-05 11:13 ` Robert Jarzmik
0 siblings, 0 replies; 13+ messages in thread
From: Robert Jarzmik @ 2014-07-05 11:13 UTC (permalink / raw)
To: Daniel Lezcano, Haojian Zhuang
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, Thomas Gleixner,
Robert Jarzmik
As clocksource pxa_timer was moved to clocksource framework, the
pxa_timer initialization needs to be a bit amended, to pass the
necessary informations to clocksource, ie :
- the timer interrupt (mach specific)
- the timer registers base (ditto)
- the timer clockrate
Signed-off-by: Robert Jarzmik <robert.jarzmik-GANU6spQydw@public.gmane.org>
---
arch/arm/mach-pxa/generic.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 4225417..2dcded5 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -25,6 +25,7 @@
#include <asm/mach/map.h>
#include <asm/mach-types.h>
+#include <mach/irqs.h>
#include <mach/reset.h>
#include <mach/smemc.h>
#include <mach/pxa3xx-regs.h>
@@ -57,6 +58,17 @@ unsigned long get_clock_tick_rate(void)
EXPORT_SYMBOL(get_clock_tick_rate);
/*
+ * For non device-tree builds, keep legacy timer init
+ */
+extern void pxa_timer_nodt_init(int irq, void __iomem *base,
+ unsigned long clock_tick_rate);
+void pxa_timer_init(void)
+{
+ pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000),
+ get_clock_tick_rate());
+}
+
+/*
* Get the clock frequency as reflected by CCCR and the turbo flag.
* We assume these values have been applied via a fcs.
* If info is not 0 we also display the current settings.
--
2.0.0.rc2
--
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^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 4/4] arm: pxa: add non device-tree timer link to clocksource
@ 2014-07-05 11:13 ` Robert Jarzmik
0 siblings, 0 replies; 13+ messages in thread
From: Robert Jarzmik @ 2014-07-05 11:13 UTC (permalink / raw)
To: linux-arm-kernel
As clocksource pxa_timer was moved to clocksource framework, the
pxa_timer initialization needs to be a bit amended, to pass the
necessary informations to clocksource, ie :
- the timer interrupt (mach specific)
- the timer registers base (ditto)
- the timer clockrate
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
arch/arm/mach-pxa/generic.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 4225417..2dcded5 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -25,6 +25,7 @@
#include <asm/mach/map.h>
#include <asm/mach-types.h>
+#include <mach/irqs.h>
#include <mach/reset.h>
#include <mach/smemc.h>
#include <mach/pxa3xx-regs.h>
@@ -57,6 +58,17 @@ unsigned long get_clock_tick_rate(void)
EXPORT_SYMBOL(get_clock_tick_rate);
/*
+ * For non device-tree builds, keep legacy timer init
+ */
+extern void pxa_timer_nodt_init(int irq, void __iomem *base,
+ unsigned long clock_tick_rate);
+void pxa_timer_init(void)
+{
+ pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000),
+ get_clock_tick_rate());
+}
+
+/*
* Get the clock frequency as reflected by CCCR and the turbo flag.
* We assume these values have been applied via a fcs.
* If info is not 0 we also display the current settings.
--
2.0.0.rc2
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v2 4/4] arm: pxa: add non device-tree timer link to clocksource
@ 2014-07-05 18:29 ` Arnd Bergmann
0 siblings, 0 replies; 13+ messages in thread
From: Arnd Bergmann @ 2014-07-05 18:29 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Robert Jarzmik, Daniel Lezcano, Haojian Zhuang, devicetree,
Thomas Gleixner, linux-kernel
On Saturday 05 July 2014 13:13:01 Robert Jarzmik wrote:
> EXPORT_SYMBOL(get_clock_tick_rate);
>
> /*
> + * For non device-tree builds, keep legacy timer init
> + */
> +extern void pxa_timer_nodt_init(int irq, void __iomem *base,
> + unsigned long clock_tick_rate);
> +void pxa_timer_init(void)
> +{
> + pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000),
> + get_clock_tick_rate());
> +}
> +
I think it would be better to move the extern declaration into
a new header file, e.g. include/clocksource/pxa.h.
Arnd
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 4/4] arm: pxa: add non device-tree timer link to clocksource
@ 2014-07-05 18:29 ` Arnd Bergmann
0 siblings, 0 replies; 13+ messages in thread
From: Arnd Bergmann @ 2014-07-05 18:29 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: Robert Jarzmik, Daniel Lezcano, Haojian Zhuang,
devicetree-u79uwXL29TY76Z2rM5mHXA, Thomas Gleixner,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
On Saturday 05 July 2014 13:13:01 Robert Jarzmik wrote:
> EXPORT_SYMBOL(get_clock_tick_rate);
>
> /*
> + * For non device-tree builds, keep legacy timer init
> + */
> +extern void pxa_timer_nodt_init(int irq, void __iomem *base,
> + unsigned long clock_tick_rate);
> +void pxa_timer_init(void)
> +{
> + pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000),
> + get_clock_tick_rate());
> +}
> +
I think it would be better to move the extern declaration into
a new header file, e.g. include/clocksource/pxa.h.
Arnd
--
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^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2 4/4] arm: pxa: add non device-tree timer link to clocksource
@ 2014-07-05 18:29 ` Arnd Bergmann
0 siblings, 0 replies; 13+ messages in thread
From: Arnd Bergmann @ 2014-07-05 18:29 UTC (permalink / raw)
To: linux-arm-kernel
On Saturday 05 July 2014 13:13:01 Robert Jarzmik wrote:
> EXPORT_SYMBOL(get_clock_tick_rate);
>
> /*
> + * For non device-tree builds, keep legacy timer init
> + */
> +extern void pxa_timer_nodt_init(int irq, void __iomem *base,
> + unsigned long clock_tick_rate);
> +void pxa_timer_init(void)
> +{
> + pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000),
> + get_clock_tick_rate());
> +}
> +
I think it would be better to move the extern declaration into
a new header file, e.g. include/clocksource/pxa.h.
Arnd
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2014-07-05 18:29 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-07-05 11:12 [PATCH v2 1/4] clocksource: move PXA timer to clocksource framework Robert Jarzmik
2014-07-05 11:12 ` Robert Jarzmik
2014-07-05 11:12 ` [PATCH v2 2/4] clocksource: add device-tree support for PXA timer Robert Jarzmik
2014-07-05 11:12 ` Robert Jarzmik
2014-07-05 11:12 ` Robert Jarzmik
2014-07-05 11:13 ` [PATCH v2 3/4] arm: pxa: add CLKSRC_OF dependency Robert Jarzmik
2014-07-05 11:13 ` Robert Jarzmik
2014-07-05 11:13 ` [PATCH v2 4/4] arm: pxa: add non device-tree timer link to clocksource Robert Jarzmik
2014-07-05 11:13 ` Robert Jarzmik
2014-07-05 11:13 ` Robert Jarzmik
2014-07-05 18:29 ` Arnd Bergmann
2014-07-05 18:29 ` Arnd Bergmann
2014-07-05 18:29 ` Arnd Bergmann
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