* Re: [PATCHv1 0/8] Add support for sam9x60 curiosity board [not found] <20221031033653.43269-1-durai.manickamkr@microchip.com> @ 2022-10-31 10:20 ` Claudiu.Beznea [not found] ` <20221031033653.43269-2-durai.manickamkr@microchip.com> ` (5 subsequent siblings) 6 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:20 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > This patch series addresses the following: > - Moving of flexcom definitions from board file to SoC file and > some minor changes to its properties. > - Add support for the new sam9x60 curiosity board based on the > existing sam9x60 SoC. > > Changes in v1: This series is actually v2. Also I cannot locate your patches on lore.kernel.org don't know why... > -------------- > - Added generic names for regulator node. > - Removed the #addredd-cells and #size-cells property which shows > compilation warning. > - Removed the property "status=okay" as this is default. > - No underscores used for the pinctrl definitions and node names. > - Organised the patches in the logical way. > - Bindings are made separate pacth. > > Durai Manickam KR (5): > ARM: dts: at91: sam9x60: remove flexcom definitions > ARM: dts: at91: sam9x60: Add flexcom definitions > ARM: dts: at91: sam9x60: Add missing flexcom definitions > dt-bindings: arm: at91: Add info on SAM9X60-CURIOSITY > ARM: dts: at91: sam9x60_curiosity: Add device tree for > sam9x60_curiosity board > > Hari Prasath (1): > ARM: dts: at91: sam9x60: Add DMA bindigs for the flexcom nodes > > Manikandan M (2): > ARM: dts: at91: sam9x60: Fix the label numbering for the flexcom > functions > ARM: dts: at91: sam9x60: Specify the FIFO size for the Flexcom UART > > .../devicetree/bindings/arm/atmel-at91.yaml | 6 + > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/at91-sam9x60_curiosity.dts | 519 +++++++++++++++ > arch/arm/boot/dts/at91-sam9x60ek.dts | 50 +- > arch/arm/boot/dts/sam9x60.dtsi | 623 ++++++++++++++++++ > 5 files changed, 1159 insertions(+), 40 deletions(-) > create mode 100644 arch/arm/boot/dts/at91-sam9x60_curiosity.dts > ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 0/8] Add support for sam9x60 curiosity board @ 2022-10-31 10:20 ` Claudiu.Beznea 0 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:20 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > This patch series addresses the following: > - Moving of flexcom definitions from board file to SoC file and > some minor changes to its properties. > - Add support for the new sam9x60 curiosity board based on the > existing sam9x60 SoC. > > Changes in v1: This series is actually v2. Also I cannot locate your patches on lore.kernel.org don't know why... > -------------- > - Added generic names for regulator node. > - Removed the #addredd-cells and #size-cells property which shows > compilation warning. > - Removed the property "status=okay" as this is default. > - No underscores used for the pinctrl definitions and node names. > - Organised the patches in the logical way. > - Bindings are made separate pacth. > > Durai Manickam KR (5): > ARM: dts: at91: sam9x60: remove flexcom definitions > ARM: dts: at91: sam9x60: Add flexcom definitions > ARM: dts: at91: sam9x60: Add missing flexcom definitions > dt-bindings: arm: at91: Add info on SAM9X60-CURIOSITY > ARM: dts: at91: sam9x60_curiosity: Add device tree for > sam9x60_curiosity board > > Hari Prasath (1): > ARM: dts: at91: sam9x60: Add DMA bindigs for the flexcom nodes > > Manikandan M (2): > ARM: dts: at91: sam9x60: Fix the label numbering for the flexcom > functions > ARM: dts: at91: sam9x60: Specify the FIFO size for the Flexcom UART > > .../devicetree/bindings/arm/atmel-at91.yaml | 6 + > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/at91-sam9x60_curiosity.dts | 519 +++++++++++++++ > arch/arm/boot/dts/at91-sam9x60ek.dts | 50 +- > arch/arm/boot/dts/sam9x60.dtsi | 623 ++++++++++++++++++ > 5 files changed, 1159 insertions(+), 40 deletions(-) > create mode 100644 arch/arm/boot/dts/at91-sam9x60_curiosity.dts > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 0/8] Add support for sam9x60 curiosity board 2022-10-31 10:20 ` Claudiu.Beznea @ 2022-11-02 20:18 ` Krzysztof Kozlowski -1 siblings, 0 replies; 28+ messages in thread From: Krzysztof Kozlowski @ 2022-11-02 20:18 UTC (permalink / raw) To: Claudiu.Beznea, Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31/10/2022 06:20, Claudiu.Beznea@microchip.com wrote: > On 31.10.2022 05:36, Durai Manickam KR wrote: >> This patch series addresses the following: >> - Moving of flexcom definitions from board file to SoC file and >> some minor changes to its properties. >> - Add support for the new sam9x60 curiosity board based on the >> existing sam9x60 SoC. >> >> Changes in v1: > > This series is actually v2. Also I cannot locate your patches on > lore.kernel.org don't know why... > I was not cced on this submission - I got only reply from yours. As you pointed out this v1 which is v2 ignores several of my comments. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 0/8] Add support for sam9x60 curiosity board @ 2022-11-02 20:18 ` Krzysztof Kozlowski 0 siblings, 0 replies; 28+ messages in thread From: Krzysztof Kozlowski @ 2022-11-02 20:18 UTC (permalink / raw) To: Claudiu.Beznea, Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31/10/2022 06:20, Claudiu.Beznea@microchip.com wrote: > On 31.10.2022 05:36, Durai Manickam KR wrote: >> This patch series addresses the following: >> - Moving of flexcom definitions from board file to SoC file and >> some minor changes to its properties. >> - Add support for the new sam9x60 curiosity board based on the >> existing sam9x60 SoC. >> >> Changes in v1: > > This series is actually v2. Also I cannot locate your patches on > lore.kernel.org don't know why... > I was not cced on this submission - I got only reply from yours. As you pointed out this v1 which is v2 ignores several of my comments. Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 0/8] Add support for sam9x60 curiosity board 2022-11-02 20:18 ` Krzysztof Kozlowski @ 2022-11-03 5:12 ` Durai.ManickamKR -1 siblings, 0 replies; 28+ messages in thread From: Durai.ManickamKR @ 2022-11-03 5:12 UTC (permalink / raw) To: krzysztof.kozlowski, Claudiu.Beznea, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 03/11/22 01:48, Krzysztof Kozlowski wrote: > [You don't often get email from krzysztof.kozlowski@linaro.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ] > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On 31/10/2022 06:20, Claudiu.Beznea@microchip.com wrote: >> On 31.10.2022 05:36, Durai Manickam KR wrote: >>> This patch series addresses the following: >>> - Moving of flexcom definitions from board file to SoC file and >>> some minor changes to its properties. >>> - Add support for the new sam9x60 curiosity board based on the >>> existing sam9x60 SoC. >>> >>> Changes in v1: >> This series is actually v2. Also I cannot locate your patches on >> lore.kernel.org don't know why... >> > I was not cced on this submission - I got only reply from yours. As you > pointed out this v1 which is v2 ignores several of my comments. > > Best regards, > Krzysztof > Hi Krzysztof, I will address all the comments received and will send as patch v3. ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 0/8] Add support for sam9x60 curiosity board @ 2022-11-03 5:12 ` Durai.ManickamKR 0 siblings, 0 replies; 28+ messages in thread From: Durai.ManickamKR @ 2022-11-03 5:12 UTC (permalink / raw) To: krzysztof.kozlowski, Claudiu.Beznea, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 03/11/22 01:48, Krzysztof Kozlowski wrote: > [You don't often get email from krzysztof.kozlowski@linaro.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ] > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On 31/10/2022 06:20, Claudiu.Beznea@microchip.com wrote: >> On 31.10.2022 05:36, Durai Manickam KR wrote: >>> This patch series addresses the following: >>> - Moving of flexcom definitions from board file to SoC file and >>> some minor changes to its properties. >>> - Add support for the new sam9x60 curiosity board based on the >>> existing sam9x60 SoC. >>> >>> Changes in v1: >> This series is actually v2. Also I cannot locate your patches on >> lore.kernel.org don't know why... >> > I was not cced on this submission - I got only reply from yours. As you > pointed out this v1 which is v2 ignores several of my comments. > > Best regards, > Krzysztof > Hi Krzysztof, I will address all the comments received and will send as patch v3. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 28+ messages in thread
[parent not found: <20221031033653.43269-2-durai.manickamkr@microchip.com>]
* Re: [PATCHv1 1/8] ARM: dts: at91: sam9x60: Fix the label numbering for the flexcom functions [not found] ` <20221031033653.43269-2-durai.manickamkr@microchip.com> @ 2022-10-31 10:22 ` Claudiu.Beznea 2022-10-31 10:25 ` Claudiu.Beznea 1 sibling, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:22 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > From: Manikandan M <manikandan.m@microchip.com> > > Fixed the label numbering of the flexcom functions so that all > 13 flexcom functions of sam9x60 are in the following order when the missing > flexcom functions are added: > > flx0: uart0, spi0, i2c0 > flx1: uart1, spi1, i2c1 > flx2: uart2, spi2, i2c2 > flx3: uart3, spi3, i2c3 > flx4: uart4, spi4, i2c4 > flx5: uart5, spi5, i2c5 > flx6: uart6, i2c6 > flx7: uart7, i2c7 > flx8: uart8, i2c8 > flx9: uart9, i2c9 > flx10: uart10, i2c10 > flx11: uart11, i2c11 > flx12: uart12, i2c12 > > Signed-off-by: Manikandan M <manikandan.m@microchip.com> Please use valid Name Surname here. M doesn't look like a valid name/surname. > --- > arch/arm/boot/dts/at91-sam9x60ek.dts | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts > index 4ba52ba11dc6..265978514dcf 100644 > --- a/arch/arm/boot/dts/at91-sam9x60ek.dts > +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts > @@ -16,8 +16,8 @@ / { > > aliases { > i2c0 = &i2c0; > - i2c1 = &i2c1; > - serial1 = &uart1; > + i2c1 = &i2c6; > + serial1 = &uart5; > }; > > chosen { > @@ -238,7 +238,7 @@ &flx4 { > atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>; > status = "disabled"; > > - spi0: spi@400 { > + spi4: spi@400 { > compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > reg = <0x400 0x200>; > interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > @@ -257,7 +257,7 @@ &flx5 { > atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; > status = "okay"; > > - uart1: serial@200 { > + uart5: serial@200 { > compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > atmel,usart-mode = <AT91_USART_MODE_SERIAL>; > @@ -283,7 +283,7 @@ &flx6 { > atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; > status = "okay"; > > - i2c1: i2c@600 { > + i2c6: i2c@600 { > compatible = "microchip,sam9x60-i2c"; > reg = <0x600 0x200>; > interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; > @@ -443,7 +443,7 @@ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE > AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; > }; > > - pinctrl_flx5_default: flx_uart { > + pinctrl_flx5_default: flx5_uart { > atmel,pins = > <AT91_PIOA 7 AT91_PERIPH_C AT91_PINCTRL_NONE > AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 1/8] ARM: dts: at91: sam9x60: Fix the label numbering for the flexcom functions @ 2022-10-31 10:22 ` Claudiu.Beznea 0 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:22 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > From: Manikandan M <manikandan.m@microchip.com> > > Fixed the label numbering of the flexcom functions so that all > 13 flexcom functions of sam9x60 are in the following order when the missing > flexcom functions are added: > > flx0: uart0, spi0, i2c0 > flx1: uart1, spi1, i2c1 > flx2: uart2, spi2, i2c2 > flx3: uart3, spi3, i2c3 > flx4: uart4, spi4, i2c4 > flx5: uart5, spi5, i2c5 > flx6: uart6, i2c6 > flx7: uart7, i2c7 > flx8: uart8, i2c8 > flx9: uart9, i2c9 > flx10: uart10, i2c10 > flx11: uart11, i2c11 > flx12: uart12, i2c12 > > Signed-off-by: Manikandan M <manikandan.m@microchip.com> Please use valid Name Surname here. M doesn't look like a valid name/surname. > --- > arch/arm/boot/dts/at91-sam9x60ek.dts | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts > index 4ba52ba11dc6..265978514dcf 100644 > --- a/arch/arm/boot/dts/at91-sam9x60ek.dts > +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts > @@ -16,8 +16,8 @@ / { > > aliases { > i2c0 = &i2c0; > - i2c1 = &i2c1; > - serial1 = &uart1; > + i2c1 = &i2c6; > + serial1 = &uart5; > }; > > chosen { > @@ -238,7 +238,7 @@ &flx4 { > atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>; > status = "disabled"; > > - spi0: spi@400 { > + spi4: spi@400 { > compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > reg = <0x400 0x200>; > interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > @@ -257,7 +257,7 @@ &flx5 { > atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; > status = "okay"; > > - uart1: serial@200 { > + uart5: serial@200 { > compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > atmel,usart-mode = <AT91_USART_MODE_SERIAL>; > @@ -283,7 +283,7 @@ &flx6 { > atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; > status = "okay"; > > - i2c1: i2c@600 { > + i2c6: i2c@600 { > compatible = "microchip,sam9x60-i2c"; > reg = <0x600 0x200>; > interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; > @@ -443,7 +443,7 @@ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE > AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; > }; > > - pinctrl_flx5_default: flx_uart { > + pinctrl_flx5_default: flx5_uart { > atmel,pins = > <AT91_PIOA 7 AT91_PERIPH_C AT91_PINCTRL_NONE > AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 1/8] ARM: dts: at91: sam9x60: Fix the label numbering for the flexcom functions [not found] ` <20221031033653.43269-2-durai.manickamkr@microchip.com> @ 2022-10-31 10:25 ` Claudiu.Beznea 2022-10-31 10:25 ` Claudiu.Beznea 1 sibling, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:25 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > From: Manikandan M <manikandan.m@microchip.com> > > Fixed the label numbering of the flexcom functions so that all > 13 flexcom functions of sam9x60 are in the following order when the missing > flexcom functions are added: > > flx0: uart0, spi0, i2c0 > flx1: uart1, spi1, i2c1 > flx2: uart2, spi2, i2c2 > flx3: uart3, spi3, i2c3 > flx4: uart4, spi4, i2c4 > flx5: uart5, spi5, i2c5 > flx6: uart6, i2c6 > flx7: uart7, i2c7 > flx8: uart8, i2c8 > flx9: uart9, i2c9 > flx10: uart10, i2c10 > flx11: uart11, i2c11 > flx12: uart12, i2c12 > > Signed-off-by: Manikandan M <manikandan.m@microchip.com> Also you SoB should go here. > --- > arch/arm/boot/dts/at91-sam9x60ek.dts | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts > index 4ba52ba11dc6..265978514dcf 100644 > --- a/arch/arm/boot/dts/at91-sam9x60ek.dts > +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts > @@ -16,8 +16,8 @@ / { > > aliases { > i2c0 = &i2c0; > - i2c1 = &i2c1; > - serial1 = &uart1; > + i2c1 = &i2c6; > + serial1 = &uart5; > }; > > chosen { > @@ -238,7 +238,7 @@ &flx4 { > atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>; > status = "disabled"; > > - spi0: spi@400 { > + spi4: spi@400 { > compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > reg = <0x400 0x200>; > interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > @@ -257,7 +257,7 @@ &flx5 { > atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; > status = "okay"; > > - uart1: serial@200 { > + uart5: serial@200 { > compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > atmel,usart-mode = <AT91_USART_MODE_SERIAL>; > @@ -283,7 +283,7 @@ &flx6 { > atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; > status = "okay"; > > - i2c1: i2c@600 { > + i2c6: i2c@600 { > compatible = "microchip,sam9x60-i2c"; > reg = <0x600 0x200>; > interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; > @@ -443,7 +443,7 @@ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE > AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; > }; > > - pinctrl_flx5_default: flx_uart { > + pinctrl_flx5_default: flx5_uart { > atmel,pins = > <AT91_PIOA 7 AT91_PERIPH_C AT91_PINCTRL_NONE > AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 1/8] ARM: dts: at91: sam9x60: Fix the label numbering for the flexcom functions @ 2022-10-31 10:25 ` Claudiu.Beznea 0 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:25 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > From: Manikandan M <manikandan.m@microchip.com> > > Fixed the label numbering of the flexcom functions so that all > 13 flexcom functions of sam9x60 are in the following order when the missing > flexcom functions are added: > > flx0: uart0, spi0, i2c0 > flx1: uart1, spi1, i2c1 > flx2: uart2, spi2, i2c2 > flx3: uart3, spi3, i2c3 > flx4: uart4, spi4, i2c4 > flx5: uart5, spi5, i2c5 > flx6: uart6, i2c6 > flx7: uart7, i2c7 > flx8: uart8, i2c8 > flx9: uart9, i2c9 > flx10: uart10, i2c10 > flx11: uart11, i2c11 > flx12: uart12, i2c12 > > Signed-off-by: Manikandan M <manikandan.m@microchip.com> Also you SoB should go here. > --- > arch/arm/boot/dts/at91-sam9x60ek.dts | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts > index 4ba52ba11dc6..265978514dcf 100644 > --- a/arch/arm/boot/dts/at91-sam9x60ek.dts > +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts > @@ -16,8 +16,8 @@ / { > > aliases { > i2c0 = &i2c0; > - i2c1 = &i2c1; > - serial1 = &uart1; > + i2c1 = &i2c6; > + serial1 = &uart5; > }; > > chosen { > @@ -238,7 +238,7 @@ &flx4 { > atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>; > status = "disabled"; > > - spi0: spi@400 { > + spi4: spi@400 { > compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > reg = <0x400 0x200>; > interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > @@ -257,7 +257,7 @@ &flx5 { > atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; > status = "okay"; > > - uart1: serial@200 { > + uart5: serial@200 { > compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > atmel,usart-mode = <AT91_USART_MODE_SERIAL>; > @@ -283,7 +283,7 @@ &flx6 { > atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; > status = "okay"; > > - i2c1: i2c@600 { > + i2c6: i2c@600 { > compatible = "microchip,sam9x60-i2c"; > reg = <0x600 0x200>; > interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; > @@ -443,7 +443,7 @@ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE > AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; > }; > > - pinctrl_flx5_default: flx_uart { > + pinctrl_flx5_default: flx5_uart { > atmel,pins = > <AT91_PIOA 7 AT91_PERIPH_C AT91_PINCTRL_NONE > AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 28+ messages in thread
[parent not found: <20221031033653.43269-3-durai.manickamkr@microchip.com>]
* Re: [PATCHv1 2/8] ARM: dts: at91: sam9x60: remove flexcom definitions [not found] ` <20221031033653.43269-3-durai.manickamkr@microchip.com> @ 2022-10-31 10:23 ` Claudiu.Beznea 0 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:23 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > Remove the flexcom definitions in the board specific DTS file of sam9x60ek. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > --- > arch/arm/boot/dts/at91-sam9x60ek.dts | 35 +--------------------------- > 1 file changed, 1 insertion(+), 34 deletions(-) > > diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts > index 265978514dcf..9d9e50c77794 100644 > --- a/arch/arm/boot/dts/at91-sam9x60ek.dts > +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts > @@ -211,15 +211,10 @@ &flx0 { > status = "okay"; > > i2c0: i2c@600 { > - compatible = "microchip,sam9x60-i2c"; > - reg = <0x600 0x200>; > - interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; > #address-cells = <1>; > #size-cells = <0>; > - clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_flx0_default>; > - atmel,fifo-size = <16>; > i2c-analog-filter; > i2c-digital-filter; > i2c-digital-filter-width-ns = <35>; > @@ -239,16 +234,8 @@ &flx4 { > status = "disabled"; > > spi4: spi@400 { > - compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > - reg = <0x400 0x200>; > - interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > - clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; > - clock-names = "spi_clk"; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_flx4_default>; > - atmel,fifo-size = <16>; As mention in the previous version, this starting here > - #address-cells = <1>; > - #size-cells = <0>; ending here is not moved to dtsi but was just deleted. Please include it in another patch. Also, you will have to merge this patch with the next to have the components removed here still working in this patch. > status = "disabled"; > }; > }; > @@ -258,23 +245,8 @@ &flx5 { > status = "okay"; > > uart5: serial@200 { > - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; > - reg = <0x200 0x200>; > - atmel,usart-mode = <AT91_USART_MODE_SERIAL>; > - interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; > - dmas = <&dma0 > - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | > - AT91_XDMAC_DT_PERID(10))>, > - <&dma0 > - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | > - AT91_XDMAC_DT_PERID(11))>; > - dma-names = "tx", "rx"; > - clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; > - clock-names = "usart"; > - pinctrl-0 = <&pinctrl_flx5_default>; > pinctrl-names = "default"; > - atmel,use-dma-rx; > - atmel,use-dma-tx; > + pinctrl-0 = <&pinctrl_flx5_default>; > status = "okay"; > }; > }; > @@ -284,15 +256,10 @@ &flx6 { > status = "okay"; > > i2c6: i2c@600 { > - compatible = "microchip,sam9x60-i2c"; > - reg = <0x600 0x200>; > - interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; > #address-cells = <1>; > #size-cells = <0>; > - clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_flx6_default>; > - atmel,fifo-size = <16>; > i2c-analog-filter; > i2c-digital-filter; > i2c-digital-filter-width-ns = <35>; ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 2/8] ARM: dts: at91: sam9x60: remove flexcom definitions @ 2022-10-31 10:23 ` Claudiu.Beznea 0 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:23 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > Remove the flexcom definitions in the board specific DTS file of sam9x60ek. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > --- > arch/arm/boot/dts/at91-sam9x60ek.dts | 35 +--------------------------- > 1 file changed, 1 insertion(+), 34 deletions(-) > > diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts > index 265978514dcf..9d9e50c77794 100644 > --- a/arch/arm/boot/dts/at91-sam9x60ek.dts > +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts > @@ -211,15 +211,10 @@ &flx0 { > status = "okay"; > > i2c0: i2c@600 { > - compatible = "microchip,sam9x60-i2c"; > - reg = <0x600 0x200>; > - interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; > #address-cells = <1>; > #size-cells = <0>; > - clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_flx0_default>; > - atmel,fifo-size = <16>; > i2c-analog-filter; > i2c-digital-filter; > i2c-digital-filter-width-ns = <35>; > @@ -239,16 +234,8 @@ &flx4 { > status = "disabled"; > > spi4: spi@400 { > - compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > - reg = <0x400 0x200>; > - interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > - clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; > - clock-names = "spi_clk"; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_flx4_default>; > - atmel,fifo-size = <16>; As mention in the previous version, this starting here > - #address-cells = <1>; > - #size-cells = <0>; ending here is not moved to dtsi but was just deleted. Please include it in another patch. Also, you will have to merge this patch with the next to have the components removed here still working in this patch. > status = "disabled"; > }; > }; > @@ -258,23 +245,8 @@ &flx5 { > status = "okay"; > > uart5: serial@200 { > - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; > - reg = <0x200 0x200>; > - atmel,usart-mode = <AT91_USART_MODE_SERIAL>; > - interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; > - dmas = <&dma0 > - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | > - AT91_XDMAC_DT_PERID(10))>, > - <&dma0 > - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | > - AT91_XDMAC_DT_PERID(11))>; > - dma-names = "tx", "rx"; > - clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; > - clock-names = "usart"; > - pinctrl-0 = <&pinctrl_flx5_default>; > pinctrl-names = "default"; > - atmel,use-dma-rx; > - atmel,use-dma-tx; > + pinctrl-0 = <&pinctrl_flx5_default>; > status = "okay"; > }; > }; > @@ -284,15 +256,10 @@ &flx6 { > status = "okay"; > > i2c6: i2c@600 { > - compatible = "microchip,sam9x60-i2c"; > - reg = <0x600 0x200>; > - interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; > #address-cells = <1>; > #size-cells = <0>; > - clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_flx6_default>; > - atmel,fifo-size = <16>; > i2c-analog-filter; > i2c-digital-filter; > i2c-digital-filter-width-ns = <35>; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 28+ messages in thread
[parent not found: <20221031033653.43269-4-durai.manickamkr@microchip.com>]
* Re: [PATCHv1 3/8] ARM: dts: at91: sam9x60: Add flexcom definitions [not found] ` <20221031033653.43269-4-durai.manickamkr@microchip.com> @ 2022-10-31 10:24 ` Claudiu.Beznea 2022-10-31 10:27 ` Claudiu.Beznea 2022-11-08 13:37 ` Nicolas Ferre 2 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:24 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > Add the flexcom definitions to the SoC specifc DTSI file. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com> > Signed-off-by: Manikandan M <manikandan.m@microchip.com> > --- > arch/arm/boot/dts/sam9x60.dtsi | 52 ++++++++++++++++++++++++++++++++-- > 1 file changed, 50 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi > index ef07d281a3db..fd4f5d43f7bb 100644 > --- a/arch/arm/boot/dts/sam9x60.dtsi > +++ b/arch/arm/boot/dts/sam9x60.dtsi > @@ -170,6 +170,16 @@ flx4: flexcom@f0000000 { > #size-cells = <1>; > ranges = <0x0 0xf0000000 0x800>; > status = "disabled"; > + > + spi4: spi@400 { > + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > + reg = <0x400 0x200>; > + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; > + clock-names = "spi_clk"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx5: flexcom@f0004000 { > @@ -180,6 +190,26 @@ flx5: flexcom@f0004000 { > #size-cells = <1>; > ranges = <0x0 0xf0004000 0x800>; > status = "disabled"; > + > + uart5: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(10))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(11))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + status = "disabled"; > + }; > }; > > dma0: dma-controller@f0008000 { > @@ -390,6 +420,15 @@ flx6: flexcom@f8010000 { > #size-cells = <1>; > ranges = <0x0 0xf8010000 0x800>; > status = "disabled"; > + > + i2c6: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx7: flexcom@f8014000 { > @@ -416,10 +455,19 @@ flx0: flexcom@f801c000 { > compatible = "atmel,sama5d2-flexcom"; > reg = <0xf801c000 0x200>; > clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > - #address-cells = <1>; > - #size-cells = <1>; As far as I can tell you will get compilation warning if removing these properties. > ranges = <0x0 0xf801c000 0x800>; > status = "disabled"; > + > + i2c0: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx1: flexcom@f8020000 { ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 3/8] ARM: dts: at91: sam9x60: Add flexcom definitions @ 2022-10-31 10:24 ` Claudiu.Beznea 0 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:24 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > Add the flexcom definitions to the SoC specifc DTSI file. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com> > Signed-off-by: Manikandan M <manikandan.m@microchip.com> > --- > arch/arm/boot/dts/sam9x60.dtsi | 52 ++++++++++++++++++++++++++++++++-- > 1 file changed, 50 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi > index ef07d281a3db..fd4f5d43f7bb 100644 > --- a/arch/arm/boot/dts/sam9x60.dtsi > +++ b/arch/arm/boot/dts/sam9x60.dtsi > @@ -170,6 +170,16 @@ flx4: flexcom@f0000000 { > #size-cells = <1>; > ranges = <0x0 0xf0000000 0x800>; > status = "disabled"; > + > + spi4: spi@400 { > + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > + reg = <0x400 0x200>; > + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; > + clock-names = "spi_clk"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx5: flexcom@f0004000 { > @@ -180,6 +190,26 @@ flx5: flexcom@f0004000 { > #size-cells = <1>; > ranges = <0x0 0xf0004000 0x800>; > status = "disabled"; > + > + uart5: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(10))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(11))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + status = "disabled"; > + }; > }; > > dma0: dma-controller@f0008000 { > @@ -390,6 +420,15 @@ flx6: flexcom@f8010000 { > #size-cells = <1>; > ranges = <0x0 0xf8010000 0x800>; > status = "disabled"; > + > + i2c6: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx7: flexcom@f8014000 { > @@ -416,10 +455,19 @@ flx0: flexcom@f801c000 { > compatible = "atmel,sama5d2-flexcom"; > reg = <0xf801c000 0x200>; > clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > - #address-cells = <1>; > - #size-cells = <1>; As far as I can tell you will get compilation warning if removing these properties. > ranges = <0x0 0xf801c000 0x800>; > status = "disabled"; > + > + i2c0: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx1: flexcom@f8020000 { _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 3/8] ARM: dts: at91: sam9x60: Add flexcom definitions [not found] ` <20221031033653.43269-4-durai.manickamkr@microchip.com> @ 2022-10-31 10:27 ` Claudiu.Beznea 2022-10-31 10:27 ` Claudiu.Beznea 2022-11-08 13:37 ` Nicolas Ferre 2 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:27 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > Add the flexcom definitions to the SoC specifc DTSI file. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com> > Signed-off-by: Manikandan M <manikandan.m@microchip.com> For a cleaner view you can use [] to specify each ones contribution. See https://www.kernel.org/doc/html/v4.12/process/submitting-patches.html#developer-s-certificate-of-origin-1-1 > --- > arch/arm/boot/dts/sam9x60.dtsi | 52 ++++++++++++++++++++++++++++++++-- > 1 file changed, 50 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi > index ef07d281a3db..fd4f5d43f7bb 100644 > --- a/arch/arm/boot/dts/sam9x60.dtsi > +++ b/arch/arm/boot/dts/sam9x60.dtsi > @@ -170,6 +170,16 @@ flx4: flexcom@f0000000 { > #size-cells = <1>; > ranges = <0x0 0xf0000000 0x800>; > status = "disabled"; > + > + spi4: spi@400 { > + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > + reg = <0x400 0x200>; > + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; > + clock-names = "spi_clk"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx5: flexcom@f0004000 { > @@ -180,6 +190,26 @@ flx5: flexcom@f0004000 { > #size-cells = <1>; > ranges = <0x0 0xf0004000 0x800>; > status = "disabled"; > + > + uart5: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(10))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(11))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + status = "disabled"; > + }; > }; > > dma0: dma-controller@f0008000 { > @@ -390,6 +420,15 @@ flx6: flexcom@f8010000 { > #size-cells = <1>; > ranges = <0x0 0xf8010000 0x800>; > status = "disabled"; > + > + i2c6: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx7: flexcom@f8014000 { > @@ -416,10 +455,19 @@ flx0: flexcom@f801c000 { > compatible = "atmel,sama5d2-flexcom"; > reg = <0xf801c000 0x200>; > clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > - #address-cells = <1>; > - #size-cells = <1>; > ranges = <0x0 0xf801c000 0x800>; > status = "disabled"; > + > + i2c0: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx1: flexcom@f8020000 { ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 3/8] ARM: dts: at91: sam9x60: Add flexcom definitions @ 2022-10-31 10:27 ` Claudiu.Beznea 0 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:27 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > Add the flexcom definitions to the SoC specifc DTSI file. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com> > Signed-off-by: Manikandan M <manikandan.m@microchip.com> For a cleaner view you can use [] to specify each ones contribution. See https://www.kernel.org/doc/html/v4.12/process/submitting-patches.html#developer-s-certificate-of-origin-1-1 > --- > arch/arm/boot/dts/sam9x60.dtsi | 52 ++++++++++++++++++++++++++++++++-- > 1 file changed, 50 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi > index ef07d281a3db..fd4f5d43f7bb 100644 > --- a/arch/arm/boot/dts/sam9x60.dtsi > +++ b/arch/arm/boot/dts/sam9x60.dtsi > @@ -170,6 +170,16 @@ flx4: flexcom@f0000000 { > #size-cells = <1>; > ranges = <0x0 0xf0000000 0x800>; > status = "disabled"; > + > + spi4: spi@400 { > + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > + reg = <0x400 0x200>; > + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; > + clock-names = "spi_clk"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx5: flexcom@f0004000 { > @@ -180,6 +190,26 @@ flx5: flexcom@f0004000 { > #size-cells = <1>; > ranges = <0x0 0xf0004000 0x800>; > status = "disabled"; > + > + uart5: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(10))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(11))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + status = "disabled"; > + }; > }; > > dma0: dma-controller@f0008000 { > @@ -390,6 +420,15 @@ flx6: flexcom@f8010000 { > #size-cells = <1>; > ranges = <0x0 0xf8010000 0x800>; > status = "disabled"; > + > + i2c6: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx7: flexcom@f8014000 { > @@ -416,10 +455,19 @@ flx0: flexcom@f801c000 { > compatible = "atmel,sama5d2-flexcom"; > reg = <0xf801c000 0x200>; > clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > - #address-cells = <1>; > - #size-cells = <1>; > ranges = <0x0 0xf801c000 0x800>; > status = "disabled"; > + > + i2c0: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx1: flexcom@f8020000 { _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 3/8] ARM: dts: at91: sam9x60: Add flexcom definitions [not found] ` <20221031033653.43269-4-durai.manickamkr@microchip.com> @ 2022-11-08 13:37 ` Nicolas Ferre 2022-10-31 10:27 ` Claudiu.Beznea 2022-11-08 13:37 ` Nicolas Ferre 2 siblings, 0 replies; 28+ messages in thread From: Nicolas Ferre @ 2022-11-08 13:37 UTC (permalink / raw) To: Durai Manickam KR, cristian.birsan, claudiu.beznea, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, manikandan.m, kavyasree.kotagiri, horatiu.vultur On 31/10/2022 at 04:36, Durai Manickam KR wrote: > Add the flexcom definitions to the SoC specifc DTSI file. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com> > Signed-off-by: Manikandan M <manikandan.m@microchip.com> > --- > arch/arm/boot/dts/sam9x60.dtsi | 52 ++++++++++++++++++++++++++++++++-- > 1 file changed, 50 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi > index ef07d281a3db..fd4f5d43f7bb 100644 > --- a/arch/arm/boot/dts/sam9x60.dtsi > +++ b/arch/arm/boot/dts/sam9x60.dtsi [..] > @@ -180,6 +190,26 @@ flx5: flexcom@f0004000 { > #size-cells = <1>; > ranges = <0x0 0xf0004000 0x800>; > status = "disabled"; > + > + uart5: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(10))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(11))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; Isn't "atmel,fifo-size = <16>;" missing in this added definition? > + status = "disabled"; > + }; > }; > > dma0: dma-controller@f0008000 { [..] Regards, Nicolas -- Nicolas Ferre ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 3/8] ARM: dts: at91: sam9x60: Add flexcom definitions @ 2022-11-08 13:37 ` Nicolas Ferre 0 siblings, 0 replies; 28+ messages in thread From: Nicolas Ferre @ 2022-11-08 13:37 UTC (permalink / raw) To: Durai Manickam KR, cristian.birsan, claudiu.beznea, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, manikandan.m, kavyasree.kotagiri, horatiu.vultur On 31/10/2022 at 04:36, Durai Manickam KR wrote: > Add the flexcom definitions to the SoC specifc DTSI file. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com> > Signed-off-by: Manikandan M <manikandan.m@microchip.com> > --- > arch/arm/boot/dts/sam9x60.dtsi | 52 ++++++++++++++++++++++++++++++++-- > 1 file changed, 50 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi > index ef07d281a3db..fd4f5d43f7bb 100644 > --- a/arch/arm/boot/dts/sam9x60.dtsi > +++ b/arch/arm/boot/dts/sam9x60.dtsi [..] > @@ -180,6 +190,26 @@ flx5: flexcom@f0004000 { > #size-cells = <1>; > ranges = <0x0 0xf0004000 0x800>; > status = "disabled"; > + > + uart5: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(10))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(11))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; Isn't "atmel,fifo-size = <16>;" missing in this added definition? > + status = "disabled"; > + }; > }; > > dma0: dma-controller@f0008000 { [..] Regards, Nicolas -- Nicolas Ferre _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 3/8] ARM: dts: at91: sam9x60: Add flexcom definitions 2022-11-08 13:37 ` Nicolas Ferre @ 2022-11-15 5:33 ` Durai.ManickamKR -1 siblings, 0 replies; 28+ messages in thread From: Durai.ManickamKR @ 2022-11-15 5:33 UTC (permalink / raw) To: Nicolas.Ferre, Cristian.Birsan, Claudiu.Beznea, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 08/11/22 19:07, Nicolas Ferre wrote: > On 31/10/2022 at 04:36, Durai Manickam KR wrote: >> Add the flexcom definitions to the SoC specifc DTSI file. >> >> Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> >> Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com> >> Signed-off-by: Manikandan M <manikandan.m@microchip.com> >> --- >> arch/arm/boot/dts/sam9x60.dtsi | 52 ++++++++++++++++++++++++++++++++-- >> 1 file changed, 50 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm/boot/dts/sam9x60.dtsi >> b/arch/arm/boot/dts/sam9x60.dtsi >> index ef07d281a3db..fd4f5d43f7bb 100644 >> --- a/arch/arm/boot/dts/sam9x60.dtsi >> +++ b/arch/arm/boot/dts/sam9x60.dtsi > > [..] > >> @@ -180,6 +190,26 @@ flx5: flexcom@f0004000 { >> #size-cells = <1>; >> ranges = <0x0 0xf0004000 0x800>; >> status = "disabled"; >> + >> + uart5: serial@200 { >> + compatible = "microchip,sam9x60-usart", >> "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(10))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(11))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; > > Isn't "atmel,fifo-size = <16>;" missing in this added definition? > Hi Nicolas, Yes you are right. It is added as separate patch in the same patch series. >> + status = "disabled"; >> + }; >> }; >> dma0: dma-controller@f0008000 { > > [..] > > Regards, > Nicolas > ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 3/8] ARM: dts: at91: sam9x60: Add flexcom definitions @ 2022-11-15 5:33 ` Durai.ManickamKR 0 siblings, 0 replies; 28+ messages in thread From: Durai.ManickamKR @ 2022-11-15 5:33 UTC (permalink / raw) To: Nicolas.Ferre, Cristian.Birsan, Claudiu.Beznea, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 08/11/22 19:07, Nicolas Ferre wrote: > On 31/10/2022 at 04:36, Durai Manickam KR wrote: >> Add the flexcom definitions to the SoC specifc DTSI file. >> >> Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> >> Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com> >> Signed-off-by: Manikandan M <manikandan.m@microchip.com> >> --- >> arch/arm/boot/dts/sam9x60.dtsi | 52 ++++++++++++++++++++++++++++++++-- >> 1 file changed, 50 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm/boot/dts/sam9x60.dtsi >> b/arch/arm/boot/dts/sam9x60.dtsi >> index ef07d281a3db..fd4f5d43f7bb 100644 >> --- a/arch/arm/boot/dts/sam9x60.dtsi >> +++ b/arch/arm/boot/dts/sam9x60.dtsi > > [..] > >> @@ -180,6 +190,26 @@ flx5: flexcom@f0004000 { >> #size-cells = <1>; >> ranges = <0x0 0xf0004000 0x800>; >> status = "disabled"; >> + >> + uart5: serial@200 { >> + compatible = "microchip,sam9x60-usart", >> "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(10))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(11))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; > > Isn't "atmel,fifo-size = <16>;" missing in this added definition? > Hi Nicolas, Yes you are right. It is added as separate patch in the same patch series. >> + status = "disabled"; >> + }; >> }; >> dma0: dma-controller@f0008000 { > > [..] > > Regards, > Nicolas > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 28+ messages in thread
[parent not found: <20221031033653.43269-7-durai.manickamkr@microchip.com>]
* Re: [PATCHv1 6/8] ARM: dts: at91: sam9x60: Add missing flexcom definitions [not found] ` <20221031033653.43269-7-durai.manickamkr@microchip.com> @ 2022-10-31 10:28 ` Claudiu.Beznea 0 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:28 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > Added the missing flexcom functions for all the flexcom nodes. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com> > Signed-off-by: Manikandan M <manikandan.m@microchip.com> > --- > arch/arm/boot/dts/sam9x60.dtsi | 547 +++++++++++++++++++++++++++++++++ > 1 file changed, 547 insertions(+) > > diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi > index 74599d21ebcc..4902a2e5fc21 100644 > --- a/arch/arm/boot/dts/sam9x60.dtsi > +++ b/arch/arm/boot/dts/sam9x60.dtsi > @@ -171,6 +171,27 @@ flx4: flexcom@f0000000 { > ranges = <0x0 0xf0000000 0x800>; > status = "disabled"; > > + uart4: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(8))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(9))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > spi4: spi@400 { > compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > reg = <0x400 0x200>; > @@ -189,6 +210,24 @@ AT91_XDMAC_DT_PER_IF(1) | > atmel,fifo-size = <16>; > status = "disabled"; > }; > + > + i2c4: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(8))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(9))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx5: flexcom@f0004000 { > @@ -220,6 +259,43 @@ AT91_XDMAC_DT_PER_IF(1) | > atmel,fifo-size = <16>; > status = "disabled"; > }; > + > + spi5: spi@400 { > + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > + reg = <0x400 0x200>; > + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; > + clock-names = "spi_clk"; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(10))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(11))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c5: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(10))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(11))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > dma0: dma-controller@f0008000 { > @@ -302,6 +378,45 @@ flx11: flexcom@f0020000 { > #size-cells = <1>; > ranges = <0x0 0xf0020000 0x800>; > status = "disabled"; > + > + uart11: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(22))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(23))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 32>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c11: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 32>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(22))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(23))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx12: flexcom@f0024000 { > @@ -312,6 +427,45 @@ flx12: flexcom@f0024000 { > #size-cells = <1>; > ranges = <0x0 0xf0024000 0x800>; > status = "disabled"; > + > + uart12: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(24))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(25))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 33>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c12: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 33>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(24))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(25))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > pit64b: timer@f0028000 { > @@ -431,6 +585,27 @@ flx6: flexcom@f8010000 { > ranges = <0x0 0xf8010000 0x800>; > status = "disabled"; > > + uart6: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(12))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(13))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > i2c6: i2c@600 { > compatible = "microchip,sam9x60-i2c"; > reg = <0x600 0x200>; > @@ -458,6 +633,45 @@ flx7: flexcom@f8014000 { > #size-cells = <1>; > ranges = <0x0 0xf8014000 0x800>; > status = "disabled"; > + > + uart7: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(14))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(15))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c7: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(14))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(15))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx8: flexcom@f8018000 { > @@ -468,15 +682,96 @@ flx8: flexcom@f8018000 { > #size-cells = <1>; > ranges = <0x0 0xf8018000 0x800>; > status = "disabled"; > + > + uart8: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(16))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(17))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c8: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(16))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(17))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx0: flexcom@f801c000 { > compatible = "atmel,sama5d2-flexcom"; > reg = <0xf801c000 0x200>; > clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > + #address-cells = <1>; > + #size-cells = <1>; This should go in a different patch. Appart from that some flexcom nodes don't have all the subnodes added but only a part of them. Is this by intention? > ranges = <0x0 0xf801c000 0x800>; > status = "disabled"; > > + uart0: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(0))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(1))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + spi0: spi@400 { > + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > + reg = <0x400 0x200>; > + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > + clock-names = "spi_clk"; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(0))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(1))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > i2c0: i2c@600 { > compatible = "microchip,sam9x60-i2c"; > reg = <0x600 0x200>; > @@ -506,6 +801,64 @@ flx1: flexcom@f8020000 { > #size-cells = <1>; > ranges = <0x0 0xf8020000 0x800>; > status = "disabled"; > + > + uart1: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(2))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(3))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + spi1: spi@400 { > + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > + reg = <0x400 0x200>; > + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; > + clock-names = "spi_clk"; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(2))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(3))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c1: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(2))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(3))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx2: flexcom@f8024000 { > @@ -516,6 +869,64 @@ flx2: flexcom@f8024000 { > #size-cells = <1>; > ranges = <0x0 0xf8024000 0x800>; > status = "disabled"; > + > + uart2: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(4))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(5))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + spi2: spi@400 { > + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > + reg = <0x400 0x200>; > + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; > + clock-names = "spi_clk"; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(4))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(5))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c2: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(4))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(5))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx3: flexcom@f8028000 { > @@ -526,6 +937,64 @@ flx3: flexcom@f8028000 { > #size-cells = <1>; > ranges = <0x0 0xf8028000 0x800>; > status = "disabled"; > + > + uart3: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(6))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(7))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + spi3: spi@400 { > + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > + reg = <0x400 0x200>; > + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; > + clock-names = "spi_clk"; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(6))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(7))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c3: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(6))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(7))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > macb0: ethernet@f802c000 { > @@ -591,6 +1060,45 @@ flx9: flexcom@f8040000 { > #size-cells = <1>; > ranges = <0x0 0xf8040000 0x800>; > status = "disabled"; > + > + uart9: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(18))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(19))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c9: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(18))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(19))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx10: flexcom@f8044000 { > @@ -601,6 +1109,45 @@ flx10: flexcom@f8044000 { > #size-cells = <1>; > ranges = <0x0 0xf8044000 0x800>; > status = "disabled"; > + > + uart10: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(20))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(21))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c10: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(20))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(21))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > isi: isi@f8048000 { ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 6/8] ARM: dts: at91: sam9x60: Add missing flexcom definitions @ 2022-10-31 10:28 ` Claudiu.Beznea 0 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:28 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > Added the missing flexcom functions for all the flexcom nodes. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com> > Signed-off-by: Manikandan M <manikandan.m@microchip.com> > --- > arch/arm/boot/dts/sam9x60.dtsi | 547 +++++++++++++++++++++++++++++++++ > 1 file changed, 547 insertions(+) > > diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi > index 74599d21ebcc..4902a2e5fc21 100644 > --- a/arch/arm/boot/dts/sam9x60.dtsi > +++ b/arch/arm/boot/dts/sam9x60.dtsi > @@ -171,6 +171,27 @@ flx4: flexcom@f0000000 { > ranges = <0x0 0xf0000000 0x800>; > status = "disabled"; > > + uart4: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(8))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(9))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > spi4: spi@400 { > compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > reg = <0x400 0x200>; > @@ -189,6 +210,24 @@ AT91_XDMAC_DT_PER_IF(1) | > atmel,fifo-size = <16>; > status = "disabled"; > }; > + > + i2c4: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(8))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(9))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx5: flexcom@f0004000 { > @@ -220,6 +259,43 @@ AT91_XDMAC_DT_PER_IF(1) | > atmel,fifo-size = <16>; > status = "disabled"; > }; > + > + spi5: spi@400 { > + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > + reg = <0x400 0x200>; > + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; > + clock-names = "spi_clk"; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(10))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(11))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c5: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(10))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(11))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > dma0: dma-controller@f0008000 { > @@ -302,6 +378,45 @@ flx11: flexcom@f0020000 { > #size-cells = <1>; > ranges = <0x0 0xf0020000 0x800>; > status = "disabled"; > + > + uart11: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(22))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(23))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 32>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c11: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 32>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(22))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(23))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx12: flexcom@f0024000 { > @@ -312,6 +427,45 @@ flx12: flexcom@f0024000 { > #size-cells = <1>; > ranges = <0x0 0xf0024000 0x800>; > status = "disabled"; > + > + uart12: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(24))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(25))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 33>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c12: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 33>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(24))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(25))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > pit64b: timer@f0028000 { > @@ -431,6 +585,27 @@ flx6: flexcom@f8010000 { > ranges = <0x0 0xf8010000 0x800>; > status = "disabled"; > > + uart6: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(12))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(13))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > i2c6: i2c@600 { > compatible = "microchip,sam9x60-i2c"; > reg = <0x600 0x200>; > @@ -458,6 +633,45 @@ flx7: flexcom@f8014000 { > #size-cells = <1>; > ranges = <0x0 0xf8014000 0x800>; > status = "disabled"; > + > + uart7: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(14))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(15))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c7: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(14))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(15))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx8: flexcom@f8018000 { > @@ -468,15 +682,96 @@ flx8: flexcom@f8018000 { > #size-cells = <1>; > ranges = <0x0 0xf8018000 0x800>; > status = "disabled"; > + > + uart8: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(16))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(17))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c8: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(16))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(17))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx0: flexcom@f801c000 { > compatible = "atmel,sama5d2-flexcom"; > reg = <0xf801c000 0x200>; > clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > + #address-cells = <1>; > + #size-cells = <1>; This should go in a different patch. Appart from that some flexcom nodes don't have all the subnodes added but only a part of them. Is this by intention? > ranges = <0x0 0xf801c000 0x800>; > status = "disabled"; > > + uart0: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(0))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(1))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + spi0: spi@400 { > + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > + reg = <0x400 0x200>; > + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; > + clock-names = "spi_clk"; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(0))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(1))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > i2c0: i2c@600 { > compatible = "microchip,sam9x60-i2c"; > reg = <0x600 0x200>; > @@ -506,6 +801,64 @@ flx1: flexcom@f8020000 { > #size-cells = <1>; > ranges = <0x0 0xf8020000 0x800>; > status = "disabled"; > + > + uart1: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(2))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(3))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + spi1: spi@400 { > + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > + reg = <0x400 0x200>; > + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; > + clock-names = "spi_clk"; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(2))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(3))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c1: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(2))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(3))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx2: flexcom@f8024000 { > @@ -516,6 +869,64 @@ flx2: flexcom@f8024000 { > #size-cells = <1>; > ranges = <0x0 0xf8024000 0x800>; > status = "disabled"; > + > + uart2: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(4))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(5))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + spi2: spi@400 { > + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > + reg = <0x400 0x200>; > + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; > + clock-names = "spi_clk"; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(4))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(5))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c2: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(4))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(5))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx3: flexcom@f8028000 { > @@ -526,6 +937,64 @@ flx3: flexcom@f8028000 { > #size-cells = <1>; > ranges = <0x0 0xf8028000 0x800>; > status = "disabled"; > + > + uart3: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(6))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(7))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + spi3: spi@400 { > + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; > + reg = <0x400 0x200>; > + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; > + clock-names = "spi_clk"; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(6))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(7))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c3: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(6))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(7))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > macb0: ethernet@f802c000 { > @@ -591,6 +1060,45 @@ flx9: flexcom@f8040000 { > #size-cells = <1>; > ranges = <0x0 0xf8040000 0x800>; > status = "disabled"; > + > + uart9: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(18))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(19))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c9: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(18))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(19))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > flx10: flexcom@f8044000 { > @@ -601,6 +1109,45 @@ flx10: flexcom@f8044000 { > #size-cells = <1>; > ranges = <0x0 0xf8044000 0x800>; > status = "disabled"; > + > + uart10: serial@200 { > + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > + reg = <0x200 0x200>; > + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(20))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(21))>; > + dma-names = "tx", "rx"; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; > + clock-names = "usart"; > + atmel,use-dma-rx; > + atmel,use-dma-tx; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > + > + i2c10: i2c@600 { > + compatible = "microchip,sam9x60-i2c"; > + reg = <0x600 0x200>; > + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; > + dmas = <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(20))>, > + <&dma0 > + (AT91_XDMAC_DT_MEM_IF(0) | > + AT91_XDMAC_DT_PER_IF(1) | > + AT91_XDMAC_DT_PERID(21))>; > + dma-names = "tx", "rx"; > + atmel,fifo-size = <16>; > + status = "disabled"; > + }; > }; > > isi: isi@f8048000 { _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 6/8] ARM: dts: at91: sam9x60: Add missing flexcom definitions 2022-10-31 10:28 ` Claudiu.Beznea @ 2022-11-15 5:40 ` Durai.ManickamKR -1 siblings, 0 replies; 28+ messages in thread From: Durai.ManickamKR @ 2022-11-15 5:40 UTC (permalink / raw) To: Claudiu.Beznea, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31/10/22 15:58, Claudiu Beznea - M18063 wrote: > On 31.10.2022 05:36, Durai Manickam KR wrote: >> Added the missing flexcom functions for all the flexcom nodes. >> >> Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> >> Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com> >> Signed-off-by: Manikandan M <manikandan.m@microchip.com> >> --- >> arch/arm/boot/dts/sam9x60.dtsi | 547 +++++++++++++++++++++++++++++++++ >> 1 file changed, 547 insertions(+) >> >> diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi >> index 74599d21ebcc..4902a2e5fc21 100644 >> --- a/arch/arm/boot/dts/sam9x60.dtsi >> +++ b/arch/arm/boot/dts/sam9x60.dtsi >> @@ -171,6 +171,27 @@ flx4: flexcom@f0000000 { >> ranges = <0x0 0xf0000000 0x800>; >> status = "disabled"; >> >> + uart4: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(8))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(9))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> spi4: spi@400 { >> compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; >> reg = <0x400 0x200>; >> @@ -189,6 +210,24 @@ AT91_XDMAC_DT_PER_IF(1) | >> atmel,fifo-size = <16>; >> status = "disabled"; >> }; >> + >> + i2c4: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(8))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(9))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> flx5: flexcom@f0004000 { >> @@ -220,6 +259,43 @@ AT91_XDMAC_DT_PER_IF(1) | >> atmel,fifo-size = <16>; >> status = "disabled"; >> }; >> + >> + spi5: spi@400 { >> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; >> + reg = <0x400 0x200>; >> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; >> + clock-names = "spi_clk"; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(10))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(11))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c5: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(10))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(11))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> dma0: dma-controller@f0008000 { >> @@ -302,6 +378,45 @@ flx11: flexcom@f0020000 { >> #size-cells = <1>; >> ranges = <0x0 0xf0020000 0x800>; >> status = "disabled"; >> + >> + uart11: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(22))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(23))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 32>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c11: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 32>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(22))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(23))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> flx12: flexcom@f0024000 { >> @@ -312,6 +427,45 @@ flx12: flexcom@f0024000 { >> #size-cells = <1>; >> ranges = <0x0 0xf0024000 0x800>; >> status = "disabled"; >> + >> + uart12: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(24))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(25))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 33>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c12: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 33>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(24))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(25))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> pit64b: timer@f0028000 { >> @@ -431,6 +585,27 @@ flx6: flexcom@f8010000 { >> ranges = <0x0 0xf8010000 0x800>; >> status = "disabled"; >> >> + uart6: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(12))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(13))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> i2c6: i2c@600 { >> compatible = "microchip,sam9x60-i2c"; >> reg = <0x600 0x200>; >> @@ -458,6 +633,45 @@ flx7: flexcom@f8014000 { >> #size-cells = <1>; >> ranges = <0x0 0xf8014000 0x800>; >> status = "disabled"; >> + >> + uart7: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(14))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(15))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c7: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(14))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(15))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> flx8: flexcom@f8018000 { >> @@ -468,15 +682,96 @@ flx8: flexcom@f8018000 { >> #size-cells = <1>; >> ranges = <0x0 0xf8018000 0x800>; >> status = "disabled"; >> + >> + uart8: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(16))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(17))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c8: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(16))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(17))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> flx0: flexcom@f801c000 { >> compatible = "atmel,sama5d2-flexcom"; >> reg = <0xf801c000 0x200>; >> clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; >> + #address-cells = <1>; >> + #size-cells = <1>; > This should go in a different patch. > > Appart from that some flexcom nodes don't have all the subnodes added but > only a part of them. Is this by intention? Hi Claudiu, Some of the flexcom nodes does not have all the controller like UART, I2C and SPI. So referring the datasheet we have added all the available nodes for the flexcom. > >> ranges = <0x0 0xf801c000 0x800>; >> status = "disabled"; >> >> + uart0: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(0))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(1))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + spi0: spi@400 { >> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; >> + reg = <0x400 0x200>; >> + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; >> + clock-names = "spi_clk"; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(0))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(1))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> i2c0: i2c@600 { >> compatible = "microchip,sam9x60-i2c"; >> reg = <0x600 0x200>; >> @@ -506,6 +801,64 @@ flx1: flexcom@f8020000 { >> #size-cells = <1>; >> ranges = <0x0 0xf8020000 0x800>; >> status = "disabled"; >> + >> + uart1: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(2))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(3))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + spi1: spi@400 { >> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; >> + reg = <0x400 0x200>; >> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; >> + clock-names = "spi_clk"; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(2))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(3))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c1: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(2))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(3))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> flx2: flexcom@f8024000 { >> @@ -516,6 +869,64 @@ flx2: flexcom@f8024000 { >> #size-cells = <1>; >> ranges = <0x0 0xf8024000 0x800>; >> status = "disabled"; >> + >> + uart2: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(4))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(5))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + spi2: spi@400 { >> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; >> + reg = <0x400 0x200>; >> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; >> + clock-names = "spi_clk"; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(4))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(5))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c2: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(4))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(5))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> flx3: flexcom@f8028000 { >> @@ -526,6 +937,64 @@ flx3: flexcom@f8028000 { >> #size-cells = <1>; >> ranges = <0x0 0xf8028000 0x800>; >> status = "disabled"; >> + >> + uart3: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(6))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(7))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + spi3: spi@400 { >> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; >> + reg = <0x400 0x200>; >> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; >> + clock-names = "spi_clk"; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(6))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(7))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c3: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(6))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(7))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> macb0: ethernet@f802c000 { >> @@ -591,6 +1060,45 @@ flx9: flexcom@f8040000 { >> #size-cells = <1>; >> ranges = <0x0 0xf8040000 0x800>; >> status = "disabled"; >> + >> + uart9: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(18))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(19))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c9: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(18))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(19))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> flx10: flexcom@f8044000 { >> @@ -601,6 +1109,45 @@ flx10: flexcom@f8044000 { >> #size-cells = <1>; >> ranges = <0x0 0xf8044000 0x800>; >> status = "disabled"; >> + >> + uart10: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(20))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(21))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c10: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(20))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(21))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> isi: isi@f8048000 { ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 6/8] ARM: dts: at91: sam9x60: Add missing flexcom definitions @ 2022-11-15 5:40 ` Durai.ManickamKR 0 siblings, 0 replies; 28+ messages in thread From: Durai.ManickamKR @ 2022-11-15 5:40 UTC (permalink / raw) To: Claudiu.Beznea, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31/10/22 15:58, Claudiu Beznea - M18063 wrote: > On 31.10.2022 05:36, Durai Manickam KR wrote: >> Added the missing flexcom functions for all the flexcom nodes. >> >> Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> >> Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com> >> Signed-off-by: Manikandan M <manikandan.m@microchip.com> >> --- >> arch/arm/boot/dts/sam9x60.dtsi | 547 +++++++++++++++++++++++++++++++++ >> 1 file changed, 547 insertions(+) >> >> diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi >> index 74599d21ebcc..4902a2e5fc21 100644 >> --- a/arch/arm/boot/dts/sam9x60.dtsi >> +++ b/arch/arm/boot/dts/sam9x60.dtsi >> @@ -171,6 +171,27 @@ flx4: flexcom@f0000000 { >> ranges = <0x0 0xf0000000 0x800>; >> status = "disabled"; >> >> + uart4: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(8))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(9))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> spi4: spi@400 { >> compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; >> reg = <0x400 0x200>; >> @@ -189,6 +210,24 @@ AT91_XDMAC_DT_PER_IF(1) | >> atmel,fifo-size = <16>; >> status = "disabled"; >> }; >> + >> + i2c4: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(8))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(9))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> flx5: flexcom@f0004000 { >> @@ -220,6 +259,43 @@ AT91_XDMAC_DT_PER_IF(1) | >> atmel,fifo-size = <16>; >> status = "disabled"; >> }; >> + >> + spi5: spi@400 { >> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; >> + reg = <0x400 0x200>; >> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; >> + clock-names = "spi_clk"; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(10))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(11))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c5: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(10))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(11))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> dma0: dma-controller@f0008000 { >> @@ -302,6 +378,45 @@ flx11: flexcom@f0020000 { >> #size-cells = <1>; >> ranges = <0x0 0xf0020000 0x800>; >> status = "disabled"; >> + >> + uart11: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(22))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(23))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 32>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c11: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 32>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(22))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(23))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> flx12: flexcom@f0024000 { >> @@ -312,6 +427,45 @@ flx12: flexcom@f0024000 { >> #size-cells = <1>; >> ranges = <0x0 0xf0024000 0x800>; >> status = "disabled"; >> + >> + uart12: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(24))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(25))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 33>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c12: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 33>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(24))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(25))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> pit64b: timer@f0028000 { >> @@ -431,6 +585,27 @@ flx6: flexcom@f8010000 { >> ranges = <0x0 0xf8010000 0x800>; >> status = "disabled"; >> >> + uart6: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(12))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(13))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> i2c6: i2c@600 { >> compatible = "microchip,sam9x60-i2c"; >> reg = <0x600 0x200>; >> @@ -458,6 +633,45 @@ flx7: flexcom@f8014000 { >> #size-cells = <1>; >> ranges = <0x0 0xf8014000 0x800>; >> status = "disabled"; >> + >> + uart7: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(14))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(15))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c7: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(14))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(15))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> flx8: flexcom@f8018000 { >> @@ -468,15 +682,96 @@ flx8: flexcom@f8018000 { >> #size-cells = <1>; >> ranges = <0x0 0xf8018000 0x800>; >> status = "disabled"; >> + >> + uart8: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(16))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(17))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c8: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(16))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(17))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> flx0: flexcom@f801c000 { >> compatible = "atmel,sama5d2-flexcom"; >> reg = <0xf801c000 0x200>; >> clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; >> + #address-cells = <1>; >> + #size-cells = <1>; > This should go in a different patch. > > Appart from that some flexcom nodes don't have all the subnodes added but > only a part of them. Is this by intention? Hi Claudiu, Some of the flexcom nodes does not have all the controller like UART, I2C and SPI. So referring the datasheet we have added all the available nodes for the flexcom. > >> ranges = <0x0 0xf801c000 0x800>; >> status = "disabled"; >> >> + uart0: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(0))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(1))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + spi0: spi@400 { >> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; >> + reg = <0x400 0x200>; >> + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; >> + clock-names = "spi_clk"; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(0))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(1))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> i2c0: i2c@600 { >> compatible = "microchip,sam9x60-i2c"; >> reg = <0x600 0x200>; >> @@ -506,6 +801,64 @@ flx1: flexcom@f8020000 { >> #size-cells = <1>; >> ranges = <0x0 0xf8020000 0x800>; >> status = "disabled"; >> + >> + uart1: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(2))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(3))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + spi1: spi@400 { >> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; >> + reg = <0x400 0x200>; >> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; >> + clock-names = "spi_clk"; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(2))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(3))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c1: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(2))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(3))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> flx2: flexcom@f8024000 { >> @@ -516,6 +869,64 @@ flx2: flexcom@f8024000 { >> #size-cells = <1>; >> ranges = <0x0 0xf8024000 0x800>; >> status = "disabled"; >> + >> + uart2: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(4))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(5))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + spi2: spi@400 { >> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; >> + reg = <0x400 0x200>; >> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; >> + clock-names = "spi_clk"; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(4))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(5))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c2: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(4))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(5))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> flx3: flexcom@f8028000 { >> @@ -526,6 +937,64 @@ flx3: flexcom@f8028000 { >> #size-cells = <1>; >> ranges = <0x0 0xf8028000 0x800>; >> status = "disabled"; >> + >> + uart3: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(6))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(7))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + spi3: spi@400 { >> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; >> + reg = <0x400 0x200>; >> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; >> + clock-names = "spi_clk"; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(6))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(7))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c3: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(6))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(7))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> macb0: ethernet@f802c000 { >> @@ -591,6 +1060,45 @@ flx9: flexcom@f8040000 { >> #size-cells = <1>; >> ranges = <0x0 0xf8040000 0x800>; >> status = "disabled"; >> + >> + uart9: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(18))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(19))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c9: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(18))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(19))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> flx10: flexcom@f8044000 { >> @@ -601,6 +1109,45 @@ flx10: flexcom@f8044000 { >> #size-cells = <1>; >> ranges = <0x0 0xf8044000 0x800>; >> status = "disabled"; >> + >> + uart10: serial@200 { >> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; >> + reg = <0x200 0x200>; >> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(20))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(21))>; >> + dma-names = "tx", "rx"; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; >> + clock-names = "usart"; >> + atmel,use-dma-rx; >> + atmel,use-dma-tx; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> + >> + i2c10: i2c@600 { >> + compatible = "microchip,sam9x60-i2c"; >> + reg = <0x600 0x200>; >> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>; >> + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; >> + dmas = <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(20))>, >> + <&dma0 >> + (AT91_XDMAC_DT_MEM_IF(0) | >> + AT91_XDMAC_DT_PER_IF(1) | >> + AT91_XDMAC_DT_PERID(21))>; >> + dma-names = "tx", "rx"; >> + atmel,fifo-size = <16>; >> + status = "disabled"; >> + }; >> }; >> >> isi: isi@f8048000 { _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 28+ messages in thread
[parent not found: <20221031033653.43269-8-durai.manickamkr@microchip.com>]
* Re: [PATCHv1 7/8] dt-bindings: arm: at91: Add info on SAM9X60-CURIOSITY [not found] ` <20221031033653.43269-8-durai.manickamkr@microchip.com> @ 2022-10-31 10:29 ` Claudiu.Beznea 0 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:29 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > Adding the SAM9X60-CURIOSITY board from Microchip into the atmel AT91 board > description yaml file. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > --- > Documentation/devicetree/bindings/arm/atmel-at91.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml > index 9e2e66a7566d..2c53b2c008c5 100644 > --- a/Documentation/devicetree/bindings/arm/atmel-at91.yaml > +++ b/Documentation/devicetree/bindings/arm/atmel-at91.yaml > @@ -97,6 +97,12 @@ properties: > - const: microchip,sam9x60 > - const: atmel,at91sam9 > > + - description: SAM9X60 Curiosity board > + items: > + - const: microchip,sam9x60-curiosity > + - const: microchip,sam9x60 > + - const: atmel,at91sam9 > + Please check and address Krystztof's reply from previous version. > - description: Nattis v2 board with Natte v2 power board > items: > - const: axentia,nattis-2 ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 7/8] dt-bindings: arm: at91: Add info on SAM9X60-CURIOSITY @ 2022-10-31 10:29 ` Claudiu.Beznea 0 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:29 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur On 31.10.2022 05:36, Durai Manickam KR wrote: > Adding the SAM9X60-CURIOSITY board from Microchip into the atmel AT91 board > description yaml file. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > --- > Documentation/devicetree/bindings/arm/atmel-at91.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml > index 9e2e66a7566d..2c53b2c008c5 100644 > --- a/Documentation/devicetree/bindings/arm/atmel-at91.yaml > +++ b/Documentation/devicetree/bindings/arm/atmel-at91.yaml > @@ -97,6 +97,12 @@ properties: > - const: microchip,sam9x60 > - const: atmel,at91sam9 > > + - description: SAM9X60 Curiosity board > + items: > + - const: microchip,sam9x60-curiosity > + - const: microchip,sam9x60 > + - const: atmel,at91sam9 > + Please check and address Krystztof's reply from previous version. > - description: Nattis v2 board with Natte v2 power board > items: > - const: axentia,nattis-2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 28+ messages in thread
[parent not found: <20221031033653.43269-9-durai.manickamkr@microchip.com>]
* Re: [PATCHv1 8/8] ARM: dts: at91: sam9x60_curiosity: Add device tree for sam9x60_curiosity board [not found] ` <20221031033653.43269-9-durai.manickamkr@microchip.com> @ 2022-10-31 10:29 ` Claudiu.Beznea 0 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:29 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur Please address all the comments you've got on the previous version or at least reply to email to sustain your solution. On 31.10.2022 05:36, Durai Manickam KR wrote: > Add device tree file for sam9x60_curiosity board. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > --- > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/at91-sam9x60_curiosity.dts | 519 +++++++++++++++++++ > 2 files changed, 520 insertions(+) > create mode 100644 arch/arm/boot/dts/at91-sam9x60_curiosity.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 98ffdf299809..9f6aa408cd15 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -51,6 +51,7 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \ > at91sam9x25ek.dtb \ > at91sam9x35ek.dtb > dtb-$(CONFIG_SOC_SAM9X60) += \ > + at91-sam9x60_curiosity.dtb \ > at91-sam9x60ek.dtb > dtb-$(CONFIG_SOC_SAM_V7) += \ > at91-kizbox2-2.dtb \ > diff --git a/arch/arm/boot/dts/at91-sam9x60_curiosity.dts b/arch/arm/boot/dts/at91-sam9x60_curiosity.dts > new file mode 100644 > index 000000000000..2b3163bf6910 > --- /dev/null > +++ b/arch/arm/boot/dts/at91-sam9x60_curiosity.dts > @@ -0,0 +1,519 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * at91-sam9x60_curiosity.dts - Device Tree file for Microchip SAM9X60 CURIOSITY board > + * > + * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries > + * > + * Author: Manikandan M <manikandan.m@microchip.com> > + */ > +/dts-v1/; > +#include "sam9x60.dtsi" > +#include <dt-bindings/input/input.h> > + > +/ { > + model = "Microchip SAM9X60 CURIOSITY"; > + compatible = "microchip,sam9x60-curiosity", "microchip,sam9x60", "atmel,at91sam9"; > + > + aliases { > + i2c0 = &i2c0; > + i2c1 = &i2c6; > + serial2 = &uart7; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + memory@20000000 { > + reg = <0x20000000 0x8000000>; > + }; > + > + clocks { > + slow_xtal { > + clock-frequency = <32768>; > + }; > + > + main_xtal { > + clock-frequency = <24000000>; > + }; > + }; > + > + gpio-keys { > + compatible = "gpio-keys"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_key_gpio_default>; > + > + button-user { > + label = "PB_USER"; > + gpios = <&pioA 29 GPIO_ACTIVE_LOW>; > + linux,code = <KEY_PROG1>; > + wakeup-source; > + }; > + }; > + > + leds { > + compatible = "gpio-leds"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_gpio_leds>; > + > + red { > + label = "red"; > + gpios = <&pioD 17 GPIO_ACTIVE_HIGH>; > + }; > + > + green { > + label = "green"; > + gpios = <&pioD 19 GPIO_ACTIVE_HIGH>; > + }; > + > + blue { > + label = "blue"; > + gpios = <&pioD 21 GPIO_ACTIVE_HIGH>; > + linux,default-trigger = "heartbeat"; > + }; > + }; > + > + > + vdd_1v8: regulator-0 { > + compatible = "regulator-fixed"; > + regulator-name = "VDD_1V8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + vdd_1v15: regulator-1 { > + compatible = "regulator-fixed"; > + regulator-name = "VDD_1V15"; > + regulator-min-microvolt = <1150000>; > + regulator-max-microvolt = <1150000>; > + regulator-always-on; > + }; > + > + vdd1_3v3: regulator-2 { > + compatible = "regulator-fixed"; > + regulator-name = "VDD1_3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + }; > +}; > + > +&adc { > + vddana-supply = <&vdd1_3v3>; > + vref-supply = <&vdd1_3v3>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>; > + status = "okay"; > +}; > + > +&can0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_can0_rx_tx>; > + status = "disabled"; /* Conflict with dbgu. */ > +}; > + > +&can1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_can1_rx_tx>; > + status = "okay"; > +}; > + > +&dbgu { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_dbgu>; > + status = "okay"; /* Conflict with can0. */ > +}; > + > +&ebi { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_ebi_addr_nand &pinctrl_ebi_data_0_7>; > + status = "okay"; > + > + nand_controller: nand-controller { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_nand_oe_we &pinctrl_nand_cs &pinctrl_nand_rb>; > + status = "okay"; > + > + nand@3 { > + reg = <0x3 0x0 0x800000>; > + rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>; > + cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>; > + nand-bus-width = <8>; > + nand-ecc-mode = "hw"; > + nand-ecc-strength = <8>; > + nand-ecc-step-size = <512>; > + nand-on-flash-bbt; > + label = "atmel_nand"; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + at91bootstrap@0 { > + label = "at91bootstrap"; > + reg = <0x0 0x40000>; > + }; > + > + uboot@40000 { > + label = "u-boot"; > + reg = <0x40000 0xc0000>; > + }; > + > + ubootenvred@100000 { > + label = "U-Boot Env Redundant"; > + reg = <0x100000 0x40000>; > + }; > + > + ubootenv@140000 { > + label = "U-Boot Env"; > + reg = <0x140000 0x40000>; > + }; > + > + dtb@180000 { > + label = "device tree"; > + reg = <0x180000 0x80000>; > + }; > + > + kernel@200000 { > + label = "kernel"; > + reg = <0x200000 0x600000>; > + }; > + > + rootfs@800000 { > + label = "rootfs"; > + reg = <0x800000 0x1f800000>; > + }; > + }; > + }; > + }; > +}; > + > +&flx0 { > + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; > + status = "okay"; > + > + i2c0: i2c@600 { > + dmas = <0>, <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_flx0_default>; > + i2c-analog-filter; > + i2c-digital-filter; > + i2c-digital-filter-width-ns = <35>; > + status = "okay"; > + > + eeprom@53 { > + compatible = "atmel,24c02"; > + reg = <0x53>; > + pagesize = <16>; > + }; > + }; > +}; > + > +&flx6 { > + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; > + status = "okay"; > + > + i2c6: i2c@600 { > + dmas = <0>, <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_flx6_default>; > + i2c-analog-filter; > + i2c-digital-filter; > + i2c-digital-filter-width-ns = <35>; > + status = "disabled"; > + }; > +}; > + > +&flx7 { > + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; > + status = "okay"; > + > + uart7: serial@200 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_flx7_default>; > + status = "okay"; > + }; > +}; > + > +&macb0 { > + phy-mode = "rmii"; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_macb0_rmii>; > + status = "okay"; > + > + ethernet-phy@0 { > + reg = <0x0>; > + }; > +}; > + > +&pinctrl { > + adc { > + pinctrl_adc_default: adc-default { > + atmel,pins = <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; > + }; > + > + pinctrl_adtrg_default: adtrg-default { > + atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; > + }; > + }; > + > + can0 { > + pinctrl_can0_rx_tx: can0-rx-tx { > + atmel,pins = > + <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX0 */ > + AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANTX0 */ > + AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_DOWN>; /* Enable CAN Transceivers */ > + }; > + }; > + > + can1 { > + pinctrl_can1_rx_tx: can1-rx-tx { > + atmel,pins = > + <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX1 */ > + AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANTX1 */ > + AT91_PIOB 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_DOWN>; /* Enable CAN Transceivers */ > + }; > + }; > + > + dbgu { > + pinctrl_dbgu: dbgu-0 { > + atmel,pins = <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP > + AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; > + }; > + }; > + > + ebi { > + pinctrl_ebi_data_0_7: ebi-data-lsb-0 { > + atmel,pins = > + <AT91_PIOD 6 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 7 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 8 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 9 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 10 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 11 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 12 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 13 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)>; > + }; > + > + pinctrl_ebi_data_0_15: ebi-data-msb-0 { > + atmel,pins = > + <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; > + }; > + > + pinctrl_ebi_addr_nand: ebi-addr-0 { > + atmel,pins = > + <AT91_PIOD 2 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 3 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)>; > + }; > + }; > + > + flexcom { > + pinctrl_flx0_default: flx0-twi { > + atmel,pins = > + <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP > + AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; > + }; > + > + pinctrl_flx6_default: flx6-twi { > + atmel,pins = > + <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP > + AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; > + }; > + > + pinctrl_flx7_default: flx7-usart { > + atmel,pins = > + <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE > + AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; > + }; > + }; > + > + gpio-keys { > + pinctrl_key_gpio_default: pinctrl-key-gpio { > + atmel,pins = <AT91_PIOA 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; > + }; > + }; > + > + leds { > + pinctrl_gpio_leds: gpio-leds { > + atmel,pins = <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_NONE > + AT91_PIOD 19 AT91_PERIPH_GPIO AT91_PINCTRL_NONE > + AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; > + }; > + }; > + > + macb0 { > + pinctrl_macb0_rmii: macb0-rmii-0 { > + atmel,pins = > + <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */ > + AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */ > + AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */ > + AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */ > + AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ > + AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */ > + AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ > + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ > + AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ > + AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */ > + }; > + }; > + > + nand { > + pinctrl_nand_oe_we: nand-oe-we-0 { > + atmel,pins = > + <AT91_PIOD 0 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 1 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)>; > + }; > + > + pinctrl_nand_rb: nand-rb-0 { > + atmel,pins = > + <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; > + }; > + > + pinctrl_nand_cs: nand-cs-0 { > + atmel,pins = > + <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; > + }; > + }; > + > + pwm0 { > + pinctrl_pwm0_0: pwm0-0 { > + atmel,pins = <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; > + }; > + > + pinctrl_pwm0_1: pwm0-1 { > + atmel,pins = <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; > + }; > + > + pinctrl_pwm0_2: pwm0-2 { > + atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; > + }; > + }; > + > + sdmmc0 { > + pinctrl_sdmmc0_default: sdmmc0 { > + atmel,pins = > + <AT91_PIOA 17 AT91_PERIPH_A (AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA17 CK periph A with pullup */ > + AT91_PIOA 16 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA16 CMD periph A with pullup */ > + AT91_PIOA 15 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA15 DAT0 periph A */ > + AT91_PIOA 18 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA18 DAT1 periph A with pullup */ > + AT91_PIOA 19 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA19 DAT2 periph A with pullup */ > + AT91_PIOA 20 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI)>; /* PA20 DAT3 periph A with pullup */ > + }; > + pinctrl_sdmmc0_cd: sdmmc0-cd { > + atmel,pins = > + <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; > + }; > + }; > + > + sdmmc1 { > + pinctrl_sdmmc1_default: sdmmc1 { > + atmel,pins = > + <AT91_PIOA 13 AT91_PERIPH_B (AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA13 CK periph B */ > + AT91_PIOA 12 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA12 CMD periph B with pullup */ > + AT91_PIOA 11 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA11 DAT0 periph B with pullup */ > + AT91_PIOA 2 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA2 DAT1 periph B with pullup */ > + AT91_PIOA 3 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA3 DAT2 periph B with pullup */ > + AT91_PIOA 4 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI)>; /* PA4 DAT3 periph B with pullup */ > + }; > + }; > + > + usb0 { > + pinctrl_usba_vbus: usba-vbus { > + atmel,pins = <AT91_PIOA 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; > + }; > + }; > + > + usb1 { > + pinctrl_usb_default: usb-default { > + atmel,pins = <AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE > + AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; > + }; > + }; > +}; /* pinctrl */ > + > +&pwm0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pwm0_0 &pinctrl_pwm0_1 &pinctrl_pwm0_2>; > + status = "okay"; > +}; > + > +&sdmmc0 { > + bus-width = <4>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_sdmmc0_default &pinctrl_sdmmc0_cd>; > + cd-gpios = <&pioA 25 GPIO_ACTIVE_LOW>; > + disable-wp; > + status = "okay"; > +}; > + > +&sdmmc1 { > + bus-width = <4>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_sdmmc1_default>; > + status = "disabled"; > +}; > + > +&shutdown_controller { > + debounce-delay-us = <976>; > + status = "okay"; > + > + input@0 { > + reg = <0>; > + }; > +}; > + > +&tcb0 { > + timer0: timer@0 { > + compatible = "atmel,tcb-timer"; > + reg = <0>; > + }; > + > + timer1: timer@1 { > + compatible = "atmel,tcb-timer"; > + reg = <1>; > + }; > +}; > + > +&usb0 { > + atmel,vbus-gpio = <&pioA 27 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usba_vbus>; > + status = "okay"; > +}; > + > +&usb1 { > + num-ports = <3>; > + atmel,vbus-gpio = <0 > + &pioD 18 GPIO_ACTIVE_HIGH > + &pioD 15 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usb_default>; > + status = "okay"; > +}; > + > +&usb2 { > + status = "okay"; > +}; > + > +&watchdog { > + status = "okay"; > +}; ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCHv1 8/8] ARM: dts: at91: sam9x60_curiosity: Add device tree for sam9x60_curiosity board @ 2022-10-31 10:29 ` Claudiu.Beznea 0 siblings, 0 replies; 28+ messages in thread From: Claudiu.Beznea @ 2022-10-31 10:29 UTC (permalink / raw) To: Durai.ManickamKR, Nicolas.Ferre, Cristian.Birsan, Hari.PrasathGE, davem, krzysztof.kozlowski+dt, alexandre.belloni, arnd, olof, soc, devicetree, linux-arm-kernel, linux-kernel, Manikandan.M, Kavyasree.Kotagiri, Horatiu.Vultur Please address all the comments you've got on the previous version or at least reply to email to sustain your solution. On 31.10.2022 05:36, Durai Manickam KR wrote: > Add device tree file for sam9x60_curiosity board. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > --- > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/at91-sam9x60_curiosity.dts | 519 +++++++++++++++++++ > 2 files changed, 520 insertions(+) > create mode 100644 arch/arm/boot/dts/at91-sam9x60_curiosity.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 98ffdf299809..9f6aa408cd15 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -51,6 +51,7 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \ > at91sam9x25ek.dtb \ > at91sam9x35ek.dtb > dtb-$(CONFIG_SOC_SAM9X60) += \ > + at91-sam9x60_curiosity.dtb \ > at91-sam9x60ek.dtb > dtb-$(CONFIG_SOC_SAM_V7) += \ > at91-kizbox2-2.dtb \ > diff --git a/arch/arm/boot/dts/at91-sam9x60_curiosity.dts b/arch/arm/boot/dts/at91-sam9x60_curiosity.dts > new file mode 100644 > index 000000000000..2b3163bf6910 > --- /dev/null > +++ b/arch/arm/boot/dts/at91-sam9x60_curiosity.dts > @@ -0,0 +1,519 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * at91-sam9x60_curiosity.dts - Device Tree file for Microchip SAM9X60 CURIOSITY board > + * > + * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries > + * > + * Author: Manikandan M <manikandan.m@microchip.com> > + */ > +/dts-v1/; > +#include "sam9x60.dtsi" > +#include <dt-bindings/input/input.h> > + > +/ { > + model = "Microchip SAM9X60 CURIOSITY"; > + compatible = "microchip,sam9x60-curiosity", "microchip,sam9x60", "atmel,at91sam9"; > + > + aliases { > + i2c0 = &i2c0; > + i2c1 = &i2c6; > + serial2 = &uart7; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + memory@20000000 { > + reg = <0x20000000 0x8000000>; > + }; > + > + clocks { > + slow_xtal { > + clock-frequency = <32768>; > + }; > + > + main_xtal { > + clock-frequency = <24000000>; > + }; > + }; > + > + gpio-keys { > + compatible = "gpio-keys"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_key_gpio_default>; > + > + button-user { > + label = "PB_USER"; > + gpios = <&pioA 29 GPIO_ACTIVE_LOW>; > + linux,code = <KEY_PROG1>; > + wakeup-source; > + }; > + }; > + > + leds { > + compatible = "gpio-leds"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_gpio_leds>; > + > + red { > + label = "red"; > + gpios = <&pioD 17 GPIO_ACTIVE_HIGH>; > + }; > + > + green { > + label = "green"; > + gpios = <&pioD 19 GPIO_ACTIVE_HIGH>; > + }; > + > + blue { > + label = "blue"; > + gpios = <&pioD 21 GPIO_ACTIVE_HIGH>; > + linux,default-trigger = "heartbeat"; > + }; > + }; > + > + > + vdd_1v8: regulator-0 { > + compatible = "regulator-fixed"; > + regulator-name = "VDD_1V8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + vdd_1v15: regulator-1 { > + compatible = "regulator-fixed"; > + regulator-name = "VDD_1V15"; > + regulator-min-microvolt = <1150000>; > + regulator-max-microvolt = <1150000>; > + regulator-always-on; > + }; > + > + vdd1_3v3: regulator-2 { > + compatible = "regulator-fixed"; > + regulator-name = "VDD1_3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + }; > +}; > + > +&adc { > + vddana-supply = <&vdd1_3v3>; > + vref-supply = <&vdd1_3v3>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>; > + status = "okay"; > +}; > + > +&can0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_can0_rx_tx>; > + status = "disabled"; /* Conflict with dbgu. */ > +}; > + > +&can1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_can1_rx_tx>; > + status = "okay"; > +}; > + > +&dbgu { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_dbgu>; > + status = "okay"; /* Conflict with can0. */ > +}; > + > +&ebi { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_ebi_addr_nand &pinctrl_ebi_data_0_7>; > + status = "okay"; > + > + nand_controller: nand-controller { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_nand_oe_we &pinctrl_nand_cs &pinctrl_nand_rb>; > + status = "okay"; > + > + nand@3 { > + reg = <0x3 0x0 0x800000>; > + rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>; > + cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>; > + nand-bus-width = <8>; > + nand-ecc-mode = "hw"; > + nand-ecc-strength = <8>; > + nand-ecc-step-size = <512>; > + nand-on-flash-bbt; > + label = "atmel_nand"; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + at91bootstrap@0 { > + label = "at91bootstrap"; > + reg = <0x0 0x40000>; > + }; > + > + uboot@40000 { > + label = "u-boot"; > + reg = <0x40000 0xc0000>; > + }; > + > + ubootenvred@100000 { > + label = "U-Boot Env Redundant"; > + reg = <0x100000 0x40000>; > + }; > + > + ubootenv@140000 { > + label = "U-Boot Env"; > + reg = <0x140000 0x40000>; > + }; > + > + dtb@180000 { > + label = "device tree"; > + reg = <0x180000 0x80000>; > + }; > + > + kernel@200000 { > + label = "kernel"; > + reg = <0x200000 0x600000>; > + }; > + > + rootfs@800000 { > + label = "rootfs"; > + reg = <0x800000 0x1f800000>; > + }; > + }; > + }; > + }; > +}; > + > +&flx0 { > + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; > + status = "okay"; > + > + i2c0: i2c@600 { > + dmas = <0>, <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_flx0_default>; > + i2c-analog-filter; > + i2c-digital-filter; > + i2c-digital-filter-width-ns = <35>; > + status = "okay"; > + > + eeprom@53 { > + compatible = "atmel,24c02"; > + reg = <0x53>; > + pagesize = <16>; > + }; > + }; > +}; > + > +&flx6 { > + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; > + status = "okay"; > + > + i2c6: i2c@600 { > + dmas = <0>, <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_flx6_default>; > + i2c-analog-filter; > + i2c-digital-filter; > + i2c-digital-filter-width-ns = <35>; > + status = "disabled"; > + }; > +}; > + > +&flx7 { > + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; > + status = "okay"; > + > + uart7: serial@200 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_flx7_default>; > + status = "okay"; > + }; > +}; > + > +&macb0 { > + phy-mode = "rmii"; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_macb0_rmii>; > + status = "okay"; > + > + ethernet-phy@0 { > + reg = <0x0>; > + }; > +}; > + > +&pinctrl { > + adc { > + pinctrl_adc_default: adc-default { > + atmel,pins = <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; > + }; > + > + pinctrl_adtrg_default: adtrg-default { > + atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; > + }; > + }; > + > + can0 { > + pinctrl_can0_rx_tx: can0-rx-tx { > + atmel,pins = > + <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX0 */ > + AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANTX0 */ > + AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_DOWN>; /* Enable CAN Transceivers */ > + }; > + }; > + > + can1 { > + pinctrl_can1_rx_tx: can1-rx-tx { > + atmel,pins = > + <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX1 */ > + AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANTX1 */ > + AT91_PIOB 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_DOWN>; /* Enable CAN Transceivers */ > + }; > + }; > + > + dbgu { > + pinctrl_dbgu: dbgu-0 { > + atmel,pins = <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP > + AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; > + }; > + }; > + > + ebi { > + pinctrl_ebi_data_0_7: ebi-data-lsb-0 { > + atmel,pins = > + <AT91_PIOD 6 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 7 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 8 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 9 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 10 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 11 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 12 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 13 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)>; > + }; > + > + pinctrl_ebi_data_0_15: ebi-data-msb-0 { > + atmel,pins = > + <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE > + AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; > + }; > + > + pinctrl_ebi_addr_nand: ebi-addr-0 { > + atmel,pins = > + <AT91_PIOD 2 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 3 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)>; > + }; > + }; > + > + flexcom { > + pinctrl_flx0_default: flx0-twi { > + atmel,pins = > + <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP > + AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; > + }; > + > + pinctrl_flx6_default: flx6-twi { > + atmel,pins = > + <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP > + AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; > + }; > + > + pinctrl_flx7_default: flx7-usart { > + atmel,pins = > + <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE > + AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; > + }; > + }; > + > + gpio-keys { > + pinctrl_key_gpio_default: pinctrl-key-gpio { > + atmel,pins = <AT91_PIOA 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; > + }; > + }; > + > + leds { > + pinctrl_gpio_leds: gpio-leds { > + atmel,pins = <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_NONE > + AT91_PIOD 19 AT91_PERIPH_GPIO AT91_PINCTRL_NONE > + AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; > + }; > + }; > + > + macb0 { > + pinctrl_macb0_rmii: macb0-rmii-0 { > + atmel,pins = > + <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */ > + AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */ > + AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */ > + AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */ > + AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ > + AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */ > + AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ > + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ > + AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ > + AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */ > + }; > + }; > + > + nand { > + pinctrl_nand_oe_we: nand-oe-we-0 { > + atmel,pins = > + <AT91_PIOD 0 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) > + AT91_PIOD 1 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)>; > + }; > + > + pinctrl_nand_rb: nand-rb-0 { > + atmel,pins = > + <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; > + }; > + > + pinctrl_nand_cs: nand-cs-0 { > + atmel,pins = > + <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; > + }; > + }; > + > + pwm0 { > + pinctrl_pwm0_0: pwm0-0 { > + atmel,pins = <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; > + }; > + > + pinctrl_pwm0_1: pwm0-1 { > + atmel,pins = <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; > + }; > + > + pinctrl_pwm0_2: pwm0-2 { > + atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; > + }; > + }; > + > + sdmmc0 { > + pinctrl_sdmmc0_default: sdmmc0 { > + atmel,pins = > + <AT91_PIOA 17 AT91_PERIPH_A (AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA17 CK periph A with pullup */ > + AT91_PIOA 16 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA16 CMD periph A with pullup */ > + AT91_PIOA 15 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA15 DAT0 periph A */ > + AT91_PIOA 18 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA18 DAT1 periph A with pullup */ > + AT91_PIOA 19 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA19 DAT2 periph A with pullup */ > + AT91_PIOA 20 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI)>; /* PA20 DAT3 periph A with pullup */ > + }; > + pinctrl_sdmmc0_cd: sdmmc0-cd { > + atmel,pins = > + <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; > + }; > + }; > + > + sdmmc1 { > + pinctrl_sdmmc1_default: sdmmc1 { > + atmel,pins = > + <AT91_PIOA 13 AT91_PERIPH_B (AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA13 CK periph B */ > + AT91_PIOA 12 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA12 CMD periph B with pullup */ > + AT91_PIOA 11 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA11 DAT0 periph B with pullup */ > + AT91_PIOA 2 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA2 DAT1 periph B with pullup */ > + AT91_PIOA 3 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA3 DAT2 periph B with pullup */ > + AT91_PIOA 4 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI)>; /* PA4 DAT3 periph B with pullup */ > + }; > + }; > + > + usb0 { > + pinctrl_usba_vbus: usba-vbus { > + atmel,pins = <AT91_PIOA 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; > + }; > + }; > + > + usb1 { > + pinctrl_usb_default: usb-default { > + atmel,pins = <AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE > + AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; > + }; > + }; > +}; /* pinctrl */ > + > +&pwm0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pwm0_0 &pinctrl_pwm0_1 &pinctrl_pwm0_2>; > + status = "okay"; > +}; > + > +&sdmmc0 { > + bus-width = <4>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_sdmmc0_default &pinctrl_sdmmc0_cd>; > + cd-gpios = <&pioA 25 GPIO_ACTIVE_LOW>; > + disable-wp; > + status = "okay"; > +}; > + > +&sdmmc1 { > + bus-width = <4>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_sdmmc1_default>; > + status = "disabled"; > +}; > + > +&shutdown_controller { > + debounce-delay-us = <976>; > + status = "okay"; > + > + input@0 { > + reg = <0>; > + }; > +}; > + > +&tcb0 { > + timer0: timer@0 { > + compatible = "atmel,tcb-timer"; > + reg = <0>; > + }; > + > + timer1: timer@1 { > + compatible = "atmel,tcb-timer"; > + reg = <1>; > + }; > +}; > + > +&usb0 { > + atmel,vbus-gpio = <&pioA 27 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usba_vbus>; > + status = "okay"; > +}; > + > +&usb1 { > + num-ports = <3>; > + atmel,vbus-gpio = <0 > + &pioD 18 GPIO_ACTIVE_HIGH > + &pioD 15 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usb_default>; > + status = "okay"; > +}; > + > +&usb2 { > + status = "okay"; > +}; > + > +&watchdog { > + status = "okay"; > +}; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 28+ messages in thread
end of thread, other threads:[~2022-11-15 5:41 UTC | newest]
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[not found] <20221031033653.43269-1-durai.manickamkr@microchip.com>
2022-10-31 10:20 ` [PATCHv1 0/8] Add support for sam9x60 curiosity board Claudiu.Beznea
2022-10-31 10:20 ` Claudiu.Beznea
2022-11-02 20:18 ` Krzysztof Kozlowski
2022-11-02 20:18 ` Krzysztof Kozlowski
2022-11-03 5:12 ` Durai.ManickamKR
2022-11-03 5:12 ` Durai.ManickamKR
[not found] ` <20221031033653.43269-2-durai.manickamkr@microchip.com>
2022-10-31 10:22 ` [PATCHv1 1/8] ARM: dts: at91: sam9x60: Fix the label numbering for the flexcom functions Claudiu.Beznea
2022-10-31 10:22 ` Claudiu.Beznea
2022-10-31 10:25 ` Claudiu.Beznea
2022-10-31 10:25 ` Claudiu.Beznea
[not found] ` <20221031033653.43269-3-durai.manickamkr@microchip.com>
2022-10-31 10:23 ` [PATCHv1 2/8] ARM: dts: at91: sam9x60: remove flexcom definitions Claudiu.Beznea
2022-10-31 10:23 ` Claudiu.Beznea
[not found] ` <20221031033653.43269-4-durai.manickamkr@microchip.com>
2022-10-31 10:24 ` [PATCHv1 3/8] ARM: dts: at91: sam9x60: Add " Claudiu.Beznea
2022-10-31 10:24 ` Claudiu.Beznea
2022-10-31 10:27 ` Claudiu.Beznea
2022-10-31 10:27 ` Claudiu.Beznea
2022-11-08 13:37 ` Nicolas Ferre
2022-11-08 13:37 ` Nicolas Ferre
2022-11-15 5:33 ` Durai.ManickamKR
2022-11-15 5:33 ` Durai.ManickamKR
[not found] ` <20221031033653.43269-7-durai.manickamkr@microchip.com>
2022-10-31 10:28 ` [PATCHv1 6/8] ARM: dts: at91: sam9x60: Add missing " Claudiu.Beznea
2022-10-31 10:28 ` Claudiu.Beznea
2022-11-15 5:40 ` Durai.ManickamKR
2022-11-15 5:40 ` Durai.ManickamKR
[not found] ` <20221031033653.43269-8-durai.manickamkr@microchip.com>
2022-10-31 10:29 ` [PATCHv1 7/8] dt-bindings: arm: at91: Add info on SAM9X60-CURIOSITY Claudiu.Beznea
2022-10-31 10:29 ` Claudiu.Beznea
[not found] ` <20221031033653.43269-9-durai.manickamkr@microchip.com>
2022-10-31 10:29 ` [PATCHv1 8/8] ARM: dts: at91: sam9x60_curiosity: Add device tree for sam9x60_curiosity board Claudiu.Beznea
2022-10-31 10:29 ` Claudiu.Beznea
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