[PATCH v2 2/2] riscv: timer: Add support for an early timer

[Sean Anderson <seanga2@gmail.com>]

On 1/4/21 8:37 PM, Rick Chen wrote:
> Hi Pragnesh
> 
>>> From: Pragnesh Patel [mailto:pragnesh.patel at sifive.com]
>>> Sent: Tuesday, December 22, 2020 2:23 PM
>>> To: u-boot at lists.denx.de
>>> Cc: atish.patra at wdc.com; palmerdabbelt at google.com; bmeng.cn at gmail.com; paul.walmsley at sifive.com; anup.patel at wdc.com; sagar.kadam at sifive.com; Rick Jian-Zhi Chen(???); pragnesh.patel at openfive.com; Pragnesh Patel; Palmer Dabbelt; Sean Anderson; Claudiu Beznea; Simon Glass
>>> Subject: [PATCH v2 2/2] riscv: timer: Add support for an early timer
>>>
>>> Added support for timer_early_get_count() and timer_early_get_rate()
>>> This is mostly useful in tracing.
>>>
>>> Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
>>> ---
>>>
>>> Changes in v2:
>>> - make u-boot compile for qemu (include/configs/qemu-riscv.h)
>>>
>>>   drivers/timer/andes_plmt_timer.c   | 21 ++++++++++++++++++++-
>>>   drivers/timer/riscv_timer.c        | 21 ++++++++++++++++++++-
>>>   drivers/timer/sifive_clint_timer.c | 21 ++++++++++++++++++++-
>>>   include/configs/ax25-ae350.h       |  5 +++++
>>>   include/configs/qemu-riscv.h       |  5 +++++
>>>   include/configs/sifive-fu540.h     |  5 +++++
>>>   6 files changed, 75 insertions(+), 3 deletions(-)
>>
>> Reviewed-by: Rick Chen <rick@andestech.com>
> 
> Please check about the CI failure item:
> https://gitlab.denx.de/u-boot/custodians/u-boot-riscv/-/jobs/196578

404 for me (though I suspect it's really a 403).

--Sean