[PATCH v2 2/2] riscv: timer: Add support for an early timer

[Pragnesh Patel <pragnesh.patel@sifive.com>]

Hi Rick,

On Wed, Jan 6, 2021 at 7:28 AM Rick Chen <rickchen36@gmail.com> wrote:
>
> Hi Pragnesh
>
> > On Tue, Jan 5, 2021 at 7:12 AM Sean Anderson <seanga2@gmail.com> wrote:
> > >
> > > On 1/4/21 8:37 PM, Rick Chen wrote:
> > > > Hi Pragnesh
> > > >
> > > >>> From: Pragnesh Patel [mailto:pragnesh.patel at sifive.com]
> > > >>> Sent: Tuesday, December 22, 2020 2:23 PM
> > > >>> To: u-boot at lists.denx.de
> > > >>> Cc: atish.patra at wdc.com; palmerdabbelt at google.com; bmeng.cn at gmail.com; paul.walmsley at sifive.com; anup.patel at wdc.com; sagar.kadam at sifive.com; Rick Jian-Zhi Chen(???); pragnesh.patel at openfive.com; Pragnesh Patel; Palmer Dabbelt; Sean Anderson; Claudiu Beznea; Simon Glass
> > > >>> Subject: [PATCH v2 2/2] riscv: timer: Add support for an early timer
> > > >>>
> > > >>> Added support for timer_early_get_count() and timer_early_get_rate()
> > > >>> This is mostly useful in tracing.
> > > >>>
> > > >>> Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
> > > >>> ---
> > > >>>
> > > >>> Changes in v2:
> > > >>> - make u-boot compile for qemu (include/configs/qemu-riscv.h)
> > > >>>
> > > >>>   drivers/timer/andes_plmt_timer.c   | 21 ++++++++++++++++++++-
> > > >>>   drivers/timer/riscv_timer.c        | 21 ++++++++++++++++++++-
> > > >>>   drivers/timer/sifive_clint_timer.c | 21 ++++++++++++++++++++-
> > > >>>   include/configs/ax25-ae350.h       |  5 +++++
> > > >>>   include/configs/qemu-riscv.h       |  5 +++++
> > > >>>   include/configs/sifive-fu540.h     |  5 +++++
> > > >>>   6 files changed, 75 insertions(+), 3 deletions(-)
> > > >>
> > > >> Reviewed-by: Rick Chen <rick@andestech.com>
> > > >
> > > > Please check about the CI failure item:
> > > > https://gitlab.denx.de/u-boot/custodians/u-boot-riscv/-/jobs/196578
> > >
> > > 404 for me (though I suspect it's really a 403).
> >
> > 404 for me also.
> >
>
> Followings are the errors from CI:
>
> ...
> ...
> +====================================================
> 562 riscv: + microchip_mpfs_icicle
> 563+drivers/timer/sifive_clint_timer.c: In function 'timer_early_get_rate':
> 564+drivers/timer/sifive_clint_timer.c:28:9: error:
> 'RISCV_MMODE_TIMER_FREQ' undeclared (first use in this function)
> 565+ 28 | return RISCV_MMODE_TIMER_FREQ;
> 566+ | ^~~~~~~~~~~~~~~~~~~~~~
> 567+drivers/timer/sifive_clint_timer.c:28:9: note: each undeclared
> identifier is reported only once for each function it appears in
> 568+drivers/timer/sifive_clint_timer.c: In function 'timer_early_get_count':
> 569+drivers/timer/sifive_clint_timer.c:37:41: error:
> 'RISCV_MMODE_TIMERBASE' undeclared (first use in this function)
> 570+ 37 | return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
> 571+ | ^~~~~~~~~~~~~~~~~~~~~
> 572+drivers/timer/sifive_clint_timer.c:15:36: note: in definition of
> macro 'MTIME_REG'
> 573+ 15 | #define MTIME_REG(base) ((ulong)(base) + 0xbff8)
> 574+ | ^~~~
> 575+drivers/timer/sifive_clint_timer.c:29:1: error: control reaches
> end of non-void function [-Werror=return-type]
> 576+ 29 | }
> 577+ | ^
> 578+drivers/timer/sifive_clint_timer.c:38:1: error: control reaches
> end of non-void function [-Werror=return-type]
> 579+ 38 | }
> 580+cc1: all warnings being treated as errors
> 581+make[3]: *** [drivers/timer/sifive_clint_timer.o] Error 1
> 582+make[2]: *** [drivers/timer] Error 2
> 583+make[1]: *** [drivers] Error 2
> 584+make: *** [sub-make] Error 2
> 585 riscv: + sipeed_maix_bitm
> 586+drivers/timer/sifive_clint_timer.c: In function 'timer_early_get_rate':
> 587+drivers/timer/sifive_clint_timer.c:28:9: error:
> 'RISCV_MMODE_TIMER_FREQ' undeclared (first use in this function)
> 588+ 28 | return RISCV_MMODE_TIMER_FREQ;
> 589+ | ^~~~~~~~~~~~~~~~~~~~~~
> 590+drivers/timer/sifive_clint_timer.c:28:9: note: each undeclared
> identifier is reported only once for each function it appears in
> 591+drivers/timer/sifive_clint_timer.c: In function 'timer_early_get_count':
> 592+drivers/timer/sifive_clint_timer.c:37:41: error:
> 'RISCV_MMODE_TIMERBASE' undeclared (first use in this function)
> 593+ 37 | return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
> 594+ | ^~~~~~~~~~~~~~~~~~~~~
> 595+drivers/timer/sifive_clint_timer.c:15:36: note: in definition of
> macro 'MTIME_REG'
> 596+ 15 | #define MTIME_REG(base) ((ulong)(base) + 0xbff8)
> 597+ | ^~~~
> 598+drivers/timer/sifive_clint_timer.c:29:1: error: control reaches
> end of non-void function [-Werror=return-type]
> 599+ 29 | }
> 600+ | ^
> 601+drivers/timer/sifive_clint_timer.c:38:1: error: control reaches
> end of non-void function [-Werror=return-type]
> 602+ 38 | }
> 603+cc1: all warnings being treated as errors
> 604+make[3]: *** [drivers/timer/sifive_clint_timer.o] Error 1
> 605+make[2]: *** [drivers/timer] Error 2
> 606+make[1]: *** [drivers] Error 2
> 607+make: *** [sub-make] Error 2
> 608 riscv: + sipeed_maix_smode
> 609+drivers/timer/riscv_timer.c: In function 'timer_early_get_rate':
> 610+drivers/timer/riscv_timer.c:40:9: error: 'RISCV_SMODE_TIMER_FREQ'
> undeclared (first use in this function)
> 611+ 40 | return RISCV_SMODE_TIMER_FREQ;
> 612+ | ^~~~~~~~~~~~~~~~~~~~~~
> 613+drivers/timer/riscv_timer.c:40:9: note: each undeclared identifier
> is reported only once for each function it appears in
> 614+drivers/timer/riscv_timer.c:41:1: error: control reaches end of
> non-void function [-Werror=return-type]
> 615+ 41 | }
> 616+ | ^

Will solve this in v3.

- Pragnesh

> ...
> ...
>
> Thanks,
> Rick
>
> > >
> > > --Sean
> > >