* [PATCH 0/7] ARM: Exynos: PMU cleanup and refactoring for using DT
@ 2014-04-02 7:50 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, linux-samsung-soc
Cc: kgene.kim, linux, chow.kim, Pankaj Dubey
This patch series, does some minor cleanup and modifies Exynos PMU related
code for mapping Exynos Power Management Unit (PMU) base address from device
tree. Since PMU offsets are used across many files under mach-exynos, it
introduces one helper function to get PMU base address in exynos.c.
This patch series is preparation for moving PMU related code out of machine
folder and converting into a driver.
This patch requires change in Exynos4210, Exynos4212 and Exynos4412 dtsi files,
which I will post shortly as separate patch series.
These patches are created on top of kgene for-next branch.
We have tested these patches for System boot and PMU initialization of
Exynos5250 and Exynos5260 (with some internal patches).
For rest Exynos SoC it has been only compile tested.
Pankaj Dubey (4):
ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
ARM: EXYNOS: Correct file path in comment message
ARM: EXYNOS: Move "regs-pmu" header inclusion in common.h
ARM: EXYNOS: Refactored code for PMU register mapping via DT
Young-Gun Jang (3):
ARM: EXYNOS: Move SYSREG definition into sys-reg specific file
ARM: EXYNOS: Remove regs-pmu.h file dependency from pm_domain
ARM: EXYNOS: Add support for mapping PMU base address via DT
arch/arm/mach-exynos/common.h | 10 +-
arch/arm/mach-exynos/cpuidle.c | 29 +-
arch/arm/mach-exynos/exynos.c | 58 +++-
arch/arm/mach-exynos/hotplug.c | 5 +-
arch/arm/mach-exynos/include/mach/map.h | 3 -
arch/arm/mach-exynos/platsmp.c | 15 +-
arch/arm/mach-exynos/pm.c | 55 ++--
arch/arm/mach-exynos/pm_domains.c | 2 +-
arch/arm/mach-exynos/pmu.c | 35 +--
arch/arm/mach-exynos/regs-pmu.h | 510 +++++++++++++++----------------
arch/arm/mach-exynos/regs-sys.h | 22 ++
11 files changed, 405 insertions(+), 339 deletions(-)
create mode 100644 arch/arm/mach-exynos/regs-sys.h
--
1.7.10.4
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 0/7] ARM: Exynos: PMU cleanup and refactoring for using DT
@ 2014-04-02 7:50 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel
This patch series, does some minor cleanup and modifies Exynos PMU related
code for mapping Exynos Power Management Unit (PMU) base address from device
tree. Since PMU offsets are used across many files under mach-exynos, it
introduces one helper function to get PMU base address in exynos.c.
This patch series is preparation for moving PMU related code out of machine
folder and converting into a driver.
This patch requires change in Exynos4210, Exynos4212 and Exynos4412 dtsi files,
which I will post shortly as separate patch series.
These patches are created on top of kgene for-next branch.
We have tested these patches for System boot and PMU initialization of
Exynos5250 and Exynos5260 (with some internal patches).
For rest Exynos SoC it has been only compile tested.
Pankaj Dubey (4):
ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
ARM: EXYNOS: Correct file path in comment message
ARM: EXYNOS: Move "regs-pmu" header inclusion in common.h
ARM: EXYNOS: Refactored code for PMU register mapping via DT
Young-Gun Jang (3):
ARM: EXYNOS: Move SYSREG definition into sys-reg specific file
ARM: EXYNOS: Remove regs-pmu.h file dependency from pm_domain
ARM: EXYNOS: Add support for mapping PMU base address via DT
arch/arm/mach-exynos/common.h | 10 +-
arch/arm/mach-exynos/cpuidle.c | 29 +-
arch/arm/mach-exynos/exynos.c | 58 +++-
arch/arm/mach-exynos/hotplug.c | 5 +-
arch/arm/mach-exynos/include/mach/map.h | 3 -
arch/arm/mach-exynos/platsmp.c | 15 +-
arch/arm/mach-exynos/pm.c | 55 ++--
arch/arm/mach-exynos/pm_domains.c | 2 +-
arch/arm/mach-exynos/pmu.c | 35 +--
arch/arm/mach-exynos/regs-pmu.h | 510 +++++++++++++++----------------
arch/arm/mach-exynos/regs-sys.h | 22 ++
11 files changed, 405 insertions(+), 339 deletions(-)
create mode 100644 arch/arm/mach-exynos/regs-sys.h
--
1.7.10.4
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 01/10] ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
2014-04-02 7:50 ` Pankaj Dubey
@ 2014-04-02 7:50 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, linux-samsung-soc
Cc: kgene.kim, linux, chow.kim, Pankaj Dubey
Remove unused declarations from "mach-exynos/common.h"
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/common.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 9ef3f83..277a83e 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -15,9 +15,6 @@
#include <linux/reboot.h>
#include <linux/of.h>
-void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
-
-struct map_desc;
void exynos_init_io(void);
void exynos_restart(enum reboot_mode mode, const char *cmd);
void exynos_cpuidle_init(void);
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH 01/10] ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
@ 2014-04-02 7:50 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel
Remove unused declarations from "mach-exynos/common.h"
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/common.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 9ef3f83..277a83e 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -15,9 +15,6 @@
#include <linux/reboot.h>
#include <linux/of.h>
-void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
-
-struct map_desc;
void exynos_init_io(void);
void exynos_restart(enum reboot_mode mode, const char *cmd);
void exynos_cpuidle_init(void);
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH 02/10] ARM: EXYNOS: Correct file path in comment message
2014-04-02 7:50 ` Pankaj Dubey
@ 2014-04-02 7:50 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, linux-samsung-soc
Cc: kgene.kim, linux, chow.kim, Pankaj Dubey
This patch corrects file path mentioned in file comment message.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/platsmp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 03e5e9f..d8d1555 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-exynos4/platsmp.c
+/* linux/arch/arm/mach-exynos/platsmp.c
*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH 02/10] ARM: EXYNOS: Correct file path in comment message
@ 2014-04-02 7:50 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel
This patch corrects file path mentioned in file comment message.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/platsmp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 03e5e9f..d8d1555 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-exynos4/platsmp.c
+/* linux/arch/arm/mach-exynos/platsmp.c
*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH 03/10] ARM: EXYNOS: Move SYSREG definition into sys-reg specific file
2014-04-02 7:50 ` Pankaj Dubey
@ 2014-04-02 7:50 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, linux-samsung-soc
Cc: kgene.kim, linux, chow.kim, Young-Gun Jang, Pankaj Dubey
From: Young-Gun Jang <yg1004.jang@samsung.com>
While making PMU (Power Mengement Unit) implementation device tree based,
there are few offsets related with SYSREG present in regs-pmu.h, so let's
make a new header file "regs-sys.h" to keep all such SYSREG related
register definition and remove them from "regs-pmu.h"
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/exynos.c | 1 +
arch/arm/mach-exynos/pm.c | 1 +
arch/arm/mach-exynos/regs-pmu.h | 3 ---
arch/arm/mach-exynos/regs-sys.h | 22 ++++++++++++++++++++++
4 files changed, 24 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/mach-exynos/regs-sys.h
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index b567361..57bd1cd 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -31,6 +31,7 @@
#include "common.h"
#include "mfc.h"
#include "regs-pmu.h"
+#include "regs-sys.h"
#define L2_AUX_VAL 0x7C470001
#define L2_AUX_MASK 0xC200ffff
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 15af0ce..723c988 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -35,6 +35,7 @@
#include "common.h"
#include "regs-pmu.h"
+#include "regs-sys.h"
/**
* struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 4f6a256..4ee706d 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -15,7 +15,6 @@
#include <mach/map.h>
#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
-#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
#define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200)
@@ -180,8 +179,6 @@
/* For EXYNOS5 */
-#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
-
#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
diff --git a/arch/arm/mach-exynos/regs-sys.h b/arch/arm/mach-exynos/regs-sys.h
new file mode 100644
index 0000000..84332b0
--- /dev/null
+++ b/arch/arm/mach-exynos/regs-sys.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * EXYNOS - system register definition
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_SYS_H
+#define __ASM_ARCH_REGS_SYS_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
+
+/* For EXYNOS5 */
+#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
+
+#endif /* __ASM_ARCH_REGS_SYS_H */
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH 03/10] ARM: EXYNOS: Move SYSREG definition into sys-reg specific file
@ 2014-04-02 7:50 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Young-Gun Jang <yg1004.jang@samsung.com>
While making PMU (Power Mengement Unit) implementation device tree based,
there are few offsets related with SYSREG present in regs-pmu.h, so let's
make a new header file "regs-sys.h" to keep all such SYSREG related
register definition and remove them from "regs-pmu.h"
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/exynos.c | 1 +
arch/arm/mach-exynos/pm.c | 1 +
arch/arm/mach-exynos/regs-pmu.h | 3 ---
arch/arm/mach-exynos/regs-sys.h | 22 ++++++++++++++++++++++
4 files changed, 24 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/mach-exynos/regs-sys.h
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index b567361..57bd1cd 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -31,6 +31,7 @@
#include "common.h"
#include "mfc.h"
#include "regs-pmu.h"
+#include "regs-sys.h"
#define L2_AUX_VAL 0x7C470001
#define L2_AUX_MASK 0xC200ffff
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 15af0ce..723c988 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -35,6 +35,7 @@
#include "common.h"
#include "regs-pmu.h"
+#include "regs-sys.h"
/**
* struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 4f6a256..4ee706d 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -15,7 +15,6 @@
#include <mach/map.h>
#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
-#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
#define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200)
@@ -180,8 +179,6 @@
/* For EXYNOS5 */
-#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
-
#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
diff --git a/arch/arm/mach-exynos/regs-sys.h b/arch/arm/mach-exynos/regs-sys.h
new file mode 100644
index 0000000..84332b0
--- /dev/null
+++ b/arch/arm/mach-exynos/regs-sys.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * EXYNOS - system register definition
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_SYS_H
+#define __ASM_ARCH_REGS_SYS_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
+
+/* For EXYNOS5 */
+#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
+
+#endif /* __ASM_ARCH_REGS_SYS_H */
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH 04/10] ARM: EXYNOS: Remove regs-pmu.h file dependency from pm_domain
2014-04-02 7:50 ` Pankaj Dubey
@ 2014-04-02 7:50 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, linux-samsung-soc
Cc: kgene.kim, linux, chow.kim, Young-Gun Jang
From: Young-Gun Jang <yg1004.jang@samsung.com>
Current "pm_domain.c" file uses "S5P_INT_LOCAL_PWR_EN" definition from
"regs-pmu.h" and hence needs to include this header file. As there is
no other user of "S5P_INT_LOCAL_PWR_EN" definition other than pm_domain,
to remove "regs-pmu.h" header file dependency from "pm_domain.c" it's
better we define this definition in "pm_domain.c" file itself and thus it
will help in removing header file inclusion from "pm_domain.c".
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
---
arch/arm/mach-exynos/pm_domains.c | 2 +-
arch/arm/mach-exynos/regs-pmu.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index fe6570e..f676b0a 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -22,7 +22,7 @@
#include <linux/of_platform.h>
#include <linux/sched.h>
-#include "regs-pmu.h"
+#define S5P_INT_LOCAL_PWR_EN 0x7
/*
* Exynos specific wrapper around the generic power domain
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 4ee706d..bfebe84 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -116,7 +116,6 @@
#define S5P_PAD_RET_EBIB_OPTION S5P_PMUREG(0x31A8)
#define S5P_CORE_LOCAL_PWR_EN 0x3
-#define S5P_INT_LOCAL_PWR_EN 0x7
#define S5P_CHECK_SLEEP 0x00000BAD
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH 04/10] ARM: EXYNOS: Remove regs-pmu.h file dependency from pm_domain
@ 2014-04-02 7:50 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Young-Gun Jang <yg1004.jang@samsung.com>
Current "pm_domain.c" file uses "S5P_INT_LOCAL_PWR_EN" definition from
"regs-pmu.h" and hence needs to include this header file. As there is
no other user of "S5P_INT_LOCAL_PWR_EN" definition other than pm_domain,
to remove "regs-pmu.h" header file dependency from "pm_domain.c" it's
better we define this definition in "pm_domain.c" file itself and thus it
will help in removing header file inclusion from "pm_domain.c".
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
---
arch/arm/mach-exynos/pm_domains.c | 2 +-
arch/arm/mach-exynos/regs-pmu.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index fe6570e..f676b0a 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -22,7 +22,7 @@
#include <linux/of_platform.h>
#include <linux/sched.h>
-#include "regs-pmu.h"
+#define S5P_INT_LOCAL_PWR_EN 0x7
/*
* Exynos specific wrapper around the generic power domain
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 4ee706d..bfebe84 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -116,7 +116,6 @@
#define S5P_PAD_RET_EBIB_OPTION S5P_PMUREG(0x31A8)
#define S5P_CORE_LOCAL_PWR_EN 0x3
-#define S5P_INT_LOCAL_PWR_EN 0x7
#define S5P_CHECK_SLEEP 0x00000BAD
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH 05/10] ARM: EXYNOS: Move "regs-pmu" header inclusion in common.h
2014-04-02 7:50 ` Pankaj Dubey
@ 2014-04-02 7:50 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, linux-samsung-soc
Cc: kgene.kim, linux, chow.kim, Pankaj Dubey
There are many machine files under "mach-exynos" including "regs-pmu.h"
as well as "common.h", so better we move this header inclusion in common.h.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/common.h | 1 +
arch/arm/mach-exynos/cpuidle.c | 1 -
arch/arm/mach-exynos/exynos.c | 1 -
arch/arm/mach-exynos/hotplug.c | 1 -
arch/arm/mach-exynos/platsmp.c | 1 -
arch/arm/mach-exynos/pm.c | 1 -
arch/arm/mach-exynos/pmu.c | 1 -
7 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 277a83e..ff28334 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -14,6 +14,7 @@
#include <linux/reboot.h>
#include <linux/of.h>
+#include "regs-pmu.h"
void exynos_init_io(void);
void exynos_restart(enum reboot_mode mode, const char *cmd);
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index b530231..b9dd8c3 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -29,7 +29,6 @@
#include <mach/map.h>
#include "common.h"
-#include "regs-pmu.h"
#define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 57bd1cd..a5e1349 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -30,7 +30,6 @@
#include "common.h"
#include "mfc.h"
-#include "regs-pmu.h"
#include "regs-sys.h"
#define L2_AUX_VAL 0x7C470001
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 5eead53..33db6ee 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -22,7 +22,6 @@
#include <plat/cpu.h>
#include "common.h"
-#include "regs-pmu.h"
static inline void cpu_enter_lowpower_a9(void)
{
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index d8d1555..3ebb03f 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -29,7 +29,6 @@
#include <plat/cpu.h>
#include "common.h"
-#include "regs-pmu.h"
extern void exynos4_secondary_startup(void);
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 723c988..875151f 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -34,7 +34,6 @@
#include <mach/map.h>
#include "common.h"
-#include "regs-pmu.h"
#include "regs-sys.h"
/**
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 05c7ce1..fb44352 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -16,7 +16,6 @@
#include <plat/cpu.h>
#include "common.h"
-#include "regs-pmu.h"
static const struct exynos_pmu_conf *exynos_pmu_config;
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH 05/10] ARM: EXYNOS: Move "regs-pmu" header inclusion in common.h
@ 2014-04-02 7:50 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel
There are many machine files under "mach-exynos" including "regs-pmu.h"
as well as "common.h", so better we move this header inclusion in common.h.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/common.h | 1 +
arch/arm/mach-exynos/cpuidle.c | 1 -
arch/arm/mach-exynos/exynos.c | 1 -
arch/arm/mach-exynos/hotplug.c | 1 -
arch/arm/mach-exynos/platsmp.c | 1 -
arch/arm/mach-exynos/pm.c | 1 -
arch/arm/mach-exynos/pmu.c | 1 -
7 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 277a83e..ff28334 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -14,6 +14,7 @@
#include <linux/reboot.h>
#include <linux/of.h>
+#include "regs-pmu.h"
void exynos_init_io(void);
void exynos_restart(enum reboot_mode mode, const char *cmd);
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index b530231..b9dd8c3 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -29,7 +29,6 @@
#include <mach/map.h>
#include "common.h"
-#include "regs-pmu.h"
#define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 57bd1cd..a5e1349 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -30,7 +30,6 @@
#include "common.h"
#include "mfc.h"
-#include "regs-pmu.h"
#include "regs-sys.h"
#define L2_AUX_VAL 0x7C470001
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 5eead53..33db6ee 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -22,7 +22,6 @@
#include <plat/cpu.h>
#include "common.h"
-#include "regs-pmu.h"
static inline void cpu_enter_lowpower_a9(void)
{
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index d8d1555..3ebb03f 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -29,7 +29,6 @@
#include <plat/cpu.h>
#include "common.h"
-#include "regs-pmu.h"
extern void exynos4_secondary_startup(void);
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 723c988..875151f 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -34,7 +34,6 @@
#include <mach/map.h>
#include "common.h"
-#include "regs-pmu.h"
#include "regs-sys.h"
/**
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 05c7ce1..fb44352 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -16,7 +16,6 @@
#include <plat/cpu.h>
#include "common.h"
-#include "regs-pmu.h"
static const struct exynos_pmu_conf *exynos_pmu_config;
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
2014-04-02 7:50 ` Pankaj Dubey
@ 2014-04-02 7:50 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, linux-samsung-soc
Cc: kgene.kim, linux, chow.kim, Young-Gun Jang, Pankaj Dubey
From: Young-Gun Jang <yg1004.jang@samsung.com>
Add support for mapping Exynos Power Management Unit (PMU) base address
from device tree. Code will use existing samsung pmu binding information.
This patch also adds "get_exynos_pmubase" a helper function to return mapped base
address to various other files under "mach-exynos".
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/common.h | 2 ++
arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 46 insertions(+)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index ff28334..9a55cf6 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -61,4 +61,6 @@ struct exynos_pmu_conf {
extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
+extern void __iomem *get_exynos_pmubase(void);
+
#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index a5e1349..a5127fb 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -35,6 +35,8 @@
#define L2_AUX_VAL 0x7C470001
#define L2_AUX_MASK 0xC200ffff
+static void __iomem *exynos_pmu_base __initdata;
+
static struct map_desc exynos4_iodesc[] __initdata = {
{
.virtual = (unsigned long)S3C_VA_SYS,
@@ -245,6 +247,47 @@ void __init exynos_init_late(void)
exynos_pm_init();
}
+static char const *exynos_dt_pmu_match[] __initconst = {
+ "samsung,exynos4210-pmu",
+ "samsung,exynos4212-pmu",
+ "samsung,exynos4412-pmu",
+ "samsung,exynos5250-pmu",
+ NULL
+};
+
+static int __init exynos_fdt_map_pmu(unsigned long node,
+ const char *uname, int depth, void *data)
+{
+ struct map_desc iodesc;
+ __be32 *reg;
+ unsigned long len;
+
+ if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
+ phys_addr_t phys_addr;
+ reg = of_get_flat_dt_prop(node, "reg", &len);
+ if (reg == NULL || len != (sizeof(unsigned long) * 2))
+ return 0;
+
+ phys_addr = be32_to_cpu(reg[0]);
+ iodesc.pfn = __phys_to_pfn(phys_addr);
+ iodesc.length = be32_to_cpu(reg[1]) - 1;
+ iodesc.virtual = (unsigned long)S5P_VA_PMU;
+ iodesc.type = MT_DEVICE;
+ iotable_init(&iodesc, 1);
+
+ exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
+ if (WARN_ON(!exynos_pmu_base))
+ return -EFAULT;
+ }
+
+ return 0;
+}
+
+inline void __iomem *get_exynos_pmubase()
+{
+ return exynos_pmu_base;
+}
+
static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
int depth, void *data)
{
@@ -301,6 +344,7 @@ void __init exynos_init_io(void)
debug_ll_io_init();
of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
+ of_scan_flat_dt(exynos_fdt_map_pmu, NULL);
/* detect cpu id and rev. */
s5p_init_cpu(S5P_VA_CHIPID);
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-02 7:50 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Young-Gun Jang <yg1004.jang@samsung.com>
Add support for mapping Exynos Power Management Unit (PMU) base address
from device tree. Code will use existing samsung pmu binding information.
This patch also adds "get_exynos_pmubase" a helper function to return mapped base
address to various other files under "mach-exynos".
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/common.h | 2 ++
arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 46 insertions(+)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index ff28334..9a55cf6 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -61,4 +61,6 @@ struct exynos_pmu_conf {
extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
+extern void __iomem *get_exynos_pmubase(void);
+
#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index a5e1349..a5127fb 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -35,6 +35,8 @@
#define L2_AUX_VAL 0x7C470001
#define L2_AUX_MASK 0xC200ffff
+static void __iomem *exynos_pmu_base __initdata;
+
static struct map_desc exynos4_iodesc[] __initdata = {
{
.virtual = (unsigned long)S3C_VA_SYS,
@@ -245,6 +247,47 @@ void __init exynos_init_late(void)
exynos_pm_init();
}
+static char const *exynos_dt_pmu_match[] __initconst = {
+ "samsung,exynos4210-pmu",
+ "samsung,exynos4212-pmu",
+ "samsung,exynos4412-pmu",
+ "samsung,exynos5250-pmu",
+ NULL
+};
+
+static int __init exynos_fdt_map_pmu(unsigned long node,
+ const char *uname, int depth, void *data)
+{
+ struct map_desc iodesc;
+ __be32 *reg;
+ unsigned long len;
+
+ if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
+ phys_addr_t phys_addr;
+ reg = of_get_flat_dt_prop(node, "reg", &len);
+ if (reg == NULL || len != (sizeof(unsigned long) * 2))
+ return 0;
+
+ phys_addr = be32_to_cpu(reg[0]);
+ iodesc.pfn = __phys_to_pfn(phys_addr);
+ iodesc.length = be32_to_cpu(reg[1]) - 1;
+ iodesc.virtual = (unsigned long)S5P_VA_PMU;
+ iodesc.type = MT_DEVICE;
+ iotable_init(&iodesc, 1);
+
+ exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
+ if (WARN_ON(!exynos_pmu_base))
+ return -EFAULT;
+ }
+
+ return 0;
+}
+
+inline void __iomem *get_exynos_pmubase()
+{
+ return exynos_pmu_base;
+}
+
static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
int depth, void *data)
{
@@ -301,6 +344,7 @@ void __init exynos_init_io(void)
debug_ll_io_init();
of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
+ of_scan_flat_dt(exynos_fdt_map_pmu, NULL);
/* detect cpu id and rev. */
s5p_init_cpu(S5P_VA_CHIPID);
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH 07/10] ARM: EXYNOS: Refactored code for PMU register mapping via DT
2014-04-02 7:50 ` Pankaj Dubey
@ 2014-04-02 7:50 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, linux-samsung-soc
Cc: kgene.kim, linux, chow.kim, Pankaj Dubey, Tomasz Figa,
Kyungmin Park, Thomas Abraham, Younggun Jang
This patch removes PMU register mapping via iodesc table and updates
users of PMU registers for using "get_exynos_pmubase" helper function to
get PMU base address.
CC: Tomasz Figa <t.figa@samsung.com>
CC: Kyungmin Park <kyungmin.park@samsung.com>
CC: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Younggun Jang <yg1004.jang@samsung.com>
---
arch/arm/mach-exynos/common.h | 4 +-
arch/arm/mach-exynos/cpuidle.c | 28 +-
arch/arm/mach-exynos/exynos.c | 12 +-
arch/arm/mach-exynos/hotplug.c | 4 +-
arch/arm/mach-exynos/include/mach/map.h | 3 -
arch/arm/mach-exynos/platsmp.c | 12 +-
arch/arm/mach-exynos/pm.c | 53 ++--
arch/arm/mach-exynos/pmu.c | 34 ++-
arch/arm/mach-exynos/regs-pmu.h | 506 +++++++++++++++----------------
9 files changed, 332 insertions(+), 324 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 9a55cf6..645f4f8 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -44,7 +44,7 @@ extern void exynos_cpu_die(unsigned int cpu);
/* PMU(Power Management Unit) support */
-#define PMU_TABLE_END NULL
+#define PMU_TABLE_END 0xFFFF
enum sys_powerdown {
SYS_AFTR,
@@ -55,7 +55,7 @@ enum sys_powerdown {
extern unsigned long l2x0_regs_phys;
struct exynos_pmu_conf {
- void __iomem *reg;
+ unsigned int offset;
unsigned int val[NUM_SYS_POWERDOWN];
};
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index b9dd8c3..dcf563d 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -31,11 +31,15 @@
#include "common.h"
#define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
- S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
- (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
+ get_exynos_pmubase() + S5P_INFORM7 : \
+ (samsung_rev() == EXYNOS4210_REV_1_0 ? \
+ (S5P_VA_SYSRAM + 0x24) : \
+ get_exynos_pmubase() + S5P_INFORM0))
#define REG_DIRECTGO_FLAG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
- S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
- (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
+ get_exynos_pmubase() + S5P_INFORM6 : \
+ (samsung_rev() == EXYNOS4210_REV_1_0 ? \
+ (S5P_VA_SYSRAM + 0x20) : \
+ get_exynos_pmubase() + S5P_INFORM1))
#define S5P_CHECK_AFTR 0xFCBA0D10
@@ -58,6 +62,8 @@
#define PWR_CTRL2_CORE2_UP_RATIO (1 << 4)
#define PWR_CTRL2_CORE1_UP_RATIO (1 << 0)
+static void __iomem *pmu_base;
+
static int exynos4_enter_lowpower(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index);
@@ -85,7 +91,7 @@ static struct cpuidle_driver exynos4_idle_driver = {
/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
static void exynos4_set_wakeupmask(void)
{
- __raw_writel(0x0000ff3e, S5P_WAKEUP_MASK);
+ __raw_writel(0x0000ff3e, pmu_base + S5P_WAKEUP_MASK);
}
static unsigned int g_pwr_ctrl, g_diag_reg;
@@ -131,9 +137,9 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
save_cpu_arch_register();
/* Setting Central Sequence Register for power down mode */
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ tmp = __raw_readl(pmu_base + S5P_CENTRAL_SEQ_CONFIGURATION);
tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ __raw_writel(tmp, pmu_base + S5P_CENTRAL_SEQ_CONFIGURATION);
cpu_pm_enter();
cpu_suspend(0, idle_finisher);
@@ -152,14 +158,14 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
* S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
* in this situation.
*/
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ tmp = __raw_readl(pmu_base + S5P_CENTRAL_SEQ_CONFIGURATIO);
if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
tmp |= S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ __raw_writel(tmp, pmu_base + S5P_CENTRAL_SEQ_CONFIGURATION);
}
/* Clear wakeup state register */
- __raw_writel(0x0, S5P_WAKEUP_STAT);
+ __raw_writel(0x0, pmu_base + S5P_WAKEUP_STAT);
return index;
}
@@ -217,6 +223,8 @@ static int exynos_cpuidle_probe(struct platform_device *pdev)
int cpu_id, ret;
struct cpuidle_device *device;
+ pmu_base = get_exynos_pmubase();
+
if (soc_is_exynos5250())
exynos5_core_down_clk();
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index a5127fb..68e7612 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -64,11 +64,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
.length = SZ_4K,
.type = MT_DEVICE,
}, {
- .virtual = (unsigned long)S5P_VA_PMU,
- .pfn = __phys_to_pfn(EXYNOS4_PA_PMU),
- .length = SZ_64K,
- .type = MT_DEVICE,
- }, {
.virtual = (unsigned long)S5P_VA_COMBINER_BASE,
.pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
.length = SZ_4K,
@@ -192,11 +187,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
.pfn = __phys_to_pfn(EXYNOS5_PA_CMU),
.length = 144 * SZ_1K,
.type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)S5P_VA_PMU,
- .pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
- .length = SZ_64K,
- .type = MT_DEVICE,
},
};
@@ -204,7 +194,7 @@ void exynos_restart(enum reboot_mode mode, const char *cmd)
{
struct device_node *np;
u32 val = 0x1;
- void __iomem *addr = EXYNOS_SWRESET;
+ void __iomem *addr = get_exynos_pmubase() + EXYNOS_SWRESET;
if (of_machine_is_compatible("samsung,exynos5440")) {
u32 status;
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 33db6ee..94ab653 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -91,11 +91,13 @@ static inline void cpu_leave_lowpower(void)
static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
{
+ void __iomem *pmu_base = get_exynos_pmubase();
+
for (;;) {
/* make cpu1 to be turned off at next WFI command */
if (cpu == 1)
- __raw_writel(0, S5P_ARM_CORE1_CONFIGURATION);
+ __raw_writel(0, pmu_base + S5P_ARM_CORE1_CONFIGURATION);
/*
* here's the WFI
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 7b046b5..1ba7fb5 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -35,9 +35,6 @@
#define EXYNOS4_PA_SYSCON 0x10010000
#define EXYNOS5_PA_SYSCON 0x10050100
-#define EXYNOS4_PA_PMU 0x10020000
-#define EXYNOS5_PA_PMU 0x10040000
-
#define EXYNOS4_PA_CMU 0x10030000
#define EXYNOS5_PA_CMU 0x10010000
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 3ebb03f..19c2a50 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -31,11 +31,12 @@
#include "common.h"
extern void exynos4_secondary_startup(void);
+static void __iomem *pmu_base;
static inline void __iomem *cpu_boot_reg_base(void)
{
if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
- return S5P_INFORM5;
+ return pmu_base + S5P_INFORM5;
return S5P_VA_SYSRAM;
}
@@ -90,6 +91,8 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
unsigned long timeout;
unsigned long phys_cpu = cpu_logical_map(cpu);
+ pmu_base = get_exynos_pmubase();
+
/*
* Set synchronisation state between this boot processor
* and the secondary one
@@ -106,14 +109,15 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
*/
write_pen_release(phys_cpu);
- if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
+ if (!(__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
+ & S5P_CORE_LOCAL_PWR_EN)) {
__raw_writel(S5P_CORE_LOCAL_PWR_EN,
- S5P_ARM_CORE1_CONFIGURATION);
+ pmu_base + S5P_ARM_CORE1_CONFIGURATION);
timeout = 10;
/* wait max 10 ms until cpu1 is on */
- while ((__raw_readl(S5P_ARM_CORE1_STATUS)
+ while ((__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
& S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
if (timeout-- == 0)
break;
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 875151f..6c147c9 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -119,32 +119,37 @@ static int exynos_cpu_suspend(unsigned long arg)
return 1; /* Aborting suspend */
}
+static void __iomem *pmu_base;
+
static void exynos_pm_prepare(void)
{
unsigned int tmp;
/* Set wake-up mask registers */
- __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
- __raw_writel(exynos_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
+ __raw_writel(exynos_get_eint_wake_mask(),
+ pmu_base + S5P_EINT_WAKEUP_MASK);
+ __raw_writel(exynos_irqwake_intmask & ~(1 << 31),
+ pmu_base + S5P_WAKEUP_MASK);
s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
if (soc_is_exynos5250()) {
s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
/* Disable USE_RETENTION of JPEG_MEM_OPTION */
- tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
+ tmp = __raw_readl(pmu_base + EXYNOS5_JPEG_MEM_OPTION);
tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
- __raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION);
+ __raw_writel(tmp, pmu_base + EXYNOS5_JPEG_MEM_OPTION);
}
/* Set value of power down register for sleep mode */
exynos_sys_powerdown_conf(SYS_SLEEP);
- __raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1);
+ __raw_writel(S5P_CHECK_SLEEP, pmu_base + S5P_INFORM1);
/* ensure at least INFORM0 has the resume address */
- __raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
+ __raw_writel(virt_to_phys(exynos_cpu_resume),
+ pmu_base + S5P_INFORM0);
}
static int exynos_pm_suspend(void)
@@ -153,14 +158,14 @@ static int exynos_pm_suspend(void)
/* Setting Central Sequence Register for power down mode */
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ tmp = __raw_readl(pmu_base + S5P_CENTRAL_SEQ_CONFIGURATION);
tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ __raw_writel(tmp, pmu_base + S5P_CENTRAL_SEQ_CONFIGURATION);
/* Setting SEQ_OPTION register */
tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
- __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
+ __raw_writel(tmp, pmu_base + S5P_CENTRAL_SEQ_OPTION);
if (!soc_is_exynos5250()) {
/* Save Power control register */
@@ -187,12 +192,12 @@ static void exynos_pm_resume(void)
* S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
* in this situation.
*/
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ tmp = __raw_readl(pmu_base + S5P_CENTRAL_SEQ_CONFIGURATION);
if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
tmp |= S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ __raw_writel(tmp, pmu_base + S5P_CENTRAL_SEQ_CONFIGURATION);
/* clear the wakeup state register */
- __raw_writel(0x0, S5P_WAKEUP_STAT);
+ __raw_writel(0x0, pmu_base + S5P_WAKEUP_STAT);
/* No need to perform below restore code */
goto early_wakeup;
}
@@ -212,13 +217,13 @@ static void exynos_pm_resume(void)
/* For release retention */
- __raw_writel((1 << 28), S5P_PAD_RET_MAUDIO_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_GPIO_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_UART_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_MMCA_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_MMCB_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
+ __raw_writel((1 << 28), pmu_base + S5P_PAD_RET_MAUDIO_OPTION);
+ __raw_writel((1 << 28), pmu_base + S5P_PAD_RET_GPIO_OPTION);
+ __raw_writel((1 << 28), pmu_base + S5P_PAD_RET_UART_OPTION);
+ __raw_writel((1 << 28), pmu_base + S5P_PAD_RET_MMCA_OPTION);
+ __raw_writel((1 << 28), pmu_base + S5P_PAD_RET_MMCB_OPTION);
+ __raw_writel((1 << 28), pmu_base + S5P_PAD_RET_EBIA_OPTION);
+ __raw_writel((1 << 28), pmu_base + S5P_PAD_RET_EBIB_OPTION);
if (soc_is_exynos5250())
s3c_pm_do_restore(exynos5_sys_save,
@@ -232,7 +237,7 @@ static void exynos_pm_resume(void)
early_wakeup:
/* Clear SLEEP mode set in INFORM1 */
- __raw_writel(0x0, S5P_INFORM1);
+ __raw_writel(0x0, pmu_base + S5P_INFORM1);
return;
}
@@ -276,7 +281,7 @@ static int exynos_suspend_enter(suspend_state_t state)
s3c_pm_restore_uarts();
S3C_PMDBG("%s: wakeup stat: %08x\n", __func__,
- __raw_readl(S5P_WAKEUP_STAT));
+ __raw_readl(pmu_base + S5P_WAKEUP_STAT));
s3c_pm_check_restore();
@@ -308,13 +313,15 @@ void __init exynos_pm_init(void)
{
u32 tmp;
+ pmu_base = get_exynos_pmubase();
+
/* Platform-specific GIC callback */
gic_arch_extn.irq_set_wake = exynos_irq_set_wake;
/* All wakeup disable */
- tmp = __raw_readl(S5P_WAKEUP_MASK);
+ tmp = __raw_readl(pmu_base + S5P_WAKEUP_MASK);
tmp |= ((0xFF << 8) | (0x1F << 1));
- __raw_writel(tmp, S5P_WAKEUP_MASK);
+ __raw_writel(tmp, pmu_base + S5P_WAKEUP_MASK);
register_syscore_ops(&exynos_pm_syscore_ops);
suspend_set_ops(&exynos_suspend_ops);
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index fb44352..30b20ab 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -18,6 +18,7 @@
#include "common.h"
static const struct exynos_pmu_conf *exynos_pmu_config;
+static void __iomem *pmu_base;
static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
/* { .reg = address, .val = { AFTR, LPA, SLEEP } */
@@ -317,7 +318,7 @@ static const struct exynos_pmu_conf exynos5250_pmu_config[] = {
{ PMU_TABLE_END,},
};
-static void __iomem * const exynos5_list_both_cnt_feed[] = {
+static unsigned int const exynos5_list_both_cnt_feed[] = {
EXYNOS5_ARM_CORE0_OPTION,
EXYNOS5_ARM_CORE1_OPTION,
EXYNOS5_ARM_COMMON_OPTION,
@@ -331,7 +332,7 @@ static void __iomem * const exynos5_list_both_cnt_feed[] = {
EXYNOS5_TOP_PWR_SYSMEM_OPTION,
};
-static void __iomem * const exynos5_list_diable_wfi_wfe[] = {
+static unsigned int const exynos5_list_diable_wfi_wfe[] = {
EXYNOS5_ARM_CORE1_OPTION,
EXYNOS5_FSYS_ARM_OPTION,
EXYNOS5_ISP_ARM_OPTION,
@@ -346,27 +347,27 @@ static void exynos5_init_pmu(void)
* Enable both SC_FEEDBACK and SC_COUNTER
*/
for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
- tmp = __raw_readl(exynos5_list_both_cnt_feed[i]);
+ tmp = __raw_readl(pmu_base + exynos5_list_both_cnt_feed[i]);
tmp |= (EXYNOS5_USE_SC_FEEDBACK |
EXYNOS5_USE_SC_COUNTER);
- __raw_writel(tmp, exynos5_list_both_cnt_feed[i]);
+ __raw_writel(tmp, pmu_base + exynos5_list_both_cnt_feed[i]);
}
/*
* SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
*/
- tmp = __raw_readl(EXYNOS5_ARM_COMMON_OPTION);
+ tmp = __raw_readl(pmu_base + EXYNOS5_ARM_COMMON_OPTION);
tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
- __raw_writel(tmp, EXYNOS5_ARM_COMMON_OPTION);
+ __raw_writel(tmp, pmu_base + EXYNOS5_ARM_COMMON_OPTION);
/*
* Disable WFI/WFE on XXX_OPTION
*/
for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
- tmp = __raw_readl(exynos5_list_diable_wfi_wfe[i]);
+ tmp = __raw_readl(pmu_base + exynos5_list_diable_wfi_wfe[i]);
tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
EXYNOS5_OPTION_USE_STANDBYWFI);
- __raw_writel(tmp, exynos5_list_diable_wfi_wfe[i]);
+ __raw_writel(tmp, pmu_base + exynos5_list_diable_wfi_wfe[i]);
}
}
@@ -377,14 +378,14 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
if (soc_is_exynos5250())
exynos5_init_pmu();
- for (i = 0; (exynos_pmu_config[i].reg != PMU_TABLE_END) ; i++)
+ for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
__raw_writel(exynos_pmu_config[i].val[mode],
- exynos_pmu_config[i].reg);
+ pmu_base + exynos_pmu_config[i].offset);
if (soc_is_exynos4412()) {
- for (i = 0; exynos4412_pmu_config[i].reg != PMU_TABLE_END ; i++)
+ for (i = 0; exynos4412_pmu_config[i].offset != PMU_TABLE_END; i++)
__raw_writel(exynos4412_pmu_config[i].val[mode],
- exynos4412_pmu_config[i].reg);
+ pmu_base + exynos4412_pmu_config[i].offset);
}
}
@@ -393,6 +394,7 @@ static int __init exynos_pmu_init(void)
unsigned int value;
exynos_pmu_config = exynos4210_pmu_config;
+ pmu_base = get_exynos_pmubase();
if (soc_is_exynos4210()) {
exynos_pmu_config = exynos4210_pmu_config;
@@ -405,13 +407,13 @@ static int __init exynos_pmu_init(void)
* When SYS_WDTRESET is set, watchdog timer reset request
* is ignored by power management unit.
*/
- value = __raw_readl(EXYNOS5_AUTO_WDTRESET_DISABLE);
+ value = __raw_readl(pmu_base + EXYNOS5_AUTO_WDTRESET_DISABLE);
value &= ~EXYNOS5_SYS_WDTRESET;
- __raw_writel(value, EXYNOS5_AUTO_WDTRESET_DISABLE);
+ __raw_writel(value, pmu_base + EXYNOS5_AUTO_WDTRESET_DISABLE);
- value = __raw_readl(EXYNOS5_MASK_WDTRESET_REQUEST);
+ value = __raw_readl(pmu_base + EXYNOS5_MASK_WDTRESET_REQUEST);
value &= ~EXYNOS5_SYS_WDTRESET;
- __raw_writel(value, EXYNOS5_MASK_WDTRESET_REQUEST);
+ __raw_writel(value, pmu_base + EXYNOS5_MASK_WDTRESET_REQUEST);
exynos_pmu_config = exynos5250_pmu_config;
pr_info("EXYNOS5250 PMU Initialize\n");
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index bfebe84..7f3bf65 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -14,290 +14,288 @@
#include <mach/map.h>
-#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
-
-#define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200)
+#define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
#define S5P_CENTRAL_LOWPWR_CFG (1 << 16)
-#define S5P_CENTRAL_SEQ_OPTION S5P_PMUREG(0x0208)
+#define S5P_CENTRAL_SEQ_OPTION 0x0208
#define S5P_USE_STANDBY_WFI0 (1 << 16)
#define S5P_USE_STANDBY_WFE0 (1 << 24)
-#define EXYNOS_SWRESET S5P_PMUREG(0x0400)
-#define EXYNOS5440_SWRESET S5P_PMUREG(0x00C4)
+#define EXYNOS_SWRESET 0x0400
+#define EXYNOS5440_SWRESET 0x00C4
-#define S5P_WAKEUP_STAT S5P_PMUREG(0x0600)
-#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604)
-#define S5P_WAKEUP_MASK S5P_PMUREG(0x0608)
+#define S5P_WAKEUP_STAT 0x0600
+#define S5P_EINT_WAKEUP_MASK 0x0604
+#define S5P_WAKEUP_MASK 0x0608
-#define S5P_INFORM0 S5P_PMUREG(0x0800)
-#define S5P_INFORM1 S5P_PMUREG(0x0804)
-#define S5P_INFORM5 S5P_PMUREG(0x0814)
-#define S5P_INFORM6 S5P_PMUREG(0x0818)
-#define S5P_INFORM7 S5P_PMUREG(0x081C)
+#define S5P_INFORM0 0x0800
+#define S5P_INFORM1 0x0804
+#define S5P_INFORM5 0x0814
+#define S5P_INFORM6 0x0818
+#define S5P_INFORM7 0x081C
-#define S5P_ARM_CORE0_LOWPWR S5P_PMUREG(0x1000)
-#define S5P_DIS_IRQ_CORE0 S5P_PMUREG(0x1004)
-#define S5P_DIS_IRQ_CENTRAL0 S5P_PMUREG(0x1008)
-#define S5P_ARM_CORE1_LOWPWR S5P_PMUREG(0x1010)
-#define S5P_DIS_IRQ_CORE1 S5P_PMUREG(0x1014)
-#define S5P_DIS_IRQ_CENTRAL1 S5P_PMUREG(0x1018)
-#define S5P_ARM_COMMON_LOWPWR S5P_PMUREG(0x1080)
-#define S5P_L2_0_LOWPWR S5P_PMUREG(0x10C0)
-#define S5P_L2_1_LOWPWR S5P_PMUREG(0x10C4)
-#define S5P_CMU_ACLKSTOP_LOWPWR S5P_PMUREG(0x1100)
-#define S5P_CMU_SCLKSTOP_LOWPWR S5P_PMUREG(0x1104)
-#define S5P_CMU_RESET_LOWPWR S5P_PMUREG(0x110C)
-#define S5P_APLL_SYSCLK_LOWPWR S5P_PMUREG(0x1120)
-#define S5P_MPLL_SYSCLK_LOWPWR S5P_PMUREG(0x1124)
-#define S5P_VPLL_SYSCLK_LOWPWR S5P_PMUREG(0x1128)
-#define S5P_EPLL_SYSCLK_LOWPWR S5P_PMUREG(0x112C)
-#define S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR S5P_PMUREG(0x1138)
-#define S5P_CMU_RESET_GPSALIVE_LOWPWR S5P_PMUREG(0x113C)
-#define S5P_CMU_CLKSTOP_CAM_LOWPWR S5P_PMUREG(0x1140)
-#define S5P_CMU_CLKSTOP_TV_LOWPWR S5P_PMUREG(0x1144)
-#define S5P_CMU_CLKSTOP_MFC_LOWPWR S5P_PMUREG(0x1148)
-#define S5P_CMU_CLKSTOP_G3D_LOWPWR S5P_PMUREG(0x114C)
-#define S5P_CMU_CLKSTOP_LCD0_LOWPWR S5P_PMUREG(0x1150)
-#define S5P_CMU_CLKSTOP_MAUDIO_LOWPWR S5P_PMUREG(0x1158)
-#define S5P_CMU_CLKSTOP_GPS_LOWPWR S5P_PMUREG(0x115C)
-#define S5P_CMU_RESET_CAM_LOWPWR S5P_PMUREG(0x1160)
-#define S5P_CMU_RESET_TV_LOWPWR S5P_PMUREG(0x1164)
-#define S5P_CMU_RESET_MFC_LOWPWR S5P_PMUREG(0x1168)
-#define S5P_CMU_RESET_G3D_LOWPWR S5P_PMUREG(0x116C)
-#define S5P_CMU_RESET_LCD0_LOWPWR S5P_PMUREG(0x1170)
-#define S5P_CMU_RESET_MAUDIO_LOWPWR S5P_PMUREG(0x1178)
-#define S5P_CMU_RESET_GPS_LOWPWR S5P_PMUREG(0x117C)
-#define S5P_TOP_BUS_LOWPWR S5P_PMUREG(0x1180)
-#define S5P_TOP_RETENTION_LOWPWR S5P_PMUREG(0x1184)
-#define S5P_TOP_PWR_LOWPWR S5P_PMUREG(0x1188)
-#define S5P_LOGIC_RESET_LOWPWR S5P_PMUREG(0x11A0)
-#define S5P_ONENAND_MEM_LOWPWR S5P_PMUREG(0x11C0)
-#define S5P_G2D_ACP_MEM_LOWPWR S5P_PMUREG(0x11C8)
-#define S5P_USBOTG_MEM_LOWPWR S5P_PMUREG(0x11CC)
-#define S5P_HSMMC_MEM_LOWPWR S5P_PMUREG(0x11D0)
-#define S5P_CSSYS_MEM_LOWPWR S5P_PMUREG(0x11D4)
-#define S5P_SECSS_MEM_LOWPWR S5P_PMUREG(0x11D8)
-#define S5P_PAD_RETENTION_DRAM_LOWPWR S5P_PMUREG(0x1200)
-#define S5P_PAD_RETENTION_MAUDIO_LOWPWR S5P_PMUREG(0x1204)
-#define S5P_PAD_RETENTION_GPIO_LOWPWR S5P_PMUREG(0x1220)
-#define S5P_PAD_RETENTION_UART_LOWPWR S5P_PMUREG(0x1224)
-#define S5P_PAD_RETENTION_MMCA_LOWPWR S5P_PMUREG(0x1228)
-#define S5P_PAD_RETENTION_MMCB_LOWPWR S5P_PMUREG(0x122C)
-#define S5P_PAD_RETENTION_EBIA_LOWPWR S5P_PMUREG(0x1230)
-#define S5P_PAD_RETENTION_EBIB_LOWPWR S5P_PMUREG(0x1234)
-#define S5P_PAD_RETENTION_ISOLATION_LOWPWR S5P_PMUREG(0x1240)
-#define S5P_PAD_RETENTION_ALV_SEL_LOWPWR S5P_PMUREG(0x1260)
-#define S5P_XUSBXTI_LOWPWR S5P_PMUREG(0x1280)
-#define S5P_XXTI_LOWPWR S5P_PMUREG(0x1284)
-#define S5P_EXT_REGULATOR_LOWPWR S5P_PMUREG(0x12C0)
-#define S5P_GPIO_MODE_LOWPWR S5P_PMUREG(0x1300)
-#define S5P_GPIO_MODE_MAUDIO_LOWPWR S5P_PMUREG(0x1340)
-#define S5P_CAM_LOWPWR S5P_PMUREG(0x1380)
-#define S5P_TV_LOWPWR S5P_PMUREG(0x1384)
-#define S5P_MFC_LOWPWR S5P_PMUREG(0x1388)
-#define S5P_G3D_LOWPWR S5P_PMUREG(0x138C)
-#define S5P_LCD0_LOWPWR S5P_PMUREG(0x1390)
-#define S5P_MAUDIO_LOWPWR S5P_PMUREG(0x1398)
-#define S5P_GPS_LOWPWR S5P_PMUREG(0x139C)
-#define S5P_GPS_ALIVE_LOWPWR S5P_PMUREG(0x13A0)
+#define S5P_ARM_CORE0_LOWPWR 0x1000
+#define S5P_DIS_IRQ_CORE0 0x1004
+#define S5P_DIS_IRQ_CENTRAL0 0x1008
+#define S5P_ARM_CORE1_LOWPWR 0x1010
+#define S5P_DIS_IRQ_CORE1 0x1014
+#define S5P_DIS_IRQ_CENTRAL1 0x1018
+#define S5P_ARM_COMMON_LOWPWR 0x1080
+#define S5P_L2_0_LOWPWR 0x10C0
+#define S5P_L2_1_LOWPWR 0x10C4
+#define S5P_CMU_ACLKSTOP_LOWPWR 0x1100
+#define S5P_CMU_SCLKSTOP_LOWPWR 0x1104
+#define S5P_CMU_RESET_LOWPWR 0x110C
+#define S5P_APLL_SYSCLK_LOWPWR 0x1120
+#define S5P_MPLL_SYSCLK_LOWPWR 0x1124
+#define S5P_VPLL_SYSCLK_LOWPWR 0x1128
+#define S5P_EPLL_SYSCLK_LOWPWR 0x112C
+#define S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR 0x1138
+#define S5P_CMU_RESET_GPSALIVE_LOWPWR 0x113C
+#define S5P_CMU_CLKSTOP_CAM_LOWPWR 0x1140
+#define S5P_CMU_CLKSTOP_TV_LOWPWR 0x1144
+#define S5P_CMU_CLKSTOP_MFC_LOWPWR 0x1148
+#define S5P_CMU_CLKSTOP_G3D_LOWPWR 0x114C
+#define S5P_CMU_CLKSTOP_LCD0_LOWPWR 0x1150
+#define S5P_CMU_CLKSTOP_MAUDIO_LOWPWR 0x1158
+#define S5P_CMU_CLKSTOP_GPS_LOWPWR 0x115C
+#define S5P_CMU_RESET_CAM_LOWPWR 0x1160
+#define S5P_CMU_RESET_TV_LOWPWR 0x1164
+#define S5P_CMU_RESET_MFC_LOWPWR 0x1168
+#define S5P_CMU_RESET_G3D_LOWPWR 0x116C
+#define S5P_CMU_RESET_LCD0_LOWPWR 0x1170
+#define S5P_CMU_RESET_MAUDIO_LOWPWR 0x1178
+#define S5P_CMU_RESET_GPS_LOWPWR 0x117C
+#define S5P_TOP_BUS_LOWPWR 0x1180
+#define S5P_TOP_RETENTION_LOWPWR 0x1184
+#define S5P_TOP_PWR_LOWPWR 0x1188
+#define S5P_LOGIC_RESET_LOWPWR 0x11A0
+#define S5P_ONENAND_MEM_LOWPWR 0x11C0
+#define S5P_G2D_ACP_MEM_LOWPWR 0x11C8
+#define S5P_USBOTG_MEM_LOWPWR 0x11CC
+#define S5P_HSMMC_MEM_LOWPWR 0x11D0
+#define S5P_CSSYS_MEM_LOWPWR 0x11D4
+#define S5P_SECSS_MEM_LOWPWR 0x11D8
+#define S5P_PAD_RETENTION_DRAM_LOWPWR 0x1200
+#define S5P_PAD_RETENTION_MAUDIO_LOWPWR 0x1204
+#define S5P_PAD_RETENTION_GPIO_LOWPWR 0x1220
+#define S5P_PAD_RETENTION_UART_LOWPWR 0x1224
+#define S5P_PAD_RETENTION_MMCA_LOWPWR 0x1228
+#define S5P_PAD_RETENTION_MMCB_LOWPWR 0x122C
+#define S5P_PAD_RETENTION_EBIA_LOWPWR 0x1230
+#define S5P_PAD_RETENTION_EBIB_LOWPWR 0x1234
+#define S5P_PAD_RETENTION_ISOLATION_LOWPWR 0x1240
+#define S5P_PAD_RETENTION_ALV_SEL_LOWPWR 0x1260
+#define S5P_XUSBXTI_LOWPWR 0x1280
+#define S5P_XXTI_LOWPWR 0x1284
+#define S5P_EXT_REGULATOR_LOWPWR 0x12C0
+#define S5P_GPIO_MODE_LOWPWR 0x1300
+#define S5P_GPIO_MODE_MAUDIO_LOWPWR 0x1340
+#define S5P_CAM_LOWPWR 0x1380
+#define S5P_TV_LOWPWR 0x1384
+#define S5P_MFC_LOWPWR 0x1388
+#define S5P_G3D_LOWPWR 0x138C
+#define S5P_LCD0_LOWPWR 0x1390
+#define S5P_MAUDIO_LOWPWR 0x1398
+#define S5P_GPS_LOWPWR 0x139C
+#define S5P_GPS_ALIVE_LOWPWR 0x13A0
-#define S5P_ARM_CORE1_CONFIGURATION S5P_PMUREG(0x2080)
-#define S5P_ARM_CORE1_STATUS S5P_PMUREG(0x2084)
+#define S5P_ARM_CORE1_CONFIGURATION 0x2080
+#define S5P_ARM_CORE1_STATUS 0x2084
-#define S5P_PAD_RET_MAUDIO_OPTION S5P_PMUREG(0x3028)
-#define S5P_PAD_RET_GPIO_OPTION S5P_PMUREG(0x3108)
-#define S5P_PAD_RET_UART_OPTION S5P_PMUREG(0x3128)
-#define S5P_PAD_RET_MMCA_OPTION S5P_PMUREG(0x3148)
-#define S5P_PAD_RET_MMCB_OPTION S5P_PMUREG(0x3168)
-#define S5P_PAD_RET_EBIA_OPTION S5P_PMUREG(0x3188)
-#define S5P_PAD_RET_EBIB_OPTION S5P_PMUREG(0x31A8)
+#define S5P_PAD_RET_MAUDIO_OPTION 0x3028
+#define S5P_PAD_RET_GPIO_OPTION 0x3108
+#define S5P_PAD_RET_UART_OPTION 0x3128
+#define S5P_PAD_RET_MMCA_OPTION 0x3148
+#define S5P_PAD_RET_MMCB_OPTION 0x3168
+#define S5P_PAD_RET_EBIA_OPTION 0x3188
+#define S5P_PAD_RET_EBIB_OPTION 0x31A8
#define S5P_CORE_LOCAL_PWR_EN 0x3
#define S5P_CHECK_SLEEP 0x00000BAD
/* Only for EXYNOS4210 */
-#define S5P_CMU_CLKSTOP_LCD1_LOWPWR S5P_PMUREG(0x1154)
-#define S5P_CMU_RESET_LCD1_LOWPWR S5P_PMUREG(0x1174)
-#define S5P_MODIMIF_MEM_LOWPWR S5P_PMUREG(0x11C4)
-#define S5P_PCIE_MEM_LOWPWR S5P_PMUREG(0x11E0)
-#define S5P_SATA_MEM_LOWPWR S5P_PMUREG(0x11E4)
-#define S5P_LCD1_LOWPWR S5P_PMUREG(0x1394)
+#define S5P_CMU_CLKSTOP_LCD1_LOWPWR 0x1154
+#define S5P_CMU_RESET_LCD1_LOWPWR 0x1174
+#define S5P_MODIMIF_MEM_LOWPWR 0x11C4
+#define S5P_PCIE_MEM_LOWPWR 0x11E0
+#define S5P_SATA_MEM_LOWPWR 0x11E4
+#define S5P_LCD1_LOWPWR 0x1394
/* Only for EXYNOS4x12 */
-#define S5P_ISP_ARM_LOWPWR S5P_PMUREG(0x1050)
-#define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR S5P_PMUREG(0x1054)
-#define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR S5P_PMUREG(0x1058)
-#define S5P_CMU_ACLKSTOP_COREBLK_LOWPWR S5P_PMUREG(0x1110)
-#define S5P_CMU_SCLKSTOP_COREBLK_LOWPWR S5P_PMUREG(0x1114)
-#define S5P_CMU_RESET_COREBLK_LOWPWR S5P_PMUREG(0x111C)
-#define S5P_MPLLUSER_SYSCLK_LOWPWR S5P_PMUREG(0x1130)
-#define S5P_CMU_CLKSTOP_ISP_LOWPWR S5P_PMUREG(0x1154)
-#define S5P_CMU_RESET_ISP_LOWPWR S5P_PMUREG(0x1174)
-#define S5P_TOP_BUS_COREBLK_LOWPWR S5P_PMUREG(0x1190)
-#define S5P_TOP_RETENTION_COREBLK_LOWPWR S5P_PMUREG(0x1194)
-#define S5P_TOP_PWR_COREBLK_LOWPWR S5P_PMUREG(0x1198)
-#define S5P_OSCCLK_GATE_LOWPWR S5P_PMUREG(0x11A4)
-#define S5P_LOGIC_RESET_COREBLK_LOWPWR S5P_PMUREG(0x11B0)
-#define S5P_OSCCLK_GATE_COREBLK_LOWPWR S5P_PMUREG(0x11B4)
-#define S5P_HSI_MEM_LOWPWR S5P_PMUREG(0x11C4)
-#define S5P_ROTATOR_MEM_LOWPWR S5P_PMUREG(0x11DC)
-#define S5P_PAD_RETENTION_GPIO_COREBLK_LOWPWR S5P_PMUREG(0x123C)
-#define S5P_PAD_ISOLATION_COREBLK_LOWPWR S5P_PMUREG(0x1250)
-#define S5P_GPIO_MODE_COREBLK_LOWPWR S5P_PMUREG(0x1320)
-#define S5P_TOP_ASB_RESET_LOWPWR S5P_PMUREG(0x1344)
-#define S5P_TOP_ASB_ISOLATION_LOWPWR S5P_PMUREG(0x1348)
-#define S5P_ISP_LOWPWR S5P_PMUREG(0x1394)
-#define S5P_DRAM_FREQ_DOWN_LOWPWR S5P_PMUREG(0x13B0)
-#define S5P_DDRPHY_DLLOFF_LOWPWR S5P_PMUREG(0x13B4)
-#define S5P_CMU_SYSCLK_ISP_LOWPWR S5P_PMUREG(0x13B8)
-#define S5P_CMU_SYSCLK_GPS_LOWPWR S5P_PMUREG(0x13BC)
-#define S5P_LPDDR_PHY_DLL_LOCK_LOWPWR S5P_PMUREG(0x13C0)
+#define S5P_ISP_ARM_LOWPWR 0x1050
+#define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR 0x1054
+#define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR 0x1058
+#define S5P_CMU_ACLKSTOP_COREBLK_LOWPWR 0x1110
+#define S5P_CMU_SCLKSTOP_COREBLK_LOWPWR 0x1114
+#define S5P_CMU_RESET_COREBLK_LOWPWR 0x111C
+#define S5P_MPLLUSER_SYSCLK_LOWPWR 0x1130
+#define S5P_CMU_CLKSTOP_ISP_LOWPWR 0x1154
+#define S5P_CMU_RESET_ISP_LOWPWR 0x1174
+#define S5P_TOP_BUS_COREBLK_LOWPWR 0x1190
+#define S5P_TOP_RETENTION_COREBLK_LOWPWR 0x1194
+#define S5P_TOP_PWR_COREBLK_LOWPWR 0x1198
+#define S5P_OSCCLK_GATE_LOWPWR 0x11A4
+#define S5P_LOGIC_RESET_COREBLK_LOWPWR 0x11B0
+#define S5P_OSCCLK_GATE_COREBLK_LOWPWR 0x11B4
+#define S5P_HSI_MEM_LOWPWR 0x11C4
+#define S5P_ROTATOR_MEM_LOWPWR 0x11DC
+#define S5P_PAD_RETENTION_GPIO_COREBLK_LOWPWR 0x123C
+#define S5P_PAD_ISOLATION_COREBLK_LOWPWR 0x1250
+#define S5P_GPIO_MODE_COREBLK_LOWPWR 0x1320
+#define S5P_TOP_ASB_RESET_LOWPWR 0x1344
+#define S5P_TOP_ASB_ISOLATION_LOWPWR 0x1348
+#define S5P_ISP_LOWPWR 0x1394
+#define S5P_DRAM_FREQ_DOWN_LOWPWR 0x13B0
+#define S5P_DDRPHY_DLLOFF_LOWPWR 0x13B4
+#define S5P_CMU_SYSCLK_ISP_LOWPWR 0x13B8
+#define S5P_CMU_SYSCLK_GPS_LOWPWR 0x13BC
+#define S5P_LPDDR_PHY_DLL_LOCK_LOWPWR 0x13C0
-#define S5P_ARM_L2_0_OPTION S5P_PMUREG(0x2608)
-#define S5P_ARM_L2_1_OPTION S5P_PMUREG(0x2628)
-#define S5P_ONENAND_MEM_OPTION S5P_PMUREG(0x2E08)
-#define S5P_HSI_MEM_OPTION S5P_PMUREG(0x2E28)
-#define S5P_G2D_ACP_MEM_OPTION S5P_PMUREG(0x2E48)
-#define S5P_USBOTG_MEM_OPTION S5P_PMUREG(0x2E68)
-#define S5P_HSMMC_MEM_OPTION S5P_PMUREG(0x2E88)
-#define S5P_CSSYS_MEM_OPTION S5P_PMUREG(0x2EA8)
-#define S5P_SECSS_MEM_OPTION S5P_PMUREG(0x2EC8)
-#define S5P_ROTATOR_MEM_OPTION S5P_PMUREG(0x2F48)
+#define S5P_ARM_L2_0_OPTION 0x2608
+#define S5P_ARM_L2_1_OPTION 0x2628
+#define S5P_ONENAND_MEM_OPTION 0x2E08
+#define S5P_HSI_MEM_OPTION 0x2E28
+#define S5P_G2D_ACP_MEM_OPTION 0x2E48
+#define S5P_USBOTG_MEM_OPTION 0x2E68
+#define S5P_HSMMC_MEM_OPTION 0x2E88
+#define S5P_CSSYS_MEM_OPTION 0x2EA8
+#define S5P_SECSS_MEM_OPTION 0x2EC8
+#define S5P_ROTATOR_MEM_OPTION 0x2F48
/* Only for EXYNOS4412 */
-#define S5P_ARM_CORE2_LOWPWR S5P_PMUREG(0x1020)
-#define S5P_DIS_IRQ_CORE2 S5P_PMUREG(0x1024)
-#define S5P_DIS_IRQ_CENTRAL2 S5P_PMUREG(0x1028)
-#define S5P_ARM_CORE3_LOWPWR S5P_PMUREG(0x1030)
-#define S5P_DIS_IRQ_CORE3 S5P_PMUREG(0x1034)
-#define S5P_DIS_IRQ_CENTRAL3 S5P_PMUREG(0x1038)
+#define S5P_ARM_CORE2_LOWPWR 0x1020
+#define S5P_DIS_IRQ_CORE2 0x1024
+#define S5P_DIS_IRQ_CENTRAL2 0x1028
+#define S5P_ARM_CORE3_LOWPWR 0x1030
+#define S5P_DIS_IRQ_CORE3 0x1034
+#define S5P_DIS_IRQ_CENTRAL3 0x1038
/* For EXYNOS5 */
-#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
-#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
+#define EXYNOS5_AUTO_WDTRESET_DISABLE 0x0408
+#define EXYNOS5_MASK_WDTRESET_REQUEST 0x040C
#define EXYNOS5_SYS_WDTRESET (1 << 20)
-#define EXYNOS5_ARM_CORE0_SYS_PWR_REG S5P_PMUREG(0x1000)
-#define EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1004)
-#define EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1008)
-#define EXYNOS5_ARM_CORE1_SYS_PWR_REG S5P_PMUREG(0x1010)
-#define EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1014)
-#define EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1018)
-#define EXYNOS5_FSYS_ARM_SYS_PWR_REG S5P_PMUREG(0x1040)
-#define EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1048)
-#define EXYNOS5_ISP_ARM_SYS_PWR_REG S5P_PMUREG(0x1050)
-#define EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1054)
-#define EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1058)
-#define EXYNOS5_ARM_COMMON_SYS_PWR_REG S5P_PMUREG(0x1080)
-#define EXYNOS5_ARM_L2_SYS_PWR_REG S5P_PMUREG(0x10C0)
-#define EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG S5P_PMUREG(0x1100)
-#define EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG S5P_PMUREG(0x1104)
-#define EXYNOS5_CMU_RESET_SYS_PWR_REG S5P_PMUREG(0x110C)
-#define EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1120)
-#define EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1124)
-#define EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x112C)
-#define EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG S5P_PMUREG(0x1130)
-#define EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG S5P_PMUREG(0x1134)
-#define EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG S5P_PMUREG(0x1138)
-#define EXYNOS5_APLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1140)
-#define EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1144)
-#define EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1148)
-#define EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x114C)
-#define EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1150)
-#define EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1154)
-#define EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1164)
-#define EXYNOS5_BPLLUSER_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1170)
-#define EXYNOS5_TOP_BUS_SYS_PWR_REG S5P_PMUREG(0x1180)
-#define EXYNOS5_TOP_RETENTION_SYS_PWR_REG S5P_PMUREG(0x1184)
-#define EXYNOS5_TOP_PWR_SYS_PWR_REG S5P_PMUREG(0x1188)
-#define EXYNOS5_TOP_BUS_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1190)
-#define EXYNOS5_TOP_RETENTION_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1194)
-#define EXYNOS5_TOP_PWR_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1198)
-#define EXYNOS5_LOGIC_RESET_SYS_PWR_REG S5P_PMUREG(0x11A0)
-#define EXYNOS5_OSCCLK_GATE_SYS_PWR_REG S5P_PMUREG(0x11A4)
-#define EXYNOS5_LOGIC_RESET_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x11B0)
-#define EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x11B4)
-#define EXYNOS5_USBOTG_MEM_SYS_PWR_REG S5P_PMUREG(0x11C0)
-#define EXYNOS5_G2D_MEM_SYS_PWR_REG S5P_PMUREG(0x11C8)
-#define EXYNOS5_USBDRD_MEM_SYS_PWR_REG S5P_PMUREG(0x11CC)
-#define EXYNOS5_SDMMC_MEM_SYS_PWR_REG S5P_PMUREG(0x11D0)
-#define EXYNOS5_CSSYS_MEM_SYS_PWR_REG S5P_PMUREG(0x11D4)
-#define EXYNOS5_SECSS_MEM_SYS_PWR_REG S5P_PMUREG(0x11D8)
-#define EXYNOS5_ROTATOR_MEM_SYS_PWR_REG S5P_PMUREG(0x11DC)
-#define EXYNOS5_INTRAM_MEM_SYS_PWR_REG S5P_PMUREG(0x11E0)
-#define EXYNOS5_INTROM_MEM_SYS_PWR_REG S5P_PMUREG(0x11E4)
-#define EXYNOS5_JPEG_MEM_SYS_PWR_REG S5P_PMUREG(0x11E8)
-#define EXYNOS5_HSI_MEM_SYS_PWR_REG S5P_PMUREG(0x11EC)
-#define EXYNOS5_MCUIOP_MEM_SYS_PWR_REG S5P_PMUREG(0x11F4)
-#define EXYNOS5_SATA_MEM_SYS_PWR_REG S5P_PMUREG(0x11FC)
-#define EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG S5P_PMUREG(0x1200)
-#define EXYNOS5_PAD_RETENTION_MAU_SYS_PWR_REG S5P_PMUREG(0x1204)
-#define EXYNOS5_PAD_RETENTION_EFNAND_SYS_PWR_REG S5P_PMUREG(0x1208)
-#define EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG S5P_PMUREG(0x1220)
-#define EXYNOS5_PAD_RETENTION_UART_SYS_PWR_REG S5P_PMUREG(0x1224)
-#define EXYNOS5_PAD_RETENTION_MMCA_SYS_PWR_REG S5P_PMUREG(0x1228)
-#define EXYNOS5_PAD_RETENTION_MMCB_SYS_PWR_REG S5P_PMUREG(0x122C)
-#define EXYNOS5_PAD_RETENTION_EBIA_SYS_PWR_REG S5P_PMUREG(0x1230)
-#define EXYNOS5_PAD_RETENTION_EBIB_SYS_PWR_REG S5P_PMUREG(0x1234)
-#define EXYNOS5_PAD_RETENTION_SPI_SYS_PWR_REG S5P_PMUREG(0x1238)
-#define EXYNOS5_PAD_RETENTION_GPIO_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x123C)
-#define EXYNOS5_PAD_ISOLATION_SYS_PWR_REG S5P_PMUREG(0x1240)
-#define EXYNOS5_PAD_ISOLATION_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1250)
-#define EXYNOS5_PAD_ALV_SEL_SYS_PWR_REG S5P_PMUREG(0x1260)
-#define EXYNOS5_XUSBXTI_SYS_PWR_REG S5P_PMUREG(0x1280)
-#define EXYNOS5_XXTI_SYS_PWR_REG S5P_PMUREG(0x1284)
-#define EXYNOS5_EXT_REGULATOR_SYS_PWR_REG S5P_PMUREG(0x12C0)
-#define EXYNOS5_GPIO_MODE_SYS_PWR_REG S5P_PMUREG(0x1300)
-#define EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1320)
-#define EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG S5P_PMUREG(0x1340)
-#define EXYNOS5_TOP_ASB_RESET_SYS_PWR_REG S5P_PMUREG(0x1344)
-#define EXYNOS5_TOP_ASB_ISOLATION_SYS_PWR_REG S5P_PMUREG(0x1348)
-#define EXYNOS5_GSCL_SYS_PWR_REG S5P_PMUREG(0x1400)
-#define EXYNOS5_ISP_SYS_PWR_REG S5P_PMUREG(0x1404)
-#define EXYNOS5_MFC_SYS_PWR_REG S5P_PMUREG(0x1408)
-#define EXYNOS5_G3D_SYS_PWR_REG S5P_PMUREG(0x140C)
-#define EXYNOS5_DISP1_SYS_PWR_REG S5P_PMUREG(0x1414)
-#define EXYNOS5_MAU_SYS_PWR_REG S5P_PMUREG(0x1418)
-#define EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG S5P_PMUREG(0x1480)
-#define EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG S5P_PMUREG(0x1484)
-#define EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG S5P_PMUREG(0x1488)
-#define EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG S5P_PMUREG(0x148C)
-#define EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG S5P_PMUREG(0x1494)
-#define EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG S5P_PMUREG(0x1498)
-#define EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG S5P_PMUREG(0x14C0)
-#define EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG S5P_PMUREG(0x14C4)
-#define EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG S5P_PMUREG(0x14C8)
-#define EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG S5P_PMUREG(0x14CC)
-#define EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG S5P_PMUREG(0x14D4)
-#define EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG S5P_PMUREG(0x14D8)
-#define EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG S5P_PMUREG(0x1580)
-#define EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG S5P_PMUREG(0x1584)
-#define EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG S5P_PMUREG(0x1588)
-#define EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG S5P_PMUREG(0x158C)
-#define EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG S5P_PMUREG(0x1594)
-#define EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG S5P_PMUREG(0x1598)
+#define EXYNOS5_ARM_CORE0_SYS_PWR_REG 0x1000
+#define EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG 0x1004
+#define EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG 0x1008
+#define EXYNOS5_ARM_CORE1_SYS_PWR_REG 0x1010
+#define EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG 0x1014
+#define EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG 0x1018
+#define EXYNOS5_FSYS_ARM_SYS_PWR_REG 0x1040
+#define EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG 0x1048
+#define EXYNOS5_ISP_ARM_SYS_PWR_REG 0x1050
+#define EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG 0x1054
+#define EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG 0x1058
+#define EXYNOS5_ARM_COMMON_SYS_PWR_REG 0x1080
+#define EXYNOS5_ARM_L2_SYS_PWR_REG 0x10C0
+#define EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG 0x1100
+#define EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG 0x1104
+#define EXYNOS5_CMU_RESET_SYS_PWR_REG 0x110C
+#define EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG 0x1120
+#define EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG 0x1124
+#define EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG 0x112C
+#define EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG 0x1130
+#define EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG 0x1134
+#define EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG 0x1138
+#define EXYNOS5_APLL_SYSCLK_SYS_PWR_REG 0x1140
+#define EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG 0x1144
+#define EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG 0x1148
+#define EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG 0x114C
+#define EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG 0x1150
+#define EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG 0x1154
+#define EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG 0x1164
+#define EXYNOS5_BPLLUSER_SYSCLK_SYS_PWR_REG 0x1170
+#define EXYNOS5_TOP_BUS_SYS_PWR_REG 0x1180
+#define EXYNOS5_TOP_RETENTION_SYS_PWR_REG 0x1184
+#define EXYNOS5_TOP_PWR_SYS_PWR_REG 0x1188
+#define EXYNOS5_TOP_BUS_SYSMEM_SYS_PWR_REG 0x1190
+#define EXYNOS5_TOP_RETENTION_SYSMEM_SYS_PWR_REG 0x1194
+#define EXYNOS5_TOP_PWR_SYSMEM_SYS_PWR_REG 0x1198
+#define EXYNOS5_LOGIC_RESET_SYS_PWR_REG 0x11A0
+#define EXYNOS5_OSCCLK_GATE_SYS_PWR_REG 0x11A4
+#define EXYNOS5_LOGIC_RESET_SYSMEM_SYS_PWR_REG 0x11B0
+#define EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG 0x11B4
+#define EXYNOS5_USBOTG_MEM_SYS_PWR_REG 0x11C0
+#define EXYNOS5_G2D_MEM_SYS_PWR_REG 0x11C8
+#define EXYNOS5_USBDRD_MEM_SYS_PWR_REG 0x11CC
+#define EXYNOS5_SDMMC_MEM_SYS_PWR_REG 0x11D0
+#define EXYNOS5_CSSYS_MEM_SYS_PWR_REG 0x11D4
+#define EXYNOS5_SECSS_MEM_SYS_PWR_REG 0x11D8
+#define EXYNOS5_ROTATOR_MEM_SYS_PWR_REG 0x11DC
+#define EXYNOS5_INTRAM_MEM_SYS_PWR_REG 0x11E0
+#define EXYNOS5_INTROM_MEM_SYS_PWR_REG 0x11E4
+#define EXYNOS5_JPEG_MEM_SYS_PWR_REG 0x11E8
+#define EXYNOS5_HSI_MEM_SYS_PWR_REG 0x11EC
+#define EXYNOS5_MCUIOP_MEM_SYS_PWR_REG 0x11F4
+#define EXYNOS5_SATA_MEM_SYS_PWR_REG 0x11FC
+#define EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG 0x1200
+#define EXYNOS5_PAD_RETENTION_MAU_SYS_PWR_REG 0x1204
+#define EXYNOS5_PAD_RETENTION_EFNAND_SYS_PWR_REG 0x1208
+#define EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG 0x1220
+#define EXYNOS5_PAD_RETENTION_UART_SYS_PWR_REG 0x1224
+#define EXYNOS5_PAD_RETENTION_MMCA_SYS_PWR_REG 0x1228
+#define EXYNOS5_PAD_RETENTION_MMCB_SYS_PWR_REG 0x122C
+#define EXYNOS5_PAD_RETENTION_EBIA_SYS_PWR_REG 0x1230
+#define EXYNOS5_PAD_RETENTION_EBIB_SYS_PWR_REG 0x1234
+#define EXYNOS5_PAD_RETENTION_SPI_SYS_PWR_REG 0x1238
+#define EXYNOS5_PAD_RETENTION_GPIO_SYSMEM_SYS_PWR_REG 0x123C
+#define EXYNOS5_PAD_ISOLATION_SYS_PWR_REG 0x1240
+#define EXYNOS5_PAD_ISOLATION_SYSMEM_SYS_PWR_REG 0x1250
+#define EXYNOS5_PAD_ALV_SEL_SYS_PWR_REG 0x1260
+#define EXYNOS5_XUSBXTI_SYS_PWR_REG 0x1280
+#define EXYNOS5_XXTI_SYS_PWR_REG 0x1284
+#define EXYNOS5_EXT_REGULATOR_SYS_PWR_REG 0x12C0
+#define EXYNOS5_GPIO_MODE_SYS_PWR_REG 0x1300
+#define EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG 0x1320
+#define EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG 0x1340
+#define EXYNOS5_TOP_ASB_RESET_SYS_PWR_REG 0x1344
+#define EXYNOS5_TOP_ASB_ISOLATION_SYS_PWR_REG 0x1348
+#define EXYNOS5_GSCL_SYS_PWR_REG 0x1400
+#define EXYNOS5_ISP_SYS_PWR_REG 0x1404
+#define EXYNOS5_MFC_SYS_PWR_REG 0x1408
+#define EXYNOS5_G3D_SYS_PWR_REG 0x140C
+#define EXYNOS5_DISP1_SYS_PWR_REG 0x1414
+#define EXYNOS5_MAU_SYS_PWR_REG 0x1418
+#define EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG 0x1480
+#define EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG 0x1484
+#define EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG 0x1488
+#define EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG 0x148C
+#define EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG 0x1494
+#define EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG 0x1498
+#define EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG 0x14C0
+#define EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG 0x14C4
+#define EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG 0x14C8
+#define EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG 0x14CC
+#define EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG 0x14D4
+#define EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG 0x14D8
+#define EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG 0x1580
+#define EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG 0x1584
+#define EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG 0x1588
+#define EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG 0x158C
+#define EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG 0x1594
+#define EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG 0x1598
-#define EXYNOS5_ARM_CORE0_OPTION S5P_PMUREG(0x2008)
-#define EXYNOS5_ARM_CORE1_OPTION S5P_PMUREG(0x2088)
-#define EXYNOS5_FSYS_ARM_OPTION S5P_PMUREG(0x2208)
-#define EXYNOS5_ISP_ARM_OPTION S5P_PMUREG(0x2288)
-#define EXYNOS5_ARM_COMMON_OPTION S5P_PMUREG(0x2408)
-#define EXYNOS5_ARM_L2_OPTION S5P_PMUREG(0x2608)
-#define EXYNOS5_TOP_PWR_OPTION S5P_PMUREG(0x2C48)
-#define EXYNOS5_TOP_PWR_SYSMEM_OPTION S5P_PMUREG(0x2CC8)
-#define EXYNOS5_JPEG_MEM_OPTION S5P_PMUREG(0x2F48)
-#define EXYNOS5_GSCL_OPTION S5P_PMUREG(0x4008)
-#define EXYNOS5_ISP_OPTION S5P_PMUREG(0x4028)
-#define EXYNOS5_MFC_OPTION S5P_PMUREG(0x4048)
-#define EXYNOS5_G3D_OPTION S5P_PMUREG(0x4068)
-#define EXYNOS5_DISP1_OPTION S5P_PMUREG(0x40A8)
-#define EXYNOS5_MAU_OPTION S5P_PMUREG(0x40C8)
+#define EXYNOS5_ARM_CORE0_OPTION 0x2008
+#define EXYNOS5_ARM_CORE1_OPTION 0x2088
+#define EXYNOS5_FSYS_ARM_OPTION 0x2208
+#define EXYNOS5_ISP_ARM_OPTION 0x2288
+#define EXYNOS5_ARM_COMMON_OPTION 0x2408
+#define EXYNOS5_ARM_L2_OPTION 0x2608
+#define EXYNOS5_TOP_PWR_OPTION 0x2C48
+#define EXYNOS5_TOP_PWR_SYSMEM_OPTION 0x2CC8
+#define EXYNOS5_JPEG_MEM_OPTION 0x2F48
+#define EXYNOS5_GSCL_OPTION 0x4008
+#define EXYNOS5_ISP_OPTION 0x4028
+#define EXYNOS5_MFC_OPTION 0x4048
+#define EXYNOS5_G3D_OPTION 0x4068
+#define EXYNOS5_DISP1_OPTION 0x40A8
+#define EXYNOS5_MAU_OPTION 0x40C8
#define EXYNOS5_USE_SC_FEEDBACK (1 << 1)
#define EXYNOS5_USE_SC_COUNTER (1 << 0)
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH 07/10] ARM: EXYNOS: Refactored code for PMU register mapping via DT
@ 2014-04-02 7:50 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-02 7:50 UTC (permalink / raw)
To: linux-arm-kernel
This patch removes PMU register mapping via iodesc table and updates
users of PMU registers for using "get_exynos_pmubase" helper function to
get PMU base address.
CC: Tomasz Figa <t.figa@samsung.com>
CC: Kyungmin Park <kyungmin.park@samsung.com>
CC: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Younggun Jang <yg1004.jang@samsung.com>
---
arch/arm/mach-exynos/common.h | 4 +-
arch/arm/mach-exynos/cpuidle.c | 28 +-
arch/arm/mach-exynos/exynos.c | 12 +-
arch/arm/mach-exynos/hotplug.c | 4 +-
arch/arm/mach-exynos/include/mach/map.h | 3 -
arch/arm/mach-exynos/platsmp.c | 12 +-
arch/arm/mach-exynos/pm.c | 53 ++--
arch/arm/mach-exynos/pmu.c | 34 ++-
arch/arm/mach-exynos/regs-pmu.h | 506 +++++++++++++++----------------
9 files changed, 332 insertions(+), 324 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 9a55cf6..645f4f8 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -44,7 +44,7 @@ extern void exynos_cpu_die(unsigned int cpu);
/* PMU(Power Management Unit) support */
-#define PMU_TABLE_END NULL
+#define PMU_TABLE_END 0xFFFF
enum sys_powerdown {
SYS_AFTR,
@@ -55,7 +55,7 @@ enum sys_powerdown {
extern unsigned long l2x0_regs_phys;
struct exynos_pmu_conf {
- void __iomem *reg;
+ unsigned int offset;
unsigned int val[NUM_SYS_POWERDOWN];
};
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index b9dd8c3..dcf563d 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -31,11 +31,15 @@
#include "common.h"
#define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
- S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
- (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
+ get_exynos_pmubase() + S5P_INFORM7 : \
+ (samsung_rev() == EXYNOS4210_REV_1_0 ? \
+ (S5P_VA_SYSRAM + 0x24) : \
+ get_exynos_pmubase() + S5P_INFORM0))
#define REG_DIRECTGO_FLAG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
- S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
- (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
+ get_exynos_pmubase() + S5P_INFORM6 : \
+ (samsung_rev() == EXYNOS4210_REV_1_0 ? \
+ (S5P_VA_SYSRAM + 0x20) : \
+ get_exynos_pmubase() + S5P_INFORM1))
#define S5P_CHECK_AFTR 0xFCBA0D10
@@ -58,6 +62,8 @@
#define PWR_CTRL2_CORE2_UP_RATIO (1 << 4)
#define PWR_CTRL2_CORE1_UP_RATIO (1 << 0)
+static void __iomem *pmu_base;
+
static int exynos4_enter_lowpower(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index);
@@ -85,7 +91,7 @@ static struct cpuidle_driver exynos4_idle_driver = {
/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
static void exynos4_set_wakeupmask(void)
{
- __raw_writel(0x0000ff3e, S5P_WAKEUP_MASK);
+ __raw_writel(0x0000ff3e, pmu_base + S5P_WAKEUP_MASK);
}
static unsigned int g_pwr_ctrl, g_diag_reg;
@@ -131,9 +137,9 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
save_cpu_arch_register();
/* Setting Central Sequence Register for power down mode */
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ tmp = __raw_readl(pmu_base + S5P_CENTRAL_SEQ_CONFIGURATION);
tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ __raw_writel(tmp, pmu_base + S5P_CENTRAL_SEQ_CONFIGURATION);
cpu_pm_enter();
cpu_suspend(0, idle_finisher);
@@ -152,14 +158,14 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
* S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
* in this situation.
*/
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ tmp = __raw_readl(pmu_base + S5P_CENTRAL_SEQ_CONFIGURATIO);
if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
tmp |= S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ __raw_writel(tmp, pmu_base + S5P_CENTRAL_SEQ_CONFIGURATION);
}
/* Clear wakeup state register */
- __raw_writel(0x0, S5P_WAKEUP_STAT);
+ __raw_writel(0x0, pmu_base + S5P_WAKEUP_STAT);
return index;
}
@@ -217,6 +223,8 @@ static int exynos_cpuidle_probe(struct platform_device *pdev)
int cpu_id, ret;
struct cpuidle_device *device;
+ pmu_base = get_exynos_pmubase();
+
if (soc_is_exynos5250())
exynos5_core_down_clk();
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index a5127fb..68e7612 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -64,11 +64,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
.length = SZ_4K,
.type = MT_DEVICE,
}, {
- .virtual = (unsigned long)S5P_VA_PMU,
- .pfn = __phys_to_pfn(EXYNOS4_PA_PMU),
- .length = SZ_64K,
- .type = MT_DEVICE,
- }, {
.virtual = (unsigned long)S5P_VA_COMBINER_BASE,
.pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
.length = SZ_4K,
@@ -192,11 +187,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
.pfn = __phys_to_pfn(EXYNOS5_PA_CMU),
.length = 144 * SZ_1K,
.type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)S5P_VA_PMU,
- .pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
- .length = SZ_64K,
- .type = MT_DEVICE,
},
};
@@ -204,7 +194,7 @@ void exynos_restart(enum reboot_mode mode, const char *cmd)
{
struct device_node *np;
u32 val = 0x1;
- void __iomem *addr = EXYNOS_SWRESET;
+ void __iomem *addr = get_exynos_pmubase() + EXYNOS_SWRESET;
if (of_machine_is_compatible("samsung,exynos5440")) {
u32 status;
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 33db6ee..94ab653 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -91,11 +91,13 @@ static inline void cpu_leave_lowpower(void)
static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
{
+ void __iomem *pmu_base = get_exynos_pmubase();
+
for (;;) {
/* make cpu1 to be turned off at next WFI command */
if (cpu == 1)
- __raw_writel(0, S5P_ARM_CORE1_CONFIGURATION);
+ __raw_writel(0, pmu_base + S5P_ARM_CORE1_CONFIGURATION);
/*
* here's the WFI
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 7b046b5..1ba7fb5 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -35,9 +35,6 @@
#define EXYNOS4_PA_SYSCON 0x10010000
#define EXYNOS5_PA_SYSCON 0x10050100
-#define EXYNOS4_PA_PMU 0x10020000
-#define EXYNOS5_PA_PMU 0x10040000
-
#define EXYNOS4_PA_CMU 0x10030000
#define EXYNOS5_PA_CMU 0x10010000
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 3ebb03f..19c2a50 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -31,11 +31,12 @@
#include "common.h"
extern void exynos4_secondary_startup(void);
+static void __iomem *pmu_base;
static inline void __iomem *cpu_boot_reg_base(void)
{
if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
- return S5P_INFORM5;
+ return pmu_base + S5P_INFORM5;
return S5P_VA_SYSRAM;
}
@@ -90,6 +91,8 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
unsigned long timeout;
unsigned long phys_cpu = cpu_logical_map(cpu);
+ pmu_base = get_exynos_pmubase();
+
/*
* Set synchronisation state between this boot processor
* and the secondary one
@@ -106,14 +109,15 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
*/
write_pen_release(phys_cpu);
- if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
+ if (!(__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
+ & S5P_CORE_LOCAL_PWR_EN)) {
__raw_writel(S5P_CORE_LOCAL_PWR_EN,
- S5P_ARM_CORE1_CONFIGURATION);
+ pmu_base + S5P_ARM_CORE1_CONFIGURATION);
timeout = 10;
/* wait max 10 ms until cpu1 is on */
- while ((__raw_readl(S5P_ARM_CORE1_STATUS)
+ while ((__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
& S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
if (timeout-- == 0)
break;
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 875151f..6c147c9 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -119,32 +119,37 @@ static int exynos_cpu_suspend(unsigned long arg)
return 1; /* Aborting suspend */
}
+static void __iomem *pmu_base;
+
static void exynos_pm_prepare(void)
{
unsigned int tmp;
/* Set wake-up mask registers */
- __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
- __raw_writel(exynos_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
+ __raw_writel(exynos_get_eint_wake_mask(),
+ pmu_base + S5P_EINT_WAKEUP_MASK);
+ __raw_writel(exynos_irqwake_intmask & ~(1 << 31),
+ pmu_base + S5P_WAKEUP_MASK);
s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
if (soc_is_exynos5250()) {
s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
/* Disable USE_RETENTION of JPEG_MEM_OPTION */
- tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
+ tmp = __raw_readl(pmu_base + EXYNOS5_JPEG_MEM_OPTION);
tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
- __raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION);
+ __raw_writel(tmp, pmu_base + EXYNOS5_JPEG_MEM_OPTION);
}
/* Set value of power down register for sleep mode */
exynos_sys_powerdown_conf(SYS_SLEEP);
- __raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1);
+ __raw_writel(S5P_CHECK_SLEEP, pmu_base + S5P_INFORM1);
/* ensure@least INFORM0 has the resume address */
- __raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
+ __raw_writel(virt_to_phys(exynos_cpu_resume),
+ pmu_base + S5P_INFORM0);
}
static int exynos_pm_suspend(void)
@@ -153,14 +158,14 @@ static int exynos_pm_suspend(void)
/* Setting Central Sequence Register for power down mode */
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ tmp = __raw_readl(pmu_base + S5P_CENTRAL_SEQ_CONFIGURATION);
tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ __raw_writel(tmp, pmu_base + S5P_CENTRAL_SEQ_CONFIGURATION);
/* Setting SEQ_OPTION register */
tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
- __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
+ __raw_writel(tmp, pmu_base + S5P_CENTRAL_SEQ_OPTION);
if (!soc_is_exynos5250()) {
/* Save Power control register */
@@ -187,12 +192,12 @@ static void exynos_pm_resume(void)
* S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
* in this situation.
*/
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ tmp = __raw_readl(pmu_base + S5P_CENTRAL_SEQ_CONFIGURATION);
if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
tmp |= S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ __raw_writel(tmp, pmu_base + S5P_CENTRAL_SEQ_CONFIGURATION);
/* clear the wakeup state register */
- __raw_writel(0x0, S5P_WAKEUP_STAT);
+ __raw_writel(0x0, pmu_base + S5P_WAKEUP_STAT);
/* No need to perform below restore code */
goto early_wakeup;
}
@@ -212,13 +217,13 @@ static void exynos_pm_resume(void)
/* For release retention */
- __raw_writel((1 << 28), S5P_PAD_RET_MAUDIO_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_GPIO_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_UART_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_MMCA_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_MMCB_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
+ __raw_writel((1 << 28), pmu_base + S5P_PAD_RET_MAUDIO_OPTION);
+ __raw_writel((1 << 28), pmu_base + S5P_PAD_RET_GPIO_OPTION);
+ __raw_writel((1 << 28), pmu_base + S5P_PAD_RET_UART_OPTION);
+ __raw_writel((1 << 28), pmu_base + S5P_PAD_RET_MMCA_OPTION);
+ __raw_writel((1 << 28), pmu_base + S5P_PAD_RET_MMCB_OPTION);
+ __raw_writel((1 << 28), pmu_base + S5P_PAD_RET_EBIA_OPTION);
+ __raw_writel((1 << 28), pmu_base + S5P_PAD_RET_EBIB_OPTION);
if (soc_is_exynos5250())
s3c_pm_do_restore(exynos5_sys_save,
@@ -232,7 +237,7 @@ static void exynos_pm_resume(void)
early_wakeup:
/* Clear SLEEP mode set in INFORM1 */
- __raw_writel(0x0, S5P_INFORM1);
+ __raw_writel(0x0, pmu_base + S5P_INFORM1);
return;
}
@@ -276,7 +281,7 @@ static int exynos_suspend_enter(suspend_state_t state)
s3c_pm_restore_uarts();
S3C_PMDBG("%s: wakeup stat: %08x\n", __func__,
- __raw_readl(S5P_WAKEUP_STAT));
+ __raw_readl(pmu_base + S5P_WAKEUP_STAT));
s3c_pm_check_restore();
@@ -308,13 +313,15 @@ void __init exynos_pm_init(void)
{
u32 tmp;
+ pmu_base = get_exynos_pmubase();
+
/* Platform-specific GIC callback */
gic_arch_extn.irq_set_wake = exynos_irq_set_wake;
/* All wakeup disable */
- tmp = __raw_readl(S5P_WAKEUP_MASK);
+ tmp = __raw_readl(pmu_base + S5P_WAKEUP_MASK);
tmp |= ((0xFF << 8) | (0x1F << 1));
- __raw_writel(tmp, S5P_WAKEUP_MASK);
+ __raw_writel(tmp, pmu_base + S5P_WAKEUP_MASK);
register_syscore_ops(&exynos_pm_syscore_ops);
suspend_set_ops(&exynos_suspend_ops);
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index fb44352..30b20ab 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -18,6 +18,7 @@
#include "common.h"
static const struct exynos_pmu_conf *exynos_pmu_config;
+static void __iomem *pmu_base;
static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
/* { .reg = address, .val = { AFTR, LPA, SLEEP } */
@@ -317,7 +318,7 @@ static const struct exynos_pmu_conf exynos5250_pmu_config[] = {
{ PMU_TABLE_END,},
};
-static void __iomem * const exynos5_list_both_cnt_feed[] = {
+static unsigned int const exynos5_list_both_cnt_feed[] = {
EXYNOS5_ARM_CORE0_OPTION,
EXYNOS5_ARM_CORE1_OPTION,
EXYNOS5_ARM_COMMON_OPTION,
@@ -331,7 +332,7 @@ static void __iomem * const exynos5_list_both_cnt_feed[] = {
EXYNOS5_TOP_PWR_SYSMEM_OPTION,
};
-static void __iomem * const exynos5_list_diable_wfi_wfe[] = {
+static unsigned int const exynos5_list_diable_wfi_wfe[] = {
EXYNOS5_ARM_CORE1_OPTION,
EXYNOS5_FSYS_ARM_OPTION,
EXYNOS5_ISP_ARM_OPTION,
@@ -346,27 +347,27 @@ static void exynos5_init_pmu(void)
* Enable both SC_FEEDBACK and SC_COUNTER
*/
for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
- tmp = __raw_readl(exynos5_list_both_cnt_feed[i]);
+ tmp = __raw_readl(pmu_base + exynos5_list_both_cnt_feed[i]);
tmp |= (EXYNOS5_USE_SC_FEEDBACK |
EXYNOS5_USE_SC_COUNTER);
- __raw_writel(tmp, exynos5_list_both_cnt_feed[i]);
+ __raw_writel(tmp, pmu_base + exynos5_list_both_cnt_feed[i]);
}
/*
* SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
*/
- tmp = __raw_readl(EXYNOS5_ARM_COMMON_OPTION);
+ tmp = __raw_readl(pmu_base + EXYNOS5_ARM_COMMON_OPTION);
tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
- __raw_writel(tmp, EXYNOS5_ARM_COMMON_OPTION);
+ __raw_writel(tmp, pmu_base + EXYNOS5_ARM_COMMON_OPTION);
/*
* Disable WFI/WFE on XXX_OPTION
*/
for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
- tmp = __raw_readl(exynos5_list_diable_wfi_wfe[i]);
+ tmp = __raw_readl(pmu_base + exynos5_list_diable_wfi_wfe[i]);
tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
EXYNOS5_OPTION_USE_STANDBYWFI);
- __raw_writel(tmp, exynos5_list_diable_wfi_wfe[i]);
+ __raw_writel(tmp, pmu_base + exynos5_list_diable_wfi_wfe[i]);
}
}
@@ -377,14 +378,14 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
if (soc_is_exynos5250())
exynos5_init_pmu();
- for (i = 0; (exynos_pmu_config[i].reg != PMU_TABLE_END) ; i++)
+ for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
__raw_writel(exynos_pmu_config[i].val[mode],
- exynos_pmu_config[i].reg);
+ pmu_base + exynos_pmu_config[i].offset);
if (soc_is_exynos4412()) {
- for (i = 0; exynos4412_pmu_config[i].reg != PMU_TABLE_END ; i++)
+ for (i = 0; exynos4412_pmu_config[i].offset != PMU_TABLE_END; i++)
__raw_writel(exynos4412_pmu_config[i].val[mode],
- exynos4412_pmu_config[i].reg);
+ pmu_base + exynos4412_pmu_config[i].offset);
}
}
@@ -393,6 +394,7 @@ static int __init exynos_pmu_init(void)
unsigned int value;
exynos_pmu_config = exynos4210_pmu_config;
+ pmu_base = get_exynos_pmubase();
if (soc_is_exynos4210()) {
exynos_pmu_config = exynos4210_pmu_config;
@@ -405,13 +407,13 @@ static int __init exynos_pmu_init(void)
* When SYS_WDTRESET is set, watchdog timer reset request
* is ignored by power management unit.
*/
- value = __raw_readl(EXYNOS5_AUTO_WDTRESET_DISABLE);
+ value = __raw_readl(pmu_base + EXYNOS5_AUTO_WDTRESET_DISABLE);
value &= ~EXYNOS5_SYS_WDTRESET;
- __raw_writel(value, EXYNOS5_AUTO_WDTRESET_DISABLE);
+ __raw_writel(value, pmu_base + EXYNOS5_AUTO_WDTRESET_DISABLE);
- value = __raw_readl(EXYNOS5_MASK_WDTRESET_REQUEST);
+ value = __raw_readl(pmu_base + EXYNOS5_MASK_WDTRESET_REQUEST);
value &= ~EXYNOS5_SYS_WDTRESET;
- __raw_writel(value, EXYNOS5_MASK_WDTRESET_REQUEST);
+ __raw_writel(value, pmu_base + EXYNOS5_MASK_WDTRESET_REQUEST);
exynos_pmu_config = exynos5250_pmu_config;
pr_info("EXYNOS5250 PMU Initialize\n");
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index bfebe84..7f3bf65 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -14,290 +14,288 @@
#include <mach/map.h>
-#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
-
-#define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200)
+#define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
#define S5P_CENTRAL_LOWPWR_CFG (1 << 16)
-#define S5P_CENTRAL_SEQ_OPTION S5P_PMUREG(0x0208)
+#define S5P_CENTRAL_SEQ_OPTION 0x0208
#define S5P_USE_STANDBY_WFI0 (1 << 16)
#define S5P_USE_STANDBY_WFE0 (1 << 24)
-#define EXYNOS_SWRESET S5P_PMUREG(0x0400)
-#define EXYNOS5440_SWRESET S5P_PMUREG(0x00C4)
+#define EXYNOS_SWRESET 0x0400
+#define EXYNOS5440_SWRESET 0x00C4
-#define S5P_WAKEUP_STAT S5P_PMUREG(0x0600)
-#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604)
-#define S5P_WAKEUP_MASK S5P_PMUREG(0x0608)
+#define S5P_WAKEUP_STAT 0x0600
+#define S5P_EINT_WAKEUP_MASK 0x0604
+#define S5P_WAKEUP_MASK 0x0608
-#define S5P_INFORM0 S5P_PMUREG(0x0800)
-#define S5P_INFORM1 S5P_PMUREG(0x0804)
-#define S5P_INFORM5 S5P_PMUREG(0x0814)
-#define S5P_INFORM6 S5P_PMUREG(0x0818)
-#define S5P_INFORM7 S5P_PMUREG(0x081C)
+#define S5P_INFORM0 0x0800
+#define S5P_INFORM1 0x0804
+#define S5P_INFORM5 0x0814
+#define S5P_INFORM6 0x0818
+#define S5P_INFORM7 0x081C
-#define S5P_ARM_CORE0_LOWPWR S5P_PMUREG(0x1000)
-#define S5P_DIS_IRQ_CORE0 S5P_PMUREG(0x1004)
-#define S5P_DIS_IRQ_CENTRAL0 S5P_PMUREG(0x1008)
-#define S5P_ARM_CORE1_LOWPWR S5P_PMUREG(0x1010)
-#define S5P_DIS_IRQ_CORE1 S5P_PMUREG(0x1014)
-#define S5P_DIS_IRQ_CENTRAL1 S5P_PMUREG(0x1018)
-#define S5P_ARM_COMMON_LOWPWR S5P_PMUREG(0x1080)
-#define S5P_L2_0_LOWPWR S5P_PMUREG(0x10C0)
-#define S5P_L2_1_LOWPWR S5P_PMUREG(0x10C4)
-#define S5P_CMU_ACLKSTOP_LOWPWR S5P_PMUREG(0x1100)
-#define S5P_CMU_SCLKSTOP_LOWPWR S5P_PMUREG(0x1104)
-#define S5P_CMU_RESET_LOWPWR S5P_PMUREG(0x110C)
-#define S5P_APLL_SYSCLK_LOWPWR S5P_PMUREG(0x1120)
-#define S5P_MPLL_SYSCLK_LOWPWR S5P_PMUREG(0x1124)
-#define S5P_VPLL_SYSCLK_LOWPWR S5P_PMUREG(0x1128)
-#define S5P_EPLL_SYSCLK_LOWPWR S5P_PMUREG(0x112C)
-#define S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR S5P_PMUREG(0x1138)
-#define S5P_CMU_RESET_GPSALIVE_LOWPWR S5P_PMUREG(0x113C)
-#define S5P_CMU_CLKSTOP_CAM_LOWPWR S5P_PMUREG(0x1140)
-#define S5P_CMU_CLKSTOP_TV_LOWPWR S5P_PMUREG(0x1144)
-#define S5P_CMU_CLKSTOP_MFC_LOWPWR S5P_PMUREG(0x1148)
-#define S5P_CMU_CLKSTOP_G3D_LOWPWR S5P_PMUREG(0x114C)
-#define S5P_CMU_CLKSTOP_LCD0_LOWPWR S5P_PMUREG(0x1150)
-#define S5P_CMU_CLKSTOP_MAUDIO_LOWPWR S5P_PMUREG(0x1158)
-#define S5P_CMU_CLKSTOP_GPS_LOWPWR S5P_PMUREG(0x115C)
-#define S5P_CMU_RESET_CAM_LOWPWR S5P_PMUREG(0x1160)
-#define S5P_CMU_RESET_TV_LOWPWR S5P_PMUREG(0x1164)
-#define S5P_CMU_RESET_MFC_LOWPWR S5P_PMUREG(0x1168)
-#define S5P_CMU_RESET_G3D_LOWPWR S5P_PMUREG(0x116C)
-#define S5P_CMU_RESET_LCD0_LOWPWR S5P_PMUREG(0x1170)
-#define S5P_CMU_RESET_MAUDIO_LOWPWR S5P_PMUREG(0x1178)
-#define S5P_CMU_RESET_GPS_LOWPWR S5P_PMUREG(0x117C)
-#define S5P_TOP_BUS_LOWPWR S5P_PMUREG(0x1180)
-#define S5P_TOP_RETENTION_LOWPWR S5P_PMUREG(0x1184)
-#define S5P_TOP_PWR_LOWPWR S5P_PMUREG(0x1188)
-#define S5P_LOGIC_RESET_LOWPWR S5P_PMUREG(0x11A0)
-#define S5P_ONENAND_MEM_LOWPWR S5P_PMUREG(0x11C0)
-#define S5P_G2D_ACP_MEM_LOWPWR S5P_PMUREG(0x11C8)
-#define S5P_USBOTG_MEM_LOWPWR S5P_PMUREG(0x11CC)
-#define S5P_HSMMC_MEM_LOWPWR S5P_PMUREG(0x11D0)
-#define S5P_CSSYS_MEM_LOWPWR S5P_PMUREG(0x11D4)
-#define S5P_SECSS_MEM_LOWPWR S5P_PMUREG(0x11D8)
-#define S5P_PAD_RETENTION_DRAM_LOWPWR S5P_PMUREG(0x1200)
-#define S5P_PAD_RETENTION_MAUDIO_LOWPWR S5P_PMUREG(0x1204)
-#define S5P_PAD_RETENTION_GPIO_LOWPWR S5P_PMUREG(0x1220)
-#define S5P_PAD_RETENTION_UART_LOWPWR S5P_PMUREG(0x1224)
-#define S5P_PAD_RETENTION_MMCA_LOWPWR S5P_PMUREG(0x1228)
-#define S5P_PAD_RETENTION_MMCB_LOWPWR S5P_PMUREG(0x122C)
-#define S5P_PAD_RETENTION_EBIA_LOWPWR S5P_PMUREG(0x1230)
-#define S5P_PAD_RETENTION_EBIB_LOWPWR S5P_PMUREG(0x1234)
-#define S5P_PAD_RETENTION_ISOLATION_LOWPWR S5P_PMUREG(0x1240)
-#define S5P_PAD_RETENTION_ALV_SEL_LOWPWR S5P_PMUREG(0x1260)
-#define S5P_XUSBXTI_LOWPWR S5P_PMUREG(0x1280)
-#define S5P_XXTI_LOWPWR S5P_PMUREG(0x1284)
-#define S5P_EXT_REGULATOR_LOWPWR S5P_PMUREG(0x12C0)
-#define S5P_GPIO_MODE_LOWPWR S5P_PMUREG(0x1300)
-#define S5P_GPIO_MODE_MAUDIO_LOWPWR S5P_PMUREG(0x1340)
-#define S5P_CAM_LOWPWR S5P_PMUREG(0x1380)
-#define S5P_TV_LOWPWR S5P_PMUREG(0x1384)
-#define S5P_MFC_LOWPWR S5P_PMUREG(0x1388)
-#define S5P_G3D_LOWPWR S5P_PMUREG(0x138C)
-#define S5P_LCD0_LOWPWR S5P_PMUREG(0x1390)
-#define S5P_MAUDIO_LOWPWR S5P_PMUREG(0x1398)
-#define S5P_GPS_LOWPWR S5P_PMUREG(0x139C)
-#define S5P_GPS_ALIVE_LOWPWR S5P_PMUREG(0x13A0)
+#define S5P_ARM_CORE0_LOWPWR 0x1000
+#define S5P_DIS_IRQ_CORE0 0x1004
+#define S5P_DIS_IRQ_CENTRAL0 0x1008
+#define S5P_ARM_CORE1_LOWPWR 0x1010
+#define S5P_DIS_IRQ_CORE1 0x1014
+#define S5P_DIS_IRQ_CENTRAL1 0x1018
+#define S5P_ARM_COMMON_LOWPWR 0x1080
+#define S5P_L2_0_LOWPWR 0x10C0
+#define S5P_L2_1_LOWPWR 0x10C4
+#define S5P_CMU_ACLKSTOP_LOWPWR 0x1100
+#define S5P_CMU_SCLKSTOP_LOWPWR 0x1104
+#define S5P_CMU_RESET_LOWPWR 0x110C
+#define S5P_APLL_SYSCLK_LOWPWR 0x1120
+#define S5P_MPLL_SYSCLK_LOWPWR 0x1124
+#define S5P_VPLL_SYSCLK_LOWPWR 0x1128
+#define S5P_EPLL_SYSCLK_LOWPWR 0x112C
+#define S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR 0x1138
+#define S5P_CMU_RESET_GPSALIVE_LOWPWR 0x113C
+#define S5P_CMU_CLKSTOP_CAM_LOWPWR 0x1140
+#define S5P_CMU_CLKSTOP_TV_LOWPWR 0x1144
+#define S5P_CMU_CLKSTOP_MFC_LOWPWR 0x1148
+#define S5P_CMU_CLKSTOP_G3D_LOWPWR 0x114C
+#define S5P_CMU_CLKSTOP_LCD0_LOWPWR 0x1150
+#define S5P_CMU_CLKSTOP_MAUDIO_LOWPWR 0x1158
+#define S5P_CMU_CLKSTOP_GPS_LOWPWR 0x115C
+#define S5P_CMU_RESET_CAM_LOWPWR 0x1160
+#define S5P_CMU_RESET_TV_LOWPWR 0x1164
+#define S5P_CMU_RESET_MFC_LOWPWR 0x1168
+#define S5P_CMU_RESET_G3D_LOWPWR 0x116C
+#define S5P_CMU_RESET_LCD0_LOWPWR 0x1170
+#define S5P_CMU_RESET_MAUDIO_LOWPWR 0x1178
+#define S5P_CMU_RESET_GPS_LOWPWR 0x117C
+#define S5P_TOP_BUS_LOWPWR 0x1180
+#define S5P_TOP_RETENTION_LOWPWR 0x1184
+#define S5P_TOP_PWR_LOWPWR 0x1188
+#define S5P_LOGIC_RESET_LOWPWR 0x11A0
+#define S5P_ONENAND_MEM_LOWPWR 0x11C0
+#define S5P_G2D_ACP_MEM_LOWPWR 0x11C8
+#define S5P_USBOTG_MEM_LOWPWR 0x11CC
+#define S5P_HSMMC_MEM_LOWPWR 0x11D0
+#define S5P_CSSYS_MEM_LOWPWR 0x11D4
+#define S5P_SECSS_MEM_LOWPWR 0x11D8
+#define S5P_PAD_RETENTION_DRAM_LOWPWR 0x1200
+#define S5P_PAD_RETENTION_MAUDIO_LOWPWR 0x1204
+#define S5P_PAD_RETENTION_GPIO_LOWPWR 0x1220
+#define S5P_PAD_RETENTION_UART_LOWPWR 0x1224
+#define S5P_PAD_RETENTION_MMCA_LOWPWR 0x1228
+#define S5P_PAD_RETENTION_MMCB_LOWPWR 0x122C
+#define S5P_PAD_RETENTION_EBIA_LOWPWR 0x1230
+#define S5P_PAD_RETENTION_EBIB_LOWPWR 0x1234
+#define S5P_PAD_RETENTION_ISOLATION_LOWPWR 0x1240
+#define S5P_PAD_RETENTION_ALV_SEL_LOWPWR 0x1260
+#define S5P_XUSBXTI_LOWPWR 0x1280
+#define S5P_XXTI_LOWPWR 0x1284
+#define S5P_EXT_REGULATOR_LOWPWR 0x12C0
+#define S5P_GPIO_MODE_LOWPWR 0x1300
+#define S5P_GPIO_MODE_MAUDIO_LOWPWR 0x1340
+#define S5P_CAM_LOWPWR 0x1380
+#define S5P_TV_LOWPWR 0x1384
+#define S5P_MFC_LOWPWR 0x1388
+#define S5P_G3D_LOWPWR 0x138C
+#define S5P_LCD0_LOWPWR 0x1390
+#define S5P_MAUDIO_LOWPWR 0x1398
+#define S5P_GPS_LOWPWR 0x139C
+#define S5P_GPS_ALIVE_LOWPWR 0x13A0
-#define S5P_ARM_CORE1_CONFIGURATION S5P_PMUREG(0x2080)
-#define S5P_ARM_CORE1_STATUS S5P_PMUREG(0x2084)
+#define S5P_ARM_CORE1_CONFIGURATION 0x2080
+#define S5P_ARM_CORE1_STATUS 0x2084
-#define S5P_PAD_RET_MAUDIO_OPTION S5P_PMUREG(0x3028)
-#define S5P_PAD_RET_GPIO_OPTION S5P_PMUREG(0x3108)
-#define S5P_PAD_RET_UART_OPTION S5P_PMUREG(0x3128)
-#define S5P_PAD_RET_MMCA_OPTION S5P_PMUREG(0x3148)
-#define S5P_PAD_RET_MMCB_OPTION S5P_PMUREG(0x3168)
-#define S5P_PAD_RET_EBIA_OPTION S5P_PMUREG(0x3188)
-#define S5P_PAD_RET_EBIB_OPTION S5P_PMUREG(0x31A8)
+#define S5P_PAD_RET_MAUDIO_OPTION 0x3028
+#define S5P_PAD_RET_GPIO_OPTION 0x3108
+#define S5P_PAD_RET_UART_OPTION 0x3128
+#define S5P_PAD_RET_MMCA_OPTION 0x3148
+#define S5P_PAD_RET_MMCB_OPTION 0x3168
+#define S5P_PAD_RET_EBIA_OPTION 0x3188
+#define S5P_PAD_RET_EBIB_OPTION 0x31A8
#define S5P_CORE_LOCAL_PWR_EN 0x3
#define S5P_CHECK_SLEEP 0x00000BAD
/* Only for EXYNOS4210 */
-#define S5P_CMU_CLKSTOP_LCD1_LOWPWR S5P_PMUREG(0x1154)
-#define S5P_CMU_RESET_LCD1_LOWPWR S5P_PMUREG(0x1174)
-#define S5P_MODIMIF_MEM_LOWPWR S5P_PMUREG(0x11C4)
-#define S5P_PCIE_MEM_LOWPWR S5P_PMUREG(0x11E0)
-#define S5P_SATA_MEM_LOWPWR S5P_PMUREG(0x11E4)
-#define S5P_LCD1_LOWPWR S5P_PMUREG(0x1394)
+#define S5P_CMU_CLKSTOP_LCD1_LOWPWR 0x1154
+#define S5P_CMU_RESET_LCD1_LOWPWR 0x1174
+#define S5P_MODIMIF_MEM_LOWPWR 0x11C4
+#define S5P_PCIE_MEM_LOWPWR 0x11E0
+#define S5P_SATA_MEM_LOWPWR 0x11E4
+#define S5P_LCD1_LOWPWR 0x1394
/* Only for EXYNOS4x12 */
-#define S5P_ISP_ARM_LOWPWR S5P_PMUREG(0x1050)
-#define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR S5P_PMUREG(0x1054)
-#define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR S5P_PMUREG(0x1058)
-#define S5P_CMU_ACLKSTOP_COREBLK_LOWPWR S5P_PMUREG(0x1110)
-#define S5P_CMU_SCLKSTOP_COREBLK_LOWPWR S5P_PMUREG(0x1114)
-#define S5P_CMU_RESET_COREBLK_LOWPWR S5P_PMUREG(0x111C)
-#define S5P_MPLLUSER_SYSCLK_LOWPWR S5P_PMUREG(0x1130)
-#define S5P_CMU_CLKSTOP_ISP_LOWPWR S5P_PMUREG(0x1154)
-#define S5P_CMU_RESET_ISP_LOWPWR S5P_PMUREG(0x1174)
-#define S5P_TOP_BUS_COREBLK_LOWPWR S5P_PMUREG(0x1190)
-#define S5P_TOP_RETENTION_COREBLK_LOWPWR S5P_PMUREG(0x1194)
-#define S5P_TOP_PWR_COREBLK_LOWPWR S5P_PMUREG(0x1198)
-#define S5P_OSCCLK_GATE_LOWPWR S5P_PMUREG(0x11A4)
-#define S5P_LOGIC_RESET_COREBLK_LOWPWR S5P_PMUREG(0x11B0)
-#define S5P_OSCCLK_GATE_COREBLK_LOWPWR S5P_PMUREG(0x11B4)
-#define S5P_HSI_MEM_LOWPWR S5P_PMUREG(0x11C4)
-#define S5P_ROTATOR_MEM_LOWPWR S5P_PMUREG(0x11DC)
-#define S5P_PAD_RETENTION_GPIO_COREBLK_LOWPWR S5P_PMUREG(0x123C)
-#define S5P_PAD_ISOLATION_COREBLK_LOWPWR S5P_PMUREG(0x1250)
-#define S5P_GPIO_MODE_COREBLK_LOWPWR S5P_PMUREG(0x1320)
-#define S5P_TOP_ASB_RESET_LOWPWR S5P_PMUREG(0x1344)
-#define S5P_TOP_ASB_ISOLATION_LOWPWR S5P_PMUREG(0x1348)
-#define S5P_ISP_LOWPWR S5P_PMUREG(0x1394)
-#define S5P_DRAM_FREQ_DOWN_LOWPWR S5P_PMUREG(0x13B0)
-#define S5P_DDRPHY_DLLOFF_LOWPWR S5P_PMUREG(0x13B4)
-#define S5P_CMU_SYSCLK_ISP_LOWPWR S5P_PMUREG(0x13B8)
-#define S5P_CMU_SYSCLK_GPS_LOWPWR S5P_PMUREG(0x13BC)
-#define S5P_LPDDR_PHY_DLL_LOCK_LOWPWR S5P_PMUREG(0x13C0)
+#define S5P_ISP_ARM_LOWPWR 0x1050
+#define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR 0x1054
+#define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR 0x1058
+#define S5P_CMU_ACLKSTOP_COREBLK_LOWPWR 0x1110
+#define S5P_CMU_SCLKSTOP_COREBLK_LOWPWR 0x1114
+#define S5P_CMU_RESET_COREBLK_LOWPWR 0x111C
+#define S5P_MPLLUSER_SYSCLK_LOWPWR 0x1130
+#define S5P_CMU_CLKSTOP_ISP_LOWPWR 0x1154
+#define S5P_CMU_RESET_ISP_LOWPWR 0x1174
+#define S5P_TOP_BUS_COREBLK_LOWPWR 0x1190
+#define S5P_TOP_RETENTION_COREBLK_LOWPWR 0x1194
+#define S5P_TOP_PWR_COREBLK_LOWPWR 0x1198
+#define S5P_OSCCLK_GATE_LOWPWR 0x11A4
+#define S5P_LOGIC_RESET_COREBLK_LOWPWR 0x11B0
+#define S5P_OSCCLK_GATE_COREBLK_LOWPWR 0x11B4
+#define S5P_HSI_MEM_LOWPWR 0x11C4
+#define S5P_ROTATOR_MEM_LOWPWR 0x11DC
+#define S5P_PAD_RETENTION_GPIO_COREBLK_LOWPWR 0x123C
+#define S5P_PAD_ISOLATION_COREBLK_LOWPWR 0x1250
+#define S5P_GPIO_MODE_COREBLK_LOWPWR 0x1320
+#define S5P_TOP_ASB_RESET_LOWPWR 0x1344
+#define S5P_TOP_ASB_ISOLATION_LOWPWR 0x1348
+#define S5P_ISP_LOWPWR 0x1394
+#define S5P_DRAM_FREQ_DOWN_LOWPWR 0x13B0
+#define S5P_DDRPHY_DLLOFF_LOWPWR 0x13B4
+#define S5P_CMU_SYSCLK_ISP_LOWPWR 0x13B8
+#define S5P_CMU_SYSCLK_GPS_LOWPWR 0x13BC
+#define S5P_LPDDR_PHY_DLL_LOCK_LOWPWR 0x13C0
-#define S5P_ARM_L2_0_OPTION S5P_PMUREG(0x2608)
-#define S5P_ARM_L2_1_OPTION S5P_PMUREG(0x2628)
-#define S5P_ONENAND_MEM_OPTION S5P_PMUREG(0x2E08)
-#define S5P_HSI_MEM_OPTION S5P_PMUREG(0x2E28)
-#define S5P_G2D_ACP_MEM_OPTION S5P_PMUREG(0x2E48)
-#define S5P_USBOTG_MEM_OPTION S5P_PMUREG(0x2E68)
-#define S5P_HSMMC_MEM_OPTION S5P_PMUREG(0x2E88)
-#define S5P_CSSYS_MEM_OPTION S5P_PMUREG(0x2EA8)
-#define S5P_SECSS_MEM_OPTION S5P_PMUREG(0x2EC8)
-#define S5P_ROTATOR_MEM_OPTION S5P_PMUREG(0x2F48)
+#define S5P_ARM_L2_0_OPTION 0x2608
+#define S5P_ARM_L2_1_OPTION 0x2628
+#define S5P_ONENAND_MEM_OPTION 0x2E08
+#define S5P_HSI_MEM_OPTION 0x2E28
+#define S5P_G2D_ACP_MEM_OPTION 0x2E48
+#define S5P_USBOTG_MEM_OPTION 0x2E68
+#define S5P_HSMMC_MEM_OPTION 0x2E88
+#define S5P_CSSYS_MEM_OPTION 0x2EA8
+#define S5P_SECSS_MEM_OPTION 0x2EC8
+#define S5P_ROTATOR_MEM_OPTION 0x2F48
/* Only for EXYNOS4412 */
-#define S5P_ARM_CORE2_LOWPWR S5P_PMUREG(0x1020)
-#define S5P_DIS_IRQ_CORE2 S5P_PMUREG(0x1024)
-#define S5P_DIS_IRQ_CENTRAL2 S5P_PMUREG(0x1028)
-#define S5P_ARM_CORE3_LOWPWR S5P_PMUREG(0x1030)
-#define S5P_DIS_IRQ_CORE3 S5P_PMUREG(0x1034)
-#define S5P_DIS_IRQ_CENTRAL3 S5P_PMUREG(0x1038)
+#define S5P_ARM_CORE2_LOWPWR 0x1020
+#define S5P_DIS_IRQ_CORE2 0x1024
+#define S5P_DIS_IRQ_CENTRAL2 0x1028
+#define S5P_ARM_CORE3_LOWPWR 0x1030
+#define S5P_DIS_IRQ_CORE3 0x1034
+#define S5P_DIS_IRQ_CENTRAL3 0x1038
/* For EXYNOS5 */
-#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
-#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
+#define EXYNOS5_AUTO_WDTRESET_DISABLE 0x0408
+#define EXYNOS5_MASK_WDTRESET_REQUEST 0x040C
#define EXYNOS5_SYS_WDTRESET (1 << 20)
-#define EXYNOS5_ARM_CORE0_SYS_PWR_REG S5P_PMUREG(0x1000)
-#define EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1004)
-#define EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1008)
-#define EXYNOS5_ARM_CORE1_SYS_PWR_REG S5P_PMUREG(0x1010)
-#define EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1014)
-#define EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1018)
-#define EXYNOS5_FSYS_ARM_SYS_PWR_REG S5P_PMUREG(0x1040)
-#define EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1048)
-#define EXYNOS5_ISP_ARM_SYS_PWR_REG S5P_PMUREG(0x1050)
-#define EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1054)
-#define EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1058)
-#define EXYNOS5_ARM_COMMON_SYS_PWR_REG S5P_PMUREG(0x1080)
-#define EXYNOS5_ARM_L2_SYS_PWR_REG S5P_PMUREG(0x10C0)
-#define EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG S5P_PMUREG(0x1100)
-#define EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG S5P_PMUREG(0x1104)
-#define EXYNOS5_CMU_RESET_SYS_PWR_REG S5P_PMUREG(0x110C)
-#define EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1120)
-#define EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1124)
-#define EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x112C)
-#define EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG S5P_PMUREG(0x1130)
-#define EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG S5P_PMUREG(0x1134)
-#define EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG S5P_PMUREG(0x1138)
-#define EXYNOS5_APLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1140)
-#define EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1144)
-#define EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1148)
-#define EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x114C)
-#define EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1150)
-#define EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1154)
-#define EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1164)
-#define EXYNOS5_BPLLUSER_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1170)
-#define EXYNOS5_TOP_BUS_SYS_PWR_REG S5P_PMUREG(0x1180)
-#define EXYNOS5_TOP_RETENTION_SYS_PWR_REG S5P_PMUREG(0x1184)
-#define EXYNOS5_TOP_PWR_SYS_PWR_REG S5P_PMUREG(0x1188)
-#define EXYNOS5_TOP_BUS_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1190)
-#define EXYNOS5_TOP_RETENTION_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1194)
-#define EXYNOS5_TOP_PWR_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1198)
-#define EXYNOS5_LOGIC_RESET_SYS_PWR_REG S5P_PMUREG(0x11A0)
-#define EXYNOS5_OSCCLK_GATE_SYS_PWR_REG S5P_PMUREG(0x11A4)
-#define EXYNOS5_LOGIC_RESET_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x11B0)
-#define EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x11B4)
-#define EXYNOS5_USBOTG_MEM_SYS_PWR_REG S5P_PMUREG(0x11C0)
-#define EXYNOS5_G2D_MEM_SYS_PWR_REG S5P_PMUREG(0x11C8)
-#define EXYNOS5_USBDRD_MEM_SYS_PWR_REG S5P_PMUREG(0x11CC)
-#define EXYNOS5_SDMMC_MEM_SYS_PWR_REG S5P_PMUREG(0x11D0)
-#define EXYNOS5_CSSYS_MEM_SYS_PWR_REG S5P_PMUREG(0x11D4)
-#define EXYNOS5_SECSS_MEM_SYS_PWR_REG S5P_PMUREG(0x11D8)
-#define EXYNOS5_ROTATOR_MEM_SYS_PWR_REG S5P_PMUREG(0x11DC)
-#define EXYNOS5_INTRAM_MEM_SYS_PWR_REG S5P_PMUREG(0x11E0)
-#define EXYNOS5_INTROM_MEM_SYS_PWR_REG S5P_PMUREG(0x11E4)
-#define EXYNOS5_JPEG_MEM_SYS_PWR_REG S5P_PMUREG(0x11E8)
-#define EXYNOS5_HSI_MEM_SYS_PWR_REG S5P_PMUREG(0x11EC)
-#define EXYNOS5_MCUIOP_MEM_SYS_PWR_REG S5P_PMUREG(0x11F4)
-#define EXYNOS5_SATA_MEM_SYS_PWR_REG S5P_PMUREG(0x11FC)
-#define EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG S5P_PMUREG(0x1200)
-#define EXYNOS5_PAD_RETENTION_MAU_SYS_PWR_REG S5P_PMUREG(0x1204)
-#define EXYNOS5_PAD_RETENTION_EFNAND_SYS_PWR_REG S5P_PMUREG(0x1208)
-#define EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG S5P_PMUREG(0x1220)
-#define EXYNOS5_PAD_RETENTION_UART_SYS_PWR_REG S5P_PMUREG(0x1224)
-#define EXYNOS5_PAD_RETENTION_MMCA_SYS_PWR_REG S5P_PMUREG(0x1228)
-#define EXYNOS5_PAD_RETENTION_MMCB_SYS_PWR_REG S5P_PMUREG(0x122C)
-#define EXYNOS5_PAD_RETENTION_EBIA_SYS_PWR_REG S5P_PMUREG(0x1230)
-#define EXYNOS5_PAD_RETENTION_EBIB_SYS_PWR_REG S5P_PMUREG(0x1234)
-#define EXYNOS5_PAD_RETENTION_SPI_SYS_PWR_REG S5P_PMUREG(0x1238)
-#define EXYNOS5_PAD_RETENTION_GPIO_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x123C)
-#define EXYNOS5_PAD_ISOLATION_SYS_PWR_REG S5P_PMUREG(0x1240)
-#define EXYNOS5_PAD_ISOLATION_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1250)
-#define EXYNOS5_PAD_ALV_SEL_SYS_PWR_REG S5P_PMUREG(0x1260)
-#define EXYNOS5_XUSBXTI_SYS_PWR_REG S5P_PMUREG(0x1280)
-#define EXYNOS5_XXTI_SYS_PWR_REG S5P_PMUREG(0x1284)
-#define EXYNOS5_EXT_REGULATOR_SYS_PWR_REG S5P_PMUREG(0x12C0)
-#define EXYNOS5_GPIO_MODE_SYS_PWR_REG S5P_PMUREG(0x1300)
-#define EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1320)
-#define EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG S5P_PMUREG(0x1340)
-#define EXYNOS5_TOP_ASB_RESET_SYS_PWR_REG S5P_PMUREG(0x1344)
-#define EXYNOS5_TOP_ASB_ISOLATION_SYS_PWR_REG S5P_PMUREG(0x1348)
-#define EXYNOS5_GSCL_SYS_PWR_REG S5P_PMUREG(0x1400)
-#define EXYNOS5_ISP_SYS_PWR_REG S5P_PMUREG(0x1404)
-#define EXYNOS5_MFC_SYS_PWR_REG S5P_PMUREG(0x1408)
-#define EXYNOS5_G3D_SYS_PWR_REG S5P_PMUREG(0x140C)
-#define EXYNOS5_DISP1_SYS_PWR_REG S5P_PMUREG(0x1414)
-#define EXYNOS5_MAU_SYS_PWR_REG S5P_PMUREG(0x1418)
-#define EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG S5P_PMUREG(0x1480)
-#define EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG S5P_PMUREG(0x1484)
-#define EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG S5P_PMUREG(0x1488)
-#define EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG S5P_PMUREG(0x148C)
-#define EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG S5P_PMUREG(0x1494)
-#define EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG S5P_PMUREG(0x1498)
-#define EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG S5P_PMUREG(0x14C0)
-#define EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG S5P_PMUREG(0x14C4)
-#define EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG S5P_PMUREG(0x14C8)
-#define EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG S5P_PMUREG(0x14CC)
-#define EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG S5P_PMUREG(0x14D4)
-#define EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG S5P_PMUREG(0x14D8)
-#define EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG S5P_PMUREG(0x1580)
-#define EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG S5P_PMUREG(0x1584)
-#define EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG S5P_PMUREG(0x1588)
-#define EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG S5P_PMUREG(0x158C)
-#define EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG S5P_PMUREG(0x1594)
-#define EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG S5P_PMUREG(0x1598)
+#define EXYNOS5_ARM_CORE0_SYS_PWR_REG 0x1000
+#define EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG 0x1004
+#define EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG 0x1008
+#define EXYNOS5_ARM_CORE1_SYS_PWR_REG 0x1010
+#define EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG 0x1014
+#define EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG 0x1018
+#define EXYNOS5_FSYS_ARM_SYS_PWR_REG 0x1040
+#define EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG 0x1048
+#define EXYNOS5_ISP_ARM_SYS_PWR_REG 0x1050
+#define EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG 0x1054
+#define EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG 0x1058
+#define EXYNOS5_ARM_COMMON_SYS_PWR_REG 0x1080
+#define EXYNOS5_ARM_L2_SYS_PWR_REG 0x10C0
+#define EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG 0x1100
+#define EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG 0x1104
+#define EXYNOS5_CMU_RESET_SYS_PWR_REG 0x110C
+#define EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG 0x1120
+#define EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG 0x1124
+#define EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG 0x112C
+#define EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG 0x1130
+#define EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG 0x1134
+#define EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG 0x1138
+#define EXYNOS5_APLL_SYSCLK_SYS_PWR_REG 0x1140
+#define EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG 0x1144
+#define EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG 0x1148
+#define EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG 0x114C
+#define EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG 0x1150
+#define EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG 0x1154
+#define EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG 0x1164
+#define EXYNOS5_BPLLUSER_SYSCLK_SYS_PWR_REG 0x1170
+#define EXYNOS5_TOP_BUS_SYS_PWR_REG 0x1180
+#define EXYNOS5_TOP_RETENTION_SYS_PWR_REG 0x1184
+#define EXYNOS5_TOP_PWR_SYS_PWR_REG 0x1188
+#define EXYNOS5_TOP_BUS_SYSMEM_SYS_PWR_REG 0x1190
+#define EXYNOS5_TOP_RETENTION_SYSMEM_SYS_PWR_REG 0x1194
+#define EXYNOS5_TOP_PWR_SYSMEM_SYS_PWR_REG 0x1198
+#define EXYNOS5_LOGIC_RESET_SYS_PWR_REG 0x11A0
+#define EXYNOS5_OSCCLK_GATE_SYS_PWR_REG 0x11A4
+#define EXYNOS5_LOGIC_RESET_SYSMEM_SYS_PWR_REG 0x11B0
+#define EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG 0x11B4
+#define EXYNOS5_USBOTG_MEM_SYS_PWR_REG 0x11C0
+#define EXYNOS5_G2D_MEM_SYS_PWR_REG 0x11C8
+#define EXYNOS5_USBDRD_MEM_SYS_PWR_REG 0x11CC
+#define EXYNOS5_SDMMC_MEM_SYS_PWR_REG 0x11D0
+#define EXYNOS5_CSSYS_MEM_SYS_PWR_REG 0x11D4
+#define EXYNOS5_SECSS_MEM_SYS_PWR_REG 0x11D8
+#define EXYNOS5_ROTATOR_MEM_SYS_PWR_REG 0x11DC
+#define EXYNOS5_INTRAM_MEM_SYS_PWR_REG 0x11E0
+#define EXYNOS5_INTROM_MEM_SYS_PWR_REG 0x11E4
+#define EXYNOS5_JPEG_MEM_SYS_PWR_REG 0x11E8
+#define EXYNOS5_HSI_MEM_SYS_PWR_REG 0x11EC
+#define EXYNOS5_MCUIOP_MEM_SYS_PWR_REG 0x11F4
+#define EXYNOS5_SATA_MEM_SYS_PWR_REG 0x11FC
+#define EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG 0x1200
+#define EXYNOS5_PAD_RETENTION_MAU_SYS_PWR_REG 0x1204
+#define EXYNOS5_PAD_RETENTION_EFNAND_SYS_PWR_REG 0x1208
+#define EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG 0x1220
+#define EXYNOS5_PAD_RETENTION_UART_SYS_PWR_REG 0x1224
+#define EXYNOS5_PAD_RETENTION_MMCA_SYS_PWR_REG 0x1228
+#define EXYNOS5_PAD_RETENTION_MMCB_SYS_PWR_REG 0x122C
+#define EXYNOS5_PAD_RETENTION_EBIA_SYS_PWR_REG 0x1230
+#define EXYNOS5_PAD_RETENTION_EBIB_SYS_PWR_REG 0x1234
+#define EXYNOS5_PAD_RETENTION_SPI_SYS_PWR_REG 0x1238
+#define EXYNOS5_PAD_RETENTION_GPIO_SYSMEM_SYS_PWR_REG 0x123C
+#define EXYNOS5_PAD_ISOLATION_SYS_PWR_REG 0x1240
+#define EXYNOS5_PAD_ISOLATION_SYSMEM_SYS_PWR_REG 0x1250
+#define EXYNOS5_PAD_ALV_SEL_SYS_PWR_REG 0x1260
+#define EXYNOS5_XUSBXTI_SYS_PWR_REG 0x1280
+#define EXYNOS5_XXTI_SYS_PWR_REG 0x1284
+#define EXYNOS5_EXT_REGULATOR_SYS_PWR_REG 0x12C0
+#define EXYNOS5_GPIO_MODE_SYS_PWR_REG 0x1300
+#define EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG 0x1320
+#define EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG 0x1340
+#define EXYNOS5_TOP_ASB_RESET_SYS_PWR_REG 0x1344
+#define EXYNOS5_TOP_ASB_ISOLATION_SYS_PWR_REG 0x1348
+#define EXYNOS5_GSCL_SYS_PWR_REG 0x1400
+#define EXYNOS5_ISP_SYS_PWR_REG 0x1404
+#define EXYNOS5_MFC_SYS_PWR_REG 0x1408
+#define EXYNOS5_G3D_SYS_PWR_REG 0x140C
+#define EXYNOS5_DISP1_SYS_PWR_REG 0x1414
+#define EXYNOS5_MAU_SYS_PWR_REG 0x1418
+#define EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG 0x1480
+#define EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG 0x1484
+#define EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG 0x1488
+#define EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG 0x148C
+#define EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG 0x1494
+#define EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG 0x1498
+#define EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG 0x14C0
+#define EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG 0x14C4
+#define EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG 0x14C8
+#define EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG 0x14CC
+#define EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG 0x14D4
+#define EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG 0x14D8
+#define EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG 0x1580
+#define EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG 0x1584
+#define EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG 0x1588
+#define EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG 0x158C
+#define EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG 0x1594
+#define EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG 0x1598
-#define EXYNOS5_ARM_CORE0_OPTION S5P_PMUREG(0x2008)
-#define EXYNOS5_ARM_CORE1_OPTION S5P_PMUREG(0x2088)
-#define EXYNOS5_FSYS_ARM_OPTION S5P_PMUREG(0x2208)
-#define EXYNOS5_ISP_ARM_OPTION S5P_PMUREG(0x2288)
-#define EXYNOS5_ARM_COMMON_OPTION S5P_PMUREG(0x2408)
-#define EXYNOS5_ARM_L2_OPTION S5P_PMUREG(0x2608)
-#define EXYNOS5_TOP_PWR_OPTION S5P_PMUREG(0x2C48)
-#define EXYNOS5_TOP_PWR_SYSMEM_OPTION S5P_PMUREG(0x2CC8)
-#define EXYNOS5_JPEG_MEM_OPTION S5P_PMUREG(0x2F48)
-#define EXYNOS5_GSCL_OPTION S5P_PMUREG(0x4008)
-#define EXYNOS5_ISP_OPTION S5P_PMUREG(0x4028)
-#define EXYNOS5_MFC_OPTION S5P_PMUREG(0x4048)
-#define EXYNOS5_G3D_OPTION S5P_PMUREG(0x4068)
-#define EXYNOS5_DISP1_OPTION S5P_PMUREG(0x40A8)
-#define EXYNOS5_MAU_OPTION S5P_PMUREG(0x40C8)
+#define EXYNOS5_ARM_CORE0_OPTION 0x2008
+#define EXYNOS5_ARM_CORE1_OPTION 0x2088
+#define EXYNOS5_FSYS_ARM_OPTION 0x2208
+#define EXYNOS5_ISP_ARM_OPTION 0x2288
+#define EXYNOS5_ARM_COMMON_OPTION 0x2408
+#define EXYNOS5_ARM_L2_OPTION 0x2608
+#define EXYNOS5_TOP_PWR_OPTION 0x2C48
+#define EXYNOS5_TOP_PWR_SYSMEM_OPTION 0x2CC8
+#define EXYNOS5_JPEG_MEM_OPTION 0x2F48
+#define EXYNOS5_GSCL_OPTION 0x4008
+#define EXYNOS5_ISP_OPTION 0x4028
+#define EXYNOS5_MFC_OPTION 0x4048
+#define EXYNOS5_G3D_OPTION 0x4068
+#define EXYNOS5_DISP1_OPTION 0x40A8
+#define EXYNOS5_MAU_OPTION 0x40C8
#define EXYNOS5_USE_SC_FEEDBACK (1 << 1)
#define EXYNOS5_USE_SC_COUNTER (1 << 0)
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* Re: [PATCH 03/10] ARM: EXYNOS: Move SYSREG definition into sys-reg specific file
2014-04-02 7:50 ` Pankaj Dubey
@ 2014-04-02 11:27 ` Sylwester Nawrocki
-1 siblings, 0 replies; 110+ messages in thread
From: Sylwester Nawrocki @ 2014-04-02 11:27 UTC (permalink / raw)
To: Pankaj Dubey
Cc: linux-arm-kernel, linux-kernel, linux-samsung-soc, kgene.kim,
linux, chow.kim, Young-Gun Jang
Hi,
On 02/04/14 09:50, Pankaj Dubey wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> While making PMU (Power Mengement Unit) implementation device tree based,
> there are few offsets related with SYSREG present in regs-pmu.h, so let's
> make a new header file "regs-sys.h" to keep all such SYSREG related
> register definition and remove them from "regs-pmu.h"
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/exynos.c | 1 +
> arch/arm/mach-exynos/pm.c | 1 +
> arch/arm/mach-exynos/regs-pmu.h | 3 ---
> arch/arm/mach-exynos/regs-sys.h | 22 ++++++++++++++++++++++
> 4 files changed, 24 insertions(+), 3 deletions(-)
> create mode 100644 arch/arm/mach-exynos/regs-sys.h
[...]
> diff --git a/arch/arm/mach-exynos/regs-sys.h b/arch/arm/mach-exynos/regs-sys.h
> new file mode 100644
> index 0000000..84332b0
> --- /dev/null
> +++ b/arch/arm/mach-exynos/regs-sys.h
> @@ -0,0 +1,22 @@
> +/*
> + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> + * EXYNOS - system register definition
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#ifndef __ASM_ARCH_REGS_SYS_H
> +#define __ASM_ARCH_REGS_SYS_H __FILE__
> +
> +#include <mach/map.h>
> +
> +#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
> +
> +/* For EXYNOS5 */
> +#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
Can this be defined as a regular register offset in a header file
placed at include/linux/mfd/syscon/ ? I.e. can the mfd syscon driver be
used instead of these hacks ?
--
Thanks,
Sylwester
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 03/10] ARM: EXYNOS: Move SYSREG definition into sys-reg specific file
@ 2014-04-02 11:27 ` Sylwester Nawrocki
0 siblings, 0 replies; 110+ messages in thread
From: Sylwester Nawrocki @ 2014-04-02 11:27 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On 02/04/14 09:50, Pankaj Dubey wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> While making PMU (Power Mengement Unit) implementation device tree based,
> there are few offsets related with SYSREG present in regs-pmu.h, so let's
> make a new header file "regs-sys.h" to keep all such SYSREG related
> register definition and remove them from "regs-pmu.h"
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/exynos.c | 1 +
> arch/arm/mach-exynos/pm.c | 1 +
> arch/arm/mach-exynos/regs-pmu.h | 3 ---
> arch/arm/mach-exynos/regs-sys.h | 22 ++++++++++++++++++++++
> 4 files changed, 24 insertions(+), 3 deletions(-)
> create mode 100644 arch/arm/mach-exynos/regs-sys.h
[...]
> diff --git a/arch/arm/mach-exynos/regs-sys.h b/arch/arm/mach-exynos/regs-sys.h
> new file mode 100644
> index 0000000..84332b0
> --- /dev/null
> +++ b/arch/arm/mach-exynos/regs-sys.h
> @@ -0,0 +1,22 @@
> +/*
> + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> + * EXYNOS - system register definition
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#ifndef __ASM_ARCH_REGS_SYS_H
> +#define __ASM_ARCH_REGS_SYS_H __FILE__
> +
> +#include <mach/map.h>
> +
> +#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
> +
> +/* For EXYNOS5 */
> +#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
Can this be defined as a regular register offset in a header file
placed at include/linux/mfd/syscon/ ? I.e. can the mfd syscon driver be
used instead of these hacks ?
--
Thanks,
Sylwester
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
2014-04-02 7:50 ` Pankaj Dubey
@ 2014-04-02 11:48 ` Sylwester Nawrocki
-1 siblings, 0 replies; 110+ messages in thread
From: Sylwester Nawrocki @ 2014-04-02 11:48 UTC (permalink / raw)
To: Pankaj Dubey, linux-kernel, linux-samsung-soc
Cc: linux-arm-kernel, kgene.kim, linux, chow.kim, Young-Gun Jang
On 02/04/14 09:50, Pankaj Dubey wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> Add support for mapping Exynos Power Management Unit (PMU) base address
> from device tree. Code will use existing samsung pmu binding information.
> This patch also adds "get_exynos_pmubase" a helper function to return mapped base
> address to various other files under "mach-exynos".
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/common.h | 2 ++
> arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 46 insertions(+)
>
[...]
> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index a5e1349..a5127fb 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -35,6 +35,8 @@
> #define L2_AUX_VAL 0x7C470001
> #define L2_AUX_MASK 0xC200ffff
>
> +static void __iomem *exynos_pmu_base __initdata;
> +
> static struct map_desc exynos4_iodesc[] __initdata = {
> {
> .virtual = (unsigned long)S3C_VA_SYS,
> @@ -245,6 +247,47 @@ void __init exynos_init_late(void)
> exynos_pm_init();
> }
>
> +static char const *exynos_dt_pmu_match[] __initconst = {
> + "samsung,exynos4210-pmu",
> + "samsung,exynos4212-pmu",
> + "samsung,exynos4412-pmu",
> + "samsung,exynos5250-pmu",
> + NULL
> +};
> +
> +static int __init exynos_fdt_map_pmu(unsigned long node,
> + const char *uname, int depth, void *data)
> +{
> + struct map_desc iodesc;
> + __be32 *reg;
> + unsigned long len;
> +
> + if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
> + phys_addr_t phys_addr;
> + reg = of_get_flat_dt_prop(node, "reg", &len);
> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
> + return 0;
> +
> + phys_addr = be32_to_cpu(reg[0]);
> + iodesc.pfn = __phys_to_pfn(phys_addr);
> + iodesc.length = be32_to_cpu(reg[1]) - 1;
> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
> + iodesc.type = MT_DEVICE;
> + iotable_init(&iodesc, 1);
Are you sure...you need this in addition to ioremap() below ?
Can't you just use the Linux syscon API ?
There were some patches posted for syscon to make it available in earlier
system initialization stage: https://lkml.org/lkml/2014/2/19/218
> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
> + if (WARN_ON(!exynos_pmu_base))
> + return -EFAULT;
> + }
> +
> + return 0;
> +}
--
Thanks,
Sylwester
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-02 11:48 ` Sylwester Nawrocki
0 siblings, 0 replies; 110+ messages in thread
From: Sylwester Nawrocki @ 2014-04-02 11:48 UTC (permalink / raw)
To: linux-arm-kernel
On 02/04/14 09:50, Pankaj Dubey wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> Add support for mapping Exynos Power Management Unit (PMU) base address
> from device tree. Code will use existing samsung pmu binding information.
> This patch also adds "get_exynos_pmubase" a helper function to return mapped base
> address to various other files under "mach-exynos".
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/common.h | 2 ++
> arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 46 insertions(+)
>
[...]
> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index a5e1349..a5127fb 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -35,6 +35,8 @@
> #define L2_AUX_VAL 0x7C470001
> #define L2_AUX_MASK 0xC200ffff
>
> +static void __iomem *exynos_pmu_base __initdata;
> +
> static struct map_desc exynos4_iodesc[] __initdata = {
> {
> .virtual = (unsigned long)S3C_VA_SYS,
> @@ -245,6 +247,47 @@ void __init exynos_init_late(void)
> exynos_pm_init();
> }
>
> +static char const *exynos_dt_pmu_match[] __initconst = {
> + "samsung,exynos4210-pmu",
> + "samsung,exynos4212-pmu",
> + "samsung,exynos4412-pmu",
> + "samsung,exynos5250-pmu",
> + NULL
> +};
> +
> +static int __init exynos_fdt_map_pmu(unsigned long node,
> + const char *uname, int depth, void *data)
> +{
> + struct map_desc iodesc;
> + __be32 *reg;
> + unsigned long len;
> +
> + if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
> + phys_addr_t phys_addr;
> + reg = of_get_flat_dt_prop(node, "reg", &len);
> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
> + return 0;
> +
> + phys_addr = be32_to_cpu(reg[0]);
> + iodesc.pfn = __phys_to_pfn(phys_addr);
> + iodesc.length = be32_to_cpu(reg[1]) - 1;
> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
> + iodesc.type = MT_DEVICE;
> + iotable_init(&iodesc, 1);
Are you sure...you need this in addition to ioremap() below ?
Can't you just use the Linux syscon API ?
There were some patches posted for syscon to make it available in earlier
system initialization stage: https://lkml.org/lkml/2014/2/19/218
> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
> + if (WARN_ON(!exynos_pmu_base))
> + return -EFAULT;
> + }
> +
> + return 0;
> +}
--
Thanks,
Sylwester
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 02/10] ARM: EXYNOS: Correct file path in comment message
2014-04-02 7:50 ` Pankaj Dubey
@ 2014-04-02 12:01 ` Michal Simek
-1 siblings, 0 replies; 110+ messages in thread
From: Michal Simek @ 2014-04-02 12:01 UTC (permalink / raw)
To: Pankaj Dubey
Cc: linux-arm-kernel, linux-kernel, linux-samsung-soc, kgene.kim,
linux, chow.kim
[-- Attachment #1: Type: text/plain, Size: 1229 bytes --]
On 04/02/2014 09:50 AM, Pankaj Dubey wrote:
> This patch corrects file path mentioned in file comment message.
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/platsmp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
> index 03e5e9f..d8d1555 100644
> --- a/arch/arm/mach-exynos/platsmp.c
> +++ b/arch/arm/mach-exynos/platsmp.c
> @@ -1,4 +1,4 @@
> -/* linux/arch/arm/mach-exynos4/platsmp.c
> +/* linux/arch/arm/mach-exynos/platsmp.c
> *
> * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
> * http://www.samsung.com
>
Shouldn't you just remove it entirely?
I had the same file names in the whole microblaze tree
and some months/years later this was just broken everywhere.
That's why it is just easier to remove it entirely.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 263 bytes --]
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 02/10] ARM: EXYNOS: Correct file path in comment message
@ 2014-04-02 12:01 ` Michal Simek
0 siblings, 0 replies; 110+ messages in thread
From: Michal Simek @ 2014-04-02 12:01 UTC (permalink / raw)
To: linux-arm-kernel
On 04/02/2014 09:50 AM, Pankaj Dubey wrote:
> This patch corrects file path mentioned in file comment message.
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/platsmp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
> index 03e5e9f..d8d1555 100644
> --- a/arch/arm/mach-exynos/platsmp.c
> +++ b/arch/arm/mach-exynos/platsmp.c
> @@ -1,4 +1,4 @@
> -/* linux/arch/arm/mach-exynos4/platsmp.c
> +/* linux/arch/arm/mach-exynos/platsmp.c
> *
> * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
> * http://www.samsung.com
>
Shouldn't you just remove it entirely?
I had the same file names in the whole microblaze tree
and some months/years later this was just broken everywhere.
That's why it is just easier to remove it entirely.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
2014-04-02 11:48 ` Sylwester Nawrocki
@ 2014-04-02 12:15 ` Michal Simek
-1 siblings, 0 replies; 110+ messages in thread
From: Michal Simek @ 2014-04-02 12:15 UTC (permalink / raw)
To: Sylwester Nawrocki
Cc: Pankaj Dubey, linux-kernel, linux-samsung-soc, linux-arm-kernel,
kgene.kim, linux, chow.kim, Young-Gun Jang
[-- Attachment #1: Type: text/plain, Size: 2905 bytes --]
On 04/02/2014 01:48 PM, Sylwester Nawrocki wrote:
> On 02/04/14 09:50, Pankaj Dubey wrote:
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> Add support for mapping Exynos Power Management Unit (PMU) base address
>> from device tree. Code will use existing samsung pmu binding information.
>> This patch also adds "get_exynos_pmubase" a helper function to return mapped base
>> address to various other files under "mach-exynos".
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/common.h | 2 ++
>> arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 46 insertions(+)
>>
> [...]
>> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index a5e1349..a5127fb 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -35,6 +35,8 @@
>> #define L2_AUX_VAL 0x7C470001
>> #define L2_AUX_MASK 0xC200ffff
>>
>> +static void __iomem *exynos_pmu_base __initdata;
>> +
>> static struct map_desc exynos4_iodesc[] __initdata = {
>> {
>> .virtual = (unsigned long)S3C_VA_SYS,
>> @@ -245,6 +247,47 @@ void __init exynos_init_late(void)
>> exynos_pm_init();
>> }
>>
>> +static char const *exynos_dt_pmu_match[] __initconst = {
>> + "samsung,exynos4210-pmu",
>> + "samsung,exynos4212-pmu",
>> + "samsung,exynos4412-pmu",
>> + "samsung,exynos5250-pmu",
>> + NULL
>> +};
>> +
>> +static int __init exynos_fdt_map_pmu(unsigned long node,
>> + const char *uname, int depth, void *data)
>> +{
>> + struct map_desc iodesc;
>> + __be32 *reg;
>> + unsigned long len;
>> +
>> + if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
>> + phys_addr_t phys_addr;
>> + reg = of_get_flat_dt_prop(node, "reg", &len);
>> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
>> + return 0;
>> +
>> + phys_addr = be32_to_cpu(reg[0]);
>> + iodesc.pfn = __phys_to_pfn(phys_addr);
>> + iodesc.length = be32_to_cpu(reg[1]) - 1;
>> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
>> + iodesc.type = MT_DEVICE;
>> + iotable_init(&iodesc, 1);
>
> Are you sure...you need this in addition to ioremap() below ?
> Can't you just use the Linux syscon API ?
> There were some patches posted for syscon to make it available in earlier
> system initialization stage: https://lkml.org/lkml/2014/2/19/218
I haven't finished this yet. I have to look at it again.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 263 bytes --]
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-02 12:15 ` Michal Simek
0 siblings, 0 replies; 110+ messages in thread
From: Michal Simek @ 2014-04-02 12:15 UTC (permalink / raw)
To: linux-arm-kernel
On 04/02/2014 01:48 PM, Sylwester Nawrocki wrote:
> On 02/04/14 09:50, Pankaj Dubey wrote:
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> Add support for mapping Exynos Power Management Unit (PMU) base address
>> from device tree. Code will use existing samsung pmu binding information.
>> This patch also adds "get_exynos_pmubase" a helper function to return mapped base
>> address to various other files under "mach-exynos".
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/common.h | 2 ++
>> arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 46 insertions(+)
>>
> [...]
>> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index a5e1349..a5127fb 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -35,6 +35,8 @@
>> #define L2_AUX_VAL 0x7C470001
>> #define L2_AUX_MASK 0xC200ffff
>>
>> +static void __iomem *exynos_pmu_base __initdata;
>> +
>> static struct map_desc exynos4_iodesc[] __initdata = {
>> {
>> .virtual = (unsigned long)S3C_VA_SYS,
>> @@ -245,6 +247,47 @@ void __init exynos_init_late(void)
>> exynos_pm_init();
>> }
>>
>> +static char const *exynos_dt_pmu_match[] __initconst = {
>> + "samsung,exynos4210-pmu",
>> + "samsung,exynos4212-pmu",
>> + "samsung,exynos4412-pmu",
>> + "samsung,exynos5250-pmu",
>> + NULL
>> +};
>> +
>> +static int __init exynos_fdt_map_pmu(unsigned long node,
>> + const char *uname, int depth, void *data)
>> +{
>> + struct map_desc iodesc;
>> + __be32 *reg;
>> + unsigned long len;
>> +
>> + if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
>> + phys_addr_t phys_addr;
>> + reg = of_get_flat_dt_prop(node, "reg", &len);
>> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
>> + return 0;
>> +
>> + phys_addr = be32_to_cpu(reg[0]);
>> + iodesc.pfn = __phys_to_pfn(phys_addr);
>> + iodesc.length = be32_to_cpu(reg[1]) - 1;
>> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
>> + iodesc.type = MT_DEVICE;
>> + iotable_init(&iodesc, 1);
>
> Are you sure...you need this in addition to ioremap() below ?
> Can't you just use the Linux syscon API ?
> There were some patches posted for syscon to make it available in earlier
> system initialization stage: https://lkml.org/lkml/2014/2/19/218
I haven't finished this yet. I have to look at it again.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 02/10] ARM: EXYNOS: Correct file path in comment message
2014-04-02 12:01 ` Michal Simek
@ 2014-04-03 1:40 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-03 1:40 UTC (permalink / raw)
To: monstr
Cc: linux-arm-kernel, linux-kernel, linux-samsung-soc, kgene.kim,
linux, chow.kim
Hi Michal,
On 04/02/2014 09:01 PM, Michal Simek wrote:
> On 04/02/2014 09:50 AM, Pankaj Dubey wrote:
>> This patch corrects file path mentioned in file comment message.
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/platsmp.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
>> index 03e5e9f..d8d1555 100644
>> --- a/arch/arm/mach-exynos/platsmp.c
>> +++ b/arch/arm/mach-exynos/platsmp.c
>> @@ -1,4 +1,4 @@
>> -/* linux/arch/arm/mach-exynos4/platsmp.c
>> +/* linux/arch/arm/mach-exynos/platsmp.c
>> *
>> * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
>> * http://www.samsung.com
>>
> Shouldn't you just remove it entirely?
> I had the same file names in the whole microblaze tree
> and some months/years later this was just broken everywhere.
> That's why it is just easier to remove it entirely.
Thanks for review and suggestion.
Removing of file name makes more sense to me also.
Will take care of this in some other files also under "mach-exynos"
in next version of patch.
>
> Thanks,
> Michal
>
>
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 02/10] ARM: EXYNOS: Correct file path in comment message
@ 2014-04-03 1:40 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-03 1:40 UTC (permalink / raw)
To: linux-arm-kernel
Hi Michal,
On 04/02/2014 09:01 PM, Michal Simek wrote:
> On 04/02/2014 09:50 AM, Pankaj Dubey wrote:
>> This patch corrects file path mentioned in file comment message.
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/platsmp.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
>> index 03e5e9f..d8d1555 100644
>> --- a/arch/arm/mach-exynos/platsmp.c
>> +++ b/arch/arm/mach-exynos/platsmp.c
>> @@ -1,4 +1,4 @@
>> -/* linux/arch/arm/mach-exynos4/platsmp.c
>> +/* linux/arch/arm/mach-exynos/platsmp.c
>> *
>> * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
>> * http://www.samsung.com
>>
> Shouldn't you just remove it entirely?
> I had the same file names in the whole microblaze tree
> and some months/years later this was just broken everywhere.
> That's why it is just easier to remove it entirely.
Thanks for review and suggestion.
Removing of file name makes more sense to me also.
Will take care of this in some other files also under "mach-exynos"
in next version of patch.
>
> Thanks,
> Michal
>
>
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* RE: [PATCH 02/10] ARM: EXYNOS: Correct file path in comment message
2014-04-03 1:40 ` Pankaj Dubey
@ 2014-04-03 2:12 ` Kukjin Kim
-1 siblings, 0 replies; 110+ messages in thread
From: Kukjin Kim @ 2014-04-03 2:12 UTC (permalink / raw)
To: 'Pankaj Dubey', monstr
Cc: linux-arm-kernel, linux-kernel, linux-samsung-soc, linux, chow.kim
Pankaj Dubey wrote:
>
> Hi Michal,
>
> On 04/02/2014 09:01 PM, Michal Simek wrote:
> > On 04/02/2014 09:50 AM, Pankaj Dubey wrote:
> >> This patch corrects file path mentioned in file comment message.
> >>
> >> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> >> ---
> >> arch/arm/mach-exynos/platsmp.c | 2 +-
> >> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-
> exynos/platsmp.c
> >> index 03e5e9f..d8d1555 100644
> >> --- a/arch/arm/mach-exynos/platsmp.c
> >> +++ b/arch/arm/mach-exynos/platsmp.c
> >> @@ -1,4 +1,4 @@
> >> -/* linux/arch/arm/mach-exynos4/platsmp.c
> >> +/* linux/arch/arm/mach-exynos/platsmp.c
> >> *
> >> * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
> >> * http://www.samsung.com
> >>
> > Shouldn't you just remove it entirely?
> > I had the same file names in the whole microblaze tree
> > and some months/years later this was just broken everywhere.
> > That's why it is just easier to remove it entirely.
>
> Thanks for review and suggestion.
> Removing of file name makes more sense to me also.
> Will take care of this in some other files also under "mach-exynos"
> in next version of patch.
>
No, basically don't need it.
And Sachin/Tushar have posted it before, I didn't agree at that time though.
- Kukjin
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 02/10] ARM: EXYNOS: Correct file path in comment message
@ 2014-04-03 2:12 ` Kukjin Kim
0 siblings, 0 replies; 110+ messages in thread
From: Kukjin Kim @ 2014-04-03 2:12 UTC (permalink / raw)
To: linux-arm-kernel
Pankaj Dubey wrote:
>
> Hi Michal,
>
> On 04/02/2014 09:01 PM, Michal Simek wrote:
> > On 04/02/2014 09:50 AM, Pankaj Dubey wrote:
> >> This patch corrects file path mentioned in file comment message.
> >>
> >> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> >> ---
> >> arch/arm/mach-exynos/platsmp.c | 2 +-
> >> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-
> exynos/platsmp.c
> >> index 03e5e9f..d8d1555 100644
> >> --- a/arch/arm/mach-exynos/platsmp.c
> >> +++ b/arch/arm/mach-exynos/platsmp.c
> >> @@ -1,4 +1,4 @@
> >> -/* linux/arch/arm/mach-exynos4/platsmp.c
> >> +/* linux/arch/arm/mach-exynos/platsmp.c
> >> *
> >> * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
> >> * http://www.samsung.com
> >>
> > Shouldn't you just remove it entirely?
> > I had the same file names in the whole microblaze tree
> > and some months/years later this was just broken everywhere.
> > That's why it is just easier to remove it entirely.
>
> Thanks for review and suggestion.
> Removing of file name makes more sense to me also.
> Will take care of this in some other files also under "mach-exynos"
> in next version of patch.
>
No, basically don't need it.
And Sachin/Tushar have posted it before, I didn't agree at that time though.
- Kukjin
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
2014-04-02 12:15 ` Michal Simek
@ 2014-04-03 9:07 ` Sylwester Nawrocki
-1 siblings, 0 replies; 110+ messages in thread
From: Sylwester Nawrocki @ 2014-04-03 9:07 UTC (permalink / raw)
To: monstr
Cc: Pankaj Dubey, linux-kernel, linux-samsung-soc, linux-arm-kernel,
kgene.kim, linux, chow.kim, Young-Gun Jang
On 02/04/14 14:15, Michal Simek wrote:
>> There were some patches posted for syscon to make it available in earlier
>> system initialization stage: https://lkml.org/lkml/2014/2/19/218
>
> I haven't finished this yet. I have to look at it again.
Thanks for the information, I assume this would be also useful
on the Exynos SoC series, so I'd be happy to see continuation
of those works.
--
Thanks,
Sylwester
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-03 9:07 ` Sylwester Nawrocki
0 siblings, 0 replies; 110+ messages in thread
From: Sylwester Nawrocki @ 2014-04-03 9:07 UTC (permalink / raw)
To: linux-arm-kernel
On 02/04/14 14:15, Michal Simek wrote:
>> There were some patches posted for syscon to make it available in earlier
>> system initialization stage: https://lkml.org/lkml/2014/2/19/218
>
> I haven't finished this yet. I have to look at it again.
Thanks for the information, I assume this would be also useful
on the Exynos SoC series, so I'd be happy to see continuation
of those works.
--
Thanks,
Sylwester
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
2014-04-02 11:48 ` Sylwester Nawrocki
(?)
@ 2014-04-05 10:53 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-05 10:53 UTC (permalink / raw)
To: Sylwester Nawrocki
Cc: linux-kernel, linux-samsung-soc, linux-arm-kernel, kgene.kim,
linux, chow.kim, Young-Gun Jang
On 04/02/2014 08:48 PM, Sylwester Nawrocki wrote:
> On 02/04/14 09:50, Pankaj Dubey wrote:
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> Add support for mapping Exynos Power Management Unit (PMU) base address
>> from device tree. Code will use existing samsung pmu binding information.
>> This patch also adds "get_exynos_pmubase" a helper function to return mapped base
>> address to various other files under "mach-exynos".
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/common.h | 2 ++
>> arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 46 insertions(+)
>>
> [...]
>> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index a5e1349..a5127fb 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -35,6 +35,8 @@
>> #define L2_AUX_VAL 0x7C470001
>> #define L2_AUX_MASK 0xC200ffff
>>
>> +static void __iomem *exynos_pmu_base __initdata;
>> +
>> static struct map_desc exynos4_iodesc[] __initdata = {
>> {
>> .virtual = (unsigned long)S3C_VA_SYS,
>> @@ -245,6 +247,47 @@ void __init exynos_init_late(void)
>> exynos_pm_init();
>> }
>>
>> +static char const *exynos_dt_pmu_match[] __initconst = {
>> + "samsung,exynos4210-pmu",
>> + "samsung,exynos4212-pmu",
>> + "samsung,exynos4412-pmu",
>> + "samsung,exynos5250-pmu",
>> + NULL
>> +};
>> +
>> +static int __init exynos_fdt_map_pmu(unsigned long node,
>> + const char *uname, int depth, void *data)
>> +{
>> + struct map_desc iodesc;
>> + __be32 *reg;
>> + unsigned long len;
>> +
>> + if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
>> + phys_addr_t phys_addr;
>> + reg = of_get_flat_dt_prop(node, "reg", &len);
>> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
>> + return 0;
>> +
>> + phys_addr = be32_to_cpu(reg[0]);
>> + iodesc.pfn = __phys_to_pfn(phys_addr);
>> + iodesc.length = be32_to_cpu(reg[1]) - 1;
>> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
>> + iodesc.type = MT_DEVICE;
>> + iotable_init(&iodesc, 1);
> Are you sure...you need this in addition to ioremap() below ?
> Can't you just use the Linux syscon API ?
> There were some patches posted for syscon to make it available in earlier
> system initialization stage: https://lkml.org/lkml/2014/2/19/218
Thanks for review and suggestion.
We need ioremap() in addition to iotable_init to get virtual address,
which will be used by other files also for read/write PMU registers.
Regarding syscon early initialization, since I was not aware of any such
patch earlier I have not used it. But after you suggested I tried it and
modified this implementation to use syscon API and regmap API and it's
working fine.
I will wait for review of other patches in this series and status of above
mentioned syscon API based on that I will update this in next revision.
>> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
>> + if (WARN_ON(!exynos_pmu_base))
>> + return -EFAULT;
>> + }
>> +
>> + return 0;
>> +}
> --
> Thanks,
> Sylwester
>
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-05 10:53 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-05 10:53 UTC (permalink / raw)
To: Sylwester Nawrocki
Cc: kgene.kim, linux, linux-kernel, linux-samsung-soc,
Young-Gun Jang, chow.kim, linux-arm-kernel
On 04/02/2014 08:48 PM, Sylwester Nawrocki wrote:
> On 02/04/14 09:50, Pankaj Dubey wrote:
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> Add support for mapping Exynos Power Management Unit (PMU) base address
>> from device tree. Code will use existing samsung pmu binding information.
>> This patch also adds "get_exynos_pmubase" a helper function to return mapped base
>> address to various other files under "mach-exynos".
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/common.h | 2 ++
>> arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 46 insertions(+)
>>
> [...]
>> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index a5e1349..a5127fb 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -35,6 +35,8 @@
>> #define L2_AUX_VAL 0x7C470001
>> #define L2_AUX_MASK 0xC200ffff
>>
>> +static void __iomem *exynos_pmu_base __initdata;
>> +
>> static struct map_desc exynos4_iodesc[] __initdata = {
>> {
>> .virtual = (unsigned long)S3C_VA_SYS,
>> @@ -245,6 +247,47 @@ void __init exynos_init_late(void)
>> exynos_pm_init();
>> }
>>
>> +static char const *exynos_dt_pmu_match[] __initconst = {
>> + "samsung,exynos4210-pmu",
>> + "samsung,exynos4212-pmu",
>> + "samsung,exynos4412-pmu",
>> + "samsung,exynos5250-pmu",
>> + NULL
>> +};
>> +
>> +static int __init exynos_fdt_map_pmu(unsigned long node,
>> + const char *uname, int depth, void *data)
>> +{
>> + struct map_desc iodesc;
>> + __be32 *reg;
>> + unsigned long len;
>> +
>> + if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
>> + phys_addr_t phys_addr;
>> + reg = of_get_flat_dt_prop(node, "reg", &len);
>> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
>> + return 0;
>> +
>> + phys_addr = be32_to_cpu(reg[0]);
>> + iodesc.pfn = __phys_to_pfn(phys_addr);
>> + iodesc.length = be32_to_cpu(reg[1]) - 1;
>> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
>> + iodesc.type = MT_DEVICE;
>> + iotable_init(&iodesc, 1);
> Are you sure...you need this in addition to ioremap() below ?
> Can't you just use the Linux syscon API ?
> There were some patches posted for syscon to make it available in earlier
> system initialization stage: https://lkml.org/lkml/2014/2/19/218
Thanks for review and suggestion.
We need ioremap() in addition to iotable_init to get virtual address,
which will be used by other files also for read/write PMU registers.
Regarding syscon early initialization, since I was not aware of any such
patch earlier I have not used it. But after you suggested I tried it and
modified this implementation to use syscon API and regmap API and it's
working fine.
I will wait for review of other patches in this series and status of above
mentioned syscon API based on that I will update this in next revision.
>> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
>> + if (WARN_ON(!exynos_pmu_base))
>> + return -EFAULT;
>> + }
>> +
>> + return 0;
>> +}
> --
> Thanks,
> Sylwester
>
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-05 10:53 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-05 10:53 UTC (permalink / raw)
To: linux-arm-kernel
On 04/02/2014 08:48 PM, Sylwester Nawrocki wrote:
> On 02/04/14 09:50, Pankaj Dubey wrote:
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> Add support for mapping Exynos Power Management Unit (PMU) base address
>> from device tree. Code will use existing samsung pmu binding information.
>> This patch also adds "get_exynos_pmubase" a helper function to return mapped base
>> address to various other files under "mach-exynos".
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/common.h | 2 ++
>> arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 46 insertions(+)
>>
> [...]
>> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index a5e1349..a5127fb 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -35,6 +35,8 @@
>> #define L2_AUX_VAL 0x7C470001
>> #define L2_AUX_MASK 0xC200ffff
>>
>> +static void __iomem *exynos_pmu_base __initdata;
>> +
>> static struct map_desc exynos4_iodesc[] __initdata = {
>> {
>> .virtual = (unsigned long)S3C_VA_SYS,
>> @@ -245,6 +247,47 @@ void __init exynos_init_late(void)
>> exynos_pm_init();
>> }
>>
>> +static char const *exynos_dt_pmu_match[] __initconst = {
>> + "samsung,exynos4210-pmu",
>> + "samsung,exynos4212-pmu",
>> + "samsung,exynos4412-pmu",
>> + "samsung,exynos5250-pmu",
>> + NULL
>> +};
>> +
>> +static int __init exynos_fdt_map_pmu(unsigned long node,
>> + const char *uname, int depth, void *data)
>> +{
>> + struct map_desc iodesc;
>> + __be32 *reg;
>> + unsigned long len;
>> +
>> + if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
>> + phys_addr_t phys_addr;
>> + reg = of_get_flat_dt_prop(node, "reg", &len);
>> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
>> + return 0;
>> +
>> + phys_addr = be32_to_cpu(reg[0]);
>> + iodesc.pfn = __phys_to_pfn(phys_addr);
>> + iodesc.length = be32_to_cpu(reg[1]) - 1;
>> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
>> + iodesc.type = MT_DEVICE;
>> + iotable_init(&iodesc, 1);
> Are you sure...you need this in addition to ioremap() below ?
> Can't you just use the Linux syscon API ?
> There were some patches posted for syscon to make it available in earlier
> system initialization stage: https://lkml.org/lkml/2014/2/19/218
Thanks for review and suggestion.
We need ioremap() in addition to iotable_init to get virtual address,
which will be used by other files also for read/write PMU registers.
Regarding syscon early initialization, since I was not aware of any such
patch earlier I have not used it. But after you suggested I tried it and
modified this implementation to use syscon API and regmap API and it's
working fine.
I will wait for review of other patches in this series and status of above
mentioned syscon API based on that I will update this in next revision.
>> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
>> + if (WARN_ON(!exynos_pmu_base))
>> + return -EFAULT;
>> + }
>> +
>> + return 0;
>> +}
> --
> Thanks,
> Sylwester
>
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
2014-04-03 9:07 ` Sylwester Nawrocki
@ 2014-04-05 10:58 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-05 10:58 UTC (permalink / raw)
To: Sylwester Nawrocki
Cc: monstr, linux-kernel, linux-samsung-soc, linux-arm-kernel,
kgene.kim, linux, chow.kim, Young-Gun Jang
On 04/03/2014 06:07 PM, Sylwester Nawrocki wrote:
> On 02/04/14 14:15, Michal Simek wrote:
>>> There were some patches posted for syscon to make it available in earlier
>>> system initialization stage: https://lkml.org/lkml/2014/2/19/218
>> I haven't finished this yet. I have to look at it again.
> Thanks for the information, I assume this would be also useful
> on the Exynos SoC series, so I'd be happy to see continuation
> of those works.
It is useful for Exynos SoC series and I have modified this patch series to use
early syscon
initialization API and I can see it's working.
I have some observation for early initialization of syscon API which I will
update in corresponding message thread.
> --
> Thanks,
> Sylwester
>
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-05 10:58 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-05 10:58 UTC (permalink / raw)
To: linux-arm-kernel
On 04/03/2014 06:07 PM, Sylwester Nawrocki wrote:
> On 02/04/14 14:15, Michal Simek wrote:
>>> There were some patches posted for syscon to make it available in earlier
>>> system initialization stage: https://lkml.org/lkml/2014/2/19/218
>> I haven't finished this yet. I have to look at it again.
> Thanks for the information, I assume this would be also useful
> on the Exynos SoC series, so I'd be happy to see continuation
> of those works.
It is useful for Exynos SoC series and I have modified this patch series to use
early syscon
initialization API and I can see it's working.
I have some observation for early initialization of syscon API which I will
update in corresponding message thread.
> --
> Thanks,
> Sylwester
>
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
2014-04-05 10:58 ` Pankaj Dubey
@ 2014-04-07 6:02 ` Michal Simek
-1 siblings, 0 replies; 110+ messages in thread
From: Michal Simek @ 2014-04-07 6:02 UTC (permalink / raw)
To: Pankaj Dubey
Cc: Sylwester Nawrocki, linux-kernel, linux-samsung-soc,
linux-arm-kernel, kgene.kim, linux, chow.kim, Young-Gun Jang
[-- Attachment #1: Type: text/plain, Size: 1210 bytes --]
On 04/05/2014 12:58 PM, Pankaj Dubey wrote:
> On 04/03/2014 06:07 PM, Sylwester Nawrocki wrote:
>> On 02/04/14 14:15, Michal Simek wrote:
>>>> There were some patches posted for syscon to make it available in earlier
>>>> system initialization stage: https://lkml.org/lkml/2014/2/19/218
>>> I haven't finished this yet. I have to look at it again.
>> Thanks for the information, I assume this would be also useful
>> on the Exynos SoC series, so I'd be happy to see continuation
>> of those works.
>
> It is useful for Exynos SoC series and I have modified this patch series to use early syscon
> initialization API and I can see it's working.
> I have some observation for early initialization of syscon API which I will
> update in corresponding message thread.
Great. Please update that thread we should finish this implementation
to be useful for everybody.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 263 bytes --]
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-07 6:02 ` Michal Simek
0 siblings, 0 replies; 110+ messages in thread
From: Michal Simek @ 2014-04-07 6:02 UTC (permalink / raw)
To: linux-arm-kernel
On 04/05/2014 12:58 PM, Pankaj Dubey wrote:
> On 04/03/2014 06:07 PM, Sylwester Nawrocki wrote:
>> On 02/04/14 14:15, Michal Simek wrote:
>>>> There were some patches posted for syscon to make it available in earlier
>>>> system initialization stage: https://lkml.org/lkml/2014/2/19/218
>>> I haven't finished this yet. I have to look at it again.
>> Thanks for the information, I assume this would be also useful
>> on the Exynos SoC series, so I'd be happy to see continuation
>> of those works.
>
> It is useful for Exynos SoC series and I have modified this patch series to use early syscon
> initialization API and I can see it's working.
> I have some observation for early initialization of syscon API which I will
> update in corresponding message thread.
Great. Please update that thread we should finish this implementation
to be useful for everybody.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 01/10] ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
2014-04-02 7:50 ` Pankaj Dubey
@ 2014-04-08 15:59 ` Tomasz Figa
-1 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-08 15:59 UTC (permalink / raw)
To: Pankaj Dubey, linux-arm-kernel, linux-kernel, linux-samsung-soc
Cc: kgene.kim, linux, chow.kim
Hi Pankaj,
On 02.04.2014 09:50, Pankaj Dubey wrote:
> Remove unused declarations from "mach-exynos/common.h"
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/common.h | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
> index 9ef3f83..277a83e 100644
> --- a/arch/arm/mach-exynos/common.h
> +++ b/arch/arm/mach-exynos/common.h
> @@ -15,9 +15,6 @@
> #include <linux/reboot.h>
> #include <linux/of.h>
>
> -void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
> -
> -struct map_desc;
> void exynos_init_io(void);
> void exynos_restart(enum reboot_mode mode, const char *cmd);
> void exynos_cpuidle_init(void);
>
You could also drop a bit more. From the context above I can see that at
least exynos_restart() and exynos_init_io() are never used outside of
files they are defined in, so they too could be dropped from this
header. Looking at rest of the header, there seems to be a lot of
similar definitions. If cleaning up the header anyway, could you take
care of them as well?
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 01/10] ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
@ 2014-04-08 15:59 ` Tomasz Figa
0 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-08 15:59 UTC (permalink / raw)
To: linux-arm-kernel
Hi Pankaj,
On 02.04.2014 09:50, Pankaj Dubey wrote:
> Remove unused declarations from "mach-exynos/common.h"
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/common.h | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
> index 9ef3f83..277a83e 100644
> --- a/arch/arm/mach-exynos/common.h
> +++ b/arch/arm/mach-exynos/common.h
> @@ -15,9 +15,6 @@
> #include <linux/reboot.h>
> #include <linux/of.h>
>
> -void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
> -
> -struct map_desc;
> void exynos_init_io(void);
> void exynos_restart(enum reboot_mode mode, const char *cmd);
> void exynos_cpuidle_init(void);
>
You could also drop a bit more. From the context above I can see that at
least exynos_restart() and exynos_init_io() are never used outside of
files they are defined in, so they too could be dropped from this
header. Looking at rest of the header, there seems to be a lot of
similar definitions. If cleaning up the header anyway, could you take
care of them as well?
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 05/10] ARM: EXYNOS: Move "regs-pmu" header inclusion in common.h
2014-04-02 7:50 ` Pankaj Dubey
@ 2014-04-08 16:09 ` Tomasz Figa
-1 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-08 16:09 UTC (permalink / raw)
To: Pankaj Dubey, linux-arm-kernel, linux-kernel, linux-samsung-soc
Cc: kgene.kim, linux, chow.kim
Hi Pankaj,
On 02.04.2014 09:50, Pankaj Dubey wrote:
> There are many machine files under "mach-exynos" including "regs-pmu.h"
> as well as "common.h", so better we move this header inclusion in common.h.
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/common.h | 1 +
> arch/arm/mach-exynos/cpuidle.c | 1 -
> arch/arm/mach-exynos/exynos.c | 1 -
> arch/arm/mach-exynos/hotplug.c | 1 -
> arch/arm/mach-exynos/platsmp.c | 1 -
> arch/arm/mach-exynos/pm.c | 1 -
> arch/arm/mach-exynos/pmu.c | 1 -
> 7 files changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
> index 277a83e..ff28334 100644
> --- a/arch/arm/mach-exynos/common.h
> +++ b/arch/arm/mach-exynos/common.h
> @@ -14,6 +14,7 @@
>
> #include <linux/reboot.h>
> #include <linux/of.h>
> +#include "regs-pmu.h"
>
> void exynos_init_io(void);
> void exynos_restart(enum reboot_mode mode, const char *cmd);
> diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
> index b530231..b9dd8c3 100644
> --- a/arch/arm/mach-exynos/cpuidle.c
> +++ b/arch/arm/mach-exynos/cpuidle.c
> @@ -29,7 +29,6 @@
> #include <mach/map.h>
>
> #include "common.h"
> -#include "regs-pmu.h"
>
> #define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
> S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index 57bd1cd..a5e1349 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -30,7 +30,6 @@
>
> #include "common.h"
> #include "mfc.h"
> -#include "regs-pmu.h"
> #include "regs-sys.h"
>
> #define L2_AUX_VAL 0x7C470001
> diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
> index 5eead53..33db6ee 100644
> --- a/arch/arm/mach-exynos/hotplug.c
> +++ b/arch/arm/mach-exynos/hotplug.c
> @@ -22,7 +22,6 @@
> #include <plat/cpu.h>
>
> #include "common.h"
> -#include "regs-pmu.h"
>
> static inline void cpu_enter_lowpower_a9(void)
> {
> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
> index d8d1555..3ebb03f 100644
> --- a/arch/arm/mach-exynos/platsmp.c
> +++ b/arch/arm/mach-exynos/platsmp.c
> @@ -29,7 +29,6 @@
> #include <plat/cpu.h>
>
> #include "common.h"
> -#include "regs-pmu.h"
>
> extern void exynos4_secondary_startup(void);
>
> diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
> index 723c988..875151f 100644
> --- a/arch/arm/mach-exynos/pm.c
> +++ b/arch/arm/mach-exynos/pm.c
> @@ -34,7 +34,6 @@
> #include <mach/map.h>
>
> #include "common.h"
> -#include "regs-pmu.h"
> #include "regs-sys.h"
>
> /**
> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
> index 05c7ce1..fb44352 100644
> --- a/arch/arm/mach-exynos/pmu.c
> +++ b/arch/arm/mach-exynos/pmu.c
> @@ -16,7 +16,6 @@
> #include <plat/cpu.h>
>
> #include "common.h"
> -#include "regs-pmu.h"
>
> static const struct exynos_pmu_conf *exynos_pmu_config;
>
>
I don't think this is a good idea. It adds hidden indirect dependencies
between source files and thus reduces maintainability and readability.
In addition it causes the file to be included even by files that don't
need it.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 05/10] ARM: EXYNOS: Move "regs-pmu" header inclusion in common.h
@ 2014-04-08 16:09 ` Tomasz Figa
0 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-08 16:09 UTC (permalink / raw)
To: linux-arm-kernel
Hi Pankaj,
On 02.04.2014 09:50, Pankaj Dubey wrote:
> There are many machine files under "mach-exynos" including "regs-pmu.h"
> as well as "common.h", so better we move this header inclusion in common.h.
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/common.h | 1 +
> arch/arm/mach-exynos/cpuidle.c | 1 -
> arch/arm/mach-exynos/exynos.c | 1 -
> arch/arm/mach-exynos/hotplug.c | 1 -
> arch/arm/mach-exynos/platsmp.c | 1 -
> arch/arm/mach-exynos/pm.c | 1 -
> arch/arm/mach-exynos/pmu.c | 1 -
> 7 files changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
> index 277a83e..ff28334 100644
> --- a/arch/arm/mach-exynos/common.h
> +++ b/arch/arm/mach-exynos/common.h
> @@ -14,6 +14,7 @@
>
> #include <linux/reboot.h>
> #include <linux/of.h>
> +#include "regs-pmu.h"
>
> void exynos_init_io(void);
> void exynos_restart(enum reboot_mode mode, const char *cmd);
> diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
> index b530231..b9dd8c3 100644
> --- a/arch/arm/mach-exynos/cpuidle.c
> +++ b/arch/arm/mach-exynos/cpuidle.c
> @@ -29,7 +29,6 @@
> #include <mach/map.h>
>
> #include "common.h"
> -#include "regs-pmu.h"
>
> #define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
> S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index 57bd1cd..a5e1349 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -30,7 +30,6 @@
>
> #include "common.h"
> #include "mfc.h"
> -#include "regs-pmu.h"
> #include "regs-sys.h"
>
> #define L2_AUX_VAL 0x7C470001
> diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
> index 5eead53..33db6ee 100644
> --- a/arch/arm/mach-exynos/hotplug.c
> +++ b/arch/arm/mach-exynos/hotplug.c
> @@ -22,7 +22,6 @@
> #include <plat/cpu.h>
>
> #include "common.h"
> -#include "regs-pmu.h"
>
> static inline void cpu_enter_lowpower_a9(void)
> {
> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
> index d8d1555..3ebb03f 100644
> --- a/arch/arm/mach-exynos/platsmp.c
> +++ b/arch/arm/mach-exynos/platsmp.c
> @@ -29,7 +29,6 @@
> #include <plat/cpu.h>
>
> #include "common.h"
> -#include "regs-pmu.h"
>
> extern void exynos4_secondary_startup(void);
>
> diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
> index 723c988..875151f 100644
> --- a/arch/arm/mach-exynos/pm.c
> +++ b/arch/arm/mach-exynos/pm.c
> @@ -34,7 +34,6 @@
> #include <mach/map.h>
>
> #include "common.h"
> -#include "regs-pmu.h"
> #include "regs-sys.h"
>
> /**
> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
> index 05c7ce1..fb44352 100644
> --- a/arch/arm/mach-exynos/pmu.c
> +++ b/arch/arm/mach-exynos/pmu.c
> @@ -16,7 +16,6 @@
> #include <plat/cpu.h>
>
> #include "common.h"
> -#include "regs-pmu.h"
>
> static const struct exynos_pmu_conf *exynos_pmu_config;
>
>
I don't think this is a good idea. It adds hidden indirect dependencies
between source files and thus reduces maintainability and readability.
In addition it causes the file to be included even by files that don't
need it.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 01/10] ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
2014-04-08 15:59 ` Tomasz Figa
@ 2014-04-10 4:35 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-10 4:35 UTC (permalink / raw)
To: Tomasz Figa
Cc: linux-arm-kernel, linux-kernel, linux-samsung-soc, kgene.kim,
linux, chow.kim
Hi Tomasz,
On 04/09/2014 12:59 AM, Tomasz Figa wrote:
> Hi Pankaj,
>
> On 02.04.2014 09:50, Pankaj Dubey wrote:
>> Remove unused declarations from "mach-exynos/common.h"
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/common.h | 3 ---
>> 1 file changed, 3 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
>> index 9ef3f83..277a83e 100644
>> --- a/arch/arm/mach-exynos/common.h
>> +++ b/arch/arm/mach-exynos/common.h
>> @@ -15,9 +15,6 @@
>> #include <linux/reboot.h>
>> #include <linux/of.h>
>>
>> -void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
>> -
>> -struct map_desc;
>> void exynos_init_io(void);
>> void exynos_restart(enum reboot_mode mode, const char *cmd);
>> void exynos_cpuidle_init(void);
>>
>
> You could also drop a bit more. From the context above I can see that at least
> exynos_restart() and exynos_init_io() are never used outside of files they are
> defined in, so they too could be dropped from this header. Looking at rest of
> the header, there seems to be a lot of similar definitions. If cleaning up the
> header anyway, could you take care of them as well?
>
Thanks for review.
Sure, I will take care of other functions which are not required in this header
file in next version.
> Best regards,
> Tomasz
>
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 01/10] ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
@ 2014-04-10 4:35 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-10 4:35 UTC (permalink / raw)
To: linux-arm-kernel
Hi Tomasz,
On 04/09/2014 12:59 AM, Tomasz Figa wrote:
> Hi Pankaj,
>
> On 02.04.2014 09:50, Pankaj Dubey wrote:
>> Remove unused declarations from "mach-exynos/common.h"
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/common.h | 3 ---
>> 1 file changed, 3 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
>> index 9ef3f83..277a83e 100644
>> --- a/arch/arm/mach-exynos/common.h
>> +++ b/arch/arm/mach-exynos/common.h
>> @@ -15,9 +15,6 @@
>> #include <linux/reboot.h>
>> #include <linux/of.h>
>>
>> -void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
>> -
>> -struct map_desc;
>> void exynos_init_io(void);
>> void exynos_restart(enum reboot_mode mode, const char *cmd);
>> void exynos_cpuidle_init(void);
>>
>
> You could also drop a bit more. From the context above I can see that at least
> exynos_restart() and exynos_init_io() are never used outside of files they are
> defined in, so they too could be dropped from this header. Looking at rest of
> the header, there seems to be a lot of similar definitions. If cleaning up the
> header anyway, could you take care of them as well?
>
Thanks for review.
Sure, I will take care of other functions which are not required in this header
file in next version.
> Best regards,
> Tomasz
>
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 05/10] ARM: EXYNOS: Move "regs-pmu" header inclusion in common.h
2014-04-08 16:09 ` Tomasz Figa
@ 2014-04-10 4:58 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-10 4:58 UTC (permalink / raw)
To: Tomasz Figa
Cc: linux-arm-kernel, linux-kernel, linux-samsung-soc, kgene.kim,
linux, chow.kim
Hi Tomasz,
On 04/09/2014 01:09 AM, Tomasz Figa wrote:
> Hi Pankaj,
>
> On 02.04.2014 09:50, Pankaj Dubey wrote:
>> There are many machine files under "mach-exynos" including "regs-pmu.h"
>> as well as "common.h", so better we move this header inclusion in common.h.
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/common.h | 1 +
>> arch/arm/mach-exynos/cpuidle.c | 1 -
>> arch/arm/mach-exynos/exynos.c | 1 -
>> arch/arm/mach-exynos/hotplug.c | 1 -
>> arch/arm/mach-exynos/platsmp.c | 1 -
>> arch/arm/mach-exynos/pm.c | 1 -
>> arch/arm/mach-exynos/pmu.c | 1 -
>> 7 files changed, 1 insertion(+), 6 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
>> index 277a83e..ff28334 100644
>> --- a/arch/arm/mach-exynos/common.h
>> +++ b/arch/arm/mach-exynos/common.h
>> @@ -14,6 +14,7 @@
>>
>> #include <linux/reboot.h>
>> #include <linux/of.h>
>> +#include "regs-pmu.h"
>>
>> void exynos_init_io(void);
>> void exynos_restart(enum reboot_mode mode, const char *cmd);
>> diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
>> index b530231..b9dd8c3 100644
>> --- a/arch/arm/mach-exynos/cpuidle.c
>> +++ b/arch/arm/mach-exynos/cpuidle.c
>> @@ -29,7 +29,6 @@
>> #include <mach/map.h>
>>
>> #include "common.h"
>> -#include "regs-pmu.h"
>>
>> #define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
>> S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index 57bd1cd..a5e1349 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -30,7 +30,6 @@
>>
>> #include "common.h"
>> #include "mfc.h"
>> -#include "regs-pmu.h"
>> #include "regs-sys.h"
>>
>> #define L2_AUX_VAL 0x7C470001
>> diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
>> index 5eead53..33db6ee 100644
>> --- a/arch/arm/mach-exynos/hotplug.c
>> +++ b/arch/arm/mach-exynos/hotplug.c
>> @@ -22,7 +22,6 @@
>> #include <plat/cpu.h>
>>
>> #include "common.h"
>> -#include "regs-pmu.h"
>>
>> static inline void cpu_enter_lowpower_a9(void)
>> {
>> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
>> index d8d1555..3ebb03f 100644
>> --- a/arch/arm/mach-exynos/platsmp.c
>> +++ b/arch/arm/mach-exynos/platsmp.c
>> @@ -29,7 +29,6 @@
>> #include <plat/cpu.h>
>>
>> #include "common.h"
>> -#include "regs-pmu.h"
>>
>> extern void exynos4_secondary_startup(void);
>>
>> diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
>> index 723c988..875151f 100644
>> --- a/arch/arm/mach-exynos/pm.c
>> +++ b/arch/arm/mach-exynos/pm.c
>> @@ -34,7 +34,6 @@
>> #include <mach/map.h>
>>
>> #include "common.h"
>> -#include "regs-pmu.h"
>> #include "regs-sys.h"
>>
>> /**
>> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
>> index 05c7ce1..fb44352 100644
>> --- a/arch/arm/mach-exynos/pmu.c
>> +++ b/arch/arm/mach-exynos/pmu.c
>> @@ -16,7 +16,6 @@
>> #include <plat/cpu.h>
>>
>> #include "common.h"
>> -#include "regs-pmu.h"
>>
>> static const struct exynos_pmu_conf *exynos_pmu_config;
>>
>>
>
> I don't think this is a good idea. It adds hidden indirect dependencies
> between source files and thus reduces maintainability and readability. In
> addition it causes the file to be included even by files that don't need it.
>
Thanks for review.
I did this change because:
1: Currently only these 6 files (under "arm/mach-exynos/") are including
"regs-pmu.h"
as well as "common.h" so all these source files requires "regs-pmu.h" can get it
included via "common.h".
2: Next if we change location/rename "regs-pmu.h", we need to update all these
source files. On the other hand
if it's present in common.h it can be done at single place in "common.h".
3: More over just checked that even currently common.h has some hidden includes
such as ("linux/of.h") which is not
required by all source files (I can see only pm.c needs it).
So let me know if still you think it's not good idea, I will consider to drop
this patch in next version of patch series.
> Best regards,
> Tomasz
>
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 05/10] ARM: EXYNOS: Move "regs-pmu" header inclusion in common.h
@ 2014-04-10 4:58 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-10 4:58 UTC (permalink / raw)
To: linux-arm-kernel
Hi Tomasz,
On 04/09/2014 01:09 AM, Tomasz Figa wrote:
> Hi Pankaj,
>
> On 02.04.2014 09:50, Pankaj Dubey wrote:
>> There are many machine files under "mach-exynos" including "regs-pmu.h"
>> as well as "common.h", so better we move this header inclusion in common.h.
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/common.h | 1 +
>> arch/arm/mach-exynos/cpuidle.c | 1 -
>> arch/arm/mach-exynos/exynos.c | 1 -
>> arch/arm/mach-exynos/hotplug.c | 1 -
>> arch/arm/mach-exynos/platsmp.c | 1 -
>> arch/arm/mach-exynos/pm.c | 1 -
>> arch/arm/mach-exynos/pmu.c | 1 -
>> 7 files changed, 1 insertion(+), 6 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
>> index 277a83e..ff28334 100644
>> --- a/arch/arm/mach-exynos/common.h
>> +++ b/arch/arm/mach-exynos/common.h
>> @@ -14,6 +14,7 @@
>>
>> #include <linux/reboot.h>
>> #include <linux/of.h>
>> +#include "regs-pmu.h"
>>
>> void exynos_init_io(void);
>> void exynos_restart(enum reboot_mode mode, const char *cmd);
>> diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
>> index b530231..b9dd8c3 100644
>> --- a/arch/arm/mach-exynos/cpuidle.c
>> +++ b/arch/arm/mach-exynos/cpuidle.c
>> @@ -29,7 +29,6 @@
>> #include <mach/map.h>
>>
>> #include "common.h"
>> -#include "regs-pmu.h"
>>
>> #define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
>> S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index 57bd1cd..a5e1349 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -30,7 +30,6 @@
>>
>> #include "common.h"
>> #include "mfc.h"
>> -#include "regs-pmu.h"
>> #include "regs-sys.h"
>>
>> #define L2_AUX_VAL 0x7C470001
>> diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
>> index 5eead53..33db6ee 100644
>> --- a/arch/arm/mach-exynos/hotplug.c
>> +++ b/arch/arm/mach-exynos/hotplug.c
>> @@ -22,7 +22,6 @@
>> #include <plat/cpu.h>
>>
>> #include "common.h"
>> -#include "regs-pmu.h"
>>
>> static inline void cpu_enter_lowpower_a9(void)
>> {
>> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
>> index d8d1555..3ebb03f 100644
>> --- a/arch/arm/mach-exynos/platsmp.c
>> +++ b/arch/arm/mach-exynos/platsmp.c
>> @@ -29,7 +29,6 @@
>> #include <plat/cpu.h>
>>
>> #include "common.h"
>> -#include "regs-pmu.h"
>>
>> extern void exynos4_secondary_startup(void);
>>
>> diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
>> index 723c988..875151f 100644
>> --- a/arch/arm/mach-exynos/pm.c
>> +++ b/arch/arm/mach-exynos/pm.c
>> @@ -34,7 +34,6 @@
>> #include <mach/map.h>
>>
>> #include "common.h"
>> -#include "regs-pmu.h"
>> #include "regs-sys.h"
>>
>> /**
>> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
>> index 05c7ce1..fb44352 100644
>> --- a/arch/arm/mach-exynos/pmu.c
>> +++ b/arch/arm/mach-exynos/pmu.c
>> @@ -16,7 +16,6 @@
>> #include <plat/cpu.h>
>>
>> #include "common.h"
>> -#include "regs-pmu.h"
>>
>> static const struct exynos_pmu_conf *exynos_pmu_config;
>>
>>
>
> I don't think this is a good idea. It adds hidden indirect dependencies
> between source files and thus reduces maintainability and readability. In
> addition it causes the file to be included even by files that don't need it.
>
Thanks for review.
I did this change because:
1: Currently only these 6 files (under "arm/mach-exynos/") are including
"regs-pmu.h"
as well as "common.h" so all these source files requires "regs-pmu.h" can get it
included via "common.h".
2: Next if we change location/rename "regs-pmu.h", we need to update all these
source files. On the other hand
if it's present in common.h it can be done at single place in "common.h".
3: More over just checked that even currently common.h has some hidden includes
such as ("linux/of.h") which is not
required by all source files (I can see only pm.c needs it).
So let me know if still you think it's not good idea, I will consider to drop
this patch in next version of patch series.
> Best regards,
> Tomasz
>
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 03/10] ARM: EXYNOS: Move SYSREG definition into sys-reg specific file
2014-04-02 11:27 ` Sylwester Nawrocki
@ 2014-04-11 6:07 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-11 6:07 UTC (permalink / raw)
To: Sylwester Nawrocki
Cc: linux-arm-kernel, linux-kernel, linux-samsung-soc, kgene.kim,
linux, chow.kim, Young-Gun Jang
On 04/02/2014 08:27 PM, Sylwester Nawrocki wrote:
> Hi,
>
> On 02/04/14 09:50, Pankaj Dubey wrote:
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> While making PMU (Power Mengement Unit) implementation device tree based,
>> there are few offsets related with SYSREG present in regs-pmu.h, so let's
>> make a new header file "regs-sys.h" to keep all such SYSREG related
>> register definition and remove them from "regs-pmu.h"
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/exynos.c | 1 +
>> arch/arm/mach-exynos/pm.c | 1 +
>> arch/arm/mach-exynos/regs-pmu.h | 3 ---
>> arch/arm/mach-exynos/regs-sys.h | 22 ++++++++++++++++++++++
>> 4 files changed, 24 insertions(+), 3 deletions(-)
>> create mode 100644 arch/arm/mach-exynos/regs-sys.h
> [...]
>> diff --git a/arch/arm/mach-exynos/regs-sys.h b/arch/arm/mach-exynos/regs-sys.h
>> new file mode 100644
>> index 0000000..84332b0
>> --- /dev/null
>> +++ b/arch/arm/mach-exynos/regs-sys.h
>> @@ -0,0 +1,22 @@
>> +/*
>> + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
>> + * http://www.samsung.com
>> + *
>> + * EXYNOS - system register definition
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> +*/
>> +
>> +#ifndef __ASM_ARCH_REGS_SYS_H
>> +#define __ASM_ARCH_REGS_SYS_H __FILE__
>> +
>> +#include <mach/map.h>
>> +
>> +#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
>> +
>> +/* For EXYNOS5 */
>> +#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
> Can this be defined as a regular register offset in a header file
> placed at include/linux/mfd/syscon/ ? I.e. can the mfd syscon driver be
> used instead of these hacks ?
>
No. As currently SysRegs are being accessed via iodesc table and not via DT,
it has dependency on "mach/map.h".
We separated these definitions from "regs-pmu.h" as it does not belong to EXYNOS
PMU IP.
But this can be done once we make some way of accessing SysReg register sets via DT.
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 03/10] ARM: EXYNOS: Move SYSREG definition into sys-reg specific file
@ 2014-04-11 6:07 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-11 6:07 UTC (permalink / raw)
To: linux-arm-kernel
On 04/02/2014 08:27 PM, Sylwester Nawrocki wrote:
> Hi,
>
> On 02/04/14 09:50, Pankaj Dubey wrote:
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> While making PMU (Power Mengement Unit) implementation device tree based,
>> there are few offsets related with SYSREG present in regs-pmu.h, so let's
>> make a new header file "regs-sys.h" to keep all such SYSREG related
>> register definition and remove them from "regs-pmu.h"
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/exynos.c | 1 +
>> arch/arm/mach-exynos/pm.c | 1 +
>> arch/arm/mach-exynos/regs-pmu.h | 3 ---
>> arch/arm/mach-exynos/regs-sys.h | 22 ++++++++++++++++++++++
>> 4 files changed, 24 insertions(+), 3 deletions(-)
>> create mode 100644 arch/arm/mach-exynos/regs-sys.h
> [...]
>> diff --git a/arch/arm/mach-exynos/regs-sys.h b/arch/arm/mach-exynos/regs-sys.h
>> new file mode 100644
>> index 0000000..84332b0
>> --- /dev/null
>> +++ b/arch/arm/mach-exynos/regs-sys.h
>> @@ -0,0 +1,22 @@
>> +/*
>> + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
>> + * http://www.samsung.com
>> + *
>> + * EXYNOS - system register definition
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> +*/
>> +
>> +#ifndef __ASM_ARCH_REGS_SYS_H
>> +#define __ASM_ARCH_REGS_SYS_H __FILE__
>> +
>> +#include <mach/map.h>
>> +
>> +#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
>> +
>> +/* For EXYNOS5 */
>> +#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
> Can this be defined as a regular register offset in a header file
> placed at include/linux/mfd/syscon/ ? I.e. can the mfd syscon driver be
> used instead of these hacks ?
>
No. As currently SysRegs are being accessed via iodesc table and not via DT,
it has dependency on "mach/map.h".
We separated these definitions from "regs-pmu.h" as it does not belong to EXYNOS
PMU IP.
But this can be done once we make some way of accessing SysReg register sets via DT.
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
2014-04-02 7:50 ` Pankaj Dubey
(?)
@ 2014-04-23 13:02 ` Vikas Sajjan
-1 siblings, 0 replies; 110+ messages in thread
From: Vikas Sajjan @ 2014-04-23 13:02 UTC (permalink / raw)
To: Pankaj Dubey
Cc: linux-arm-kernel, linux-kernel, linux-samsung-soc, Kukjin Kim,
linux, chow.kim, Young-Gun Jang, sunil joshi, Tomasz Figa
Hi,
On Wed, Apr 2, 2014 at 1:20 PM, Pankaj Dubey <pankaj.dubey@samsung.com> wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> Add support for mapping Exynos Power Management Unit (PMU) base address
> from device tree. Code will use existing samsung pmu binding information.
> This patch also adds "get_exynos_pmubase" a helper function to return mapped base
> address to various other files under "mach-exynos".
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/common.h | 2 ++
> arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 46 insertions(+)
>
> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
> index ff28334..9a55cf6 100644
> --- a/arch/arm/mach-exynos/common.h
> +++ b/arch/arm/mach-exynos/common.h
> @@ -61,4 +61,6 @@ struct exynos_pmu_conf {
>
> extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
>
> +extern void __iomem *get_exynos_pmubase(void);
> +
> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index a5e1349..a5127fb 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -35,6 +35,8 @@
> #define L2_AUX_VAL 0x7C470001
> #define L2_AUX_MASK 0xC200ffff
>
> +static void __iomem *exynos_pmu_base __initdata;
Are you sure you want to keep exynos_pmu_base in .init section.
I am seeing a crash in platform_do_lowpower()
I think you should remove __initdata.
> +
> static struct map_desc exynos4_iodesc[] __initdata = {
> {
> .virtual = (unsigned long)S3C_VA_SYS,
> @@ -245,6 +247,47 @@ void __init exynos_init_late(void)
> exynos_pm_init();
> }
>
> +static char const *exynos_dt_pmu_match[] __initconst = {
> + "samsung,exynos4210-pmu",
> + "samsung,exynos4212-pmu",
> + "samsung,exynos4412-pmu",
> + "samsung,exynos5250-pmu",
> + NULL
> +};
> +
> +static int __init exynos_fdt_map_pmu(unsigned long node,
> + const char *uname, int depth, void *data)
> +{
> + struct map_desc iodesc;
> + __be32 *reg;
> + unsigned long len;
> +
> + if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
> + phys_addr_t phys_addr;
> + reg = of_get_flat_dt_prop(node, "reg", &len);
> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
> + return 0;
> +
> + phys_addr = be32_to_cpu(reg[0]);
> + iodesc.pfn = __phys_to_pfn(phys_addr);
> + iodesc.length = be32_to_cpu(reg[1]) - 1;
> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
> + iodesc.type = MT_DEVICE;
> + iotable_init(&iodesc, 1);
> +
> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
> + if (WARN_ON(!exynos_pmu_base))
> + return -EFAULT;
> + }
> +
> + return 0;
> +}
> +
> +inline void __iomem *get_exynos_pmubase()
> +{
> + return exynos_pmu_base;
> +}
> +
> static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
> int depth, void *data)
> {
> @@ -301,6 +344,7 @@ void __init exynos_init_io(void)
> debug_ll_io_init();
>
> of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
> + of_scan_flat_dt(exynos_fdt_map_pmu, NULL);
>
> /* detect cpu id and rev. */
> s5p_init_cpu(S5P_VA_CHIPID);
> --
> 1.7.10.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-23 13:02 ` Vikas Sajjan
0 siblings, 0 replies; 110+ messages in thread
From: Vikas Sajjan @ 2014-04-23 13:02 UTC (permalink / raw)
To: Pankaj Dubey
Cc: linux-arm-kernel, linux-kernel, linux-samsung-soc, Kukjin Kim,
linux, chow.kim, Young-Gun Jang, sunil joshi, Tomasz Figa
Hi,
On Wed, Apr 2, 2014 at 1:20 PM, Pankaj Dubey <pankaj.dubey@samsung.com> wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> Add support for mapping Exynos Power Management Unit (PMU) base address
> from device tree. Code will use existing samsung pmu binding information.
> This patch also adds "get_exynos_pmubase" a helper function to return mapped base
> address to various other files under "mach-exynos".
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/common.h | 2 ++
> arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 46 insertions(+)
>
> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
> index ff28334..9a55cf6 100644
> --- a/arch/arm/mach-exynos/common.h
> +++ b/arch/arm/mach-exynos/common.h
> @@ -61,4 +61,6 @@ struct exynos_pmu_conf {
>
> extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
>
> +extern void __iomem *get_exynos_pmubase(void);
> +
> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index a5e1349..a5127fb 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -35,6 +35,8 @@
> #define L2_AUX_VAL 0x7C470001
> #define L2_AUX_MASK 0xC200ffff
>
> +static void __iomem *exynos_pmu_base __initdata;
Are you sure you want to keep exynos_pmu_base in .init section.
I am seeing a crash in platform_do_lowpower()
I think you should remove __initdata.
> +
> static struct map_desc exynos4_iodesc[] __initdata = {
> {
> .virtual = (unsigned long)S3C_VA_SYS,
> @@ -245,6 +247,47 @@ void __init exynos_init_late(void)
> exynos_pm_init();
> }
>
> +static char const *exynos_dt_pmu_match[] __initconst = {
> + "samsung,exynos4210-pmu",
> + "samsung,exynos4212-pmu",
> + "samsung,exynos4412-pmu",
> + "samsung,exynos5250-pmu",
> + NULL
> +};
> +
> +static int __init exynos_fdt_map_pmu(unsigned long node,
> + const char *uname, int depth, void *data)
> +{
> + struct map_desc iodesc;
> + __be32 *reg;
> + unsigned long len;
> +
> + if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
> + phys_addr_t phys_addr;
> + reg = of_get_flat_dt_prop(node, "reg", &len);
> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
> + return 0;
> +
> + phys_addr = be32_to_cpu(reg[0]);
> + iodesc.pfn = __phys_to_pfn(phys_addr);
> + iodesc.length = be32_to_cpu(reg[1]) - 1;
> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
> + iodesc.type = MT_DEVICE;
> + iotable_init(&iodesc, 1);
> +
> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
> + if (WARN_ON(!exynos_pmu_base))
> + return -EFAULT;
> + }
> +
> + return 0;
> +}
> +
> +inline void __iomem *get_exynos_pmubase()
> +{
> + return exynos_pmu_base;
> +}
> +
> static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
> int depth, void *data)
> {
> @@ -301,6 +344,7 @@ void __init exynos_init_io(void)
> debug_ll_io_init();
>
> of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
> + of_scan_flat_dt(exynos_fdt_map_pmu, NULL);
>
> /* detect cpu id and rev. */
> s5p_init_cpu(S5P_VA_CHIPID);
> --
> 1.7.10.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-23 13:02 ` Vikas Sajjan
0 siblings, 0 replies; 110+ messages in thread
From: Vikas Sajjan @ 2014-04-23 13:02 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Wed, Apr 2, 2014 at 1:20 PM, Pankaj Dubey <pankaj.dubey@samsung.com> wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> Add support for mapping Exynos Power Management Unit (PMU) base address
> from device tree. Code will use existing samsung pmu binding information.
> This patch also adds "get_exynos_pmubase" a helper function to return mapped base
> address to various other files under "mach-exynos".
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/common.h | 2 ++
> arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 46 insertions(+)
>
> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
> index ff28334..9a55cf6 100644
> --- a/arch/arm/mach-exynos/common.h
> +++ b/arch/arm/mach-exynos/common.h
> @@ -61,4 +61,6 @@ struct exynos_pmu_conf {
>
> extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
>
> +extern void __iomem *get_exynos_pmubase(void);
> +
> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index a5e1349..a5127fb 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -35,6 +35,8 @@
> #define L2_AUX_VAL 0x7C470001
> #define L2_AUX_MASK 0xC200ffff
>
> +static void __iomem *exynos_pmu_base __initdata;
Are you sure you want to keep exynos_pmu_base in .init section.
I am seeing a crash in platform_do_lowpower()
I think you should remove __initdata.
> +
> static struct map_desc exynos4_iodesc[] __initdata = {
> {
> .virtual = (unsigned long)S3C_VA_SYS,
> @@ -245,6 +247,47 @@ void __init exynos_init_late(void)
> exynos_pm_init();
> }
>
> +static char const *exynos_dt_pmu_match[] __initconst = {
> + "samsung,exynos4210-pmu",
> + "samsung,exynos4212-pmu",
> + "samsung,exynos4412-pmu",
> + "samsung,exynos5250-pmu",
> + NULL
> +};
> +
> +static int __init exynos_fdt_map_pmu(unsigned long node,
> + const char *uname, int depth, void *data)
> +{
> + struct map_desc iodesc;
> + __be32 *reg;
> + unsigned long len;
> +
> + if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
> + phys_addr_t phys_addr;
> + reg = of_get_flat_dt_prop(node, "reg", &len);
> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
> + return 0;
> +
> + phys_addr = be32_to_cpu(reg[0]);
> + iodesc.pfn = __phys_to_pfn(phys_addr);
> + iodesc.length = be32_to_cpu(reg[1]) - 1;
> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
> + iodesc.type = MT_DEVICE;
> + iotable_init(&iodesc, 1);
> +
> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
> + if (WARN_ON(!exynos_pmu_base))
> + return -EFAULT;
> + }
> +
> + return 0;
> +}
> +
> +inline void __iomem *get_exynos_pmubase()
> +{
> + return exynos_pmu_base;
> +}
> +
> static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
> int depth, void *data)
> {
> @@ -301,6 +344,7 @@ void __init exynos_init_io(void)
> debug_ll_io_init();
>
> of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
> + of_scan_flat_dt(exynos_fdt_map_pmu, NULL);
>
> /* detect cpu id and rev. */
> s5p_init_cpu(S5P_VA_CHIPID);
> --
> 1.7.10.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
2014-04-23 13:02 ` Vikas Sajjan
(?)
@ 2014-04-24 2:45 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-24 2:45 UTC (permalink / raw)
To: Vikas Sajjan
Cc: linux-arm-kernel, linux-kernel, linux-samsung-soc, Kukjin Kim,
linux, chow.kim, Young-Gun Jang, sunil joshi, Tomasz Figa
Hi Vikas,
On 04/23/2014 10:02 PM, Vikas Sajjan wrote:
> Hi,
>
> On Wed, Apr 2, 2014 at 1:20 PM, Pankaj Dubey <pankaj.dubey@samsung.com> wrote:
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> Add support for mapping Exynos Power Management Unit (PMU) base address
>> from device tree. Code will use existing samsung pmu binding information.
>> This patch also adds "get_exynos_pmubase" a helper function to return mapped base
>> address to various other files under "mach-exynos".
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/common.h | 2 ++
>> arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 46 insertions(+)
>>
>> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
>> index ff28334..9a55cf6 100644
>> --- a/arch/arm/mach-exynos/common.h
>> +++ b/arch/arm/mach-exynos/common.h
>> @@ -61,4 +61,6 @@ struct exynos_pmu_conf {
>>
>> extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
>>
>> +extern void __iomem *get_exynos_pmubase(void);
>> +
>> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index a5e1349..a5127fb 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -35,6 +35,8 @@
>> #define L2_AUX_VAL 0x7C470001
>> #define L2_AUX_MASK 0xC200ffff
>>
>> +static void __iomem *exynos_pmu_base __initdata;
> Are you sure you want to keep exynos_pmu_base in .init section.
> I am seeing a crash in platform_do_lowpower()
> I think you should remove __initdata.
Thanks for review and testing.
You are right we do not need __initdata here.
I will take care of this in V2.
>> +
>> static struct map_desc exynos4_iodesc[] __initdata = {
>> {
>> .virtual = (unsigned long)S3C_VA_SYS,
>> @@ -245,6 +247,47 @@ void __init exynos_init_late(void)
>> exynos_pm_init();
>> }
>>
>> +static char const *exynos_dt_pmu_match[] __initconst = {
>> + "samsung,exynos4210-pmu",
>> + "samsung,exynos4212-pmu",
>> + "samsung,exynos4412-pmu",
>> + "samsung,exynos5250-pmu",
>> + NULL
>> +};
>> +
>> +static int __init exynos_fdt_map_pmu(unsigned long node,
>> + const char *uname, int depth, void *data)
>> +{
>> + struct map_desc iodesc;
>> + __be32 *reg;
>> + unsigned long len;
>> +
>> + if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
>> + phys_addr_t phys_addr;
>> + reg = of_get_flat_dt_prop(node, "reg", &len);
>> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
>> + return 0;
>> +
>> + phys_addr = be32_to_cpu(reg[0]);
>> + iodesc.pfn = __phys_to_pfn(phys_addr);
>> + iodesc.length = be32_to_cpu(reg[1]) - 1;
>> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
>> + iodesc.type = MT_DEVICE;
>> + iotable_init(&iodesc, 1);
>> +
>> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
>> + if (WARN_ON(!exynos_pmu_base))
>> + return -EFAULT;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +inline void __iomem *get_exynos_pmubase()
>> +{
>> + return exynos_pmu_base;
>> +}
>> +
>> static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
>> int depth, void *data)
>> {
>> @@ -301,6 +344,7 @@ void __init exynos_init_io(void)
>> debug_ll_io_init();
>>
>> of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
>> + of_scan_flat_dt(exynos_fdt_map_pmu, NULL);
>>
>> /* detect cpu id and rev. */
>> s5p_init_cpu(S5P_VA_CHIPID);
>> --
>> 1.7.10.4
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>> Please read the FAQ at http://www.tux.org/lkml/
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-24 2:45 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-24 2:45 UTC (permalink / raw)
To: Vikas Sajjan
Cc: linux-arm-kernel, linux-kernel, linux-samsung-soc, Kukjin Kim,
linux, chow.kim, Young-Gun Jang, sunil joshi, Tomasz Figa
Hi Vikas,
On 04/23/2014 10:02 PM, Vikas Sajjan wrote:
> Hi,
>
> On Wed, Apr 2, 2014 at 1:20 PM, Pankaj Dubey <pankaj.dubey@samsung.com> wrote:
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> Add support for mapping Exynos Power Management Unit (PMU) base address
>> from device tree. Code will use existing samsung pmu binding information.
>> This patch also adds "get_exynos_pmubase" a helper function to return mapped base
>> address to various other files under "mach-exynos".
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/common.h | 2 ++
>> arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 46 insertions(+)
>>
>> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
>> index ff28334..9a55cf6 100644
>> --- a/arch/arm/mach-exynos/common.h
>> +++ b/arch/arm/mach-exynos/common.h
>> @@ -61,4 +61,6 @@ struct exynos_pmu_conf {
>>
>> extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
>>
>> +extern void __iomem *get_exynos_pmubase(void);
>> +
>> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index a5e1349..a5127fb 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -35,6 +35,8 @@
>> #define L2_AUX_VAL 0x7C470001
>> #define L2_AUX_MASK 0xC200ffff
>>
>> +static void __iomem *exynos_pmu_base __initdata;
> Are you sure you want to keep exynos_pmu_base in .init section.
> I am seeing a crash in platform_do_lowpower()
> I think you should remove __initdata.
Thanks for review and testing.
You are right we do not need __initdata here.
I will take care of this in V2.
>> +
>> static struct map_desc exynos4_iodesc[] __initdata = {
>> {
>> .virtual = (unsigned long)S3C_VA_SYS,
>> @@ -245,6 +247,47 @@ void __init exynos_init_late(void)
>> exynos_pm_init();
>> }
>>
>> +static char const *exynos_dt_pmu_match[] __initconst = {
>> + "samsung,exynos4210-pmu",
>> + "samsung,exynos4212-pmu",
>> + "samsung,exynos4412-pmu",
>> + "samsung,exynos5250-pmu",
>> + NULL
>> +};
>> +
>> +static int __init exynos_fdt_map_pmu(unsigned long node,
>> + const char *uname, int depth, void *data)
>> +{
>> + struct map_desc iodesc;
>> + __be32 *reg;
>> + unsigned long len;
>> +
>> + if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
>> + phys_addr_t phys_addr;
>> + reg = of_get_flat_dt_prop(node, "reg", &len);
>> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
>> + return 0;
>> +
>> + phys_addr = be32_to_cpu(reg[0]);
>> + iodesc.pfn = __phys_to_pfn(phys_addr);
>> + iodesc.length = be32_to_cpu(reg[1]) - 1;
>> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
>> + iodesc.type = MT_DEVICE;
>> + iotable_init(&iodesc, 1);
>> +
>> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
>> + if (WARN_ON(!exynos_pmu_base))
>> + return -EFAULT;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +inline void __iomem *get_exynos_pmubase()
>> +{
>> + return exynos_pmu_base;
>> +}
>> +
>> static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
>> int depth, void *data)
>> {
>> @@ -301,6 +344,7 @@ void __init exynos_init_io(void)
>> debug_ll_io_init();
>>
>> of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
>> + of_scan_flat_dt(exynos_fdt_map_pmu, NULL);
>>
>> /* detect cpu id and rev. */
>> s5p_init_cpu(S5P_VA_CHIPID);
>> --
>> 1.7.10.4
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>> Please read the FAQ at http://www.tux.org/lkml/
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-24 2:45 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-24 2:45 UTC (permalink / raw)
To: linux-arm-kernel
Hi Vikas,
On 04/23/2014 10:02 PM, Vikas Sajjan wrote:
> Hi,
>
> On Wed, Apr 2, 2014 at 1:20 PM, Pankaj Dubey <pankaj.dubey@samsung.com> wrote:
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> Add support for mapping Exynos Power Management Unit (PMU) base address
>> from device tree. Code will use existing samsung pmu binding information.
>> This patch also adds "get_exynos_pmubase" a helper function to return mapped base
>> address to various other files under "mach-exynos".
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/common.h | 2 ++
>> arch/arm/mach-exynos/exynos.c | 44 +++++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 46 insertions(+)
>>
>> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
>> index ff28334..9a55cf6 100644
>> --- a/arch/arm/mach-exynos/common.h
>> +++ b/arch/arm/mach-exynos/common.h
>> @@ -61,4 +61,6 @@ struct exynos_pmu_conf {
>>
>> extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
>>
>> +extern void __iomem *get_exynos_pmubase(void);
>> +
>> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index a5e1349..a5127fb 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -35,6 +35,8 @@
>> #define L2_AUX_VAL 0x7C470001
>> #define L2_AUX_MASK 0xC200ffff
>>
>> +static void __iomem *exynos_pmu_base __initdata;
> Are you sure you want to keep exynos_pmu_base in .init section.
> I am seeing a crash in platform_do_lowpower()
> I think you should remove __initdata.
Thanks for review and testing.
You are right we do not need __initdata here.
I will take care of this in V2.
>> +
>> static struct map_desc exynos4_iodesc[] __initdata = {
>> {
>> .virtual = (unsigned long)S3C_VA_SYS,
>> @@ -245,6 +247,47 @@ void __init exynos_init_late(void)
>> exynos_pm_init();
>> }
>>
>> +static char const *exynos_dt_pmu_match[] __initconst = {
>> + "samsung,exynos4210-pmu",
>> + "samsung,exynos4212-pmu",
>> + "samsung,exynos4412-pmu",
>> + "samsung,exynos5250-pmu",
>> + NULL
>> +};
>> +
>> +static int __init exynos_fdt_map_pmu(unsigned long node,
>> + const char *uname, int depth, void *data)
>> +{
>> + struct map_desc iodesc;
>> + __be32 *reg;
>> + unsigned long len;
>> +
>> + if (of_flat_dt_match(node, exynos_dt_pmu_match)) {
>> + phys_addr_t phys_addr;
>> + reg = of_get_flat_dt_prop(node, "reg", &len);
>> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
>> + return 0;
>> +
>> + phys_addr = be32_to_cpu(reg[0]);
>> + iodesc.pfn = __phys_to_pfn(phys_addr);
>> + iodesc.length = be32_to_cpu(reg[1]) - 1;
>> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
>> + iodesc.type = MT_DEVICE;
>> + iotable_init(&iodesc, 1);
>> +
>> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
>> + if (WARN_ON(!exynos_pmu_base))
>> + return -EFAULT;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +inline void __iomem *get_exynos_pmubase()
>> +{
>> + return exynos_pmu_base;
>> +}
>> +
>> static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
>> int depth, void *data)
>> {
>> @@ -301,6 +344,7 @@ void __init exynos_init_io(void)
>> debug_ll_io_init();
>>
>> of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
>> + of_scan_flat_dt(exynos_fdt_map_pmu, NULL);
>>
>> /* detect cpu id and rev. */
>> s5p_init_cpu(S5P_VA_CHIPID);
>> --
>> 1.7.10.4
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>> the body of a message to majordomo at vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>> Please read the FAQ at http://www.tux.org/lkml/
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 00/10] ARM: Exynos: PMU cleanup and refactoring for using DT
2014-04-02 7:50 ` Pankaj Dubey
@ 2014-04-25 12:32 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie, Pankaj Dubey
This patch series, does some minor cleanup and modifies Exynos PMU related
code for mapping and initialization of Exynos Power Management Unit (PMU)
base address from device tree. This is also preparation for moving PMU
related code out of machine folder and moving into a "drivers/mfd", so that
ARM64 based SoC can utilize common piece of code. These patches require change
in Exynos4210, Exynos4212 and Exynos4412 dtsi files, which has been posted
as separate patch series [2]
These patches are created on top of Kukjin Kim's for-next (v3.15-rc1 tag)
branch.
These patches depends on following two patch series:
1) mfd: syscon: Support early initialization
https://lkml.org/lkml/2014/4/8/239
2) Add PMU node for Exynos SoCs
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg29329.html
We have tested these patches on SMDK5250 and Arndale (Exynos5250) boards for
System boot and PMU initialization and S2R.
For testing on Arndale (Exynos5250) board:
Tested-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Changes Since v1:
- Rebased on latest for-next of Kukjin Kim's tree.
- Added patch: "Make exynos machine_ops as static".
For making more cleanup in "mach-exynos/common.h"
as suggested by Tomasz Figa.
- Addressed comments of Tomasz Figa for cleaning "mach-exynos/common.h".
- Updated patch: Remove file path from comment section
As suggested by Michel Simek, instead of updating file path
lets remove them from each file under "mach-exynos".
Even though Kukjin pointed out that there is similar patch pending from
Sachin/Tushar but since I could not find I have included this here. If
I have missed something please point to any existing such patch.
- Updated patch: Add support for mapping PMU base address via DT
- Removed __initdata from declaration of "exynos_pmu_base", as it caused
kernel crash as pointed out by Vikas Sajjan.
- Added support for Syscon initialization and getting PMU regmap handle
as suggested by Sylwester. Since current implementation of early
intialization [1] has limitation that "early_syscon_init" requires
DT to be unflattened and system should be able to allocate memory,
we can't use regmap handles for platsmp.c file as "smp_secondary_init"
will be called before DT unflattening. So I have kept both method for
accessing PMU base address. platsmp.c will use ioremmaped address where
as rest other files can use regmap handle.
- Added patch: Remove "linux/bug.h" from pmu.c.
- Updated patch: Refactored code for PMU register mapping via DT
- Modified to use regmap_read/write when using regmap handle.
- Added patch: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c
- Added patch: Add device tree based initialization support for PMU.
- Convert existing PMU implementation to be a device tree based
before moving it to "drivers/mfd" folder. As suggested by Bartlomiej.
- Dropped making a platform_driver for PMU, as currently PMU binding
has two compatibility strings as "samsung, exynosxxx-pmu", "syscon",
once we enable MFD_SYSCON config option, current "syscon" driver probe
gets called and PMU probe never gets called. So modified PMU
initialization code to scan DT and match against supported compatiblity
string in driver code, and once we get matching node use that for
accessing PMU regmap handle using "syscon_early_regmap_lookup_by_phandle".
If there is any better solution please suggest.
Pankaj Dubey (6):
ARM: EXYNOS: Make exynos machine_ops as static
ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
ARM: EXYNOS: Remove file path from comment section
ARM: EXYNOS: Refactored code for using PMU address via DT
ARM: EXYNOS: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c
ARM: EXYNOS: Add device tree based initialization support for PMU.
Young-Gun Jang (4):
ARM: EXYNOS: Move SYSREG definition into sys-reg specific file.
ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
ARM: EXYNOS: Add support for mapping PMU base address via DT
ARM: EXYNOS: Remove "linux/bug.h" from pmu.c
arch/arm/mach-exynos/Kconfig | 2 +
arch/arm/mach-exynos/common.h | 13 +-
arch/arm/mach-exynos/cpuidle.c | 37 +-
arch/arm/mach-exynos/exynos.c | 104 +++++-
arch/arm/mach-exynos/headsmp.S | 2 -
arch/arm/mach-exynos/hotplug.c | 7 +-
arch/arm/mach-exynos/include/mach/map.h | 3 -
arch/arm/mach-exynos/include/mach/memory.h | 3 +-
arch/arm/mach-exynos/platsmp.c | 17 +-
arch/arm/mach-exynos/pm.c | 61 ++--
arch/arm/mach-exynos/pm_domains.c | 2 +-
arch/arm/mach-exynos/pmu.c | 191 ++++++++---
arch/arm/mach-exynos/regs-pmu.h | 512 ++++++++++++++--------------
arch/arm/mach-exynos/regs-sys.h | 22 ++
14 files changed, 585 insertions(+), 391 deletions(-)
create mode 100644 arch/arm/mach-exynos/regs-sys.h
--
1.7.10.4
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 00/10] ARM: Exynos: PMU cleanup and refactoring for using DT
@ 2014-04-25 12:32 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-arm-kernel
This patch series, does some minor cleanup and modifies Exynos PMU related
code for mapping and initialization of Exynos Power Management Unit (PMU)
base address from device tree. This is also preparation for moving PMU
related code out of machine folder and moving into a "drivers/mfd", so that
ARM64 based SoC can utilize common piece of code. These patches require change
in Exynos4210, Exynos4212 and Exynos4412 dtsi files, which has been posted
as separate patch series [2]
These patches are created on top of Kukjin Kim's for-next (v3.15-rc1 tag)
branch.
These patches depends on following two patch series:
1) mfd: syscon: Support early initialization
https://lkml.org/lkml/2014/4/8/239
2) Add PMU node for Exynos SoCs
http://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg29329.html
We have tested these patches on SMDK5250 and Arndale (Exynos5250) boards for
System boot and PMU initialization and S2R.
For testing on Arndale (Exynos5250) board:
Tested-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Changes Since v1:
- Rebased on latest for-next of Kukjin Kim's tree.
- Added patch: "Make exynos machine_ops as static".
For making more cleanup in "mach-exynos/common.h"
as suggested by Tomasz Figa.
- Addressed comments of Tomasz Figa for cleaning "mach-exynos/common.h".
- Updated patch: Remove file path from comment section
As suggested by Michel Simek, instead of updating file path
lets remove them from each file under "mach-exynos".
Even though Kukjin pointed out that there is similar patch pending from
Sachin/Tushar but since I could not find I have included this here. If
I have missed something please point to any existing such patch.
- Updated patch: Add support for mapping PMU base address via DT
- Removed __initdata from declaration of "exynos_pmu_base", as it caused
kernel crash as pointed out by Vikas Sajjan.
- Added support for Syscon initialization and getting PMU regmap handle
as suggested by Sylwester. Since current implementation of early
intialization [1] has limitation that "early_syscon_init" requires
DT to be unflattened and system should be able to allocate memory,
we can't use regmap handles for platsmp.c file as "smp_secondary_init"
will be called before DT unflattening. So I have kept both method for
accessing PMU base address. platsmp.c will use ioremmaped address where
as rest other files can use regmap handle.
- Added patch: Remove "linux/bug.h" from pmu.c.
- Updated patch: Refactored code for PMU register mapping via DT
- Modified to use regmap_read/write when using regmap handle.
- Added patch: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c
- Added patch: Add device tree based initialization support for PMU.
- Convert existing PMU implementation to be a device tree based
before moving it to "drivers/mfd" folder. As suggested by Bartlomiej.
- Dropped making a platform_driver for PMU, as currently PMU binding
has two compatibility strings as "samsung, exynosxxx-pmu", "syscon",
once we enable MFD_SYSCON config option, current "syscon" driver probe
gets called and PMU probe never gets called. So modified PMU
initialization code to scan DT and match against supported compatiblity
string in driver code, and once we get matching node use that for
accessing PMU regmap handle using "syscon_early_regmap_lookup_by_phandle".
If there is any better solution please suggest.
Pankaj Dubey (6):
ARM: EXYNOS: Make exynos machine_ops as static
ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
ARM: EXYNOS: Remove file path from comment section
ARM: EXYNOS: Refactored code for using PMU address via DT
ARM: EXYNOS: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c
ARM: EXYNOS: Add device tree based initialization support for PMU.
Young-Gun Jang (4):
ARM: EXYNOS: Move SYSREG definition into sys-reg specific file.
ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
ARM: EXYNOS: Add support for mapping PMU base address via DT
ARM: EXYNOS: Remove "linux/bug.h" from pmu.c
arch/arm/mach-exynos/Kconfig | 2 +
arch/arm/mach-exynos/common.h | 13 +-
arch/arm/mach-exynos/cpuidle.c | 37 +-
arch/arm/mach-exynos/exynos.c | 104 +++++-
arch/arm/mach-exynos/headsmp.S | 2 -
arch/arm/mach-exynos/hotplug.c | 7 +-
arch/arm/mach-exynos/include/mach/map.h | 3 -
arch/arm/mach-exynos/include/mach/memory.h | 3 +-
arch/arm/mach-exynos/platsmp.c | 17 +-
arch/arm/mach-exynos/pm.c | 61 ++--
arch/arm/mach-exynos/pm_domains.c | 2 +-
arch/arm/mach-exynos/pmu.c | 191 ++++++++---
arch/arm/mach-exynos/regs-pmu.h | 512 ++++++++++++++--------------
arch/arm/mach-exynos/regs-sys.h | 22 ++
14 files changed, 585 insertions(+), 391 deletions(-)
create mode 100644 arch/arm/mach-exynos/regs-sys.h
--
1.7.10.4
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 01/10] ARM: EXYNOS: Make exynos machine_ops as static
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 12:32 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie, Pankaj Dubey
As machine function ops are used only in this file let's make
them static.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/exynos.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index b32a907..2388ee4 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -198,7 +198,7 @@ static struct map_desc exynos5_iodesc[] __initdata = {
},
};
-void exynos_restart(enum reboot_mode mode, const char *cmd)
+static void exynos_restart(enum reboot_mode mode, const char *cmd)
{
struct device_node *np;
u32 val = 0x1;
@@ -235,7 +235,7 @@ void __init exynos_cpufreq_init(void)
platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);
}
-void __init exynos_init_late(void)
+static void __init exynos_init_late(void)
{
if (of_machine_is_compatible("samsung,exynos5440"))
/* to be supported later */
@@ -296,7 +296,7 @@ static void __init exynos_map_io(void)
iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
}
-void __init exynos_init_io(void)
+static void __init exynos_init_io(void)
{
debug_ll_io_init();
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 01/10] ARM: EXYNOS: Make exynos machine_ops as static
@ 2014-04-25 12:32 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-arm-kernel
As machine function ops are used only in this file let's make
them static.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/exynos.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index b32a907..2388ee4 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -198,7 +198,7 @@ static struct map_desc exynos5_iodesc[] __initdata = {
},
};
-void exynos_restart(enum reboot_mode mode, const char *cmd)
+static void exynos_restart(enum reboot_mode mode, const char *cmd)
{
struct device_node *np;
u32 val = 0x1;
@@ -235,7 +235,7 @@ void __init exynos_cpufreq_init(void)
platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);
}
-void __init exynos_init_late(void)
+static void __init exynos_init_late(void)
{
if (of_machine_is_compatible("samsung,exynos5440"))
/* to be supported later */
@@ -296,7 +296,7 @@ static void __init exynos_map_io(void)
iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
}
-void __init exynos_init_io(void)
+static void __init exynos_init_io(void)
{
debug_ll_io_init();
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 02/10] ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 12:32 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie, Pankaj Dubey
Remove unused and unwanted declarations from "mach-exynos/common.h"
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/common.h | 6 ------
1 file changed, 6 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 9ef3f83..31c5964 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -15,14 +15,8 @@
#include <linux/reboot.h>
#include <linux/of.h>
-void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
-
-struct map_desc;
-void exynos_init_io(void);
-void exynos_restart(enum reboot_mode mode, const char *cmd);
void exynos_cpuidle_init(void);
void exynos_cpufreq_init(void);
-void exynos_init_late(void);
void exynos_firmware_init(void);
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 02/10] ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
@ 2014-04-25 12:32 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-arm-kernel
Remove unused and unwanted declarations from "mach-exynos/common.h"
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/common.h | 6 ------
1 file changed, 6 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 9ef3f83..31c5964 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -15,14 +15,8 @@
#include <linux/reboot.h>
#include <linux/of.h>
-void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
-
-struct map_desc;
-void exynos_init_io(void);
-void exynos_restart(enum reboot_mode mode, const char *cmd);
void exynos_cpuidle_init(void);
void exynos_cpufreq_init(void);
-void exynos_init_late(void);
void exynos_firmware_init(void);
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 03/10] ARM: EXYNOS: Move SYSREG definition into sys-reg specific file.
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 12:32 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie, Pankaj Dubey
From: Young-Gun Jang <yg1004.jang@samsung.com>
While making PMU implementation to be device tree based, there are
few register offsets related with SYSREG present in regs-pmu.h, so
let's make a new header file "regs-sys.h" to keep all such SYSREG
related register offsets and remove them from "regs-pmu.h"
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/exynos.c | 1 +
arch/arm/mach-exynos/pm.c | 1 +
arch/arm/mach-exynos/regs-pmu.h | 3 ---
arch/arm/mach-exynos/regs-sys.h | 22 ++++++++++++++++++++++
4 files changed, 24 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/mach-exynos/regs-sys.h
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 2388ee4..d6f405f 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -31,6 +31,7 @@
#include "common.h"
#include "mfc.h"
#include "regs-pmu.h"
+#include "regs-sys.h"
#define L2_AUX_VAL 0x7C470001
#define L2_AUX_MASK 0xC200ffff
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 15af0ce..723c988 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -35,6 +35,7 @@
#include "common.h"
#include "regs-pmu.h"
+#include "regs-sys.h"
/**
* struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 4f6a256..4ee706d 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -15,7 +15,6 @@
#include <mach/map.h>
#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
-#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
#define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200)
@@ -180,8 +179,6 @@
/* For EXYNOS5 */
-#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
-
#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
diff --git a/arch/arm/mach-exynos/regs-sys.h b/arch/arm/mach-exynos/regs-sys.h
new file mode 100644
index 0000000..84332b0
--- /dev/null
+++ b/arch/arm/mach-exynos/regs-sys.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * EXYNOS - system register definition
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_SYS_H
+#define __ASM_ARCH_REGS_SYS_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
+
+/* For EXYNOS5 */
+#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
+
+#endif /* __ASM_ARCH_REGS_SYS_H */
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 03/10] ARM: EXYNOS: Move SYSREG definition into sys-reg specific file.
@ 2014-04-25 12:32 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Young-Gun Jang <yg1004.jang@samsung.com>
While making PMU implementation to be device tree based, there are
few register offsets related with SYSREG present in regs-pmu.h, so
let's make a new header file "regs-sys.h" to keep all such SYSREG
related register offsets and remove them from "regs-pmu.h"
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/exynos.c | 1 +
arch/arm/mach-exynos/pm.c | 1 +
arch/arm/mach-exynos/regs-pmu.h | 3 ---
arch/arm/mach-exynos/regs-sys.h | 22 ++++++++++++++++++++++
4 files changed, 24 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/mach-exynos/regs-sys.h
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 2388ee4..d6f405f 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -31,6 +31,7 @@
#include "common.h"
#include "mfc.h"
#include "regs-pmu.h"
+#include "regs-sys.h"
#define L2_AUX_VAL 0x7C470001
#define L2_AUX_MASK 0xC200ffff
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 15af0ce..723c988 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -35,6 +35,7 @@
#include "common.h"
#include "regs-pmu.h"
+#include "regs-sys.h"
/**
* struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 4f6a256..4ee706d 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -15,7 +15,6 @@
#include <mach/map.h>
#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
-#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
#define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200)
@@ -180,8 +179,6 @@
/* For EXYNOS5 */
-#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
-
#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
diff --git a/arch/arm/mach-exynos/regs-sys.h b/arch/arm/mach-exynos/regs-sys.h
new file mode 100644
index 0000000..84332b0
--- /dev/null
+++ b/arch/arm/mach-exynos/regs-sys.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * EXYNOS - system register definition
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_SYS_H
+#define __ASM_ARCH_REGS_SYS_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
+
+/* For EXYNOS5 */
+#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
+
+#endif /* __ASM_ARCH_REGS_SYS_H */
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 04/10] ARM: EXYNOS: Remove file path from comment section
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 12:32 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie, Pankaj Dubey
Many files under "arm/mach-exynos" are having file path in file
comment section which is invalid now.
So for better code maintainability let's remove them.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/headsmp.S | 2 --
arch/arm/mach-exynos/hotplug.c | 3 +--
arch/arm/mach-exynos/include/mach/memory.h | 3 +--
arch/arm/mach-exynos/platsmp.c | 3 +--
4 files changed, 3 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S
index cdd9d91..698c57f 100644
--- a/arch/arm/mach-exynos/headsmp.S
+++ b/arch/arm/mach-exynos/headsmp.S
@@ -1,6 +1,4 @@
/*
- * linux/arch/arm/mach-exynos4/headsmp.S
- *
* Cloned from linux/arch/arm/mach-realview/headsmp.S
*
* Copyright (c) 2003 ARM Limited
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 5eead53..73b0b5c 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -1,5 +1,4 @@
-/* linux arch/arm/mach-exynos4/hotplug.c
- *
+/*
* Cloned from linux/arch/arm/mach-realview/hotplug.c
*
* Copyright (C) 2002 ARM Ltd.
diff --git a/arch/arm/mach-exynos/include/mach/memory.h b/arch/arm/mach-exynos/include/mach/memory.h
index 2a4cdb7..e19df1f 100644
--- a/arch/arm/mach-exynos/include/mach/memory.h
+++ b/arch/arm/mach-exynos/include/mach/memory.h
@@ -1,5 +1,4 @@
-/* linux/arch/arm/mach-exynos4/include/mach/memory.h
- *
+/*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 03e5e9f..29c2286 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -1,5 +1,4 @@
-/* linux/arch/arm/mach-exynos4/platsmp.c
- *
+/*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 04/10] ARM: EXYNOS: Remove file path from comment section
@ 2014-04-25 12:32 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-arm-kernel
Many files under "arm/mach-exynos" are having file path in file
comment section which is invalid now.
So for better code maintainability let's remove them.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/headsmp.S | 2 --
arch/arm/mach-exynos/hotplug.c | 3 +--
arch/arm/mach-exynos/include/mach/memory.h | 3 +--
arch/arm/mach-exynos/platsmp.c | 3 +--
4 files changed, 3 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S
index cdd9d91..698c57f 100644
--- a/arch/arm/mach-exynos/headsmp.S
+++ b/arch/arm/mach-exynos/headsmp.S
@@ -1,6 +1,4 @@
/*
- * linux/arch/arm/mach-exynos4/headsmp.S
- *
* Cloned from linux/arch/arm/mach-realview/headsmp.S
*
* Copyright (c) 2003 ARM Limited
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 5eead53..73b0b5c 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -1,5 +1,4 @@
-/* linux arch/arm/mach-exynos4/hotplug.c
- *
+/*
* Cloned from linux/arch/arm/mach-realview/hotplug.c
*
* Copyright (C) 2002 ARM Ltd.
diff --git a/arch/arm/mach-exynos/include/mach/memory.h b/arch/arm/mach-exynos/include/mach/memory.h
index 2a4cdb7..e19df1f 100644
--- a/arch/arm/mach-exynos/include/mach/memory.h
+++ b/arch/arm/mach-exynos/include/mach/memory.h
@@ -1,5 +1,4 @@
-/* linux/arch/arm/mach-exynos4/include/mach/memory.h
- *
+/*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 03e5e9f..29c2286 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -1,5 +1,4 @@
-/* linux/arch/arm/mach-exynos4/platsmp.c
- *
+/*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 05/10] ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 12:32 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
From: Young-Gun Jang <yg1004.jang@samsung.com>
Current "pm_domain.c" file uses "S5P_INT_LOCAL_PWR_EN" definition from
"regs-pmu.h" and hence needs to include this header file. As there is
no other user of "S5P_INT_LOCAL_PWR_EN" definition other than pm_domain,
to remove "regs-pmu.h" header file dependency from "pm_domain.c" it's
better we define this definition in "pm_domain.c" file itself and thus it
will help in removing header file inclusion from "pm_domain.c".
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
---
arch/arm/mach-exynos/pm_domains.c | 2 +-
arch/arm/mach-exynos/regs-pmu.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index fe6570e..f676b0a 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -22,7 +22,7 @@
#include <linux/of_platform.h>
#include <linux/sched.h>
-#include "regs-pmu.h"
+#define S5P_INT_LOCAL_PWR_EN 0x7
/*
* Exynos specific wrapper around the generic power domain
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 4ee706d..bfebe84 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -116,7 +116,6 @@
#define S5P_PAD_RET_EBIB_OPTION S5P_PMUREG(0x31A8)
#define S5P_CORE_LOCAL_PWR_EN 0x3
-#define S5P_INT_LOCAL_PWR_EN 0x7
#define S5P_CHECK_SLEEP 0x00000BAD
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 05/10] ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
@ 2014-04-25 12:32 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Young-Gun Jang <yg1004.jang@samsung.com>
Current "pm_domain.c" file uses "S5P_INT_LOCAL_PWR_EN" definition from
"regs-pmu.h" and hence needs to include this header file. As there is
no other user of "S5P_INT_LOCAL_PWR_EN" definition other than pm_domain,
to remove "regs-pmu.h" header file dependency from "pm_domain.c" it's
better we define this definition in "pm_domain.c" file itself and thus it
will help in removing header file inclusion from "pm_domain.c".
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
---
arch/arm/mach-exynos/pm_domains.c | 2 +-
arch/arm/mach-exynos/regs-pmu.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index fe6570e..f676b0a 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -22,7 +22,7 @@
#include <linux/of_platform.h>
#include <linux/sched.h>
-#include "regs-pmu.h"
+#define S5P_INT_LOCAL_PWR_EN 0x7
/*
* Exynos specific wrapper around the generic power domain
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 4ee706d..bfebe84 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -116,7 +116,6 @@
#define S5P_PAD_RET_EBIB_OPTION S5P_PMUREG(0x31A8)
#define S5P_CORE_LOCAL_PWR_EN 0x3
-#define S5P_INT_LOCAL_PWR_EN 0x7
#define S5P_CHECK_SLEEP 0x00000BAD
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 12:32 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie, Pankaj Dubey
From: Young-Gun Jang <yg1004.jang@samsung.com>
Add support for mapping Samsung Power Management Unit (PMU) base address
from device tree. Code will use existing samsung pmu binding information.
This patch also adds two helper functions as "get_exynos_pmuregmap" and
"get_exynos_pmuaddr".
"get_exynos_pmuregmap" returns a regmap based PMU register handle where as
"get_exynos_pmuaddr" returns ioremap virtual address.
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/Kconfig | 2 ++
arch/arm/mach-exynos/common.h | 3 ++
arch/arm/mach-exynos/exynos.c | 78 +++++++++++++++++++++++++++++++++++++++++
3 files changed, 83 insertions(+)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index fc8bf18..2f60c90 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -26,6 +26,7 @@ config ARCH_EXYNOS4
select PINCTRL
select PM_GENERIC_DOMAINS if PM_RUNTIME
select S5P_DEV_MFC
+ select MFD_SYSCON
help
Samsung EXYNOS4 SoCs based systems
@@ -36,6 +37,7 @@ config ARCH_EXYNOS5
select HAVE_ARM_SCU if SMP
select HAVE_SMP
select PINCTRL
+ select MFD_SYSCON
help
Samsung EXYNOS5 (Cortex-A15) SoC based systems
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 31c5964..ecfd0fc 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -57,4 +57,7 @@ struct exynos_pmu_conf {
extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
+extern struct regmap *get_exynos_pmuregmap(void);
+extern void __iomem *get_exynos_pmuaddr(void);
+
#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index d6f405f..68f60e1 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -19,6 +19,7 @@
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/pm_domain.h>
+#include <linux/mfd/syscon.h>
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
@@ -36,6 +37,9 @@
#define L2_AUX_VAL 0x7C470001
#define L2_AUX_MASK 0xC200ffff
+static struct regmap *exynos_pmu_regmap;
+static void __iomem *exynos_pmu_base;
+
static struct map_desc exynos4_iodesc[] __initdata = {
{
.virtual = (unsigned long)S3C_VA_SYS,
@@ -269,6 +273,46 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
return 1;
}
+static const struct of_device_id exynos_dt_pmu_match[] = {
+ { .compatible = "samsung,exynos4210-pmu" },
+ { .compatible = "samsung,exynos4212-pmu" },
+ { .compatible = "samsung,exynos4412-pmu" },
+ { .compatible = "samsung,exynos5250-pmu" },
+ {},
+};
+
+static int __init exynos_fdt_map_pmu(unsigned long node,
+ const char *uname, int depth, void *data)
+{
+ struct map_desc iodesc;
+ __be32 *reg;
+ unsigned long len;
+ phys_addr_t phys_addr;
+ const struct of_device_id *matches = exynos_dt_pmu_match;
+
+ for (; matches->compatible[0]; matches++) {
+ if (!of_flat_dt_is_compatible(node, matches->compatible))
+ continue;
+ reg = of_get_flat_dt_prop(node, "reg", &len);
+ if (reg == NULL || len != (sizeof(unsigned long) * 2))
+ return 0;
+
+ phys_addr = be32_to_cpu(reg[0]);
+ iodesc.pfn = __phys_to_pfn(phys_addr);
+ iodesc.length = be32_to_cpu(reg[1]) - 1;
+ iodesc.virtual = (unsigned long)S5P_VA_PMU;
+ iodesc.type = MT_DEVICE;
+ iotable_init(&iodesc, 1);
+
+ exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
+ if (WARN_ON(!exynos_pmu_base))
+ return -EFAULT;
+ return 1;
+ }
+
+ return 0;
+}
+
/*
* exynos_map_io
*
@@ -302,6 +346,7 @@ static void __init exynos_init_io(void)
debug_ll_io_init();
of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
+ of_scan_flat_dt(exynos_fdt_map_pmu, NULL);
/* detect cpu id and rev. */
s5p_init_cpu(S5P_VA_CHIPID);
@@ -336,6 +381,38 @@ static int __init exynos4_l2x0_cache_init(void)
}
early_initcall(exynos4_l2x0_cache_init);
+
+inline struct regmap *get_exynos_pmuregmap()
+{
+ return exynos_pmu_regmap;
+}
+
+inline void __iomem *get_exynos_pmuaddr()
+{
+ return exynos_pmu_base;
+}
+
+
+void __init exynos_map_pmu(void)
+{
+ struct device_node *np = NULL;
+
+ early_syscon_init();
+
+ np = of_find_matching_node(NULL, exynos_dt_pmu_match);
+
+ if (!np) {
+ pr_err("Failed to find PMU node\n");
+ return;
+ } else {
+ exynos_pmu_regmap = syscon_early_regmap_lookup_by_phandle(np,
+ "samsung,syscon-phandle");
+ }
+
+ if (IS_ERR(exynos_pmu_regmap))
+ pr_err("failed to find exynos_pmu_regmap\n");
+}
+
static void __init exynos_dt_machine_init(void)
{
struct device_node *i2c_np;
@@ -364,6 +441,7 @@ static void __init exynos_dt_machine_init(void)
}
}
+ exynos_map_pmu();
exynos_cpuidle_init();
exynos_cpufreq_init();
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-25 12:32 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Young-Gun Jang <yg1004.jang@samsung.com>
Add support for mapping Samsung Power Management Unit (PMU) base address
from device tree. Code will use existing samsung pmu binding information.
This patch also adds two helper functions as "get_exynos_pmuregmap" and
"get_exynos_pmuaddr".
"get_exynos_pmuregmap" returns a regmap based PMU register handle where as
"get_exynos_pmuaddr" returns ioremap virtual address.
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/Kconfig | 2 ++
arch/arm/mach-exynos/common.h | 3 ++
arch/arm/mach-exynos/exynos.c | 78 +++++++++++++++++++++++++++++++++++++++++
3 files changed, 83 insertions(+)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index fc8bf18..2f60c90 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -26,6 +26,7 @@ config ARCH_EXYNOS4
select PINCTRL
select PM_GENERIC_DOMAINS if PM_RUNTIME
select S5P_DEV_MFC
+ select MFD_SYSCON
help
Samsung EXYNOS4 SoCs based systems
@@ -36,6 +37,7 @@ config ARCH_EXYNOS5
select HAVE_ARM_SCU if SMP
select HAVE_SMP
select PINCTRL
+ select MFD_SYSCON
help
Samsung EXYNOS5 (Cortex-A15) SoC based systems
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 31c5964..ecfd0fc 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -57,4 +57,7 @@ struct exynos_pmu_conf {
extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
+extern struct regmap *get_exynos_pmuregmap(void);
+extern void __iomem *get_exynos_pmuaddr(void);
+
#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index d6f405f..68f60e1 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -19,6 +19,7 @@
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/pm_domain.h>
+#include <linux/mfd/syscon.h>
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
@@ -36,6 +37,9 @@
#define L2_AUX_VAL 0x7C470001
#define L2_AUX_MASK 0xC200ffff
+static struct regmap *exynos_pmu_regmap;
+static void __iomem *exynos_pmu_base;
+
static struct map_desc exynos4_iodesc[] __initdata = {
{
.virtual = (unsigned long)S3C_VA_SYS,
@@ -269,6 +273,46 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
return 1;
}
+static const struct of_device_id exynos_dt_pmu_match[] = {
+ { .compatible = "samsung,exynos4210-pmu" },
+ { .compatible = "samsung,exynos4212-pmu" },
+ { .compatible = "samsung,exynos4412-pmu" },
+ { .compatible = "samsung,exynos5250-pmu" },
+ {},
+};
+
+static int __init exynos_fdt_map_pmu(unsigned long node,
+ const char *uname, int depth, void *data)
+{
+ struct map_desc iodesc;
+ __be32 *reg;
+ unsigned long len;
+ phys_addr_t phys_addr;
+ const struct of_device_id *matches = exynos_dt_pmu_match;
+
+ for (; matches->compatible[0]; matches++) {
+ if (!of_flat_dt_is_compatible(node, matches->compatible))
+ continue;
+ reg = of_get_flat_dt_prop(node, "reg", &len);
+ if (reg == NULL || len != (sizeof(unsigned long) * 2))
+ return 0;
+
+ phys_addr = be32_to_cpu(reg[0]);
+ iodesc.pfn = __phys_to_pfn(phys_addr);
+ iodesc.length = be32_to_cpu(reg[1]) - 1;
+ iodesc.virtual = (unsigned long)S5P_VA_PMU;
+ iodesc.type = MT_DEVICE;
+ iotable_init(&iodesc, 1);
+
+ exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
+ if (WARN_ON(!exynos_pmu_base))
+ return -EFAULT;
+ return 1;
+ }
+
+ return 0;
+}
+
/*
* exynos_map_io
*
@@ -302,6 +346,7 @@ static void __init exynos_init_io(void)
debug_ll_io_init();
of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
+ of_scan_flat_dt(exynos_fdt_map_pmu, NULL);
/* detect cpu id and rev. */
s5p_init_cpu(S5P_VA_CHIPID);
@@ -336,6 +381,38 @@ static int __init exynos4_l2x0_cache_init(void)
}
early_initcall(exynos4_l2x0_cache_init);
+
+inline struct regmap *get_exynos_pmuregmap()
+{
+ return exynos_pmu_regmap;
+}
+
+inline void __iomem *get_exynos_pmuaddr()
+{
+ return exynos_pmu_base;
+}
+
+
+void __init exynos_map_pmu(void)
+{
+ struct device_node *np = NULL;
+
+ early_syscon_init();
+
+ np = of_find_matching_node(NULL, exynos_dt_pmu_match);
+
+ if (!np) {
+ pr_err("Failed to find PMU node\n");
+ return;
+ } else {
+ exynos_pmu_regmap = syscon_early_regmap_lookup_by_phandle(np,
+ "samsung,syscon-phandle");
+ }
+
+ if (IS_ERR(exynos_pmu_regmap))
+ pr_err("failed to find exynos_pmu_regmap\n");
+}
+
static void __init exynos_dt_machine_init(void)
{
struct device_node *i2c_np;
@@ -364,6 +441,7 @@ static void __init exynos_dt_machine_init(void)
}
}
+ exynos_map_pmu();
exynos_cpuidle_init();
exynos_cpufreq_init();
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 07/10] ARM: EXYNOS: Remove "linux/bug.h" from pmu.c
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 12:32 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
From: Young-Gun Jang <yg1004.jang@samsung.com>
This patch removes unnecessary header file inclusion from pmu.c.
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
---
arch/arm/mach-exynos/pmu.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 05c7ce1..4c3453a 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -11,7 +11,6 @@
#include <linux/io.h>
#include <linux/kernel.h>
-#include <linux/bug.h>
#include <plat/cpu.h>
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 07/10] ARM: EXYNOS: Remove "linux/bug.h" from pmu.c
@ 2014-04-25 12:32 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Young-Gun Jang <yg1004.jang@samsung.com>
This patch removes unnecessary header file inclusion from pmu.c.
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
---
arch/arm/mach-exynos/pmu.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 05c7ce1..4c3453a 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -11,7 +11,6 @@
#include <linux/io.h>
#include <linux/kernel.h>
-#include <linux/bug.h>
#include <plat/cpu.h>
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 08/10] ARM: EXYNOS: Refactored code for using PMU address via DT
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 12:32 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie, Pankaj Dubey
Under "arm/mach-exynos" many files are using PMU register offsets.
Since we have added support for accessing PMU base address via DT,
now we can remove PMU mapping from exynosX_iodesc.
Let's convert all these access using either of "get_exynos_pmuaddr"
or "get_exynos_regmap".
This will help us in removing static mapping of PMU base address
as well as help in reducing dependency over machine header files.
Thus helping for migration of PMU implementation from machine to driver
folder which can be reused for ARM64 bsed SoC.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/common.h | 4 +-
arch/arm/mach-exynos/cpuidle.c | 37 ++-
arch/arm/mach-exynos/exynos.c | 19 +-
arch/arm/mach-exynos/hotplug.c | 4 +-
arch/arm/mach-exynos/include/mach/map.h | 3 -
arch/arm/mach-exynos/platsmp.c | 13 +-
arch/arm/mach-exynos/pm.c | 60 ++--
arch/arm/mach-exynos/pmu.c | 40 +--
arch/arm/mach-exynos/regs-pmu.h | 506 +++++++++++++++----------------
9 files changed, 348 insertions(+), 338 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index ecfd0fc..ad5128e 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -40,7 +40,7 @@ extern void exynos_cpu_die(unsigned int cpu);
/* PMU(Power Management Unit) support */
-#define PMU_TABLE_END NULL
+#define PMU_TABLE_END 0xFFFF
enum sys_powerdown {
SYS_AFTR,
@@ -51,7 +51,7 @@ enum sys_powerdown {
extern unsigned long l2x0_regs_phys;
struct exynos_pmu_conf {
- void __iomem *reg;
+ unsigned int offset;
unsigned int val[NUM_SYS_POWERDOWN];
};
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index c57cae0..5dcdd46 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -17,6 +17,7 @@
#include <linux/module.h>
#include <linux/time.h>
#include <linux/platform_device.h>
+#include <linux/regmap.h>
#include <asm/proc-fns.h>
#include <asm/smp_scu.h>
@@ -34,10 +35,10 @@
#define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
- (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
+ 0x24 : S5P_INFORM0))
#define REG_DIRECTGO_FLAG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
- (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
+ 0x20 : S5P_INFORM1))
#define S5P_CHECK_AFTR 0xFCBA0D10
@@ -60,6 +61,8 @@
#define PWR_CTRL2_CORE2_UP_RATIO (1 << 4)
#define PWR_CTRL2_CORE1_UP_RATIO (1 << 0)
+static struct regmap *pmu_regmap;
+
static int exynos4_enter_lowpower(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index);
@@ -87,7 +90,7 @@ static struct cpuidle_driver exynos4_idle_driver = {
/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
static void exynos4_set_wakeupmask(void)
{
- __raw_writel(0x0000ff3e, S5P_WAKEUP_MASK);
+ regmap_write(pmu_regmap, S5P_WAKEUP_MASK, 0x0000ff3e);
}
static unsigned int g_pwr_ctrl, g_diag_reg;
@@ -120,22 +123,28 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index)
{
- unsigned long tmp;
+ unsigned int tmp;
exynos4_set_wakeupmask();
/* Set value of power down register for aftr mode */
exynos_sys_powerdown_conf(SYS_AFTR);
-
- __raw_writel(virt_to_phys(exynos_cpu_resume), REG_DIRECTGO_ADDR);
- __raw_writel(S5P_CHECK_AFTR, REG_DIRECTGO_FLAG);
-
+
+ if (samsung_rev() == EXYNOS4210_REV_1_0) {
+ __raw_writel(virt_to_phys(exynos_cpu_resume),
+ S5P_VA_SYSRAM + REG_DIRECTGO_ADDR);
+ __raw_writel(S5P_CHECK_AFTR, S5P_VA_SYSRAM + REG_DIRECTGO_FLAG);
+ } else {
+ regmap_write(pmu_regmap, REG_DIRECTGO_ADDR,
+ virt_to_phys(exynos_cpu_resume));
+ regmap_write(pmu_regmap, REG_DIRECTGO_FLAG, S5P_CHECK_AFTR);
+ }
save_cpu_arch_register();
/* Setting Central Sequence Register for power down mode */
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
cpu_pm_enter();
cpu_suspend(0, idle_finisher);
@@ -154,14 +163,14 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
* S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
* in this situation.
*/
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
tmp |= S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
}
/* Clear wakeup state register */
- __raw_writel(0x0, S5P_WAKEUP_STAT);
+ regmap_write(pmu_regmap, S5P_WAKEUP_STAT, 0x0);
return index;
}
@@ -219,6 +228,8 @@ static int exynos_cpuidle_probe(struct platform_device *pdev)
int cpu_id, ret;
struct cpuidle_device *device;
+ pmu_regmap = get_exynos_pmuregmap();
+
if (soc_is_exynos5250())
exynos5_core_down_clk();
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 68f60e1..b01987e 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -20,6 +20,7 @@
#include <linux/platform_device.h>
#include <linux/pm_domain.h>
#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
@@ -67,11 +68,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
.length = SZ_4K,
.type = MT_DEVICE,
}, {
- .virtual = (unsigned long)S5P_VA_PMU,
- .pfn = __phys_to_pfn(EXYNOS4_PA_PMU),
- .length = SZ_64K,
- .type = MT_DEVICE,
- }, {
.virtual = (unsigned long)S5P_VA_COMBINER_BASE,
.pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
.length = SZ_4K,
@@ -195,11 +191,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
.pfn = __phys_to_pfn(EXYNOS5_PA_CMU),
.length = 144 * SZ_1K,
.type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)S5P_VA_PMU,
- .pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
- .length = SZ_64K,
- .type = MT_DEVICE,
},
};
@@ -207,7 +198,7 @@ static void exynos_restart(enum reboot_mode mode, const char *cmd)
{
struct device_node *np;
u32 val = 0x1;
- void __iomem *addr = EXYNOS_SWRESET;
+ void __iomem *addr = NULL;
if (of_machine_is_compatible("samsung,exynos5440")) {
u32 status;
@@ -220,9 +211,9 @@ static void exynos_restart(enum reboot_mode mode, const char *cmd)
val = __raw_readl(addr);
val = (val & 0xffff0000) | (status & 0xffff);
- }
-
- __raw_writel(val, addr);
+ __raw_writel(val, addr);
+ } else
+ regmap_write(exynos_pmu_regmap, EXYNOS_SWRESET, val);
}
static struct platform_device exynos_cpuidle = {
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 73b0b5c..7831e64 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -13,6 +13,7 @@
#include <linux/errno.h>
#include <linux/smp.h>
#include <linux/io.h>
+#include <linux/regmap.h>
#include <asm/cacheflush.h>
#include <asm/cp15.h>
@@ -91,11 +92,12 @@ static inline void cpu_leave_lowpower(void)
static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
{
+ struct regmap *pmu_base = get_exynos_pmuregmap();
for (;;) {
/* make cpu1 to be turned off at next WFI command */
if (cpu == 1)
- __raw_writel(0, S5P_ARM_CORE1_CONFIGURATION);
+ regmap_write(pmu_base, S5P_ARM_CORE1_CONFIGURATION, 0);
/*
* here's the WFI
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 7b046b5..1ba7fb5 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -35,9 +35,6 @@
#define EXYNOS4_PA_SYSCON 0x10010000
#define EXYNOS5_PA_SYSCON 0x10050100
-#define EXYNOS4_PA_PMU 0x10020000
-#define EXYNOS5_PA_PMU 0x10040000
-
#define EXYNOS4_PA_CMU 0x10030000
#define EXYNOS5_PA_CMU 0x10010000
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 29c2286..9ce4c9f9 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -31,11 +31,12 @@
#include "regs-pmu.h"
extern void exynos4_secondary_startup(void);
+static void __iomem *pmu_base;
static inline void __iomem *cpu_boot_reg_base(void)
{
if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
- return S5P_INFORM5;
+ return pmu_base + S5P_INFORM5;
return S5P_VA_SYSRAM;
}
@@ -106,14 +107,14 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
*/
write_pen_release(phys_cpu);
- if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
+ if (!(__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
+ & S5P_CORE_LOCAL_PWR_EN)) {
__raw_writel(S5P_CORE_LOCAL_PWR_EN,
- S5P_ARM_CORE1_CONFIGURATION);
-
+ pmu_base + S5P_ARM_CORE1_CONFIGURATION);
timeout = 10;
/* wait max 10 ms until cpu1 is on */
- while ((__raw_readl(S5P_ARM_CORE1_STATUS)
+ while ((__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
& S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
if (timeout-- == 0)
break;
@@ -201,6 +202,8 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
{
int i;
+ pmu_base = get_exynos_pmuaddr();
+
if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
scu_enable(scu_base_addr());
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 723c988..e4c10d4 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -20,6 +20,7 @@
#include <linux/irqchip/arm-gic.h>
#include <linux/err.h>
#include <linux/clk.h>
+#include <linux/regmap.h>
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
@@ -37,6 +38,8 @@
#include "regs-pmu.h"
#include "regs-sys.h"
+static struct regmap *pmu_regmap;
+
/**
* struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
* @hwirq: Hardware IRQ signal of the GIC
@@ -125,43 +128,44 @@ static void exynos_pm_prepare(void)
unsigned int tmp;
/* Set wake-up mask registers */
- __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
- __raw_writel(exynos_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
+ regmap_write(pmu_regmap, S5P_EINT_WAKEUP_MASK,
+ exynos_get_eint_wake_mask());
+ regmap_write(pmu_regmap, S5P_WAKEUP_MASK,
+ exynos_irqwake_intmask & ~(1 << 31));
s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
if (soc_is_exynos5250()) {
s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
/* Disable USE_RETENTION of JPEG_MEM_OPTION */
- tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
+ regmap_read(pmu_regmap, EXYNOS5_JPEG_MEM_OPTION, &tmp);
tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
- __raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION);
+ regmap_write(pmu_regmap, EXYNOS5_JPEG_MEM_OPTION, tmp);
}
/* Set value of power down register for sleep mode */
exynos_sys_powerdown_conf(SYS_SLEEP);
- __raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1);
+ regmap_write(pmu_regmap, S5P_INFORM1, S5P_CHECK_SLEEP);
/* ensure at least INFORM0 has the resume address */
- __raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
+ regmap_write(pmu_regmap, S5P_INFORM0, virt_to_phys(exynos_cpu_resume));
}
static int exynos_pm_suspend(void)
{
- unsigned long tmp;
+ unsigned int tmp;
/* Setting Central Sequence Register for power down mode */
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
-
+ regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
/* Setting SEQ_OPTION register */
tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
- __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
+ regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_OPTION, tmp);
if (!soc_is_exynos5250()) {
/* Save Power control register */
@@ -180,7 +184,7 @@ static int exynos_pm_suspend(void)
static void exynos_pm_resume(void)
{
- unsigned long tmp;
+ unsigned int tmp;
/*
* If PMU failed while entering sleep mode, WFI will be
@@ -188,12 +192,12 @@ static void exynos_pm_resume(void)
* S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
* in this situation.
*/
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
tmp |= S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
/* clear the wakeup state register */
- __raw_writel(0x0, S5P_WAKEUP_STAT);
+ regmap_write(pmu_regmap, S5P_WAKEUP_STAT, 0x0);
/* No need to perform below restore code */
goto early_wakeup;
}
@@ -213,13 +217,13 @@ static void exynos_pm_resume(void)
/* For release retention */
- __raw_writel((1 << 28), S5P_PAD_RET_MAUDIO_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_GPIO_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_UART_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_MMCA_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_MMCB_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
+ regmap_write(pmu_regmap, S5P_PAD_RET_MAUDIO_OPTION, (1 << 28));
+ regmap_write(pmu_regmap, S5P_PAD_RET_GPIO_OPTION, (1 << 28));
+ regmap_write(pmu_regmap, S5P_PAD_RET_UART_OPTION, (1 << 28));
+ regmap_write(pmu_regmap, S5P_PAD_RET_MMCA_OPTION, (1 << 28));
+ regmap_write(pmu_regmap, S5P_PAD_RET_MMCB_OPTION, (1 << 28));
+ regmap_write(pmu_regmap, S5P_PAD_RET_EBIA_OPTION, (1 << 28));
+ regmap_write(pmu_regmap, S5P_PAD_RET_EBIB_OPTION, (1 << 28));
if (soc_is_exynos5250())
s3c_pm_do_restore(exynos5_sys_save,
@@ -233,7 +237,7 @@ static void exynos_pm_resume(void)
early_wakeup:
/* Clear SLEEP mode set in INFORM1 */
- __raw_writel(0x0, S5P_INFORM1);
+ regmap_write(pmu_regmap, S5P_INFORM1, 0x0);
return;
}
@@ -276,8 +280,8 @@ static int exynos_suspend_enter(suspend_state_t state)
s3c_pm_restore_uarts();
- S3C_PMDBG("%s: wakeup stat: %08x\n", __func__,
- __raw_readl(S5P_WAKEUP_STAT));
+ regmap_read(pmu_regmap, S5P_WAKEUP_STAT, &ret);
+ S3C_PMDBG("%s: wakeup stat: %08x\n", __func__, ret);
s3c_pm_check_restore();
@@ -308,14 +312,14 @@ static const struct platform_suspend_ops exynos_suspend_ops = {
void __init exynos_pm_init(void)
{
u32 tmp;
-
+ pmu_regmap = get_exynos_pmuregmap();
/* Platform-specific GIC callback */
gic_arch_extn.irq_set_wake = exynos_irq_set_wake;
/* All wakeup disable */
- tmp = __raw_readl(S5P_WAKEUP_MASK);
+ regmap_read(pmu_regmap, S5P_WAKEUP_MASK, &tmp);
tmp |= ((0xFF << 8) | (0x1F << 1));
- __raw_writel(tmp, S5P_WAKEUP_MASK);
+ regmap_write(pmu_regmap, S5P_WAKEUP_MASK, tmp);
register_syscore_ops(&exynos_pm_syscore_ops);
suspend_set_ops(&exynos_suspend_ops);
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 4c3453a..67116a5 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -11,6 +11,7 @@
#include <linux/io.h>
#include <linux/kernel.h>
+#include <linux/regmap.h>
#include <plat/cpu.h>
@@ -18,6 +19,7 @@
#include "regs-pmu.h"
static const struct exynos_pmu_conf *exynos_pmu_config;
+static struct regmap *pmu_regmap;
static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
/* { .reg = address, .val = { AFTR, LPA, SLEEP } */
@@ -317,7 +319,7 @@ static const struct exynos_pmu_conf exynos5250_pmu_config[] = {
{ PMU_TABLE_END,},
};
-static void __iomem * const exynos5_list_both_cnt_feed[] = {
+static unsigned int const exynos5_list_both_cnt_feed[] = {
EXYNOS5_ARM_CORE0_OPTION,
EXYNOS5_ARM_CORE1_OPTION,
EXYNOS5_ARM_COMMON_OPTION,
@@ -331,7 +333,7 @@ static void __iomem * const exynos5_list_both_cnt_feed[] = {
EXYNOS5_TOP_PWR_SYSMEM_OPTION,
};
-static void __iomem * const exynos5_list_diable_wfi_wfe[] = {
+static unsigned int const exynos5_list_diable_wfi_wfe[] = {
EXYNOS5_ARM_CORE1_OPTION,
EXYNOS5_FSYS_ARM_OPTION,
EXYNOS5_ISP_ARM_OPTION,
@@ -346,27 +348,28 @@ static void exynos5_init_pmu(void)
* Enable both SC_FEEDBACK and SC_COUNTER
*/
for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
- tmp = __raw_readl(exynos5_list_both_cnt_feed[i]);
+ regmap_read(pmu_regmap, exynos5_list_both_cnt_feed[i], &tmp);
tmp |= (EXYNOS5_USE_SC_FEEDBACK |
EXYNOS5_USE_SC_COUNTER);
- __raw_writel(tmp, exynos5_list_both_cnt_feed[i]);
+ regmap_write(pmu_regmap, exynos5_list_both_cnt_feed[i], tmp);
}
/*
* SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
*/
- tmp = __raw_readl(EXYNOS5_ARM_COMMON_OPTION);
+ regmap_read(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
- __raw_writel(tmp, EXYNOS5_ARM_COMMON_OPTION);
+ regmap_write(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
/*
* Disable WFI/WFE on XXX_OPTION
*/
for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
- tmp = __raw_readl(exynos5_list_diable_wfi_wfe[i]);
+ tmp = regmap_read(pmu_regmap, exynos5_list_diable_wfi_wfe[i],
+ &tmp);
tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
EXYNOS5_OPTION_USE_STANDBYWFI);
- __raw_writel(tmp, exynos5_list_diable_wfi_wfe[i]);
+ regmap_write(pmu_regmap, exynos5_list_diable_wfi_wfe[i], tmp);
}
}
@@ -377,14 +380,14 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
if (soc_is_exynos5250())
exynos5_init_pmu();
- for (i = 0; (exynos_pmu_config[i].reg != PMU_TABLE_END) ; i++)
- __raw_writel(exynos_pmu_config[i].val[mode],
- exynos_pmu_config[i].reg);
+ for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
+ regmap_write(pmu_regmap, exynos_pmu_config[i].offset,
+ exynos_pmu_config[i].val[mode]);
if (soc_is_exynos4412()) {
- for (i = 0; exynos4412_pmu_config[i].reg != PMU_TABLE_END ; i++)
- __raw_writel(exynos4412_pmu_config[i].val[mode],
- exynos4412_pmu_config[i].reg);
+ for (i = 0; exynos4412_pmu_config[i].offset != PMU_TABLE_END; i++)
+ regmap_write(pmu_regmap, exynos4412_pmu_config[i].offset,
+ exynos4412_pmu_config[i].val[mode]);
}
}
@@ -393,6 +396,7 @@ static int __init exynos_pmu_init(void)
unsigned int value;
exynos_pmu_config = exynos4210_pmu_config;
+ pmu_regmap = get_exynos_pmuregmap();
if (soc_is_exynos4210()) {
exynos_pmu_config = exynos4210_pmu_config;
@@ -405,13 +409,13 @@ static int __init exynos_pmu_init(void)
* When SYS_WDTRESET is set, watchdog timer reset request
* is ignored by power management unit.
*/
- value = __raw_readl(EXYNOS5_AUTO_WDTRESET_DISABLE);
+ regmap_read(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, &value);
value &= ~EXYNOS5_SYS_WDTRESET;
- __raw_writel(value, EXYNOS5_AUTO_WDTRESET_DISABLE);
+ regmap_write(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, value);
- value = __raw_readl(EXYNOS5_MASK_WDTRESET_REQUEST);
+ regmap_read(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, &value);
value &= ~EXYNOS5_SYS_WDTRESET;
- __raw_writel(value, EXYNOS5_MASK_WDTRESET_REQUEST);
+ regmap_write(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, value);
exynos_pmu_config = exynos5250_pmu_config;
pr_info("EXYNOS5250 PMU Initialize\n");
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index bfebe84..7f3bf65 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -14,290 +14,288 @@
#include <mach/map.h>
-#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
-
-#define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200)
+#define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
#define S5P_CENTRAL_LOWPWR_CFG (1 << 16)
-#define S5P_CENTRAL_SEQ_OPTION S5P_PMUREG(0x0208)
+#define S5P_CENTRAL_SEQ_OPTION 0x0208
#define S5P_USE_STANDBY_WFI0 (1 << 16)
#define S5P_USE_STANDBY_WFE0 (1 << 24)
-#define EXYNOS_SWRESET S5P_PMUREG(0x0400)
-#define EXYNOS5440_SWRESET S5P_PMUREG(0x00C4)
+#define EXYNOS_SWRESET 0x0400
+#define EXYNOS5440_SWRESET 0x00C4
-#define S5P_WAKEUP_STAT S5P_PMUREG(0x0600)
-#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604)
-#define S5P_WAKEUP_MASK S5P_PMUREG(0x0608)
+#define S5P_WAKEUP_STAT 0x0600
+#define S5P_EINT_WAKEUP_MASK 0x0604
+#define S5P_WAKEUP_MASK 0x0608
-#define S5P_INFORM0 S5P_PMUREG(0x0800)
-#define S5P_INFORM1 S5P_PMUREG(0x0804)
-#define S5P_INFORM5 S5P_PMUREG(0x0814)
-#define S5P_INFORM6 S5P_PMUREG(0x0818)
-#define S5P_INFORM7 S5P_PMUREG(0x081C)
+#define S5P_INFORM0 0x0800
+#define S5P_INFORM1 0x0804
+#define S5P_INFORM5 0x0814
+#define S5P_INFORM6 0x0818
+#define S5P_INFORM7 0x081C
-#define S5P_ARM_CORE0_LOWPWR S5P_PMUREG(0x1000)
-#define S5P_DIS_IRQ_CORE0 S5P_PMUREG(0x1004)
-#define S5P_DIS_IRQ_CENTRAL0 S5P_PMUREG(0x1008)
-#define S5P_ARM_CORE1_LOWPWR S5P_PMUREG(0x1010)
-#define S5P_DIS_IRQ_CORE1 S5P_PMUREG(0x1014)
-#define S5P_DIS_IRQ_CENTRAL1 S5P_PMUREG(0x1018)
-#define S5P_ARM_COMMON_LOWPWR S5P_PMUREG(0x1080)
-#define S5P_L2_0_LOWPWR S5P_PMUREG(0x10C0)
-#define S5P_L2_1_LOWPWR S5P_PMUREG(0x10C4)
-#define S5P_CMU_ACLKSTOP_LOWPWR S5P_PMUREG(0x1100)
-#define S5P_CMU_SCLKSTOP_LOWPWR S5P_PMUREG(0x1104)
-#define S5P_CMU_RESET_LOWPWR S5P_PMUREG(0x110C)
-#define S5P_APLL_SYSCLK_LOWPWR S5P_PMUREG(0x1120)
-#define S5P_MPLL_SYSCLK_LOWPWR S5P_PMUREG(0x1124)
-#define S5P_VPLL_SYSCLK_LOWPWR S5P_PMUREG(0x1128)
-#define S5P_EPLL_SYSCLK_LOWPWR S5P_PMUREG(0x112C)
-#define S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR S5P_PMUREG(0x1138)
-#define S5P_CMU_RESET_GPSALIVE_LOWPWR S5P_PMUREG(0x113C)
-#define S5P_CMU_CLKSTOP_CAM_LOWPWR S5P_PMUREG(0x1140)
-#define S5P_CMU_CLKSTOP_TV_LOWPWR S5P_PMUREG(0x1144)
-#define S5P_CMU_CLKSTOP_MFC_LOWPWR S5P_PMUREG(0x1148)
-#define S5P_CMU_CLKSTOP_G3D_LOWPWR S5P_PMUREG(0x114C)
-#define S5P_CMU_CLKSTOP_LCD0_LOWPWR S5P_PMUREG(0x1150)
-#define S5P_CMU_CLKSTOP_MAUDIO_LOWPWR S5P_PMUREG(0x1158)
-#define S5P_CMU_CLKSTOP_GPS_LOWPWR S5P_PMUREG(0x115C)
-#define S5P_CMU_RESET_CAM_LOWPWR S5P_PMUREG(0x1160)
-#define S5P_CMU_RESET_TV_LOWPWR S5P_PMUREG(0x1164)
-#define S5P_CMU_RESET_MFC_LOWPWR S5P_PMUREG(0x1168)
-#define S5P_CMU_RESET_G3D_LOWPWR S5P_PMUREG(0x116C)
-#define S5P_CMU_RESET_LCD0_LOWPWR S5P_PMUREG(0x1170)
-#define S5P_CMU_RESET_MAUDIO_LOWPWR S5P_PMUREG(0x1178)
-#define S5P_CMU_RESET_GPS_LOWPWR S5P_PMUREG(0x117C)
-#define S5P_TOP_BUS_LOWPWR S5P_PMUREG(0x1180)
-#define S5P_TOP_RETENTION_LOWPWR S5P_PMUREG(0x1184)
-#define S5P_TOP_PWR_LOWPWR S5P_PMUREG(0x1188)
-#define S5P_LOGIC_RESET_LOWPWR S5P_PMUREG(0x11A0)
-#define S5P_ONENAND_MEM_LOWPWR S5P_PMUREG(0x11C0)
-#define S5P_G2D_ACP_MEM_LOWPWR S5P_PMUREG(0x11C8)
-#define S5P_USBOTG_MEM_LOWPWR S5P_PMUREG(0x11CC)
-#define S5P_HSMMC_MEM_LOWPWR S5P_PMUREG(0x11D0)
-#define S5P_CSSYS_MEM_LOWPWR S5P_PMUREG(0x11D4)
-#define S5P_SECSS_MEM_LOWPWR S5P_PMUREG(0x11D8)
-#define S5P_PAD_RETENTION_DRAM_LOWPWR S5P_PMUREG(0x1200)
-#define S5P_PAD_RETENTION_MAUDIO_LOWPWR S5P_PMUREG(0x1204)
-#define S5P_PAD_RETENTION_GPIO_LOWPWR S5P_PMUREG(0x1220)
-#define S5P_PAD_RETENTION_UART_LOWPWR S5P_PMUREG(0x1224)
-#define S5P_PAD_RETENTION_MMCA_LOWPWR S5P_PMUREG(0x1228)
-#define S5P_PAD_RETENTION_MMCB_LOWPWR S5P_PMUREG(0x122C)
-#define S5P_PAD_RETENTION_EBIA_LOWPWR S5P_PMUREG(0x1230)
-#define S5P_PAD_RETENTION_EBIB_LOWPWR S5P_PMUREG(0x1234)
-#define S5P_PAD_RETENTION_ISOLATION_LOWPWR S5P_PMUREG(0x1240)
-#define S5P_PAD_RETENTION_ALV_SEL_LOWPWR S5P_PMUREG(0x1260)
-#define S5P_XUSBXTI_LOWPWR S5P_PMUREG(0x1280)
-#define S5P_XXTI_LOWPWR S5P_PMUREG(0x1284)
-#define S5P_EXT_REGULATOR_LOWPWR S5P_PMUREG(0x12C0)
-#define S5P_GPIO_MODE_LOWPWR S5P_PMUREG(0x1300)
-#define S5P_GPIO_MODE_MAUDIO_LOWPWR S5P_PMUREG(0x1340)
-#define S5P_CAM_LOWPWR S5P_PMUREG(0x1380)
-#define S5P_TV_LOWPWR S5P_PMUREG(0x1384)
-#define S5P_MFC_LOWPWR S5P_PMUREG(0x1388)
-#define S5P_G3D_LOWPWR S5P_PMUREG(0x138C)
-#define S5P_LCD0_LOWPWR S5P_PMUREG(0x1390)
-#define S5P_MAUDIO_LOWPWR S5P_PMUREG(0x1398)
-#define S5P_GPS_LOWPWR S5P_PMUREG(0x139C)
-#define S5P_GPS_ALIVE_LOWPWR S5P_PMUREG(0x13A0)
+#define S5P_ARM_CORE0_LOWPWR 0x1000
+#define S5P_DIS_IRQ_CORE0 0x1004
+#define S5P_DIS_IRQ_CENTRAL0 0x1008
+#define S5P_ARM_CORE1_LOWPWR 0x1010
+#define S5P_DIS_IRQ_CORE1 0x1014
+#define S5P_DIS_IRQ_CENTRAL1 0x1018
+#define S5P_ARM_COMMON_LOWPWR 0x1080
+#define S5P_L2_0_LOWPWR 0x10C0
+#define S5P_L2_1_LOWPWR 0x10C4
+#define S5P_CMU_ACLKSTOP_LOWPWR 0x1100
+#define S5P_CMU_SCLKSTOP_LOWPWR 0x1104
+#define S5P_CMU_RESET_LOWPWR 0x110C
+#define S5P_APLL_SYSCLK_LOWPWR 0x1120
+#define S5P_MPLL_SYSCLK_LOWPWR 0x1124
+#define S5P_VPLL_SYSCLK_LOWPWR 0x1128
+#define S5P_EPLL_SYSCLK_LOWPWR 0x112C
+#define S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR 0x1138
+#define S5P_CMU_RESET_GPSALIVE_LOWPWR 0x113C
+#define S5P_CMU_CLKSTOP_CAM_LOWPWR 0x1140
+#define S5P_CMU_CLKSTOP_TV_LOWPWR 0x1144
+#define S5P_CMU_CLKSTOP_MFC_LOWPWR 0x1148
+#define S5P_CMU_CLKSTOP_G3D_LOWPWR 0x114C
+#define S5P_CMU_CLKSTOP_LCD0_LOWPWR 0x1150
+#define S5P_CMU_CLKSTOP_MAUDIO_LOWPWR 0x1158
+#define S5P_CMU_CLKSTOP_GPS_LOWPWR 0x115C
+#define S5P_CMU_RESET_CAM_LOWPWR 0x1160
+#define S5P_CMU_RESET_TV_LOWPWR 0x1164
+#define S5P_CMU_RESET_MFC_LOWPWR 0x1168
+#define S5P_CMU_RESET_G3D_LOWPWR 0x116C
+#define S5P_CMU_RESET_LCD0_LOWPWR 0x1170
+#define S5P_CMU_RESET_MAUDIO_LOWPWR 0x1178
+#define S5P_CMU_RESET_GPS_LOWPWR 0x117C
+#define S5P_TOP_BUS_LOWPWR 0x1180
+#define S5P_TOP_RETENTION_LOWPWR 0x1184
+#define S5P_TOP_PWR_LOWPWR 0x1188
+#define S5P_LOGIC_RESET_LOWPWR 0x11A0
+#define S5P_ONENAND_MEM_LOWPWR 0x11C0
+#define S5P_G2D_ACP_MEM_LOWPWR 0x11C8
+#define S5P_USBOTG_MEM_LOWPWR 0x11CC
+#define S5P_HSMMC_MEM_LOWPWR 0x11D0
+#define S5P_CSSYS_MEM_LOWPWR 0x11D4
+#define S5P_SECSS_MEM_LOWPWR 0x11D8
+#define S5P_PAD_RETENTION_DRAM_LOWPWR 0x1200
+#define S5P_PAD_RETENTION_MAUDIO_LOWPWR 0x1204
+#define S5P_PAD_RETENTION_GPIO_LOWPWR 0x1220
+#define S5P_PAD_RETENTION_UART_LOWPWR 0x1224
+#define S5P_PAD_RETENTION_MMCA_LOWPWR 0x1228
+#define S5P_PAD_RETENTION_MMCB_LOWPWR 0x122C
+#define S5P_PAD_RETENTION_EBIA_LOWPWR 0x1230
+#define S5P_PAD_RETENTION_EBIB_LOWPWR 0x1234
+#define S5P_PAD_RETENTION_ISOLATION_LOWPWR 0x1240
+#define S5P_PAD_RETENTION_ALV_SEL_LOWPWR 0x1260
+#define S5P_XUSBXTI_LOWPWR 0x1280
+#define S5P_XXTI_LOWPWR 0x1284
+#define S5P_EXT_REGULATOR_LOWPWR 0x12C0
+#define S5P_GPIO_MODE_LOWPWR 0x1300
+#define S5P_GPIO_MODE_MAUDIO_LOWPWR 0x1340
+#define S5P_CAM_LOWPWR 0x1380
+#define S5P_TV_LOWPWR 0x1384
+#define S5P_MFC_LOWPWR 0x1388
+#define S5P_G3D_LOWPWR 0x138C
+#define S5P_LCD0_LOWPWR 0x1390
+#define S5P_MAUDIO_LOWPWR 0x1398
+#define S5P_GPS_LOWPWR 0x139C
+#define S5P_GPS_ALIVE_LOWPWR 0x13A0
-#define S5P_ARM_CORE1_CONFIGURATION S5P_PMUREG(0x2080)
-#define S5P_ARM_CORE1_STATUS S5P_PMUREG(0x2084)
+#define S5P_ARM_CORE1_CONFIGURATION 0x2080
+#define S5P_ARM_CORE1_STATUS 0x2084
-#define S5P_PAD_RET_MAUDIO_OPTION S5P_PMUREG(0x3028)
-#define S5P_PAD_RET_GPIO_OPTION S5P_PMUREG(0x3108)
-#define S5P_PAD_RET_UART_OPTION S5P_PMUREG(0x3128)
-#define S5P_PAD_RET_MMCA_OPTION S5P_PMUREG(0x3148)
-#define S5P_PAD_RET_MMCB_OPTION S5P_PMUREG(0x3168)
-#define S5P_PAD_RET_EBIA_OPTION S5P_PMUREG(0x3188)
-#define S5P_PAD_RET_EBIB_OPTION S5P_PMUREG(0x31A8)
+#define S5P_PAD_RET_MAUDIO_OPTION 0x3028
+#define S5P_PAD_RET_GPIO_OPTION 0x3108
+#define S5P_PAD_RET_UART_OPTION 0x3128
+#define S5P_PAD_RET_MMCA_OPTION 0x3148
+#define S5P_PAD_RET_MMCB_OPTION 0x3168
+#define S5P_PAD_RET_EBIA_OPTION 0x3188
+#define S5P_PAD_RET_EBIB_OPTION 0x31A8
#define S5P_CORE_LOCAL_PWR_EN 0x3
#define S5P_CHECK_SLEEP 0x00000BAD
/* Only for EXYNOS4210 */
-#define S5P_CMU_CLKSTOP_LCD1_LOWPWR S5P_PMUREG(0x1154)
-#define S5P_CMU_RESET_LCD1_LOWPWR S5P_PMUREG(0x1174)
-#define S5P_MODIMIF_MEM_LOWPWR S5P_PMUREG(0x11C4)
-#define S5P_PCIE_MEM_LOWPWR S5P_PMUREG(0x11E0)
-#define S5P_SATA_MEM_LOWPWR S5P_PMUREG(0x11E4)
-#define S5P_LCD1_LOWPWR S5P_PMUREG(0x1394)
+#define S5P_CMU_CLKSTOP_LCD1_LOWPWR 0x1154
+#define S5P_CMU_RESET_LCD1_LOWPWR 0x1174
+#define S5P_MODIMIF_MEM_LOWPWR 0x11C4
+#define S5P_PCIE_MEM_LOWPWR 0x11E0
+#define S5P_SATA_MEM_LOWPWR 0x11E4
+#define S5P_LCD1_LOWPWR 0x1394
/* Only for EXYNOS4x12 */
-#define S5P_ISP_ARM_LOWPWR S5P_PMUREG(0x1050)
-#define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR S5P_PMUREG(0x1054)
-#define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR S5P_PMUREG(0x1058)
-#define S5P_CMU_ACLKSTOP_COREBLK_LOWPWR S5P_PMUREG(0x1110)
-#define S5P_CMU_SCLKSTOP_COREBLK_LOWPWR S5P_PMUREG(0x1114)
-#define S5P_CMU_RESET_COREBLK_LOWPWR S5P_PMUREG(0x111C)
-#define S5P_MPLLUSER_SYSCLK_LOWPWR S5P_PMUREG(0x1130)
-#define S5P_CMU_CLKSTOP_ISP_LOWPWR S5P_PMUREG(0x1154)
-#define S5P_CMU_RESET_ISP_LOWPWR S5P_PMUREG(0x1174)
-#define S5P_TOP_BUS_COREBLK_LOWPWR S5P_PMUREG(0x1190)
-#define S5P_TOP_RETENTION_COREBLK_LOWPWR S5P_PMUREG(0x1194)
-#define S5P_TOP_PWR_COREBLK_LOWPWR S5P_PMUREG(0x1198)
-#define S5P_OSCCLK_GATE_LOWPWR S5P_PMUREG(0x11A4)
-#define S5P_LOGIC_RESET_COREBLK_LOWPWR S5P_PMUREG(0x11B0)
-#define S5P_OSCCLK_GATE_COREBLK_LOWPWR S5P_PMUREG(0x11B4)
-#define S5P_HSI_MEM_LOWPWR S5P_PMUREG(0x11C4)
-#define S5P_ROTATOR_MEM_LOWPWR S5P_PMUREG(0x11DC)
-#define S5P_PAD_RETENTION_GPIO_COREBLK_LOWPWR S5P_PMUREG(0x123C)
-#define S5P_PAD_ISOLATION_COREBLK_LOWPWR S5P_PMUREG(0x1250)
-#define S5P_GPIO_MODE_COREBLK_LOWPWR S5P_PMUREG(0x1320)
-#define S5P_TOP_ASB_RESET_LOWPWR S5P_PMUREG(0x1344)
-#define S5P_TOP_ASB_ISOLATION_LOWPWR S5P_PMUREG(0x1348)
-#define S5P_ISP_LOWPWR S5P_PMUREG(0x1394)
-#define S5P_DRAM_FREQ_DOWN_LOWPWR S5P_PMUREG(0x13B0)
-#define S5P_DDRPHY_DLLOFF_LOWPWR S5P_PMUREG(0x13B4)
-#define S5P_CMU_SYSCLK_ISP_LOWPWR S5P_PMUREG(0x13B8)
-#define S5P_CMU_SYSCLK_GPS_LOWPWR S5P_PMUREG(0x13BC)
-#define S5P_LPDDR_PHY_DLL_LOCK_LOWPWR S5P_PMUREG(0x13C0)
+#define S5P_ISP_ARM_LOWPWR 0x1050
+#define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR 0x1054
+#define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR 0x1058
+#define S5P_CMU_ACLKSTOP_COREBLK_LOWPWR 0x1110
+#define S5P_CMU_SCLKSTOP_COREBLK_LOWPWR 0x1114
+#define S5P_CMU_RESET_COREBLK_LOWPWR 0x111C
+#define S5P_MPLLUSER_SYSCLK_LOWPWR 0x1130
+#define S5P_CMU_CLKSTOP_ISP_LOWPWR 0x1154
+#define S5P_CMU_RESET_ISP_LOWPWR 0x1174
+#define S5P_TOP_BUS_COREBLK_LOWPWR 0x1190
+#define S5P_TOP_RETENTION_COREBLK_LOWPWR 0x1194
+#define S5P_TOP_PWR_COREBLK_LOWPWR 0x1198
+#define S5P_OSCCLK_GATE_LOWPWR 0x11A4
+#define S5P_LOGIC_RESET_COREBLK_LOWPWR 0x11B0
+#define S5P_OSCCLK_GATE_COREBLK_LOWPWR 0x11B4
+#define S5P_HSI_MEM_LOWPWR 0x11C4
+#define S5P_ROTATOR_MEM_LOWPWR 0x11DC
+#define S5P_PAD_RETENTION_GPIO_COREBLK_LOWPWR 0x123C
+#define S5P_PAD_ISOLATION_COREBLK_LOWPWR 0x1250
+#define S5P_GPIO_MODE_COREBLK_LOWPWR 0x1320
+#define S5P_TOP_ASB_RESET_LOWPWR 0x1344
+#define S5P_TOP_ASB_ISOLATION_LOWPWR 0x1348
+#define S5P_ISP_LOWPWR 0x1394
+#define S5P_DRAM_FREQ_DOWN_LOWPWR 0x13B0
+#define S5P_DDRPHY_DLLOFF_LOWPWR 0x13B4
+#define S5P_CMU_SYSCLK_ISP_LOWPWR 0x13B8
+#define S5P_CMU_SYSCLK_GPS_LOWPWR 0x13BC
+#define S5P_LPDDR_PHY_DLL_LOCK_LOWPWR 0x13C0
-#define S5P_ARM_L2_0_OPTION S5P_PMUREG(0x2608)
-#define S5P_ARM_L2_1_OPTION S5P_PMUREG(0x2628)
-#define S5P_ONENAND_MEM_OPTION S5P_PMUREG(0x2E08)
-#define S5P_HSI_MEM_OPTION S5P_PMUREG(0x2E28)
-#define S5P_G2D_ACP_MEM_OPTION S5P_PMUREG(0x2E48)
-#define S5P_USBOTG_MEM_OPTION S5P_PMUREG(0x2E68)
-#define S5P_HSMMC_MEM_OPTION S5P_PMUREG(0x2E88)
-#define S5P_CSSYS_MEM_OPTION S5P_PMUREG(0x2EA8)
-#define S5P_SECSS_MEM_OPTION S5P_PMUREG(0x2EC8)
-#define S5P_ROTATOR_MEM_OPTION S5P_PMUREG(0x2F48)
+#define S5P_ARM_L2_0_OPTION 0x2608
+#define S5P_ARM_L2_1_OPTION 0x2628
+#define S5P_ONENAND_MEM_OPTION 0x2E08
+#define S5P_HSI_MEM_OPTION 0x2E28
+#define S5P_G2D_ACP_MEM_OPTION 0x2E48
+#define S5P_USBOTG_MEM_OPTION 0x2E68
+#define S5P_HSMMC_MEM_OPTION 0x2E88
+#define S5P_CSSYS_MEM_OPTION 0x2EA8
+#define S5P_SECSS_MEM_OPTION 0x2EC8
+#define S5P_ROTATOR_MEM_OPTION 0x2F48
/* Only for EXYNOS4412 */
-#define S5P_ARM_CORE2_LOWPWR S5P_PMUREG(0x1020)
-#define S5P_DIS_IRQ_CORE2 S5P_PMUREG(0x1024)
-#define S5P_DIS_IRQ_CENTRAL2 S5P_PMUREG(0x1028)
-#define S5P_ARM_CORE3_LOWPWR S5P_PMUREG(0x1030)
-#define S5P_DIS_IRQ_CORE3 S5P_PMUREG(0x1034)
-#define S5P_DIS_IRQ_CENTRAL3 S5P_PMUREG(0x1038)
+#define S5P_ARM_CORE2_LOWPWR 0x1020
+#define S5P_DIS_IRQ_CORE2 0x1024
+#define S5P_DIS_IRQ_CENTRAL2 0x1028
+#define S5P_ARM_CORE3_LOWPWR 0x1030
+#define S5P_DIS_IRQ_CORE3 0x1034
+#define S5P_DIS_IRQ_CENTRAL3 0x1038
/* For EXYNOS5 */
-#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
-#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
+#define EXYNOS5_AUTO_WDTRESET_DISABLE 0x0408
+#define EXYNOS5_MASK_WDTRESET_REQUEST 0x040C
#define EXYNOS5_SYS_WDTRESET (1 << 20)
-#define EXYNOS5_ARM_CORE0_SYS_PWR_REG S5P_PMUREG(0x1000)
-#define EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1004)
-#define EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1008)
-#define EXYNOS5_ARM_CORE1_SYS_PWR_REG S5P_PMUREG(0x1010)
-#define EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1014)
-#define EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1018)
-#define EXYNOS5_FSYS_ARM_SYS_PWR_REG S5P_PMUREG(0x1040)
-#define EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1048)
-#define EXYNOS5_ISP_ARM_SYS_PWR_REG S5P_PMUREG(0x1050)
-#define EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1054)
-#define EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1058)
-#define EXYNOS5_ARM_COMMON_SYS_PWR_REG S5P_PMUREG(0x1080)
-#define EXYNOS5_ARM_L2_SYS_PWR_REG S5P_PMUREG(0x10C0)
-#define EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG S5P_PMUREG(0x1100)
-#define EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG S5P_PMUREG(0x1104)
-#define EXYNOS5_CMU_RESET_SYS_PWR_REG S5P_PMUREG(0x110C)
-#define EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1120)
-#define EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1124)
-#define EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x112C)
-#define EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG S5P_PMUREG(0x1130)
-#define EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG S5P_PMUREG(0x1134)
-#define EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG S5P_PMUREG(0x1138)
-#define EXYNOS5_APLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1140)
-#define EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1144)
-#define EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1148)
-#define EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x114C)
-#define EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1150)
-#define EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1154)
-#define EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1164)
-#define EXYNOS5_BPLLUSER_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1170)
-#define EXYNOS5_TOP_BUS_SYS_PWR_REG S5P_PMUREG(0x1180)
-#define EXYNOS5_TOP_RETENTION_SYS_PWR_REG S5P_PMUREG(0x1184)
-#define EXYNOS5_TOP_PWR_SYS_PWR_REG S5P_PMUREG(0x1188)
-#define EXYNOS5_TOP_BUS_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1190)
-#define EXYNOS5_TOP_RETENTION_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1194)
-#define EXYNOS5_TOP_PWR_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1198)
-#define EXYNOS5_LOGIC_RESET_SYS_PWR_REG S5P_PMUREG(0x11A0)
-#define EXYNOS5_OSCCLK_GATE_SYS_PWR_REG S5P_PMUREG(0x11A4)
-#define EXYNOS5_LOGIC_RESET_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x11B0)
-#define EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x11B4)
-#define EXYNOS5_USBOTG_MEM_SYS_PWR_REG S5P_PMUREG(0x11C0)
-#define EXYNOS5_G2D_MEM_SYS_PWR_REG S5P_PMUREG(0x11C8)
-#define EXYNOS5_USBDRD_MEM_SYS_PWR_REG S5P_PMUREG(0x11CC)
-#define EXYNOS5_SDMMC_MEM_SYS_PWR_REG S5P_PMUREG(0x11D0)
-#define EXYNOS5_CSSYS_MEM_SYS_PWR_REG S5P_PMUREG(0x11D4)
-#define EXYNOS5_SECSS_MEM_SYS_PWR_REG S5P_PMUREG(0x11D8)
-#define EXYNOS5_ROTATOR_MEM_SYS_PWR_REG S5P_PMUREG(0x11DC)
-#define EXYNOS5_INTRAM_MEM_SYS_PWR_REG S5P_PMUREG(0x11E0)
-#define EXYNOS5_INTROM_MEM_SYS_PWR_REG S5P_PMUREG(0x11E4)
-#define EXYNOS5_JPEG_MEM_SYS_PWR_REG S5P_PMUREG(0x11E8)
-#define EXYNOS5_HSI_MEM_SYS_PWR_REG S5P_PMUREG(0x11EC)
-#define EXYNOS5_MCUIOP_MEM_SYS_PWR_REG S5P_PMUREG(0x11F4)
-#define EXYNOS5_SATA_MEM_SYS_PWR_REG S5P_PMUREG(0x11FC)
-#define EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG S5P_PMUREG(0x1200)
-#define EXYNOS5_PAD_RETENTION_MAU_SYS_PWR_REG S5P_PMUREG(0x1204)
-#define EXYNOS5_PAD_RETENTION_EFNAND_SYS_PWR_REG S5P_PMUREG(0x1208)
-#define EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG S5P_PMUREG(0x1220)
-#define EXYNOS5_PAD_RETENTION_UART_SYS_PWR_REG S5P_PMUREG(0x1224)
-#define EXYNOS5_PAD_RETENTION_MMCA_SYS_PWR_REG S5P_PMUREG(0x1228)
-#define EXYNOS5_PAD_RETENTION_MMCB_SYS_PWR_REG S5P_PMUREG(0x122C)
-#define EXYNOS5_PAD_RETENTION_EBIA_SYS_PWR_REG S5P_PMUREG(0x1230)
-#define EXYNOS5_PAD_RETENTION_EBIB_SYS_PWR_REG S5P_PMUREG(0x1234)
-#define EXYNOS5_PAD_RETENTION_SPI_SYS_PWR_REG S5P_PMUREG(0x1238)
-#define EXYNOS5_PAD_RETENTION_GPIO_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x123C)
-#define EXYNOS5_PAD_ISOLATION_SYS_PWR_REG S5P_PMUREG(0x1240)
-#define EXYNOS5_PAD_ISOLATION_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1250)
-#define EXYNOS5_PAD_ALV_SEL_SYS_PWR_REG S5P_PMUREG(0x1260)
-#define EXYNOS5_XUSBXTI_SYS_PWR_REG S5P_PMUREG(0x1280)
-#define EXYNOS5_XXTI_SYS_PWR_REG S5P_PMUREG(0x1284)
-#define EXYNOS5_EXT_REGULATOR_SYS_PWR_REG S5P_PMUREG(0x12C0)
-#define EXYNOS5_GPIO_MODE_SYS_PWR_REG S5P_PMUREG(0x1300)
-#define EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1320)
-#define EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG S5P_PMUREG(0x1340)
-#define EXYNOS5_TOP_ASB_RESET_SYS_PWR_REG S5P_PMUREG(0x1344)
-#define EXYNOS5_TOP_ASB_ISOLATION_SYS_PWR_REG S5P_PMUREG(0x1348)
-#define EXYNOS5_GSCL_SYS_PWR_REG S5P_PMUREG(0x1400)
-#define EXYNOS5_ISP_SYS_PWR_REG S5P_PMUREG(0x1404)
-#define EXYNOS5_MFC_SYS_PWR_REG S5P_PMUREG(0x1408)
-#define EXYNOS5_G3D_SYS_PWR_REG S5P_PMUREG(0x140C)
-#define EXYNOS5_DISP1_SYS_PWR_REG S5P_PMUREG(0x1414)
-#define EXYNOS5_MAU_SYS_PWR_REG S5P_PMUREG(0x1418)
-#define EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG S5P_PMUREG(0x1480)
-#define EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG S5P_PMUREG(0x1484)
-#define EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG S5P_PMUREG(0x1488)
-#define EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG S5P_PMUREG(0x148C)
-#define EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG S5P_PMUREG(0x1494)
-#define EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG S5P_PMUREG(0x1498)
-#define EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG S5P_PMUREG(0x14C0)
-#define EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG S5P_PMUREG(0x14C4)
-#define EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG S5P_PMUREG(0x14C8)
-#define EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG S5P_PMUREG(0x14CC)
-#define EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG S5P_PMUREG(0x14D4)
-#define EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG S5P_PMUREG(0x14D8)
-#define EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG S5P_PMUREG(0x1580)
-#define EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG S5P_PMUREG(0x1584)
-#define EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG S5P_PMUREG(0x1588)
-#define EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG S5P_PMUREG(0x158C)
-#define EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG S5P_PMUREG(0x1594)
-#define EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG S5P_PMUREG(0x1598)
+#define EXYNOS5_ARM_CORE0_SYS_PWR_REG 0x1000
+#define EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG 0x1004
+#define EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG 0x1008
+#define EXYNOS5_ARM_CORE1_SYS_PWR_REG 0x1010
+#define EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG 0x1014
+#define EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG 0x1018
+#define EXYNOS5_FSYS_ARM_SYS_PWR_REG 0x1040
+#define EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG 0x1048
+#define EXYNOS5_ISP_ARM_SYS_PWR_REG 0x1050
+#define EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG 0x1054
+#define EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG 0x1058
+#define EXYNOS5_ARM_COMMON_SYS_PWR_REG 0x1080
+#define EXYNOS5_ARM_L2_SYS_PWR_REG 0x10C0
+#define EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG 0x1100
+#define EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG 0x1104
+#define EXYNOS5_CMU_RESET_SYS_PWR_REG 0x110C
+#define EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG 0x1120
+#define EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG 0x1124
+#define EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG 0x112C
+#define EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG 0x1130
+#define EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG 0x1134
+#define EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG 0x1138
+#define EXYNOS5_APLL_SYSCLK_SYS_PWR_REG 0x1140
+#define EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG 0x1144
+#define EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG 0x1148
+#define EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG 0x114C
+#define EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG 0x1150
+#define EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG 0x1154
+#define EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG 0x1164
+#define EXYNOS5_BPLLUSER_SYSCLK_SYS_PWR_REG 0x1170
+#define EXYNOS5_TOP_BUS_SYS_PWR_REG 0x1180
+#define EXYNOS5_TOP_RETENTION_SYS_PWR_REG 0x1184
+#define EXYNOS5_TOP_PWR_SYS_PWR_REG 0x1188
+#define EXYNOS5_TOP_BUS_SYSMEM_SYS_PWR_REG 0x1190
+#define EXYNOS5_TOP_RETENTION_SYSMEM_SYS_PWR_REG 0x1194
+#define EXYNOS5_TOP_PWR_SYSMEM_SYS_PWR_REG 0x1198
+#define EXYNOS5_LOGIC_RESET_SYS_PWR_REG 0x11A0
+#define EXYNOS5_OSCCLK_GATE_SYS_PWR_REG 0x11A4
+#define EXYNOS5_LOGIC_RESET_SYSMEM_SYS_PWR_REG 0x11B0
+#define EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG 0x11B4
+#define EXYNOS5_USBOTG_MEM_SYS_PWR_REG 0x11C0
+#define EXYNOS5_G2D_MEM_SYS_PWR_REG 0x11C8
+#define EXYNOS5_USBDRD_MEM_SYS_PWR_REG 0x11CC
+#define EXYNOS5_SDMMC_MEM_SYS_PWR_REG 0x11D0
+#define EXYNOS5_CSSYS_MEM_SYS_PWR_REG 0x11D4
+#define EXYNOS5_SECSS_MEM_SYS_PWR_REG 0x11D8
+#define EXYNOS5_ROTATOR_MEM_SYS_PWR_REG 0x11DC
+#define EXYNOS5_INTRAM_MEM_SYS_PWR_REG 0x11E0
+#define EXYNOS5_INTROM_MEM_SYS_PWR_REG 0x11E4
+#define EXYNOS5_JPEG_MEM_SYS_PWR_REG 0x11E8
+#define EXYNOS5_HSI_MEM_SYS_PWR_REG 0x11EC
+#define EXYNOS5_MCUIOP_MEM_SYS_PWR_REG 0x11F4
+#define EXYNOS5_SATA_MEM_SYS_PWR_REG 0x11FC
+#define EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG 0x1200
+#define EXYNOS5_PAD_RETENTION_MAU_SYS_PWR_REG 0x1204
+#define EXYNOS5_PAD_RETENTION_EFNAND_SYS_PWR_REG 0x1208
+#define EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG 0x1220
+#define EXYNOS5_PAD_RETENTION_UART_SYS_PWR_REG 0x1224
+#define EXYNOS5_PAD_RETENTION_MMCA_SYS_PWR_REG 0x1228
+#define EXYNOS5_PAD_RETENTION_MMCB_SYS_PWR_REG 0x122C
+#define EXYNOS5_PAD_RETENTION_EBIA_SYS_PWR_REG 0x1230
+#define EXYNOS5_PAD_RETENTION_EBIB_SYS_PWR_REG 0x1234
+#define EXYNOS5_PAD_RETENTION_SPI_SYS_PWR_REG 0x1238
+#define EXYNOS5_PAD_RETENTION_GPIO_SYSMEM_SYS_PWR_REG 0x123C
+#define EXYNOS5_PAD_ISOLATION_SYS_PWR_REG 0x1240
+#define EXYNOS5_PAD_ISOLATION_SYSMEM_SYS_PWR_REG 0x1250
+#define EXYNOS5_PAD_ALV_SEL_SYS_PWR_REG 0x1260
+#define EXYNOS5_XUSBXTI_SYS_PWR_REG 0x1280
+#define EXYNOS5_XXTI_SYS_PWR_REG 0x1284
+#define EXYNOS5_EXT_REGULATOR_SYS_PWR_REG 0x12C0
+#define EXYNOS5_GPIO_MODE_SYS_PWR_REG 0x1300
+#define EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG 0x1320
+#define EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG 0x1340
+#define EXYNOS5_TOP_ASB_RESET_SYS_PWR_REG 0x1344
+#define EXYNOS5_TOP_ASB_ISOLATION_SYS_PWR_REG 0x1348
+#define EXYNOS5_GSCL_SYS_PWR_REG 0x1400
+#define EXYNOS5_ISP_SYS_PWR_REG 0x1404
+#define EXYNOS5_MFC_SYS_PWR_REG 0x1408
+#define EXYNOS5_G3D_SYS_PWR_REG 0x140C
+#define EXYNOS5_DISP1_SYS_PWR_REG 0x1414
+#define EXYNOS5_MAU_SYS_PWR_REG 0x1418
+#define EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG 0x1480
+#define EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG 0x1484
+#define EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG 0x1488
+#define EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG 0x148C
+#define EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG 0x1494
+#define EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG 0x1498
+#define EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG 0x14C0
+#define EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG 0x14C4
+#define EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG 0x14C8
+#define EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG 0x14CC
+#define EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG 0x14D4
+#define EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG 0x14D8
+#define EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG 0x1580
+#define EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG 0x1584
+#define EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG 0x1588
+#define EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG 0x158C
+#define EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG 0x1594
+#define EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG 0x1598
-#define EXYNOS5_ARM_CORE0_OPTION S5P_PMUREG(0x2008)
-#define EXYNOS5_ARM_CORE1_OPTION S5P_PMUREG(0x2088)
-#define EXYNOS5_FSYS_ARM_OPTION S5P_PMUREG(0x2208)
-#define EXYNOS5_ISP_ARM_OPTION S5P_PMUREG(0x2288)
-#define EXYNOS5_ARM_COMMON_OPTION S5P_PMUREG(0x2408)
-#define EXYNOS5_ARM_L2_OPTION S5P_PMUREG(0x2608)
-#define EXYNOS5_TOP_PWR_OPTION S5P_PMUREG(0x2C48)
-#define EXYNOS5_TOP_PWR_SYSMEM_OPTION S5P_PMUREG(0x2CC8)
-#define EXYNOS5_JPEG_MEM_OPTION S5P_PMUREG(0x2F48)
-#define EXYNOS5_GSCL_OPTION S5P_PMUREG(0x4008)
-#define EXYNOS5_ISP_OPTION S5P_PMUREG(0x4028)
-#define EXYNOS5_MFC_OPTION S5P_PMUREG(0x4048)
-#define EXYNOS5_G3D_OPTION S5P_PMUREG(0x4068)
-#define EXYNOS5_DISP1_OPTION S5P_PMUREG(0x40A8)
-#define EXYNOS5_MAU_OPTION S5P_PMUREG(0x40C8)
+#define EXYNOS5_ARM_CORE0_OPTION 0x2008
+#define EXYNOS5_ARM_CORE1_OPTION 0x2088
+#define EXYNOS5_FSYS_ARM_OPTION 0x2208
+#define EXYNOS5_ISP_ARM_OPTION 0x2288
+#define EXYNOS5_ARM_COMMON_OPTION 0x2408
+#define EXYNOS5_ARM_L2_OPTION 0x2608
+#define EXYNOS5_TOP_PWR_OPTION 0x2C48
+#define EXYNOS5_TOP_PWR_SYSMEM_OPTION 0x2CC8
+#define EXYNOS5_JPEG_MEM_OPTION 0x2F48
+#define EXYNOS5_GSCL_OPTION 0x4008
+#define EXYNOS5_ISP_OPTION 0x4028
+#define EXYNOS5_MFC_OPTION 0x4048
+#define EXYNOS5_G3D_OPTION 0x4068
+#define EXYNOS5_DISP1_OPTION 0x40A8
+#define EXYNOS5_MAU_OPTION 0x40C8
#define EXYNOS5_USE_SC_FEEDBACK (1 << 1)
#define EXYNOS5_USE_SC_COUNTER (1 << 0)
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 08/10] ARM: EXYNOS: Refactored code for using PMU address via DT
@ 2014-04-25 12:32 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-arm-kernel
Under "arm/mach-exynos" many files are using PMU register offsets.
Since we have added support for accessing PMU base address via DT,
now we can remove PMU mapping from exynosX_iodesc.
Let's convert all these access using either of "get_exynos_pmuaddr"
or "get_exynos_regmap".
This will help us in removing static mapping of PMU base address
as well as help in reducing dependency over machine header files.
Thus helping for migration of PMU implementation from machine to driver
folder which can be reused for ARM64 bsed SoC.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/common.h | 4 +-
arch/arm/mach-exynos/cpuidle.c | 37 ++-
arch/arm/mach-exynos/exynos.c | 19 +-
arch/arm/mach-exynos/hotplug.c | 4 +-
arch/arm/mach-exynos/include/mach/map.h | 3 -
arch/arm/mach-exynos/platsmp.c | 13 +-
arch/arm/mach-exynos/pm.c | 60 ++--
arch/arm/mach-exynos/pmu.c | 40 +--
arch/arm/mach-exynos/regs-pmu.h | 506 +++++++++++++++----------------
9 files changed, 348 insertions(+), 338 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index ecfd0fc..ad5128e 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -40,7 +40,7 @@ extern void exynos_cpu_die(unsigned int cpu);
/* PMU(Power Management Unit) support */
-#define PMU_TABLE_END NULL
+#define PMU_TABLE_END 0xFFFF
enum sys_powerdown {
SYS_AFTR,
@@ -51,7 +51,7 @@ enum sys_powerdown {
extern unsigned long l2x0_regs_phys;
struct exynos_pmu_conf {
- void __iomem *reg;
+ unsigned int offset;
unsigned int val[NUM_SYS_POWERDOWN];
};
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index c57cae0..5dcdd46 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -17,6 +17,7 @@
#include <linux/module.h>
#include <linux/time.h>
#include <linux/platform_device.h>
+#include <linux/regmap.h>
#include <asm/proc-fns.h>
#include <asm/smp_scu.h>
@@ -34,10 +35,10 @@
#define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
- (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
+ 0x24 : S5P_INFORM0))
#define REG_DIRECTGO_FLAG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
- (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
+ 0x20 : S5P_INFORM1))
#define S5P_CHECK_AFTR 0xFCBA0D10
@@ -60,6 +61,8 @@
#define PWR_CTRL2_CORE2_UP_RATIO (1 << 4)
#define PWR_CTRL2_CORE1_UP_RATIO (1 << 0)
+static struct regmap *pmu_regmap;
+
static int exynos4_enter_lowpower(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index);
@@ -87,7 +90,7 @@ static struct cpuidle_driver exynos4_idle_driver = {
/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
static void exynos4_set_wakeupmask(void)
{
- __raw_writel(0x0000ff3e, S5P_WAKEUP_MASK);
+ regmap_write(pmu_regmap, S5P_WAKEUP_MASK, 0x0000ff3e);
}
static unsigned int g_pwr_ctrl, g_diag_reg;
@@ -120,22 +123,28 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index)
{
- unsigned long tmp;
+ unsigned int tmp;
exynos4_set_wakeupmask();
/* Set value of power down register for aftr mode */
exynos_sys_powerdown_conf(SYS_AFTR);
-
- __raw_writel(virt_to_phys(exynos_cpu_resume), REG_DIRECTGO_ADDR);
- __raw_writel(S5P_CHECK_AFTR, REG_DIRECTGO_FLAG);
-
+
+ if (samsung_rev() == EXYNOS4210_REV_1_0) {
+ __raw_writel(virt_to_phys(exynos_cpu_resume),
+ S5P_VA_SYSRAM + REG_DIRECTGO_ADDR);
+ __raw_writel(S5P_CHECK_AFTR, S5P_VA_SYSRAM + REG_DIRECTGO_FLAG);
+ } else {
+ regmap_write(pmu_regmap, REG_DIRECTGO_ADDR,
+ virt_to_phys(exynos_cpu_resume));
+ regmap_write(pmu_regmap, REG_DIRECTGO_FLAG, S5P_CHECK_AFTR);
+ }
save_cpu_arch_register();
/* Setting Central Sequence Register for power down mode */
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
cpu_pm_enter();
cpu_suspend(0, idle_finisher);
@@ -154,14 +163,14 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
* S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
* in this situation.
*/
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
tmp |= S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
}
/* Clear wakeup state register */
- __raw_writel(0x0, S5P_WAKEUP_STAT);
+ regmap_write(pmu_regmap, S5P_WAKEUP_STAT, 0x0);
return index;
}
@@ -219,6 +228,8 @@ static int exynos_cpuidle_probe(struct platform_device *pdev)
int cpu_id, ret;
struct cpuidle_device *device;
+ pmu_regmap = get_exynos_pmuregmap();
+
if (soc_is_exynos5250())
exynos5_core_down_clk();
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 68f60e1..b01987e 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -20,6 +20,7 @@
#include <linux/platform_device.h>
#include <linux/pm_domain.h>
#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
@@ -67,11 +68,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
.length = SZ_4K,
.type = MT_DEVICE,
}, {
- .virtual = (unsigned long)S5P_VA_PMU,
- .pfn = __phys_to_pfn(EXYNOS4_PA_PMU),
- .length = SZ_64K,
- .type = MT_DEVICE,
- }, {
.virtual = (unsigned long)S5P_VA_COMBINER_BASE,
.pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
.length = SZ_4K,
@@ -195,11 +191,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
.pfn = __phys_to_pfn(EXYNOS5_PA_CMU),
.length = 144 * SZ_1K,
.type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)S5P_VA_PMU,
- .pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
- .length = SZ_64K,
- .type = MT_DEVICE,
},
};
@@ -207,7 +198,7 @@ static void exynos_restart(enum reboot_mode mode, const char *cmd)
{
struct device_node *np;
u32 val = 0x1;
- void __iomem *addr = EXYNOS_SWRESET;
+ void __iomem *addr = NULL;
if (of_machine_is_compatible("samsung,exynos5440")) {
u32 status;
@@ -220,9 +211,9 @@ static void exynos_restart(enum reboot_mode mode, const char *cmd)
val = __raw_readl(addr);
val = (val & 0xffff0000) | (status & 0xffff);
- }
-
- __raw_writel(val, addr);
+ __raw_writel(val, addr);
+ } else
+ regmap_write(exynos_pmu_regmap, EXYNOS_SWRESET, val);
}
static struct platform_device exynos_cpuidle = {
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 73b0b5c..7831e64 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -13,6 +13,7 @@
#include <linux/errno.h>
#include <linux/smp.h>
#include <linux/io.h>
+#include <linux/regmap.h>
#include <asm/cacheflush.h>
#include <asm/cp15.h>
@@ -91,11 +92,12 @@ static inline void cpu_leave_lowpower(void)
static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
{
+ struct regmap *pmu_base = get_exynos_pmuregmap();
for (;;) {
/* make cpu1 to be turned off at next WFI command */
if (cpu == 1)
- __raw_writel(0, S5P_ARM_CORE1_CONFIGURATION);
+ regmap_write(pmu_base, S5P_ARM_CORE1_CONFIGURATION, 0);
/*
* here's the WFI
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 7b046b5..1ba7fb5 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -35,9 +35,6 @@
#define EXYNOS4_PA_SYSCON 0x10010000
#define EXYNOS5_PA_SYSCON 0x10050100
-#define EXYNOS4_PA_PMU 0x10020000
-#define EXYNOS5_PA_PMU 0x10040000
-
#define EXYNOS4_PA_CMU 0x10030000
#define EXYNOS5_PA_CMU 0x10010000
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 29c2286..9ce4c9f9 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -31,11 +31,12 @@
#include "regs-pmu.h"
extern void exynos4_secondary_startup(void);
+static void __iomem *pmu_base;
static inline void __iomem *cpu_boot_reg_base(void)
{
if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
- return S5P_INFORM5;
+ return pmu_base + S5P_INFORM5;
return S5P_VA_SYSRAM;
}
@@ -106,14 +107,14 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
*/
write_pen_release(phys_cpu);
- if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
+ if (!(__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
+ & S5P_CORE_LOCAL_PWR_EN)) {
__raw_writel(S5P_CORE_LOCAL_PWR_EN,
- S5P_ARM_CORE1_CONFIGURATION);
-
+ pmu_base + S5P_ARM_CORE1_CONFIGURATION);
timeout = 10;
/* wait max 10 ms until cpu1 is on */
- while ((__raw_readl(S5P_ARM_CORE1_STATUS)
+ while ((__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
& S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
if (timeout-- == 0)
break;
@@ -201,6 +202,8 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
{
int i;
+ pmu_base = get_exynos_pmuaddr();
+
if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
scu_enable(scu_base_addr());
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 723c988..e4c10d4 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -20,6 +20,7 @@
#include <linux/irqchip/arm-gic.h>
#include <linux/err.h>
#include <linux/clk.h>
+#include <linux/regmap.h>
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
@@ -37,6 +38,8 @@
#include "regs-pmu.h"
#include "regs-sys.h"
+static struct regmap *pmu_regmap;
+
/**
* struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
* @hwirq: Hardware IRQ signal of the GIC
@@ -125,43 +128,44 @@ static void exynos_pm_prepare(void)
unsigned int tmp;
/* Set wake-up mask registers */
- __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
- __raw_writel(exynos_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
+ regmap_write(pmu_regmap, S5P_EINT_WAKEUP_MASK,
+ exynos_get_eint_wake_mask());
+ regmap_write(pmu_regmap, S5P_WAKEUP_MASK,
+ exynos_irqwake_intmask & ~(1 << 31));
s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
if (soc_is_exynos5250()) {
s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
/* Disable USE_RETENTION of JPEG_MEM_OPTION */
- tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
+ regmap_read(pmu_regmap, EXYNOS5_JPEG_MEM_OPTION, &tmp);
tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
- __raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION);
+ regmap_write(pmu_regmap, EXYNOS5_JPEG_MEM_OPTION, tmp);
}
/* Set value of power down register for sleep mode */
exynos_sys_powerdown_conf(SYS_SLEEP);
- __raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1);
+ regmap_write(pmu_regmap, S5P_INFORM1, S5P_CHECK_SLEEP);
/* ensure@least INFORM0 has the resume address */
- __raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
+ regmap_write(pmu_regmap, S5P_INFORM0, virt_to_phys(exynos_cpu_resume));
}
static int exynos_pm_suspend(void)
{
- unsigned long tmp;
+ unsigned int tmp;
/* Setting Central Sequence Register for power down mode */
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
-
+ regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
/* Setting SEQ_OPTION register */
tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
- __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
+ regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_OPTION, tmp);
if (!soc_is_exynos5250()) {
/* Save Power control register */
@@ -180,7 +184,7 @@ static int exynos_pm_suspend(void)
static void exynos_pm_resume(void)
{
- unsigned long tmp;
+ unsigned int tmp;
/*
* If PMU failed while entering sleep mode, WFI will be
@@ -188,12 +192,12 @@ static void exynos_pm_resume(void)
* S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
* in this situation.
*/
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
+ regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
tmp |= S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
/* clear the wakeup state register */
- __raw_writel(0x0, S5P_WAKEUP_STAT);
+ regmap_write(pmu_regmap, S5P_WAKEUP_STAT, 0x0);
/* No need to perform below restore code */
goto early_wakeup;
}
@@ -213,13 +217,13 @@ static void exynos_pm_resume(void)
/* For release retention */
- __raw_writel((1 << 28), S5P_PAD_RET_MAUDIO_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_GPIO_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_UART_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_MMCA_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_MMCB_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
- __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
+ regmap_write(pmu_regmap, S5P_PAD_RET_MAUDIO_OPTION, (1 << 28));
+ regmap_write(pmu_regmap, S5P_PAD_RET_GPIO_OPTION, (1 << 28));
+ regmap_write(pmu_regmap, S5P_PAD_RET_UART_OPTION, (1 << 28));
+ regmap_write(pmu_regmap, S5P_PAD_RET_MMCA_OPTION, (1 << 28));
+ regmap_write(pmu_regmap, S5P_PAD_RET_MMCB_OPTION, (1 << 28));
+ regmap_write(pmu_regmap, S5P_PAD_RET_EBIA_OPTION, (1 << 28));
+ regmap_write(pmu_regmap, S5P_PAD_RET_EBIB_OPTION, (1 << 28));
if (soc_is_exynos5250())
s3c_pm_do_restore(exynos5_sys_save,
@@ -233,7 +237,7 @@ static void exynos_pm_resume(void)
early_wakeup:
/* Clear SLEEP mode set in INFORM1 */
- __raw_writel(0x0, S5P_INFORM1);
+ regmap_write(pmu_regmap, S5P_INFORM1, 0x0);
return;
}
@@ -276,8 +280,8 @@ static int exynos_suspend_enter(suspend_state_t state)
s3c_pm_restore_uarts();
- S3C_PMDBG("%s: wakeup stat: %08x\n", __func__,
- __raw_readl(S5P_WAKEUP_STAT));
+ regmap_read(pmu_regmap, S5P_WAKEUP_STAT, &ret);
+ S3C_PMDBG("%s: wakeup stat: %08x\n", __func__, ret);
s3c_pm_check_restore();
@@ -308,14 +312,14 @@ static const struct platform_suspend_ops exynos_suspend_ops = {
void __init exynos_pm_init(void)
{
u32 tmp;
-
+ pmu_regmap = get_exynos_pmuregmap();
/* Platform-specific GIC callback */
gic_arch_extn.irq_set_wake = exynos_irq_set_wake;
/* All wakeup disable */
- tmp = __raw_readl(S5P_WAKEUP_MASK);
+ regmap_read(pmu_regmap, S5P_WAKEUP_MASK, &tmp);
tmp |= ((0xFF << 8) | (0x1F << 1));
- __raw_writel(tmp, S5P_WAKEUP_MASK);
+ regmap_write(pmu_regmap, S5P_WAKEUP_MASK, tmp);
register_syscore_ops(&exynos_pm_syscore_ops);
suspend_set_ops(&exynos_suspend_ops);
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 4c3453a..67116a5 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -11,6 +11,7 @@
#include <linux/io.h>
#include <linux/kernel.h>
+#include <linux/regmap.h>
#include <plat/cpu.h>
@@ -18,6 +19,7 @@
#include "regs-pmu.h"
static const struct exynos_pmu_conf *exynos_pmu_config;
+static struct regmap *pmu_regmap;
static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
/* { .reg = address, .val = { AFTR, LPA, SLEEP } */
@@ -317,7 +319,7 @@ static const struct exynos_pmu_conf exynos5250_pmu_config[] = {
{ PMU_TABLE_END,},
};
-static void __iomem * const exynos5_list_both_cnt_feed[] = {
+static unsigned int const exynos5_list_both_cnt_feed[] = {
EXYNOS5_ARM_CORE0_OPTION,
EXYNOS5_ARM_CORE1_OPTION,
EXYNOS5_ARM_COMMON_OPTION,
@@ -331,7 +333,7 @@ static void __iomem * const exynos5_list_both_cnt_feed[] = {
EXYNOS5_TOP_PWR_SYSMEM_OPTION,
};
-static void __iomem * const exynos5_list_diable_wfi_wfe[] = {
+static unsigned int const exynos5_list_diable_wfi_wfe[] = {
EXYNOS5_ARM_CORE1_OPTION,
EXYNOS5_FSYS_ARM_OPTION,
EXYNOS5_ISP_ARM_OPTION,
@@ -346,27 +348,28 @@ static void exynos5_init_pmu(void)
* Enable both SC_FEEDBACK and SC_COUNTER
*/
for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
- tmp = __raw_readl(exynos5_list_both_cnt_feed[i]);
+ regmap_read(pmu_regmap, exynos5_list_both_cnt_feed[i], &tmp);
tmp |= (EXYNOS5_USE_SC_FEEDBACK |
EXYNOS5_USE_SC_COUNTER);
- __raw_writel(tmp, exynos5_list_both_cnt_feed[i]);
+ regmap_write(pmu_regmap, exynos5_list_both_cnt_feed[i], tmp);
}
/*
* SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
*/
- tmp = __raw_readl(EXYNOS5_ARM_COMMON_OPTION);
+ regmap_read(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
- __raw_writel(tmp, EXYNOS5_ARM_COMMON_OPTION);
+ regmap_write(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
/*
* Disable WFI/WFE on XXX_OPTION
*/
for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
- tmp = __raw_readl(exynos5_list_diable_wfi_wfe[i]);
+ tmp = regmap_read(pmu_regmap, exynos5_list_diable_wfi_wfe[i],
+ &tmp);
tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
EXYNOS5_OPTION_USE_STANDBYWFI);
- __raw_writel(tmp, exynos5_list_diable_wfi_wfe[i]);
+ regmap_write(pmu_regmap, exynos5_list_diable_wfi_wfe[i], tmp);
}
}
@@ -377,14 +380,14 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
if (soc_is_exynos5250())
exynos5_init_pmu();
- for (i = 0; (exynos_pmu_config[i].reg != PMU_TABLE_END) ; i++)
- __raw_writel(exynos_pmu_config[i].val[mode],
- exynos_pmu_config[i].reg);
+ for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
+ regmap_write(pmu_regmap, exynos_pmu_config[i].offset,
+ exynos_pmu_config[i].val[mode]);
if (soc_is_exynos4412()) {
- for (i = 0; exynos4412_pmu_config[i].reg != PMU_TABLE_END ; i++)
- __raw_writel(exynos4412_pmu_config[i].val[mode],
- exynos4412_pmu_config[i].reg);
+ for (i = 0; exynos4412_pmu_config[i].offset != PMU_TABLE_END; i++)
+ regmap_write(pmu_regmap, exynos4412_pmu_config[i].offset,
+ exynos4412_pmu_config[i].val[mode]);
}
}
@@ -393,6 +396,7 @@ static int __init exynos_pmu_init(void)
unsigned int value;
exynos_pmu_config = exynos4210_pmu_config;
+ pmu_regmap = get_exynos_pmuregmap();
if (soc_is_exynos4210()) {
exynos_pmu_config = exynos4210_pmu_config;
@@ -405,13 +409,13 @@ static int __init exynos_pmu_init(void)
* When SYS_WDTRESET is set, watchdog timer reset request
* is ignored by power management unit.
*/
- value = __raw_readl(EXYNOS5_AUTO_WDTRESET_DISABLE);
+ regmap_read(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, &value);
value &= ~EXYNOS5_SYS_WDTRESET;
- __raw_writel(value, EXYNOS5_AUTO_WDTRESET_DISABLE);
+ regmap_write(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, value);
- value = __raw_readl(EXYNOS5_MASK_WDTRESET_REQUEST);
+ regmap_read(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, &value);
value &= ~EXYNOS5_SYS_WDTRESET;
- __raw_writel(value, EXYNOS5_MASK_WDTRESET_REQUEST);
+ regmap_write(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, value);
exynos_pmu_config = exynos5250_pmu_config;
pr_info("EXYNOS5250 PMU Initialize\n");
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index bfebe84..7f3bf65 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -14,290 +14,288 @@
#include <mach/map.h>
-#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
-
-#define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200)
+#define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
#define S5P_CENTRAL_LOWPWR_CFG (1 << 16)
-#define S5P_CENTRAL_SEQ_OPTION S5P_PMUREG(0x0208)
+#define S5P_CENTRAL_SEQ_OPTION 0x0208
#define S5P_USE_STANDBY_WFI0 (1 << 16)
#define S5P_USE_STANDBY_WFE0 (1 << 24)
-#define EXYNOS_SWRESET S5P_PMUREG(0x0400)
-#define EXYNOS5440_SWRESET S5P_PMUREG(0x00C4)
+#define EXYNOS_SWRESET 0x0400
+#define EXYNOS5440_SWRESET 0x00C4
-#define S5P_WAKEUP_STAT S5P_PMUREG(0x0600)
-#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604)
-#define S5P_WAKEUP_MASK S5P_PMUREG(0x0608)
+#define S5P_WAKEUP_STAT 0x0600
+#define S5P_EINT_WAKEUP_MASK 0x0604
+#define S5P_WAKEUP_MASK 0x0608
-#define S5P_INFORM0 S5P_PMUREG(0x0800)
-#define S5P_INFORM1 S5P_PMUREG(0x0804)
-#define S5P_INFORM5 S5P_PMUREG(0x0814)
-#define S5P_INFORM6 S5P_PMUREG(0x0818)
-#define S5P_INFORM7 S5P_PMUREG(0x081C)
+#define S5P_INFORM0 0x0800
+#define S5P_INFORM1 0x0804
+#define S5P_INFORM5 0x0814
+#define S5P_INFORM6 0x0818
+#define S5P_INFORM7 0x081C
-#define S5P_ARM_CORE0_LOWPWR S5P_PMUREG(0x1000)
-#define S5P_DIS_IRQ_CORE0 S5P_PMUREG(0x1004)
-#define S5P_DIS_IRQ_CENTRAL0 S5P_PMUREG(0x1008)
-#define S5P_ARM_CORE1_LOWPWR S5P_PMUREG(0x1010)
-#define S5P_DIS_IRQ_CORE1 S5P_PMUREG(0x1014)
-#define S5P_DIS_IRQ_CENTRAL1 S5P_PMUREG(0x1018)
-#define S5P_ARM_COMMON_LOWPWR S5P_PMUREG(0x1080)
-#define S5P_L2_0_LOWPWR S5P_PMUREG(0x10C0)
-#define S5P_L2_1_LOWPWR S5P_PMUREG(0x10C4)
-#define S5P_CMU_ACLKSTOP_LOWPWR S5P_PMUREG(0x1100)
-#define S5P_CMU_SCLKSTOP_LOWPWR S5P_PMUREG(0x1104)
-#define S5P_CMU_RESET_LOWPWR S5P_PMUREG(0x110C)
-#define S5P_APLL_SYSCLK_LOWPWR S5P_PMUREG(0x1120)
-#define S5P_MPLL_SYSCLK_LOWPWR S5P_PMUREG(0x1124)
-#define S5P_VPLL_SYSCLK_LOWPWR S5P_PMUREG(0x1128)
-#define S5P_EPLL_SYSCLK_LOWPWR S5P_PMUREG(0x112C)
-#define S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR S5P_PMUREG(0x1138)
-#define S5P_CMU_RESET_GPSALIVE_LOWPWR S5P_PMUREG(0x113C)
-#define S5P_CMU_CLKSTOP_CAM_LOWPWR S5P_PMUREG(0x1140)
-#define S5P_CMU_CLKSTOP_TV_LOWPWR S5P_PMUREG(0x1144)
-#define S5P_CMU_CLKSTOP_MFC_LOWPWR S5P_PMUREG(0x1148)
-#define S5P_CMU_CLKSTOP_G3D_LOWPWR S5P_PMUREG(0x114C)
-#define S5P_CMU_CLKSTOP_LCD0_LOWPWR S5P_PMUREG(0x1150)
-#define S5P_CMU_CLKSTOP_MAUDIO_LOWPWR S5P_PMUREG(0x1158)
-#define S5P_CMU_CLKSTOP_GPS_LOWPWR S5P_PMUREG(0x115C)
-#define S5P_CMU_RESET_CAM_LOWPWR S5P_PMUREG(0x1160)
-#define S5P_CMU_RESET_TV_LOWPWR S5P_PMUREG(0x1164)
-#define S5P_CMU_RESET_MFC_LOWPWR S5P_PMUREG(0x1168)
-#define S5P_CMU_RESET_G3D_LOWPWR S5P_PMUREG(0x116C)
-#define S5P_CMU_RESET_LCD0_LOWPWR S5P_PMUREG(0x1170)
-#define S5P_CMU_RESET_MAUDIO_LOWPWR S5P_PMUREG(0x1178)
-#define S5P_CMU_RESET_GPS_LOWPWR S5P_PMUREG(0x117C)
-#define S5P_TOP_BUS_LOWPWR S5P_PMUREG(0x1180)
-#define S5P_TOP_RETENTION_LOWPWR S5P_PMUREG(0x1184)
-#define S5P_TOP_PWR_LOWPWR S5P_PMUREG(0x1188)
-#define S5P_LOGIC_RESET_LOWPWR S5P_PMUREG(0x11A0)
-#define S5P_ONENAND_MEM_LOWPWR S5P_PMUREG(0x11C0)
-#define S5P_G2D_ACP_MEM_LOWPWR S5P_PMUREG(0x11C8)
-#define S5P_USBOTG_MEM_LOWPWR S5P_PMUREG(0x11CC)
-#define S5P_HSMMC_MEM_LOWPWR S5P_PMUREG(0x11D0)
-#define S5P_CSSYS_MEM_LOWPWR S5P_PMUREG(0x11D4)
-#define S5P_SECSS_MEM_LOWPWR S5P_PMUREG(0x11D8)
-#define S5P_PAD_RETENTION_DRAM_LOWPWR S5P_PMUREG(0x1200)
-#define S5P_PAD_RETENTION_MAUDIO_LOWPWR S5P_PMUREG(0x1204)
-#define S5P_PAD_RETENTION_GPIO_LOWPWR S5P_PMUREG(0x1220)
-#define S5P_PAD_RETENTION_UART_LOWPWR S5P_PMUREG(0x1224)
-#define S5P_PAD_RETENTION_MMCA_LOWPWR S5P_PMUREG(0x1228)
-#define S5P_PAD_RETENTION_MMCB_LOWPWR S5P_PMUREG(0x122C)
-#define S5P_PAD_RETENTION_EBIA_LOWPWR S5P_PMUREG(0x1230)
-#define S5P_PAD_RETENTION_EBIB_LOWPWR S5P_PMUREG(0x1234)
-#define S5P_PAD_RETENTION_ISOLATION_LOWPWR S5P_PMUREG(0x1240)
-#define S5P_PAD_RETENTION_ALV_SEL_LOWPWR S5P_PMUREG(0x1260)
-#define S5P_XUSBXTI_LOWPWR S5P_PMUREG(0x1280)
-#define S5P_XXTI_LOWPWR S5P_PMUREG(0x1284)
-#define S5P_EXT_REGULATOR_LOWPWR S5P_PMUREG(0x12C0)
-#define S5P_GPIO_MODE_LOWPWR S5P_PMUREG(0x1300)
-#define S5P_GPIO_MODE_MAUDIO_LOWPWR S5P_PMUREG(0x1340)
-#define S5P_CAM_LOWPWR S5P_PMUREG(0x1380)
-#define S5P_TV_LOWPWR S5P_PMUREG(0x1384)
-#define S5P_MFC_LOWPWR S5P_PMUREG(0x1388)
-#define S5P_G3D_LOWPWR S5P_PMUREG(0x138C)
-#define S5P_LCD0_LOWPWR S5P_PMUREG(0x1390)
-#define S5P_MAUDIO_LOWPWR S5P_PMUREG(0x1398)
-#define S5P_GPS_LOWPWR S5P_PMUREG(0x139C)
-#define S5P_GPS_ALIVE_LOWPWR S5P_PMUREG(0x13A0)
+#define S5P_ARM_CORE0_LOWPWR 0x1000
+#define S5P_DIS_IRQ_CORE0 0x1004
+#define S5P_DIS_IRQ_CENTRAL0 0x1008
+#define S5P_ARM_CORE1_LOWPWR 0x1010
+#define S5P_DIS_IRQ_CORE1 0x1014
+#define S5P_DIS_IRQ_CENTRAL1 0x1018
+#define S5P_ARM_COMMON_LOWPWR 0x1080
+#define S5P_L2_0_LOWPWR 0x10C0
+#define S5P_L2_1_LOWPWR 0x10C4
+#define S5P_CMU_ACLKSTOP_LOWPWR 0x1100
+#define S5P_CMU_SCLKSTOP_LOWPWR 0x1104
+#define S5P_CMU_RESET_LOWPWR 0x110C
+#define S5P_APLL_SYSCLK_LOWPWR 0x1120
+#define S5P_MPLL_SYSCLK_LOWPWR 0x1124
+#define S5P_VPLL_SYSCLK_LOWPWR 0x1128
+#define S5P_EPLL_SYSCLK_LOWPWR 0x112C
+#define S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR 0x1138
+#define S5P_CMU_RESET_GPSALIVE_LOWPWR 0x113C
+#define S5P_CMU_CLKSTOP_CAM_LOWPWR 0x1140
+#define S5P_CMU_CLKSTOP_TV_LOWPWR 0x1144
+#define S5P_CMU_CLKSTOP_MFC_LOWPWR 0x1148
+#define S5P_CMU_CLKSTOP_G3D_LOWPWR 0x114C
+#define S5P_CMU_CLKSTOP_LCD0_LOWPWR 0x1150
+#define S5P_CMU_CLKSTOP_MAUDIO_LOWPWR 0x1158
+#define S5P_CMU_CLKSTOP_GPS_LOWPWR 0x115C
+#define S5P_CMU_RESET_CAM_LOWPWR 0x1160
+#define S5P_CMU_RESET_TV_LOWPWR 0x1164
+#define S5P_CMU_RESET_MFC_LOWPWR 0x1168
+#define S5P_CMU_RESET_G3D_LOWPWR 0x116C
+#define S5P_CMU_RESET_LCD0_LOWPWR 0x1170
+#define S5P_CMU_RESET_MAUDIO_LOWPWR 0x1178
+#define S5P_CMU_RESET_GPS_LOWPWR 0x117C
+#define S5P_TOP_BUS_LOWPWR 0x1180
+#define S5P_TOP_RETENTION_LOWPWR 0x1184
+#define S5P_TOP_PWR_LOWPWR 0x1188
+#define S5P_LOGIC_RESET_LOWPWR 0x11A0
+#define S5P_ONENAND_MEM_LOWPWR 0x11C0
+#define S5P_G2D_ACP_MEM_LOWPWR 0x11C8
+#define S5P_USBOTG_MEM_LOWPWR 0x11CC
+#define S5P_HSMMC_MEM_LOWPWR 0x11D0
+#define S5P_CSSYS_MEM_LOWPWR 0x11D4
+#define S5P_SECSS_MEM_LOWPWR 0x11D8
+#define S5P_PAD_RETENTION_DRAM_LOWPWR 0x1200
+#define S5P_PAD_RETENTION_MAUDIO_LOWPWR 0x1204
+#define S5P_PAD_RETENTION_GPIO_LOWPWR 0x1220
+#define S5P_PAD_RETENTION_UART_LOWPWR 0x1224
+#define S5P_PAD_RETENTION_MMCA_LOWPWR 0x1228
+#define S5P_PAD_RETENTION_MMCB_LOWPWR 0x122C
+#define S5P_PAD_RETENTION_EBIA_LOWPWR 0x1230
+#define S5P_PAD_RETENTION_EBIB_LOWPWR 0x1234
+#define S5P_PAD_RETENTION_ISOLATION_LOWPWR 0x1240
+#define S5P_PAD_RETENTION_ALV_SEL_LOWPWR 0x1260
+#define S5P_XUSBXTI_LOWPWR 0x1280
+#define S5P_XXTI_LOWPWR 0x1284
+#define S5P_EXT_REGULATOR_LOWPWR 0x12C0
+#define S5P_GPIO_MODE_LOWPWR 0x1300
+#define S5P_GPIO_MODE_MAUDIO_LOWPWR 0x1340
+#define S5P_CAM_LOWPWR 0x1380
+#define S5P_TV_LOWPWR 0x1384
+#define S5P_MFC_LOWPWR 0x1388
+#define S5P_G3D_LOWPWR 0x138C
+#define S5P_LCD0_LOWPWR 0x1390
+#define S5P_MAUDIO_LOWPWR 0x1398
+#define S5P_GPS_LOWPWR 0x139C
+#define S5P_GPS_ALIVE_LOWPWR 0x13A0
-#define S5P_ARM_CORE1_CONFIGURATION S5P_PMUREG(0x2080)
-#define S5P_ARM_CORE1_STATUS S5P_PMUREG(0x2084)
+#define S5P_ARM_CORE1_CONFIGURATION 0x2080
+#define S5P_ARM_CORE1_STATUS 0x2084
-#define S5P_PAD_RET_MAUDIO_OPTION S5P_PMUREG(0x3028)
-#define S5P_PAD_RET_GPIO_OPTION S5P_PMUREG(0x3108)
-#define S5P_PAD_RET_UART_OPTION S5P_PMUREG(0x3128)
-#define S5P_PAD_RET_MMCA_OPTION S5P_PMUREG(0x3148)
-#define S5P_PAD_RET_MMCB_OPTION S5P_PMUREG(0x3168)
-#define S5P_PAD_RET_EBIA_OPTION S5P_PMUREG(0x3188)
-#define S5P_PAD_RET_EBIB_OPTION S5P_PMUREG(0x31A8)
+#define S5P_PAD_RET_MAUDIO_OPTION 0x3028
+#define S5P_PAD_RET_GPIO_OPTION 0x3108
+#define S5P_PAD_RET_UART_OPTION 0x3128
+#define S5P_PAD_RET_MMCA_OPTION 0x3148
+#define S5P_PAD_RET_MMCB_OPTION 0x3168
+#define S5P_PAD_RET_EBIA_OPTION 0x3188
+#define S5P_PAD_RET_EBIB_OPTION 0x31A8
#define S5P_CORE_LOCAL_PWR_EN 0x3
#define S5P_CHECK_SLEEP 0x00000BAD
/* Only for EXYNOS4210 */
-#define S5P_CMU_CLKSTOP_LCD1_LOWPWR S5P_PMUREG(0x1154)
-#define S5P_CMU_RESET_LCD1_LOWPWR S5P_PMUREG(0x1174)
-#define S5P_MODIMIF_MEM_LOWPWR S5P_PMUREG(0x11C4)
-#define S5P_PCIE_MEM_LOWPWR S5P_PMUREG(0x11E0)
-#define S5P_SATA_MEM_LOWPWR S5P_PMUREG(0x11E4)
-#define S5P_LCD1_LOWPWR S5P_PMUREG(0x1394)
+#define S5P_CMU_CLKSTOP_LCD1_LOWPWR 0x1154
+#define S5P_CMU_RESET_LCD1_LOWPWR 0x1174
+#define S5P_MODIMIF_MEM_LOWPWR 0x11C4
+#define S5P_PCIE_MEM_LOWPWR 0x11E0
+#define S5P_SATA_MEM_LOWPWR 0x11E4
+#define S5P_LCD1_LOWPWR 0x1394
/* Only for EXYNOS4x12 */
-#define S5P_ISP_ARM_LOWPWR S5P_PMUREG(0x1050)
-#define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR S5P_PMUREG(0x1054)
-#define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR S5P_PMUREG(0x1058)
-#define S5P_CMU_ACLKSTOP_COREBLK_LOWPWR S5P_PMUREG(0x1110)
-#define S5P_CMU_SCLKSTOP_COREBLK_LOWPWR S5P_PMUREG(0x1114)
-#define S5P_CMU_RESET_COREBLK_LOWPWR S5P_PMUREG(0x111C)
-#define S5P_MPLLUSER_SYSCLK_LOWPWR S5P_PMUREG(0x1130)
-#define S5P_CMU_CLKSTOP_ISP_LOWPWR S5P_PMUREG(0x1154)
-#define S5P_CMU_RESET_ISP_LOWPWR S5P_PMUREG(0x1174)
-#define S5P_TOP_BUS_COREBLK_LOWPWR S5P_PMUREG(0x1190)
-#define S5P_TOP_RETENTION_COREBLK_LOWPWR S5P_PMUREG(0x1194)
-#define S5P_TOP_PWR_COREBLK_LOWPWR S5P_PMUREG(0x1198)
-#define S5P_OSCCLK_GATE_LOWPWR S5P_PMUREG(0x11A4)
-#define S5P_LOGIC_RESET_COREBLK_LOWPWR S5P_PMUREG(0x11B0)
-#define S5P_OSCCLK_GATE_COREBLK_LOWPWR S5P_PMUREG(0x11B4)
-#define S5P_HSI_MEM_LOWPWR S5P_PMUREG(0x11C4)
-#define S5P_ROTATOR_MEM_LOWPWR S5P_PMUREG(0x11DC)
-#define S5P_PAD_RETENTION_GPIO_COREBLK_LOWPWR S5P_PMUREG(0x123C)
-#define S5P_PAD_ISOLATION_COREBLK_LOWPWR S5P_PMUREG(0x1250)
-#define S5P_GPIO_MODE_COREBLK_LOWPWR S5P_PMUREG(0x1320)
-#define S5P_TOP_ASB_RESET_LOWPWR S5P_PMUREG(0x1344)
-#define S5P_TOP_ASB_ISOLATION_LOWPWR S5P_PMUREG(0x1348)
-#define S5P_ISP_LOWPWR S5P_PMUREG(0x1394)
-#define S5P_DRAM_FREQ_DOWN_LOWPWR S5P_PMUREG(0x13B0)
-#define S5P_DDRPHY_DLLOFF_LOWPWR S5P_PMUREG(0x13B4)
-#define S5P_CMU_SYSCLK_ISP_LOWPWR S5P_PMUREG(0x13B8)
-#define S5P_CMU_SYSCLK_GPS_LOWPWR S5P_PMUREG(0x13BC)
-#define S5P_LPDDR_PHY_DLL_LOCK_LOWPWR S5P_PMUREG(0x13C0)
+#define S5P_ISP_ARM_LOWPWR 0x1050
+#define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR 0x1054
+#define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR 0x1058
+#define S5P_CMU_ACLKSTOP_COREBLK_LOWPWR 0x1110
+#define S5P_CMU_SCLKSTOP_COREBLK_LOWPWR 0x1114
+#define S5P_CMU_RESET_COREBLK_LOWPWR 0x111C
+#define S5P_MPLLUSER_SYSCLK_LOWPWR 0x1130
+#define S5P_CMU_CLKSTOP_ISP_LOWPWR 0x1154
+#define S5P_CMU_RESET_ISP_LOWPWR 0x1174
+#define S5P_TOP_BUS_COREBLK_LOWPWR 0x1190
+#define S5P_TOP_RETENTION_COREBLK_LOWPWR 0x1194
+#define S5P_TOP_PWR_COREBLK_LOWPWR 0x1198
+#define S5P_OSCCLK_GATE_LOWPWR 0x11A4
+#define S5P_LOGIC_RESET_COREBLK_LOWPWR 0x11B0
+#define S5P_OSCCLK_GATE_COREBLK_LOWPWR 0x11B4
+#define S5P_HSI_MEM_LOWPWR 0x11C4
+#define S5P_ROTATOR_MEM_LOWPWR 0x11DC
+#define S5P_PAD_RETENTION_GPIO_COREBLK_LOWPWR 0x123C
+#define S5P_PAD_ISOLATION_COREBLK_LOWPWR 0x1250
+#define S5P_GPIO_MODE_COREBLK_LOWPWR 0x1320
+#define S5P_TOP_ASB_RESET_LOWPWR 0x1344
+#define S5P_TOP_ASB_ISOLATION_LOWPWR 0x1348
+#define S5P_ISP_LOWPWR 0x1394
+#define S5P_DRAM_FREQ_DOWN_LOWPWR 0x13B0
+#define S5P_DDRPHY_DLLOFF_LOWPWR 0x13B4
+#define S5P_CMU_SYSCLK_ISP_LOWPWR 0x13B8
+#define S5P_CMU_SYSCLK_GPS_LOWPWR 0x13BC
+#define S5P_LPDDR_PHY_DLL_LOCK_LOWPWR 0x13C0
-#define S5P_ARM_L2_0_OPTION S5P_PMUREG(0x2608)
-#define S5P_ARM_L2_1_OPTION S5P_PMUREG(0x2628)
-#define S5P_ONENAND_MEM_OPTION S5P_PMUREG(0x2E08)
-#define S5P_HSI_MEM_OPTION S5P_PMUREG(0x2E28)
-#define S5P_G2D_ACP_MEM_OPTION S5P_PMUREG(0x2E48)
-#define S5P_USBOTG_MEM_OPTION S5P_PMUREG(0x2E68)
-#define S5P_HSMMC_MEM_OPTION S5P_PMUREG(0x2E88)
-#define S5P_CSSYS_MEM_OPTION S5P_PMUREG(0x2EA8)
-#define S5P_SECSS_MEM_OPTION S5P_PMUREG(0x2EC8)
-#define S5P_ROTATOR_MEM_OPTION S5P_PMUREG(0x2F48)
+#define S5P_ARM_L2_0_OPTION 0x2608
+#define S5P_ARM_L2_1_OPTION 0x2628
+#define S5P_ONENAND_MEM_OPTION 0x2E08
+#define S5P_HSI_MEM_OPTION 0x2E28
+#define S5P_G2D_ACP_MEM_OPTION 0x2E48
+#define S5P_USBOTG_MEM_OPTION 0x2E68
+#define S5P_HSMMC_MEM_OPTION 0x2E88
+#define S5P_CSSYS_MEM_OPTION 0x2EA8
+#define S5P_SECSS_MEM_OPTION 0x2EC8
+#define S5P_ROTATOR_MEM_OPTION 0x2F48
/* Only for EXYNOS4412 */
-#define S5P_ARM_CORE2_LOWPWR S5P_PMUREG(0x1020)
-#define S5P_DIS_IRQ_CORE2 S5P_PMUREG(0x1024)
-#define S5P_DIS_IRQ_CENTRAL2 S5P_PMUREG(0x1028)
-#define S5P_ARM_CORE3_LOWPWR S5P_PMUREG(0x1030)
-#define S5P_DIS_IRQ_CORE3 S5P_PMUREG(0x1034)
-#define S5P_DIS_IRQ_CENTRAL3 S5P_PMUREG(0x1038)
+#define S5P_ARM_CORE2_LOWPWR 0x1020
+#define S5P_DIS_IRQ_CORE2 0x1024
+#define S5P_DIS_IRQ_CENTRAL2 0x1028
+#define S5P_ARM_CORE3_LOWPWR 0x1030
+#define S5P_DIS_IRQ_CORE3 0x1034
+#define S5P_DIS_IRQ_CENTRAL3 0x1038
/* For EXYNOS5 */
-#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
-#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
+#define EXYNOS5_AUTO_WDTRESET_DISABLE 0x0408
+#define EXYNOS5_MASK_WDTRESET_REQUEST 0x040C
#define EXYNOS5_SYS_WDTRESET (1 << 20)
-#define EXYNOS5_ARM_CORE0_SYS_PWR_REG S5P_PMUREG(0x1000)
-#define EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1004)
-#define EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1008)
-#define EXYNOS5_ARM_CORE1_SYS_PWR_REG S5P_PMUREG(0x1010)
-#define EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1014)
-#define EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1018)
-#define EXYNOS5_FSYS_ARM_SYS_PWR_REG S5P_PMUREG(0x1040)
-#define EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1048)
-#define EXYNOS5_ISP_ARM_SYS_PWR_REG S5P_PMUREG(0x1050)
-#define EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1054)
-#define EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1058)
-#define EXYNOS5_ARM_COMMON_SYS_PWR_REG S5P_PMUREG(0x1080)
-#define EXYNOS5_ARM_L2_SYS_PWR_REG S5P_PMUREG(0x10C0)
-#define EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG S5P_PMUREG(0x1100)
-#define EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG S5P_PMUREG(0x1104)
-#define EXYNOS5_CMU_RESET_SYS_PWR_REG S5P_PMUREG(0x110C)
-#define EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1120)
-#define EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1124)
-#define EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x112C)
-#define EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG S5P_PMUREG(0x1130)
-#define EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG S5P_PMUREG(0x1134)
-#define EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG S5P_PMUREG(0x1138)
-#define EXYNOS5_APLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1140)
-#define EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1144)
-#define EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1148)
-#define EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x114C)
-#define EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1150)
-#define EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1154)
-#define EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1164)
-#define EXYNOS5_BPLLUSER_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1170)
-#define EXYNOS5_TOP_BUS_SYS_PWR_REG S5P_PMUREG(0x1180)
-#define EXYNOS5_TOP_RETENTION_SYS_PWR_REG S5P_PMUREG(0x1184)
-#define EXYNOS5_TOP_PWR_SYS_PWR_REG S5P_PMUREG(0x1188)
-#define EXYNOS5_TOP_BUS_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1190)
-#define EXYNOS5_TOP_RETENTION_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1194)
-#define EXYNOS5_TOP_PWR_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1198)
-#define EXYNOS5_LOGIC_RESET_SYS_PWR_REG S5P_PMUREG(0x11A0)
-#define EXYNOS5_OSCCLK_GATE_SYS_PWR_REG S5P_PMUREG(0x11A4)
-#define EXYNOS5_LOGIC_RESET_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x11B0)
-#define EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x11B4)
-#define EXYNOS5_USBOTG_MEM_SYS_PWR_REG S5P_PMUREG(0x11C0)
-#define EXYNOS5_G2D_MEM_SYS_PWR_REG S5P_PMUREG(0x11C8)
-#define EXYNOS5_USBDRD_MEM_SYS_PWR_REG S5P_PMUREG(0x11CC)
-#define EXYNOS5_SDMMC_MEM_SYS_PWR_REG S5P_PMUREG(0x11D0)
-#define EXYNOS5_CSSYS_MEM_SYS_PWR_REG S5P_PMUREG(0x11D4)
-#define EXYNOS5_SECSS_MEM_SYS_PWR_REG S5P_PMUREG(0x11D8)
-#define EXYNOS5_ROTATOR_MEM_SYS_PWR_REG S5P_PMUREG(0x11DC)
-#define EXYNOS5_INTRAM_MEM_SYS_PWR_REG S5P_PMUREG(0x11E0)
-#define EXYNOS5_INTROM_MEM_SYS_PWR_REG S5P_PMUREG(0x11E4)
-#define EXYNOS5_JPEG_MEM_SYS_PWR_REG S5P_PMUREG(0x11E8)
-#define EXYNOS5_HSI_MEM_SYS_PWR_REG S5P_PMUREG(0x11EC)
-#define EXYNOS5_MCUIOP_MEM_SYS_PWR_REG S5P_PMUREG(0x11F4)
-#define EXYNOS5_SATA_MEM_SYS_PWR_REG S5P_PMUREG(0x11FC)
-#define EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG S5P_PMUREG(0x1200)
-#define EXYNOS5_PAD_RETENTION_MAU_SYS_PWR_REG S5P_PMUREG(0x1204)
-#define EXYNOS5_PAD_RETENTION_EFNAND_SYS_PWR_REG S5P_PMUREG(0x1208)
-#define EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG S5P_PMUREG(0x1220)
-#define EXYNOS5_PAD_RETENTION_UART_SYS_PWR_REG S5P_PMUREG(0x1224)
-#define EXYNOS5_PAD_RETENTION_MMCA_SYS_PWR_REG S5P_PMUREG(0x1228)
-#define EXYNOS5_PAD_RETENTION_MMCB_SYS_PWR_REG S5P_PMUREG(0x122C)
-#define EXYNOS5_PAD_RETENTION_EBIA_SYS_PWR_REG S5P_PMUREG(0x1230)
-#define EXYNOS5_PAD_RETENTION_EBIB_SYS_PWR_REG S5P_PMUREG(0x1234)
-#define EXYNOS5_PAD_RETENTION_SPI_SYS_PWR_REG S5P_PMUREG(0x1238)
-#define EXYNOS5_PAD_RETENTION_GPIO_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x123C)
-#define EXYNOS5_PAD_ISOLATION_SYS_PWR_REG S5P_PMUREG(0x1240)
-#define EXYNOS5_PAD_ISOLATION_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1250)
-#define EXYNOS5_PAD_ALV_SEL_SYS_PWR_REG S5P_PMUREG(0x1260)
-#define EXYNOS5_XUSBXTI_SYS_PWR_REG S5P_PMUREG(0x1280)
-#define EXYNOS5_XXTI_SYS_PWR_REG S5P_PMUREG(0x1284)
-#define EXYNOS5_EXT_REGULATOR_SYS_PWR_REG S5P_PMUREG(0x12C0)
-#define EXYNOS5_GPIO_MODE_SYS_PWR_REG S5P_PMUREG(0x1300)
-#define EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1320)
-#define EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG S5P_PMUREG(0x1340)
-#define EXYNOS5_TOP_ASB_RESET_SYS_PWR_REG S5P_PMUREG(0x1344)
-#define EXYNOS5_TOP_ASB_ISOLATION_SYS_PWR_REG S5P_PMUREG(0x1348)
-#define EXYNOS5_GSCL_SYS_PWR_REG S5P_PMUREG(0x1400)
-#define EXYNOS5_ISP_SYS_PWR_REG S5P_PMUREG(0x1404)
-#define EXYNOS5_MFC_SYS_PWR_REG S5P_PMUREG(0x1408)
-#define EXYNOS5_G3D_SYS_PWR_REG S5P_PMUREG(0x140C)
-#define EXYNOS5_DISP1_SYS_PWR_REG S5P_PMUREG(0x1414)
-#define EXYNOS5_MAU_SYS_PWR_REG S5P_PMUREG(0x1418)
-#define EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG S5P_PMUREG(0x1480)
-#define EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG S5P_PMUREG(0x1484)
-#define EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG S5P_PMUREG(0x1488)
-#define EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG S5P_PMUREG(0x148C)
-#define EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG S5P_PMUREG(0x1494)
-#define EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG S5P_PMUREG(0x1498)
-#define EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG S5P_PMUREG(0x14C0)
-#define EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG S5P_PMUREG(0x14C4)
-#define EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG S5P_PMUREG(0x14C8)
-#define EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG S5P_PMUREG(0x14CC)
-#define EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG S5P_PMUREG(0x14D4)
-#define EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG S5P_PMUREG(0x14D8)
-#define EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG S5P_PMUREG(0x1580)
-#define EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG S5P_PMUREG(0x1584)
-#define EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG S5P_PMUREG(0x1588)
-#define EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG S5P_PMUREG(0x158C)
-#define EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG S5P_PMUREG(0x1594)
-#define EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG S5P_PMUREG(0x1598)
+#define EXYNOS5_ARM_CORE0_SYS_PWR_REG 0x1000
+#define EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG 0x1004
+#define EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG 0x1008
+#define EXYNOS5_ARM_CORE1_SYS_PWR_REG 0x1010
+#define EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG 0x1014
+#define EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG 0x1018
+#define EXYNOS5_FSYS_ARM_SYS_PWR_REG 0x1040
+#define EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG 0x1048
+#define EXYNOS5_ISP_ARM_SYS_PWR_REG 0x1050
+#define EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG 0x1054
+#define EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG 0x1058
+#define EXYNOS5_ARM_COMMON_SYS_PWR_REG 0x1080
+#define EXYNOS5_ARM_L2_SYS_PWR_REG 0x10C0
+#define EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG 0x1100
+#define EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG 0x1104
+#define EXYNOS5_CMU_RESET_SYS_PWR_REG 0x110C
+#define EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG 0x1120
+#define EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG 0x1124
+#define EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG 0x112C
+#define EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG 0x1130
+#define EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG 0x1134
+#define EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG 0x1138
+#define EXYNOS5_APLL_SYSCLK_SYS_PWR_REG 0x1140
+#define EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG 0x1144
+#define EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG 0x1148
+#define EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG 0x114C
+#define EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG 0x1150
+#define EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG 0x1154
+#define EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG 0x1164
+#define EXYNOS5_BPLLUSER_SYSCLK_SYS_PWR_REG 0x1170
+#define EXYNOS5_TOP_BUS_SYS_PWR_REG 0x1180
+#define EXYNOS5_TOP_RETENTION_SYS_PWR_REG 0x1184
+#define EXYNOS5_TOP_PWR_SYS_PWR_REG 0x1188
+#define EXYNOS5_TOP_BUS_SYSMEM_SYS_PWR_REG 0x1190
+#define EXYNOS5_TOP_RETENTION_SYSMEM_SYS_PWR_REG 0x1194
+#define EXYNOS5_TOP_PWR_SYSMEM_SYS_PWR_REG 0x1198
+#define EXYNOS5_LOGIC_RESET_SYS_PWR_REG 0x11A0
+#define EXYNOS5_OSCCLK_GATE_SYS_PWR_REG 0x11A4
+#define EXYNOS5_LOGIC_RESET_SYSMEM_SYS_PWR_REG 0x11B0
+#define EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG 0x11B4
+#define EXYNOS5_USBOTG_MEM_SYS_PWR_REG 0x11C0
+#define EXYNOS5_G2D_MEM_SYS_PWR_REG 0x11C8
+#define EXYNOS5_USBDRD_MEM_SYS_PWR_REG 0x11CC
+#define EXYNOS5_SDMMC_MEM_SYS_PWR_REG 0x11D0
+#define EXYNOS5_CSSYS_MEM_SYS_PWR_REG 0x11D4
+#define EXYNOS5_SECSS_MEM_SYS_PWR_REG 0x11D8
+#define EXYNOS5_ROTATOR_MEM_SYS_PWR_REG 0x11DC
+#define EXYNOS5_INTRAM_MEM_SYS_PWR_REG 0x11E0
+#define EXYNOS5_INTROM_MEM_SYS_PWR_REG 0x11E4
+#define EXYNOS5_JPEG_MEM_SYS_PWR_REG 0x11E8
+#define EXYNOS5_HSI_MEM_SYS_PWR_REG 0x11EC
+#define EXYNOS5_MCUIOP_MEM_SYS_PWR_REG 0x11F4
+#define EXYNOS5_SATA_MEM_SYS_PWR_REG 0x11FC
+#define EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG 0x1200
+#define EXYNOS5_PAD_RETENTION_MAU_SYS_PWR_REG 0x1204
+#define EXYNOS5_PAD_RETENTION_EFNAND_SYS_PWR_REG 0x1208
+#define EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG 0x1220
+#define EXYNOS5_PAD_RETENTION_UART_SYS_PWR_REG 0x1224
+#define EXYNOS5_PAD_RETENTION_MMCA_SYS_PWR_REG 0x1228
+#define EXYNOS5_PAD_RETENTION_MMCB_SYS_PWR_REG 0x122C
+#define EXYNOS5_PAD_RETENTION_EBIA_SYS_PWR_REG 0x1230
+#define EXYNOS5_PAD_RETENTION_EBIB_SYS_PWR_REG 0x1234
+#define EXYNOS5_PAD_RETENTION_SPI_SYS_PWR_REG 0x1238
+#define EXYNOS5_PAD_RETENTION_GPIO_SYSMEM_SYS_PWR_REG 0x123C
+#define EXYNOS5_PAD_ISOLATION_SYS_PWR_REG 0x1240
+#define EXYNOS5_PAD_ISOLATION_SYSMEM_SYS_PWR_REG 0x1250
+#define EXYNOS5_PAD_ALV_SEL_SYS_PWR_REG 0x1260
+#define EXYNOS5_XUSBXTI_SYS_PWR_REG 0x1280
+#define EXYNOS5_XXTI_SYS_PWR_REG 0x1284
+#define EXYNOS5_EXT_REGULATOR_SYS_PWR_REG 0x12C0
+#define EXYNOS5_GPIO_MODE_SYS_PWR_REG 0x1300
+#define EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG 0x1320
+#define EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG 0x1340
+#define EXYNOS5_TOP_ASB_RESET_SYS_PWR_REG 0x1344
+#define EXYNOS5_TOP_ASB_ISOLATION_SYS_PWR_REG 0x1348
+#define EXYNOS5_GSCL_SYS_PWR_REG 0x1400
+#define EXYNOS5_ISP_SYS_PWR_REG 0x1404
+#define EXYNOS5_MFC_SYS_PWR_REG 0x1408
+#define EXYNOS5_G3D_SYS_PWR_REG 0x140C
+#define EXYNOS5_DISP1_SYS_PWR_REG 0x1414
+#define EXYNOS5_MAU_SYS_PWR_REG 0x1418
+#define EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG 0x1480
+#define EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG 0x1484
+#define EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG 0x1488
+#define EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG 0x148C
+#define EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG 0x1494
+#define EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG 0x1498
+#define EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG 0x14C0
+#define EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG 0x14C4
+#define EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG 0x14C8
+#define EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG 0x14CC
+#define EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG 0x14D4
+#define EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG 0x14D8
+#define EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG 0x1580
+#define EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG 0x1584
+#define EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG 0x1588
+#define EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG 0x158C
+#define EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG 0x1594
+#define EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG 0x1598
-#define EXYNOS5_ARM_CORE0_OPTION S5P_PMUREG(0x2008)
-#define EXYNOS5_ARM_CORE1_OPTION S5P_PMUREG(0x2088)
-#define EXYNOS5_FSYS_ARM_OPTION S5P_PMUREG(0x2208)
-#define EXYNOS5_ISP_ARM_OPTION S5P_PMUREG(0x2288)
-#define EXYNOS5_ARM_COMMON_OPTION S5P_PMUREG(0x2408)
-#define EXYNOS5_ARM_L2_OPTION S5P_PMUREG(0x2608)
-#define EXYNOS5_TOP_PWR_OPTION S5P_PMUREG(0x2C48)
-#define EXYNOS5_TOP_PWR_SYSMEM_OPTION S5P_PMUREG(0x2CC8)
-#define EXYNOS5_JPEG_MEM_OPTION S5P_PMUREG(0x2F48)
-#define EXYNOS5_GSCL_OPTION S5P_PMUREG(0x4008)
-#define EXYNOS5_ISP_OPTION S5P_PMUREG(0x4028)
-#define EXYNOS5_MFC_OPTION S5P_PMUREG(0x4048)
-#define EXYNOS5_G3D_OPTION S5P_PMUREG(0x4068)
-#define EXYNOS5_DISP1_OPTION S5P_PMUREG(0x40A8)
-#define EXYNOS5_MAU_OPTION S5P_PMUREG(0x40C8)
+#define EXYNOS5_ARM_CORE0_OPTION 0x2008
+#define EXYNOS5_ARM_CORE1_OPTION 0x2088
+#define EXYNOS5_FSYS_ARM_OPTION 0x2208
+#define EXYNOS5_ISP_ARM_OPTION 0x2288
+#define EXYNOS5_ARM_COMMON_OPTION 0x2408
+#define EXYNOS5_ARM_L2_OPTION 0x2608
+#define EXYNOS5_TOP_PWR_OPTION 0x2C48
+#define EXYNOS5_TOP_PWR_SYSMEM_OPTION 0x2CC8
+#define EXYNOS5_JPEG_MEM_OPTION 0x2F48
+#define EXYNOS5_GSCL_OPTION 0x4008
+#define EXYNOS5_ISP_OPTION 0x4028
+#define EXYNOS5_MFC_OPTION 0x4048
+#define EXYNOS5_G3D_OPTION 0x4068
+#define EXYNOS5_DISP1_OPTION 0x40A8
+#define EXYNOS5_MAU_OPTION 0x40C8
#define EXYNOS5_USE_SC_FEEDBACK (1 << 1)
#define EXYNOS5_USE_SC_COUNTER (1 << 0)
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 09/10] ARM: EXYNOS: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 12:32 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie, Pankaj Dubey
As we have removed static mappings from "regs-pmu.h" it does not
need map.h anymore. But "platsmp.c" needed this and till now it
got included indirectly. So lets move header inclusion of
"mach/map.h" from "regs-pmu.h" to "platsmp.c".
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/platsmp.c | 1 +
arch/arm/mach-exynos/regs-pmu.h | 2 --
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 9ce4c9f9..3831e6c 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -26,6 +26,7 @@
#include <asm/firmware.h>
#include <plat/cpu.h>
+#include <mach/map.h>
#include "common.h"
#include "regs-pmu.h"
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 7f3bf65..bb57b62 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -12,8 +12,6 @@
#ifndef __ASM_ARCH_REGS_PMU_H
#define __ASM_ARCH_REGS_PMU_H __FILE__
-#include <mach/map.h>
-
#define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
#define S5P_CENTRAL_LOWPWR_CFG (1 << 16)
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 09/10] ARM: EXYNOS: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c
@ 2014-04-25 12:32 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-arm-kernel
As we have removed static mappings from "regs-pmu.h" it does not
need map.h anymore. But "platsmp.c" needed this and till now it
got included indirectly. So lets move header inclusion of
"mach/map.h" from "regs-pmu.h" to "platsmp.c".
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
arch/arm/mach-exynos/platsmp.c | 1 +
arch/arm/mach-exynos/regs-pmu.h | 2 --
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 9ce4c9f9..3831e6c 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -26,6 +26,7 @@
#include <asm/firmware.h>
#include <plat/cpu.h>
+#include <mach/map.h>
#include "common.h"
#include "regs-pmu.h"
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 7f3bf65..bb57b62 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -12,8 +12,6 @@
#ifndef __ASM_ARCH_REGS_PMU_H
#define __ASM_ARCH_REGS_PMU_H __FILE__
-#include <mach/map.h>
-
#define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
#define S5P_CENTRAL_LOWPWR_CFG (1 << 16)
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 10/10] ARM: EXYNOS: Add device tree based initialization support for PMU.
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 12:32 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie, Pankaj Dubey
This patch adds device tree based initialization for PMU and modifies
PMU initialization implementation in following way:
1: Let's initialize PMU based on device tree compatibility string.
2: Obtain PMU regmap handle using "syscon_early_regmap_lookup_by_phandle"
so that we can reduce dependency over machine header files.
3: Separate each SoC's PMU initialization function and bind this initialization
function with PMU compatibility string.
4 : It also removes uses of soc_is_exynosXXXX() thus making PMU implementation
independent of "plat/cpu.h".
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
---
arch/arm/mach-exynos/pmu.c | 182 +++++++++++++++++++++++++++++++++-----------
1 file changed, 138 insertions(+), 44 deletions(-)
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 67116a5..abcf753 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -9,17 +9,31 @@
* published by the Free Software Foundation.
*/
-#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/regmap.h>
-
-#include <plat/cpu.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/mfd/syscon.h>
#include "common.h"
#include "regs-pmu.h"
+enum exynos_pmu_id {
+ PMU_EXYNOS4210,
+ PMU_EXYNOS4X12,
+ PMU_EXYNOS4412,
+ PMU_EXYNOS5250,
+};
+
+struct exynos_pmu_data {
+ enum exynos_pmu_id pmu_id;
+ struct regmap *pmu_regmap;
+};
+
+struct exynos_pmu_data *pmu_data;
static const struct exynos_pmu_conf *exynos_pmu_config;
-static struct regmap *pmu_regmap;
+typedef void (*exynos_pmu_init_t)(void);
static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
/* { .reg = address, .val = { AFTR, LPA, SLEEP } */
@@ -348,28 +362,31 @@ static void exynos5_init_pmu(void)
* Enable both SC_FEEDBACK and SC_COUNTER
*/
for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
- regmap_read(pmu_regmap, exynos5_list_both_cnt_feed[i], &tmp);
+ regmap_read(pmu_data->pmu_regmap,
+ exynos5_list_both_cnt_feed[i], &tmp);
tmp |= (EXYNOS5_USE_SC_FEEDBACK |
EXYNOS5_USE_SC_COUNTER);
- regmap_write(pmu_regmap, exynos5_list_both_cnt_feed[i], tmp);
+ regmap_write(pmu_data->pmu_regmap,
+ exynos5_list_both_cnt_feed[i], tmp);
}
/*
* SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
*/
- regmap_read(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
+ regmap_read(pmu_data->pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
- regmap_write(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
+ regmap_write(pmu_data->pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
/*
* Disable WFI/WFE on XXX_OPTION
*/
for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
- tmp = regmap_read(pmu_regmap, exynos5_list_diable_wfi_wfe[i],
- &tmp);
+ tmp = regmap_read(pmu_data->pmu_regmap,
+ exynos5_list_diable_wfi_wfe[i], &tmp);
tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
EXYNOS5_OPTION_USE_STANDBYWFI);
- regmap_write(pmu_regmap, exynos5_list_diable_wfi_wfe[i], tmp);
+ regmap_write(pmu_data->pmu_regmap,
+ exynos5_list_diable_wfi_wfe[i], tmp);
}
}
@@ -377,52 +394,129 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
{
unsigned int i;
- if (soc_is_exynos5250())
+ if (pmu_data->pmu_id == PMU_EXYNOS5250)
exynos5_init_pmu();
for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
- regmap_write(pmu_regmap, exynos_pmu_config[i].offset,
+ regmap_write(pmu_data->pmu_regmap, exynos_pmu_config[i].offset,
exynos_pmu_config[i].val[mode]);
- if (soc_is_exynos4412()) {
+ if (pmu_data->pmu_id == PMU_EXYNOS4412) {
for (i = 0; exynos4412_pmu_config[i].offset != PMU_TABLE_END; i++)
- regmap_write(pmu_regmap, exynos4412_pmu_config[i].offset,
+ regmap_write(pmu_data->pmu_regmap,
+ exynos4412_pmu_config[i].offset,
exynos4412_pmu_config[i].val[mode]);
}
}
-static int __init exynos_pmu_init(void)
+static void exynos4210_pmu_init(void)
{
- unsigned int value;
-
exynos_pmu_config = exynos4210_pmu_config;
- pmu_regmap = get_exynos_pmuregmap();
-
- if (soc_is_exynos4210()) {
- exynos_pmu_config = exynos4210_pmu_config;
- pr_info("EXYNOS4210 PMU Initialize\n");
- } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
- exynos_pmu_config = exynos4x12_pmu_config;
- pr_info("EXYNOS4x12 PMU Initialize\n");
- } else if (soc_is_exynos5250()) {
- /*
- * When SYS_WDTRESET is set, watchdog timer reset request
- * is ignored by power management unit.
- */
- regmap_read(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, &value);
- value &= ~EXYNOS5_SYS_WDTRESET;
- regmap_write(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, value);
-
- regmap_read(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, &value);
- value &= ~EXYNOS5_SYS_WDTRESET;
- regmap_write(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, value);
-
- exynos_pmu_config = exynos5250_pmu_config;
- pr_info("EXYNOS5250 PMU Initialize\n");
- } else {
- pr_info("EXYNOS: PMU not supported\n");
+ pmu_data->pmu_id = PMU_EXYNOS4210;
+
+ pr_info("EXYNOS4210 PMU Initialize\n");
+}
+
+static void exynos4x12_pmu_init(void)
+{
+ exynos_pmu_config = exynos4x12_pmu_config;
+ pmu_data->pmu_id = PMU_EXYNOS4X12;
+
+ pr_info("EXYNOS4x12 PMU Initialize\n");
+}
+
+static void exynos4412_pmu_init(void)
+{
+ exynos_pmu_config = exynos4x12_pmu_config;
+ pmu_data->pmu_id = PMU_EXYNOS4412;
+
+ pr_info("EXYNOS4412 PMU Initialize\n");
+}
+
+static void exynos5250_pmu_init(void)
+{
+ unsigned int tmp;
+
+ /*
+ * When SYS_WDTRESET is set, watchdog timer reset request
+ * is ignored by power management unit.
+ */
+ regmap_read(pmu_data->pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, &tmp);
+ tmp &= ~EXYNOS5_SYS_WDTRESET;
+ regmap_write(pmu_data->pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, tmp);
+
+ regmap_read(pmu_data->pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, &tmp);
+ tmp &= ~EXYNOS5_SYS_WDTRESET;
+ regmap_write(pmu_data->pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, tmp);
+
+ exynos_pmu_config = exynos5250_pmu_config;
+ pmu_data->pmu_id = PMU_EXYNOS5250;
+
+ pr_info("EXYNOS5250 PMU Initialize\n");
+}
+
+/*
+ * PMU platform driver and devicetree bindings.
+ */
+static struct of_device_id exynos_pmu_of_device_ids[] = {
+ {
+ .compatible = "samsung,exynos4210-pmu",
+ .data = (void *)exynos4210_pmu_init
+ },
+ {
+ .compatible = "samsung,exynos4212-pmu",
+ .data = (void *)exynos4x12_pmu_init
+ },
+ {
+ .compatible = "samsung,exynos4412-pmu",
+ .data = (void *)exynos4412_pmu_init
+ },
+ {
+ .compatible = "samsung,exynos5250-pmu",
+ .data = (void *)exynos5250_pmu_init
+ },
+ {},
+};
+
+static int exynos_pmu_probe(struct device_node *np)
+{
+ const struct of_device_id *match;
+ exynos_pmu_init_t exynos_pmu_init;
+
+ pmu_data = kzalloc(sizeof(struct exynos_pmu_data), GFP_KERNEL);
+ if (!pmu_data) {
+ pr_err("exynos_pmu driver probe failed\n");
+ return -ENOMEM;
}
+ match = of_match_node(exynos_pmu_of_device_ids, np);
+ if (!match) {
+ pr_err("fail to get matching of_match struct\n");
+ return -EINVAL;
+ }
+
+ exynos_pmu_init = match->data;
+
+ pmu_data->pmu_regmap = syscon_early_regmap_lookup_by_phandle(np,
+ "samsung,syscon-phandle");
+ if (IS_ERR(pmu_data->pmu_regmap)) {
+ pr_err("failed to find exynos_pmu_regmap\n");
+ return PTR_ERR(pmu_data->pmu_regmap);
+ }
+
+ exynos_pmu_init();
+
return 0;
+};
+
+static int __init exynos_pmu_of_init(void)
+{
+ int ret = 0;
+ struct device_node *np;
+
+ for_each_matching_node_and_match(np, exynos_pmu_of_device_ids, NULL)
+ ret = exynos_pmu_probe(np);
+
+ return ret ? ret:0;
}
-arch_initcall(exynos_pmu_init);
+arch_initcall(exynos_pmu_of_init);
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* [PATCH v2 10/10] ARM: EXYNOS: Add device tree based initialization support for PMU.
@ 2014-04-25 12:32 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-25 12:32 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds device tree based initialization for PMU and modifies
PMU initialization implementation in following way:
1: Let's initialize PMU based on device tree compatibility string.
2: Obtain PMU regmap handle using "syscon_early_regmap_lookup_by_phandle"
so that we can reduce dependency over machine header files.
3: Separate each SoC's PMU initialization function and bind this initialization
function with PMU compatibility string.
4 : It also removes uses of soc_is_exynosXXXX() thus making PMU implementation
independent of "plat/cpu.h".
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
---
arch/arm/mach-exynos/pmu.c | 182 +++++++++++++++++++++++++++++++++-----------
1 file changed, 138 insertions(+), 44 deletions(-)
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 67116a5..abcf753 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -9,17 +9,31 @@
* published by the Free Software Foundation.
*/
-#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/regmap.h>
-
-#include <plat/cpu.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/mfd/syscon.h>
#include "common.h"
#include "regs-pmu.h"
+enum exynos_pmu_id {
+ PMU_EXYNOS4210,
+ PMU_EXYNOS4X12,
+ PMU_EXYNOS4412,
+ PMU_EXYNOS5250,
+};
+
+struct exynos_pmu_data {
+ enum exynos_pmu_id pmu_id;
+ struct regmap *pmu_regmap;
+};
+
+struct exynos_pmu_data *pmu_data;
static const struct exynos_pmu_conf *exynos_pmu_config;
-static struct regmap *pmu_regmap;
+typedef void (*exynos_pmu_init_t)(void);
static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
/* { .reg = address, .val = { AFTR, LPA, SLEEP } */
@@ -348,28 +362,31 @@ static void exynos5_init_pmu(void)
* Enable both SC_FEEDBACK and SC_COUNTER
*/
for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
- regmap_read(pmu_regmap, exynos5_list_both_cnt_feed[i], &tmp);
+ regmap_read(pmu_data->pmu_regmap,
+ exynos5_list_both_cnt_feed[i], &tmp);
tmp |= (EXYNOS5_USE_SC_FEEDBACK |
EXYNOS5_USE_SC_COUNTER);
- regmap_write(pmu_regmap, exynos5_list_both_cnt_feed[i], tmp);
+ regmap_write(pmu_data->pmu_regmap,
+ exynos5_list_both_cnt_feed[i], tmp);
}
/*
* SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
*/
- regmap_read(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
+ regmap_read(pmu_data->pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
- regmap_write(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
+ regmap_write(pmu_data->pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
/*
* Disable WFI/WFE on XXX_OPTION
*/
for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
- tmp = regmap_read(pmu_regmap, exynos5_list_diable_wfi_wfe[i],
- &tmp);
+ tmp = regmap_read(pmu_data->pmu_regmap,
+ exynos5_list_diable_wfi_wfe[i], &tmp);
tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
EXYNOS5_OPTION_USE_STANDBYWFI);
- regmap_write(pmu_regmap, exynos5_list_diable_wfi_wfe[i], tmp);
+ regmap_write(pmu_data->pmu_regmap,
+ exynos5_list_diable_wfi_wfe[i], tmp);
}
}
@@ -377,52 +394,129 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
{
unsigned int i;
- if (soc_is_exynos5250())
+ if (pmu_data->pmu_id == PMU_EXYNOS5250)
exynos5_init_pmu();
for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
- regmap_write(pmu_regmap, exynos_pmu_config[i].offset,
+ regmap_write(pmu_data->pmu_regmap, exynos_pmu_config[i].offset,
exynos_pmu_config[i].val[mode]);
- if (soc_is_exynos4412()) {
+ if (pmu_data->pmu_id == PMU_EXYNOS4412) {
for (i = 0; exynos4412_pmu_config[i].offset != PMU_TABLE_END; i++)
- regmap_write(pmu_regmap, exynos4412_pmu_config[i].offset,
+ regmap_write(pmu_data->pmu_regmap,
+ exynos4412_pmu_config[i].offset,
exynos4412_pmu_config[i].val[mode]);
}
}
-static int __init exynos_pmu_init(void)
+static void exynos4210_pmu_init(void)
{
- unsigned int value;
-
exynos_pmu_config = exynos4210_pmu_config;
- pmu_regmap = get_exynos_pmuregmap();
-
- if (soc_is_exynos4210()) {
- exynos_pmu_config = exynos4210_pmu_config;
- pr_info("EXYNOS4210 PMU Initialize\n");
- } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
- exynos_pmu_config = exynos4x12_pmu_config;
- pr_info("EXYNOS4x12 PMU Initialize\n");
- } else if (soc_is_exynos5250()) {
- /*
- * When SYS_WDTRESET is set, watchdog timer reset request
- * is ignored by power management unit.
- */
- regmap_read(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, &value);
- value &= ~EXYNOS5_SYS_WDTRESET;
- regmap_write(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, value);
-
- regmap_read(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, &value);
- value &= ~EXYNOS5_SYS_WDTRESET;
- regmap_write(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, value);
-
- exynos_pmu_config = exynos5250_pmu_config;
- pr_info("EXYNOS5250 PMU Initialize\n");
- } else {
- pr_info("EXYNOS: PMU not supported\n");
+ pmu_data->pmu_id = PMU_EXYNOS4210;
+
+ pr_info("EXYNOS4210 PMU Initialize\n");
+}
+
+static void exynos4x12_pmu_init(void)
+{
+ exynos_pmu_config = exynos4x12_pmu_config;
+ pmu_data->pmu_id = PMU_EXYNOS4X12;
+
+ pr_info("EXYNOS4x12 PMU Initialize\n");
+}
+
+static void exynos4412_pmu_init(void)
+{
+ exynos_pmu_config = exynos4x12_pmu_config;
+ pmu_data->pmu_id = PMU_EXYNOS4412;
+
+ pr_info("EXYNOS4412 PMU Initialize\n");
+}
+
+static void exynos5250_pmu_init(void)
+{
+ unsigned int tmp;
+
+ /*
+ * When SYS_WDTRESET is set, watchdog timer reset request
+ * is ignored by power management unit.
+ */
+ regmap_read(pmu_data->pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, &tmp);
+ tmp &= ~EXYNOS5_SYS_WDTRESET;
+ regmap_write(pmu_data->pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, tmp);
+
+ regmap_read(pmu_data->pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, &tmp);
+ tmp &= ~EXYNOS5_SYS_WDTRESET;
+ regmap_write(pmu_data->pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, tmp);
+
+ exynos_pmu_config = exynos5250_pmu_config;
+ pmu_data->pmu_id = PMU_EXYNOS5250;
+
+ pr_info("EXYNOS5250 PMU Initialize\n");
+}
+
+/*
+ * PMU platform driver and devicetree bindings.
+ */
+static struct of_device_id exynos_pmu_of_device_ids[] = {
+ {
+ .compatible = "samsung,exynos4210-pmu",
+ .data = (void *)exynos4210_pmu_init
+ },
+ {
+ .compatible = "samsung,exynos4212-pmu",
+ .data = (void *)exynos4x12_pmu_init
+ },
+ {
+ .compatible = "samsung,exynos4412-pmu",
+ .data = (void *)exynos4412_pmu_init
+ },
+ {
+ .compatible = "samsung,exynos5250-pmu",
+ .data = (void *)exynos5250_pmu_init
+ },
+ {},
+};
+
+static int exynos_pmu_probe(struct device_node *np)
+{
+ const struct of_device_id *match;
+ exynos_pmu_init_t exynos_pmu_init;
+
+ pmu_data = kzalloc(sizeof(struct exynos_pmu_data), GFP_KERNEL);
+ if (!pmu_data) {
+ pr_err("exynos_pmu driver probe failed\n");
+ return -ENOMEM;
}
+ match = of_match_node(exynos_pmu_of_device_ids, np);
+ if (!match) {
+ pr_err("fail to get matching of_match struct\n");
+ return -EINVAL;
+ }
+
+ exynos_pmu_init = match->data;
+
+ pmu_data->pmu_regmap = syscon_early_regmap_lookup_by_phandle(np,
+ "samsung,syscon-phandle");
+ if (IS_ERR(pmu_data->pmu_regmap)) {
+ pr_err("failed to find exynos_pmu_regmap\n");
+ return PTR_ERR(pmu_data->pmu_regmap);
+ }
+
+ exynos_pmu_init();
+
return 0;
+};
+
+static int __init exynos_pmu_of_init(void)
+{
+ int ret = 0;
+ struct device_node *np;
+
+ for_each_matching_node_and_match(np, exynos_pmu_of_device_ids, NULL)
+ ret = exynos_pmu_probe(np);
+
+ return ret ? ret:0;
}
-arch_initcall(exynos_pmu_init);
+arch_initcall(exynos_pmu_of_init);
--
1.7.10.4
^ permalink raw reply related [flat|nested] 110+ messages in thread
* Re: [PATCH v2 01/10] ARM: EXYNOS: Make exynos machine_ops as static
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 21:05 ` Tomasz Figa
-1 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 21:05 UTC (permalink / raw)
To: Pankaj Dubey, linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
Hi Pankaj,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> As machine function ops are used only in this file let's make
> them static.
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/exynos.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index b32a907..2388ee4 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -198,7 +198,7 @@ static struct map_desc exynos5_iodesc[] __initdata = {
> },
> };
>
> -void exynos_restart(enum reboot_mode mode, const char *cmd)
> +static void exynos_restart(enum reboot_mode mode, const char *cmd)
> {
> struct device_node *np;
> u32 val = 0x1;
> @@ -235,7 +235,7 @@ void __init exynos_cpufreq_init(void)
> platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);
> }
>
> -void __init exynos_init_late(void)
> +static void __init exynos_init_late(void)
> {
> if (of_machine_is_compatible("samsung,exynos5440"))
> /* to be supported later */
> @@ -296,7 +296,7 @@ static void __init exynos_map_io(void)
> iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
> }
>
> -void __init exynos_init_io(void)
> +static void __init exynos_init_io(void)
> {
> debug_ll_io_init();
>
>
This patch seems to be irrelevant to the rest of this series. Anyway,
the changes itself are fine, except that I can see more functions that
could be made static as well:
- exynos_cpuidle_init(),
- exynos_cpufreq_init().
In fact, they both could be probably eliminated, as they are just
oneliners doing things that could be done in exynos_dt_machine_init()
directly.
So, if you are doing this kind of cleanup, you could do this as well and
probably also replace platform_device + platform_device_register() with
platform_device_register_simple() for cpuidle, to reduce line count and
make it consistent with cpufreq.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 01/10] ARM: EXYNOS: Make exynos machine_ops as static
@ 2014-04-25 21:05 ` Tomasz Figa
0 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 21:05 UTC (permalink / raw)
To: linux-arm-kernel
Hi Pankaj,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> As machine function ops are used only in this file let's make
> them static.
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/exynos.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index b32a907..2388ee4 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -198,7 +198,7 @@ static struct map_desc exynos5_iodesc[] __initdata = {
> },
> };
>
> -void exynos_restart(enum reboot_mode mode, const char *cmd)
> +static void exynos_restart(enum reboot_mode mode, const char *cmd)
> {
> struct device_node *np;
> u32 val = 0x1;
> @@ -235,7 +235,7 @@ void __init exynos_cpufreq_init(void)
> platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);
> }
>
> -void __init exynos_init_late(void)
> +static void __init exynos_init_late(void)
> {
> if (of_machine_is_compatible("samsung,exynos5440"))
> /* to be supported later */
> @@ -296,7 +296,7 @@ static void __init exynos_map_io(void)
> iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
> }
>
> -void __init exynos_init_io(void)
> +static void __init exynos_init_io(void)
> {
> debug_ll_io_init();
>
>
This patch seems to be irrelevant to the rest of this series. Anyway,
the changes itself are fine, except that I can see more functions that
could be made static as well:
- exynos_cpuidle_init(),
- exynos_cpufreq_init().
In fact, they both could be probably eliminated, as they are just
oneliners doing things that could be done in exynos_dt_machine_init()
directly.
So, if you are doing this kind of cleanup, you could do this as well and
probably also replace platform_device + platform_device_register() with
platform_device_register_simple() for cpuidle, to reduce line count and
make it consistent with cpufreq.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 02/10] ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 21:06 ` Tomasz Figa
-1 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 21:06 UTC (permalink / raw)
To: Pankaj Dubey, linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
Hi Pankaj,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> Remove unused and unwanted declarations from "mach-exynos/common.h"
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/common.h | 6 ------
> 1 file changed, 6 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
> index 9ef3f83..31c5964 100644
> --- a/arch/arm/mach-exynos/common.h
> +++ b/arch/arm/mach-exynos/common.h
> @@ -15,14 +15,8 @@
> #include <linux/reboot.h>
> #include <linux/of.h>
>
> -void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
> -
> -struct map_desc;
> -void exynos_init_io(void);
> -void exynos_restart(enum reboot_mode mode, const char *cmd);
> void exynos_cpuidle_init(void);
> void exynos_cpufreq_init(void);
Why don't you remove these 2 as well?
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 02/10] ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
@ 2014-04-25 21:06 ` Tomasz Figa
0 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 21:06 UTC (permalink / raw)
To: linux-arm-kernel
Hi Pankaj,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> Remove unused and unwanted declarations from "mach-exynos/common.h"
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/common.h | 6 ------
> 1 file changed, 6 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
> index 9ef3f83..31c5964 100644
> --- a/arch/arm/mach-exynos/common.h
> +++ b/arch/arm/mach-exynos/common.h
> @@ -15,14 +15,8 @@
> #include <linux/reboot.h>
> #include <linux/of.h>
>
> -void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
> -
> -struct map_desc;
> -void exynos_init_io(void);
> -void exynos_restart(enum reboot_mode mode, const char *cmd);
> void exynos_cpuidle_init(void);
> void exynos_cpufreq_init(void);
Why don't you remove these 2 as well?
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 03/10] ARM: EXYNOS: Move SYSREG definition into sys-reg specific file.
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 21:08 ` Tomasz Figa
-1 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 21:08 UTC (permalink / raw)
To: Pankaj Dubey, linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
Hi Pankaj,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> While making PMU implementation to be device tree based, there are
> few register offsets related with SYSREG present in regs-pmu.h, so
> let's make a new header file "regs-sys.h" to keep all such SYSREG
> related register offsets and remove them from "regs-pmu.h"
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/exynos.c | 1 +
> arch/arm/mach-exynos/pm.c | 1 +
> arch/arm/mach-exynos/regs-pmu.h | 3 ---
> arch/arm/mach-exynos/regs-sys.h | 22 ++++++++++++++++++++++
> 4 files changed, 24 insertions(+), 3 deletions(-)
> create mode 100644 arch/arm/mach-exynos/regs-sys.h
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 03/10] ARM: EXYNOS: Move SYSREG definition into sys-reg specific file.
@ 2014-04-25 21:08 ` Tomasz Figa
0 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 21:08 UTC (permalink / raw)
To: linux-arm-kernel
Hi Pankaj,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> While making PMU implementation to be device tree based, there are
> few register offsets related with SYSREG present in regs-pmu.h, so
> let's make a new header file "regs-sys.h" to keep all such SYSREG
> related register offsets and remove them from "regs-pmu.h"
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/exynos.c | 1 +
> arch/arm/mach-exynos/pm.c | 1 +
> arch/arm/mach-exynos/regs-pmu.h | 3 ---
> arch/arm/mach-exynos/regs-sys.h | 22 ++++++++++++++++++++++
> 4 files changed, 24 insertions(+), 3 deletions(-)
> create mode 100644 arch/arm/mach-exynos/regs-sys.h
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 04/10] ARM: EXYNOS: Remove file path from comment section
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 21:14 ` Tomasz Figa
-1 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 21:14 UTC (permalink / raw)
To: Pankaj Dubey, linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
Hi Pankaj,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> Many files under "arm/mach-exynos" are having file path in file
> comment section which is invalid now.
> So for better code maintainability let's remove them.
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/headsmp.S | 2 --
> arch/arm/mach-exynos/hotplug.c | 3 +--
> arch/arm/mach-exynos/include/mach/memory.h | 3 +--
> arch/arm/mach-exynos/platsmp.c | 3 +--
> 4 files changed, 3 insertions(+), 8 deletions(-)
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 04/10] ARM: EXYNOS: Remove file path from comment section
@ 2014-04-25 21:14 ` Tomasz Figa
0 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 21:14 UTC (permalink / raw)
To: linux-arm-kernel
Hi Pankaj,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> Many files under "arm/mach-exynos" are having file path in file
> comment section which is invalid now.
> So for better code maintainability let's remove them.
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/headsmp.S | 2 --
> arch/arm/mach-exynos/hotplug.c | 3 +--
> arch/arm/mach-exynos/include/mach/memory.h | 3 +--
> arch/arm/mach-exynos/platsmp.c | 3 +--
> 4 files changed, 3 insertions(+), 8 deletions(-)
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 05/10] ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 21:19 ` Tomasz Figa
-1 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 21:19 UTC (permalink / raw)
To: Pankaj Dubey, linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
Hi,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> Current "pm_domain.c" file uses "S5P_INT_LOCAL_PWR_EN" definition from
> "regs-pmu.h" and hence needs to include this header file. As there is
> no other user of "S5P_INT_LOCAL_PWR_EN" definition other than pm_domain,
> to remove "regs-pmu.h" header file dependency from "pm_domain.c" it's
> better we define this definition in "pm_domain.c" file itself and thus it
> will help in removing header file inclusion from "pm_domain.c".
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> ---
> arch/arm/mach-exynos/pm_domains.c | 2 +-
> arch/arm/mach-exynos/regs-pmu.h | 1 -
> 2 files changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
> index fe6570e..f676b0a 100644
> --- a/arch/arm/mach-exynos/pm_domains.c
> +++ b/arch/arm/mach-exynos/pm_domains.c
> @@ -22,7 +22,7 @@
> #include <linux/of_platform.h>
> #include <linux/sched.h>
>
> -#include "regs-pmu.h"
> +#define S5P_INT_LOCAL_PWR_EN 0x7
nit: You could indent the value a bit more in case of adding any new
macros in future. While at it, you could probably also drop the S5P_
prefix.
With these fixed, feel free to add my
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 05/10] ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
@ 2014-04-25 21:19 ` Tomasz Figa
0 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 21:19 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> Current "pm_domain.c" file uses "S5P_INT_LOCAL_PWR_EN" definition from
> "regs-pmu.h" and hence needs to include this header file. As there is
> no other user of "S5P_INT_LOCAL_PWR_EN" definition other than pm_domain,
> to remove "regs-pmu.h" header file dependency from "pm_domain.c" it's
> better we define this definition in "pm_domain.c" file itself and thus it
> will help in removing header file inclusion from "pm_domain.c".
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> ---
> arch/arm/mach-exynos/pm_domains.c | 2 +-
> arch/arm/mach-exynos/regs-pmu.h | 1 -
> 2 files changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
> index fe6570e..f676b0a 100644
> --- a/arch/arm/mach-exynos/pm_domains.c
> +++ b/arch/arm/mach-exynos/pm_domains.c
> @@ -22,7 +22,7 @@
> #include <linux/of_platform.h>
> #include <linux/sched.h>
>
> -#include "regs-pmu.h"
> +#define S5P_INT_LOCAL_PWR_EN 0x7
nit: You could indent the value a bit more in case of adding any new
macros in future. While at it, you could probably also drop the S5P_
prefix.
With these fixed, feel free to add my
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 21:43 ` Tomasz Figa
-1 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 21:43 UTC (permalink / raw)
To: Pankaj Dubey, linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
Hi,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> Add support for mapping Samsung Power Management Unit (PMU) base address
> from device tree. Code will use existing samsung pmu binding information.
> This patch also adds two helper functions as "get_exynos_pmuregmap" and
> "get_exynos_pmuaddr".
> "get_exynos_pmuregmap" returns a regmap based PMU register handle where as
> "get_exynos_pmuaddr" returns ioremap virtual address.
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/Kconfig | 2 ++
> arch/arm/mach-exynos/common.h | 3 ++
> arch/arm/mach-exynos/exynos.c | 78 +++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 83 insertions(+)
>
> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> index fc8bf18..2f60c90 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -26,6 +26,7 @@ config ARCH_EXYNOS4
> select PINCTRL
> select PM_GENERIC_DOMAINS if PM_RUNTIME
> select S5P_DEV_MFC
> + select MFD_SYSCON
> help
> Samsung EXYNOS4 SoCs based systems
>
> @@ -36,6 +37,7 @@ config ARCH_EXYNOS5
> select HAVE_ARM_SCU if SMP
> select HAVE_SMP
> select PINCTRL
> + select MFD_SYSCON
> help
> Samsung EXYNOS5 (Cortex-A15) SoC based systems
>
> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
> index 31c5964..ecfd0fc 100644
> --- a/arch/arm/mach-exynos/common.h
> +++ b/arch/arm/mach-exynos/common.h
> @@ -57,4 +57,7 @@ struct exynos_pmu_conf {
>
> extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
>
> +extern struct regmap *get_exynos_pmuregmap(void);
> +extern void __iomem *get_exynos_pmuaddr(void);
Do you really need these functions? Couldn't all the drivers using PMU
simply call syscon_regmap_lookup_by_phandle() or of_iomap() directly?
> +
> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index d6f405f..68f60e1 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -19,6 +19,7 @@
> #include <linux/of_platform.h>
> #include <linux/platform_device.h>
> #include <linux/pm_domain.h>
> +#include <linux/mfd/syscon.h>
>
> #include <asm/cacheflush.h>
> #include <asm/hardware/cache-l2x0.h>
> @@ -36,6 +37,9 @@
> #define L2_AUX_VAL 0x7C470001
> #define L2_AUX_MASK 0xC200ffff
>
> +static struct regmap *exynos_pmu_regmap;
> +static void __iomem *exynos_pmu_base;
> +
> static struct map_desc exynos4_iodesc[] __initdata = {
> {
> .virtual = (unsigned long)S3C_VA_SYS,
> @@ -269,6 +273,46 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
> return 1;
> }
>
> +static const struct of_device_id exynos_dt_pmu_match[] = {
> + { .compatible = "samsung,exynos4210-pmu" },
> + { .compatible = "samsung,exynos4212-pmu" },
> + { .compatible = "samsung,exynos4412-pmu" },
> + { .compatible = "samsung,exynos5250-pmu" },
> + {},
> +};
> +
> +static int __init exynos_fdt_map_pmu(unsigned long node,
> + const char *uname, int depth, void *data)
> +{
> + struct map_desc iodesc;
> + __be32 *reg;
> + unsigned long len;
> + phys_addr_t phys_addr;
> + const struct of_device_id *matches = exynos_dt_pmu_match;
> +
> + for (; matches->compatible[0]; matches++) {
> + if (!of_flat_dt_is_compatible(node, matches->compatible))
> + continue;
> + reg = of_get_flat_dt_prop(node, "reg", &len);
> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
> + return 0;
> +
> + phys_addr = be32_to_cpu(reg[0]);
> + iodesc.pfn = __phys_to_pfn(phys_addr);
> + iodesc.length = be32_to_cpu(reg[1]) - 1;
> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
> + iodesc.type = MT_DEVICE;
> + iotable_init(&iodesc, 1);
> +
> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
> + if (WARN_ON(!exynos_pmu_base))
> + return -EFAULT;
> + return 1;
> + }
> +
> + return 0;
> +}
Is such early mapping really needed? Couldn't the code using PMU be
deferred to the stage that memory management is available and then
of_iomap() used directly?
> +
> /*
> * exynos_map_io
> *
> @@ -302,6 +346,7 @@ static void __init exynos_init_io(void)
> debug_ll_io_init();
>
> of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
> + of_scan_flat_dt(exynos_fdt_map_pmu, NULL);
>
> /* detect cpu id and rev. */
> s5p_init_cpu(S5P_VA_CHIPID);
> @@ -336,6 +381,38 @@ static int __init exynos4_l2x0_cache_init(void)
> }
> early_initcall(exynos4_l2x0_cache_init);
>
> +
> +inline struct regmap *get_exynos_pmuregmap()
> +{
> + return exynos_pmu_regmap;
> +}
> +
> +inline void __iomem *get_exynos_pmuaddr()
> +{
> + return exynos_pmu_base;
> +}
Hmm, non-static inline inside a C file? Probably should be either static
inline or non-static non-inline. (Assuming that both are really needed,
as I pointed in the comments above.)
> +
> +
> +void __init exynos_map_pmu(void)
> +{
> + struct device_node *np = NULL;
> +
> + early_syscon_init();
> +
> + np = of_find_matching_node(NULL, exynos_dt_pmu_match);
> +
> + if (!np) {
> + pr_err("Failed to find PMU node\n");
> + return;
> + } else {
> + exynos_pmu_regmap = syscon_early_regmap_lookup_by_phandle(np,
> + "samsung,syscon-phandle");
Do you need this regmap really here? I believe it should be the code
using PMU registers which calls this function directly to retrieve a
handle to the syscon.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-25 21:43 ` Tomasz Figa
0 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 21:43 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> Add support for mapping Samsung Power Management Unit (PMU) base address
> from device tree. Code will use existing samsung pmu binding information.
> This patch also adds two helper functions as "get_exynos_pmuregmap" and
> "get_exynos_pmuaddr".
> "get_exynos_pmuregmap" returns a regmap based PMU register handle where as
> "get_exynos_pmuaddr" returns ioremap virtual address.
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/Kconfig | 2 ++
> arch/arm/mach-exynos/common.h | 3 ++
> arch/arm/mach-exynos/exynos.c | 78 +++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 83 insertions(+)
>
> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> index fc8bf18..2f60c90 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -26,6 +26,7 @@ config ARCH_EXYNOS4
> select PINCTRL
> select PM_GENERIC_DOMAINS if PM_RUNTIME
> select S5P_DEV_MFC
> + select MFD_SYSCON
> help
> Samsung EXYNOS4 SoCs based systems
>
> @@ -36,6 +37,7 @@ config ARCH_EXYNOS5
> select HAVE_ARM_SCU if SMP
> select HAVE_SMP
> select PINCTRL
> + select MFD_SYSCON
> help
> Samsung EXYNOS5 (Cortex-A15) SoC based systems
>
> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
> index 31c5964..ecfd0fc 100644
> --- a/arch/arm/mach-exynos/common.h
> +++ b/arch/arm/mach-exynos/common.h
> @@ -57,4 +57,7 @@ struct exynos_pmu_conf {
>
> extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
>
> +extern struct regmap *get_exynos_pmuregmap(void);
> +extern void __iomem *get_exynos_pmuaddr(void);
Do you really need these functions? Couldn't all the drivers using PMU
simply call syscon_regmap_lookup_by_phandle() or of_iomap() directly?
> +
> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index d6f405f..68f60e1 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -19,6 +19,7 @@
> #include <linux/of_platform.h>
> #include <linux/platform_device.h>
> #include <linux/pm_domain.h>
> +#include <linux/mfd/syscon.h>
>
> #include <asm/cacheflush.h>
> #include <asm/hardware/cache-l2x0.h>
> @@ -36,6 +37,9 @@
> #define L2_AUX_VAL 0x7C470001
> #define L2_AUX_MASK 0xC200ffff
>
> +static struct regmap *exynos_pmu_regmap;
> +static void __iomem *exynos_pmu_base;
> +
> static struct map_desc exynos4_iodesc[] __initdata = {
> {
> .virtual = (unsigned long)S3C_VA_SYS,
> @@ -269,6 +273,46 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
> return 1;
> }
>
> +static const struct of_device_id exynos_dt_pmu_match[] = {
> + { .compatible = "samsung,exynos4210-pmu" },
> + { .compatible = "samsung,exynos4212-pmu" },
> + { .compatible = "samsung,exynos4412-pmu" },
> + { .compatible = "samsung,exynos5250-pmu" },
> + {},
> +};
> +
> +static int __init exynos_fdt_map_pmu(unsigned long node,
> + const char *uname, int depth, void *data)
> +{
> + struct map_desc iodesc;
> + __be32 *reg;
> + unsigned long len;
> + phys_addr_t phys_addr;
> + const struct of_device_id *matches = exynos_dt_pmu_match;
> +
> + for (; matches->compatible[0]; matches++) {
> + if (!of_flat_dt_is_compatible(node, matches->compatible))
> + continue;
> + reg = of_get_flat_dt_prop(node, "reg", &len);
> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
> + return 0;
> +
> + phys_addr = be32_to_cpu(reg[0]);
> + iodesc.pfn = __phys_to_pfn(phys_addr);
> + iodesc.length = be32_to_cpu(reg[1]) - 1;
> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
> + iodesc.type = MT_DEVICE;
> + iotable_init(&iodesc, 1);
> +
> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
> + if (WARN_ON(!exynos_pmu_base))
> + return -EFAULT;
> + return 1;
> + }
> +
> + return 0;
> +}
Is such early mapping really needed? Couldn't the code using PMU be
deferred to the stage that memory management is available and then
of_iomap() used directly?
> +
> /*
> * exynos_map_io
> *
> @@ -302,6 +346,7 @@ static void __init exynos_init_io(void)
> debug_ll_io_init();
>
> of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
> + of_scan_flat_dt(exynos_fdt_map_pmu, NULL);
>
> /* detect cpu id and rev. */
> s5p_init_cpu(S5P_VA_CHIPID);
> @@ -336,6 +381,38 @@ static int __init exynos4_l2x0_cache_init(void)
> }
> early_initcall(exynos4_l2x0_cache_init);
>
> +
> +inline struct regmap *get_exynos_pmuregmap()
> +{
> + return exynos_pmu_regmap;
> +}
> +
> +inline void __iomem *get_exynos_pmuaddr()
> +{
> + return exynos_pmu_base;
> +}
Hmm, non-static inline inside a C file? Probably should be either static
inline or non-static non-inline. (Assuming that both are really needed,
as I pointed in the comments above.)
> +
> +
> +void __init exynos_map_pmu(void)
> +{
> + struct device_node *np = NULL;
> +
> + early_syscon_init();
> +
> + np = of_find_matching_node(NULL, exynos_dt_pmu_match);
> +
> + if (!np) {
> + pr_err("Failed to find PMU node\n");
> + return;
> + } else {
> + exynos_pmu_regmap = syscon_early_regmap_lookup_by_phandle(np,
> + "samsung,syscon-phandle");
Do you need this regmap really here? I believe it should be the code
using PMU registers which calls this function directly to retrieve a
handle to the syscon.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 07/10] ARM: EXYNOS: Remove "linux/bug.h" from pmu.c
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 21:44 ` Tomasz Figa
-1 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 21:44 UTC (permalink / raw)
To: Pankaj Dubey, linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
Hi,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> This patch removes unnecessary header file inclusion from pmu.c.
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> ---
> arch/arm/mach-exynos/pmu.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
> index 05c7ce1..4c3453a 100644
> --- a/arch/arm/mach-exynos/pmu.c
> +++ b/arch/arm/mach-exynos/pmu.c
> @@ -11,7 +11,6 @@
>
> #include <linux/io.h>
> #include <linux/kernel.h>
> -#include <linux/bug.h>
>
> #include <plat/cpu.h>
>
>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 07/10] ARM: EXYNOS: Remove "linux/bug.h" from pmu.c
@ 2014-04-25 21:44 ` Tomasz Figa
0 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 21:44 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> From: Young-Gun Jang <yg1004.jang@samsung.com>
>
> This patch removes unnecessary header file inclusion from pmu.c.
>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> ---
> arch/arm/mach-exynos/pmu.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
> index 05c7ce1..4c3453a 100644
> --- a/arch/arm/mach-exynos/pmu.c
> +++ b/arch/arm/mach-exynos/pmu.c
> @@ -11,7 +11,6 @@
>
> #include <linux/io.h>
> #include <linux/kernel.h>
> -#include <linux/bug.h>
>
> #include <plat/cpu.h>
>
>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 08/10] ARM: EXYNOS: Refactored code for using PMU address via DT
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 22:19 ` Tomasz Figa
-1 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 22:19 UTC (permalink / raw)
To: Pankaj Dubey, linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
Hi,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> Under "arm/mach-exynos" many files are using PMU register offsets.
> Since we have added support for accessing PMU base address via DT,
> now we can remove PMU mapping from exynosX_iodesc.
> Let's convert all these access using either of "get_exynos_pmuaddr"
> or "get_exynos_regmap".
> This will help us in removing static mapping of PMU base address
> as well as help in reducing dependency over machine header files.
> Thus helping for migration of PMU implementation from machine to driver
> folder which can be reused for ARM64 bsed SoC.
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/common.h | 4 +-
> arch/arm/mach-exynos/cpuidle.c | 37 ++-
> arch/arm/mach-exynos/exynos.c | 19 +-
> arch/arm/mach-exynos/hotplug.c | 4 +-
> arch/arm/mach-exynos/include/mach/map.h | 3 -
> arch/arm/mach-exynos/platsmp.c | 13 +-
> arch/arm/mach-exynos/pm.c | 60 ++--
> arch/arm/mach-exynos/pmu.c | 40 +--
> arch/arm/mach-exynos/regs-pmu.h | 506 +++++++++++++++----------------
> 9 files changed, 348 insertions(+), 338 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
> index ecfd0fc..ad5128e 100644
> --- a/arch/arm/mach-exynos/common.h
> +++ b/arch/arm/mach-exynos/common.h
> @@ -40,7 +40,7 @@ extern void exynos_cpu_die(unsigned int cpu);
>
> /* PMU(Power Management Unit) support */
>
> -#define PMU_TABLE_END NULL
> +#define PMU_TABLE_END 0xFFFF
IMHO (-1U) would be more appropriate.
>
> enum sys_powerdown {
> SYS_AFTR,
> @@ -51,7 +51,7 @@ enum sys_powerdown {
>
> extern unsigned long l2x0_regs_phys;
> struct exynos_pmu_conf {
> - void __iomem *reg;
> + unsigned int offset;
> unsigned int val[NUM_SYS_POWERDOWN];
> };
>
> diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
> index c57cae0..5dcdd46 100644
> --- a/arch/arm/mach-exynos/cpuidle.c
> +++ b/arch/arm/mach-exynos/cpuidle.c
> @@ -17,6 +17,7 @@
> #include <linux/module.h>
> #include <linux/time.h>
> #include <linux/platform_device.h>
> +#include <linux/regmap.h>
>
> #include <asm/proc-fns.h>
> #include <asm/smp_scu.h>
> @@ -34,10 +35,10 @@
>
> #define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
> S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
> - (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
> + 0x24 : S5P_INFORM0))
> #define REG_DIRECTGO_FLAG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
> S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
> - (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
> + 0x20 : S5P_INFORM1))
This patch seems to be based on old code, before Daniel Lezcano's Exynos
cpuidle refactor [1] and it should be rebased on top of that series.
[1] http://thread.gmane.org/gmane.linux.kernel.samsung-soc/29085
>
> #define S5P_CHECK_AFTR 0xFCBA0D10
>
> @@ -60,6 +61,8 @@
> #define PWR_CTRL2_CORE2_UP_RATIO (1 << 4)
> #define PWR_CTRL2_CORE1_UP_RATIO (1 << 0)
>
> +static struct regmap *pmu_regmap;
> +
> static int exynos4_enter_lowpower(struct cpuidle_device *dev,
> struct cpuidle_driver *drv,
> int index);
> @@ -87,7 +90,7 @@ static struct cpuidle_driver exynos4_idle_driver = {
> /* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
> static void exynos4_set_wakeupmask(void)
> {
> - __raw_writel(0x0000ff3e, S5P_WAKEUP_MASK);
> + regmap_write(pmu_regmap, S5P_WAKEUP_MASK, 0x0000ff3e);
> }
>
> static unsigned int g_pwr_ctrl, g_diag_reg;
> @@ -120,22 +123,28 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
> struct cpuidle_driver *drv,
> int index)
> {
> - unsigned long tmp;
> + unsigned int tmp;
>
> exynos4_set_wakeupmask();
>
> /* Set value of power down register for aftr mode */
> exynos_sys_powerdown_conf(SYS_AFTR);
> -
> - __raw_writel(virt_to_phys(exynos_cpu_resume), REG_DIRECTGO_ADDR);
> - __raw_writel(S5P_CHECK_AFTR, REG_DIRECTGO_FLAG);
> -
> +
> + if (samsung_rev() == EXYNOS4210_REV_1_0) {
> + __raw_writel(virt_to_phys(exynos_cpu_resume),
> + S5P_VA_SYSRAM + REG_DIRECTGO_ADDR);
> + __raw_writel(S5P_CHECK_AFTR, S5P_VA_SYSRAM + REG_DIRECTGO_FLAG);
> + } else {
> + regmap_write(pmu_regmap, REG_DIRECTGO_ADDR,
> + virt_to_phys(exynos_cpu_resume));
> + regmap_write(pmu_regmap, REG_DIRECTGO_FLAG, S5P_CHECK_AFTR);
> + }
This is quite ugly. I'd refactor this into a function pointer set once
at initialization time depending on SoC type and create two functions
for both cases.
In general, please also see my comments about this kind of code checking
SoC type posted as a part of my review of Vikas' Exynos5260 PMU support
series [2].
[2] http://thread.gmane.org/gmane.linux.kernel.samsung-soc/28056/focus=29342
> save_cpu_arch_register();
>
> /* Setting Central Sequence Register for power down mode */
> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
> tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
>
> cpu_pm_enter();
> cpu_suspend(0, idle_finisher);
> @@ -154,14 +163,14 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
> * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
> * in this situation.
> */
> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
> if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
> tmp |= S5P_CENTRAL_LOWPWR_CFG;
> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
> }
>
> /* Clear wakeup state register */
> - __raw_writel(0x0, S5P_WAKEUP_STAT);
> + regmap_write(pmu_regmap, S5P_WAKEUP_STAT, 0x0);
>
> return index;
> }
> @@ -219,6 +228,8 @@ static int exynos_cpuidle_probe(struct platform_device *pdev)
> int cpu_id, ret;
> struct cpuidle_device *device;
>
> + pmu_regmap = get_exynos_pmuregmap();
Why couldn't you simply look for PMU node here and then call
syscon_regmap_lookup_by_phandle()? (You will have to anyway, as Daniel's
patches mentioned above move the driver to drivers/cpuidle and it is not
possible to include headers and it is not allowed to include mach/
headers from drivers/.)
> +
> if (soc_is_exynos5250())
> exynos5_core_down_clk();
>
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index 68f60e1..b01987e 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -20,6 +20,7 @@
> #include <linux/platform_device.h>
> #include <linux/pm_domain.h>
> #include <linux/mfd/syscon.h>
> +#include <linux/regmap.h>
>
> #include <asm/cacheflush.h>
> #include <asm/hardware/cache-l2x0.h>
> @@ -67,11 +68,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
> .length = SZ_4K,
> .type = MT_DEVICE,
> }, {
> - .virtual = (unsigned long)S5P_VA_PMU,
> - .pfn = __phys_to_pfn(EXYNOS4_PA_PMU),
> - .length = SZ_64K,
> - .type = MT_DEVICE,
> - }, {
> .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
> .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
> .length = SZ_4K,
> @@ -195,11 +191,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
> .pfn = __phys_to_pfn(EXYNOS5_PA_CMU),
> .length = 144 * SZ_1K,
> .type = MT_DEVICE,
> - }, {
> - .virtual = (unsigned long)S5P_VA_PMU,
> - .pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
> - .length = SZ_64K,
> - .type = MT_DEVICE,
> },
> };
>
> @@ -207,7 +198,7 @@ static void exynos_restart(enum reboot_mode mode, const char *cmd)
> {
> struct device_node *np;
> u32 val = 0x1;
> - void __iomem *addr = EXYNOS_SWRESET;
> + void __iomem *addr = NULL;
>
> if (of_machine_is_compatible("samsung,exynos5440")) {
> u32 status;
> @@ -220,9 +211,9 @@ static void exynos_restart(enum reboot_mode mode, const char *cmd)
> val = __raw_readl(addr);
>
> val = (val & 0xffff0000) | (status & 0xffff);
> - }
> -
> - __raw_writel(val, addr);
> + __raw_writel(val, addr);
> + } else
> + regmap_write(exynos_pmu_regmap, EXYNOS_SWRESET, val);
> }
>
> static struct platform_device exynos_cpuidle = {
> diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
> index 73b0b5c..7831e64 100644
> --- a/arch/arm/mach-exynos/hotplug.c
> +++ b/arch/arm/mach-exynos/hotplug.c
> @@ -13,6 +13,7 @@
> #include <linux/errno.h>
> #include <linux/smp.h>
> #include <linux/io.h>
> +#include <linux/regmap.h>
>
> #include <asm/cacheflush.h>
> #include <asm/cp15.h>
> @@ -91,11 +92,12 @@ static inline void cpu_leave_lowpower(void)
>
> static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
> {
> + struct regmap *pmu_base = get_exynos_pmuregmap();
pmu_base is rather unfortunate name for a variable holding a pointer to
a regmap, still...
> for (;;) {
>
> /* make cpu1 to be turned off at next WFI command */
> if (cpu == 1)
> - __raw_writel(0, S5P_ARM_CORE1_CONFIGURATION);
> + regmap_write(pmu_base, S5P_ARM_CORE1_CONFIGURATION, 0);
...inside mach-exynos you could probably define exynos_pmu_write() that
would call regmap_write() with exynos_pmu_regmap (after making it
non-static) directly. This way the old code wouldn't have to care about
the regmap at all, just __raw_writel() would be replaced with
exynos_pmu_write().
OR
In case of registers that are known to not need sharing between multiple
drivers, the mapped area could be used directly. This would probably let
you eliminate any regmap-specific code from mach-exynos.
>
> /*
> * here's the WFI
> diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
> index 7b046b5..1ba7fb5 100644
> --- a/arch/arm/mach-exynos/include/mach/map.h
> +++ b/arch/arm/mach-exynos/include/mach/map.h
> @@ -35,9 +35,6 @@
> #define EXYNOS4_PA_SYSCON 0x10010000
> #define EXYNOS5_PA_SYSCON 0x10050100
>
> -#define EXYNOS4_PA_PMU 0x10020000
> -#define EXYNOS5_PA_PMU 0x10040000
> -
> #define EXYNOS4_PA_CMU 0x10030000
> #define EXYNOS5_PA_CMU 0x10010000
>
> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
> index 29c2286..9ce4c9f9 100644
> --- a/arch/arm/mach-exynos/platsmp.c
> +++ b/arch/arm/mach-exynos/platsmp.c
> @@ -31,11 +31,12 @@
> #include "regs-pmu.h"
>
> extern void exynos4_secondary_startup(void);
> +static void __iomem *pmu_base;
>
> static inline void __iomem *cpu_boot_reg_base(void)
> {
> if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
> - return S5P_INFORM5;
> + return pmu_base + S5P_INFORM5;
> return S5P_VA_SYSRAM;
> }
>
> @@ -106,14 +107,14 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
> */
> write_pen_release(phys_cpu);
>
> - if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
> + if (!(__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
> + & S5P_CORE_LOCAL_PWR_EN)) {
> __raw_writel(S5P_CORE_LOCAL_PWR_EN,
> - S5P_ARM_CORE1_CONFIGURATION);
> -
> + pmu_base + S5P_ARM_CORE1_CONFIGURATION);
> timeout = 10;
>
> /* wait max 10 ms until cpu1 is on */
> - while ((__raw_readl(S5P_ARM_CORE1_STATUS)
> + while ((__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
> & S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
> if (timeout-- == 0)
> break;
> @@ -201,6 +202,8 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
> {
> int i;
>
> + pmu_base = get_exynos_pmuaddr();
> +
> if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
> scu_enable(scu_base_addr());
>
> diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
> index 723c988..e4c10d4 100644
> --- a/arch/arm/mach-exynos/pm.c
> +++ b/arch/arm/mach-exynos/pm.c
> @@ -20,6 +20,7 @@
> #include <linux/irqchip/arm-gic.h>
> #include <linux/err.h>
> #include <linux/clk.h>
> +#include <linux/regmap.h>
>
> #include <asm/cacheflush.h>
> #include <asm/hardware/cache-l2x0.h>
> @@ -37,6 +38,8 @@
> #include "regs-pmu.h"
> #include "regs-sys.h"
>
> +static struct regmap *pmu_regmap;
> +
> /**
> * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
> * @hwirq: Hardware IRQ signal of the GIC
> @@ -125,43 +128,44 @@ static void exynos_pm_prepare(void)
> unsigned int tmp;
>
> /* Set wake-up mask registers */
> - __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
> - __raw_writel(exynos_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
> + regmap_write(pmu_regmap, S5P_EINT_WAKEUP_MASK,
> + exynos_get_eint_wake_mask());
> + regmap_write(pmu_regmap, S5P_WAKEUP_MASK,
> + exynos_irqwake_intmask & ~(1 << 31));
>
> s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
>
> if (soc_is_exynos5250()) {
> s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
> /* Disable USE_RETENTION of JPEG_MEM_OPTION */
> - tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
> + regmap_read(pmu_regmap, EXYNOS5_JPEG_MEM_OPTION, &tmp);
> tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
> - __raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION);
> + regmap_write(pmu_regmap, EXYNOS5_JPEG_MEM_OPTION, tmp);
> }
>
> /* Set value of power down register for sleep mode */
>
> exynos_sys_powerdown_conf(SYS_SLEEP);
> - __raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1);
> + regmap_write(pmu_regmap, S5P_INFORM1, S5P_CHECK_SLEEP);
>
> /* ensure at least INFORM0 has the resume address */
>
> - __raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
> + regmap_write(pmu_regmap, S5P_INFORM0, virt_to_phys(exynos_cpu_resume));
> }
>
> static int exynos_pm_suspend(void)
> {
> - unsigned long tmp;
> + unsigned int tmp;
>
> /* Setting Central Sequence Register for power down mode */
>
> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
> tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
> -
> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
> /* Setting SEQ_OPTION register */
>
> tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
> - __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_OPTION, tmp);
>
> if (!soc_is_exynos5250()) {
> /* Save Power control register */
> @@ -180,7 +184,7 @@ static int exynos_pm_suspend(void)
>
> static void exynos_pm_resume(void)
> {
> - unsigned long tmp;
> + unsigned int tmp;
>
> /*
> * If PMU failed while entering sleep mode, WFI will be
> @@ -188,12 +192,12 @@ static void exynos_pm_resume(void)
> * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
> * in this situation.
> */
> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
> if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
> tmp |= S5P_CENTRAL_LOWPWR_CFG;
> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
> /* clear the wakeup state register */
> - __raw_writel(0x0, S5P_WAKEUP_STAT);
> + regmap_write(pmu_regmap, S5P_WAKEUP_STAT, 0x0);
> /* No need to perform below restore code */
> goto early_wakeup;
> }
> @@ -213,13 +217,13 @@ static void exynos_pm_resume(void)
>
> /* For release retention */
>
> - __raw_writel((1 << 28), S5P_PAD_RET_MAUDIO_OPTION);
> - __raw_writel((1 << 28), S5P_PAD_RET_GPIO_OPTION);
> - __raw_writel((1 << 28), S5P_PAD_RET_UART_OPTION);
> - __raw_writel((1 << 28), S5P_PAD_RET_MMCA_OPTION);
> - __raw_writel((1 << 28), S5P_PAD_RET_MMCB_OPTION);
> - __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
> - __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
> + regmap_write(pmu_regmap, S5P_PAD_RET_MAUDIO_OPTION, (1 << 28));
> + regmap_write(pmu_regmap, S5P_PAD_RET_GPIO_OPTION, (1 << 28));
> + regmap_write(pmu_regmap, S5P_PAD_RET_UART_OPTION, (1 << 28));
> + regmap_write(pmu_regmap, S5P_PAD_RET_MMCA_OPTION, (1 << 28));
> + regmap_write(pmu_regmap, S5P_PAD_RET_MMCB_OPTION, (1 << 28));
> + regmap_write(pmu_regmap, S5P_PAD_RET_EBIA_OPTION, (1 << 28));
> + regmap_write(pmu_regmap, S5P_PAD_RET_EBIB_OPTION, (1 << 28));
>
> if (soc_is_exynos5250())
> s3c_pm_do_restore(exynos5_sys_save,
> @@ -233,7 +237,7 @@ static void exynos_pm_resume(void)
> early_wakeup:
>
> /* Clear SLEEP mode set in INFORM1 */
> - __raw_writel(0x0, S5P_INFORM1);
> + regmap_write(pmu_regmap, S5P_INFORM1, 0x0);
>
> return;
> }
> @@ -276,8 +280,8 @@ static int exynos_suspend_enter(suspend_state_t state)
>
> s3c_pm_restore_uarts();
>
> - S3C_PMDBG("%s: wakeup stat: %08x\n", __func__,
> - __raw_readl(S5P_WAKEUP_STAT));
> + regmap_read(pmu_regmap, S5P_WAKEUP_STAT, &ret);
> + S3C_PMDBG("%s: wakeup stat: %08x\n", __func__, ret);
>
> s3c_pm_check_restore();
>
> @@ -308,14 +312,14 @@ static const struct platform_suspend_ops exynos_suspend_ops = {
> void __init exynos_pm_init(void)
> {
> u32 tmp;
> -
> + pmu_regmap = get_exynos_pmuregmap();
> /* Platform-specific GIC callback */
> gic_arch_extn.irq_set_wake = exynos_irq_set_wake;
>
> /* All wakeup disable */
> - tmp = __raw_readl(S5P_WAKEUP_MASK);
> + regmap_read(pmu_regmap, S5P_WAKEUP_MASK, &tmp);
> tmp |= ((0xFF << 8) | (0x1F << 1));
> - __raw_writel(tmp, S5P_WAKEUP_MASK);
> + regmap_write(pmu_regmap, S5P_WAKEUP_MASK, tmp);
>
> register_syscore_ops(&exynos_pm_syscore_ops);
> suspend_set_ops(&exynos_suspend_ops);
As I said above, I don't think there is any need to use the regmap in
such low level code for registers that will not be shared.
> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
> index 4c3453a..67116a5 100644
> --- a/arch/arm/mach-exynos/pmu.c
> +++ b/arch/arm/mach-exynos/pmu.c
> @@ -11,6 +11,7 @@
>
> #include <linux/io.h>
> #include <linux/kernel.h>
> +#include <linux/regmap.h>
>
> #include <plat/cpu.h>
>
> @@ -18,6 +19,7 @@
> #include "regs-pmu.h"
>
> static const struct exynos_pmu_conf *exynos_pmu_config;
> +static struct regmap *pmu_regmap;
>
> static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
> /* { .reg = address, .val = { AFTR, LPA, SLEEP } */
> @@ -317,7 +319,7 @@ static const struct exynos_pmu_conf exynos5250_pmu_config[] = {
> { PMU_TABLE_END,},
> };
>
> -static void __iomem * const exynos5_list_both_cnt_feed[] = {
> +static unsigned int const exynos5_list_both_cnt_feed[] = {
> EXYNOS5_ARM_CORE0_OPTION,
> EXYNOS5_ARM_CORE1_OPTION,
> EXYNOS5_ARM_COMMON_OPTION,
> @@ -331,7 +333,7 @@ static void __iomem * const exynos5_list_both_cnt_feed[] = {
> EXYNOS5_TOP_PWR_SYSMEM_OPTION,
> };
>
> -static void __iomem * const exynos5_list_diable_wfi_wfe[] = {
> +static unsigned int const exynos5_list_diable_wfi_wfe[] = {
> EXYNOS5_ARM_CORE1_OPTION,
> EXYNOS5_FSYS_ARM_OPTION,
> EXYNOS5_ISP_ARM_OPTION,
> @@ -346,27 +348,28 @@ static void exynos5_init_pmu(void)
> * Enable both SC_FEEDBACK and SC_COUNTER
> */
> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
> - tmp = __raw_readl(exynos5_list_both_cnt_feed[i]);
> + regmap_read(pmu_regmap, exynos5_list_both_cnt_feed[i], &tmp);
> tmp |= (EXYNOS5_USE_SC_FEEDBACK |
> EXYNOS5_USE_SC_COUNTER);
> - __raw_writel(tmp, exynos5_list_both_cnt_feed[i]);
> + regmap_write(pmu_regmap, exynos5_list_both_cnt_feed[i], tmp);
> }
>
> /*
> * SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
> */
> - tmp = __raw_readl(EXYNOS5_ARM_COMMON_OPTION);
> + regmap_read(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
> tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
> - __raw_writel(tmp, EXYNOS5_ARM_COMMON_OPTION);
> + regmap_write(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
>
> /*
> * Disable WFI/WFE on XXX_OPTION
> */
> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
> - tmp = __raw_readl(exynos5_list_diable_wfi_wfe[i]);
> + tmp = regmap_read(pmu_regmap, exynos5_list_diable_wfi_wfe[i],
> + &tmp);
> tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
> EXYNOS5_OPTION_USE_STANDBYWFI);
> - __raw_writel(tmp, exynos5_list_diable_wfi_wfe[i]);
> + regmap_write(pmu_regmap, exynos5_list_diable_wfi_wfe[i], tmp);
> }
> }
>
> @@ -377,14 +380,14 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
> if (soc_is_exynos5250())
> exynos5_init_pmu();
>
> - for (i = 0; (exynos_pmu_config[i].reg != PMU_TABLE_END) ; i++)
> - __raw_writel(exynos_pmu_config[i].val[mode],
> - exynos_pmu_config[i].reg);
> + for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
> + regmap_write(pmu_regmap, exynos_pmu_config[i].offset,
> + exynos_pmu_config[i].val[mode]);
>
> if (soc_is_exynos4412()) {
> - for (i = 0; exynos4412_pmu_config[i].reg != PMU_TABLE_END ; i++)
> - __raw_writel(exynos4412_pmu_config[i].val[mode],
> - exynos4412_pmu_config[i].reg);
> + for (i = 0; exynos4412_pmu_config[i].offset != PMU_TABLE_END; i++)
> + regmap_write(pmu_regmap, exynos4412_pmu_config[i].offset,
> + exynos4412_pmu_config[i].val[mode]);
> }
> }
>
> @@ -393,6 +396,7 @@ static int __init exynos_pmu_init(void)
> unsigned int value;
>
> exynos_pmu_config = exynos4210_pmu_config;
> + pmu_regmap = get_exynos_pmuregmap();
>
> if (soc_is_exynos4210()) {
> exynos_pmu_config = exynos4210_pmu_config;
> @@ -405,13 +409,13 @@ static int __init exynos_pmu_init(void)
> * When SYS_WDTRESET is set, watchdog timer reset request
> * is ignored by power management unit.
> */
> - value = __raw_readl(EXYNOS5_AUTO_WDTRESET_DISABLE);
> + regmap_read(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, &value);
> value &= ~EXYNOS5_SYS_WDTRESET;
> - __raw_writel(value, EXYNOS5_AUTO_WDTRESET_DISABLE);
> + regmap_write(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, value);
>
> - value = __raw_readl(EXYNOS5_MASK_WDTRESET_REQUEST);
> + regmap_read(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, &value);
> value &= ~EXYNOS5_SYS_WDTRESET;
> - __raw_writel(value, EXYNOS5_MASK_WDTRESET_REQUEST);
> + regmap_write(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, value);
>
> exynos_pmu_config = exynos5250_pmu_config;
> pr_info("EXYNOS5250 PMU Initialize\n");
Same here.
> diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
> index bfebe84..7f3bf65 100644
> --- a/arch/arm/mach-exynos/regs-pmu.h
> +++ b/arch/arm/mach-exynos/regs-pmu.h
> @@ -14,290 +14,288 @@
>
> #include <mach/map.h>
>
Is inclusion of this header still needed after getting rid of S5P_VA_PMU
below?
> -#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
> -
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 08/10] ARM: EXYNOS: Refactored code for using PMU address via DT
@ 2014-04-25 22:19 ` Tomasz Figa
0 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 22:19 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> Under "arm/mach-exynos" many files are using PMU register offsets.
> Since we have added support for accessing PMU base address via DT,
> now we can remove PMU mapping from exynosX_iodesc.
> Let's convert all these access using either of "get_exynos_pmuaddr"
> or "get_exynos_regmap".
> This will help us in removing static mapping of PMU base address
> as well as help in reducing dependency over machine header files.
> Thus helping for migration of PMU implementation from machine to driver
> folder which can be reused for ARM64 bsed SoC.
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> arch/arm/mach-exynos/common.h | 4 +-
> arch/arm/mach-exynos/cpuidle.c | 37 ++-
> arch/arm/mach-exynos/exynos.c | 19 +-
> arch/arm/mach-exynos/hotplug.c | 4 +-
> arch/arm/mach-exynos/include/mach/map.h | 3 -
> arch/arm/mach-exynos/platsmp.c | 13 +-
> arch/arm/mach-exynos/pm.c | 60 ++--
> arch/arm/mach-exynos/pmu.c | 40 +--
> arch/arm/mach-exynos/regs-pmu.h | 506 +++++++++++++++----------------
> 9 files changed, 348 insertions(+), 338 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
> index ecfd0fc..ad5128e 100644
> --- a/arch/arm/mach-exynos/common.h
> +++ b/arch/arm/mach-exynos/common.h
> @@ -40,7 +40,7 @@ extern void exynos_cpu_die(unsigned int cpu);
>
> /* PMU(Power Management Unit) support */
>
> -#define PMU_TABLE_END NULL
> +#define PMU_TABLE_END 0xFFFF
IMHO (-1U) would be more appropriate.
>
> enum sys_powerdown {
> SYS_AFTR,
> @@ -51,7 +51,7 @@ enum sys_powerdown {
>
> extern unsigned long l2x0_regs_phys;
> struct exynos_pmu_conf {
> - void __iomem *reg;
> + unsigned int offset;
> unsigned int val[NUM_SYS_POWERDOWN];
> };
>
> diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
> index c57cae0..5dcdd46 100644
> --- a/arch/arm/mach-exynos/cpuidle.c
> +++ b/arch/arm/mach-exynos/cpuidle.c
> @@ -17,6 +17,7 @@
> #include <linux/module.h>
> #include <linux/time.h>
> #include <linux/platform_device.h>
> +#include <linux/regmap.h>
>
> #include <asm/proc-fns.h>
> #include <asm/smp_scu.h>
> @@ -34,10 +35,10 @@
>
> #define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
> S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
> - (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
> + 0x24 : S5P_INFORM0))
> #define REG_DIRECTGO_FLAG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
> S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
> - (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
> + 0x20 : S5P_INFORM1))
This patch seems to be based on old code, before Daniel Lezcano's Exynos
cpuidle refactor [1] and it should be rebased on top of that series.
[1] http://thread.gmane.org/gmane.linux.kernel.samsung-soc/29085
>
> #define S5P_CHECK_AFTR 0xFCBA0D10
>
> @@ -60,6 +61,8 @@
> #define PWR_CTRL2_CORE2_UP_RATIO (1 << 4)
> #define PWR_CTRL2_CORE1_UP_RATIO (1 << 0)
>
> +static struct regmap *pmu_regmap;
> +
> static int exynos4_enter_lowpower(struct cpuidle_device *dev,
> struct cpuidle_driver *drv,
> int index);
> @@ -87,7 +90,7 @@ static struct cpuidle_driver exynos4_idle_driver = {
> /* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
> static void exynos4_set_wakeupmask(void)
> {
> - __raw_writel(0x0000ff3e, S5P_WAKEUP_MASK);
> + regmap_write(pmu_regmap, S5P_WAKEUP_MASK, 0x0000ff3e);
> }
>
> static unsigned int g_pwr_ctrl, g_diag_reg;
> @@ -120,22 +123,28 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
> struct cpuidle_driver *drv,
> int index)
> {
> - unsigned long tmp;
> + unsigned int tmp;
>
> exynos4_set_wakeupmask();
>
> /* Set value of power down register for aftr mode */
> exynos_sys_powerdown_conf(SYS_AFTR);
> -
> - __raw_writel(virt_to_phys(exynos_cpu_resume), REG_DIRECTGO_ADDR);
> - __raw_writel(S5P_CHECK_AFTR, REG_DIRECTGO_FLAG);
> -
> +
> + if (samsung_rev() == EXYNOS4210_REV_1_0) {
> + __raw_writel(virt_to_phys(exynos_cpu_resume),
> + S5P_VA_SYSRAM + REG_DIRECTGO_ADDR);
> + __raw_writel(S5P_CHECK_AFTR, S5P_VA_SYSRAM + REG_DIRECTGO_FLAG);
> + } else {
> + regmap_write(pmu_regmap, REG_DIRECTGO_ADDR,
> + virt_to_phys(exynos_cpu_resume));
> + regmap_write(pmu_regmap, REG_DIRECTGO_FLAG, S5P_CHECK_AFTR);
> + }
This is quite ugly. I'd refactor this into a function pointer set once
at initialization time depending on SoC type and create two functions
for both cases.
In general, please also see my comments about this kind of code checking
SoC type posted as a part of my review of Vikas' Exynos5260 PMU support
series [2].
[2] http://thread.gmane.org/gmane.linux.kernel.samsung-soc/28056/focus=29342
> save_cpu_arch_register();
>
> /* Setting Central Sequence Register for power down mode */
> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
> tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
>
> cpu_pm_enter();
> cpu_suspend(0, idle_finisher);
> @@ -154,14 +163,14 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
> * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
> * in this situation.
> */
> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
> if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
> tmp |= S5P_CENTRAL_LOWPWR_CFG;
> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
> }
>
> /* Clear wakeup state register */
> - __raw_writel(0x0, S5P_WAKEUP_STAT);
> + regmap_write(pmu_regmap, S5P_WAKEUP_STAT, 0x0);
>
> return index;
> }
> @@ -219,6 +228,8 @@ static int exynos_cpuidle_probe(struct platform_device *pdev)
> int cpu_id, ret;
> struct cpuidle_device *device;
>
> + pmu_regmap = get_exynos_pmuregmap();
Why couldn't you simply look for PMU node here and then call
syscon_regmap_lookup_by_phandle()? (You will have to anyway, as Daniel's
patches mentioned above move the driver to drivers/cpuidle and it is not
possible to include headers and it is not allowed to include mach/
headers from drivers/.)
> +
> if (soc_is_exynos5250())
> exynos5_core_down_clk();
>
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index 68f60e1..b01987e 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -20,6 +20,7 @@
> #include <linux/platform_device.h>
> #include <linux/pm_domain.h>
> #include <linux/mfd/syscon.h>
> +#include <linux/regmap.h>
>
> #include <asm/cacheflush.h>
> #include <asm/hardware/cache-l2x0.h>
> @@ -67,11 +68,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
> .length = SZ_4K,
> .type = MT_DEVICE,
> }, {
> - .virtual = (unsigned long)S5P_VA_PMU,
> - .pfn = __phys_to_pfn(EXYNOS4_PA_PMU),
> - .length = SZ_64K,
> - .type = MT_DEVICE,
> - }, {
> .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
> .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
> .length = SZ_4K,
> @@ -195,11 +191,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
> .pfn = __phys_to_pfn(EXYNOS5_PA_CMU),
> .length = 144 * SZ_1K,
> .type = MT_DEVICE,
> - }, {
> - .virtual = (unsigned long)S5P_VA_PMU,
> - .pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
> - .length = SZ_64K,
> - .type = MT_DEVICE,
> },
> };
>
> @@ -207,7 +198,7 @@ static void exynos_restart(enum reboot_mode mode, const char *cmd)
> {
> struct device_node *np;
> u32 val = 0x1;
> - void __iomem *addr = EXYNOS_SWRESET;
> + void __iomem *addr = NULL;
>
> if (of_machine_is_compatible("samsung,exynos5440")) {
> u32 status;
> @@ -220,9 +211,9 @@ static void exynos_restart(enum reboot_mode mode, const char *cmd)
> val = __raw_readl(addr);
>
> val = (val & 0xffff0000) | (status & 0xffff);
> - }
> -
> - __raw_writel(val, addr);
> + __raw_writel(val, addr);
> + } else
> + regmap_write(exynos_pmu_regmap, EXYNOS_SWRESET, val);
> }
>
> static struct platform_device exynos_cpuidle = {
> diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
> index 73b0b5c..7831e64 100644
> --- a/arch/arm/mach-exynos/hotplug.c
> +++ b/arch/arm/mach-exynos/hotplug.c
> @@ -13,6 +13,7 @@
> #include <linux/errno.h>
> #include <linux/smp.h>
> #include <linux/io.h>
> +#include <linux/regmap.h>
>
> #include <asm/cacheflush.h>
> #include <asm/cp15.h>
> @@ -91,11 +92,12 @@ static inline void cpu_leave_lowpower(void)
>
> static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
> {
> + struct regmap *pmu_base = get_exynos_pmuregmap();
pmu_base is rather unfortunate name for a variable holding a pointer to
a regmap, still...
> for (;;) {
>
> /* make cpu1 to be turned off at next WFI command */
> if (cpu == 1)
> - __raw_writel(0, S5P_ARM_CORE1_CONFIGURATION);
> + regmap_write(pmu_base, S5P_ARM_CORE1_CONFIGURATION, 0);
...inside mach-exynos you could probably define exynos_pmu_write() that
would call regmap_write() with exynos_pmu_regmap (after making it
non-static) directly. This way the old code wouldn't have to care about
the regmap at all, just __raw_writel() would be replaced with
exynos_pmu_write().
OR
In case of registers that are known to not need sharing between multiple
drivers, the mapped area could be used directly. This would probably let
you eliminate any regmap-specific code from mach-exynos.
>
> /*
> * here's the WFI
> diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
> index 7b046b5..1ba7fb5 100644
> --- a/arch/arm/mach-exynos/include/mach/map.h
> +++ b/arch/arm/mach-exynos/include/mach/map.h
> @@ -35,9 +35,6 @@
> #define EXYNOS4_PA_SYSCON 0x10010000
> #define EXYNOS5_PA_SYSCON 0x10050100
>
> -#define EXYNOS4_PA_PMU 0x10020000
> -#define EXYNOS5_PA_PMU 0x10040000
> -
> #define EXYNOS4_PA_CMU 0x10030000
> #define EXYNOS5_PA_CMU 0x10010000
>
> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
> index 29c2286..9ce4c9f9 100644
> --- a/arch/arm/mach-exynos/platsmp.c
> +++ b/arch/arm/mach-exynos/platsmp.c
> @@ -31,11 +31,12 @@
> #include "regs-pmu.h"
>
> extern void exynos4_secondary_startup(void);
> +static void __iomem *pmu_base;
>
> static inline void __iomem *cpu_boot_reg_base(void)
> {
> if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
> - return S5P_INFORM5;
> + return pmu_base + S5P_INFORM5;
> return S5P_VA_SYSRAM;
> }
>
> @@ -106,14 +107,14 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
> */
> write_pen_release(phys_cpu);
>
> - if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
> + if (!(__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
> + & S5P_CORE_LOCAL_PWR_EN)) {
> __raw_writel(S5P_CORE_LOCAL_PWR_EN,
> - S5P_ARM_CORE1_CONFIGURATION);
> -
> + pmu_base + S5P_ARM_CORE1_CONFIGURATION);
> timeout = 10;
>
> /* wait max 10 ms until cpu1 is on */
> - while ((__raw_readl(S5P_ARM_CORE1_STATUS)
> + while ((__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
> & S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
> if (timeout-- == 0)
> break;
> @@ -201,6 +202,8 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
> {
> int i;
>
> + pmu_base = get_exynos_pmuaddr();
> +
> if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
> scu_enable(scu_base_addr());
>
> diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
> index 723c988..e4c10d4 100644
> --- a/arch/arm/mach-exynos/pm.c
> +++ b/arch/arm/mach-exynos/pm.c
> @@ -20,6 +20,7 @@
> #include <linux/irqchip/arm-gic.h>
> #include <linux/err.h>
> #include <linux/clk.h>
> +#include <linux/regmap.h>
>
> #include <asm/cacheflush.h>
> #include <asm/hardware/cache-l2x0.h>
> @@ -37,6 +38,8 @@
> #include "regs-pmu.h"
> #include "regs-sys.h"
>
> +static struct regmap *pmu_regmap;
> +
> /**
> * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
> * @hwirq: Hardware IRQ signal of the GIC
> @@ -125,43 +128,44 @@ static void exynos_pm_prepare(void)
> unsigned int tmp;
>
> /* Set wake-up mask registers */
> - __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
> - __raw_writel(exynos_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
> + regmap_write(pmu_regmap, S5P_EINT_WAKEUP_MASK,
> + exynos_get_eint_wake_mask());
> + regmap_write(pmu_regmap, S5P_WAKEUP_MASK,
> + exynos_irqwake_intmask & ~(1 << 31));
>
> s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
>
> if (soc_is_exynos5250()) {
> s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
> /* Disable USE_RETENTION of JPEG_MEM_OPTION */
> - tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
> + regmap_read(pmu_regmap, EXYNOS5_JPEG_MEM_OPTION, &tmp);
> tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
> - __raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION);
> + regmap_write(pmu_regmap, EXYNOS5_JPEG_MEM_OPTION, tmp);
> }
>
> /* Set value of power down register for sleep mode */
>
> exynos_sys_powerdown_conf(SYS_SLEEP);
> - __raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1);
> + regmap_write(pmu_regmap, S5P_INFORM1, S5P_CHECK_SLEEP);
>
> /* ensure at least INFORM0 has the resume address */
>
> - __raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
> + regmap_write(pmu_regmap, S5P_INFORM0, virt_to_phys(exynos_cpu_resume));
> }
>
> static int exynos_pm_suspend(void)
> {
> - unsigned long tmp;
> + unsigned int tmp;
>
> /* Setting Central Sequence Register for power down mode */
>
> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
> tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
> -
> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
> /* Setting SEQ_OPTION register */
>
> tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
> - __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_OPTION, tmp);
>
> if (!soc_is_exynos5250()) {
> /* Save Power control register */
> @@ -180,7 +184,7 @@ static int exynos_pm_suspend(void)
>
> static void exynos_pm_resume(void)
> {
> - unsigned long tmp;
> + unsigned int tmp;
>
> /*
> * If PMU failed while entering sleep mode, WFI will be
> @@ -188,12 +192,12 @@ static void exynos_pm_resume(void)
> * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
> * in this situation.
> */
> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
> if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
> tmp |= S5P_CENTRAL_LOWPWR_CFG;
> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
> /* clear the wakeup state register */
> - __raw_writel(0x0, S5P_WAKEUP_STAT);
> + regmap_write(pmu_regmap, S5P_WAKEUP_STAT, 0x0);
> /* No need to perform below restore code */
> goto early_wakeup;
> }
> @@ -213,13 +217,13 @@ static void exynos_pm_resume(void)
>
> /* For release retention */
>
> - __raw_writel((1 << 28), S5P_PAD_RET_MAUDIO_OPTION);
> - __raw_writel((1 << 28), S5P_PAD_RET_GPIO_OPTION);
> - __raw_writel((1 << 28), S5P_PAD_RET_UART_OPTION);
> - __raw_writel((1 << 28), S5P_PAD_RET_MMCA_OPTION);
> - __raw_writel((1 << 28), S5P_PAD_RET_MMCB_OPTION);
> - __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
> - __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
> + regmap_write(pmu_regmap, S5P_PAD_RET_MAUDIO_OPTION, (1 << 28));
> + regmap_write(pmu_regmap, S5P_PAD_RET_GPIO_OPTION, (1 << 28));
> + regmap_write(pmu_regmap, S5P_PAD_RET_UART_OPTION, (1 << 28));
> + regmap_write(pmu_regmap, S5P_PAD_RET_MMCA_OPTION, (1 << 28));
> + regmap_write(pmu_regmap, S5P_PAD_RET_MMCB_OPTION, (1 << 28));
> + regmap_write(pmu_regmap, S5P_PAD_RET_EBIA_OPTION, (1 << 28));
> + regmap_write(pmu_regmap, S5P_PAD_RET_EBIB_OPTION, (1 << 28));
>
> if (soc_is_exynos5250())
> s3c_pm_do_restore(exynos5_sys_save,
> @@ -233,7 +237,7 @@ static void exynos_pm_resume(void)
> early_wakeup:
>
> /* Clear SLEEP mode set in INFORM1 */
> - __raw_writel(0x0, S5P_INFORM1);
> + regmap_write(pmu_regmap, S5P_INFORM1, 0x0);
>
> return;
> }
> @@ -276,8 +280,8 @@ static int exynos_suspend_enter(suspend_state_t state)
>
> s3c_pm_restore_uarts();
>
> - S3C_PMDBG("%s: wakeup stat: %08x\n", __func__,
> - __raw_readl(S5P_WAKEUP_STAT));
> + regmap_read(pmu_regmap, S5P_WAKEUP_STAT, &ret);
> + S3C_PMDBG("%s: wakeup stat: %08x\n", __func__, ret);
>
> s3c_pm_check_restore();
>
> @@ -308,14 +312,14 @@ static const struct platform_suspend_ops exynos_suspend_ops = {
> void __init exynos_pm_init(void)
> {
> u32 tmp;
> -
> + pmu_regmap = get_exynos_pmuregmap();
> /* Platform-specific GIC callback */
> gic_arch_extn.irq_set_wake = exynos_irq_set_wake;
>
> /* All wakeup disable */
> - tmp = __raw_readl(S5P_WAKEUP_MASK);
> + regmap_read(pmu_regmap, S5P_WAKEUP_MASK, &tmp);
> tmp |= ((0xFF << 8) | (0x1F << 1));
> - __raw_writel(tmp, S5P_WAKEUP_MASK);
> + regmap_write(pmu_regmap, S5P_WAKEUP_MASK, tmp);
>
> register_syscore_ops(&exynos_pm_syscore_ops);
> suspend_set_ops(&exynos_suspend_ops);
As I said above, I don't think there is any need to use the regmap in
such low level code for registers that will not be shared.
> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
> index 4c3453a..67116a5 100644
> --- a/arch/arm/mach-exynos/pmu.c
> +++ b/arch/arm/mach-exynos/pmu.c
> @@ -11,6 +11,7 @@
>
> #include <linux/io.h>
> #include <linux/kernel.h>
> +#include <linux/regmap.h>
>
> #include <plat/cpu.h>
>
> @@ -18,6 +19,7 @@
> #include "regs-pmu.h"
>
> static const struct exynos_pmu_conf *exynos_pmu_config;
> +static struct regmap *pmu_regmap;
>
> static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
> /* { .reg = address, .val = { AFTR, LPA, SLEEP } */
> @@ -317,7 +319,7 @@ static const struct exynos_pmu_conf exynos5250_pmu_config[] = {
> { PMU_TABLE_END,},
> };
>
> -static void __iomem * const exynos5_list_both_cnt_feed[] = {
> +static unsigned int const exynos5_list_both_cnt_feed[] = {
> EXYNOS5_ARM_CORE0_OPTION,
> EXYNOS5_ARM_CORE1_OPTION,
> EXYNOS5_ARM_COMMON_OPTION,
> @@ -331,7 +333,7 @@ static void __iomem * const exynos5_list_both_cnt_feed[] = {
> EXYNOS5_TOP_PWR_SYSMEM_OPTION,
> };
>
> -static void __iomem * const exynos5_list_diable_wfi_wfe[] = {
> +static unsigned int const exynos5_list_diable_wfi_wfe[] = {
> EXYNOS5_ARM_CORE1_OPTION,
> EXYNOS5_FSYS_ARM_OPTION,
> EXYNOS5_ISP_ARM_OPTION,
> @@ -346,27 +348,28 @@ static void exynos5_init_pmu(void)
> * Enable both SC_FEEDBACK and SC_COUNTER
> */
> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
> - tmp = __raw_readl(exynos5_list_both_cnt_feed[i]);
> + regmap_read(pmu_regmap, exynos5_list_both_cnt_feed[i], &tmp);
> tmp |= (EXYNOS5_USE_SC_FEEDBACK |
> EXYNOS5_USE_SC_COUNTER);
> - __raw_writel(tmp, exynos5_list_both_cnt_feed[i]);
> + regmap_write(pmu_regmap, exynos5_list_both_cnt_feed[i], tmp);
> }
>
> /*
> * SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
> */
> - tmp = __raw_readl(EXYNOS5_ARM_COMMON_OPTION);
> + regmap_read(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
> tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
> - __raw_writel(tmp, EXYNOS5_ARM_COMMON_OPTION);
> + regmap_write(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
>
> /*
> * Disable WFI/WFE on XXX_OPTION
> */
> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
> - tmp = __raw_readl(exynos5_list_diable_wfi_wfe[i]);
> + tmp = regmap_read(pmu_regmap, exynos5_list_diable_wfi_wfe[i],
> + &tmp);
> tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
> EXYNOS5_OPTION_USE_STANDBYWFI);
> - __raw_writel(tmp, exynos5_list_diable_wfi_wfe[i]);
> + regmap_write(pmu_regmap, exynos5_list_diable_wfi_wfe[i], tmp);
> }
> }
>
> @@ -377,14 +380,14 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
> if (soc_is_exynos5250())
> exynos5_init_pmu();
>
> - for (i = 0; (exynos_pmu_config[i].reg != PMU_TABLE_END) ; i++)
> - __raw_writel(exynos_pmu_config[i].val[mode],
> - exynos_pmu_config[i].reg);
> + for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
> + regmap_write(pmu_regmap, exynos_pmu_config[i].offset,
> + exynos_pmu_config[i].val[mode]);
>
> if (soc_is_exynos4412()) {
> - for (i = 0; exynos4412_pmu_config[i].reg != PMU_TABLE_END ; i++)
> - __raw_writel(exynos4412_pmu_config[i].val[mode],
> - exynos4412_pmu_config[i].reg);
> + for (i = 0; exynos4412_pmu_config[i].offset != PMU_TABLE_END; i++)
> + regmap_write(pmu_regmap, exynos4412_pmu_config[i].offset,
> + exynos4412_pmu_config[i].val[mode]);
> }
> }
>
> @@ -393,6 +396,7 @@ static int __init exynos_pmu_init(void)
> unsigned int value;
>
> exynos_pmu_config = exynos4210_pmu_config;
> + pmu_regmap = get_exynos_pmuregmap();
>
> if (soc_is_exynos4210()) {
> exynos_pmu_config = exynos4210_pmu_config;
> @@ -405,13 +409,13 @@ static int __init exynos_pmu_init(void)
> * When SYS_WDTRESET is set, watchdog timer reset request
> * is ignored by power management unit.
> */
> - value = __raw_readl(EXYNOS5_AUTO_WDTRESET_DISABLE);
> + regmap_read(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, &value);
> value &= ~EXYNOS5_SYS_WDTRESET;
> - __raw_writel(value, EXYNOS5_AUTO_WDTRESET_DISABLE);
> + regmap_write(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, value);
>
> - value = __raw_readl(EXYNOS5_MASK_WDTRESET_REQUEST);
> + regmap_read(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, &value);
> value &= ~EXYNOS5_SYS_WDTRESET;
> - __raw_writel(value, EXYNOS5_MASK_WDTRESET_REQUEST);
> + regmap_write(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, value);
>
> exynos_pmu_config = exynos5250_pmu_config;
> pr_info("EXYNOS5250 PMU Initialize\n");
Same here.
> diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
> index bfebe84..7f3bf65 100644
> --- a/arch/arm/mach-exynos/regs-pmu.h
> +++ b/arch/arm/mach-exynos/regs-pmu.h
> @@ -14,290 +14,288 @@
>
> #include <mach/map.h>
>
Is inclusion of this header still needed after getting rid of S5P_VA_PMU
below?
> -#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
> -
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 10/10] ARM: EXYNOS: Add device tree based initialization support for PMU.
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 22:40 ` Tomasz Figa
-1 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 22:40 UTC (permalink / raw)
To: Pankaj Dubey, linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
Hi,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> This patch adds device tree based initialization for PMU and modifies
> PMU initialization implementation in following way:
>
> 1: Let's initialize PMU based on device tree compatibility string.
> 2: Obtain PMU regmap handle using "syscon_early_regmap_lookup_by_phandle"
> so that we can reduce dependency over machine header files.
> 3: Separate each SoC's PMU initialization function and bind this initialization
> function with PMU compatibility string.
> 4 : It also removes uses of soc_is_exynosXXXX() thus making PMU implementation
> independent of "plat/cpu.h".
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> ---
> arch/arm/mach-exynos/pmu.c | 182 +++++++++++++++++++++++++++++++++-----------
> 1 file changed, 138 insertions(+), 44 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
> index 67116a5..abcf753 100644
> --- a/arch/arm/mach-exynos/pmu.c
> +++ b/arch/arm/mach-exynos/pmu.c
> @@ -9,17 +9,31 @@
> * published by the Free Software Foundation.
> */
>
> -#include <linux/io.h>
> #include <linux/kernel.h>
> #include <linux/regmap.h>
> -
> -#include <plat/cpu.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/mfd/syscon.h>
>
> #include "common.h"
> #include "regs-pmu.h"
>
> +enum exynos_pmu_id {
> + PMU_EXYNOS4210,
> + PMU_EXYNOS4X12,
> + PMU_EXYNOS4412,
> + PMU_EXYNOS5250,
> +};
> +
> +struct exynos_pmu_data {
> + enum exynos_pmu_id pmu_id;
> + struct regmap *pmu_regmap;
Again, since this uses the PMU node directly and doesn't seem to access
any registers shared with other drivers (or at least not at the time
most the functions from this file are called) I don't think there is any
reason why not to use of_iomap() and access the registers directly.
What about adding more fields to this struct? For example .pmu_config,
.pmu_config_extra (for model-specific settings, like for Exynos4412, see
my comment below) and (*pmu_init)? Of course the regmap (or base
address) would have to be moved outside, as it isn't const data.
Then for each PMU variant there would be a static const struct will all
those fields already filled in and entries in OF match table would
already point to appropriate structure.
> +};
> +
> +struct exynos_pmu_data *pmu_data;
> static const struct exynos_pmu_conf *exynos_pmu_config;
> -static struct regmap *pmu_regmap;
> +typedef void (*exynos_pmu_init_t)(void);
>
> static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
> /* { .reg = address, .val = { AFTR, LPA, SLEEP } */
> @@ -348,28 +362,31 @@ static void exynos5_init_pmu(void)
> * Enable both SC_FEEDBACK and SC_COUNTER
> */
> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
> - regmap_read(pmu_regmap, exynos5_list_both_cnt_feed[i], &tmp);
> + regmap_read(pmu_data->pmu_regmap,
> + exynos5_list_both_cnt_feed[i], &tmp);
> tmp |= (EXYNOS5_USE_SC_FEEDBACK |
> EXYNOS5_USE_SC_COUNTER);
> - regmap_write(pmu_regmap, exynos5_list_both_cnt_feed[i], tmp);
> + regmap_write(pmu_data->pmu_regmap,
> + exynos5_list_both_cnt_feed[i], tmp);
> }
>
> /*
> * SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
> */
> - regmap_read(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
> tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
> - regmap_write(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
>
> /*
> * Disable WFI/WFE on XXX_OPTION
> */
> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
> - tmp = regmap_read(pmu_regmap, exynos5_list_diable_wfi_wfe[i],
> - &tmp);
> + tmp = regmap_read(pmu_data->pmu_regmap,
> + exynos5_list_diable_wfi_wfe[i], &tmp);
> tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
> EXYNOS5_OPTION_USE_STANDBYWFI);
> - regmap_write(pmu_regmap, exynos5_list_diable_wfi_wfe[i], tmp);
> + regmap_write(pmu_data->pmu_regmap,
> + exynos5_list_diable_wfi_wfe[i], tmp);
> }
> }
>
> @@ -377,52 +394,129 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
> {
> unsigned int i;
>
> - if (soc_is_exynos5250())
> + if (pmu_data->pmu_id == PMU_EXYNOS5250)
> exynos5_init_pmu();
Next field could be added to exynos_pmu_data struct, called
(*powerdown_conf) and then the code above replaced with:
if (pmu_data->powerdown_conf)
pmu_data->powerdown_conf(mode);
>
> for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
> - regmap_write(pmu_regmap, exynos_pmu_config[i].offset,
> + regmap_write(pmu_data->pmu_regmap, exynos_pmu_config[i].offset,
> exynos_pmu_config[i].val[mode]);
>
> - if (soc_is_exynos4412()) {
> + if (pmu_data->pmu_id == PMU_EXYNOS4412) {
> for (i = 0; exynos4412_pmu_config[i].offset != PMU_TABLE_END; i++)
> - regmap_write(pmu_regmap, exynos4412_pmu_config[i].offset,
> + regmap_write(pmu_data->pmu_regmap,
> + exynos4412_pmu_config[i].offset,
> exynos4412_pmu_config[i].val[mode]);
> }
As I mentioned above, the pmu_data struct could have a field called
pmu_config_extra that would be non-NULL for Exynos4412 and then the code
above could be replaced with:
if (pmu_data->pmu_config_extra) {
// iterate over pmu_config_extra
// ...
}
This way you could completely remove the pmu_id field and checks for
particular SoCs from the code.
> }
>
> -static int __init exynos_pmu_init(void)
> +static void exynos4210_pmu_init(void)
> {
> - unsigned int value;
> -
> exynos_pmu_config = exynos4210_pmu_config;
> - pmu_regmap = get_exynos_pmuregmap();
> -
> - if (soc_is_exynos4210()) {
> - exynos_pmu_config = exynos4210_pmu_config;
> - pr_info("EXYNOS4210 PMU Initialize\n");
> - } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
> - exynos_pmu_config = exynos4x12_pmu_config;
> - pr_info("EXYNOS4x12 PMU Initialize\n");
> - } else if (soc_is_exynos5250()) {
> - /*
> - * When SYS_WDTRESET is set, watchdog timer reset request
> - * is ignored by power management unit.
> - */
> - regmap_read(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, &value);
> - value &= ~EXYNOS5_SYS_WDTRESET;
> - regmap_write(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, value);
> -
> - regmap_read(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, &value);
> - value &= ~EXYNOS5_SYS_WDTRESET;
> - regmap_write(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, value);
> -
> - exynos_pmu_config = exynos5250_pmu_config;
> - pr_info("EXYNOS5250 PMU Initialize\n");
> - } else {
> - pr_info("EXYNOS: PMU not supported\n");
> + pmu_data->pmu_id = PMU_EXYNOS4210;
> +
> + pr_info("EXYNOS4210 PMU Initialize\n");
> +}
> +
> +static void exynos4x12_pmu_init(void)
> +{
> + exynos_pmu_config = exynos4x12_pmu_config;
> + pmu_data->pmu_id = PMU_EXYNOS4X12;
> +
> + pr_info("EXYNOS4x12 PMU Initialize\n");
> +}
> +
> +static void exynos4412_pmu_init(void)
> +{
> + exynos_pmu_config = exynos4x12_pmu_config;
> + pmu_data->pmu_id = PMU_EXYNOS4412;
> +
> + pr_info("EXYNOS4412 PMU Initialize\n");
> +}
> +
> +static void exynos5250_pmu_init(void)
> +{
> + unsigned int tmp;
> +
> + /*
> + * When SYS_WDTRESET is set, watchdog timer reset request
> + * is ignored by power management unit.
> + */
> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, &tmp);
> + tmp &= ~EXYNOS5_SYS_WDTRESET;
> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, tmp);
> +
> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, &tmp);
> + tmp &= ~EXYNOS5_SYS_WDTRESET;
> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, tmp);
> +
> + exynos_pmu_config = exynos5250_pmu_config;
> + pmu_data->pmu_id = PMU_EXYNOS5250;
> +
> + pr_info("EXYNOS5250 PMU Initialize\n");
> +}
This part is very nice. Finally there is no huge if with else if clause
for every SoC. Thanks.
> +
> +/*
> + * PMU platform driver and devicetree bindings.
> + */
> +static struct of_device_id exynos_pmu_of_device_ids[] = {
> + {
> + .compatible = "samsung,exynos4210-pmu",
> + .data = (void *)exynos4210_pmu_init
> + },
> + {
> + .compatible = "samsung,exynos4212-pmu",
> + .data = (void *)exynos4x12_pmu_init
> + },
> + {
> + .compatible = "samsung,exynos4412-pmu",
> + .data = (void *)exynos4412_pmu_init
> + },
> + {
> + .compatible = "samsung,exynos5250-pmu",
> + .data = (void *)exynos5250_pmu_init
> + },
> + {},
> +};
> +
> +static int exynos_pmu_probe(struct device_node *np)
> +{
> + const struct of_device_id *match;
> + exynos_pmu_init_t exynos_pmu_init;
> +
> + pmu_data = kzalloc(sizeof(struct exynos_pmu_data), GFP_KERNEL);
> + if (!pmu_data) {
> + pr_err("exynos_pmu driver probe failed\n");
> + return -ENOMEM;
> }
>
> + match = of_match_node(exynos_pmu_of_device_ids, np);
> + if (!match) {
> + pr_err("fail to get matching of_match struct\n");
> + return -EINVAL;
> + }
> +
> + exynos_pmu_init = match->data;
> +
> + pmu_data->pmu_regmap = syscon_early_regmap_lookup_by_phandle(np,
> + "samsung,syscon-phandle");
> + if (IS_ERR(pmu_data->pmu_regmap)) {
> + pr_err("failed to find exynos_pmu_regmap\n");
> + return PTR_ERR(pmu_data->pmu_regmap);
> + }
> +
> + exynos_pmu_init();
> +
> return 0;
> +};
> +
> +static int __init exynos_pmu_of_init(void)
> +{
> + int ret = 0;
> + struct device_node *np;
> +
> + for_each_matching_node_and_match(np, exynos_pmu_of_device_ids, NULL)
> + ret = exynos_pmu_probe(np);
I wouldn't expect more than one PMU in the system, so probably a simple
for_each_matching_node_and_match(np, exynos_pmu_of_device_ids...
return exynos_pmu_probe(np);
return -ENODEV;
would be enough here.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 10/10] ARM: EXYNOS: Add device tree based initialization support for PMU.
@ 2014-04-25 22:40 ` Tomasz Figa
0 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 22:40 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On 25.04.2014 14:32, Pankaj Dubey wrote:
> This patch adds device tree based initialization for PMU and modifies
> PMU initialization implementation in following way:
>
> 1: Let's initialize PMU based on device tree compatibility string.
> 2: Obtain PMU regmap handle using "syscon_early_regmap_lookup_by_phandle"
> so that we can reduce dependency over machine header files.
> 3: Separate each SoC's PMU initialization function and bind this initialization
> function with PMU compatibility string.
> 4 : It also removes uses of soc_is_exynosXXXX() thus making PMU implementation
> independent of "plat/cpu.h".
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
> ---
> arch/arm/mach-exynos/pmu.c | 182 +++++++++++++++++++++++++++++++++-----------
> 1 file changed, 138 insertions(+), 44 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
> index 67116a5..abcf753 100644
> --- a/arch/arm/mach-exynos/pmu.c
> +++ b/arch/arm/mach-exynos/pmu.c
> @@ -9,17 +9,31 @@
> * published by the Free Software Foundation.
> */
>
> -#include <linux/io.h>
> #include <linux/kernel.h>
> #include <linux/regmap.h>
> -
> -#include <plat/cpu.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/mfd/syscon.h>
>
> #include "common.h"
> #include "regs-pmu.h"
>
> +enum exynos_pmu_id {
> + PMU_EXYNOS4210,
> + PMU_EXYNOS4X12,
> + PMU_EXYNOS4412,
> + PMU_EXYNOS5250,
> +};
> +
> +struct exynos_pmu_data {
> + enum exynos_pmu_id pmu_id;
> + struct regmap *pmu_regmap;
Again, since this uses the PMU node directly and doesn't seem to access
any registers shared with other drivers (or at least not at the time
most the functions from this file are called) I don't think there is any
reason why not to use of_iomap() and access the registers directly.
What about adding more fields to this struct? For example .pmu_config,
.pmu_config_extra (for model-specific settings, like for Exynos4412, see
my comment below) and (*pmu_init)? Of course the regmap (or base
address) would have to be moved outside, as it isn't const data.
Then for each PMU variant there would be a static const struct will all
those fields already filled in and entries in OF match table would
already point to appropriate structure.
> +};
> +
> +struct exynos_pmu_data *pmu_data;
> static const struct exynos_pmu_conf *exynos_pmu_config;
> -static struct regmap *pmu_regmap;
> +typedef void (*exynos_pmu_init_t)(void);
>
> static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
> /* { .reg = address, .val = { AFTR, LPA, SLEEP } */
> @@ -348,28 +362,31 @@ static void exynos5_init_pmu(void)
> * Enable both SC_FEEDBACK and SC_COUNTER
> */
> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
> - regmap_read(pmu_regmap, exynos5_list_both_cnt_feed[i], &tmp);
> + regmap_read(pmu_data->pmu_regmap,
> + exynos5_list_both_cnt_feed[i], &tmp);
> tmp |= (EXYNOS5_USE_SC_FEEDBACK |
> EXYNOS5_USE_SC_COUNTER);
> - regmap_write(pmu_regmap, exynos5_list_both_cnt_feed[i], tmp);
> + regmap_write(pmu_data->pmu_regmap,
> + exynos5_list_both_cnt_feed[i], tmp);
> }
>
> /*
> * SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
> */
> - regmap_read(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
> tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
> - regmap_write(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
>
> /*
> * Disable WFI/WFE on XXX_OPTION
> */
> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
> - tmp = regmap_read(pmu_regmap, exynos5_list_diable_wfi_wfe[i],
> - &tmp);
> + tmp = regmap_read(pmu_data->pmu_regmap,
> + exynos5_list_diable_wfi_wfe[i], &tmp);
> tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
> EXYNOS5_OPTION_USE_STANDBYWFI);
> - regmap_write(pmu_regmap, exynos5_list_diable_wfi_wfe[i], tmp);
> + regmap_write(pmu_data->pmu_regmap,
> + exynos5_list_diable_wfi_wfe[i], tmp);
> }
> }
>
> @@ -377,52 +394,129 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
> {
> unsigned int i;
>
> - if (soc_is_exynos5250())
> + if (pmu_data->pmu_id == PMU_EXYNOS5250)
> exynos5_init_pmu();
Next field could be added to exynos_pmu_data struct, called
(*powerdown_conf) and then the code above replaced with:
if (pmu_data->powerdown_conf)
pmu_data->powerdown_conf(mode);
>
> for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
> - regmap_write(pmu_regmap, exynos_pmu_config[i].offset,
> + regmap_write(pmu_data->pmu_regmap, exynos_pmu_config[i].offset,
> exynos_pmu_config[i].val[mode]);
>
> - if (soc_is_exynos4412()) {
> + if (pmu_data->pmu_id == PMU_EXYNOS4412) {
> for (i = 0; exynos4412_pmu_config[i].offset != PMU_TABLE_END; i++)
> - regmap_write(pmu_regmap, exynos4412_pmu_config[i].offset,
> + regmap_write(pmu_data->pmu_regmap,
> + exynos4412_pmu_config[i].offset,
> exynos4412_pmu_config[i].val[mode]);
> }
As I mentioned above, the pmu_data struct could have a field called
pmu_config_extra that would be non-NULL for Exynos4412 and then the code
above could be replaced with:
if (pmu_data->pmu_config_extra) {
// iterate over pmu_config_extra
// ...
}
This way you could completely remove the pmu_id field and checks for
particular SoCs from the code.
> }
>
> -static int __init exynos_pmu_init(void)
> +static void exynos4210_pmu_init(void)
> {
> - unsigned int value;
> -
> exynos_pmu_config = exynos4210_pmu_config;
> - pmu_regmap = get_exynos_pmuregmap();
> -
> - if (soc_is_exynos4210()) {
> - exynos_pmu_config = exynos4210_pmu_config;
> - pr_info("EXYNOS4210 PMU Initialize\n");
> - } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
> - exynos_pmu_config = exynos4x12_pmu_config;
> - pr_info("EXYNOS4x12 PMU Initialize\n");
> - } else if (soc_is_exynos5250()) {
> - /*
> - * When SYS_WDTRESET is set, watchdog timer reset request
> - * is ignored by power management unit.
> - */
> - regmap_read(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, &value);
> - value &= ~EXYNOS5_SYS_WDTRESET;
> - regmap_write(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, value);
> -
> - regmap_read(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, &value);
> - value &= ~EXYNOS5_SYS_WDTRESET;
> - regmap_write(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, value);
> -
> - exynos_pmu_config = exynos5250_pmu_config;
> - pr_info("EXYNOS5250 PMU Initialize\n");
> - } else {
> - pr_info("EXYNOS: PMU not supported\n");
> + pmu_data->pmu_id = PMU_EXYNOS4210;
> +
> + pr_info("EXYNOS4210 PMU Initialize\n");
> +}
> +
> +static void exynos4x12_pmu_init(void)
> +{
> + exynos_pmu_config = exynos4x12_pmu_config;
> + pmu_data->pmu_id = PMU_EXYNOS4X12;
> +
> + pr_info("EXYNOS4x12 PMU Initialize\n");
> +}
> +
> +static void exynos4412_pmu_init(void)
> +{
> + exynos_pmu_config = exynos4x12_pmu_config;
> + pmu_data->pmu_id = PMU_EXYNOS4412;
> +
> + pr_info("EXYNOS4412 PMU Initialize\n");
> +}
> +
> +static void exynos5250_pmu_init(void)
> +{
> + unsigned int tmp;
> +
> + /*
> + * When SYS_WDTRESET is set, watchdog timer reset request
> + * is ignored by power management unit.
> + */
> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, &tmp);
> + tmp &= ~EXYNOS5_SYS_WDTRESET;
> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE, tmp);
> +
> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, &tmp);
> + tmp &= ~EXYNOS5_SYS_WDTRESET;
> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, tmp);
> +
> + exynos_pmu_config = exynos5250_pmu_config;
> + pmu_data->pmu_id = PMU_EXYNOS5250;
> +
> + pr_info("EXYNOS5250 PMU Initialize\n");
> +}
This part is very nice. Finally there is no huge if with else if clause
for every SoC. Thanks.
> +
> +/*
> + * PMU platform driver and devicetree bindings.
> + */
> +static struct of_device_id exynos_pmu_of_device_ids[] = {
> + {
> + .compatible = "samsung,exynos4210-pmu",
> + .data = (void *)exynos4210_pmu_init
> + },
> + {
> + .compatible = "samsung,exynos4212-pmu",
> + .data = (void *)exynos4x12_pmu_init
> + },
> + {
> + .compatible = "samsung,exynos4412-pmu",
> + .data = (void *)exynos4412_pmu_init
> + },
> + {
> + .compatible = "samsung,exynos5250-pmu",
> + .data = (void *)exynos5250_pmu_init
> + },
> + {},
> +};
> +
> +static int exynos_pmu_probe(struct device_node *np)
> +{
> + const struct of_device_id *match;
> + exynos_pmu_init_t exynos_pmu_init;
> +
> + pmu_data = kzalloc(sizeof(struct exynos_pmu_data), GFP_KERNEL);
> + if (!pmu_data) {
> + pr_err("exynos_pmu driver probe failed\n");
> + return -ENOMEM;
> }
>
> + match = of_match_node(exynos_pmu_of_device_ids, np);
> + if (!match) {
> + pr_err("fail to get matching of_match struct\n");
> + return -EINVAL;
> + }
> +
> + exynos_pmu_init = match->data;
> +
> + pmu_data->pmu_regmap = syscon_early_regmap_lookup_by_phandle(np,
> + "samsung,syscon-phandle");
> + if (IS_ERR(pmu_data->pmu_regmap)) {
> + pr_err("failed to find exynos_pmu_regmap\n");
> + return PTR_ERR(pmu_data->pmu_regmap);
> + }
> +
> + exynos_pmu_init();
> +
> return 0;
> +};
> +
> +static int __init exynos_pmu_of_init(void)
> +{
> + int ret = 0;
> + struct device_node *np;
> +
> + for_each_matching_node_and_match(np, exynos_pmu_of_device_ids, NULL)
> + ret = exynos_pmu_probe(np);
I wouldn't expect more than one PMU in the system, so probably a simple
for_each_matching_node_and_match(np, exynos_pmu_of_device_ids...
return exynos_pmu_probe(np);
return -ENODEV;
would be enough here.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 00/10] ARM: Exynos: PMU cleanup and refactoring for using DT
2014-04-25 12:32 ` Pankaj Dubey
@ 2014-04-25 22:43 ` Tomasz Figa
-1 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 22:43 UTC (permalink / raw)
To: Pankaj Dubey, linux-samsung-soc, linux-kernel, linux-arm-kernel
Cc: kgene.kim, linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
Hi Pankaj,
Just a small note - please refrain from sending next versions of series
in reply to previous version. With threading applied, it gets hard to
notice that a new version was posted, because the first message of the
thread is always v1. Also it makes threads unnecessarily long.
Best regards,
Tomasz
On 25.04.2014 14:32, Pankaj Dubey wrote:
> This patch series, does some minor cleanup and modifies Exynos PMU related
> code for mapping and initialization of Exynos Power Management Unit (PMU)
> base address from device tree. This is also preparation for moving PMU
> related code out of machine folder and moving into a "drivers/mfd", so that
> ARM64 based SoC can utilize common piece of code. These patches require change
> in Exynos4210, Exynos4212 and Exynos4412 dtsi files, which has been posted
> as separate patch series [2]
>
> These patches are created on top of Kukjin Kim's for-next (v3.15-rc1 tag)
> branch.
>
> These patches depends on following two patch series:
> 1) mfd: syscon: Support early initialization
> https://lkml.org/lkml/2014/4/8/239
> 2) Add PMU node for Exynos SoCs
> http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg29329.html
>
> We have tested these patches on SMDK5250 and Arndale (Exynos5250) boards for
> System boot and PMU initialization and S2R.
>
> For testing on Arndale (Exynos5250) board:
> Tested-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>
> Changes Since v1:
> - Rebased on latest for-next of Kukjin Kim's tree.
> - Added patch: "Make exynos machine_ops as static".
> For making more cleanup in "mach-exynos/common.h"
> as suggested by Tomasz Figa.
> - Addressed comments of Tomasz Figa for cleaning "mach-exynos/common.h".
> - Updated patch: Remove file path from comment section
> As suggested by Michel Simek, instead of updating file path
> lets remove them from each file under "mach-exynos".
> Even though Kukjin pointed out that there is similar patch pending from
> Sachin/Tushar but since I could not find I have included this here. If
> I have missed something please point to any existing such patch.
> - Updated patch: Add support for mapping PMU base address via DT
> - Removed __initdata from declaration of "exynos_pmu_base", as it caused
> kernel crash as pointed out by Vikas Sajjan.
> - Added support for Syscon initialization and getting PMU regmap handle
> as suggested by Sylwester. Since current implementation of early
> intialization [1] has limitation that "early_syscon_init" requires
> DT to be unflattened and system should be able to allocate memory,
> we can't use regmap handles for platsmp.c file as "smp_secondary_init"
> will be called before DT unflattening. So I have kept both method for
> accessing PMU base address. platsmp.c will use ioremmaped address where
> as rest other files can use regmap handle.
> - Added patch: Remove "linux/bug.h" from pmu.c.
> - Updated patch: Refactored code for PMU register mapping via DT
> - Modified to use regmap_read/write when using regmap handle.
> - Added patch: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c
> - Added patch: Add device tree based initialization support for PMU.
> - Convert existing PMU implementation to be a device tree based
> before moving it to "drivers/mfd" folder. As suggested by Bartlomiej.
> - Dropped making a platform_driver for PMU, as currently PMU binding
> has two compatibility strings as "samsung, exynosxxx-pmu", "syscon",
> once we enable MFD_SYSCON config option, current "syscon" driver probe
> gets called and PMU probe never gets called. So modified PMU
> initialization code to scan DT and match against supported compatiblity
> string in driver code, and once we get matching node use that for
> accessing PMU regmap handle using "syscon_early_regmap_lookup_by_phandle".
> If there is any better solution please suggest.
>
> Pankaj Dubey (6):
> ARM: EXYNOS: Make exynos machine_ops as static
> ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
> ARM: EXYNOS: Remove file path from comment section
> ARM: EXYNOS: Refactored code for using PMU address via DT
> ARM: EXYNOS: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c
> ARM: EXYNOS: Add device tree based initialization support for PMU.
>
> Young-Gun Jang (4):
> ARM: EXYNOS: Move SYSREG definition into sys-reg specific file.
> ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
> ARM: EXYNOS: Add support for mapping PMU base address via DT
> ARM: EXYNOS: Remove "linux/bug.h" from pmu.c
>
> arch/arm/mach-exynos/Kconfig | 2 +
> arch/arm/mach-exynos/common.h | 13 +-
> arch/arm/mach-exynos/cpuidle.c | 37 +-
> arch/arm/mach-exynos/exynos.c | 104 +++++-
> arch/arm/mach-exynos/headsmp.S | 2 -
> arch/arm/mach-exynos/hotplug.c | 7 +-
> arch/arm/mach-exynos/include/mach/map.h | 3 -
> arch/arm/mach-exynos/include/mach/memory.h | 3 +-
> arch/arm/mach-exynos/platsmp.c | 17 +-
> arch/arm/mach-exynos/pm.c | 61 ++--
> arch/arm/mach-exynos/pm_domains.c | 2 +-
> arch/arm/mach-exynos/pmu.c | 191 ++++++++---
> arch/arm/mach-exynos/regs-pmu.h | 512 ++++++++++++++--------------
> arch/arm/mach-exynos/regs-sys.h | 22 ++
> 14 files changed, 585 insertions(+), 391 deletions(-)
> create mode 100644 arch/arm/mach-exynos/regs-sys.h
>
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 00/10] ARM: Exynos: PMU cleanup and refactoring for using DT
@ 2014-04-25 22:43 ` Tomasz Figa
0 siblings, 0 replies; 110+ messages in thread
From: Tomasz Figa @ 2014-04-25 22:43 UTC (permalink / raw)
To: linux-arm-kernel
Hi Pankaj,
Just a small note - please refrain from sending next versions of series
in reply to previous version. With threading applied, it gets hard to
notice that a new version was posted, because the first message of the
thread is always v1. Also it makes threads unnecessarily long.
Best regards,
Tomasz
On 25.04.2014 14:32, Pankaj Dubey wrote:
> This patch series, does some minor cleanup and modifies Exynos PMU related
> code for mapping and initialization of Exynos Power Management Unit (PMU)
> base address from device tree. This is also preparation for moving PMU
> related code out of machine folder and moving into a "drivers/mfd", so that
> ARM64 based SoC can utilize common piece of code. These patches require change
> in Exynos4210, Exynos4212 and Exynos4412 dtsi files, which has been posted
> as separate patch series [2]
>
> These patches are created on top of Kukjin Kim's for-next (v3.15-rc1 tag)
> branch.
>
> These patches depends on following two patch series:
> 1) mfd: syscon: Support early initialization
> https://lkml.org/lkml/2014/4/8/239
> 2) Add PMU node for Exynos SoCs
> http://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg29329.html
>
> We have tested these patches on SMDK5250 and Arndale (Exynos5250) boards for
> System boot and PMU initialization and S2R.
>
> For testing on Arndale (Exynos5250) board:
> Tested-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>
> Changes Since v1:
> - Rebased on latest for-next of Kukjin Kim's tree.
> - Added patch: "Make exynos machine_ops as static".
> For making more cleanup in "mach-exynos/common.h"
> as suggested by Tomasz Figa.
> - Addressed comments of Tomasz Figa for cleaning "mach-exynos/common.h".
> - Updated patch: Remove file path from comment section
> As suggested by Michel Simek, instead of updating file path
> lets remove them from each file under "mach-exynos".
> Even though Kukjin pointed out that there is similar patch pending from
> Sachin/Tushar but since I could not find I have included this here. If
> I have missed something please point to any existing such patch.
> - Updated patch: Add support for mapping PMU base address via DT
> - Removed __initdata from declaration of "exynos_pmu_base", as it caused
> kernel crash as pointed out by Vikas Sajjan.
> - Added support for Syscon initialization and getting PMU regmap handle
> as suggested by Sylwester. Since current implementation of early
> intialization [1] has limitation that "early_syscon_init" requires
> DT to be unflattened and system should be able to allocate memory,
> we can't use regmap handles for platsmp.c file as "smp_secondary_init"
> will be called before DT unflattening. So I have kept both method for
> accessing PMU base address. platsmp.c will use ioremmaped address where
> as rest other files can use regmap handle.
> - Added patch: Remove "linux/bug.h" from pmu.c.
> - Updated patch: Refactored code for PMU register mapping via DT
> - Modified to use regmap_read/write when using regmap handle.
> - Added patch: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c
> - Added patch: Add device tree based initialization support for PMU.
> - Convert existing PMU implementation to be a device tree based
> before moving it to "drivers/mfd" folder. As suggested by Bartlomiej.
> - Dropped making a platform_driver for PMU, as currently PMU binding
> has two compatibility strings as "samsung, exynosxxx-pmu", "syscon",
> once we enable MFD_SYSCON config option, current "syscon" driver probe
> gets called and PMU probe never gets called. So modified PMU
> initialization code to scan DT and match against supported compatiblity
> string in driver code, and once we get matching node use that for
> accessing PMU regmap handle using "syscon_early_regmap_lookup_by_phandle".
> If there is any better solution please suggest.
>
> Pankaj Dubey (6):
> ARM: EXYNOS: Make exynos machine_ops as static
> ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
> ARM: EXYNOS: Remove file path from comment section
> ARM: EXYNOS: Refactored code for using PMU address via DT
> ARM: EXYNOS: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c
> ARM: EXYNOS: Add device tree based initialization support for PMU.
>
> Young-Gun Jang (4):
> ARM: EXYNOS: Move SYSREG definition into sys-reg specific file.
> ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
> ARM: EXYNOS: Add support for mapping PMU base address via DT
> ARM: EXYNOS: Remove "linux/bug.h" from pmu.c
>
> arch/arm/mach-exynos/Kconfig | 2 +
> arch/arm/mach-exynos/common.h | 13 +-
> arch/arm/mach-exynos/cpuidle.c | 37 +-
> arch/arm/mach-exynos/exynos.c | 104 +++++-
> arch/arm/mach-exynos/headsmp.S | 2 -
> arch/arm/mach-exynos/hotplug.c | 7 +-
> arch/arm/mach-exynos/include/mach/map.h | 3 -
> arch/arm/mach-exynos/include/mach/memory.h | 3 +-
> arch/arm/mach-exynos/platsmp.c | 17 +-
> arch/arm/mach-exynos/pm.c | 61 ++--
> arch/arm/mach-exynos/pm_domains.c | 2 +-
> arch/arm/mach-exynos/pmu.c | 191 ++++++++---
> arch/arm/mach-exynos/regs-pmu.h | 512 ++++++++++++++--------------
> arch/arm/mach-exynos/regs-sys.h | 22 ++
> 14 files changed, 585 insertions(+), 391 deletions(-)
> create mode 100644 arch/arm/mach-exynos/regs-sys.h
>
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 00/10] ARM: Exynos: PMU cleanup and refactoring for using DT
2014-04-25 22:43 ` Tomasz Figa
@ 2014-04-26 2:07 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-26 2:07 UTC (permalink / raw)
To: Tomasz Figa
Cc: linux-samsung-soc, linux-kernel, linux-arm-kernel, kgene.kim,
linux, Tomasz Figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
Hi Tomasz,
On Sat, Apr 26, 2014 at 7:43 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
>
> Hi Pankaj,
>
> Just a small note - please refrain from sending next versions of series in reply to previous version. With threading applied, it gets hard to notice that a new version was posted, because the first message of the thread is always v1. Also it makes threads unnecessarily long.
>
OK. I will take care in future.
>
> Best regards,
> Tomasz
>
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>>
>> This patch series, does some minor cleanup and modifies Exynos PMU related
>> code for mapping and initialization of Exynos Power Management Unit (PMU)
>> base address from device tree. This is also preparation for moving PMU
>> related code out of machine folder and moving into a "drivers/mfd", so that
>> ARM64 based SoC can utilize common piece of code. These patches require change
>> in Exynos4210, Exynos4212 and Exynos4412 dtsi files, which has been posted
>> as separate patch series [2]
>>
>> These patches are created on top of Kukjin Kim's for-next (v3.15-rc1 tag)
>> branch.
>>
>> These patches depends on following two patch series:
>> 1) mfd: syscon: Support early initialization
>> https://lkml.org/lkml/2014/4/8/239
>> 2) Add PMU node for Exynos SoCs
>> http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg29329.html
>>
>> We have tested these patches on SMDK5250 and Arndale (Exynos5250) boards for
>> System boot and PMU initialization and S2R.
>>
>> For testing on Arndale (Exynos5250) board:
>> Tested-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>>
>> Changes Since v1:
>> - Rebased on latest for-next of Kukjin Kim's tree.
>> - Added patch: "Make exynos machine_ops as static".
>> For making more cleanup in "mach-exynos/common.h"
>> as suggested by Tomasz Figa.
>> - Addressed comments of Tomasz Figa for cleaning "mach-exynos/common.h".
>> - Updated patch: Remove file path from comment section
>> As suggested by Michel Simek, instead of updating file path
>> lets remove them from each file under "mach-exynos".
>> Even though Kukjin pointed out that there is similar patch pending from
>> Sachin/Tushar but since I could not find I have included this here. If
>> I have missed something please point to any existing such patch.
>> - Updated patch: Add support for mapping PMU base address via DT
>> - Removed __initdata from declaration of "exynos_pmu_base", as it caused
>> kernel crash as pointed out by Vikas Sajjan.
>> - Added support for Syscon initialization and getting PMU regmap handle
>> as suggested by Sylwester. Since current implementation of early
>> intialization [1] has limitation that "early_syscon_init" requires
>> DT to be unflattened and system should be able to allocate memory,
>> we can't use regmap handles for platsmp.c file as "smp_secondary_init"
>> will be called before DT unflattening. So I have kept both method for
>> accessing PMU base address. platsmp.c will use ioremmaped address where
>> as rest other files can use regmap handle.
>> - Added patch: Remove "linux/bug.h" from pmu.c.
>> - Updated patch: Refactored code for PMU register mapping via DT
>> - Modified to use regmap_read/write when using regmap handle.
>> - Added patch: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c
>> - Added patch: Add device tree based initialization support for PMU.
>> - Convert existing PMU implementation to be a device tree based
>> before moving it to "drivers/mfd" folder. As suggested by Bartlomiej.
>> - Dropped making a platform_driver for PMU, as currently PMU binding
>> has two compatibility strings as "samsung, exynosxxx-pmu", "syscon",
>> once we enable MFD_SYSCON config option, current "syscon" driver probe
>> gets called and PMU probe never gets called. So modified PMU
>> initialization code to scan DT and match against supported compatiblity
>> string in driver code, and once we get matching node use that for
>> accessing PMU regmap handle using "syscon_early_regmap_lookup_by_phandle".
>> If there is any better solution please suggest.
>>
>> Pankaj Dubey (6):
>> ARM: EXYNOS: Make exynos machine_ops as static
>> ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
>> ARM: EXYNOS: Remove file path from comment section
>> ARM: EXYNOS: Refactored code for using PMU address via DT
>> ARM: EXYNOS: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c
>> ARM: EXYNOS: Add device tree based initialization support for PMU.
>>
>> Young-Gun Jang (4):
>> ARM: EXYNOS: Move SYSREG definition into sys-reg specific file.
>> ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
>> ARM: EXYNOS: Add support for mapping PMU base address via DT
>> ARM: EXYNOS: Remove "linux/bug.h" from pmu.c
>>
>> arch/arm/mach-exynos/Kconfig | 2 +
>> arch/arm/mach-exynos/common.h | 13 +-
>> arch/arm/mach-exynos/cpuidle.c | 37 +-
>> arch/arm/mach-exynos/exynos.c | 104 +++++-
>> arch/arm/mach-exynos/headsmp.S | 2 -
>> arch/arm/mach-exynos/hotplug.c | 7 +-
>> arch/arm/mach-exynos/include/mach/map.h | 3 -
>> arch/arm/mach-exynos/include/mach/memory.h | 3 +-
>> arch/arm/mach-exynos/platsmp.c | 17 +-
>> arch/arm/mach-exynos/pm.c | 61 ++--
>> arch/arm/mach-exynos/pm_domains.c | 2 +-
>> arch/arm/mach-exynos/pmu.c | 191 ++++++++---
>> arch/arm/mach-exynos/regs-pmu.h | 512 ++++++++++++++--------------
>> arch/arm/mach-exynos/regs-sys.h | 22 ++
>> 14 files changed, 585 insertions(+), 391 deletions(-)
>> create mode 100644 arch/arm/mach-exynos/regs-sys.h
>>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 00/10] ARM: Exynos: PMU cleanup and refactoring for using DT
@ 2014-04-26 2:07 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-26 2:07 UTC (permalink / raw)
To: linux-arm-kernel
Hi Tomasz,
On Sat, Apr 26, 2014 at 7:43 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
>
> Hi Pankaj,
>
> Just a small note - please refrain from sending next versions of series in reply to previous version. With threading applied, it gets hard to notice that a new version was posted, because the first message of the thread is always v1. Also it makes threads unnecessarily long.
>
OK. I will take care in future.
>
> Best regards,
> Tomasz
>
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>>
>> This patch series, does some minor cleanup and modifies Exynos PMU related
>> code for mapping and initialization of Exynos Power Management Unit (PMU)
>> base address from device tree. This is also preparation for moving PMU
>> related code out of machine folder and moving into a "drivers/mfd", so that
>> ARM64 based SoC can utilize common piece of code. These patches require change
>> in Exynos4210, Exynos4212 and Exynos4412 dtsi files, which has been posted
>> as separate patch series [2]
>>
>> These patches are created on top of Kukjin Kim's for-next (v3.15-rc1 tag)
>> branch.
>>
>> These patches depends on following two patch series:
>> 1) mfd: syscon: Support early initialization
>> https://lkml.org/lkml/2014/4/8/239
>> 2) Add PMU node for Exynos SoCs
>> http://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg29329.html
>>
>> We have tested these patches on SMDK5250 and Arndale (Exynos5250) boards for
>> System boot and PMU initialization and S2R.
>>
>> For testing on Arndale (Exynos5250) board:
>> Tested-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>>
>> Changes Since v1:
>> - Rebased on latest for-next of Kukjin Kim's tree.
>> - Added patch: "Make exynos machine_ops as static".
>> For making more cleanup in "mach-exynos/common.h"
>> as suggested by Tomasz Figa.
>> - Addressed comments of Tomasz Figa for cleaning "mach-exynos/common.h".
>> - Updated patch: Remove file path from comment section
>> As suggested by Michel Simek, instead of updating file path
>> lets remove them from each file under "mach-exynos".
>> Even though Kukjin pointed out that there is similar patch pending from
>> Sachin/Tushar but since I could not find I have included this here. If
>> I have missed something please point to any existing such patch.
>> - Updated patch: Add support for mapping PMU base address via DT
>> - Removed __initdata from declaration of "exynos_pmu_base", as it caused
>> kernel crash as pointed out by Vikas Sajjan.
>> - Added support for Syscon initialization and getting PMU regmap handle
>> as suggested by Sylwester. Since current implementation of early
>> intialization [1] has limitation that "early_syscon_init" requires
>> DT to be unflattened and system should be able to allocate memory,
>> we can't use regmap handles for platsmp.c file as "smp_secondary_init"
>> will be called before DT unflattening. So I have kept both method for
>> accessing PMU base address. platsmp.c will use ioremmaped address where
>> as rest other files can use regmap handle.
>> - Added patch: Remove "linux/bug.h" from pmu.c.
>> - Updated patch: Refactored code for PMU register mapping via DT
>> - Modified to use regmap_read/write when using regmap handle.
>> - Added patch: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c
>> - Added patch: Add device tree based initialization support for PMU.
>> - Convert existing PMU implementation to be a device tree based
>> before moving it to "drivers/mfd" folder. As suggested by Bartlomiej.
>> - Dropped making a platform_driver for PMU, as currently PMU binding
>> has two compatibility strings as "samsung, exynosxxx-pmu", "syscon",
>> once we enable MFD_SYSCON config option, current "syscon" driver probe
>> gets called and PMU probe never gets called. So modified PMU
>> initialization code to scan DT and match against supported compatiblity
>> string in driver code, and once we get matching node use that for
>> accessing PMU regmap handle using "syscon_early_regmap_lookup_by_phandle".
>> If there is any better solution please suggest.
>>
>> Pankaj Dubey (6):
>> ARM: EXYNOS: Make exynos machine_ops as static
>> ARM: EXYNOS: Cleanup "mach-exynos/common.h" file
>> ARM: EXYNOS: Remove file path from comment section
>> ARM: EXYNOS: Refactored code for using PMU address via DT
>> ARM: EXYNOS: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c
>> ARM: EXYNOS: Add device tree based initialization support for PMU.
>>
>> Young-Gun Jang (4):
>> ARM: EXYNOS: Move SYSREG definition into sys-reg specific file.
>> ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
>> ARM: EXYNOS: Add support for mapping PMU base address via DT
>> ARM: EXYNOS: Remove "linux/bug.h" from pmu.c
>>
>> arch/arm/mach-exynos/Kconfig | 2 +
>> arch/arm/mach-exynos/common.h | 13 +-
>> arch/arm/mach-exynos/cpuidle.c | 37 +-
>> arch/arm/mach-exynos/exynos.c | 104 +++++-
>> arch/arm/mach-exynos/headsmp.S | 2 -
>> arch/arm/mach-exynos/hotplug.c | 7 +-
>> arch/arm/mach-exynos/include/mach/map.h | 3 -
>> arch/arm/mach-exynos/include/mach/memory.h | 3 +-
>> arch/arm/mach-exynos/platsmp.c | 17 +-
>> arch/arm/mach-exynos/pm.c | 61 ++--
>> arch/arm/mach-exynos/pm_domains.c | 2 +-
>> arch/arm/mach-exynos/pmu.c | 191 ++++++++---
>> arch/arm/mach-exynos/regs-pmu.h | 512 ++++++++++++++--------------
>> arch/arm/mach-exynos/regs-sys.h | 22 ++
>> 14 files changed, 585 insertions(+), 391 deletions(-)
>> create mode 100644 arch/arm/mach-exynos/regs-sys.h
>>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 08/10] ARM: EXYNOS: Refactored code for using PMU address via DT
2014-04-25 22:19 ` Tomasz Figa
@ 2014-04-26 3:32 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-26 3:32 UTC (permalink / raw)
To: Tomasz Figa
Cc: linux-samsung-soc, linux-kernel, linux-arm-kernel, kgene.kim,
linux, Tomasz Figa, chow.kim, yg1004.jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
Hi Tomasz,
Thanks for review.
On Sat, Apr 26, 2014 at 7:19 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Hi,
>
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>>
>> Under "arm/mach-exynos" many files are using PMU register offsets.
>> Since we have added support for accessing PMU base address via DT,
>> now we can remove PMU mapping from exynosX_iodesc.
>> Let's convert all these access using either of "get_exynos_pmuaddr"
>> or "get_exynos_regmap".
>> This will help us in removing static mapping of PMU base address
>> as well as help in reducing dependency over machine header files.
>> Thus helping for migration of PMU implementation from machine to driver
>> folder which can be reused for ARM64 bsed SoC.
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/common.h | 4 +-
>> arch/arm/mach-exynos/cpuidle.c | 37 ++-
>> arch/arm/mach-exynos/exynos.c | 19 +-
>> arch/arm/mach-exynos/hotplug.c | 4 +-
>> arch/arm/mach-exynos/include/mach/map.h | 3 -
>> arch/arm/mach-exynos/platsmp.c | 13 +-
>> arch/arm/mach-exynos/pm.c | 60 ++--
>> arch/arm/mach-exynos/pmu.c | 40 +--
>> arch/arm/mach-exynos/regs-pmu.h | 506
>> +++++++++++++++----------------
>> 9 files changed, 348 insertions(+), 338 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
>> index ecfd0fc..ad5128e 100644
>> --- a/arch/arm/mach-exynos/common.h
>> +++ b/arch/arm/mach-exynos/common.h
>> @@ -40,7 +40,7 @@ extern void exynos_cpu_die(unsigned int cpu);
>>
>> /* PMU(Power Management Unit) support */
>>
>> -#define PMU_TABLE_END NULL
>> +#define PMU_TABLE_END 0xFFFF
>
>
> IMHO (-1U) would be more appropriate.
>
OK.
>
>>
>> enum sys_powerdown {
>> SYS_AFTR,
>> @@ -51,7 +51,7 @@ enum sys_powerdown {
>>
>> extern unsigned long l2x0_regs_phys;
>> struct exynos_pmu_conf {
>> - void __iomem *reg;
>> + unsigned int offset;
>> unsigned int val[NUM_SYS_POWERDOWN];
>> };
>>
>> diff --git a/arch/arm/mach-exynos/cpuidle.c
>> b/arch/arm/mach-exynos/cpuidle.c
>> index c57cae0..5dcdd46 100644
>> --- a/arch/arm/mach-exynos/cpuidle.c
>> +++ b/arch/arm/mach-exynos/cpuidle.c
>> @@ -17,6 +17,7 @@
>> #include <linux/module.h>
>> #include <linux/time.h>
>> #include <linux/platform_device.h>
>> +#include <linux/regmap.h>
>>
>> #include <asm/proc-fns.h>
>> #include <asm/smp_scu.h>
>> @@ -34,10 +35,10 @@
>>
>> #define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
>> S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0
>> ? \
>> - (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
>> + 0x24 : S5P_INFORM0))
>> #define REG_DIRECTGO_FLAG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
>> S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0
>> ? \
>> - (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
>> + 0x20 : S5P_INFORM1))
>
>
> This patch seems to be based on old code, before Daniel Lezcano's Exynos
> cpuidle refactor [1] and it should be rebased on top of that series.
>
> [1] http://thread.gmane.org/gmane.linux.kernel.samsung-soc/29085
>
>
OK, I will rebase on top of it along with addressing all other review comments.
>>
>> #define S5P_CHECK_AFTR 0xFCBA0D10
>>
>> @@ -60,6 +61,8 @@
>> #define PWR_CTRL2_CORE2_UP_RATIO (1 << 4)
>> #define PWR_CTRL2_CORE1_UP_RATIO (1 << 0)
>>
>> +static struct regmap *pmu_regmap;
>> +
>> static int exynos4_enter_lowpower(struct cpuidle_device *dev,
>> struct cpuidle_driver *drv,
>> int index);
>> @@ -87,7 +90,7 @@ static struct cpuidle_driver exynos4_idle_driver = {
>> /* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
>> static void exynos4_set_wakeupmask(void)
>> {
>> - __raw_writel(0x0000ff3e, S5P_WAKEUP_MASK);
>> + regmap_write(pmu_regmap, S5P_WAKEUP_MASK, 0x0000ff3e);
>> }
>>
>> static unsigned int g_pwr_ctrl, g_diag_reg;
>> @@ -120,22 +123,28 @@ static int exynos4_enter_core0_aftr(struct
>> cpuidle_device *dev,
>> struct cpuidle_driver *drv,
>> int index)
>> {
>> - unsigned long tmp;
>> + unsigned int tmp;
>>
>> exynos4_set_wakeupmask();
>>
>> /* Set value of power down register for aftr mode */
>> exynos_sys_powerdown_conf(SYS_AFTR);
>> -
>> - __raw_writel(virt_to_phys(exynos_cpu_resume), REG_DIRECTGO_ADDR);
>> - __raw_writel(S5P_CHECK_AFTR, REG_DIRECTGO_FLAG);
>> -
>> +
>> + if (samsung_rev() == EXYNOS4210_REV_1_0) {
>> + __raw_writel(virt_to_phys(exynos_cpu_resume),
>> + S5P_VA_SYSRAM + REG_DIRECTGO_ADDR);
>> + __raw_writel(S5P_CHECK_AFTR, S5P_VA_SYSRAM +
>> REG_DIRECTGO_FLAG);
>> + } else {
>> + regmap_write(pmu_regmap, REG_DIRECTGO_ADDR,
>> + virt_to_phys(exynos_cpu_resume));
>> + regmap_write(pmu_regmap, REG_DIRECTGO_FLAG,
>> S5P_CHECK_AFTR);
>> + }
>
>
> This is quite ugly. I'd refactor this into a function pointer set once at
> initialization time depending on SoC type and create two functions for both
> cases.
>
True. I also felt it's getting ugly, but could not think of better
way. Thanks for suggestion let me check how better I can make this.
> In general, please also see my comments about this kind of code checking SoC
> type posted as a part of my review of Vikas' Exynos5260 PMU support series
> [2].
>
> [2] http://thread.gmane.org/gmane.linux.kernel.samsung-soc/28056/focus=29342
Sure.
>
>
>> save_cpu_arch_register();
>>
>> /* Setting Central Sequence Register for power down mode */
>> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
>> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
>> tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
>> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
>> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
>>
>> cpu_pm_enter();
>> cpu_suspend(0, idle_finisher);
>> @@ -154,14 +163,14 @@ static int exynos4_enter_core0_aftr(struct
>> cpuidle_device *dev,
>> * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
>> * in this situation.
>> */
>> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
>> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
>> if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
>> tmp |= S5P_CENTRAL_LOWPWR_CFG;
>> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
>> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION,
>> tmp);
>> }
>>
>> /* Clear wakeup state register */
>> - __raw_writel(0x0, S5P_WAKEUP_STAT);
>> + regmap_write(pmu_regmap, S5P_WAKEUP_STAT, 0x0);
>>
>> return index;
>> }
>> @@ -219,6 +228,8 @@ static int exynos_cpuidle_probe(struct platform_device
>> *pdev)
>> int cpu_id, ret;
>> struct cpuidle_device *device;
>>
>> + pmu_regmap = get_exynos_pmuregmap();
>
>
> Why couldn't you simply look for PMU node here and then call
> syscon_regmap_lookup_by_phandle()? (You will have to anyway, as Daniel's
> patches mentioned above move the driver to drivers/cpuidle and it is not
> possible to include headers and it is not allowed to include mach/ headers
> from drivers/.)
>
Once I rebase on top of Daniel's patches this change won't require any more.
>
>> +
>> if (soc_is_exynos5250())
>> exynos5_core_down_clk();
>>
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index 68f60e1..b01987e 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -20,6 +20,7 @@
>> #include <linux/platform_device.h>
>> #include <linux/pm_domain.h>
>> #include <linux/mfd/syscon.h>
>> +#include <linux/regmap.h>
>>
>> #include <asm/cacheflush.h>
>> #include <asm/hardware/cache-l2x0.h>
>> @@ -67,11 +68,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
>> .length = SZ_4K,
>> .type = MT_DEVICE,
>> }, {
>> - .virtual = (unsigned long)S5P_VA_PMU,
>> - .pfn = __phys_to_pfn(EXYNOS4_PA_PMU),
>> - .length = SZ_64K,
>> - .type = MT_DEVICE,
>> - }, {
>> .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
>> .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
>> .length = SZ_4K,
>> @@ -195,11 +191,6 @@ static struct map_desc exynos5_iodesc[] __initdata =
>> {
>> .pfn = __phys_to_pfn(EXYNOS5_PA_CMU),
>> .length = 144 * SZ_1K,
>> .type = MT_DEVICE,
>> - }, {
>> - .virtual = (unsigned long)S5P_VA_PMU,
>> - .pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
>> - .length = SZ_64K,
>> - .type = MT_DEVICE,
>> },
>> };
>>
>> @@ -207,7 +198,7 @@ static void exynos_restart(enum reboot_mode mode,
>> const char *cmd)
>> {
>> struct device_node *np;
>> u32 val = 0x1;
>> - void __iomem *addr = EXYNOS_SWRESET;
>> + void __iomem *addr = NULL;
>>
>> if (of_machine_is_compatible("samsung,exynos5440")) {
>> u32 status;
>> @@ -220,9 +211,9 @@ static void exynos_restart(enum reboot_mode mode,
>> const char *cmd)
>> val = __raw_readl(addr);
>>
>> val = (val & 0xffff0000) | (status & 0xffff);
>> - }
>> -
>> - __raw_writel(val, addr);
>> + __raw_writel(val, addr);
>> + } else
>> + regmap_write(exynos_pmu_regmap, EXYNOS_SWRESET, val);
>> }
>>
>> static struct platform_device exynos_cpuidle = {
>> diff --git a/arch/arm/mach-exynos/hotplug.c
>> b/arch/arm/mach-exynos/hotplug.c
>> index 73b0b5c..7831e64 100644
>> --- a/arch/arm/mach-exynos/hotplug.c
>> +++ b/arch/arm/mach-exynos/hotplug.c
>> @@ -13,6 +13,7 @@
>> #include <linux/errno.h>
>> #include <linux/smp.h>
>> #include <linux/io.h>
>> +#include <linux/regmap.h>
>>
>> #include <asm/cacheflush.h>
>> #include <asm/cp15.h>
>> @@ -91,11 +92,12 @@ static inline void cpu_leave_lowpower(void)
>>
>> static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
>> {
>> + struct regmap *pmu_base = get_exynos_pmuregmap();
>
>
> pmu_base is rather unfortunate name for a variable holding a pointer to a
> regmap, still...
OK, I will rename as "pmu_regmap".
>
>
>> for (;;) {
>>
>> /* make cpu1 to be turned off at next WFI command */
>> if (cpu == 1)
>> - __raw_writel(0, S5P_ARM_CORE1_CONFIGURATION);
>> + regmap_write(pmu_base,
>> S5P_ARM_CORE1_CONFIGURATION, 0);
>
>
> ...inside mach-exynos you could probably define exynos_pmu_write() that
> would call regmap_write() with exynos_pmu_regmap (after making it
> non-static) directly. This way the old code wouldn't have to care about the
> regmap at all, just __raw_writel() would be replaced with
> exynos_pmu_write().
>
OK, sounds good to me.
> OR
>
> In case of registers that are known to not need sharing between multiple
> drivers, the mapped area could be used directly. This would probably let you
> eliminate any regmap-specific code from mach-exynos.
>
In v1 patch [1], I just used ioremapped virtual address, but as
Sylwester suggested here [2], for using syscon mapped regmap handles
instead, to avoid ioremapping same PMU address once in "syscon" and
then in "exynos.c", and again in "pmu.c". I tried to adopt "early
syscon initialization" method [3] in this patch V2. But I observed one
issue in "early syscon initialization" that we can't use it before DT
is unflattened.
So I have three options now as:
1: Use only ioremapped address and drop regmap specific code as you
are suggesting, even though we will end up mapping same address range
in multiple files. Same was done in patch v1 [1].
2: Use only PMU regmap handles by using "early syscon initialization"
method [2], as suggested by Sylwester [3]. But as I mentioned due to
limitation of "early syscon" we can't call "early_syscon_init" before
device tree unflattens. So after exploring I have found one way to do
it, even though I am not sure will be be acceptable. Since we can't
delay "early_syscon_init" after machine_desc->init_time. As just after
that secondary core bootup starts and we need to access PMU registers
during that time in platsmp.c. I need to provide exynos_init_time in
machine_desc and call "early_syscon_init" along with "of_clk_init" and
"clock_source_init". I have verfied this and everything works fine
without any side-effect. Only concern is will it be acceptable to call
"early_syscon_init" from "exynos_time_init".
3: Use both ioremapped address (only used in platsmp.c) and PMU regmap
handle (used in all other exynos machine files), same has been
implemented in this patch V2. But as you suggested above I can reduce
changes by introducing "exynos_pmu_read/write".
Please let me know your opinion about this.
[1] : https://lkml.org/lkml/2014/4/2/50
[2] : https://lkml.org/lkml/2014/4/8/239
[3] : https://lkml.org/lkml/2014/4/2/171
>
>>
>> /*
>> * here's the WFI
>> diff --git a/arch/arm/mach-exynos/include/mach/map.h
>> b/arch/arm/mach-exynos/include/mach/map.h
>> index 7b046b5..1ba7fb5 100644
>> --- a/arch/arm/mach-exynos/include/mach/map.h
>> +++ b/arch/arm/mach-exynos/include/mach/map.h
>> @@ -35,9 +35,6 @@
>> #define EXYNOS4_PA_SYSCON 0x10010000
>> #define EXYNOS5_PA_SYSCON 0x10050100
>>
>> -#define EXYNOS4_PA_PMU 0x10020000
>> -#define EXYNOS5_PA_PMU 0x10040000
>> -
>> #define EXYNOS4_PA_CMU 0x10030000
>> #define EXYNOS5_PA_CMU 0x10010000
>>
>> diff --git a/arch/arm/mach-exynos/platsmp.c
>> b/arch/arm/mach-exynos/platsmp.c
>> index 29c2286..9ce4c9f9 100644
>> --- a/arch/arm/mach-exynos/platsmp.c
>> +++ b/arch/arm/mach-exynos/platsmp.c
>> @@ -31,11 +31,12 @@
>> #include "regs-pmu.h"
>>
>> extern void exynos4_secondary_startup(void);
>> +static void __iomem *pmu_base;
>>
>> static inline void __iomem *cpu_boot_reg_base(void)
>> {
>> if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
>> - return S5P_INFORM5;
>> + return pmu_base + S5P_INFORM5;
>> return S5P_VA_SYSRAM;
>> }
>>
>> @@ -106,14 +107,14 @@ static int exynos_boot_secondary(unsigned int cpu,
>> struct task_struct *idle)
>> */
>> write_pen_release(phys_cpu);
>>
>> - if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN))
>> {
>> + if (!(__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
>> + & S5P_CORE_LOCAL_PWR_EN)) {
>> __raw_writel(S5P_CORE_LOCAL_PWR_EN,
>> - S5P_ARM_CORE1_CONFIGURATION);
>> -
>> + pmu_base + S5P_ARM_CORE1_CONFIGURATION);
>> timeout = 10;
>>
>> /* wait max 10 ms until cpu1 is on */
>> - while ((__raw_readl(S5P_ARM_CORE1_STATUS)
>> + while ((__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
>> & S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN)
>> {
>> if (timeout-- == 0)
>> break;
>> @@ -201,6 +202,8 @@ static void __init exynos_smp_prepare_cpus(unsigned
>> int max_cpus)
>> {
>> int i;
>>
>> + pmu_base = get_exynos_pmuaddr();
>> +
>> if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
>> scu_enable(scu_base_addr());
>>
>> diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
>> index 723c988..e4c10d4 100644
>> --- a/arch/arm/mach-exynos/pm.c
>> +++ b/arch/arm/mach-exynos/pm.c
>> @@ -20,6 +20,7 @@
>> #include <linux/irqchip/arm-gic.h>
>> #include <linux/err.h>
>> #include <linux/clk.h>
>> +#include <linux/regmap.h>
>>
>> #include <asm/cacheflush.h>
>> #include <asm/hardware/cache-l2x0.h>
>> @@ -37,6 +38,8 @@
>> #include "regs-pmu.h"
>> #include "regs-sys.h"
>>
>> +static struct regmap *pmu_regmap;
>> +
>> /**
>> * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
>> * @hwirq: Hardware IRQ signal of the GIC
>> @@ -125,43 +128,44 @@ static void exynos_pm_prepare(void)
>> unsigned int tmp;
>>
>> /* Set wake-up mask registers */
>> - __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
>> - __raw_writel(exynos_irqwake_intmask & ~(1 << 31),
>> S5P_WAKEUP_MASK);
>> + regmap_write(pmu_regmap, S5P_EINT_WAKEUP_MASK,
>> + exynos_get_eint_wake_mask());
>> + regmap_write(pmu_regmap, S5P_WAKEUP_MASK,
>> + exynos_irqwake_intmask & ~(1 << 31));
>>
>> s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
>>
>> if (soc_is_exynos5250()) {
>> s3c_pm_do_save(exynos5_sys_save,
>> ARRAY_SIZE(exynos5_sys_save));
>> /* Disable USE_RETENTION of JPEG_MEM_OPTION */
>> - tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
>> + regmap_read(pmu_regmap, EXYNOS5_JPEG_MEM_OPTION, &tmp);
>> tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
>> - __raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION);
>> + regmap_write(pmu_regmap, EXYNOS5_JPEG_MEM_OPTION, tmp);
>> }
>>
>> /* Set value of power down register for sleep mode */
>>
>> exynos_sys_powerdown_conf(SYS_SLEEP);
>> - __raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1);
>> + regmap_write(pmu_regmap, S5P_INFORM1, S5P_CHECK_SLEEP);
>>
>> /* ensure at least INFORM0 has the resume address */
>>
>> - __raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
>> + regmap_write(pmu_regmap, S5P_INFORM0,
>> virt_to_phys(exynos_cpu_resume));
>> }
>>
>> static int exynos_pm_suspend(void)
>> {
>> - unsigned long tmp;
>> + unsigned int tmp;
>>
>> /* Setting Central Sequence Register for power down mode */
>>
>> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
>> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
>> tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
>> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
>> -
>> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
>> /* Setting SEQ_OPTION register */
>>
>> tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
>> - __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
>> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_OPTION, tmp);
>>
>> if (!soc_is_exynos5250()) {
>> /* Save Power control register */
>> @@ -180,7 +184,7 @@ static int exynos_pm_suspend(void)
>>
>> static void exynos_pm_resume(void)
>> {
>> - unsigned long tmp;
>> + unsigned int tmp;
>>
>> /*
>> * If PMU failed while entering sleep mode, WFI will be
>> @@ -188,12 +192,12 @@ static void exynos_pm_resume(void)
>> * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
>> * in this situation.
>> */
>> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
>> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
>> if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
>> tmp |= S5P_CENTRAL_LOWPWR_CFG;
>> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
>> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION,
>> tmp);
>> /* clear the wakeup state register */
>> - __raw_writel(0x0, S5P_WAKEUP_STAT);
>> + regmap_write(pmu_regmap, S5P_WAKEUP_STAT, 0x0);
>> /* No need to perform below restore code */
>> goto early_wakeup;
>> }
>> @@ -213,13 +217,13 @@ static void exynos_pm_resume(void)
>>
>> /* For release retention */
>>
>> - __raw_writel((1 << 28), S5P_PAD_RET_MAUDIO_OPTION);
>> - __raw_writel((1 << 28), S5P_PAD_RET_GPIO_OPTION);
>> - __raw_writel((1 << 28), S5P_PAD_RET_UART_OPTION);
>> - __raw_writel((1 << 28), S5P_PAD_RET_MMCA_OPTION);
>> - __raw_writel((1 << 28), S5P_PAD_RET_MMCB_OPTION);
>> - __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
>> - __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
>> + regmap_write(pmu_regmap, S5P_PAD_RET_MAUDIO_OPTION, (1 << 28));
>> + regmap_write(pmu_regmap, S5P_PAD_RET_GPIO_OPTION, (1 << 28));
>> + regmap_write(pmu_regmap, S5P_PAD_RET_UART_OPTION, (1 << 28));
>> + regmap_write(pmu_regmap, S5P_PAD_RET_MMCA_OPTION, (1 << 28));
>> + regmap_write(pmu_regmap, S5P_PAD_RET_MMCB_OPTION, (1 << 28));
>> + regmap_write(pmu_regmap, S5P_PAD_RET_EBIA_OPTION, (1 << 28));
>> + regmap_write(pmu_regmap, S5P_PAD_RET_EBIB_OPTION, (1 << 28));
>>
>> if (soc_is_exynos5250())
>> s3c_pm_do_restore(exynos5_sys_save,
>> @@ -233,7 +237,7 @@ static void exynos_pm_resume(void)
>> early_wakeup:
>>
>> /* Clear SLEEP mode set in INFORM1 */
>> - __raw_writel(0x0, S5P_INFORM1);
>> + regmap_write(pmu_regmap, S5P_INFORM1, 0x0);
>>
>> return;
>> }
>> @@ -276,8 +280,8 @@ static int exynos_suspend_enter(suspend_state_t state)
>>
>> s3c_pm_restore_uarts();
>>
>> - S3C_PMDBG("%s: wakeup stat: %08x\n", __func__,
>> - __raw_readl(S5P_WAKEUP_STAT));
>> + regmap_read(pmu_regmap, S5P_WAKEUP_STAT, &ret);
>> + S3C_PMDBG("%s: wakeup stat: %08x\n", __func__, ret);
>>
>> s3c_pm_check_restore();
>>
>> @@ -308,14 +312,14 @@ static const struct platform_suspend_ops
>> exynos_suspend_ops = {
>> void __init exynos_pm_init(void)
>> {
>> u32 tmp;
>> -
>> + pmu_regmap = get_exynos_pmuregmap();
>> /* Platform-specific GIC callback */
>> gic_arch_extn.irq_set_wake = exynos_irq_set_wake;
>>
>> /* All wakeup disable */
>> - tmp = __raw_readl(S5P_WAKEUP_MASK);
>> + regmap_read(pmu_regmap, S5P_WAKEUP_MASK, &tmp);
>> tmp |= ((0xFF << 8) | (0x1F << 1));
>> - __raw_writel(tmp, S5P_WAKEUP_MASK);
>> + regmap_write(pmu_regmap, S5P_WAKEUP_MASK, tmp);
>>
>> register_syscore_ops(&exynos_pm_syscore_ops);
>> suspend_set_ops(&exynos_suspend_ops);
>
>
> As I said above, I don't think there is any need to use the regmap in such
> low level code for registers that will not be shared.
>
>
>> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
>> index 4c3453a..67116a5 100644
>> --- a/arch/arm/mach-exynos/pmu.c
>> +++ b/arch/arm/mach-exynos/pmu.c
>> @@ -11,6 +11,7 @@
>>
>> #include <linux/io.h>
>> #include <linux/kernel.h>
>> +#include <linux/regmap.h>
>>
>> #include <plat/cpu.h>
>>
>> @@ -18,6 +19,7 @@
>> #include "regs-pmu.h"
>>
>> static const struct exynos_pmu_conf *exynos_pmu_config;
>> +static struct regmap *pmu_regmap;
>>
>> static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
>> /* { .reg = address, .val = { AFTR, LPA, SLEEP } */
>> @@ -317,7 +319,7 @@ static const struct exynos_pmu_conf
>> exynos5250_pmu_config[] = {
>> { PMU_TABLE_END,},
>> };
>>
>> -static void __iomem * const exynos5_list_both_cnt_feed[] = {
>> +static unsigned int const exynos5_list_both_cnt_feed[] = {
>> EXYNOS5_ARM_CORE0_OPTION,
>> EXYNOS5_ARM_CORE1_OPTION,
>> EXYNOS5_ARM_COMMON_OPTION,
>> @@ -331,7 +333,7 @@ static void __iomem * const
>> exynos5_list_both_cnt_feed[] = {
>> EXYNOS5_TOP_PWR_SYSMEM_OPTION,
>> };
>>
>> -static void __iomem * const exynos5_list_diable_wfi_wfe[] = {
>> +static unsigned int const exynos5_list_diable_wfi_wfe[] = {
>> EXYNOS5_ARM_CORE1_OPTION,
>> EXYNOS5_FSYS_ARM_OPTION,
>> EXYNOS5_ISP_ARM_OPTION,
>> @@ -346,27 +348,28 @@ static void exynos5_init_pmu(void)
>> * Enable both SC_FEEDBACK and SC_COUNTER
>> */
>> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
>> - tmp = __raw_readl(exynos5_list_both_cnt_feed[i]);
>> + regmap_read(pmu_regmap, exynos5_list_both_cnt_feed[i],
>> &tmp);
>> tmp |= (EXYNOS5_USE_SC_FEEDBACK |
>> EXYNOS5_USE_SC_COUNTER);
>> - __raw_writel(tmp, exynos5_list_both_cnt_feed[i]);
>> + regmap_write(pmu_regmap, exynos5_list_both_cnt_feed[i],
>> tmp);
>> }
>>
>> /*
>> * SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
>> */
>> - tmp = __raw_readl(EXYNOS5_ARM_COMMON_OPTION);
>> + regmap_read(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
>> tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
>> - __raw_writel(tmp, EXYNOS5_ARM_COMMON_OPTION);
>> + regmap_write(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
>>
>> /*
>> * Disable WFI/WFE on XXX_OPTION
>> */
>> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
>> - tmp = __raw_readl(exynos5_list_diable_wfi_wfe[i]);
>> + tmp = regmap_read(pmu_regmap,
>> exynos5_list_diable_wfi_wfe[i],
>> + &tmp);
>> tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
>> EXYNOS5_OPTION_USE_STANDBYWFI);
>> - __raw_writel(tmp, exynos5_list_diable_wfi_wfe[i]);
>> + regmap_write(pmu_regmap, exynos5_list_diable_wfi_wfe[i],
>> tmp);
>> }
>> }
>>
>> @@ -377,14 +380,14 @@ void exynos_sys_powerdown_conf(enum sys_powerdown
>> mode)
>> if (soc_is_exynos5250())
>> exynos5_init_pmu();
>>
>> - for (i = 0; (exynos_pmu_config[i].reg != PMU_TABLE_END) ; i++)
>> - __raw_writel(exynos_pmu_config[i].val[mode],
>> - exynos_pmu_config[i].reg);
>> + for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
>> + regmap_write(pmu_regmap, exynos_pmu_config[i].offset,
>> + exynos_pmu_config[i].val[mode]);
>>
>> if (soc_is_exynos4412()) {
>> - for (i = 0; exynos4412_pmu_config[i].reg != PMU_TABLE_END
>> ; i++)
>> - __raw_writel(exynos4412_pmu_config[i].val[mode],
>> - exynos4412_pmu_config[i].reg);
>> + for (i = 0; exynos4412_pmu_config[i].offset !=
>> PMU_TABLE_END; i++)
>> + regmap_write(pmu_regmap,
>> exynos4412_pmu_config[i].offset,
>> +
>> exynos4412_pmu_config[i].val[mode]);
>> }
>> }
>>
>> @@ -393,6 +396,7 @@ static int __init exynos_pmu_init(void)
>> unsigned int value;
>>
>> exynos_pmu_config = exynos4210_pmu_config;
>> + pmu_regmap = get_exynos_pmuregmap();
>>
>> if (soc_is_exynos4210()) {
>> exynos_pmu_config = exynos4210_pmu_config;
>> @@ -405,13 +409,13 @@ static int __init exynos_pmu_init(void)
>> * When SYS_WDTRESET is set, watchdog timer reset request
>> * is ignored by power management unit.
>> */
>> - value = __raw_readl(EXYNOS5_AUTO_WDTRESET_DISABLE);
>> + regmap_read(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> &value);
>> value &= ~EXYNOS5_SYS_WDTRESET;
>> - __raw_writel(value, EXYNOS5_AUTO_WDTRESET_DISABLE);
>> + regmap_write(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> value);
>>
>> - value = __raw_readl(EXYNOS5_MASK_WDTRESET_REQUEST);
>> + regmap_read(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> &value);
>> value &= ~EXYNOS5_SYS_WDTRESET;
>> - __raw_writel(value, EXYNOS5_MASK_WDTRESET_REQUEST);
>> + regmap_write(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> value);
>>
>> exynos_pmu_config = exynos5250_pmu_config;
>> pr_info("EXYNOS5250 PMU Initialize\n");
>
>
> Same here.
>
>
>> diff --git a/arch/arm/mach-exynos/regs-pmu.h
>> b/arch/arm/mach-exynos/regs-pmu.h
>> index bfebe84..7f3bf65 100644
>> --- a/arch/arm/mach-exynos/regs-pmu.h
>> +++ b/arch/arm/mach-exynos/regs-pmu.h
>> @@ -14,290 +14,288 @@
>>
>> #include <mach/map.h>
>>
>
> Is inclusion of this header still needed after getting rid of S5P_VA_PMU
> below?
>
This change has been done in separate patch [1]. As platsmp.c requires
this and was using it indirectly from regs-pmu.h.
[1] : https://lkml.org/lkml/2014/4/25/233
Thanks,
Pankaj Dubey
>
>> -#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
>> -
>
>
> Best regards,
> Tomasz
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
> in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 08/10] ARM: EXYNOS: Refactored code for using PMU address via DT
@ 2014-04-26 3:32 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-26 3:32 UTC (permalink / raw)
To: linux-arm-kernel
Hi Tomasz,
Thanks for review.
On Sat, Apr 26, 2014 at 7:19 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Hi,
>
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>>
>> Under "arm/mach-exynos" many files are using PMU register offsets.
>> Since we have added support for accessing PMU base address via DT,
>> now we can remove PMU mapping from exynosX_iodesc.
>> Let's convert all these access using either of "get_exynos_pmuaddr"
>> or "get_exynos_regmap".
>> This will help us in removing static mapping of PMU base address
>> as well as help in reducing dependency over machine header files.
>> Thus helping for migration of PMU implementation from machine to driver
>> folder which can be reused for ARM64 bsed SoC.
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/common.h | 4 +-
>> arch/arm/mach-exynos/cpuidle.c | 37 ++-
>> arch/arm/mach-exynos/exynos.c | 19 +-
>> arch/arm/mach-exynos/hotplug.c | 4 +-
>> arch/arm/mach-exynos/include/mach/map.h | 3 -
>> arch/arm/mach-exynos/platsmp.c | 13 +-
>> arch/arm/mach-exynos/pm.c | 60 ++--
>> arch/arm/mach-exynos/pmu.c | 40 +--
>> arch/arm/mach-exynos/regs-pmu.h | 506
>> +++++++++++++++----------------
>> 9 files changed, 348 insertions(+), 338 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
>> index ecfd0fc..ad5128e 100644
>> --- a/arch/arm/mach-exynos/common.h
>> +++ b/arch/arm/mach-exynos/common.h
>> @@ -40,7 +40,7 @@ extern void exynos_cpu_die(unsigned int cpu);
>>
>> /* PMU(Power Management Unit) support */
>>
>> -#define PMU_TABLE_END NULL
>> +#define PMU_TABLE_END 0xFFFF
>
>
> IMHO (-1U) would be more appropriate.
>
OK.
>
>>
>> enum sys_powerdown {
>> SYS_AFTR,
>> @@ -51,7 +51,7 @@ enum sys_powerdown {
>>
>> extern unsigned long l2x0_regs_phys;
>> struct exynos_pmu_conf {
>> - void __iomem *reg;
>> + unsigned int offset;
>> unsigned int val[NUM_SYS_POWERDOWN];
>> };
>>
>> diff --git a/arch/arm/mach-exynos/cpuidle.c
>> b/arch/arm/mach-exynos/cpuidle.c
>> index c57cae0..5dcdd46 100644
>> --- a/arch/arm/mach-exynos/cpuidle.c
>> +++ b/arch/arm/mach-exynos/cpuidle.c
>> @@ -17,6 +17,7 @@
>> #include <linux/module.h>
>> #include <linux/time.h>
>> #include <linux/platform_device.h>
>> +#include <linux/regmap.h>
>>
>> #include <asm/proc-fns.h>
>> #include <asm/smp_scu.h>
>> @@ -34,10 +35,10 @@
>>
>> #define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
>> S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0
>> ? \
>> - (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
>> + 0x24 : S5P_INFORM0))
>> #define REG_DIRECTGO_FLAG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
>> S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0
>> ? \
>> - (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
>> + 0x20 : S5P_INFORM1))
>
>
> This patch seems to be based on old code, before Daniel Lezcano's Exynos
> cpuidle refactor [1] and it should be rebased on top of that series.
>
> [1] http://thread.gmane.org/gmane.linux.kernel.samsung-soc/29085
>
>
OK, I will rebase on top of it along with addressing all other review comments.
>>
>> #define S5P_CHECK_AFTR 0xFCBA0D10
>>
>> @@ -60,6 +61,8 @@
>> #define PWR_CTRL2_CORE2_UP_RATIO (1 << 4)
>> #define PWR_CTRL2_CORE1_UP_RATIO (1 << 0)
>>
>> +static struct regmap *pmu_regmap;
>> +
>> static int exynos4_enter_lowpower(struct cpuidle_device *dev,
>> struct cpuidle_driver *drv,
>> int index);
>> @@ -87,7 +90,7 @@ static struct cpuidle_driver exynos4_idle_driver = {
>> /* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
>> static void exynos4_set_wakeupmask(void)
>> {
>> - __raw_writel(0x0000ff3e, S5P_WAKEUP_MASK);
>> + regmap_write(pmu_regmap, S5P_WAKEUP_MASK, 0x0000ff3e);
>> }
>>
>> static unsigned int g_pwr_ctrl, g_diag_reg;
>> @@ -120,22 +123,28 @@ static int exynos4_enter_core0_aftr(struct
>> cpuidle_device *dev,
>> struct cpuidle_driver *drv,
>> int index)
>> {
>> - unsigned long tmp;
>> + unsigned int tmp;
>>
>> exynos4_set_wakeupmask();
>>
>> /* Set value of power down register for aftr mode */
>> exynos_sys_powerdown_conf(SYS_AFTR);
>> -
>> - __raw_writel(virt_to_phys(exynos_cpu_resume), REG_DIRECTGO_ADDR);
>> - __raw_writel(S5P_CHECK_AFTR, REG_DIRECTGO_FLAG);
>> -
>> +
>> + if (samsung_rev() == EXYNOS4210_REV_1_0) {
>> + __raw_writel(virt_to_phys(exynos_cpu_resume),
>> + S5P_VA_SYSRAM + REG_DIRECTGO_ADDR);
>> + __raw_writel(S5P_CHECK_AFTR, S5P_VA_SYSRAM +
>> REG_DIRECTGO_FLAG);
>> + } else {
>> + regmap_write(pmu_regmap, REG_DIRECTGO_ADDR,
>> + virt_to_phys(exynos_cpu_resume));
>> + regmap_write(pmu_regmap, REG_DIRECTGO_FLAG,
>> S5P_CHECK_AFTR);
>> + }
>
>
> This is quite ugly. I'd refactor this into a function pointer set once at
> initialization time depending on SoC type and create two functions for both
> cases.
>
True. I also felt it's getting ugly, but could not think of better
way. Thanks for suggestion let me check how better I can make this.
> In general, please also see my comments about this kind of code checking SoC
> type posted as a part of my review of Vikas' Exynos5260 PMU support series
> [2].
>
> [2] http://thread.gmane.org/gmane.linux.kernel.samsung-soc/28056/focus=29342
Sure.
>
>
>> save_cpu_arch_register();
>>
>> /* Setting Central Sequence Register for power down mode */
>> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
>> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
>> tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
>> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
>> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
>>
>> cpu_pm_enter();
>> cpu_suspend(0, idle_finisher);
>> @@ -154,14 +163,14 @@ static int exynos4_enter_core0_aftr(struct
>> cpuidle_device *dev,
>> * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
>> * in this situation.
>> */
>> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
>> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
>> if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
>> tmp |= S5P_CENTRAL_LOWPWR_CFG;
>> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
>> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION,
>> tmp);
>> }
>>
>> /* Clear wakeup state register */
>> - __raw_writel(0x0, S5P_WAKEUP_STAT);
>> + regmap_write(pmu_regmap, S5P_WAKEUP_STAT, 0x0);
>>
>> return index;
>> }
>> @@ -219,6 +228,8 @@ static int exynos_cpuidle_probe(struct platform_device
>> *pdev)
>> int cpu_id, ret;
>> struct cpuidle_device *device;
>>
>> + pmu_regmap = get_exynos_pmuregmap();
>
>
> Why couldn't you simply look for PMU node here and then call
> syscon_regmap_lookup_by_phandle()? (You will have to anyway, as Daniel's
> patches mentioned above move the driver to drivers/cpuidle and it is not
> possible to include headers and it is not allowed to include mach/ headers
> from drivers/.)
>
Once I rebase on top of Daniel's patches this change won't require any more.
>
>> +
>> if (soc_is_exynos5250())
>> exynos5_core_down_clk();
>>
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index 68f60e1..b01987e 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -20,6 +20,7 @@
>> #include <linux/platform_device.h>
>> #include <linux/pm_domain.h>
>> #include <linux/mfd/syscon.h>
>> +#include <linux/regmap.h>
>>
>> #include <asm/cacheflush.h>
>> #include <asm/hardware/cache-l2x0.h>
>> @@ -67,11 +68,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
>> .length = SZ_4K,
>> .type = MT_DEVICE,
>> }, {
>> - .virtual = (unsigned long)S5P_VA_PMU,
>> - .pfn = __phys_to_pfn(EXYNOS4_PA_PMU),
>> - .length = SZ_64K,
>> - .type = MT_DEVICE,
>> - }, {
>> .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
>> .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
>> .length = SZ_4K,
>> @@ -195,11 +191,6 @@ static struct map_desc exynos5_iodesc[] __initdata =
>> {
>> .pfn = __phys_to_pfn(EXYNOS5_PA_CMU),
>> .length = 144 * SZ_1K,
>> .type = MT_DEVICE,
>> - }, {
>> - .virtual = (unsigned long)S5P_VA_PMU,
>> - .pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
>> - .length = SZ_64K,
>> - .type = MT_DEVICE,
>> },
>> };
>>
>> @@ -207,7 +198,7 @@ static void exynos_restart(enum reboot_mode mode,
>> const char *cmd)
>> {
>> struct device_node *np;
>> u32 val = 0x1;
>> - void __iomem *addr = EXYNOS_SWRESET;
>> + void __iomem *addr = NULL;
>>
>> if (of_machine_is_compatible("samsung,exynos5440")) {
>> u32 status;
>> @@ -220,9 +211,9 @@ static void exynos_restart(enum reboot_mode mode,
>> const char *cmd)
>> val = __raw_readl(addr);
>>
>> val = (val & 0xffff0000) | (status & 0xffff);
>> - }
>> -
>> - __raw_writel(val, addr);
>> + __raw_writel(val, addr);
>> + } else
>> + regmap_write(exynos_pmu_regmap, EXYNOS_SWRESET, val);
>> }
>>
>> static struct platform_device exynos_cpuidle = {
>> diff --git a/arch/arm/mach-exynos/hotplug.c
>> b/arch/arm/mach-exynos/hotplug.c
>> index 73b0b5c..7831e64 100644
>> --- a/arch/arm/mach-exynos/hotplug.c
>> +++ b/arch/arm/mach-exynos/hotplug.c
>> @@ -13,6 +13,7 @@
>> #include <linux/errno.h>
>> #include <linux/smp.h>
>> #include <linux/io.h>
>> +#include <linux/regmap.h>
>>
>> #include <asm/cacheflush.h>
>> #include <asm/cp15.h>
>> @@ -91,11 +92,12 @@ static inline void cpu_leave_lowpower(void)
>>
>> static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
>> {
>> + struct regmap *pmu_base = get_exynos_pmuregmap();
>
>
> pmu_base is rather unfortunate name for a variable holding a pointer to a
> regmap, still...
OK, I will rename as "pmu_regmap".
>
>
>> for (;;) {
>>
>> /* make cpu1 to be turned off at next WFI command */
>> if (cpu == 1)
>> - __raw_writel(0, S5P_ARM_CORE1_CONFIGURATION);
>> + regmap_write(pmu_base,
>> S5P_ARM_CORE1_CONFIGURATION, 0);
>
>
> ...inside mach-exynos you could probably define exynos_pmu_write() that
> would call regmap_write() with exynos_pmu_regmap (after making it
> non-static) directly. This way the old code wouldn't have to care about the
> regmap at all, just __raw_writel() would be replaced with
> exynos_pmu_write().
>
OK, sounds good to me.
> OR
>
> In case of registers that are known to not need sharing between multiple
> drivers, the mapped area could be used directly. This would probably let you
> eliminate any regmap-specific code from mach-exynos.
>
In v1 patch [1], I just used ioremapped virtual address, but as
Sylwester suggested here [2], for using syscon mapped regmap handles
instead, to avoid ioremapping same PMU address once in "syscon" and
then in "exynos.c", and again in "pmu.c". I tried to adopt "early
syscon initialization" method [3] in this patch V2. But I observed one
issue in "early syscon initialization" that we can't use it before DT
is unflattened.
So I have three options now as:
1: Use only ioremapped address and drop regmap specific code as you
are suggesting, even though we will end up mapping same address range
in multiple files. Same was done in patch v1 [1].
2: Use only PMU regmap handles by using "early syscon initialization"
method [2], as suggested by Sylwester [3]. But as I mentioned due to
limitation of "early syscon" we can't call "early_syscon_init" before
device tree unflattens. So after exploring I have found one way to do
it, even though I am not sure will be be acceptable. Since we can't
delay "early_syscon_init" after machine_desc->init_time. As just after
that secondary core bootup starts and we need to access PMU registers
during that time in platsmp.c. I need to provide exynos_init_time in
machine_desc and call "early_syscon_init" along with "of_clk_init" and
"clock_source_init". I have verfied this and everything works fine
without any side-effect. Only concern is will it be acceptable to call
"early_syscon_init" from "exynos_time_init".
3: Use both ioremapped address (only used in platsmp.c) and PMU regmap
handle (used in all other exynos machine files), same has been
implemented in this patch V2. But as you suggested above I can reduce
changes by introducing "exynos_pmu_read/write".
Please let me know your opinion about this.
[1] : https://lkml.org/lkml/2014/4/2/50
[2] : https://lkml.org/lkml/2014/4/8/239
[3] : https://lkml.org/lkml/2014/4/2/171
>
>>
>> /*
>> * here's the WFI
>> diff --git a/arch/arm/mach-exynos/include/mach/map.h
>> b/arch/arm/mach-exynos/include/mach/map.h
>> index 7b046b5..1ba7fb5 100644
>> --- a/arch/arm/mach-exynos/include/mach/map.h
>> +++ b/arch/arm/mach-exynos/include/mach/map.h
>> @@ -35,9 +35,6 @@
>> #define EXYNOS4_PA_SYSCON 0x10010000
>> #define EXYNOS5_PA_SYSCON 0x10050100
>>
>> -#define EXYNOS4_PA_PMU 0x10020000
>> -#define EXYNOS5_PA_PMU 0x10040000
>> -
>> #define EXYNOS4_PA_CMU 0x10030000
>> #define EXYNOS5_PA_CMU 0x10010000
>>
>> diff --git a/arch/arm/mach-exynos/platsmp.c
>> b/arch/arm/mach-exynos/platsmp.c
>> index 29c2286..9ce4c9f9 100644
>> --- a/arch/arm/mach-exynos/platsmp.c
>> +++ b/arch/arm/mach-exynos/platsmp.c
>> @@ -31,11 +31,12 @@
>> #include "regs-pmu.h"
>>
>> extern void exynos4_secondary_startup(void);
>> +static void __iomem *pmu_base;
>>
>> static inline void __iomem *cpu_boot_reg_base(void)
>> {
>> if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
>> - return S5P_INFORM5;
>> + return pmu_base + S5P_INFORM5;
>> return S5P_VA_SYSRAM;
>> }
>>
>> @@ -106,14 +107,14 @@ static int exynos_boot_secondary(unsigned int cpu,
>> struct task_struct *idle)
>> */
>> write_pen_release(phys_cpu);
>>
>> - if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN))
>> {
>> + if (!(__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
>> + & S5P_CORE_LOCAL_PWR_EN)) {
>> __raw_writel(S5P_CORE_LOCAL_PWR_EN,
>> - S5P_ARM_CORE1_CONFIGURATION);
>> -
>> + pmu_base + S5P_ARM_CORE1_CONFIGURATION);
>> timeout = 10;
>>
>> /* wait max 10 ms until cpu1 is on */
>> - while ((__raw_readl(S5P_ARM_CORE1_STATUS)
>> + while ((__raw_readl(pmu_base + S5P_ARM_CORE1_STATUS)
>> & S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN)
>> {
>> if (timeout-- == 0)
>> break;
>> @@ -201,6 +202,8 @@ static void __init exynos_smp_prepare_cpus(unsigned
>> int max_cpus)
>> {
>> int i;
>>
>> + pmu_base = get_exynos_pmuaddr();
>> +
>> if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
>> scu_enable(scu_base_addr());
>>
>> diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
>> index 723c988..e4c10d4 100644
>> --- a/arch/arm/mach-exynos/pm.c
>> +++ b/arch/arm/mach-exynos/pm.c
>> @@ -20,6 +20,7 @@
>> #include <linux/irqchip/arm-gic.h>
>> #include <linux/err.h>
>> #include <linux/clk.h>
>> +#include <linux/regmap.h>
>>
>> #include <asm/cacheflush.h>
>> #include <asm/hardware/cache-l2x0.h>
>> @@ -37,6 +38,8 @@
>> #include "regs-pmu.h"
>> #include "regs-sys.h"
>>
>> +static struct regmap *pmu_regmap;
>> +
>> /**
>> * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
>> * @hwirq: Hardware IRQ signal of the GIC
>> @@ -125,43 +128,44 @@ static void exynos_pm_prepare(void)
>> unsigned int tmp;
>>
>> /* Set wake-up mask registers */
>> - __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
>> - __raw_writel(exynos_irqwake_intmask & ~(1 << 31),
>> S5P_WAKEUP_MASK);
>> + regmap_write(pmu_regmap, S5P_EINT_WAKEUP_MASK,
>> + exynos_get_eint_wake_mask());
>> + regmap_write(pmu_regmap, S5P_WAKEUP_MASK,
>> + exynos_irqwake_intmask & ~(1 << 31));
>>
>> s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
>>
>> if (soc_is_exynos5250()) {
>> s3c_pm_do_save(exynos5_sys_save,
>> ARRAY_SIZE(exynos5_sys_save));
>> /* Disable USE_RETENTION of JPEG_MEM_OPTION */
>> - tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
>> + regmap_read(pmu_regmap, EXYNOS5_JPEG_MEM_OPTION, &tmp);
>> tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
>> - __raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION);
>> + regmap_write(pmu_regmap, EXYNOS5_JPEG_MEM_OPTION, tmp);
>> }
>>
>> /* Set value of power down register for sleep mode */
>>
>> exynos_sys_powerdown_conf(SYS_SLEEP);
>> - __raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1);
>> + regmap_write(pmu_regmap, S5P_INFORM1, S5P_CHECK_SLEEP);
>>
>> /* ensure at least INFORM0 has the resume address */
>>
>> - __raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
>> + regmap_write(pmu_regmap, S5P_INFORM0,
>> virt_to_phys(exynos_cpu_resume));
>> }
>>
>> static int exynos_pm_suspend(void)
>> {
>> - unsigned long tmp;
>> + unsigned int tmp;
>>
>> /* Setting Central Sequence Register for power down mode */
>>
>> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
>> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
>> tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
>> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
>> -
>> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, tmp);
>> /* Setting SEQ_OPTION register */
>>
>> tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
>> - __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
>> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_OPTION, tmp);
>>
>> if (!soc_is_exynos5250()) {
>> /* Save Power control register */
>> @@ -180,7 +184,7 @@ static int exynos_pm_suspend(void)
>>
>> static void exynos_pm_resume(void)
>> {
>> - unsigned long tmp;
>> + unsigned int tmp;
>>
>> /*
>> * If PMU failed while entering sleep mode, WFI will be
>> @@ -188,12 +192,12 @@ static void exynos_pm_resume(void)
>> * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
>> * in this situation.
>> */
>> - tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
>> + regmap_read(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION, &tmp);
>> if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
>> tmp |= S5P_CENTRAL_LOWPWR_CFG;
>> - __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
>> + regmap_write(pmu_regmap, S5P_CENTRAL_SEQ_CONFIGURATION,
>> tmp);
>> /* clear the wakeup state register */
>> - __raw_writel(0x0, S5P_WAKEUP_STAT);
>> + regmap_write(pmu_regmap, S5P_WAKEUP_STAT, 0x0);
>> /* No need to perform below restore code */
>> goto early_wakeup;
>> }
>> @@ -213,13 +217,13 @@ static void exynos_pm_resume(void)
>>
>> /* For release retention */
>>
>> - __raw_writel((1 << 28), S5P_PAD_RET_MAUDIO_OPTION);
>> - __raw_writel((1 << 28), S5P_PAD_RET_GPIO_OPTION);
>> - __raw_writel((1 << 28), S5P_PAD_RET_UART_OPTION);
>> - __raw_writel((1 << 28), S5P_PAD_RET_MMCA_OPTION);
>> - __raw_writel((1 << 28), S5P_PAD_RET_MMCB_OPTION);
>> - __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
>> - __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
>> + regmap_write(pmu_regmap, S5P_PAD_RET_MAUDIO_OPTION, (1 << 28));
>> + regmap_write(pmu_regmap, S5P_PAD_RET_GPIO_OPTION, (1 << 28));
>> + regmap_write(pmu_regmap, S5P_PAD_RET_UART_OPTION, (1 << 28));
>> + regmap_write(pmu_regmap, S5P_PAD_RET_MMCA_OPTION, (1 << 28));
>> + regmap_write(pmu_regmap, S5P_PAD_RET_MMCB_OPTION, (1 << 28));
>> + regmap_write(pmu_regmap, S5P_PAD_RET_EBIA_OPTION, (1 << 28));
>> + regmap_write(pmu_regmap, S5P_PAD_RET_EBIB_OPTION, (1 << 28));
>>
>> if (soc_is_exynos5250())
>> s3c_pm_do_restore(exynos5_sys_save,
>> @@ -233,7 +237,7 @@ static void exynos_pm_resume(void)
>> early_wakeup:
>>
>> /* Clear SLEEP mode set in INFORM1 */
>> - __raw_writel(0x0, S5P_INFORM1);
>> + regmap_write(pmu_regmap, S5P_INFORM1, 0x0);
>>
>> return;
>> }
>> @@ -276,8 +280,8 @@ static int exynos_suspend_enter(suspend_state_t state)
>>
>> s3c_pm_restore_uarts();
>>
>> - S3C_PMDBG("%s: wakeup stat: %08x\n", __func__,
>> - __raw_readl(S5P_WAKEUP_STAT));
>> + regmap_read(pmu_regmap, S5P_WAKEUP_STAT, &ret);
>> + S3C_PMDBG("%s: wakeup stat: %08x\n", __func__, ret);
>>
>> s3c_pm_check_restore();
>>
>> @@ -308,14 +312,14 @@ static const struct platform_suspend_ops
>> exynos_suspend_ops = {
>> void __init exynos_pm_init(void)
>> {
>> u32 tmp;
>> -
>> + pmu_regmap = get_exynos_pmuregmap();
>> /* Platform-specific GIC callback */
>> gic_arch_extn.irq_set_wake = exynos_irq_set_wake;
>>
>> /* All wakeup disable */
>> - tmp = __raw_readl(S5P_WAKEUP_MASK);
>> + regmap_read(pmu_regmap, S5P_WAKEUP_MASK, &tmp);
>> tmp |= ((0xFF << 8) | (0x1F << 1));
>> - __raw_writel(tmp, S5P_WAKEUP_MASK);
>> + regmap_write(pmu_regmap, S5P_WAKEUP_MASK, tmp);
>>
>> register_syscore_ops(&exynos_pm_syscore_ops);
>> suspend_set_ops(&exynos_suspend_ops);
>
>
> As I said above, I don't think there is any need to use the regmap in such
> low level code for registers that will not be shared.
>
>
>> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
>> index 4c3453a..67116a5 100644
>> --- a/arch/arm/mach-exynos/pmu.c
>> +++ b/arch/arm/mach-exynos/pmu.c
>> @@ -11,6 +11,7 @@
>>
>> #include <linux/io.h>
>> #include <linux/kernel.h>
>> +#include <linux/regmap.h>
>>
>> #include <plat/cpu.h>
>>
>> @@ -18,6 +19,7 @@
>> #include "regs-pmu.h"
>>
>> static const struct exynos_pmu_conf *exynos_pmu_config;
>> +static struct regmap *pmu_regmap;
>>
>> static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
>> /* { .reg = address, .val = { AFTR, LPA, SLEEP } */
>> @@ -317,7 +319,7 @@ static const struct exynos_pmu_conf
>> exynos5250_pmu_config[] = {
>> { PMU_TABLE_END,},
>> };
>>
>> -static void __iomem * const exynos5_list_both_cnt_feed[] = {
>> +static unsigned int const exynos5_list_both_cnt_feed[] = {
>> EXYNOS5_ARM_CORE0_OPTION,
>> EXYNOS5_ARM_CORE1_OPTION,
>> EXYNOS5_ARM_COMMON_OPTION,
>> @@ -331,7 +333,7 @@ static void __iomem * const
>> exynos5_list_both_cnt_feed[] = {
>> EXYNOS5_TOP_PWR_SYSMEM_OPTION,
>> };
>>
>> -static void __iomem * const exynos5_list_diable_wfi_wfe[] = {
>> +static unsigned int const exynos5_list_diable_wfi_wfe[] = {
>> EXYNOS5_ARM_CORE1_OPTION,
>> EXYNOS5_FSYS_ARM_OPTION,
>> EXYNOS5_ISP_ARM_OPTION,
>> @@ -346,27 +348,28 @@ static void exynos5_init_pmu(void)
>> * Enable both SC_FEEDBACK and SC_COUNTER
>> */
>> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
>> - tmp = __raw_readl(exynos5_list_both_cnt_feed[i]);
>> + regmap_read(pmu_regmap, exynos5_list_both_cnt_feed[i],
>> &tmp);
>> tmp |= (EXYNOS5_USE_SC_FEEDBACK |
>> EXYNOS5_USE_SC_COUNTER);
>> - __raw_writel(tmp, exynos5_list_both_cnt_feed[i]);
>> + regmap_write(pmu_regmap, exynos5_list_both_cnt_feed[i],
>> tmp);
>> }
>>
>> /*
>> * SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
>> */
>> - tmp = __raw_readl(EXYNOS5_ARM_COMMON_OPTION);
>> + regmap_read(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
>> tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
>> - __raw_writel(tmp, EXYNOS5_ARM_COMMON_OPTION);
>> + regmap_write(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
>>
>> /*
>> * Disable WFI/WFE on XXX_OPTION
>> */
>> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
>> - tmp = __raw_readl(exynos5_list_diable_wfi_wfe[i]);
>> + tmp = regmap_read(pmu_regmap,
>> exynos5_list_diable_wfi_wfe[i],
>> + &tmp);
>> tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
>> EXYNOS5_OPTION_USE_STANDBYWFI);
>> - __raw_writel(tmp, exynos5_list_diable_wfi_wfe[i]);
>> + regmap_write(pmu_regmap, exynos5_list_diable_wfi_wfe[i],
>> tmp);
>> }
>> }
>>
>> @@ -377,14 +380,14 @@ void exynos_sys_powerdown_conf(enum sys_powerdown
>> mode)
>> if (soc_is_exynos5250())
>> exynos5_init_pmu();
>>
>> - for (i = 0; (exynos_pmu_config[i].reg != PMU_TABLE_END) ; i++)
>> - __raw_writel(exynos_pmu_config[i].val[mode],
>> - exynos_pmu_config[i].reg);
>> + for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
>> + regmap_write(pmu_regmap, exynos_pmu_config[i].offset,
>> + exynos_pmu_config[i].val[mode]);
>>
>> if (soc_is_exynos4412()) {
>> - for (i = 0; exynos4412_pmu_config[i].reg != PMU_TABLE_END
>> ; i++)
>> - __raw_writel(exynos4412_pmu_config[i].val[mode],
>> - exynos4412_pmu_config[i].reg);
>> + for (i = 0; exynos4412_pmu_config[i].offset !=
>> PMU_TABLE_END; i++)
>> + regmap_write(pmu_regmap,
>> exynos4412_pmu_config[i].offset,
>> +
>> exynos4412_pmu_config[i].val[mode]);
>> }
>> }
>>
>> @@ -393,6 +396,7 @@ static int __init exynos_pmu_init(void)
>> unsigned int value;
>>
>> exynos_pmu_config = exynos4210_pmu_config;
>> + pmu_regmap = get_exynos_pmuregmap();
>>
>> if (soc_is_exynos4210()) {
>> exynos_pmu_config = exynos4210_pmu_config;
>> @@ -405,13 +409,13 @@ static int __init exynos_pmu_init(void)
>> * When SYS_WDTRESET is set, watchdog timer reset request
>> * is ignored by power management unit.
>> */
>> - value = __raw_readl(EXYNOS5_AUTO_WDTRESET_DISABLE);
>> + regmap_read(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> &value);
>> value &= ~EXYNOS5_SYS_WDTRESET;
>> - __raw_writel(value, EXYNOS5_AUTO_WDTRESET_DISABLE);
>> + regmap_write(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> value);
>>
>> - value = __raw_readl(EXYNOS5_MASK_WDTRESET_REQUEST);
>> + regmap_read(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> &value);
>> value &= ~EXYNOS5_SYS_WDTRESET;
>> - __raw_writel(value, EXYNOS5_MASK_WDTRESET_REQUEST);
>> + regmap_write(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> value);
>>
>> exynos_pmu_config = exynos5250_pmu_config;
>> pr_info("EXYNOS5250 PMU Initialize\n");
>
>
> Same here.
>
>
>> diff --git a/arch/arm/mach-exynos/regs-pmu.h
>> b/arch/arm/mach-exynos/regs-pmu.h
>> index bfebe84..7f3bf65 100644
>> --- a/arch/arm/mach-exynos/regs-pmu.h
>> +++ b/arch/arm/mach-exynos/regs-pmu.h
>> @@ -14,290 +14,288 @@
>>
>> #include <mach/map.h>
>>
>
> Is inclusion of this header still needed after getting rid of S5P_VA_PMU
> below?
>
This change has been done in separate patch [1]. As platsmp.c requires
this and was using it indirectly from regs-pmu.h.
[1] : https://lkml.org/lkml/2014/4/25/233
Thanks,
Pankaj Dubey
>
>> -#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
>> -
>
>
> Best regards,
> Tomasz
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
> in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 05/10] ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
2014-04-25 21:19 ` Tomasz Figa
(?)
@ 2014-04-26 3:39 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-26 3:39 UTC (permalink / raw)
To: Tomasz Figa
Cc: linux-samsung-soc, linux-kernel, linux-arm-kernel, Kukjin Kim,
linux, Tomasz Figa, chow.kim, Young-Gun Jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
HI Tomasz,
On Sat, Apr 26, 2014 at 6:19 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Hi,
>
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>>
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> Current "pm_domain.c" file uses "S5P_INT_LOCAL_PWR_EN" definition from
>> "regs-pmu.h" and hence needs to include this header file. As there is
>> no other user of "S5P_INT_LOCAL_PWR_EN" definition other than pm_domain,
>> to remove "regs-pmu.h" header file dependency from "pm_domain.c" it's
>> better we define this definition in "pm_domain.c" file itself and thus it
>> will help in removing header file inclusion from "pm_domain.c".
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> ---
>> arch/arm/mach-exynos/pm_domains.c | 2 +-
>> arch/arm/mach-exynos/regs-pmu.h | 1 -
>> 2 files changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/pm_domains.c
>> b/arch/arm/mach-exynos/pm_domains.c
>> index fe6570e..f676b0a 100644
>> --- a/arch/arm/mach-exynos/pm_domains.c
>> +++ b/arch/arm/mach-exynos/pm_domains.c
>> @@ -22,7 +22,7 @@
>> #include <linux/of_platform.h>
>> #include <linux/sched.h>
>>
>> -#include "regs-pmu.h"
>> +#define S5P_INT_LOCAL_PWR_EN 0x7
>
>
> nit: You could indent the value a bit more in case of adding any new macros
> in future. While at it, you could probably also drop the S5P_ prefix.
>
Thanks for review.
Will take care of both suggestions.
Thanks,
Pankaj Dubey
> With these fixed, feel free to add my
>
> Reviewed-by: Tomasz Figa <t.figa@samsung.com>
>
> Best regards,
> Tomasz
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
> in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 05/10] ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
@ 2014-04-26 3:39 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-26 3:39 UTC (permalink / raw)
To: Tomasz Figa
Cc: linux-samsung-soc, linux-kernel, linux-arm-kernel, Kukjin Kim,
linux, Tomasz Figa, chow.kim, Young-Gun Jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
HI Tomasz,
On Sat, Apr 26, 2014 at 6:19 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Hi,
>
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>>
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> Current "pm_domain.c" file uses "S5P_INT_LOCAL_PWR_EN" definition from
>> "regs-pmu.h" and hence needs to include this header file. As there is
>> no other user of "S5P_INT_LOCAL_PWR_EN" definition other than pm_domain,
>> to remove "regs-pmu.h" header file dependency from "pm_domain.c" it's
>> better we define this definition in "pm_domain.c" file itself and thus it
>> will help in removing header file inclusion from "pm_domain.c".
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> ---
>> arch/arm/mach-exynos/pm_domains.c | 2 +-
>> arch/arm/mach-exynos/regs-pmu.h | 1 -
>> 2 files changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/pm_domains.c
>> b/arch/arm/mach-exynos/pm_domains.c
>> index fe6570e..f676b0a 100644
>> --- a/arch/arm/mach-exynos/pm_domains.c
>> +++ b/arch/arm/mach-exynos/pm_domains.c
>> @@ -22,7 +22,7 @@
>> #include <linux/of_platform.h>
>> #include <linux/sched.h>
>>
>> -#include "regs-pmu.h"
>> +#define S5P_INT_LOCAL_PWR_EN 0x7
>
>
> nit: You could indent the value a bit more in case of adding any new macros
> in future. While at it, you could probably also drop the S5P_ prefix.
>
Thanks for review.
Will take care of both suggestions.
Thanks,
Pankaj Dubey
> With these fixed, feel free to add my
>
> Reviewed-by: Tomasz Figa <t.figa@samsung.com>
>
> Best regards,
> Tomasz
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
> in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 05/10] ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
@ 2014-04-26 3:39 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-26 3:39 UTC (permalink / raw)
To: linux-arm-kernel
HI Tomasz,
On Sat, Apr 26, 2014 at 6:19 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Hi,
>
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>>
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> Current "pm_domain.c" file uses "S5P_INT_LOCAL_PWR_EN" definition from
>> "regs-pmu.h" and hence needs to include this header file. As there is
>> no other user of "S5P_INT_LOCAL_PWR_EN" definition other than pm_domain,
>> to remove "regs-pmu.h" header file dependency from "pm_domain.c" it's
>> better we define this definition in "pm_domain.c" file itself and thus it
>> will help in removing header file inclusion from "pm_domain.c".
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> ---
>> arch/arm/mach-exynos/pm_domains.c | 2 +-
>> arch/arm/mach-exynos/regs-pmu.h | 1 -
>> 2 files changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/pm_domains.c
>> b/arch/arm/mach-exynos/pm_domains.c
>> index fe6570e..f676b0a 100644
>> --- a/arch/arm/mach-exynos/pm_domains.c
>> +++ b/arch/arm/mach-exynos/pm_domains.c
>> @@ -22,7 +22,7 @@
>> #include <linux/of_platform.h>
>> #include <linux/sched.h>
>>
>> -#include "regs-pmu.h"
>> +#define S5P_INT_LOCAL_PWR_EN 0x7
>
>
> nit: You could indent the value a bit more in case of adding any new macros
> in future. While at it, you could probably also drop the S5P_ prefix.
>
Thanks for review.
Will take care of both suggestions.
Thanks,
Pankaj Dubey
> With these fixed, feel free to add my
>
> Reviewed-by: Tomasz Figa <t.figa@samsung.com>
>
> Best regards,
> Tomasz
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
> in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 10/10] ARM: EXYNOS: Add device tree based initialization support for PMU.
2014-04-25 22:40 ` Tomasz Figa
(?)
@ 2014-04-26 4:36 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-26 4:36 UTC (permalink / raw)
To: Tomasz Figa
Cc: linux-samsung-soc, linux-kernel, linux-arm-kernel, Kukjin Kim,
linux, Tomasz Figa, chow.kim, Young-Gun Jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
HI Tomasz,
Thanks for review.
On Sat, Apr 26, 2014 at 7:40 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Hi,
>
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>>
>> This patch adds device tree based initialization for PMU and modifies
>> PMU initialization implementation in following way:
>>
>> 1: Let's initialize PMU based on device tree compatibility string.
>> 2: Obtain PMU regmap handle using "syscon_early_regmap_lookup_by_phandle"
>> so that we can reduce dependency over machine header files.
>> 3: Separate each SoC's PMU initialization function and bind this
>> initialization
>> function with PMU compatibility string.
>> 4 : It also removes uses of soc_is_exynosXXXX() thus making PMU
>> implementation
>> independent of "plat/cpu.h".
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> ---
>> arch/arm/mach-exynos/pmu.c | 182
>> +++++++++++++++++++++++++++++++++-----------
>> 1 file changed, 138 insertions(+), 44 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
>> index 67116a5..abcf753 100644
>> --- a/arch/arm/mach-exynos/pmu.c
>> +++ b/arch/arm/mach-exynos/pmu.c
>> @@ -9,17 +9,31 @@
>> * published by the Free Software Foundation.
>> */
>>
>> -#include <linux/io.h>
>> #include <linux/kernel.h>
>> #include <linux/regmap.h>
>> -
>> -#include <plat/cpu.h>
>> +#include <linux/of.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/slab.h>
>> +#include <linux/mfd/syscon.h>
>>
>> #include "common.h"
>> #include "regs-pmu.h"
>>
>> +enum exynos_pmu_id {
>> + PMU_EXYNOS4210,
>> + PMU_EXYNOS4X12,
>> + PMU_EXYNOS4412,
>> + PMU_EXYNOS5250,
>> +};
>> +
>> +struct exynos_pmu_data {
>> + enum exynos_pmu_id pmu_id;
>> + struct regmap *pmu_regmap;
>
>
> Again, since this uses the PMU node directly and doesn't seem to access any
> registers shared with other drivers (or at least not at the time most the
> functions from this file are called) I don't think there is any reason why
> not to use of_iomap() and access the registers directly.
>
Regarding using PMU base address as regmap handle or base address I
have replied to your comments in this thread [1], so let's decide
which way is the best. So I will update accordingly.
[1]: https://lkml.org/lkml/2014/4/25/751
> What about adding more fields to this struct? For example .pmu_config,
> .pmu_config_extra (for model-specific settings, like for Exynos4412, see my
> comment below) and (*pmu_init)? Of course the regmap (or base address) would
> have to be moved outside, as it isn't const data.
>
> Then for each PMU variant there would be a static const struct will all
> those fields already filled in and entries in OF match table would already
> point to appropriate structure.
>
Thanks for suggestion. I will take care in next version.
>
>> +};
>> +
>> +struct exynos_pmu_data *pmu_data;
>> static const struct exynos_pmu_conf *exynos_pmu_config;
>> -static struct regmap *pmu_regmap;
>> +typedef void (*exynos_pmu_init_t)(void);
>>
>> static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
>> /* { .reg = address, .val = { AFTR, LPA, SLEEP } */
>> @@ -348,28 +362,31 @@ static void exynos5_init_pmu(void)
>> * Enable both SC_FEEDBACK and SC_COUNTER
>> */
>> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
>> - regmap_read(pmu_regmap, exynos5_list_both_cnt_feed[i],
>> &tmp);
>> + regmap_read(pmu_data->pmu_regmap,
>> + exynos5_list_both_cnt_feed[i], &tmp);
>> tmp |= (EXYNOS5_USE_SC_FEEDBACK |
>> EXYNOS5_USE_SC_COUNTER);
>> - regmap_write(pmu_regmap, exynos5_list_both_cnt_feed[i],
>> tmp);
>> + regmap_write(pmu_data->pmu_regmap,
>> + exynos5_list_both_cnt_feed[i], tmp);
>> }
>>
>> /*
>> * SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
>> */
>> - regmap_read(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
>> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_ARM_COMMON_OPTION,
>> &tmp);
>> tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
>> - regmap_write(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
>> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_ARM_COMMON_OPTION,
>> tmp);
>>
>> /*
>> * Disable WFI/WFE on XXX_OPTION
>> */
>> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
>> - tmp = regmap_read(pmu_regmap,
>> exynos5_list_diable_wfi_wfe[i],
>> - &tmp);
>> + tmp = regmap_read(pmu_data->pmu_regmap,
>> + exynos5_list_diable_wfi_wfe[i], &tmp);
>> tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
>> EXYNOS5_OPTION_USE_STANDBYWFI);
>> - regmap_write(pmu_regmap, exynos5_list_diable_wfi_wfe[i],
>> tmp);
>> + regmap_write(pmu_data->pmu_regmap,
>> + exynos5_list_diable_wfi_wfe[i], tmp);
>> }
>> }
>>
>> @@ -377,52 +394,129 @@ void exynos_sys_powerdown_conf(enum sys_powerdown
>> mode)
>> {
>> unsigned int i;
>>
>> - if (soc_is_exynos5250())
>> + if (pmu_data->pmu_id == PMU_EXYNOS5250)
>> exynos5_init_pmu();
>
>
> Next field could be added to exynos_pmu_data struct, called
> (*powerdown_conf) and then the code above replaced with:
>
> if (pmu_data->powerdown_conf)
> pmu_data->powerdown_conf(mode);
>
>
>>
>> for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
>> - regmap_write(pmu_regmap, exynos_pmu_config[i].offset,
>> + regmap_write(pmu_data->pmu_regmap,
>> exynos_pmu_config[i].offset,
>> exynos_pmu_config[i].val[mode]);
>>
>> - if (soc_is_exynos4412()) {
>> + if (pmu_data->pmu_id == PMU_EXYNOS4412) {
>> for (i = 0; exynos4412_pmu_config[i].offset !=
>> PMU_TABLE_END; i++)
>> - regmap_write(pmu_regmap,
>> exynos4412_pmu_config[i].offset,
>> + regmap_write(pmu_data->pmu_regmap,
>> + exynos4412_pmu_config[i].offset,
>>
>> exynos4412_pmu_config[i].val[mode]);
>> }
>
>
> As I mentioned above, the pmu_data struct could have a field called
> pmu_config_extra that would be non-NULL for Exynos4412 and then the code
> above could be replaced with:
>
> if (pmu_data->pmu_config_extra) {
> // iterate over pmu_config_extra
> // ...
> }
>
> This way you could completely remove the pmu_id field and checks for
> particular SoCs from the code.
>
>
>> }
>>
>> -static int __init exynos_pmu_init(void)
>> +static void exynos4210_pmu_init(void)
>> {
>> - unsigned int value;
>> -
>> exynos_pmu_config = exynos4210_pmu_config;
>> - pmu_regmap = get_exynos_pmuregmap();
>> -
>> - if (soc_is_exynos4210()) {
>> - exynos_pmu_config = exynos4210_pmu_config;
>> - pr_info("EXYNOS4210 PMU Initialize\n");
>> - } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
>> - exynos_pmu_config = exynos4x12_pmu_config;
>> - pr_info("EXYNOS4x12 PMU Initialize\n");
>> - } else if (soc_is_exynos5250()) {
>> - /*
>> - * When SYS_WDTRESET is set, watchdog timer reset request
>> - * is ignored by power management unit.
>> - */
>> - regmap_read(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> &value);
>> - value &= ~EXYNOS5_SYS_WDTRESET;
>> - regmap_write(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> value);
>> -
>> - regmap_read(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> &value);
>> - value &= ~EXYNOS5_SYS_WDTRESET;
>> - regmap_write(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> value);
>> -
>> - exynos_pmu_config = exynos5250_pmu_config;
>> - pr_info("EXYNOS5250 PMU Initialize\n");
>> - } else {
>> - pr_info("EXYNOS: PMU not supported\n");
>> + pmu_data->pmu_id = PMU_EXYNOS4210;
>> +
>> + pr_info("EXYNOS4210 PMU Initialize\n");
>> +}
>> +
>> +static void exynos4x12_pmu_init(void)
>> +{
>> + exynos_pmu_config = exynos4x12_pmu_config;
>> + pmu_data->pmu_id = PMU_EXYNOS4X12;
>> +
>> + pr_info("EXYNOS4x12 PMU Initialize\n");
>> +}
>> +
>> +static void exynos4412_pmu_init(void)
>> +{
>> + exynos_pmu_config = exynos4x12_pmu_config;
>> + pmu_data->pmu_id = PMU_EXYNOS4412;
>> +
>> + pr_info("EXYNOS4412 PMU Initialize\n");
>> +}
>> +
>> +static void exynos5250_pmu_init(void)
>> +{
>> + unsigned int tmp;
>> +
>> + /*
>> + * When SYS_WDTRESET is set, watchdog timer reset request
>> + * is ignored by power management unit.
>> + */
>> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> &tmp);
>> + tmp &= ~EXYNOS5_SYS_WDTRESET;
>> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> tmp);
>> +
>> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> &tmp);
>> + tmp &= ~EXYNOS5_SYS_WDTRESET;
>> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> tmp);
>> +
>> + exynos_pmu_config = exynos5250_pmu_config;
>> + pmu_data->pmu_id = PMU_EXYNOS5250;
>> +
>> + pr_info("EXYNOS5250 PMU Initialize\n");
>> +}
>
>
> This part is very nice. Finally there is no huge if with else if clause for
> every SoC. Thanks.
>
>
>> +
>> +/*
>> + * PMU platform driver and devicetree bindings.
>> + */
>> +static struct of_device_id exynos_pmu_of_device_ids[] = {
>> + {
>> + .compatible = "samsung,exynos4210-pmu",
>> + .data = (void *)exynos4210_pmu_init
>> + },
>> + {
>> + .compatible = "samsung,exynos4212-pmu",
>> + .data = (void *)exynos4x12_pmu_init
>> + },
>> + {
>> + .compatible = "samsung,exynos4412-pmu",
>> + .data = (void *)exynos4412_pmu_init
>> + },
>> + {
>> + .compatible = "samsung,exynos5250-pmu",
>> + .data = (void *)exynos5250_pmu_init
>> + },
>> + {},
>> +};
>> +
>> +static int exynos_pmu_probe(struct device_node *np)
>> +{
>> + const struct of_device_id *match;
>> + exynos_pmu_init_t exynos_pmu_init;
>> +
>> + pmu_data = kzalloc(sizeof(struct exynos_pmu_data), GFP_KERNEL);
>> + if (!pmu_data) {
>> + pr_err("exynos_pmu driver probe failed\n");
>> + return -ENOMEM;
>> }
>>
>> + match = of_match_node(exynos_pmu_of_device_ids, np);
>> + if (!match) {
>> + pr_err("fail to get matching of_match struct\n");
>> + return -EINVAL;
>> + }
>> +
>> + exynos_pmu_init = match->data;
>> +
>> + pmu_data->pmu_regmap = syscon_early_regmap_lookup_by_phandle(np,
>> + "samsung,syscon-phandle");
>> + if (IS_ERR(pmu_data->pmu_regmap)) {
>> + pr_err("failed to find exynos_pmu_regmap\n");
>> + return PTR_ERR(pmu_data->pmu_regmap);
>> + }
>> +
>> + exynos_pmu_init();
>> +
>> return 0;
>> +};
>> +
>> +static int __init exynos_pmu_of_init(void)
>> +{
>> + int ret = 0;
>> + struct device_node *np;
>> +
>> + for_each_matching_node_and_match(np, exynos_pmu_of_device_ids,
>> NULL)
>> + ret = exynos_pmu_probe(np);
>
>
> I wouldn't expect more than one PMU in the system, so probably a simple
>
> for_each_matching_node_and_match(np, exynos_pmu_of_device_ids...
> return exynos_pmu_probe(np);
>
> return -ENODEV;
>
> would be enough here.
>
OK. Will change this.
Thanks,
Pankaj Dubey
> Best regards,
> Tomasz
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
> in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 10/10] ARM: EXYNOS: Add device tree based initialization support for PMU.
@ 2014-04-26 4:36 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-26 4:36 UTC (permalink / raw)
To: Tomasz Figa
Cc: linux-samsung-soc, linux-kernel, linux-arm-kernel, Kukjin Kim,
linux, Tomasz Figa, chow.kim, Young-Gun Jang, vikas.sajjan,
s.nawrocki, b.zolnierkie
HI Tomasz,
Thanks for review.
On Sat, Apr 26, 2014 at 7:40 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Hi,
>
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>>
>> This patch adds device tree based initialization for PMU and modifies
>> PMU initialization implementation in following way:
>>
>> 1: Let's initialize PMU based on device tree compatibility string.
>> 2: Obtain PMU regmap handle using "syscon_early_regmap_lookup_by_phandle"
>> so that we can reduce dependency over machine header files.
>> 3: Separate each SoC's PMU initialization function and bind this
>> initialization
>> function with PMU compatibility string.
>> 4 : It also removes uses of soc_is_exynosXXXX() thus making PMU
>> implementation
>> independent of "plat/cpu.h".
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> ---
>> arch/arm/mach-exynos/pmu.c | 182
>> +++++++++++++++++++++++++++++++++-----------
>> 1 file changed, 138 insertions(+), 44 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
>> index 67116a5..abcf753 100644
>> --- a/arch/arm/mach-exynos/pmu.c
>> +++ b/arch/arm/mach-exynos/pmu.c
>> @@ -9,17 +9,31 @@
>> * published by the Free Software Foundation.
>> */
>>
>> -#include <linux/io.h>
>> #include <linux/kernel.h>
>> #include <linux/regmap.h>
>> -
>> -#include <plat/cpu.h>
>> +#include <linux/of.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/slab.h>
>> +#include <linux/mfd/syscon.h>
>>
>> #include "common.h"
>> #include "regs-pmu.h"
>>
>> +enum exynos_pmu_id {
>> + PMU_EXYNOS4210,
>> + PMU_EXYNOS4X12,
>> + PMU_EXYNOS4412,
>> + PMU_EXYNOS5250,
>> +};
>> +
>> +struct exynos_pmu_data {
>> + enum exynos_pmu_id pmu_id;
>> + struct regmap *pmu_regmap;
>
>
> Again, since this uses the PMU node directly and doesn't seem to access any
> registers shared with other drivers (or at least not at the time most the
> functions from this file are called) I don't think there is any reason why
> not to use of_iomap() and access the registers directly.
>
Regarding using PMU base address as regmap handle or base address I
have replied to your comments in this thread [1], so let's decide
which way is the best. So I will update accordingly.
[1]: https://lkml.org/lkml/2014/4/25/751
> What about adding more fields to this struct? For example .pmu_config,
> .pmu_config_extra (for model-specific settings, like for Exynos4412, see my
> comment below) and (*pmu_init)? Of course the regmap (or base address) would
> have to be moved outside, as it isn't const data.
>
> Then for each PMU variant there would be a static const struct will all
> those fields already filled in and entries in OF match table would already
> point to appropriate structure.
>
Thanks for suggestion. I will take care in next version.
>
>> +};
>> +
>> +struct exynos_pmu_data *pmu_data;
>> static const struct exynos_pmu_conf *exynos_pmu_config;
>> -static struct regmap *pmu_regmap;
>> +typedef void (*exynos_pmu_init_t)(void);
>>
>> static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
>> /* { .reg = address, .val = { AFTR, LPA, SLEEP } */
>> @@ -348,28 +362,31 @@ static void exynos5_init_pmu(void)
>> * Enable both SC_FEEDBACK and SC_COUNTER
>> */
>> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
>> - regmap_read(pmu_regmap, exynos5_list_both_cnt_feed[i],
>> &tmp);
>> + regmap_read(pmu_data->pmu_regmap,
>> + exynos5_list_both_cnt_feed[i], &tmp);
>> tmp |= (EXYNOS5_USE_SC_FEEDBACK |
>> EXYNOS5_USE_SC_COUNTER);
>> - regmap_write(pmu_regmap, exynos5_list_both_cnt_feed[i],
>> tmp);
>> + regmap_write(pmu_data->pmu_regmap,
>> + exynos5_list_both_cnt_feed[i], tmp);
>> }
>>
>> /*
>> * SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
>> */
>> - regmap_read(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
>> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_ARM_COMMON_OPTION,
>> &tmp);
>> tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
>> - regmap_write(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
>> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_ARM_COMMON_OPTION,
>> tmp);
>>
>> /*
>> * Disable WFI/WFE on XXX_OPTION
>> */
>> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
>> - tmp = regmap_read(pmu_regmap,
>> exynos5_list_diable_wfi_wfe[i],
>> - &tmp);
>> + tmp = regmap_read(pmu_data->pmu_regmap,
>> + exynos5_list_diable_wfi_wfe[i], &tmp);
>> tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
>> EXYNOS5_OPTION_USE_STANDBYWFI);
>> - regmap_write(pmu_regmap, exynos5_list_diable_wfi_wfe[i],
>> tmp);
>> + regmap_write(pmu_data->pmu_regmap,
>> + exynos5_list_diable_wfi_wfe[i], tmp);
>> }
>> }
>>
>> @@ -377,52 +394,129 @@ void exynos_sys_powerdown_conf(enum sys_powerdown
>> mode)
>> {
>> unsigned int i;
>>
>> - if (soc_is_exynos5250())
>> + if (pmu_data->pmu_id == PMU_EXYNOS5250)
>> exynos5_init_pmu();
>
>
> Next field could be added to exynos_pmu_data struct, called
> (*powerdown_conf) and then the code above replaced with:
>
> if (pmu_data->powerdown_conf)
> pmu_data->powerdown_conf(mode);
>
>
>>
>> for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
>> - regmap_write(pmu_regmap, exynos_pmu_config[i].offset,
>> + regmap_write(pmu_data->pmu_regmap,
>> exynos_pmu_config[i].offset,
>> exynos_pmu_config[i].val[mode]);
>>
>> - if (soc_is_exynos4412()) {
>> + if (pmu_data->pmu_id == PMU_EXYNOS4412) {
>> for (i = 0; exynos4412_pmu_config[i].offset !=
>> PMU_TABLE_END; i++)
>> - regmap_write(pmu_regmap,
>> exynos4412_pmu_config[i].offset,
>> + regmap_write(pmu_data->pmu_regmap,
>> + exynos4412_pmu_config[i].offset,
>>
>> exynos4412_pmu_config[i].val[mode]);
>> }
>
>
> As I mentioned above, the pmu_data struct could have a field called
> pmu_config_extra that would be non-NULL for Exynos4412 and then the code
> above could be replaced with:
>
> if (pmu_data->pmu_config_extra) {
> // iterate over pmu_config_extra
> // ...
> }
>
> This way you could completely remove the pmu_id field and checks for
> particular SoCs from the code.
>
>
>> }
>>
>> -static int __init exynos_pmu_init(void)
>> +static void exynos4210_pmu_init(void)
>> {
>> - unsigned int value;
>> -
>> exynos_pmu_config = exynos4210_pmu_config;
>> - pmu_regmap = get_exynos_pmuregmap();
>> -
>> - if (soc_is_exynos4210()) {
>> - exynos_pmu_config = exynos4210_pmu_config;
>> - pr_info("EXYNOS4210 PMU Initialize\n");
>> - } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
>> - exynos_pmu_config = exynos4x12_pmu_config;
>> - pr_info("EXYNOS4x12 PMU Initialize\n");
>> - } else if (soc_is_exynos5250()) {
>> - /*
>> - * When SYS_WDTRESET is set, watchdog timer reset request
>> - * is ignored by power management unit.
>> - */
>> - regmap_read(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> &value);
>> - value &= ~EXYNOS5_SYS_WDTRESET;
>> - regmap_write(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> value);
>> -
>> - regmap_read(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> &value);
>> - value &= ~EXYNOS5_SYS_WDTRESET;
>> - regmap_write(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> value);
>> -
>> - exynos_pmu_config = exynos5250_pmu_config;
>> - pr_info("EXYNOS5250 PMU Initialize\n");
>> - } else {
>> - pr_info("EXYNOS: PMU not supported\n");
>> + pmu_data->pmu_id = PMU_EXYNOS4210;
>> +
>> + pr_info("EXYNOS4210 PMU Initialize\n");
>> +}
>> +
>> +static void exynos4x12_pmu_init(void)
>> +{
>> + exynos_pmu_config = exynos4x12_pmu_config;
>> + pmu_data->pmu_id = PMU_EXYNOS4X12;
>> +
>> + pr_info("EXYNOS4x12 PMU Initialize\n");
>> +}
>> +
>> +static void exynos4412_pmu_init(void)
>> +{
>> + exynos_pmu_config = exynos4x12_pmu_config;
>> + pmu_data->pmu_id = PMU_EXYNOS4412;
>> +
>> + pr_info("EXYNOS4412 PMU Initialize\n");
>> +}
>> +
>> +static void exynos5250_pmu_init(void)
>> +{
>> + unsigned int tmp;
>> +
>> + /*
>> + * When SYS_WDTRESET is set, watchdog timer reset request
>> + * is ignored by power management unit.
>> + */
>> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> &tmp);
>> + tmp &= ~EXYNOS5_SYS_WDTRESET;
>> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> tmp);
>> +
>> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> &tmp);
>> + tmp &= ~EXYNOS5_SYS_WDTRESET;
>> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> tmp);
>> +
>> + exynos_pmu_config = exynos5250_pmu_config;
>> + pmu_data->pmu_id = PMU_EXYNOS5250;
>> +
>> + pr_info("EXYNOS5250 PMU Initialize\n");
>> +}
>
>
> This part is very nice. Finally there is no huge if with else if clause for
> every SoC. Thanks.
>
>
>> +
>> +/*
>> + * PMU platform driver and devicetree bindings.
>> + */
>> +static struct of_device_id exynos_pmu_of_device_ids[] = {
>> + {
>> + .compatible = "samsung,exynos4210-pmu",
>> + .data = (void *)exynos4210_pmu_init
>> + },
>> + {
>> + .compatible = "samsung,exynos4212-pmu",
>> + .data = (void *)exynos4x12_pmu_init
>> + },
>> + {
>> + .compatible = "samsung,exynos4412-pmu",
>> + .data = (void *)exynos4412_pmu_init
>> + },
>> + {
>> + .compatible = "samsung,exynos5250-pmu",
>> + .data = (void *)exynos5250_pmu_init
>> + },
>> + {},
>> +};
>> +
>> +static int exynos_pmu_probe(struct device_node *np)
>> +{
>> + const struct of_device_id *match;
>> + exynos_pmu_init_t exynos_pmu_init;
>> +
>> + pmu_data = kzalloc(sizeof(struct exynos_pmu_data), GFP_KERNEL);
>> + if (!pmu_data) {
>> + pr_err("exynos_pmu driver probe failed\n");
>> + return -ENOMEM;
>> }
>>
>> + match = of_match_node(exynos_pmu_of_device_ids, np);
>> + if (!match) {
>> + pr_err("fail to get matching of_match struct\n");
>> + return -EINVAL;
>> + }
>> +
>> + exynos_pmu_init = match->data;
>> +
>> + pmu_data->pmu_regmap = syscon_early_regmap_lookup_by_phandle(np,
>> + "samsung,syscon-phandle");
>> + if (IS_ERR(pmu_data->pmu_regmap)) {
>> + pr_err("failed to find exynos_pmu_regmap\n");
>> + return PTR_ERR(pmu_data->pmu_regmap);
>> + }
>> +
>> + exynos_pmu_init();
>> +
>> return 0;
>> +};
>> +
>> +static int __init exynos_pmu_of_init(void)
>> +{
>> + int ret = 0;
>> + struct device_node *np;
>> +
>> + for_each_matching_node_and_match(np, exynos_pmu_of_device_ids,
>> NULL)
>> + ret = exynos_pmu_probe(np);
>
>
> I wouldn't expect more than one PMU in the system, so probably a simple
>
> for_each_matching_node_and_match(np, exynos_pmu_of_device_ids...
> return exynos_pmu_probe(np);
>
> return -ENODEV;
>
> would be enough here.
>
OK. Will change this.
Thanks,
Pankaj Dubey
> Best regards,
> Tomasz
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
> in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 10/10] ARM: EXYNOS: Add device tree based initialization support for PMU.
@ 2014-04-26 4:36 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-26 4:36 UTC (permalink / raw)
To: linux-arm-kernel
HI Tomasz,
Thanks for review.
On Sat, Apr 26, 2014 at 7:40 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Hi,
>
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>>
>> This patch adds device tree based initialization for PMU and modifies
>> PMU initialization implementation in following way:
>>
>> 1: Let's initialize PMU based on device tree compatibility string.
>> 2: Obtain PMU regmap handle using "syscon_early_regmap_lookup_by_phandle"
>> so that we can reduce dependency over machine header files.
>> 3: Separate each SoC's PMU initialization function and bind this
>> initialization
>> function with PMU compatibility string.
>> 4 : It also removes uses of soc_is_exynosXXXX() thus making PMU
>> implementation
>> independent of "plat/cpu.h".
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> ---
>> arch/arm/mach-exynos/pmu.c | 182
>> +++++++++++++++++++++++++++++++++-----------
>> 1 file changed, 138 insertions(+), 44 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
>> index 67116a5..abcf753 100644
>> --- a/arch/arm/mach-exynos/pmu.c
>> +++ b/arch/arm/mach-exynos/pmu.c
>> @@ -9,17 +9,31 @@
>> * published by the Free Software Foundation.
>> */
>>
>> -#include <linux/io.h>
>> #include <linux/kernel.h>
>> #include <linux/regmap.h>
>> -
>> -#include <plat/cpu.h>
>> +#include <linux/of.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/slab.h>
>> +#include <linux/mfd/syscon.h>
>>
>> #include "common.h"
>> #include "regs-pmu.h"
>>
>> +enum exynos_pmu_id {
>> + PMU_EXYNOS4210,
>> + PMU_EXYNOS4X12,
>> + PMU_EXYNOS4412,
>> + PMU_EXYNOS5250,
>> +};
>> +
>> +struct exynos_pmu_data {
>> + enum exynos_pmu_id pmu_id;
>> + struct regmap *pmu_regmap;
>
>
> Again, since this uses the PMU node directly and doesn't seem to access any
> registers shared with other drivers (or at least not at the time most the
> functions from this file are called) I don't think there is any reason why
> not to use of_iomap() and access the registers directly.
>
Regarding using PMU base address as regmap handle or base address I
have replied to your comments in this thread [1], so let's decide
which way is the best. So I will update accordingly.
[1]: https://lkml.org/lkml/2014/4/25/751
> What about adding more fields to this struct? For example .pmu_config,
> .pmu_config_extra (for model-specific settings, like for Exynos4412, see my
> comment below) and (*pmu_init)? Of course the regmap (or base address) would
> have to be moved outside, as it isn't const data.
>
> Then for each PMU variant there would be a static const struct will all
> those fields already filled in and entries in OF match table would already
> point to appropriate structure.
>
Thanks for suggestion. I will take care in next version.
>
>> +};
>> +
>> +struct exynos_pmu_data *pmu_data;
>> static const struct exynos_pmu_conf *exynos_pmu_config;
>> -static struct regmap *pmu_regmap;
>> +typedef void (*exynos_pmu_init_t)(void);
>>
>> static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
>> /* { .reg = address, .val = { AFTR, LPA, SLEEP } */
>> @@ -348,28 +362,31 @@ static void exynos5_init_pmu(void)
>> * Enable both SC_FEEDBACK and SC_COUNTER
>> */
>> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
>> - regmap_read(pmu_regmap, exynos5_list_both_cnt_feed[i],
>> &tmp);
>> + regmap_read(pmu_data->pmu_regmap,
>> + exynos5_list_both_cnt_feed[i], &tmp);
>> tmp |= (EXYNOS5_USE_SC_FEEDBACK |
>> EXYNOS5_USE_SC_COUNTER);
>> - regmap_write(pmu_regmap, exynos5_list_both_cnt_feed[i],
>> tmp);
>> + regmap_write(pmu_data->pmu_regmap,
>> + exynos5_list_both_cnt_feed[i], tmp);
>> }
>>
>> /*
>> * SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
>> */
>> - regmap_read(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, &tmp);
>> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_ARM_COMMON_OPTION,
>> &tmp);
>> tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
>> - regmap_write(pmu_regmap, EXYNOS5_ARM_COMMON_OPTION, tmp);
>> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_ARM_COMMON_OPTION,
>> tmp);
>>
>> /*
>> * Disable WFI/WFE on XXX_OPTION
>> */
>> for (i = 0 ; i < ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
>> - tmp = regmap_read(pmu_regmap,
>> exynos5_list_diable_wfi_wfe[i],
>> - &tmp);
>> + tmp = regmap_read(pmu_data->pmu_regmap,
>> + exynos5_list_diable_wfi_wfe[i], &tmp);
>> tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
>> EXYNOS5_OPTION_USE_STANDBYWFI);
>> - regmap_write(pmu_regmap, exynos5_list_diable_wfi_wfe[i],
>> tmp);
>> + regmap_write(pmu_data->pmu_regmap,
>> + exynos5_list_diable_wfi_wfe[i], tmp);
>> }
>> }
>>
>> @@ -377,52 +394,129 @@ void exynos_sys_powerdown_conf(enum sys_powerdown
>> mode)
>> {
>> unsigned int i;
>>
>> - if (soc_is_exynos5250())
>> + if (pmu_data->pmu_id == PMU_EXYNOS5250)
>> exynos5_init_pmu();
>
>
> Next field could be added to exynos_pmu_data struct, called
> (*powerdown_conf) and then the code above replaced with:
>
> if (pmu_data->powerdown_conf)
> pmu_data->powerdown_conf(mode);
>
>
>>
>> for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
>> - regmap_write(pmu_regmap, exynos_pmu_config[i].offset,
>> + regmap_write(pmu_data->pmu_regmap,
>> exynos_pmu_config[i].offset,
>> exynos_pmu_config[i].val[mode]);
>>
>> - if (soc_is_exynos4412()) {
>> + if (pmu_data->pmu_id == PMU_EXYNOS4412) {
>> for (i = 0; exynos4412_pmu_config[i].offset !=
>> PMU_TABLE_END; i++)
>> - regmap_write(pmu_regmap,
>> exynos4412_pmu_config[i].offset,
>> + regmap_write(pmu_data->pmu_regmap,
>> + exynos4412_pmu_config[i].offset,
>>
>> exynos4412_pmu_config[i].val[mode]);
>> }
>
>
> As I mentioned above, the pmu_data struct could have a field called
> pmu_config_extra that would be non-NULL for Exynos4412 and then the code
> above could be replaced with:
>
> if (pmu_data->pmu_config_extra) {
> // iterate over pmu_config_extra
> // ...
> }
>
> This way you could completely remove the pmu_id field and checks for
> particular SoCs from the code.
>
>
>> }
>>
>> -static int __init exynos_pmu_init(void)
>> +static void exynos4210_pmu_init(void)
>> {
>> - unsigned int value;
>> -
>> exynos_pmu_config = exynos4210_pmu_config;
>> - pmu_regmap = get_exynos_pmuregmap();
>> -
>> - if (soc_is_exynos4210()) {
>> - exynos_pmu_config = exynos4210_pmu_config;
>> - pr_info("EXYNOS4210 PMU Initialize\n");
>> - } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
>> - exynos_pmu_config = exynos4x12_pmu_config;
>> - pr_info("EXYNOS4x12 PMU Initialize\n");
>> - } else if (soc_is_exynos5250()) {
>> - /*
>> - * When SYS_WDTRESET is set, watchdog timer reset request
>> - * is ignored by power management unit.
>> - */
>> - regmap_read(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> &value);
>> - value &= ~EXYNOS5_SYS_WDTRESET;
>> - regmap_write(pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> value);
>> -
>> - regmap_read(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> &value);
>> - value &= ~EXYNOS5_SYS_WDTRESET;
>> - regmap_write(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> value);
>> -
>> - exynos_pmu_config = exynos5250_pmu_config;
>> - pr_info("EXYNOS5250 PMU Initialize\n");
>> - } else {
>> - pr_info("EXYNOS: PMU not supported\n");
>> + pmu_data->pmu_id = PMU_EXYNOS4210;
>> +
>> + pr_info("EXYNOS4210 PMU Initialize\n");
>> +}
>> +
>> +static void exynos4x12_pmu_init(void)
>> +{
>> + exynos_pmu_config = exynos4x12_pmu_config;
>> + pmu_data->pmu_id = PMU_EXYNOS4X12;
>> +
>> + pr_info("EXYNOS4x12 PMU Initialize\n");
>> +}
>> +
>> +static void exynos4412_pmu_init(void)
>> +{
>> + exynos_pmu_config = exynos4x12_pmu_config;
>> + pmu_data->pmu_id = PMU_EXYNOS4412;
>> +
>> + pr_info("EXYNOS4412 PMU Initialize\n");
>> +}
>> +
>> +static void exynos5250_pmu_init(void)
>> +{
>> + unsigned int tmp;
>> +
>> + /*
>> + * When SYS_WDTRESET is set, watchdog timer reset request
>> + * is ignored by power management unit.
>> + */
>> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> &tmp);
>> + tmp &= ~EXYNOS5_SYS_WDTRESET;
>> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_AUTO_WDTRESET_DISABLE,
>> tmp);
>> +
>> + regmap_read(pmu_data->pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> &tmp);
>> + tmp &= ~EXYNOS5_SYS_WDTRESET;
>> + regmap_write(pmu_data->pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST,
>> tmp);
>> +
>> + exynos_pmu_config = exynos5250_pmu_config;
>> + pmu_data->pmu_id = PMU_EXYNOS5250;
>> +
>> + pr_info("EXYNOS5250 PMU Initialize\n");
>> +}
>
>
> This part is very nice. Finally there is no huge if with else if clause for
> every SoC. Thanks.
>
>
>> +
>> +/*
>> + * PMU platform driver and devicetree bindings.
>> + */
>> +static struct of_device_id exynos_pmu_of_device_ids[] = {
>> + {
>> + .compatible = "samsung,exynos4210-pmu",
>> + .data = (void *)exynos4210_pmu_init
>> + },
>> + {
>> + .compatible = "samsung,exynos4212-pmu",
>> + .data = (void *)exynos4x12_pmu_init
>> + },
>> + {
>> + .compatible = "samsung,exynos4412-pmu",
>> + .data = (void *)exynos4412_pmu_init
>> + },
>> + {
>> + .compatible = "samsung,exynos5250-pmu",
>> + .data = (void *)exynos5250_pmu_init
>> + },
>> + {},
>> +};
>> +
>> +static int exynos_pmu_probe(struct device_node *np)
>> +{
>> + const struct of_device_id *match;
>> + exynos_pmu_init_t exynos_pmu_init;
>> +
>> + pmu_data = kzalloc(sizeof(struct exynos_pmu_data), GFP_KERNEL);
>> + if (!pmu_data) {
>> + pr_err("exynos_pmu driver probe failed\n");
>> + return -ENOMEM;
>> }
>>
>> + match = of_match_node(exynos_pmu_of_device_ids, np);
>> + if (!match) {
>> + pr_err("fail to get matching of_match struct\n");
>> + return -EINVAL;
>> + }
>> +
>> + exynos_pmu_init = match->data;
>> +
>> + pmu_data->pmu_regmap = syscon_early_regmap_lookup_by_phandle(np,
>> + "samsung,syscon-phandle");
>> + if (IS_ERR(pmu_data->pmu_regmap)) {
>> + pr_err("failed to find exynos_pmu_regmap\n");
>> + return PTR_ERR(pmu_data->pmu_regmap);
>> + }
>> +
>> + exynos_pmu_init();
>> +
>> return 0;
>> +};
>> +
>> +static int __init exynos_pmu_of_init(void)
>> +{
>> + int ret = 0;
>> + struct device_node *np;
>> +
>> + for_each_matching_node_and_match(np, exynos_pmu_of_device_ids,
>> NULL)
>> + ret = exynos_pmu_probe(np);
>
>
> I wouldn't expect more than one PMU in the system, so probably a simple
>
> for_each_matching_node_and_match(np, exynos_pmu_of_device_ids...
> return exynos_pmu_probe(np);
>
> return -ENODEV;
>
> would be enough here.
>
OK. Will change this.
Thanks,
Pankaj Dubey
> Best regards,
> Tomasz
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
> in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 01/10] ARM: EXYNOS: Make exynos machine_ops as static
2014-04-25 21:05 ` Tomasz Figa
(?)
@ 2014-04-26 4:42 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-26 4:42 UTC (permalink / raw)
To: Tomasz Figa
Cc: linux-samsung-soc, linux-kernel, linux-arm-kernel, Kukjin Kim,
linux, b.zolnierkie, Tomasz Figa, Young-Gun Jang, s.nawrocki,
vikas.sajjan, chow.kim
HI Tomasz,
Thanks for review and suggestions.
On Sat, Apr 26, 2014 at 6:05 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Hi Pankaj,
>
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>>
>> As machine function ops are used only in this file let's make
>> them static.
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/exynos.c | 6 +++---
>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index b32a907..2388ee4 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -198,7 +198,7 @@ static struct map_desc exynos5_iodesc[] __initdata = {
>> },
>> };
>>
>> -void exynos_restart(enum reboot_mode mode, const char *cmd)
>> +static void exynos_restart(enum reboot_mode mode, const char *cmd)
>> {
>> struct device_node *np;
>> u32 val = 0x1;
>> @@ -235,7 +235,7 @@ void __init exynos_cpufreq_init(void)
>> platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);
>> }
>>
>> -void __init exynos_init_late(void)
>> +static void __init exynos_init_late(void)
>> {
>> if (of_machine_is_compatible("samsung,exynos5440"))
>> /* to be supported later */
>> @@ -296,7 +296,7 @@ static void __init exynos_map_io(void)
>> iotable_init(exynos5250_iodesc,
>> ARRAY_SIZE(exynos5250_iodesc));
>> }
>>
>> -void __init exynos_init_io(void)
>> +static void __init exynos_init_io(void)
>> {
>> debug_ll_io_init();
>>
>>
>
> This patch seems to be irrelevant to the rest of this series. Anyway, the
> changes itself are fine, except that I can see more functions that could be
> made static as well:
> - exynos_cpuidle_init(),
> - exynos_cpufreq_init().
>
> In fact, they both could be probably eliminated, as they are just oneliners
> doing things that could be done in exynos_dt_machine_init() directly.
>
> So, if you are doing this kind of cleanup, you could do this as well and
> probably also replace platform_device + platform_device_register() with
> platform_device_register_simple() for cpuidle, to reduce line count and make
> it consistent with cpufreq.
>
OK, I will take care of this.
Also will separate these patches from PMU series.
Thanks,
Pankaj Dubey
> Best regards,
> Tomasz
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 01/10] ARM: EXYNOS: Make exynos machine_ops as static
@ 2014-04-26 4:42 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-26 4:42 UTC (permalink / raw)
To: Tomasz Figa
Cc: linux-samsung-soc, linux-kernel, linux-arm-kernel, Kukjin Kim,
linux, b.zolnierkie, Tomasz Figa, Young-Gun Jang, s.nawrocki,
vikas.sajjan, chow.kim
HI Tomasz,
Thanks for review and suggestions.
On Sat, Apr 26, 2014 at 6:05 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Hi Pankaj,
>
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>>
>> As machine function ops are used only in this file let's make
>> them static.
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/exynos.c | 6 +++---
>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index b32a907..2388ee4 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -198,7 +198,7 @@ static struct map_desc exynos5_iodesc[] __initdata = {
>> },
>> };
>>
>> -void exynos_restart(enum reboot_mode mode, const char *cmd)
>> +static void exynos_restart(enum reboot_mode mode, const char *cmd)
>> {
>> struct device_node *np;
>> u32 val = 0x1;
>> @@ -235,7 +235,7 @@ void __init exynos_cpufreq_init(void)
>> platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);
>> }
>>
>> -void __init exynos_init_late(void)
>> +static void __init exynos_init_late(void)
>> {
>> if (of_machine_is_compatible("samsung,exynos5440"))
>> /* to be supported later */
>> @@ -296,7 +296,7 @@ static void __init exynos_map_io(void)
>> iotable_init(exynos5250_iodesc,
>> ARRAY_SIZE(exynos5250_iodesc));
>> }
>>
>> -void __init exynos_init_io(void)
>> +static void __init exynos_init_io(void)
>> {
>> debug_ll_io_init();
>>
>>
>
> This patch seems to be irrelevant to the rest of this series. Anyway, the
> changes itself are fine, except that I can see more functions that could be
> made static as well:
> - exynos_cpuidle_init(),
> - exynos_cpufreq_init().
>
> In fact, they both could be probably eliminated, as they are just oneliners
> doing things that could be done in exynos_dt_machine_init() directly.
>
> So, if you are doing this kind of cleanup, you could do this as well and
> probably also replace platform_device + platform_device_register() with
> platform_device_register_simple() for cpuidle, to reduce line count and make
> it consistent with cpufreq.
>
OK, I will take care of this.
Also will separate these patches from PMU series.
Thanks,
Pankaj Dubey
> Best regards,
> Tomasz
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 01/10] ARM: EXYNOS: Make exynos machine_ops as static
@ 2014-04-26 4:42 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-26 4:42 UTC (permalink / raw)
To: linux-arm-kernel
HI Tomasz,
Thanks for review and suggestions.
On Sat, Apr 26, 2014 at 6:05 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Hi Pankaj,
>
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>>
>> As machine function ops are used only in this file let's make
>> them static.
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/exynos.c | 6 +++---
>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index b32a907..2388ee4 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -198,7 +198,7 @@ static struct map_desc exynos5_iodesc[] __initdata = {
>> },
>> };
>>
>> -void exynos_restart(enum reboot_mode mode, const char *cmd)
>> +static void exynos_restart(enum reboot_mode mode, const char *cmd)
>> {
>> struct device_node *np;
>> u32 val = 0x1;
>> @@ -235,7 +235,7 @@ void __init exynos_cpufreq_init(void)
>> platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);
>> }
>>
>> -void __init exynos_init_late(void)
>> +static void __init exynos_init_late(void)
>> {
>> if (of_machine_is_compatible("samsung,exynos5440"))
>> /* to be supported later */
>> @@ -296,7 +296,7 @@ static void __init exynos_map_io(void)
>> iotable_init(exynos5250_iodesc,
>> ARRAY_SIZE(exynos5250_iodesc));
>> }
>>
>> -void __init exynos_init_io(void)
>> +static void __init exynos_init_io(void)
>> {
>> debug_ll_io_init();
>>
>>
>
> This patch seems to be irrelevant to the rest of this series. Anyway, the
> changes itself are fine, except that I can see more functions that could be
> made static as well:
> - exynos_cpuidle_init(),
> - exynos_cpufreq_init().
>
> In fact, they both could be probably eliminated, as they are just oneliners
> doing things that could be done in exynos_dt_machine_init() directly.
>
> So, if you are doing this kind of cleanup, you could do this as well and
> probably also replace platform_device + platform_device_register() with
> platform_device_register_simple() for cpuidle, to reduce line count and make
> it consistent with cpufreq.
>
OK, I will take care of this.
Also will separate these patches from PMU series.
Thanks,
Pankaj Dubey
> Best regards,
> Tomasz
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 110+ messages in thread
* Re: [PATCH v2 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
2014-04-25 21:43 ` Tomasz Figa
@ 2014-04-27 7:29 ` Pankaj Dubey
-1 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-27 7:29 UTC (permalink / raw)
To: Tomasz Figa
Cc: linux-samsung-soc, linux-kernel, linux-arm-kernel, kgene.kim,
linux, t.figa, chow.kim, yg1004.jang, vikas.sajjan, s.nawrocki,
b.zolnierkie
Hi Tomasz,
Thanks for review.
On 04/26/2014 06:43 AM, Tomasz Figa wrote:
> Hi,
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> Add support for mapping Samsung Power Management Unit (PMU) base address
>> from device tree. Code will use existing samsung pmu binding information.
>> This patch also adds two helper functions as "get_exynos_pmuregmap" and
>> "get_exynos_pmuaddr".
>> "get_exynos_pmuregmap" returns a regmap based PMU register handle where as
>> "get_exynos_pmuaddr" returns ioremap virtual address.
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/Kconfig | 2 ++
>> arch/arm/mach-exynos/common.h | 3 ++
>> arch/arm/mach-exynos/exynos.c | 78 +++++++++++++++++++++++++++++++++++++++++
>> 3 files changed, 83 insertions(+)
>>
>> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
>> index fc8bf18..2f60c90 100644
>> --- a/arch/arm/mach-exynos/Kconfig
>> +++ b/arch/arm/mach-exynos/Kconfig
>> @@ -26,6 +26,7 @@ config ARCH_EXYNOS4
>> select PINCTRL
>> select PM_GENERIC_DOMAINS if PM_RUNTIME
>> select S5P_DEV_MFC
>> + select MFD_SYSCON
>> help
>> Samsung EXYNOS4 SoCs based systems
>>
>> @@ -36,6 +37,7 @@ config ARCH_EXYNOS5
>> select HAVE_ARM_SCU if SMP
>> select HAVE_SMP
>> select PINCTRL
>> + select MFD_SYSCON
>> help
>> Samsung EXYNOS5 (Cortex-A15) SoC based systems
>>
>> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
>> index 31c5964..ecfd0fc 100644
>> --- a/arch/arm/mach-exynos/common.h
>> +++ b/arch/arm/mach-exynos/common.h
>> @@ -57,4 +57,7 @@ struct exynos_pmu_conf {
>>
>> extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
>>
>> +extern struct regmap *get_exynos_pmuregmap(void);
>> +extern void __iomem *get_exynos_pmuaddr(void);
>
> Do you really need these functions? Couldn't all the drivers using PMU simply
> call syscon_regmap_lookup_by_phandle() or of_iomap() directly?
Well, currently "get_exynos_pmuregmap" is used in three location under
mach-exynos as "exynos.c", "pm.c" and "hotplug.c" so just to avoid duplicate code
in all these files I added "get_exynos_pmuregmap" as helper function in "exynos.c".
So in my opinion it should be fine. What do you say?
Regarding "get_exynos_pmuaddr", only user of this function is "platsmp.c" so I can
move this function in platsmp.c and remove this helper. This will also solve the
other
issue of early mapping as you raised below.
>
>> +
>> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index d6f405f..68f60e1 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -19,6 +19,7 @@
>> #include <linux/of_platform.h>
>> #include <linux/platform_device.h>
>> #include <linux/pm_domain.h>
>> +#include <linux/mfd/syscon.h>
>>
>> #include <asm/cacheflush.h>
>> #include <asm/hardware/cache-l2x0.h>
>> @@ -36,6 +37,9 @@
>> #define L2_AUX_VAL 0x7C470001
>> #define L2_AUX_MASK 0xC200ffff
>>
>> +static struct regmap *exynos_pmu_regmap;
>> +static void __iomem *exynos_pmu_base;
>> +
>> static struct map_desc exynos4_iodesc[] __initdata = {
>> {
>> .virtual = (unsigned long)S3C_VA_SYS,
>> @@ -269,6 +273,46 @@ static int __init exynos_fdt_map_chipid(unsigned long
>> node, const char *uname,
>> return 1;
>> }
>>
>> +static const struct of_device_id exynos_dt_pmu_match[] = {
>> + { .compatible = "samsung,exynos4210-pmu" },
>> + { .compatible = "samsung,exynos4212-pmu" },
>> + { .compatible = "samsung,exynos4412-pmu" },
>> + { .compatible = "samsung,exynos5250-pmu" },
>> + {},
>> +};
>> +
>> +static int __init exynos_fdt_map_pmu(unsigned long node,
>> + const char *uname, int depth, void *data)
>> +{
>> + struct map_desc iodesc;
>> + __be32 *reg;
>> + unsigned long len;
>> + phys_addr_t phys_addr;
>> + const struct of_device_id *matches = exynos_dt_pmu_match;
>> +
>> + for (; matches->compatible[0]; matches++) {
>> + if (!of_flat_dt_is_compatible(node, matches->compatible))
>> + continue;
>> + reg = of_get_flat_dt_prop(node, "reg", &len);
>> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
>> + return 0;
>> +
>> + phys_addr = be32_to_cpu(reg[0]);
>> + iodesc.pfn = __phys_to_pfn(phys_addr);
>> + iodesc.length = be32_to_cpu(reg[1]) - 1;
>> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
>> + iodesc.type = MT_DEVICE;
>> + iotable_init(&iodesc, 1);
>> +
>> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
>> + if (WARN_ON(!exynos_pmu_base))
>> + return -EFAULT;
>> + return 1;
>> + }
>> +
>> + return 0;
>> +}
>
> Is such early mapping really needed? Couldn't the code using PMU be deferred
> to the stage that memory management is available and then of_iomap() used
> directly?
OK, not really required, If I move mapping of PMU base address to platsmp.c.
As "exynos_pmu_base" is only required in platsmp.c during "exynos_smp_prepare_cpus"
function call, I can move mapping of PMU address in platsmp.c itself and there I
can use of_iomap.
>
>> +
>> /*
>> * exynos_map_io
>> *
>> @@ -302,6 +346,7 @@ static void __init exynos_init_io(void)
>> debug_ll_io_init();
>>
>> of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
>> + of_scan_flat_dt(exynos_fdt_map_pmu, NULL);
>>
>> /* detect cpu id and rev. */
>> s5p_init_cpu(S5P_VA_CHIPID);
>> @@ -336,6 +381,38 @@ static int __init exynos4_l2x0_cache_init(void)
>> }
>> early_initcall(exynos4_l2x0_cache_init);
>>
>> +
>> +inline struct regmap *get_exynos_pmuregmap()
>> +{
>> + return exynos_pmu_regmap;
>> +}
>> +
>> +inline void __iomem *get_exynos_pmuaddr()
>> +{
>> + return exynos_pmu_base;
>> +}
>
> Hmm, non-static inline inside a C file? Probably should be either static
> inline or non-static non-inline. (Assuming that both are really needed, as I
> pointed in the comments above.)
OK, will remove "get_exynos_pmuaddr" and make "get_exynos_pmuregmap" as
non-static non-inline.
>
>> +
>> +
>> +void __init exynos_map_pmu(void)
>> +{
>> + struct device_node *np = NULL;
>> +
>> + early_syscon_init();
>> +
>> + np = of_find_matching_node(NULL, exynos_dt_pmu_match);
>> +
>> + if (!np) {
>> + pr_err("Failed to find PMU node\n");
>> + return;
>> + } else {
>> + exynos_pmu_regmap = syscon_early_regmap_lookup_by_phandle(np,
>> + "samsung,syscon-phandle");
>
> Do you need this regmap really here? I believe it should be the code using PMU
> registers which calls this function directly to retrieve a handle to the syscon.
>
Yes, as "exynos_restart" is accessing one PMU register. So even though all callers
(pm.c and hotplug.c) directly retrieve a regmap handle to PMU, we need regmap handle
in this file also. So as I mentioned above just to avoid duplicate code in all
files we can
retrieve regmap handle in "exynos.c" and using helper function other files can
use it.
> Best regards,
> Tomasz
>
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
* [PATCH v2 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT
@ 2014-04-27 7:29 ` Pankaj Dubey
0 siblings, 0 replies; 110+ messages in thread
From: Pankaj Dubey @ 2014-04-27 7:29 UTC (permalink / raw)
To: linux-arm-kernel
Hi Tomasz,
Thanks for review.
On 04/26/2014 06:43 AM, Tomasz Figa wrote:
> Hi,
>
> On 25.04.2014 14:32, Pankaj Dubey wrote:
>> From: Young-Gun Jang <yg1004.jang@samsung.com>
>>
>> Add support for mapping Samsung Power Management Unit (PMU) base address
>> from device tree. Code will use existing samsung pmu binding information.
>> This patch also adds two helper functions as "get_exynos_pmuregmap" and
>> "get_exynos_pmuaddr".
>> "get_exynos_pmuregmap" returns a regmap based PMU register handle where as
>> "get_exynos_pmuaddr" returns ioremap virtual address.
>>
>> Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> arch/arm/mach-exynos/Kconfig | 2 ++
>> arch/arm/mach-exynos/common.h | 3 ++
>> arch/arm/mach-exynos/exynos.c | 78 +++++++++++++++++++++++++++++++++++++++++
>> 3 files changed, 83 insertions(+)
>>
>> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
>> index fc8bf18..2f60c90 100644
>> --- a/arch/arm/mach-exynos/Kconfig
>> +++ b/arch/arm/mach-exynos/Kconfig
>> @@ -26,6 +26,7 @@ config ARCH_EXYNOS4
>> select PINCTRL
>> select PM_GENERIC_DOMAINS if PM_RUNTIME
>> select S5P_DEV_MFC
>> + select MFD_SYSCON
>> help
>> Samsung EXYNOS4 SoCs based systems
>>
>> @@ -36,6 +37,7 @@ config ARCH_EXYNOS5
>> select HAVE_ARM_SCU if SMP
>> select HAVE_SMP
>> select PINCTRL
>> + select MFD_SYSCON
>> help
>> Samsung EXYNOS5 (Cortex-A15) SoC based systems
>>
>> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
>> index 31c5964..ecfd0fc 100644
>> --- a/arch/arm/mach-exynos/common.h
>> +++ b/arch/arm/mach-exynos/common.h
>> @@ -57,4 +57,7 @@ struct exynos_pmu_conf {
>>
>> extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
>>
>> +extern struct regmap *get_exynos_pmuregmap(void);
>> +extern void __iomem *get_exynos_pmuaddr(void);
>
> Do you really need these functions? Couldn't all the drivers using PMU simply
> call syscon_regmap_lookup_by_phandle() or of_iomap() directly?
Well, currently "get_exynos_pmuregmap" is used in three location under
mach-exynos as "exynos.c", "pm.c" and "hotplug.c" so just to avoid duplicate code
in all these files I added "get_exynos_pmuregmap" as helper function in "exynos.c".
So in my opinion it should be fine. What do you say?
Regarding "get_exynos_pmuaddr", only user of this function is "platsmp.c" so I can
move this function in platsmp.c and remove this helper. This will also solve the
other
issue of early mapping as you raised below.
>
>> +
>> #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
>> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
>> index d6f405f..68f60e1 100644
>> --- a/arch/arm/mach-exynos/exynos.c
>> +++ b/arch/arm/mach-exynos/exynos.c
>> @@ -19,6 +19,7 @@
>> #include <linux/of_platform.h>
>> #include <linux/platform_device.h>
>> #include <linux/pm_domain.h>
>> +#include <linux/mfd/syscon.h>
>>
>> #include <asm/cacheflush.h>
>> #include <asm/hardware/cache-l2x0.h>
>> @@ -36,6 +37,9 @@
>> #define L2_AUX_VAL 0x7C470001
>> #define L2_AUX_MASK 0xC200ffff
>>
>> +static struct regmap *exynos_pmu_regmap;
>> +static void __iomem *exynos_pmu_base;
>> +
>> static struct map_desc exynos4_iodesc[] __initdata = {
>> {
>> .virtual = (unsigned long)S3C_VA_SYS,
>> @@ -269,6 +273,46 @@ static int __init exynos_fdt_map_chipid(unsigned long
>> node, const char *uname,
>> return 1;
>> }
>>
>> +static const struct of_device_id exynos_dt_pmu_match[] = {
>> + { .compatible = "samsung,exynos4210-pmu" },
>> + { .compatible = "samsung,exynos4212-pmu" },
>> + { .compatible = "samsung,exynos4412-pmu" },
>> + { .compatible = "samsung,exynos5250-pmu" },
>> + {},
>> +};
>> +
>> +static int __init exynos_fdt_map_pmu(unsigned long node,
>> + const char *uname, int depth, void *data)
>> +{
>> + struct map_desc iodesc;
>> + __be32 *reg;
>> + unsigned long len;
>> + phys_addr_t phys_addr;
>> + const struct of_device_id *matches = exynos_dt_pmu_match;
>> +
>> + for (; matches->compatible[0]; matches++) {
>> + if (!of_flat_dt_is_compatible(node, matches->compatible))
>> + continue;
>> + reg = of_get_flat_dt_prop(node, "reg", &len);
>> + if (reg == NULL || len != (sizeof(unsigned long) * 2))
>> + return 0;
>> +
>> + phys_addr = be32_to_cpu(reg[0]);
>> + iodesc.pfn = __phys_to_pfn(phys_addr);
>> + iodesc.length = be32_to_cpu(reg[1]) - 1;
>> + iodesc.virtual = (unsigned long)S5P_VA_PMU;
>> + iodesc.type = MT_DEVICE;
>> + iotable_init(&iodesc, 1);
>> +
>> + exynos_pmu_base = ioremap(phys_addr, be32_to_cpu(reg[1]));
>> + if (WARN_ON(!exynos_pmu_base))
>> + return -EFAULT;
>> + return 1;
>> + }
>> +
>> + return 0;
>> +}
>
> Is such early mapping really needed? Couldn't the code using PMU be deferred
> to the stage that memory management is available and then of_iomap() used
> directly?
OK, not really required, If I move mapping of PMU base address to platsmp.c.
As "exynos_pmu_base" is only required in platsmp.c during "exynos_smp_prepare_cpus"
function call, I can move mapping of PMU address in platsmp.c itself and there I
can use of_iomap.
>
>> +
>> /*
>> * exynos_map_io
>> *
>> @@ -302,6 +346,7 @@ static void __init exynos_init_io(void)
>> debug_ll_io_init();
>>
>> of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
>> + of_scan_flat_dt(exynos_fdt_map_pmu, NULL);
>>
>> /* detect cpu id and rev. */
>> s5p_init_cpu(S5P_VA_CHIPID);
>> @@ -336,6 +381,38 @@ static int __init exynos4_l2x0_cache_init(void)
>> }
>> early_initcall(exynos4_l2x0_cache_init);
>>
>> +
>> +inline struct regmap *get_exynos_pmuregmap()
>> +{
>> + return exynos_pmu_regmap;
>> +}
>> +
>> +inline void __iomem *get_exynos_pmuaddr()
>> +{
>> + return exynos_pmu_base;
>> +}
>
> Hmm, non-static inline inside a C file? Probably should be either static
> inline or non-static non-inline. (Assuming that both are really needed, as I
> pointed in the comments above.)
OK, will remove "get_exynos_pmuaddr" and make "get_exynos_pmuregmap" as
non-static non-inline.
>
>> +
>> +
>> +void __init exynos_map_pmu(void)
>> +{
>> + struct device_node *np = NULL;
>> +
>> + early_syscon_init();
>> +
>> + np = of_find_matching_node(NULL, exynos_dt_pmu_match);
>> +
>> + if (!np) {
>> + pr_err("Failed to find PMU node\n");
>> + return;
>> + } else {
>> + exynos_pmu_regmap = syscon_early_regmap_lookup_by_phandle(np,
>> + "samsung,syscon-phandle");
>
> Do you need this regmap really here? I believe it should be the code using PMU
> registers which calls this function directly to retrieve a handle to the syscon.
>
Yes, as "exynos_restart" is accessing one PMU register. So even though all callers
(pm.c and hotplug.c) directly retrieve a regmap handle to PMU, we need regmap handle
in this file also. So as I mentioned above just to avoid duplicate code in all
files we can
retrieve regmap handle in "exynos.c" and using helper function other files can
use it.
> Best regards,
> Tomasz
>
--
Best Regards,
Pankaj Dubey
^ permalink raw reply [flat|nested] 110+ messages in thread
end of thread, other threads:[~2014-04-27 7:29 UTC | newest]
Thread overview: 110+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-04-02 7:50 [PATCH 0/7] ARM: Exynos: PMU cleanup and refactoring for using DT Pankaj Dubey
2014-04-02 7:50 ` Pankaj Dubey
2014-04-02 7:50 ` [PATCH 01/10] ARM: EXYNOS: Cleanup "mach-exynos/common.h" file Pankaj Dubey
2014-04-02 7:50 ` Pankaj Dubey
2014-04-08 15:59 ` Tomasz Figa
2014-04-08 15:59 ` Tomasz Figa
2014-04-10 4:35 ` Pankaj Dubey
2014-04-10 4:35 ` Pankaj Dubey
2014-04-02 7:50 ` [PATCH 02/10] ARM: EXYNOS: Correct file path in comment message Pankaj Dubey
2014-04-02 7:50 ` Pankaj Dubey
2014-04-02 12:01 ` Michal Simek
2014-04-02 12:01 ` Michal Simek
2014-04-03 1:40 ` Pankaj Dubey
2014-04-03 1:40 ` Pankaj Dubey
2014-04-03 2:12 ` Kukjin Kim
2014-04-03 2:12 ` Kukjin Kim
2014-04-02 7:50 ` [PATCH 03/10] ARM: EXYNOS: Move SYSREG definition into sys-reg specific file Pankaj Dubey
2014-04-02 7:50 ` Pankaj Dubey
2014-04-02 11:27 ` Sylwester Nawrocki
2014-04-02 11:27 ` Sylwester Nawrocki
2014-04-11 6:07 ` Pankaj Dubey
2014-04-11 6:07 ` Pankaj Dubey
2014-04-02 7:50 ` [PATCH 04/10] ARM: EXYNOS: Remove regs-pmu.h file dependency from pm_domain Pankaj Dubey
2014-04-02 7:50 ` Pankaj Dubey
2014-04-02 7:50 ` [PATCH 05/10] ARM: EXYNOS: Move "regs-pmu" header inclusion in common.h Pankaj Dubey
2014-04-02 7:50 ` Pankaj Dubey
2014-04-08 16:09 ` Tomasz Figa
2014-04-08 16:09 ` Tomasz Figa
2014-04-10 4:58 ` Pankaj Dubey
2014-04-10 4:58 ` Pankaj Dubey
2014-04-02 7:50 ` [PATCH 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT Pankaj Dubey
2014-04-02 7:50 ` Pankaj Dubey
2014-04-02 11:48 ` Sylwester Nawrocki
2014-04-02 11:48 ` Sylwester Nawrocki
2014-04-02 12:15 ` Michal Simek
2014-04-02 12:15 ` Michal Simek
2014-04-03 9:07 ` Sylwester Nawrocki
2014-04-03 9:07 ` Sylwester Nawrocki
2014-04-05 10:58 ` Pankaj Dubey
2014-04-05 10:58 ` Pankaj Dubey
2014-04-07 6:02 ` Michal Simek
2014-04-07 6:02 ` Michal Simek
2014-04-05 10:53 ` Pankaj Dubey
2014-04-05 10:53 ` Pankaj Dubey
2014-04-05 10:53 ` Pankaj Dubey
2014-04-23 13:02 ` Vikas Sajjan
2014-04-23 13:02 ` Vikas Sajjan
2014-04-23 13:02 ` Vikas Sajjan
2014-04-24 2:45 ` Pankaj Dubey
2014-04-24 2:45 ` Pankaj Dubey
2014-04-24 2:45 ` Pankaj Dubey
2014-04-02 7:50 ` [PATCH 07/10] ARM: EXYNOS: Refactored code for PMU register mapping " Pankaj Dubey
2014-04-02 7:50 ` Pankaj Dubey
2014-04-25 12:32 ` [PATCH v2 00/10] ARM: Exynos: PMU cleanup and refactoring for using DT Pankaj Dubey
2014-04-25 12:32 ` Pankaj Dubey
2014-04-25 12:32 ` [PATCH v2 01/10] ARM: EXYNOS: Make exynos machine_ops as static Pankaj Dubey
2014-04-25 12:32 ` Pankaj Dubey
2014-04-25 21:05 ` Tomasz Figa
2014-04-25 21:05 ` Tomasz Figa
2014-04-26 4:42 ` Pankaj Dubey
2014-04-26 4:42 ` Pankaj Dubey
2014-04-26 4:42 ` Pankaj Dubey
2014-04-25 12:32 ` [PATCH v2 02/10] ARM: EXYNOS: Cleanup "mach-exynos/common.h" file Pankaj Dubey
2014-04-25 12:32 ` Pankaj Dubey
2014-04-25 21:06 ` Tomasz Figa
2014-04-25 21:06 ` Tomasz Figa
2014-04-25 12:32 ` [PATCH v2 03/10] ARM: EXYNOS: Move SYSREG definition into sys-reg specific file Pankaj Dubey
2014-04-25 12:32 ` Pankaj Dubey
2014-04-25 21:08 ` Tomasz Figa
2014-04-25 21:08 ` Tomasz Figa
2014-04-25 12:32 ` [PATCH v2 04/10] ARM: EXYNOS: Remove file path from comment section Pankaj Dubey
2014-04-25 12:32 ` Pankaj Dubey
2014-04-25 21:14 ` Tomasz Figa
2014-04-25 21:14 ` Tomasz Figa
2014-04-25 12:32 ` [PATCH v2 05/10] ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain Pankaj Dubey
2014-04-25 12:32 ` Pankaj Dubey
2014-04-25 21:19 ` Tomasz Figa
2014-04-25 21:19 ` Tomasz Figa
2014-04-26 3:39 ` Pankaj Dubey
2014-04-26 3:39 ` Pankaj Dubey
2014-04-26 3:39 ` Pankaj Dubey
2014-04-25 12:32 ` [PATCH v2 06/10] ARM: EXYNOS: Add support for mapping PMU base address via DT Pankaj Dubey
2014-04-25 12:32 ` Pankaj Dubey
2014-04-25 21:43 ` Tomasz Figa
2014-04-25 21:43 ` Tomasz Figa
2014-04-27 7:29 ` Pankaj Dubey
2014-04-27 7:29 ` Pankaj Dubey
2014-04-25 12:32 ` [PATCH v2 07/10] ARM: EXYNOS: Remove "linux/bug.h" from pmu.c Pankaj Dubey
2014-04-25 12:32 ` Pankaj Dubey
2014-04-25 21:44 ` Tomasz Figa
2014-04-25 21:44 ` Tomasz Figa
2014-04-25 12:32 ` [PATCH v2 08/10] ARM: EXYNOS: Refactored code for using PMU address via DT Pankaj Dubey
2014-04-25 12:32 ` Pankaj Dubey
2014-04-25 22:19 ` Tomasz Figa
2014-04-25 22:19 ` Tomasz Figa
2014-04-26 3:32 ` Pankaj Dubey
2014-04-26 3:32 ` Pankaj Dubey
2014-04-25 12:32 ` [PATCH v2 09/10] ARM: EXYNOS: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c Pankaj Dubey
2014-04-25 12:32 ` Pankaj Dubey
2014-04-25 12:32 ` [PATCH v2 10/10] ARM: EXYNOS: Add device tree based initialization support for PMU Pankaj Dubey
2014-04-25 12:32 ` Pankaj Dubey
2014-04-25 22:40 ` Tomasz Figa
2014-04-25 22:40 ` Tomasz Figa
2014-04-26 4:36 ` Pankaj Dubey
2014-04-26 4:36 ` Pankaj Dubey
2014-04-26 4:36 ` Pankaj Dubey
2014-04-25 22:43 ` [PATCH v2 00/10] ARM: Exynos: PMU cleanup and refactoring for using DT Tomasz Figa
2014-04-25 22:43 ` Tomasz Figa
2014-04-26 2:07 ` Pankaj Dubey
2014-04-26 2:07 ` Pankaj Dubey
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