[Xen-ARM] Modify the clock frequency for early printk

[Xen-ARM] Modify the clock frequency for early printk

[HyonYoung Choi]

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Hi Anthony and Julien,

We are trying to run Xen 4.4 on the Arndale Octa board (Exynos 5420).

The Xen and dom0's kernel is successfully loaded but Xen cannot start. The
last output information in serial console is Starting kernel.

In order to figure out the reason, we tried to use the early_printk to
print out the message before console is initialized. However, the message
we got is some garbling message after the "Start kernel..." message. Julien
suggests this may be caused by the different rate of clock on Exynos 5420
and Exynos 5250.

We looked at the file xen/arch/arm/arm32/debug-exynos4210.inc, the clock it
chooses is MPLL 800MHz, but based on the output of our Exynos 5420 board,
our clock information is as follows:

CPU: Exynos5420 Rev2.0 [Samsung SOC on SMP Platform Base on ARM CortexA15]

APLL = 800MHz, KPLL = 600MHz

MPLL = 532MHz, BPLL = 800MHz

Our question is:
1) Is there any patch for the debug-exynos4210.inc file to support our
board?
2) How should we change the code in debug-exynos4210.inc file to make it
work on our board?
3) We tried to find the manual of setting the clocks so that we can change
the following code accordingly. However, we cannot find it. Could you
please refer to us some manual to achieve that?

27<http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/arm32/debug-exynos4210.inc;h=42416406ca3f2c33591656ed73a8d18b65056be4;hb=2a18ebbf8b0c4beda1ab94d073359e8e660b8561#l27>.macro
early_uart_init rb rc rd
28<http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/arm32/debug-exynos4210.inc;h=42416406ca3f2c33591656ed73a8d18b65056be4;hb=2a18ebbf8b0c4beda1ab94d073359e8e660b8561#l28>
       /* init clock */
29<http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/arm32/debug-exynos4210.inc;h=42416406ca3f2c33591656ed73a8d18b65056be4;hb=2a18ebbf8b0c4beda1ab94d073359e8e660b8561#l29>
       ldr   \rc, =0x10020000
30<http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/arm32/debug-exynos4210.inc;h=42416406ca3f2c33591656ed73a8d18b65056be4;hb=2a18ebbf8b0c4beda1ab94d073359e8e660b8561#l30>
       /* select MPLL (800MHz) source clock */
31<http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/arm32/debug-exynos4210.inc;h=42416406ca3f2c33591656ed73a8d18b65056be4;hb=2a18ebbf8b0c4beda1ab94d073359e8e660b8561#l31>
       ldr   \rd, [\rc, #0x250]
32<http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/arm32/debug-exynos4210.inc;h=42416406ca3f2c33591656ed73a8d18b65056be4;hb=2a18ebbf8b0c4beda1ab94d073359e8e660b8561#l32>
       and   \rd, \rd, #(~(0xf<<8))
33<http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/arm32/debug-exynos4210.inc;h=42416406ca3f2c33591656ed73a8d18b65056be4;hb=2a18ebbf8b0c4beda1ab94d073359e8e660b8561#l33>
       orr   \rd, \rd, #(0x6<<8)
34<http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/arm32/debug-exynos4210.inc;h=42416406ca3f2c33591656ed73a8d18b65056be4;hb=2a18ebbf8b0c4beda1ab94d073359e8e660b8561#l34>
       str   \rd, [\rc, #0x250]
35<http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/arm32/debug-exynos4210.inc;h=42416406ca3f2c33591656ed73a8d18b65056be4;hb=2a18ebbf8b0c4beda1ab94d073359e8e660b8561#l35>
       /* ratio 800/(7+1) */
36<http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/arm32/debug-exynos4210.inc;h=42416406ca3f2c33591656ed73a8d18b65056be4;hb=2a18ebbf8b0c4beda1ab94d073359e8e660b8561#l36>
       ldr   \rd, [\rc, #0x558]
37<http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/arm32/debug-exynos4210.inc;h=42416406ca3f2c33591656ed73a8d18b65056be4;hb=2a18ebbf8b0c4beda1ab94d073359e8e660b8561#l37>
       and   \rd, \rd, #(~(0xf<<8))
38<http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/arm32/debug-exynos4210.inc;h=42416406ca3f2c33591656ed73a8d18b65056be4;hb=2a18ebbf8b0c4beda1ab94d073359e8e660b8561#l38>
       orr   \rd, \rd, #(0x7<<8)
39<http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/arm32/debug-exynos4210.inc;h=42416406ca3f2c33591656ed73a8d18b65056be4;hb=2a18ebbf8b0c4beda1ab94d073359e8e660b8561#l39>
       str   \rd, [\rc, #0x558]
(We think we need to change the above code in the debug-exynos4210.inc.
Correct us if we are wrong. Or should we change anything else?)

Thank you very much for your time and help in this question!

Best,


Hyonyoung

-- 
-------------------------------------
Graduate School of Convergence IT, Korea University
Research Professor,
Hyonoung Choi, Ph.D.

Graduate School of Convergence IT, Korea University,
5-Ga, Anam-Dong, Sungbuk-Gu, Seoul 136-701, Republic of Korea.
Tel    : +82-(0)2-3290-3640
Mobile : +82-(0)10-5353-0414
E-mail : neongas@korea.ac.kr, commani@gmail.com
-------------------------------------

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Re: [Xen-ARM] Modify the clock frequency for early printk

[Julien Grall]

Hello,

On 17/04/14 18:49, HyonYoung Choi wrote:
> Hi Anthony and Julien,
>
> We are trying to run Xen 4.4 on the Arndale Octa board (Exynos 5420).
>
> The Xen and dom0's kernel is successfully loaded but Xen cannot start.
> The last output information in serial console is Starting kernel.
>
> In order to figure out the reason, we tried to use the early_printk to
> print out the message before console is initialized. However, the
> message we got is some garbling message after the "Start kernel..."
> message. Julien suggests this may be caused by the different rate of
> clock on Exynos 5420 and Exynos 5250.
>
> We looked at the file xen/arch/arm/arm32/debug-exynos4210.inc, the clock
> it chooses is MPLL 800MHz, but based on the output of our Exynos 5420
> board, our clock information is as follows:
>
> CPU: Exynos5420 Rev2.0 [Samsung SOC on SMP Platform Base on ARM CortexA15]
>
> APLL = 800MHz, KPLL = 600MHz
>
> MPLL = 532MHz, BPLL = 800MHz
>
> Our question is:
> 1) Is there any patch for the debug-exynos4210.inc file to support our
> board?
> 2) How should we change the code in debug-exynos4210.inc file to make it
> work on our board?
> 3) We tried to find the manual of setting the clocks so that we can
> change the following code accordingly. However, we cannot find it. Could
> you please refer to us some manual to achieve that?

In the patch I sent you earlier, can you try to replace
EARLY_PRINTK_INIT_UART := y

by

EARLY_PRINTK_INIT_UART := n

You have to clean the repo and recompile xen.

Regards,

-- 
Julien Grall

Re: [Xen-ARM] Modify the clock frequency for early printk

[HyonYoung Choi]

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I got printk messages finally.

Thank you so much Julien.

Now I have entered next stage.

======================
Starting kernel ...

- UART enabled -
- CPU 00000000 booting -
- Xen must be entered in NS Hyp mode -
- Boot failed -
======================

Best,
Hyonyoung


2014-04-17 18:10 GMT-04:00 Julien Grall <julien.grall@linaro.org>:

> Hello,
>
>
> On 17/04/14 18:49, HyonYoung Choi wrote:
>
>> Hi Anthony and Julien,
>>
>> We are trying to run Xen 4.4 on the Arndale Octa board (Exynos 5420).
>>
>> The Xen and dom0's kernel is successfully loaded but Xen cannot start.
>> The last output information in serial console is Starting kernel.
>>
>> In order to figure out the reason, we tried to use the early_printk to
>> print out the message before console is initialized. However, the
>> message we got is some garbling message after the "Start kernel..."
>> message. Julien suggests this may be caused by the different rate of
>> clock on Exynos 5420 and Exynos 5250.
>>
>> We looked at the file xen/arch/arm/arm32/debug-exynos4210.inc, the clock
>> it chooses is MPLL 800MHz, but based on the output of our Exynos 5420
>> board, our clock information is as follows:
>>
>> CPU: Exynos5420 Rev2.0 [Samsung SOC on SMP Platform Base on ARM CortexA15]
>>
>> APLL = 800MHz, KPLL = 600MHz
>>
>> MPLL = 532MHz, BPLL = 800MHz
>>
>> Our question is:
>> 1) Is there any patch for the debug-exynos4210.inc file to support our
>> board?
>> 2) How should we change the code in debug-exynos4210.inc file to make it
>> work on our board?
>> 3) We tried to find the manual of setting the clocks so that we can
>> change the following code accordingly. However, we cannot find it. Could
>> you please refer to us some manual to achieve that?
>>
>
> In the patch I sent you earlier, can you try to replace
> EARLY_PRINTK_INIT_UART := y
>
> by
>
> EARLY_PRINTK_INIT_UART := n
>
> You have to clean the repo and recompile xen.
>
> Regards,
>
> --
> Julien Grall
>



-- 
-------------------------------------
Graduate School of Convergence IT, Korea University
Research Professor,
Hyonoung Choi, Ph.D.

Graduate School of Convergence IT, Korea University,
5-Ga, Anam-Dong, Sungbuk-Gu, Seoul 136-701, Republic of Korea.
Tel    : +82-(0)2-3290-3640
Mobile : +82-(0)10-5353-0414
E-mail : neongas@korea.ac.kr, commani@gmail.com
-------------------------------------

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http://lists.xen.org/xen-devel

Re: [Xen-ARM] Modify the clock frequency for early printk

[Julien Grall]

Hello HyonYoung,

On 18/04/14 19:53, HyonYoung Choi wrote:
> I got printk messages finally.
>
> Thank you so much Julien.
>
> Now I have entered next stage.
>
> ======================
> Starting kernel ...
>
> - UART enabled -
> - CPU 00000000 booting -
> - Xen must be entered in NS Hyp mode -
> - Boot failed -
> ======================

Your CPU didn't boot in hyp mode.

You have to find a u-boot which switch all the CPUs to hyp mode for your 
board.

Regards,

-- 
Julien Grall