* [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion
@ 2014-04-22 21:26 Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 01/38] ARM: orion5x: fix target ID for crypto SRAM window Thomas Petazzoni
` (38 more replies)
0 siblings, 39 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
Jason, Andrew, Sebastian, Gregory,
Here is the second version of the Orion5x big DT migration: it moves
over to the Device Tree the probing of a large number of devices, up
to a point where on platform (edmini_v2) can be fully converted, and
three other platforms can be almost completely converted.
Summary of the patches:
* Patches 1 and 2 are fixes that have already been taken by Jason
Cooper in mvebu/fixes.
* Patches 3 and 4 add the Orion pinctrl and Orion clock drivers
respectively.
* Patches 5 to 9 extend the existing mvebu-devbus driver to also
cover the Orion platform.
* Patches 10 to 33 progressively migrate the edmini_v2 platform more
and more to the Device Tree, which mainly consists of SoC-level
changes (using DT probed timer, clocks, etc.)
* Patches 34, 35 and 36 convert three other Orion5x platforms to the
Device Tree.
* Patches 37 and 38 make some follow-up clean up in
arch/arm/plat-orion/ of code that is no longer used after this DT
migration.
Changes since v1:
The vast majority of the changes were made according to the
suggestions and review of Sebastian Hesselbarth. Thanks to him for the
very detailed review.
* In the pinctrl driver:
- change pci(rstout) to pcie(rstout)
- rename double pci functions pci-1
* In the clock driver:
- use decimal values for shift values
- join two similar cases
* In the mvebu-devbus driver:
- minor fixes in DT binding documentation
- use _SHIFT instead of _BIT for Armada definitions
- use _SHIFT where needed for Orion definitions, use BIT() directly
in the macro definition for single bit fields, and define _MASK
values.
- introduce a devbus,keep-config DT property to make timing
parameters optional, which is useful when migrating platforms to
the Device Tree since we may not have their Device Bus timing
details readily available.
* Added Acked-by from Sebastian on the following patches:
- ARM: orion5x: move interrupt controller node into ocp
- ARM: orion5x: switch to preprocessor includes in DT
- ARM: orion5x: use existing dt-bindings include for Device Tree files
- ARM: orion5x: add interrupt for Ethernet in Device Tree
- ARM: orion5x: switch to use the clock driver for DT platforms
- ARM: orion5x: enable pinctrl driver at SoC level
- ARM: orion5x: add Device Bus description at SoC level
- ARM: orion5x: update I2C description at SoC level
- ARM: orion5x: update I2C description at SoC level
- ARM: orion5x: remove unneeded code for edmini_v2
* Numerous Device Tree improvements:
- add node labels for all devices, and used them in the .dts
files.
- add linux,stdout-path chosen property.
- add missing chosen and memory nodes for d2net
- use the clocks property instead of the clock-frequency property
for UART controllers, and fixed board DTs accordingly.
- rename the xor node to dma-controller, to match ePAPR.
- rename gpio_leds to gpio-leds and gpio_keys to gpio-keys.
- use GPIO dt-bindings header file where possible.
- use vendor prefixes for I2C devices
* Changed board-dt.c to call mvebu_mbus_dt_init() in
->init_machine(), which allows to remove ->init_time() entirely.
* One more board converted to the Device Tree: the Maxtor Shared
Storage II.
Thomas
Thomas Petazzoni (38):
ARM: orion5x: fix target ID for crypto SRAM window
memory: mvebu-devbus: fix the conversion of the bus width
pinctrl: mvebu: new driver for Orion platforms
clk: mvebu: add Orion5x clock driver
memory: mvebu-devbus: use ARMADA_ prefix in defines
memory: mvebu-devbus: use _SHIFT suffixes instead of _BIT
memory: mvebu-devbus: split functions
memory: mvebu-devbus: add Orion5x support
memory: mvebu-devbus: add a devbus,keep-config property
ARM: orion5x: move interrupt controller node into ocp
ARM: orion5x: switch to preprocessor includes in DT
ARM: orion5x: use existing dt-bindings include for Device Tree files
ARM: orion5x: convert DT to use the mvebu-mbus driver
ARM: orion5x: add node labels in Orion5x SoC Device Tree file
ARM: orion5x: use gpio-keys and gpio-leds instead of
gpio_keys/gpio_leds in edmini_v2
ARM: orion5x: add linux,stdout-path to edmini_v2
ARM: orion5x: use node labels for UART and SATA on edmini_v2
ARM: orion5x: rename XOR node to dma-controller@<address>
ARM: orion5x: add interrupt for Ethernet in Device Tree
ARM: orion5x: switch to use the clock driver for DT platforms
ARM: orion5x: convert to use 'clocks' property for UART controllers
ARM: orion: switch to a per-platform handle_irq() function
ARM: orion5x: switch to DT interrupts and timer
ARM: orion5x: enable pinctrl driver at SoC level
ARM: orion5x: update I2C description at SoC level
ARM: orion5x: add Device Bus description at SoC level
ARM: orion5x: add standard pinctrl configs for sata0 and sata1
ARM: orion5x: convert edmini_v2 to DT pinctrl
ARM: orion5x: use DT to describe I2C devices on edmini_v2
ARM: orion5x: use DT to describe EHCI on edmini_v2
ARM: orion5x: use DT to describe NOR on edmini_v2
ARM: orion5x: keep TODO list in edmini_v2 DT
ARM: orion5x: remove unneeded code for edmini_v2
ARM: orion5x: convert RD-88F5182 to Device Tree
ARM: orion5x: convert d2net to Device Tree
ARM: orion5x: convert Maxtor Shared Storage II to the Device Tree
ARM: orion: remove no longer needed DT IRQ code
ARM: orion: remove no longer needed gpio DT code
.../devicetree/bindings/clock/mvebu-core-clock.txt | 8 +
.../bindings/memory-controllers/mvebu-devbus.txt | 32 +-
.../bindings/pinctrl/marvell,orion-pinctrl.txt | 91 +++++
arch/arm/boot/dts/Makefile | 5 +-
arch/arm/boot/dts/orion5x-lacie-d2-network.dts | 236 +++++++++++++
.../dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 141 ++++++--
.../boot/dts/orion5x-maxtor-shared-storage-2.dts | 178 ++++++++++
arch/arm/boot/dts/orion5x-mv88f5182.dtsi | 45 +++
arch/arm/boot/dts/orion5x-rd88f5182-nas.dts | 177 ++++++++++
arch/arm/boot/dts/orion5x.dtsi | 289 +++++++++-------
arch/arm/mach-dove/irq.c | 36 ++
arch/arm/mach-kirkwood/irq.c | 36 ++
arch/arm/mach-orion5x/Kconfig | 37 +--
arch/arm/mach-orion5x/Makefile | 7 +-
arch/arm/mach-orion5x/board-d2net.c | 109 ++++++
arch/arm/mach-orion5x/board-dt.c | 18 +-
arch/arm/mach-orion5x/board-mss2.c | 90 +++++
arch/arm/mach-orion5x/board-rd88f5182.c | 116 +++++++
arch/arm/mach-orion5x/common.h | 15 +-
arch/arm/mach-orion5x/d2net-setup.c | 365 ---------------------
arch/arm/mach-orion5x/edmini_v2-setup.c | 169 ----------
arch/arm/mach-orion5x/irq.c | 28 ++
arch/arm/mach-orion5x/mss2-setup.c | 274 ----------------
arch/arm/plat-orion/gpio.c | 48 ---
arch/arm/plat-orion/include/plat/irq.h | 1 -
arch/arm/plat-orion/include/plat/orion-gpio.h | 1 -
arch/arm/plat-orion/irq.c | 77 -----
drivers/clk/mvebu/Kconfig | 4 +
drivers/clk/mvebu/Makefile | 1 +
drivers/clk/mvebu/orion.c | 210 ++++++++++++
drivers/memory/mvebu-devbus.c | 234 +++++++++----
drivers/pinctrl/mvebu/Kconfig | 4 +
drivers/pinctrl/mvebu/Makefile | 1 +
drivers/pinctrl/mvebu/pinctrl-orion.c | 261 +++++++++++++++
34 files changed, 2162 insertions(+), 1182 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt
create mode 100644 arch/arm/boot/dts/orion5x-lacie-d2-network.dts
create mode 100644 arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts
create mode 100644 arch/arm/boot/dts/orion5x-mv88f5182.dtsi
create mode 100644 arch/arm/boot/dts/orion5x-rd88f5182-nas.dts
create mode 100644 arch/arm/mach-orion5x/board-d2net.c
create mode 100644 arch/arm/mach-orion5x/board-mss2.c
create mode 100644 arch/arm/mach-orion5x/board-rd88f5182.c
delete mode 100644 arch/arm/mach-orion5x/d2net-setup.c
delete mode 100644 arch/arm/mach-orion5x/edmini_v2-setup.c
delete mode 100644 arch/arm/mach-orion5x/mss2-setup.c
create mode 100644 drivers/clk/mvebu/orion.c
create mode 100644 drivers/pinctrl/mvebu/pinctrl-orion.c
--
1.9.2
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 01/38] ARM: orion5x: fix target ID for crypto SRAM window
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 02/38] memory: mvebu-devbus: fix the conversion of the bus width Thomas Petazzoni
` (37 subsequent siblings)
38 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
In commit 4ca2c04085a1caa903e92a5fc0da25362150aac2 ('ARM: orion5x:
Move to ID based window creation'), the mach-orion5x code was changed
to use the new mvebu-mbus API. However, in the process, a mistake was
made on the crypto SRAM window target ID: it should have been 0x9
(verified in the datasheet) and not 0x0.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: stable at vger.kernel.org
---
This should be backported to stable all the way to v3.12.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/mach-orion5x/common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index f565f99..7548db2 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -21,7 +21,7 @@ struct mv_sata_platform_data;
#define ORION_MBUS_DEVBUS_BOOT_ATTR 0x0f
#define ORION_MBUS_DEVBUS_TARGET(cs) 0x01
#define ORION_MBUS_DEVBUS_ATTR(cs) (~(1 << cs))
-#define ORION_MBUS_SRAM_TARGET 0x00
+#define ORION_MBUS_SRAM_TARGET 0x09
#define ORION_MBUS_SRAM_ATTR 0x00
/*
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 02/38] memory: mvebu-devbus: fix the conversion of the bus width
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 01/38] ARM: orion5x: fix target ID for crypto SRAM window Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 03/38] pinctrl: mvebu: new driver for Orion platforms Thomas Petazzoni
` (36 subsequent siblings)
38 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
According to the Armada 370 and Armada XP datasheets, the part of the
Device Bus register that configure the bus width should contain 0 for
a 8 bits bus width, and 1 for a 16 bits bus width (other values are
unsupported/reserved).
However, the current conversion done in the driver to convert from a
bus width in bits to the value expected by the register leads to
setting the register to 1 for a 8 bits bus, and 2 for a 16 bits bus.
This mistake was compensated by a mistake in the existing Device Tree
files for Armada 370/XP platforms: they were declaring a 8 bits bus
width, while the hardware in fact uses a 16 bits bus width.
This commit fixes that by adjusting the conversion logic.
This patch fixes a bug that was introduced in
3edad321b1bd2e6c8b5f38146c115c8982438f06 ('drivers: memory: Introduce
Marvell EBU Device Bus driver'), which was merged in v3.11.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: stable at vger.kernel.org
---
drivers/memory/mvebu-devbus.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/memory/mvebu-devbus.c b/drivers/memory/mvebu-devbus.c
index 110c036..b59a17f 100644
--- a/drivers/memory/mvebu-devbus.c
+++ b/drivers/memory/mvebu-devbus.c
@@ -108,8 +108,19 @@ static int devbus_set_timing_params(struct devbus *devbus,
node->full_name);
return err;
}
- /* Convert bit width to byte width */
- r.bus_width /= 8;
+
+ /*
+ * The bus width is encoded into the register as 0 for 8 bits,
+ * and 1 for 16 bits, so we do the necessary conversion here.
+ */
+ if (r.bus_width == 8)
+ r.bus_width = 0;
+ else if (r.bus_width == 16)
+ r.bus_width = 1;
+ else {
+ dev_err(devbus->dev, "invalid bus width %d\n", r.bus_width);
+ return -EINVAL;
+ }
err = get_timing_param_ps(devbus, node, "devbus,badr-skew-ps",
&r.badr_skew);
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 03/38] pinctrl: mvebu: new driver for Orion platforms
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 01/38] ARM: orion5x: fix target ID for crypto SRAM window Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 02/38] memory: mvebu-devbus: fix the conversion of the bus width Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:16 ` Sebastian Hesselbarth
` (2 more replies)
2014-04-22 21:26 ` [PATCH v2 04/38] clk: mvebu: add Orion5x clock driver Thomas Petazzoni
` (35 subsequent siblings)
38 siblings, 3 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit extends the pinctrl mvebu logic with a new driver to cover
Orion5x SoC. It supports the definitions for the 5181l, 5182 and 5281
variants of Orion5x, which are the three ones supported by the old
style MPP code in arch/arm/mach-orion5x/.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
---
.../bindings/pinctrl/marvell,orion-pinctrl.txt | 91 +++++++
drivers/pinctrl/mvebu/Kconfig | 4 +
drivers/pinctrl/mvebu/Makefile | 1 +
drivers/pinctrl/mvebu/pinctrl-orion.c | 261 +++++++++++++++++++++
4 files changed, 357 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt
create mode 100644 drivers/pinctrl/mvebu/pinctrl-orion.c
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt
new file mode 100644
index 0000000..27570a3
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt
@@ -0,0 +1,91 @@
+* Marvell Orion SoC pinctrl driver for mpp
+
+Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
+part and usage.
+
+Required properties:
+- compatible: "marvell,88f5181l-pinctrl", "marvell,88f5182-pinctrl",
+ "marvell,88f5281-pinctrl"
+
+- reg: two register areas, the first one describing the first two
+ contiguous MPP registers, and the second one describing the single
+ final MPP register, separated from the previous one.
+
+Available mpp pins/groups and functions:
+Note: brackets (x) are not part of the mpp name for marvell,function and given
+only for more detailed description in this document.
+
+* Marvell Orion 88f5181l
+
+name pins functions
+================================================================================
+mpp0 0 pcie(rstout), pci(req2), gpio
+mpp1 1 gpio, pci(gnt2)
+mpp2 2 gpio, pci(req3), pci-1(pme)
+mpp3 3 gpio, pci(gnt3)
+mpp4 4 gpio, pci(req4)
+mpp5 5 gpio, pci(gnt4)
+mpp6 6 gpio, pci(req5), pci-1(clk)
+mpp7 7 gpio, pci(gnt5), pci-1(clk)
+mpp8 8 gpio, ge(col)
+mpp9 9 gpio, ge(rxerr)
+mpp10 10 gpio, ge(crs)
+mpp11 11 gpio, ge(txerr)
+mpp12 12 gpio, ge(txd4)
+mpp13 13 gpio, ge(txd5)
+mpp14 14 gpio, ge(txd6)
+mpp15 15 gpio, ge(txd7)
+mpp16 16 ge(rxd4)
+mpp17 17 ge(rxd5)
+mpp18 18 ge(rxd6)
+mpp19 19 ge(rxd7)
+
+* Marvell Orion 88f5182
+
+name pins functions
+================================================================================
+mpp0 0 pcie(rstout), pci(req2), gpio
+mpp1 1 gpio, pci(gnt2)
+mpp2 2 gpio, pci(req3), pci-1(pme)
+mpp3 3 gpio, pci(gnt3)
+mpp4 4 gpio, pci(req4), bootnand(re), sata0(prsnt)
+mpp5 5 gpio, pci(gnt4), bootnand(we), sata1(prsnt)
+mpp6 6 gpio, pci(req5), nand(re0), sata0(act)
+mpp7 7 gpio, pci(gnt5), nand(we0), sata1(act)
+mpp8 8 gpio, ge(col)
+mpp9 9 gpio, ge(rxerr)
+mpp10 10 gpio, ge(crs)
+mpp11 11 gpio, ge(txerr)
+mpp12 12 gpio, ge(txd4), nand(re1), sata0(ledprsnt)
+mpp13 13 gpio, ge(txd5), nand(we1), sata1(ledprsnt)
+mpp14 14 gpio, ge(txd6), nand(re2), sata0(ledact)
+mpp15 15 gpio, ge(txd7), nand(we2), sata1(ledact)
+mpp16 16 uart1(rxd), ge(rxd4), gpio
+mpp17 17 uart1(txd), ge(rxd5), gpio
+mpp18 18 uart1(cts), ge(rxd6), gpio
+mpp19 19 uart1(rts), ge(rxd7), gpio
+
+* Marvell Orion 88f5281
+
+name pins functions
+================================================================================
+mpp0 0 pcie(rstout), pci(req2), gpio
+mpp1 1 gpio, pci(gnt2)
+mpp2 2 gpio, pci(req3), pci(pme)
+mpp3 3 gpio, pci(gnt3)
+mpp4 4 gpio, pci(req4), bootnand(re)
+mpp5 5 gpio, pci(gnt4), bootnand(we)
+mpp6 6 gpio, pci(req5), nand(re0)
+mpp7 7 gpio, pci(gnt5), nand(we0)
+mpp8 8 gpio, ge(col)
+mpp9 9 gpio, ge(rxerr)
+mpp10 10 gpio, ge(crs)
+mpp11 11 gpio, ge(txerr)
+mpp12 12 gpio, ge(txd4), nand(re1)
+mpp13 13 gpio, ge(txd5), nand(we1)
+mpp14 14 gpio, ge(txd6), nand(re2)
+mpp15 15 gpio, ge(txd7), nand(we2)
+mpp16 16 uart1(rxd), ge(rxd4)
+mpp17 17 uart1(txd), ge(rxd5)
+mpp18 18 uart1(cts), ge(rxd6)
+mpp19 19 uart1(rts), ge(rxd7)
diff --git a/drivers/pinctrl/mvebu/Kconfig b/drivers/pinctrl/mvebu/Kconfig
index cc298fad..d6dd835 100644
--- a/drivers/pinctrl/mvebu/Kconfig
+++ b/drivers/pinctrl/mvebu/Kconfig
@@ -30,4 +30,8 @@ config PINCTRL_ARMADA_XP
bool
select PINCTRL_MVEBU
+config PINCTRL_ORION
+ bool
+ select PINCTRL_MVEBU
+
endif
diff --git a/drivers/pinctrl/mvebu/Makefile b/drivers/pinctrl/mvebu/Makefile
index bc1b9f1..a0818e9 100644
--- a/drivers/pinctrl/mvebu/Makefile
+++ b/drivers/pinctrl/mvebu/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_PINCTRL_ARMADA_370) += pinctrl-armada-370.o
obj-$(CONFIG_PINCTRL_ARMADA_375) += pinctrl-armada-375.o
obj-$(CONFIG_PINCTRL_ARMADA_38X) += pinctrl-armada-38x.o
obj-$(CONFIG_PINCTRL_ARMADA_XP) += pinctrl-armada-xp.o
+obj-$(CONFIG_PINCTRL_ORION) += pinctrl-orion.o
diff --git a/drivers/pinctrl/mvebu/pinctrl-orion.c b/drivers/pinctrl/mvebu/pinctrl-orion.c
new file mode 100644
index 0000000..dda1e72
--- /dev/null
+++ b/drivers/pinctrl/mvebu/pinctrl-orion.c
@@ -0,0 +1,261 @@
+/*
+ * Marvell Orion pinctrl driver based on mvebu pinctrl core
+ *
+ * Author: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * The first 16 MPP pins on Orion are easy to handle: they are
+ * configured through 2 consecutive registers, located at the base
+ * address of the MPP device.
+ *
+ * However the last 4 MPP pins are handled by a register at offset
+ * 0x50 from the base address, so it is not consecutive with the first
+ * two registers.
+ */
+
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/pinctrl/pinctrl.h>
+
+#include "pinctrl-mvebu.h"
+
+static void __iomem *mpp_base;
+static void __iomem *high_mpp_base;
+
+static int orion_mpp_ctrl_get(unsigned pid, unsigned long *config)
+{
+ unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
+
+ if (pid < 16) {
+ unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
+ *config = (readl(mpp_base + off) >> shift) & MVEBU_MPP_MASK;
+ }
+ else {
+ *config = (readl(high_mpp_base) >> shift) & MVEBU_MPP_MASK;
+ }
+
+ return 0;
+}
+
+static int orion_mpp_ctrl_set(unsigned pid, unsigned long config)
+{
+ unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
+
+ if (pid < 16) {
+ unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
+ u32 reg = readl(mpp_base + off) & ~(MVEBU_MPP_MASK << shift);
+ writel(reg | (config << shift), mpp_base + off);
+ }
+ else {
+ u32 reg = readl(high_mpp_base) & ~(MVEBU_MPP_MASK << shift);
+ writel(reg | (config << shift), high_mpp_base);
+ }
+
+ return 0;
+}
+
+#define V(f5181l, f5182, f5281) \
+ ((f5181l << 0) | (f5182 << 1) | (f5281 << 2))
+
+enum orion_variant {
+ V_5181L = V(1, 0, 0),
+ V_5182 = V(0, 1, 0),
+ V_5281 = V(0, 0, 1),
+ V_ALL = V(1, 1, 1),
+};
+
+static struct mvebu_mpp_mode orion_mpp_modes[] = {
+ MPP_MODE(0,
+ MPP_VAR_FUNCTION(0x0, "pcie", "rstout", V_ALL),
+ MPP_VAR_FUNCTION(0x2, "pci", "req2", V_ALL),
+ MPP_VAR_FUNCTION(0x3, "gpio", NULL, V_ALL)),
+ MPP_MODE(1,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x2, "pci", "gnt2", V_ALL)),
+ MPP_MODE(2,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x2, "pci", "req3", V_ALL),
+ MPP_VAR_FUNCTION(0x3, "pci-1", "pme", V_ALL)),
+ MPP_MODE(3,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x2, "pci", "gnt3", V_ALL)),
+ MPP_MODE(4,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x2, "pci", "req4", V_ALL),
+ MPP_VAR_FUNCTION(0x4, "bootnand", "re", V_5182 | V_5281),
+ MPP_VAR_FUNCTION(0x5, "sata0", "prsnt", V_5182)),
+ MPP_MODE(5,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x2, "pci", "gnt4", V_ALL),
+ MPP_VAR_FUNCTION(0x4, "bootnand", "we", V_5182 | V_5281),
+ MPP_VAR_FUNCTION(0x5, "sata1", "prsnt", V_5182)),
+ MPP_MODE(6,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x2, "pci", "req5", V_ALL),
+ MPP_VAR_FUNCTION(0x4, "nand", "re0", V_5182 | V_5281),
+ MPP_VAR_FUNCTION(0x5, "pci-1", "clk", V_5181L),
+ MPP_VAR_FUNCTION(0x5, "sata0", "act", V_5182)),
+ MPP_MODE(7,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x2, "pci", "gnt5", V_ALL),
+ MPP_VAR_FUNCTION(0x4, "nand", "we0", V_5182 | V_5281),
+ MPP_VAR_FUNCTION(0x5, "pci-1", "clk", V_5181L),
+ MPP_VAR_FUNCTION(0x5, "sata1", "act", V_5182)),
+ MPP_MODE(8,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x1, "ge", "col", V_ALL)),
+ MPP_MODE(9,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x1, "ge", "rxerr", V_ALL)),
+ MPP_MODE(10,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x1, "ge", "crs", V_ALL)),
+ MPP_MODE(11,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x1, "ge", "txerr", V_ALL)),
+ MPP_MODE(12,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x1, "ge", "txd4", V_ALL),
+ MPP_VAR_FUNCTION(0x4, "nand", "re1", V_5182 | V_5281),
+ MPP_VAR_FUNCTION(0x5, "sata0", "ledprsnt", V_5182)),
+ MPP_MODE(13,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x1, "ge", "txd5", V_ALL),
+ MPP_VAR_FUNCTION(0x4, "nand", "we1", V_5182 | V_5281),
+ MPP_VAR_FUNCTION(0x5, "sata1", "ledprsnt", V_5182)),
+ MPP_MODE(14,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x1, "ge", "txd6", V_ALL),
+ MPP_VAR_FUNCTION(0x4, "nand", "re2", V_5182 | V_5281),
+ MPP_VAR_FUNCTION(0x5, "sata0", "ledact", V_5182)),
+ MPP_MODE(15,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
+ MPP_VAR_FUNCTION(0x1, "ge", "txd7", V_ALL),
+ MPP_VAR_FUNCTION(0x4, "nand", "we2", V_5182 | V_5281),
+ MPP_VAR_FUNCTION(0x5, "sata1", "ledact", V_5182)),
+ MPP_MODE(16,
+ MPP_VAR_FUNCTION(0x0, "uart1", "rxd", V_5182 | V_5281),
+ MPP_VAR_FUNCTION(0x1, "ge", "rxd4", V_ALL),
+ MPP_VAR_FUNCTION(0x5, "gpio", NULL, V_5182)),
+ MPP_MODE(17,
+ MPP_VAR_FUNCTION(0x0, "uart1", "txd", V_5182 | V_5281),
+ MPP_VAR_FUNCTION(0x1, "ge", "rxd5", V_ALL),
+ MPP_VAR_FUNCTION(0x5, "gpio", NULL, V_5182)),
+ MPP_MODE(18,
+ MPP_VAR_FUNCTION(0x0, "uart1", "cts", V_5182 | V_5281),
+ MPP_VAR_FUNCTION(0x1, "ge", "rxd6", V_ALL),
+ MPP_VAR_FUNCTION(0x5, "gpio", NULL, V_5182)),
+ MPP_MODE(19,
+ MPP_VAR_FUNCTION(0x0, "uart1", "rts", V_5182 | V_5281),
+ MPP_VAR_FUNCTION(0x1, "ge", "rxd7", V_ALL),
+ MPP_VAR_FUNCTION(0x5, "gpio", NULL, V_5182)),
+};
+
+static struct mvebu_mpp_ctrl orion_mpp_controls[] = {
+ MPP_FUNC_CTRL(0, 19, NULL, orion_mpp_ctrl),
+};
+
+static struct pinctrl_gpio_range mv88f5181l_gpio_ranges[] = {
+ MPP_GPIO_RANGE(0, 0, 0, 16),
+};
+
+static struct pinctrl_gpio_range mv88f5182_gpio_ranges[] = {
+ MPP_GPIO_RANGE(0, 0, 0, 19),
+};
+
+static struct pinctrl_gpio_range mv88f5281_gpio_ranges[] = {
+ MPP_GPIO_RANGE(0, 0, 0, 16),
+};
+
+static struct mvebu_pinctrl_soc_info mv88f5181l_info = {
+ .variant = V_5181L,
+ .controls = orion_mpp_controls,
+ .ncontrols = ARRAY_SIZE(orion_mpp_controls),
+ .modes = orion_mpp_modes,
+ .nmodes = ARRAY_SIZE(orion_mpp_modes),
+ .gpioranges = mv88f5181l_gpio_ranges,
+ .ngpioranges = ARRAY_SIZE(mv88f5181l_gpio_ranges),
+};
+
+static struct mvebu_pinctrl_soc_info mv88f5182_info = {
+ .variant = V_5182,
+ .controls = orion_mpp_controls,
+ .ncontrols = ARRAY_SIZE(orion_mpp_controls),
+ .modes = orion_mpp_modes,
+ .nmodes = ARRAY_SIZE(orion_mpp_modes),
+ .gpioranges = mv88f5182_gpio_ranges,
+ .ngpioranges = ARRAY_SIZE(mv88f5182_gpio_ranges),
+};
+
+static struct mvebu_pinctrl_soc_info mv88f5281_info = {
+ .variant = V_5281,
+ .controls = orion_mpp_controls,
+ .ncontrols = ARRAY_SIZE(orion_mpp_controls),
+ .modes = orion_mpp_modes,
+ .nmodes = ARRAY_SIZE(orion_mpp_modes),
+ .gpioranges = mv88f5281_gpio_ranges,
+ .ngpioranges = ARRAY_SIZE(mv88f5281_gpio_ranges),
+};
+
+/*
+ * There are multiple variants of the Orion SoCs, but in terms of pin
+ * muxing, they are identical.
+ */
+static struct of_device_id orion_pinctrl_of_match[] = {
+ { .compatible = "marvell,88f5181l-pinctrl", .data = &mv88f5181l_info },
+ { .compatible = "marvell,88f5182-pinctrl", .data = &mv88f5182_info },
+ { .compatible = "marvell,88f5281-pinctrl", .data = &mv88f5281_info },
+ { }
+};
+
+static int orion_pinctrl_probe(struct platform_device *pdev)
+{
+ const struct of_device_id *match =
+ of_match_device(orion_pinctrl_of_match, &pdev->dev);
+ struct resource *res;
+
+ pdev->dev.platform_data = (void*)match->data;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mpp_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(mpp_base))
+ return PTR_ERR(mpp_base);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ high_mpp_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(high_mpp_base))
+ return PTR_ERR(high_mpp_base);
+
+ return mvebu_pinctrl_probe(pdev);
+}
+
+static int orion_pinctrl_remove(struct platform_device *pdev)
+{
+ return mvebu_pinctrl_remove(pdev);
+}
+
+static struct platform_driver orion_pinctrl_driver = {
+ .driver = {
+ .name = "orion-pinctrl",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(orion_pinctrl_of_match),
+ },
+ .probe = orion_pinctrl_probe,
+ .remove = orion_pinctrl_remove,
+};
+
+module_platform_driver(orion_pinctrl_driver);
+
+MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
+MODULE_DESCRIPTION("Marvell Orion pinctrl driver");
+MODULE_LICENSE("GPL v2");
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 04/38] clk: mvebu: add Orion5x clock driver
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (2 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 03/38] pinctrl: mvebu: new driver for Orion platforms Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:16 ` Sebastian Hesselbarth
2014-04-26 1:11 ` Jason Cooper
2014-04-22 21:26 ` [PATCH v2 05/38] memory: mvebu-devbus: use ARMADA_ prefix in defines Thomas Petazzoni
` (34 subsequent siblings)
38 siblings, 2 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit adds a core clock driver for the Orion5x SoC, with support
for the tclk, the CPU frequency and the DDR frequency. All the details
about the Sample-At-Reset register were extracted from the U-Boot
sources for Orion5x.
Note that Orion5x does not have gatable clocks, so this core clock
driver is sufficient to support clocking on Orion5x platforms.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Mike Turquette <mturquette@linaro.org>
---
.../devicetree/bindings/clock/mvebu-core-clock.txt | 8 +
drivers/clk/mvebu/Kconfig | 4 +
drivers/clk/mvebu/Makefile | 1 +
drivers/clk/mvebu/orion.c | 210 +++++++++++++++++++++
4 files changed, 223 insertions(+)
create mode 100644 drivers/clk/mvebu/orion.c
diff --git a/Documentation/devicetree/bindings/clock/mvebu-core-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-core-clock.txt
index 307a503..dc5ea5b 100644
--- a/Documentation/devicetree/bindings/clock/mvebu-core-clock.txt
+++ b/Documentation/devicetree/bindings/clock/mvebu-core-clock.txt
@@ -29,6 +29,11 @@ The following is a list of provided IDs and clock names on Kirkwood and Dove:
2 = l2clk (L2 Cache clock derived from CPU0 clock)
3 = ddrclk (DDR controller clock derived from CPU0 clock)
+The following is a list of provided IDs and clock names on Orion5x:
+ 0 = tclk (Internal Bus clock)
+ 1 = cpuclk (CPU0 clock)
+ 2 = ddrclk (DDR controller clock derived from CPU0 clock)
+
Required properties:
- compatible : shall be one of the following:
"marvell,armada-370-core-clock" - For Armada 370 SoC core clocks
@@ -38,6 +43,9 @@ Required properties:
"marvell,dove-core-clock" - for Dove SoC core clocks
"marvell,kirkwood-core-clock" - for Kirkwood SoC (except mv88f6180)
"marvell,mv88f6180-core-clock" - for Kirkwood MV88f6180 SoC
+ "marvell,mv88f5182-core-clock" - for Orion MV88F5182 SoC
+ "marvell,mv88f5281-core-clock" - for Orion MV88F5281 SoC
+ "marvell,mv88f6183-core-clock" - for Orion MV88F6183 SoC
- reg : shall be the register address of the Sample-At-Reset (SAR) register
- #clock-cells : from common clock binding; shall be set to 1
diff --git a/drivers/clk/mvebu/Kconfig b/drivers/clk/mvebu/Kconfig
index 693f7be..3b34dba 100644
--- a/drivers/clk/mvebu/Kconfig
+++ b/drivers/clk/mvebu/Kconfig
@@ -34,3 +34,7 @@ config DOVE_CLK
config KIRKWOOD_CLK
bool
select MVEBU_CLK_COMMON
+
+config ORION_CLK
+ bool
+ select MVEBU_CLK_COMMON
diff --git a/drivers/clk/mvebu/Makefile b/drivers/clk/mvebu/Makefile
index 4c66162..a9a56fc 100644
--- a/drivers/clk/mvebu/Makefile
+++ b/drivers/clk/mvebu/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_ARMADA_38X_CLK) += armada-38x.o
obj-$(CONFIG_ARMADA_XP_CLK) += armada-xp.o
obj-$(CONFIG_DOVE_CLK) += dove.o
obj-$(CONFIG_KIRKWOOD_CLK) += kirkwood.o
+obj-$(CONFIG_ORION_CLK) += orion.o
diff --git a/drivers/clk/mvebu/orion.c b/drivers/clk/mvebu/orion.c
new file mode 100644
index 0000000..fd12956
--- /dev/null
+++ b/drivers/clk/mvebu/orion.c
@@ -0,0 +1,210 @@
+/*
+ * Marvell Orion SoC clocks
+ *
+ * Copyright (C) 2014 Thomas Petazzoni
+ *
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/clk-provider.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include "common.h"
+
+static const struct coreclk_ratio orion_coreclk_ratios[] __initconst = {
+ { .id = 0, .name = "ddrclk", }
+};
+
+/*
+ * Orion 5182
+ */
+
+#define SAR_MV88F5182_TCLK_FREQ 8
+#define SAR_MV88F5182_TCLK_FREQ_MASK 0x3
+
+static u32 __init mv88f5182_get_tclk_freq(void __iomem *sar)
+{
+ u32 opt = (readl(sar) >> SAR_MV88F5182_TCLK_FREQ) &
+ SAR_MV88F5182_TCLK_FREQ_MASK;
+ if (opt == 1)
+ return 150000000;
+ else if (opt == 2)
+ return 166666667;
+ else
+ return 0;
+}
+
+#define SAR_MV88F5182_CPU_FREQ 4
+#define SAR_MV88F5182_CPU_FREQ_MASK 0xf
+
+static u32 __init mv88f5182_get_cpu_freq(void __iomem *sar)
+{
+ u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) &
+ SAR_MV88F5182_CPU_FREQ_MASK;
+ if (opt == 0)
+ return 333333333;
+ else if (opt == 1 || opt == 2)
+ return 400000000;
+ else if (opt == 3)
+ return 500000000;
+ else
+ return 0;
+}
+
+static void __init mv88f5182_get_clk_ratio(void __iomem *sar, int id,
+ int *mult, int *div)
+{
+ u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) &
+ SAR_MV88F5182_CPU_FREQ_MASK;
+ if (opt == 0 || opt == 1) {
+ *mult = 1;
+ *div = 2;
+ } else if (opt == 2 || opt == 3) {
+ *mult = 1;
+ *div = 3;
+ } else {
+ *mult = 0;
+ *div = 1;
+ }
+}
+
+static const struct coreclk_soc_desc mv88f5182_coreclks = {
+ .get_tclk_freq = mv88f5182_get_tclk_freq,
+ .get_cpu_freq = mv88f5182_get_cpu_freq,
+ .get_clk_ratio = mv88f5182_get_clk_ratio,
+ .ratios = orion_coreclk_ratios,
+ .num_ratios = ARRAY_SIZE(orion_coreclk_ratios),
+};
+
+static void __init mv88f5182_clk_init(struct device_node *np)
+{
+ return mvebu_coreclk_setup(np, &mv88f5182_coreclks);
+}
+
+CLK_OF_DECLARE(mv88f5182_clk, "marvell,mv88f5182-core-clock", mv88f5182_clk_init);
+
+/*
+ * Orion 5281
+ */
+
+static u32 __init mv88f5281_get_tclk_freq(void __iomem *sar)
+{
+ /* On 5281, tclk is always 166 Mhz */
+ return 166666667;
+}
+
+#define SAR_MV88F5281_CPU_FREQ 4
+#define SAR_MV88F5281_CPU_FREQ_MASK 0xf
+
+static u32 __init mv88f5281_get_cpu_freq(void __iomem *sar)
+{
+ u32 opt = (readl(sar) >> SAR_MV88F5281_CPU_FREQ) &
+ SAR_MV88F5281_CPU_FREQ_MASK;
+ if (opt == 1 || opt == 2)
+ return 400000000;
+ else if (opt == 3)
+ return 500000000;
+ else
+ return 0;
+}
+
+static void __init mv88f5281_get_clk_ratio(void __iomem *sar, int id,
+ int *mult, int *div)
+{
+ u32 opt = (readl(sar) >> SAR_MV88F5281_CPU_FREQ) &
+ SAR_MV88F5281_CPU_FREQ_MASK;
+ if (opt == 1) {
+ *mult = 1;
+ *div = 2;
+ } else if (opt == 2 || opt == 3) {
+ *mult = 1;
+ *div = 3;
+ } else {
+ *mult = 0;
+ *div = 1;
+ }
+}
+
+static const struct coreclk_soc_desc mv88f5281_coreclks = {
+ .get_tclk_freq = mv88f5281_get_tclk_freq,
+ .get_cpu_freq = mv88f5281_get_cpu_freq,
+ .get_clk_ratio = mv88f5281_get_clk_ratio,
+ .ratios = orion_coreclk_ratios,
+ .num_ratios = ARRAY_SIZE(orion_coreclk_ratios),
+};
+
+static void __init mv88f5281_clk_init(struct device_node *np)
+{
+ return mvebu_coreclk_setup(np, &mv88f5281_coreclks);
+}
+
+CLK_OF_DECLARE(mv88f5281_clk, "marvell,mv88f5281-core-clock", mv88f5281_clk_init);
+
+/*
+ * Orion 6183
+ */
+
+#define SAR_MV88F6183_TCLK_FREQ 9
+#define SAR_MV88F6183_TCLK_FREQ_MASK 0x1
+
+static u32 __init mv88f6183_get_tclk_freq(void __iomem *sar)
+{
+ u32 opt = (readl(sar) >> SAR_MV88F6183_TCLK_FREQ) &
+ SAR_MV88F6183_TCLK_FREQ_MASK;
+ if (opt == 0)
+ return 133333333;
+ else if (opt == 1)
+ return 166666667;
+ else
+ return 0;
+}
+
+#define SAR_MV88F6183_CPU_FREQ 1
+#define SAR_MV88F6183_CPU_FREQ_MASK 0x3f
+
+static u32 __init mv88f6183_get_cpu_freq(void __iomem *sar)
+{
+ u32 opt = (readl(sar) >> SAR_MV88F6183_CPU_FREQ) &
+ SAR_MV88F6183_CPU_FREQ_MASK;
+ if (opt == 9)
+ return 333333333;
+ else if (opt == 17)
+ return 400000000;
+ else
+ return 0;
+}
+
+static void __init mv88f6183_get_clk_ratio(void __iomem *sar, int id,
+ int *mult, int *div)
+{
+ u32 opt = (readl(sar) >> SAR_MV88F6183_CPU_FREQ) &
+ SAR_MV88F6183_CPU_FREQ_MASK;
+ if (opt == 9 || opt == 17) {
+ *mult = 1;
+ *div = 2;
+ } else {
+ *mult = 0;
+ *div = 1;
+ }
+}
+
+static const struct coreclk_soc_desc mv88f6183_coreclks = {
+ .get_tclk_freq = mv88f6183_get_tclk_freq,
+ .get_cpu_freq = mv88f6183_get_cpu_freq,
+ .get_clk_ratio = mv88f6183_get_clk_ratio,
+ .ratios = orion_coreclk_ratios,
+ .num_ratios = ARRAY_SIZE(orion_coreclk_ratios),
+};
+
+
+static void __init mv88f6183_clk_init(struct device_node *np)
+{
+ return mvebu_coreclk_setup(np, &mv88f6183_coreclks);
+}
+
+CLK_OF_DECLARE(mv88f6183_clk, "marvell,mv88f6183-core-clock", mv88f6183_clk_init);
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 05/38] memory: mvebu-devbus: use ARMADA_ prefix in defines
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (3 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 04/38] clk: mvebu: add Orion5x clock driver Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:17 ` Sebastian Hesselbarth
2014-04-26 14:21 ` Jason Cooper
2014-04-22 21:26 ` [PATCH v2 06/38] memory: mvebu-devbus: use _SHIFT suffixes instead of _BIT Thomas Petazzoni
` (33 subsequent siblings)
38 siblings, 2 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
The mvebu-devbus driver currently only supports the Armada 370/XP
family, but it can also cover the Orion5x family. However, the Orion5x
family has a different organization of the register. Therefore, in
preparation to the introduction of Orion5x support, we rename the
Armada 370/XP specific definitions to have an ARMADA_ prefix.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
drivers/memory/mvebu-devbus.c | 48 +++++++++++++++++++++----------------------
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/drivers/memory/mvebu-devbus.c b/drivers/memory/mvebu-devbus.c
index b59a17f..e66de7f 100644
--- a/drivers/memory/mvebu-devbus.c
+++ b/drivers/memory/mvebu-devbus.c
@@ -30,19 +30,19 @@
#include <linux/platform_device.h>
/* Register definitions */
-#define DEV_WIDTH_BIT 30
-#define BADR_SKEW_BIT 28
-#define RD_HOLD_BIT 23
-#define ACC_NEXT_BIT 17
-#define RD_SETUP_BIT 12
-#define ACC_FIRST_BIT 6
+#define ARMADA_DEV_WIDTH_BIT 30
+#define ARMADA_BADR_SKEW_BIT 28
+#define ARMADA_RD_HOLD_BIT 23
+#define ARMADA_ACC_NEXT_BIT 17
+#define ARMADA_RD_SETUP_BIT 12
+#define ARMADA_ACC_FIRST_BIT 6
-#define SYNC_ENABLE_BIT 24
-#define WR_HIGH_BIT 16
-#define WR_LOW_BIT 8
+#define ARMADA_SYNC_ENABLE_BIT 24
+#define ARMADA_WR_HIGH_BIT 16
+#define ARMADA_WR_LOW_BIT 8
-#define READ_PARAM_OFFSET 0x0
-#define WRITE_PARAM_OFFSET 0x4
+#define ARMADA_READ_PARAM_OFFSET 0x0
+#define ARMADA_WRITE_PARAM_OFFSET 0x4
struct devbus_read_params {
u32 bus_width;
@@ -178,31 +178,31 @@ static int devbus_set_timing_params(struct devbus *devbus,
return err;
/* Set read timings */
- value = r.bus_width << DEV_WIDTH_BIT |
- r.badr_skew << BADR_SKEW_BIT |
- r.rd_hold << RD_HOLD_BIT |
- r.acc_next << ACC_NEXT_BIT |
- r.rd_setup << RD_SETUP_BIT |
- r.acc_first << ACC_FIRST_BIT |
+ value = r.bus_width << ARMADA_DEV_WIDTH_BIT |
+ r.badr_skew << ARMADA_BADR_SKEW_BIT |
+ r.rd_hold << ARMADA_RD_HOLD_BIT |
+ r.acc_next << ARMADA_ACC_NEXT_BIT |
+ r.rd_setup << ARMADA_RD_SETUP_BIT |
+ r.acc_first << ARMADA_ACC_FIRST_BIT |
r.turn_off;
dev_dbg(devbus->dev, "read parameters register 0x%p = 0x%x\n",
- devbus->base + READ_PARAM_OFFSET,
+ devbus->base + ARMADA_READ_PARAM_OFFSET,
value);
- writel(value, devbus->base + READ_PARAM_OFFSET);
+ writel(value, devbus->base + ARMADA_READ_PARAM_OFFSET);
/* Set write timings */
- value = w.sync_enable << SYNC_ENABLE_BIT |
- w.wr_low << WR_LOW_BIT |
- w.wr_high << WR_HIGH_BIT |
+ value = w.sync_enable << ARMADA_SYNC_ENABLE_BIT |
+ w.wr_low << ARMADA_WR_LOW_BIT |
+ w.wr_high << ARMADA_WR_HIGH_BIT |
w.ale_wr;
dev_dbg(devbus->dev, "write parameters register: 0x%p = 0x%x\n",
- devbus->base + WRITE_PARAM_OFFSET,
+ devbus->base + ARMADA_WRITE_PARAM_OFFSET,
value);
- writel(value, devbus->base + WRITE_PARAM_OFFSET);
+ writel(value, devbus->base + ARMADA_WRITE_PARAM_OFFSET);
return 0;
}
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 06/38] memory: mvebu-devbus: use _SHIFT suffixes instead of _BIT
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (4 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 05/38] memory: mvebu-devbus: use ARMADA_ prefix in defines Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:17 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 07/38] memory: mvebu-devbus: split functions Thomas Petazzoni
` (32 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
As noted by Sebastian Hesselbarth, the definitions in mvebu-devbus.c
are not bit definition, but rather shift values, so a _SHIFT prefix
would make more sense. This commit therefore replaces the *_BIT
definitions by *_SHIFT definitions.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
drivers/memory/mvebu-devbus.c | 36 ++++++++++++++++++------------------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/memory/mvebu-devbus.c b/drivers/memory/mvebu-devbus.c
index e66de7f..0f196b3 100644
--- a/drivers/memory/mvebu-devbus.c
+++ b/drivers/memory/mvebu-devbus.c
@@ -30,16 +30,16 @@
#include <linux/platform_device.h>
/* Register definitions */
-#define ARMADA_DEV_WIDTH_BIT 30
-#define ARMADA_BADR_SKEW_BIT 28
-#define ARMADA_RD_HOLD_BIT 23
-#define ARMADA_ACC_NEXT_BIT 17
-#define ARMADA_RD_SETUP_BIT 12
-#define ARMADA_ACC_FIRST_BIT 6
+#define ARMADA_DEV_WIDTH_SHIFT 30
+#define ARMADA_BADR_SKEW_SHIFT 28
+#define ARMADA_RD_HOLD_SHIFT 23
+#define ARMADA_ACC_NEXT_SHIFT 17
+#define ARMADA_RD_SETUP_SHIFT 12
+#define ARMADA_ACC_FIRST_SHIFT 6
-#define ARMADA_SYNC_ENABLE_BIT 24
-#define ARMADA_WR_HIGH_BIT 16
-#define ARMADA_WR_LOW_BIT 8
+#define ARMADA_SYNC_ENABLE_SHIFT 24
+#define ARMADA_WR_HIGH_SHIFT 16
+#define ARMADA_WR_LOW_SHIFT 8
#define ARMADA_READ_PARAM_OFFSET 0x0
#define ARMADA_WRITE_PARAM_OFFSET 0x4
@@ -178,12 +178,12 @@ static int devbus_set_timing_params(struct devbus *devbus,
return err;
/* Set read timings */
- value = r.bus_width << ARMADA_DEV_WIDTH_BIT |
- r.badr_skew << ARMADA_BADR_SKEW_BIT |
- r.rd_hold << ARMADA_RD_HOLD_BIT |
- r.acc_next << ARMADA_ACC_NEXT_BIT |
- r.rd_setup << ARMADA_RD_SETUP_BIT |
- r.acc_first << ARMADA_ACC_FIRST_BIT |
+ value = r.bus_width << ARMADA_DEV_WIDTH_SHIFT |
+ r.badr_skew << ARMADA_BADR_SKEW_SHIFT |
+ r.rd_hold << ARMADA_RD_HOLD_SHIFT |
+ r.acc_next << ARMADA_ACC_NEXT_SHIFT |
+ r.rd_setup << ARMADA_RD_SETUP_SHIFT |
+ r.acc_first << ARMADA_ACC_FIRST_SHIFT |
r.turn_off;
dev_dbg(devbus->dev, "read parameters register 0x%p = 0x%x\n",
@@ -193,9 +193,9 @@ static int devbus_set_timing_params(struct devbus *devbus,
writel(value, devbus->base + ARMADA_READ_PARAM_OFFSET);
/* Set write timings */
- value = w.sync_enable << ARMADA_SYNC_ENABLE_BIT |
- w.wr_low << ARMADA_WR_LOW_BIT |
- w.wr_high << ARMADA_WR_HIGH_BIT |
+ value = w.sync_enable << ARMADA_SYNC_ENABLE_SHIFT |
+ w.wr_low << ARMADA_WR_LOW_SHIFT |
+ w.wr_high << ARMADA_WR_HIGH_SHIFT |
w.ale_wr;
dev_dbg(devbus->dev, "write parameters register: 0x%p = 0x%x\n",
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 07/38] memory: mvebu-devbus: split functions
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (5 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 06/38] memory: mvebu-devbus: use _SHIFT suffixes instead of _BIT Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:18 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 08/38] memory: mvebu-devbus: add Orion5x support Thomas Petazzoni
` (31 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
The mvebu-devbus driver currently only supports the Armada 370/XP
family, but it can also cover the Orion5x family. However, the Orion5x
family has a different organization of the registers.
Therefore, in preparation to the introduction of Orion5x support, we
separate into two functions the code that 1/ retrieves the timing
parameters from the Device Tree and 2/ applies those timings
parameters into the hardware registers.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
drivers/memory/mvebu-devbus.c | 90 ++++++++++++++++++++++++-------------------
1 file changed, 51 insertions(+), 39 deletions(-)
diff --git a/drivers/memory/mvebu-devbus.c b/drivers/memory/mvebu-devbus.c
index 0f196b3..5dc9c63 100644
--- a/drivers/memory/mvebu-devbus.c
+++ b/drivers/memory/mvebu-devbus.c
@@ -89,19 +89,15 @@ static int get_timing_param_ps(struct devbus *devbus,
return 0;
}
-static int devbus_set_timing_params(struct devbus *devbus,
- struct device_node *node)
+static int devbus_get_timing_params(struct devbus *devbus,
+ struct device_node *node,
+ struct devbus_read_params *r,
+ struct devbus_write_params *w)
{
- struct devbus_read_params r;
- struct devbus_write_params w;
- u32 value;
int err;
- dev_dbg(devbus->dev, "Setting timing parameter, tick is %lu ps\n",
- devbus->tick_ps);
-
/* Get read timings */
- err = of_property_read_u32(node, "devbus,bus-width", &r.bus_width);
+ err = of_property_read_u32(node, "devbus,bus-width", &r->bus_width);
if (err < 0) {
dev_err(devbus->dev,
"%s has no 'devbus,bus-width' property\n",
@@ -113,48 +109,48 @@ static int devbus_set_timing_params(struct devbus *devbus,
* The bus width is encoded into the register as 0 for 8 bits,
* and 1 for 16 bits, so we do the necessary conversion here.
*/
- if (r.bus_width == 8)
- r.bus_width = 0;
- else if (r.bus_width == 16)
- r.bus_width = 1;
+ if (r->bus_width == 8)
+ r->bus_width = 0;
+ else if (r->bus_width == 16)
+ r->bus_width = 1;
else {
- dev_err(devbus->dev, "invalid bus width %d\n", r.bus_width);
+ dev_err(devbus->dev, "invalid bus width %d\n", r->bus_width);
return -EINVAL;
}
err = get_timing_param_ps(devbus, node, "devbus,badr-skew-ps",
- &r.badr_skew);
+ &r->badr_skew);
if (err < 0)
return err;
err = get_timing_param_ps(devbus, node, "devbus,turn-off-ps",
- &r.turn_off);
+ &r->turn_off);
if (err < 0)
return err;
err = get_timing_param_ps(devbus, node, "devbus,acc-first-ps",
- &r.acc_first);
+ &r->acc_first);
if (err < 0)
return err;
err = get_timing_param_ps(devbus, node, "devbus,acc-next-ps",
- &r.acc_next);
+ &r->acc_next);
if (err < 0)
return err;
err = get_timing_param_ps(devbus, node, "devbus,rd-setup-ps",
- &r.rd_setup);
+ &r->rd_setup);
if (err < 0)
return err;
err = get_timing_param_ps(devbus, node, "devbus,rd-hold-ps",
- &r.rd_hold);
+ &r->rd_hold);
if (err < 0)
return err;
/* Get write timings */
err = of_property_read_u32(node, "devbus,sync-enable",
- &w.sync_enable);
+ &w->sync_enable);
if (err < 0) {
dev_err(devbus->dev,
"%s has no 'devbus,sync-enable' property\n",
@@ -163,28 +159,38 @@ static int devbus_set_timing_params(struct devbus *devbus,
}
err = get_timing_param_ps(devbus, node, "devbus,ale-wr-ps",
- &w.ale_wr);
+ &w->ale_wr);
if (err < 0)
return err;
err = get_timing_param_ps(devbus, node, "devbus,wr-low-ps",
- &w.wr_low);
+ &w->wr_low);
if (err < 0)
return err;
err = get_timing_param_ps(devbus, node, "devbus,wr-high-ps",
- &w.wr_high);
+ &w->wr_high);
if (err < 0)
return err;
+ return 0;
+}
+
+static void devbus_armada_set_timing_params(struct devbus *devbus,
+ struct device_node *node,
+ struct devbus_read_params *r,
+ struct devbus_write_params *w)
+{
+ u32 value;
+
/* Set read timings */
- value = r.bus_width << ARMADA_DEV_WIDTH_SHIFT |
- r.badr_skew << ARMADA_BADR_SKEW_SHIFT |
- r.rd_hold << ARMADA_RD_HOLD_SHIFT |
- r.acc_next << ARMADA_ACC_NEXT_SHIFT |
- r.rd_setup << ARMADA_RD_SETUP_SHIFT |
- r.acc_first << ARMADA_ACC_FIRST_SHIFT |
- r.turn_off;
+ value = r->bus_width << ARMADA_DEV_WIDTH_SHIFT |
+ r->badr_skew << ARMADA_BADR_SKEW_SHIFT |
+ r->rd_hold << ARMADA_RD_HOLD_SHIFT |
+ r->acc_next << ARMADA_ACC_NEXT_SHIFT |
+ r->rd_setup << ARMADA_RD_SETUP_SHIFT |
+ r->acc_first << ARMADA_ACC_FIRST_SHIFT |
+ r->turn_off;
dev_dbg(devbus->dev, "read parameters register 0x%p = 0x%x\n",
devbus->base + ARMADA_READ_PARAM_OFFSET,
@@ -193,24 +199,24 @@ static int devbus_set_timing_params(struct devbus *devbus,
writel(value, devbus->base + ARMADA_READ_PARAM_OFFSET);
/* Set write timings */
- value = w.sync_enable << ARMADA_SYNC_ENABLE_SHIFT |
- w.wr_low << ARMADA_WR_LOW_SHIFT |
- w.wr_high << ARMADA_WR_HIGH_SHIFT |
- w.ale_wr;
+ value = w->sync_enable << ARMADA_SYNC_ENABLE_SHIFT |
+ w->wr_low << ARMADA_WR_LOW_SHIFT |
+ w->wr_high << ARMADA_WR_HIGH_SHIFT |
+ w->ale_wr;
dev_dbg(devbus->dev, "write parameters register: 0x%p = 0x%x\n",
devbus->base + ARMADA_WRITE_PARAM_OFFSET,
value);
writel(value, devbus->base + ARMADA_WRITE_PARAM_OFFSET);
-
- return 0;
}
static int mvebu_devbus_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *node = pdev->dev.of_node;
+ struct devbus_read_params r;
+ struct devbus_write_params w;
struct devbus *devbus;
struct resource *res;
struct clk *clk;
@@ -240,11 +246,17 @@ static int mvebu_devbus_probe(struct platform_device *pdev)
rate = clk_get_rate(clk) / 1000;
devbus->tick_ps = 1000000000 / rate;
- /* Read the device tree node and set the new timing parameters */
- err = devbus_set_timing_params(devbus, node);
+ dev_dbg(devbus->dev, "Setting timing parameter, tick is %lu ps\n",
+ devbus->tick_ps);
+
+ /* Read the Device Tree node */
+ err = devbus_get_timing_params(devbus, node, &r, &w);
if (err < 0)
return err;
+ /* Set the new timing parameters */
+ devbus_armada_set_timing_params(devbus, node, &r, &w);
+
/*
* We need to create a child device explicitly from here to
* guarantee that the child will be probed after the timing
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 08/38] memory: mvebu-devbus: add Orion5x support
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (6 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 07/38] memory: mvebu-devbus: split functions Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:18 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 09/38] memory: mvebu-devbus: add a devbus, keep-config property Thomas Petazzoni
` (30 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit adds support for the Orion5x family of Marvell processors
into the mvebu-devbus driver. It differs from the already supported
Armada 370/XP by:
* Having a single register (instead of two) for doing all the timing
configuration.
* Having a few less timing configuration parameters.
For this reason, a separate compatible string "marvell,orion-devbus"
is introduced.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
.../bindings/memory-controllers/mvebu-devbus.txt | 25 ++++-
drivers/memory/mvebu-devbus.c | 107 +++++++++++++++++----
2 files changed, 106 insertions(+), 26 deletions(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt b/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt
index 653c90c..55adde2 100644
--- a/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt
@@ -6,10 +6,11 @@ The actual devices are instantiated from the child nodes of a Device Bus node.
Required properties:
- - compatible: Currently only Armada 370/XP SoC are supported,
- with this compatible string:
+ - compatible: Armada 370/XP SoC are supported using the
+ "marvell,mvebu-devbus" compatible string.
- marvell,mvebu-devbus
+ Orion5x SoC are supported using the
+ "marvell,orion-devbus" compatible string.
- reg: A resource specifier for the register space.
This is the base address of a chip select within
@@ -22,7 +23,7 @@ Required properties:
integer values for each chip-select line in use:
0 <physical address of mapping> <size>
-Mandatory timing properties for child nodes:
+Timing properties for child nodes:
Read parameters:
@@ -30,21 +31,26 @@ Read parameters:
drive the AD bus after the completion of a device read.
This prevents contentions on the Device Bus after a read
cycle from a slow device.
+ Mandatory.
- - devbus,bus-width: Defines the bus width (e.g. <16>)
+ - devbus,bus-width: Defines the bus width, in bits (e.g. <16>).
+ Mandatory.
- devbus,badr-skew-ps: Defines the time delay from from A[2:0] toggle,
to read data sample. This parameter is useful for
synchronous pipelined devices, where the address
precedes the read data by one or two cycles.
+ Mandatory.
- devbus,acc-first-ps: Defines the time delay from the negation of
ALE[0] to the cycle that the first read data is sampled
by the controller.
+ Mandatory.
- devbus,acc-next-ps: Defines the time delay between the cycle that
samples data N and the cycle that samples data N+1
(in burst accesses).
+ Mandatory.
- devbus,rd-setup-ps: Defines the time delay between DEV_CSn assertion to
DEV_OEn assertion. If set to 0 (default),
@@ -52,6 +58,8 @@ Read parameters:
This parameter has no affect on <acc-first-ps> parameter
(no affect on first data sample). Set <rd-setup-ps>
to a value smaller than <acc-first-ps>.
+ Mandatory for "marvell,mvebu-devbus"
+ compatible string, ignored otherwise.
- devbus,rd-hold-ps: Defines the time between the last data sample to the
de-assertion of DEV_CSn. If set to 0 (default),
@@ -62,16 +70,20 @@ Read parameters:
last data sampled. Also this parameter has no
affect on <turn-off-ps> parameter.
Set <rd-hold-ps> to a value smaller than <turn-off-ps>.
+ Mandatory for "marvell,mvebu-devbus"
+ compatible string, ignored otherwise.
Write parameters:
- devbus,ale-wr-ps: Defines the time delay from the ALE[0] negation cycle
to the DEV_WEn assertion.
+ Mandatory.
- devbus,wr-low-ps: Defines the time during which DEV_WEn is active.
A[2:0] and Data are kept valid as long as DEV_WEn
is active. This parameter defines the setup time of
address and data to DEV_WEn rise.
+ Mandatory.
- devbus,wr-high-ps: Defines the time during which DEV_WEn is kept
inactive (high) between data beats of a burst write.
@@ -79,10 +91,13 @@ Write parameters:
<wr-high-ps> - <tick> ps.
This parameter defines the hold time of address and
data after DEV_WEn rise.
+ Mandatory.
- devbus,sync-enable: Synchronous device enable.
1: True
0: False
+ Mandatory for "marvell,mvebu-devbus" compatible
+ string, ignored otherwise.
An example for an Armada XP GP board, with a 16 MiB NOR device as child
is showed below. Note that the Device Bus driver is in charge of allocating
diff --git a/drivers/memory/mvebu-devbus.c b/drivers/memory/mvebu-devbus.c
index 5dc9c63..c8f3dad 100644
--- a/drivers/memory/mvebu-devbus.c
+++ b/drivers/memory/mvebu-devbus.c
@@ -2,7 +2,7 @@
* Marvell EBU SoC Device Bus Controller
* (memory controller for NOR/NAND/SRAM/FPGA devices)
*
- * Copyright (C) 2013 Marvell
+ * Copyright (C) 2013-2014 Marvell
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -44,6 +44,34 @@
#define ARMADA_READ_PARAM_OFFSET 0x0
#define ARMADA_WRITE_PARAM_OFFSET 0x4
+#define ORION_RESERVED (0x2 << 30)
+#define ORION_BADR_SKEW_SHIFT 28
+#define ORION_WR_HIGH_EXT_BIT BIT(27)
+#define ORION_WR_HIGH_EXT_MASK 0x8
+#define ORION_WR_LOW_EXT_BIT BIT(26)
+#define ORION_WR_LOW_EXT_MASK 0x8
+#define ORION_ALE_WR_EXT_BIT BIT(25)
+#define ORION_ALE_WR_EXT_MASK 0x8
+#define ORION_ACC_NEXT_EXT_BIT BIT(24)
+#define ORION_ACC_NEXT_EXT_MASK 0x10
+#define ORION_ACC_FIRST_EXT_BIT BIT(23)
+#define ORION_ACC_FIRST_EXT_MASK 0x10
+#define ORION_TURN_OFF_EXT_BIT BIT(22)
+#define ORION_TURN_OFF_EXT_MASK 0x8
+#define ORION_DEV_WIDTH_SHIFT 20
+#define ORION_WR_HIGH_SHIFT 17
+#define ORION_WR_HIGH_MASK 0x7
+#define ORION_WR_LOW_SHIFT 14
+#define ORION_WR_LOW_MASK 0x7
+#define ORION_ALE_WR_SHIFT 11
+#define ORION_ALE_WR_MASK 0x7
+#define ORION_ACC_NEXT_SHIFT 7
+#define ORION_ACC_NEXT_MASK 0xF
+#define ORION_ACC_FIRST_SHIFT 3
+#define ORION_ACC_FIRST_MASK 0xF
+#define ORION_TURN_OFF_SHIFT 0
+#define ORION_TURN_OFF_MASK 0x7
+
struct devbus_read_params {
u32 bus_width;
u32 badr_skew;
@@ -96,7 +124,6 @@ static int devbus_get_timing_params(struct devbus *devbus,
{
int err;
- /* Get read timings */
err = of_property_read_u32(node, "devbus,bus-width", &r->bus_width);
if (err < 0) {
dev_err(devbus->dev,
@@ -138,24 +165,25 @@ static int devbus_get_timing_params(struct devbus *devbus,
if (err < 0)
return err;
- err = get_timing_param_ps(devbus, node, "devbus,rd-setup-ps",
- &r->rd_setup);
- if (err < 0)
- return err;
-
- err = get_timing_param_ps(devbus, node, "devbus,rd-hold-ps",
- &r->rd_hold);
- if (err < 0)
- return err;
-
- /* Get write timings */
- err = of_property_read_u32(node, "devbus,sync-enable",
- &w->sync_enable);
- if (err < 0) {
- dev_err(devbus->dev,
- "%s has no 'devbus,sync-enable' property\n",
- node->full_name);
- return err;
+ if (of_device_is_compatible(devbus->dev->of_node, "marvell,mvebu-devbus")) {
+ err = get_timing_param_ps(devbus, node, "devbus,rd-setup-ps",
+ &r->rd_setup);
+ if (err < 0)
+ return err;
+
+ err = get_timing_param_ps(devbus, node, "devbus,rd-hold-ps",
+ &r->rd_hold);
+ if (err < 0)
+ return err;
+
+ err = of_property_read_u32(node, "devbus,sync-enable",
+ &w->sync_enable);
+ if (err < 0) {
+ dev_err(devbus->dev,
+ "%s has no 'devbus,sync-enable' property\n",
+ node->full_name);
+ return err;
+ }
}
err = get_timing_param_ps(devbus, node, "devbus,ale-wr-ps",
@@ -176,6 +204,39 @@ static int devbus_get_timing_params(struct devbus *devbus,
return 0;
}
+static void devbus_orion_set_timing_params(struct devbus *devbus,
+ struct device_node *node,
+ struct devbus_read_params *r,
+ struct devbus_write_params *w)
+{
+ u32 value;
+
+ /*
+ * The hardware designers found it would be a good idea to
+ * split most of the values in the register into two fields:
+ * one containing all the low-order bits, and another one
+ * containing just the high-order bit. For all of those
+ * fields, we have to split the value into these two parts.
+ */
+ value = (r->turn_off & ORION_TURN_OFF_MASK) << ORION_TURN_OFF_SHIFT |
+ (r->acc_first & ORION_ACC_FIRST_MASK) << ORION_ACC_FIRST_SHIFT |
+ (r->acc_next & ORION_ACC_NEXT_MASK) << ORION_ACC_NEXT_SHIFT |
+ (w->ale_wr & ORION_ALE_WR_MASK) << ORION_ALE_WR_SHIFT |
+ (w->wr_low & ORION_WR_LOW_MASK) << ORION_WR_LOW_SHIFT |
+ (w->wr_high & ORION_WR_HIGH_MASK) << ORION_WR_HIGH_SHIFT |
+ r->bus_width << ORION_DEV_WIDTH_SHIFT |
+ ((r->turn_off & ORION_TURN_OFF_EXT_MASK) ? ORION_TURN_OFF_EXT_BIT : 0) |
+ ((r->acc_first & ORION_ACC_FIRST_EXT_MASK) ? ORION_ACC_FIRST_EXT_BIT : 0) |
+ ((r->acc_next & ORION_ACC_NEXT_EXT_MASK) ? ORION_ACC_NEXT_EXT_BIT : 0) |
+ ((w->ale_wr & ORION_ALE_WR_EXT_MASK) ? ORION_ALE_WR_EXT_BIT : 0) |
+ ((w->wr_low & ORION_WR_LOW_EXT_MASK) ? ORION_WR_LOW_EXT_BIT : 0) |
+ ((w->wr_high & ORION_WR_HIGH_EXT_MASK) ? ORION_WR_HIGH_EXT_BIT : 0) |
+ (r->badr_skew << ORION_BADR_SKEW_SHIFT) |
+ ORION_RESERVED;
+
+ writel(value, devbus->base);
+}
+
static void devbus_armada_set_timing_params(struct devbus *devbus,
struct device_node *node,
struct devbus_read_params *r,
@@ -255,7 +316,10 @@ static int mvebu_devbus_probe(struct platform_device *pdev)
return err;
/* Set the new timing parameters */
- devbus_armada_set_timing_params(devbus, node, &r, &w);
+ if (of_device_is_compatible(node, "marvell,orion-devbus"))
+ devbus_orion_set_timing_params(devbus, node, &r, &w);
+ else
+ devbus_armada_set_timing_params(devbus, node, &r, &w);
/*
* We need to create a child device explicitly from here to
@@ -271,6 +335,7 @@ static int mvebu_devbus_probe(struct platform_device *pdev)
static const struct of_device_id mvebu_devbus_of_match[] = {
{ .compatible = "marvell,mvebu-devbus" },
+ { .compatible = "marvell,orion-devbus" },
{},
};
MODULE_DEVICE_TABLE(of, mvebu_devbus_of_match);
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 09/38] memory: mvebu-devbus: add a devbus, keep-config property
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (7 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 08/38] memory: mvebu-devbus: add Orion5x support Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:18 ` [PATCH v2 09/38] memory: mvebu-devbus: add a devbus,keep-config property Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 10/38] ARM: orion5x: move interrupt controller node into ocp Thomas Petazzoni
` (29 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
Currently, the mvebu-devbus Device Tree binding makes defining the
timing parameters mandatory.
However, in practice, when converting Orion5x platforms to the Device
Tree, we may not necessarily have easy access to the hardware
platforms to fetch those values which were not defined in old-style
board files: all these platforms rely on the bootloader setting the
timing parameters correctly.
In order to facilitate the migration to the Device Tree of this
platform, this commit relaxes the mvebu-devbus Device Tree binding by
introducing a 'devbus,keep-config' boolean property, which, if
defined, will ignore all timing parameters passed in the Device Tree,
and simply rely on the timing values already defined by the
bootloader.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
.../bindings/memory-controllers/mvebu-devbus.txt | 29 ++++++++++++++--------
drivers/memory/mvebu-devbus.c | 20 ++++++++-------
2 files changed, 29 insertions(+), 20 deletions(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt b/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt
index 55adde2..1ee3bc0 100644
--- a/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt
@@ -23,6 +23,13 @@ Required properties:
integer values for each chip-select line in use:
0 <physical address of mapping> <size>
+Optional properties:
+
+ - devbus,keep-config This property can optionally be used to keep
+ using the timing parameters set by the
+ bootloader. It makes all the timing properties
+ described below unused.
+
Timing properties for child nodes:
Read parameters:
@@ -31,26 +38,26 @@ Read parameters:
drive the AD bus after the completion of a device read.
This prevents contentions on the Device Bus after a read
cycle from a slow device.
- Mandatory.
+ Mandatory, except if devbus,keep-config is used.
- devbus,bus-width: Defines the bus width, in bits (e.g. <16>).
- Mandatory.
+ Mandatory, except if devbus,keep-config is used.
- devbus,badr-skew-ps: Defines the time delay from from A[2:0] toggle,
to read data sample. This parameter is useful for
synchronous pipelined devices, where the address
precedes the read data by one or two cycles.
- Mandatory.
+ Mandatory, except if devbus,keep-config is used.
- devbus,acc-first-ps: Defines the time delay from the negation of
ALE[0] to the cycle that the first read data is sampled
by the controller.
- Mandatory.
+ Mandatory, except if devbus,keep-config is used.
- devbus,acc-next-ps: Defines the time delay between the cycle that
samples data N and the cycle that samples data N+1
(in burst accesses).
- Mandatory.
+ Mandatory, except if devbus,keep-config is used.
- devbus,rd-setup-ps: Defines the time delay between DEV_CSn assertion to
DEV_OEn assertion. If set to 0 (default),
@@ -58,8 +65,8 @@ Read parameters:
This parameter has no affect on <acc-first-ps> parameter
(no affect on first data sample). Set <rd-setup-ps>
to a value smaller than <acc-first-ps>.
- Mandatory for "marvell,mvebu-devbus"
- compatible string, ignored otherwise.
+ Mandatory for "marvell,mvebu-devbus" compatible string,
+ except if devbus,keep-config is used.
- devbus,rd-hold-ps: Defines the time between the last data sample to the
de-assertion of DEV_CSn. If set to 0 (default),
@@ -70,8 +77,8 @@ Read parameters:
last data sampled. Also this parameter has no
affect on <turn-off-ps> parameter.
Set <rd-hold-ps> to a value smaller than <turn-off-ps>.
- Mandatory for "marvell,mvebu-devbus"
- compatible string, ignored otherwise.
+ Mandatory for "marvell,mvebu-devbus" compatible string,
+ except if devbus,keep-config is used.
Write parameters:
@@ -96,8 +103,8 @@ Write parameters:
- devbus,sync-enable: Synchronous device enable.
1: True
0: False
- Mandatory for "marvell,mvebu-devbus" compatible
- string, ignored otherwise.
+ Mandatory for "marvell,mvebu-devbus" compatible string,
+ except if devbus,keep-config is used.
An example for an Armada XP GP board, with a 16 MiB NOR device as child
is showed below. Note that the Device Bus driver is in charge of allocating
diff --git a/drivers/memory/mvebu-devbus.c b/drivers/memory/mvebu-devbus.c
index c8f3dad..ff7138f 100644
--- a/drivers/memory/mvebu-devbus.c
+++ b/drivers/memory/mvebu-devbus.c
@@ -310,16 +310,18 @@ static int mvebu_devbus_probe(struct platform_device *pdev)
dev_dbg(devbus->dev, "Setting timing parameter, tick is %lu ps\n",
devbus->tick_ps);
- /* Read the Device Tree node */
- err = devbus_get_timing_params(devbus, node, &r, &w);
- if (err < 0)
- return err;
+ if (!of_property_read_bool(node, "devbus,keep-config")) {
+ /* Read the Device Tree node */
+ err = devbus_get_timing_params(devbus, node, &r, &w);
+ if (err < 0)
+ return err;
- /* Set the new timing parameters */
- if (of_device_is_compatible(node, "marvell,orion-devbus"))
- devbus_orion_set_timing_params(devbus, node, &r, &w);
- else
- devbus_armada_set_timing_params(devbus, node, &r, &w);
+ /* Set the new timing parameters */
+ if (of_device_is_compatible(node, "marvell,orion-devbus"))
+ devbus_orion_set_timing_params(devbus, node, &r, &w);
+ else
+ devbus_armada_set_timing_params(devbus, node, &r, &w);
+ }
/*
* We need to create a child device explicitly from here to
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 10/38] ARM: orion5x: move interrupt controller node into ocp
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (8 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 09/38] memory: mvebu-devbus: add a devbus, keep-config property Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 11/38] ARM: orion5x: switch to preprocessor includes in DT Thomas Petazzoni
` (28 subsequent siblings)
38 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
The interrupt controller node was located outside of the ocp at f1000000
node, which doesn't make much sense: like any other device, the
interrupt controller has registers located in the "Internal Registers
Window", so it is much more logical to have it under the ocp at f1000000
node.
It is even more important as we are going to move Orion5x to use the
Device Tree binding of the mvebu-mbus driver.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
arch/arm/boot/dts/orion5x.dtsi | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
index 174d892..da57fb9 100644
--- a/arch/arm/boot/dts/orion5x.dtsi
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -17,13 +17,6 @@
gpio0 = &gpio0;
};
- intc: interrupt-controller {
- compatible = "marvell,orion-intc";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0xf1020200 0x08>;
- };
-
ocp at f1000000 {
compatible = "simple-bus";
ranges = <0x00000000 0xf1000000 0x4000000
@@ -79,6 +72,13 @@
status = "disabled";
};
+ intc: interrupt-controller@20200 {
+ compatible = "marvell,orion-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x20200 0x08>;
+ };
+
wdt at 20300 {
compatible = "marvell,orion-wdt";
reg = <0x20300 0x28>;
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 11/38] ARM: orion5x: switch to preprocessor includes in DT
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (9 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 10/38] ARM: orion5x: move interrupt controller node into ocp Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 12/38] ARM: orion5x: use existing dt-bindings include for Device Tree files Thomas Petazzoni
` (27 subsequent siblings)
38 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit switches the Orion5x Device Tree files to use C
preprocessor based includes, as it will allow us to use definitions
from header files in future commits.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 3 ++-
arch/arm/boot/dts/orion5x.dtsi | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index 5ed6c13..0245bb3 100644
--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -7,7 +7,8 @@
*/
/dts-v1/;
-/include/ "orion5x.dtsi"
+
+#include "orion5x.dtsi"
/ {
model = "LaCie Ethernet Disk mini V2";
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
index da57fb9..2364e3d 100644
--- a/arch/arm/boot/dts/orion5x.dtsi
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -6,7 +6,7 @@
* warranty of any kind, whether express or implied.
*/
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
/ {
model = "Marvell Orion5x SoC";
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 12/38] ARM: orion5x: use existing dt-bindings include for Device Tree files
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (10 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 11/38] ARM: orion5x: switch to preprocessor includes in DT Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 13/38] ARM: orion5x: convert DT to use the mvebu-mbus driver Thomas Petazzoni
` (26 subsequent siblings)
38 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
The orion5x-lacie-ethernet-disk-mini-v2.dts can benefit from using
gpio.h and input.h dt-bindings headers to replace hardcoded values by
more meaningful macros.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index 0245bb3..24f1ce7 100644
--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -8,6 +8,8 @@
/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
#include "orion5x.dtsi"
/ {
@@ -40,8 +42,8 @@
#size-cells = <0>;
button at 1 {
label = "Power-on Switch";
- linux,code = <116>; /* KEY_POWER */
- gpios = <&gpio0 18 0>;
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
};
};
@@ -50,7 +52,7 @@
led at 1 {
label = "power:blue";
- gpios = <&gpio0 16 1>;
+ gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
};
};
};
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 13/38] ARM: orion5x: convert DT to use the mvebu-mbus driver
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (11 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 12/38] ARM: orion5x: use existing dt-bindings include for Device Tree files Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:22 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 14/38] ARM: orion5x: add node labels in Orion5x SoC Device Tree file Thomas Petazzoni
` (25 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit switches the Orion5x Device Tree files to use the DT
representation and probing for the mvebu-mbus driver. The changes are
mainly:
* Re-organize the DT to follow the same organization as the one used
on Armada 370/XP, which is needed for mvebu-mbus to work: a
top-level soc { ... } node, which corresponds to the MBus bus, and
a sub-node internal-regs { ... } for all peripherals whose register
sit only in the "Internal Register Window". This change re-indents
by one level the definition of all nodes in the Device Tree, which
explains the large change.
* Use custom functions orion5x_dt_init_early() and
orion5x_dt_init_time() instead of orion5x_init_early() and
orion5x_timer_init() as we now want the MBus driver to be probed
from the Device Tree. We still use the old-style timer
initialization, but that will be changed in a followup commit.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
.../dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 23 +-
arch/arm/boot/dts/orion5x-mv88f5182.dtsi | 24 ++
arch/arm/boot/dts/orion5x.dtsi | 245 +++++++++++----------
arch/arm/mach-orion5x/board-dt.c | 20 +-
4 files changed, 182 insertions(+), 130 deletions(-)
create mode 100644 arch/arm/boot/dts/orion5x-mv88f5182.dtsi
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index 24f1ce7..d66d2fa 100644
--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -10,7 +10,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
-#include "orion5x.dtsi"
+#include "orion5x-mv88f5182.dtsi"
/ {
model = "LaCie Ethernet Disk mini V2";
@@ -24,15 +24,20 @@
bootargs = "console=ttyS0,115200n8 earlyprintk";
};
- ocp at f1000000 {
- serial at 12000 {
- clock-frequency = <166666667>;
- status = "okay";
- };
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
+ <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>;
+
+ internal-regs {
+ serial at 12000 {
+ clock-frequency = <166666667>;
+ status = "okay";
+ };
- sata at 80000 {
- status = "okay";
- nr-ports = <2>;
+ sata at 80000 {
+ status = "okay";
+ nr-ports = <2>;
+ };
};
};
diff --git a/arch/arm/boot/dts/orion5x-mv88f5182.dtsi b/arch/arm/boot/dts/orion5x-mv88f5182.dtsi
new file mode 100644
index 0000000..ddfb4d1
--- /dev/null
+++ b/arch/arm/boot/dts/orion5x-mv88f5182.dtsi
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include "orion5x.dtsi"
+
+/ {
+ compatible = "marvell,orion5x-88f5182", "marvell,orion5x";
+
+ soc {
+ compatible = "marvell,orion5x-88f5182-mbus", "simple-bus";
+
+ internal-regs {
+ mbusc: mbus-controller at 20000 {
+ compatible = "marvell,mbus-controller";
+ reg = <0x20000 0x100>, <0x1500 0x20>;
+ };
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
index 2364e3d..31d46e6 100644
--- a/arch/arm/boot/dts/orion5x.dtsi
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -8,6 +8,8 @@
#include "skeleton.dtsi"
+#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
+
/ {
model = "Marvell Orion5x SoC";
compatible = "marvell,orion5x";
@@ -17,149 +19,154 @@
gpio0 = &gpio0;
};
- ocp@f1000000 {
- compatible = "simple-bus";
- ranges = <0x00000000 0xf1000000 0x4000000
- 0xf2200000 0xf2200000 0x0000800>;
- #address-cells = <1>;
+ soc {
+ #address-cells = <2>;
#size-cells = <1>;
+ controller = <&mbusc>;
- gpio0: gpio at 10100 {
- compatible = "marvell,orion-gpio";
- #gpio-cells = <2>;
- gpio-controller;
- reg = <0x10100 0x40>;
- ngpios = <32>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <6>, <7>, <8>, <9>;
- };
-
- spi at 10600 {
- compatible = "marvell,orion-spi";
+ internal-regs {
+ compatible = "simple-bus";
#address-cells = <1>;
- #size-cells = <0>;
- cell-index = <0>;
- reg = <0x10600 0x28>;
- status = "disabled";
- };
-
- i2c at 11000 {
- compatible = "marvell,mv64xxx-i2c";
- reg = <0x11000 0x20>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <5>;
- clock-frequency = <100000>;
- status = "disabled";
- };
+ #size-cells = <1>;
+ ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
+
+ gpio0: gpio at 10100 {
+ compatible = "marvell,orion-gpio";
+ #gpio-cells = <2>;
+ gpio-controller;
+ reg = <0x10100 0x40>;
+ ngpios = <32>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <6>, <7>, <8>, <9>;
+ };
- serial at 12000 {
- compatible = "ns16550a";
- reg = <0x12000 0x100>;
- reg-shift = <2>;
- interrupts = <3>;
- /* set clock-frequency in board dts */
- status = "disabled";
- };
+ spi at 10600 {
+ compatible = "marvell,orion-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ reg = <0x10600 0x28>;
+ status = "disabled";
+ };
- serial at 12100 {
- compatible = "ns16550a";
- reg = <0x12100 0x100>;
- reg-shift = <2>;
- interrupts = <4>;
- /* set clock-frequency in board dts */
- status = "disabled";
- };
+ i2c at 11000 {
+ compatible = "marvell,mv64xxx-i2c";
+ reg = <0x11000 0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <5>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
- intc: interrupt-controller at 20200 {
- compatible = "marvell,orion-intc";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x20200 0x08>;
- };
+ serial at 12000 {
+ compatible = "ns16550a";
+ reg = <0x12000 0x100>;
+ reg-shift = <2>;
+ interrupts = <3>;
+ /* set clock-frequency in board dts */
+ status = "disabled";
+ };
- wdt at 20300 {
- compatible = "marvell,orion-wdt";
- reg = <0x20300 0x28>;
- status = "okay";
- };
+ serial at 12100 {
+ compatible = "ns16550a";
+ reg = <0x12100 0x100>;
+ reg-shift = <2>;
+ interrupts = <4>;
+ /* set clock-frequency in board dts */
+ status = "disabled";
+ };
- ehci at 50000 {
- compatible = "marvell,orion-ehci";
- reg = <0x50000 0x1000>;
- interrupts = <17>;
- status = "disabled";
- };
+ intc: interrupt-controller at 20200 {
+ compatible = "marvell,orion-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x20200 0x08>;
+ };
- xor at 60900 {
- compatible = "marvell,orion-xor";
- reg = <0x60900 0x100
- 0x60b00 0x100>;
- status = "okay";
+ wdt at 20300 {
+ compatible = "marvell,orion-wdt";
+ reg = <0x20300 0x28>;
+ status = "okay";
+ };
- xor00 {
- interrupts = <30>;
- dmacap,memcpy;
- dmacap,xor;
+ ehci at 50000 {
+ compatible = "marvell,orion-ehci";
+ reg = <0x50000 0x1000>;
+ interrupts = <17>;
+ status = "disabled";
};
- xor01 {
- interrupts = <31>;
- dmacap,memcpy;
- dmacap,xor;
- dmacap,memset;
+
+ xor at 60900 {
+ compatible = "marvell,orion-xor";
+ reg = <0x60900 0x100
+ 0x60b00 0x100>;
+ status = "okay";
+
+ xor00 {
+ interrupts = <30>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor01 {
+ interrupts = <31>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
};
- };
- eth: ethernet-controller at 72000 {
- compatible = "marvell,orion-eth";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x72000 0x4000>;
- marvell,tx-checksum-limit = <1600>;
- status = "disabled";
-
- ethernet-port at 0 {
- compatible = "marvell,orion-eth-port";
- reg = <0>;
- /* overwrite MAC address in bootloader */
- local-mac-address = [00 00 00 00 00 00];
- /* set phy-handle property in board file */
+ eth: ethernet-controller at 72000 {
+ compatible = "marvell,orion-eth";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x72000 0x4000>;
+ marvell,tx-checksum-limit = <1600>;
+ status = "disabled";
+
+ ethernet-port at 0 {
+ compatible = "marvell,orion-eth-port";
+ reg = <0>;
+ /* overwrite MAC address in bootloader */
+ local-mac-address = [00 00 00 00 00 00];
+ /* set phy-handle property in board file */
+ };
};
- };
- mdio: mdio-bus at 72004 {
- compatible = "marvell,orion-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x72004 0x84>;
- interrupts = <22>;
- status = "disabled";
+ mdio: mdio-bus at 72004 {
+ compatible = "marvell,orion-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x72004 0x84>;
+ interrupts = <22>;
+ status = "disabled";
- /* add phy nodes in board file */
- };
+ /* add phy nodes in board file */
+ };
+
+ sata at 80000 {
+ compatible = "marvell,orion-sata";
+ reg = <0x80000 0x5000>;
+ interrupts = <29>;
+ status = "disabled";
+ };
- sata at 80000 {
- compatible = "marvell,orion-sata";
- reg = <0x80000 0x5000>;
- interrupts = <29>;
- status = "disabled";
+ ehci at a0000 {
+ compatible = "marvell,orion-ehci";
+ reg = <0xa0000 0x1000>;
+ interrupts = <12>;
+ status = "disabled";
+ };
};
crypto at 90000 {
compatible = "marvell,orion-crypto";
- reg = <0x90000 0x10000>,
- <0xf2200000 0x800>;
+ reg = <MBUS_ID(0xf0, 0x01) 0x90000 0x10000>,
+ <MBUS_ID(0x09, 0x00) 0x0 0x800>;
reg-names = "regs", "sram";
interrupts = <28>;
status = "okay";
};
-
- ehci at a0000 {
- compatible = "marvell,orion-ehci";
- reg = <0xa0000 0x1000>;
- interrupts = <12>;
- status = "disabled";
- };
};
};
diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c
index c134a82..7f00897 100644
--- a/arch/arm/mach-orion5x/board-dt.c
+++ b/arch/arm/mach-orion5x/board-dt.c
@@ -15,10 +15,14 @@
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/cpu.h>
+#include <linux/mbus.h>
#include <asm/system_misc.h>
#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
#include <mach/orion5x.h>
+#include <mach/bridge-regs.h>
#include <plat/irq.h>
+#include <plat/time.h>
#include "common.h"
static struct of_dev_auxdata orion5x_auxdata_lookup[] __initdata = {
@@ -31,6 +35,16 @@ static struct of_dev_auxdata orion5x_auxdata_lookup[] __initdata = {
{},
};
+static void orion5x_dt_init_early(void)
+{
+ orion_time_set_base(TIMER_VIRT_BASE);
+}
+
+static void orion5x_dt_init_time(void)
+{
+ orion5x_timer_init();
+}
+
static void __init orion5x_dt_init(void)
{
char *dev_name;
@@ -39,6 +53,8 @@ static void __init orion5x_dt_init(void)
orion5x_id(&dev, &rev, &dev_name);
printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
+ BUG_ON(mvebu_mbus_dt_init());
+
/*
* Setup Orion address map
*/
@@ -71,9 +87,9 @@ static const char *orion5x_dt_compat[] = {
DT_MACHINE_START(ORION5X_DT, "Marvell Orion5x (Flattened Device Tree)")
/* Maintainer: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> */
.map_io = orion5x_map_io,
- .init_early = orion5x_init_early,
+ .init_early = orion5x_dt_init_early,
.init_irq = orion_dt_init_irq,
- .init_time = orion5x_timer_init,
+ .init_time = orion5x_dt_init_time,
.init_machine = orion5x_dt_init,
.restart = orion5x_restart,
.dt_compat = orion5x_dt_compat,
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 14/38] ARM: orion5x: add node labels in Orion5x SoC Device Tree file
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (12 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 13/38] ARM: orion5x: convert DT to use the mvebu-mbus driver Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:22 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 15/38] ARM: orion5x: use gpio-keys and gpio-leds instead of gpio_keys/gpio_leds in edmini_v2 Thomas Petazzoni
` (24 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
In order to ease identification of devices, it is useful to have
Device Tree labels on all devices. This commit adds such labels to the
Orion5x SoC Device Tree file.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/orion5x.dtsi | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
index 31d46e6..aef5d17 100644
--- a/arch/arm/boot/dts/orion5x.dtsi
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -41,7 +41,7 @@
interrupts = <6>, <7>, <8>, <9>;
};
- spi at 10600 {
+ spi: spi at 10600 {
compatible = "marvell,orion-spi";
#address-cells = <1>;
#size-cells = <0>;
@@ -50,7 +50,7 @@
status = "disabled";
};
- i2c at 11000 {
+ i2c: i2c at 11000 {
compatible = "marvell,mv64xxx-i2c";
reg = <0x11000 0x20>;
#address-cells = <1>;
@@ -60,7 +60,7 @@
status = "disabled";
};
- serial at 12000 {
+ uart0: serial at 12000 {
compatible = "ns16550a";
reg = <0x12000 0x100>;
reg-shift = <2>;
@@ -69,7 +69,7 @@
status = "disabled";
};
- serial at 12100 {
+ uart1: serial at 12100 {
compatible = "ns16550a";
reg = <0x12100 0x100>;
reg-shift = <2>;
@@ -85,20 +85,20 @@
reg = <0x20200 0x08>;
};
- wdt at 20300 {
+ wdt: wdt at 20300 {
compatible = "marvell,orion-wdt";
reg = <0x20300 0x28>;
status = "okay";
};
- ehci at 50000 {
+ ehci0: ehci at 50000 {
compatible = "marvell,orion-ehci";
reg = <0x50000 0x1000>;
interrupts = <17>;
status = "disabled";
};
- xor at 60900 {
+ xor: xor at 60900 {
compatible = "marvell,orion-xor";
reg = <0x60900 0x100
0x60b00 0x100>;
@@ -125,7 +125,7 @@
marvell,tx-checksum-limit = <1600>;
status = "disabled";
- ethernet-port at 0 {
+ ethport: ethernet-port at 0 {
compatible = "marvell,orion-eth-port";
reg = <0>;
/* overwrite MAC address in bootloader */
@@ -145,14 +145,14 @@
/* add phy nodes in board file */
};
- sata at 80000 {
+ sata: sata at 80000 {
compatible = "marvell,orion-sata";
reg = <0x80000 0x5000>;
interrupts = <29>;
status = "disabled";
};
- ehci at a0000 {
+ ehci1: ehci at a0000 {
compatible = "marvell,orion-ehci";
reg = <0xa0000 0x1000>;
interrupts = <12>;
@@ -160,7 +160,7 @@
};
};
- crypto at 90000 {
+ cesa: crypto at 90000 {
compatible = "marvell,orion-crypto";
reg = <MBUS_ID(0xf0, 0x01) 0x90000 0x10000>,
<MBUS_ID(0x09, 0x00) 0x0 0x800>;
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 15/38] ARM: orion5x: use gpio-keys and gpio-leds instead of gpio_keys/gpio_leds in edmini_v2
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (13 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 14/38] ARM: orion5x: add node labels in Orion5x SoC Device Tree file Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:22 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 16/38] ARM: orion5x: add linux,stdout-path to edmini_v2 Thomas Petazzoni
` (23 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
As noted by Sebastian Hesselbarth, the Device Tree nodes for GPIO keys
and LEDs should be named gpio-keys and gpio-leds.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index d66d2fa..d85a206 100644
--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -41,7 +41,7 @@
};
};
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
@@ -52,7 +52,7 @@
};
};
- gpio_leds {
+ gpio-leds {
compatible = "gpio-leds";
led at 1 {
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 16/38] ARM: orion5x: add linux,stdout-path to edmini_v2
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (14 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 15/38] ARM: orion5x: use gpio-keys and gpio-leds instead of gpio_keys/gpio_leds in edmini_v2 Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:22 ` [PATCH v2 16/38] ARM: orion5x: add linux, stdout-path " Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 17/38] ARM: orion5x: use node labels for UART and SATA on edmini_v2 Thomas Petazzoni
` (22 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit adds the new linux,stdout-path to the edmini_v2 platform,
pointing to the serial device use for the console.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index d85a206..df53d256 100644
--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -22,6 +22,7 @@
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
+ linux,stdout-path = &uart0;
};
soc {
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 17/38] ARM: orion5x: use node labels for UART and SATA on edmini_v2
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (15 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 16/38] ARM: orion5x: add linux,stdout-path to edmini_v2 Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:23 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 18/38] ARM: orion5x: rename XOR node to dma-controller@<address> Thomas Petazzoni
` (21 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit converts the existing devices described in the edmini_v2
Device Tree to use node labels: the UART and SATA device. Also, it
reorders the eth and mdio node label references to be sorted
alphabetically.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
.../dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 30 ++++++++++------------
1 file changed, 14 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index df53d256..83f45a7 100644
--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -28,18 +28,6 @@
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
<MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>;
-
- internal-regs {
- serial at 12000 {
- clock-frequency = <166666667>;
- status = "okay";
- };
-
- sata at 80000 {
- status = "okay";
- nr-ports = <2>;
- };
- };
};
gpio-keys {
@@ -63,6 +51,14 @@
};
};
+ð {
+ status = "okay";
+
+ ethernet-port at 0 {
+ phy-handle = <ðphy>;
+ };
+};
+
&mdio {
status = "okay";
@@ -71,10 +67,12 @@
};
};
-ð {
+&sata {
status = "okay";
+ nr-ports = <2>;
+};
- ethernet-port at 0 {
- phy-handle = <ðphy>;
- };
+&uart0 {
+ clock-frequency = <166666667>;
+ status = "okay";
};
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 18/38] ARM: orion5x: rename XOR node to dma-controller@<address>
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (16 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 17/38] ARM: orion5x: use node labels for UART and SATA on edmini_v2 Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 19/38] ARM: orion5x: add interrupt for Ethernet in Device Tree Thomas Petazzoni
` (20 subsequent siblings)
38 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit renames the XOR engine Device Tree node to
dma-controller@, to conform with the standard node name proposed by
the ePAPR.
Suggested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/orion5x.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
index aef5d17..3802d4f 100644
--- a/arch/arm/boot/dts/orion5x.dtsi
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -98,7 +98,7 @@
status = "disabled";
};
- xor: xor at 60900 {
+ xor: dma-controller at 60900 {
compatible = "marvell,orion-xor";
reg = <0x60900 0x100
0x60b00 0x100>;
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 19/38] ARM: orion5x: add interrupt for Ethernet in Device Tree
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (17 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 18/38] ARM: orion5x: rename XOR node to dma-controller@<address> Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 20/38] ARM: orion5x: switch to use the clock driver for DT platforms Thomas Petazzoni
` (19 subsequent siblings)
38 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
For some reason, the Ethernet interrupt was missing in the Orion5x
Device Tree definition.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
arch/arm/boot/dts/orion5x.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
index 3802d4f..ad23ff4 100644
--- a/arch/arm/boot/dts/orion5x.dtsi
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -128,6 +128,7 @@
ethport: ethernet-port at 0 {
compatible = "marvell,orion-eth-port";
reg = <0>;
+ interrupts = <21>;
/* overwrite MAC address in bootloader */
local-mac-address = [00 00 00 00 00 00];
/* set phy-handle property in board file */
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 20/38] ARM: orion5x: switch to use the clock driver for DT platforms
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (18 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 19/38] ARM: orion5x: add interrupt for Ethernet in Device Tree Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 21/38] ARM: orion5x: convert to use 'clocks' property for UART controllers Thomas Petazzoni
` (18 subsequent siblings)
38 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit moves the Orion5x platforms using the Device Tree to use
the recently introduced clock driver for Orion5x. To achieve that, it:
* Adds the necessary DT description of the clock.
* Selects ORION_CLK to enable the compilation of the clock driver.
* Call of_clk_init() instead of the Orion5x-specific clock
initialization function.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
arch/arm/boot/dts/orion5x-mv88f5182.dtsi | 6 ++++++
arch/arm/mach-orion5x/Kconfig | 1 +
arch/arm/mach-orion5x/board-dt.c | 5 ++---
3 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/orion5x-mv88f5182.dtsi b/arch/arm/boot/dts/orion5x-mv88f5182.dtsi
index ddfb4d1..a56f9c8 100644
--- a/arch/arm/boot/dts/orion5x-mv88f5182.dtsi
+++ b/arch/arm/boot/dts/orion5x-mv88f5182.dtsi
@@ -15,6 +15,12 @@
compatible = "marvell,orion5x-88f5182-mbus", "simple-bus";
internal-regs {
+ core_clk: core-clocks at 10030 {
+ compatible = "marvell,mv88f5182-core-clock";
+ reg = <0x10010 0x4>;
+ #clock-cells = <1>;
+ };
+
mbusc: mbus-controller at 20000 {
compatible = "marvell,mbus-controller";
reg = <0x20000 0x100>, <0x1500 0x20>;
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index 14f2cae..4f51132 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -5,6 +5,7 @@ menu "Orion Implementations"
config ARCH_ORION5X_DT
bool "Marvell Orion5x Flattened Device Tree"
select USE_OF
+ select ORION_CLK
help
Say 'Y' here if you want your kernel to support the
Marvell Orion5x using flattened device tree.
diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c
index 7f00897..34286ef 100644
--- a/arch/arm/mach-orion5x/board-dt.c
+++ b/arch/arm/mach-orion5x/board-dt.c
@@ -16,6 +16,7 @@
#include <linux/of_platform.h>
#include <linux/cpu.h>
#include <linux/mbus.h>
+#include <linux/clk-provider.h>
#include <asm/system_misc.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -43,6 +44,7 @@ static void orion5x_dt_init_early(void)
static void orion5x_dt_init_time(void)
{
orion5x_timer_init();
+ of_clk_init(NULL);
}
static void __init orion5x_dt_init(void)
@@ -60,9 +62,6 @@ static void __init orion5x_dt_init(void)
*/
orion5x_setup_wins();
- /* Setup root of clk tree */
- clk_init();
-
/*
* Don't issue "Wait for Interrupt" instruction if we are
* running on D0 5281 silicon.
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 21/38] ARM: orion5x: convert to use 'clocks' property for UART controllers
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (19 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 20/38] ARM: orion5x: switch to use the clock driver for DT platforms Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:24 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function Thomas Petazzoni
` (17 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
Until the previous commit, the Orion5x clocks were not described in
the Device Tree. Now that they are described in the Device Tree, we
can replace the manual 'clock-frequency' property in the UART nodes
by a nicer 'clocks' reference in those UART nodes.
This commit consequently removes the 'clock-frequency' property from
the LaCie edmini_v2 board, which is at this point the only Orion5x
board converted to the Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 1 -
arch/arm/boot/dts/orion5x.dtsi | 4 ++--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index 83f45a7..ba43197 100644
--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -73,6 +73,5 @@
};
&uart0 {
- clock-frequency = <166666667>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
index ad23ff4..88df8a8 100644
--- a/arch/arm/boot/dts/orion5x.dtsi
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -65,7 +65,7 @@
reg = <0x12000 0x100>;
reg-shift = <2>;
interrupts = <3>;
- /* set clock-frequency in board dts */
+ clocks = <&core_clk 0>;
status = "disabled";
};
@@ -74,7 +74,7 @@
reg = <0x12100 0x100>;
reg-shift = <2>;
interrupts = <4>;
- /* set clock-frequency in board dts */
+ clocks = <&core_clk 0>;
status = "disabled";
};
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (20 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 21/38] ARM: orion5x: convert to use 'clocks' property for UART controllers Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-22 21:45 ` Arnd Bergmann
` (2 more replies)
2014-04-22 21:26 ` [PATCH v2 23/38] ARM: orion5x: switch to DT interrupts and timer Thomas Petazzoni
` (16 subsequent siblings)
38 siblings, 3 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
Moving to the Device Tree implies having CONFIG_MULTI_IRQ_HANDLER
enabled, even for non-DT platforms (if we want both DT and non-DT
platforms to be supported in a single kernel).
However, the common CONFIG_MULTI_IRQ_HANDLER handler for non-DT
platforms in plat-orion/irq.c doesn't match the needs of
Orion5x. Also, it doesn't make much sense for orion_irq_init() to
register the multi-IRQ handler: orion_irq_init() is called once for
each IRQ cause/mask tuple, while the multi-IRQ handler only needs to
be registered once.
To solve this problem, we move the multi-IRQ handle in per-platform
code: mach-kirkwood/irq.c and mach-dove/irq.c. The Orion5x variant
will be introduced in a followup commit. Of course, this code will
ultimately be completely removed once all boards are converted to the
Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/mach-dove/irq.c | 36 +++++++++++++++++++++++++++++++++++
arch/arm/mach-kirkwood/irq.c | 36 +++++++++++++++++++++++++++++++++++
arch/arm/plat-orion/irq.c | 45 --------------------------------------------
3 files changed, 72 insertions(+), 45 deletions(-)
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index bc4344a..4a5a7ae 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -108,6 +108,38 @@ static int __initdata gpio2_irqs[4] = {
0,
};
+#ifdef CONFIG_MULTI_IRQ_HANDLER
+/*
+ * Compiling with both non-DT and DT support enabled, will
+ * break asm irq handler used by non-DT boards. Therefore,
+ * we provide a C-style irq handler even for non-DT boards,
+ * if MULTI_IRQ_HANDLER is set.
+ */
+
+static void __iomem *dove_irq_base = IRQ_VIRT_BASE;
+
+static asmlinkage void
+__exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs)
+{
+ u32 stat;
+
+ stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_LOW_OFF);
+ stat &= readl_relaxed(dove_irq_base + IRQ_MASK_LOW_OFF);
+ if (stat) {
+ unsigned int hwirq = __fls(stat);
+ handle_IRQ(hwirq, regs);
+ return;
+ }
+ stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_HIGH_OFF);
+ stat &= readl_relaxed(dove_irq_base + IRQ_MASK_HIGH_OFF);
+ if (stat) {
+ unsigned int hwirq = 32 + __fls(stat);
+ handle_IRQ(hwirq, regs);
+ return;
+ }
+}
+#endif
+
void __init dove_init_irq(void)
{
int i;
@@ -115,6 +147,10 @@ void __init dove_init_irq(void)
orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
+#ifdef CONFIG_MULTI_IRQ_HANDLER
+ set_handle_irq(dove_legacy_handle_irq);
+#endif
+
/*
* Initialize gpiolib for GPIOs 0-71.
*/
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
index 2a97a2e..c9dd860 100644
--- a/arch/arm/mach-kirkwood/irq.c
+++ b/arch/arm/mach-kirkwood/irq.c
@@ -30,11 +30,47 @@ static int __initdata gpio1_irqs[4] = {
0,
};
+#ifdef CONFIG_MULTI_IRQ_HANDLER
+/*
+ * Compiling with both non-DT and DT support enabled, will
+ * break asm irq handler used by non-DT boards. Therefore,
+ * we provide a C-style irq handler even for non-DT boards,
+ * if MULTI_IRQ_HANDLER is set.
+ */
+
+static void __iomem *kirkwood_irq_base = IRQ_VIRT_BASE;
+
+asmlinkage void
+__exception_irq_entry kirkwood_legacy_handle_irq(struct pt_regs *regs)
+{
+ u32 stat;
+
+ stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_LOW_OFF);
+ stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_LOW_OFF);
+ if (stat) {
+ unsigned int hwirq = __fls(stat);
+ handle_IRQ(hwirq, regs);
+ return;
+ }
+ stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_HIGH_OFF);
+ stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_HIGH_OFF);
+ if (stat) {
+ unsigned int hwirq = 32 + __fls(stat);
+ handle_IRQ(hwirq, regs);
+ return;
+ }
+}
+#endif
+
void __init kirkwood_init_irq(void)
{
orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
+#ifdef CONFIG_MULTI_IRQ_HANDLER
+ set_handle_irq(kirkwood_legacy_handle_irq);
+#endif
+
/*
* Initialize gpiolib for GPIOs 0-49.
*/
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index 807df14..27ec18b 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -20,47 +20,6 @@
#include <plat/orion-gpio.h>
#include <mach/bridge-regs.h>
-#ifdef CONFIG_MULTI_IRQ_HANDLER
-/*
- * Compiling with both non-DT and DT support enabled, will
- * break asm irq handler used by non-DT boards. Therefore,
- * we provide a C-style irq handler even for non-DT boards,
- * if MULTI_IRQ_HANDLER is set.
- *
- * Notes:
- * - this is prepared for Kirkwood and Dove only, update
- * accordingly if you add Orion5x or MV78x00.
- * - Orion5x uses different macro names and has only one
- * set of CAUSE/MASK registers.
- * - MV78x00 uses the same macro names but has a third
- * set of CAUSE/MASK registers.
- *
- */
-
-static void __iomem *orion_irq_base = IRQ_VIRT_BASE;
-
-asmlinkage void
-__exception_irq_entry orion_legacy_handle_irq(struct pt_regs *regs)
-{
- u32 stat;
-
- stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_LOW_OFF);
- stat &= readl_relaxed(orion_irq_base + IRQ_MASK_LOW_OFF);
- if (stat) {
- unsigned int hwirq = __fls(stat);
- handle_IRQ(hwirq, regs);
- return;
- }
- stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_HIGH_OFF);
- stat &= readl_relaxed(orion_irq_base + IRQ_MASK_HIGH_OFF);
- if (stat) {
- unsigned int hwirq = 32 + __fls(stat);
- handle_IRQ(hwirq, regs);
- return;
- }
-}
-#endif
-
void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
{
struct irq_chip_generic *gc;
@@ -78,10 +37,6 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
ct->chip.irq_unmask = irq_gc_mask_set_bit;
irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
-
-#ifdef CONFIG_MULTI_IRQ_HANDLER
- set_handle_irq(orion_legacy_handle_irq);
-#endif
}
#ifdef CONFIG_OF
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 23/38] ARM: orion5x: switch to DT interrupts and timer
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (21 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:26 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 24/38] ARM: orion5x: enable pinctrl driver at SoC level Thomas Petazzoni
` (15 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit switches the Orion5x platforms described through DT to use
a DT-defined interrupt controller and timer.
This involves:
* Describing in the DT the bridge interrupt controller, which is a
child interrupt controller to the main one, which is used for timer
and watchdog interrupts.
* Describing in the DT the timer.
* Adding in the DT the interrupt specifications for the watchdog.
* Selecting the ORION_IRQCHIP and ORION_TIMER drivers to be compiled.
* Change board-dt.c to no longer have an ->init_time() callback,
since the default callback will work fine: it calls
clocksource_of_init() and of_clk_init(), as needed.
* Implement a multi-IRQ handler for non-DT platforms in
mach-orion5x/irq.c.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/orion5x.dtsi | 19 +++++++++++++++++++
arch/arm/mach-orion5x/Kconfig | 2 ++
arch/arm/mach-orion5x/board-dt.c | 15 +--------------
arch/arm/mach-orion5x/irq.c | 28 ++++++++++++++++++++++++++++
4 files changed, 50 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
index 88df8a8..b4c2234 100644
--- a/arch/arm/boot/dts/orion5x.dtsi
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -78,6 +78,15 @@
status = "disabled";
};
+ bridge_intc: bridge-interrupt-ctrl at 20110 {
+ compatible = "marvell,orion-bridge-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x20110 0x8>;
+ interrupts = <0>;
+ marvell,#interrupts = <4>;
+ };
+
intc: interrupt-controller at 20200 {
compatible = "marvell,orion-intc";
interrupt-controller;
@@ -85,9 +94,19 @@
reg = <0x20200 0x08>;
};
+ timer: timer at 20300 {
+ compatible = "marvell,orion-timer";
+ reg = <0x20300 0x20>;
+ interrupt-parent = <&bridge_intc>;
+ interrupts = <1>, <2>;
+ clocks = <&core_clk 0>;
+ };
+
wdt: wdt at 20300 {
compatible = "marvell,orion-wdt";
reg = <0x20300 0x28>;
+ interrupt-parent = <&bridge_intc>;
+ interrupts = <3>;
status = "okay";
};
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index 4f51132..bd65872 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -6,6 +6,8 @@ config ARCH_ORION5X_DT
bool "Marvell Orion5x Flattened Device Tree"
select USE_OF
select ORION_CLK
+ select ORION_IRQCHIP
+ select ORION_TIMER
help
Say 'Y' here if you want your kernel to support the
Marvell Orion5x using flattened device tree.
diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c
index 34286ef..6dc48465 100644
--- a/arch/arm/mach-orion5x/board-dt.c
+++ b/arch/arm/mach-orion5x/board-dt.c
@@ -17,6 +17,7 @@
#include <linux/cpu.h>
#include <linux/mbus.h>
#include <linux/clk-provider.h>
+#include <linux/clocksource.h>
#include <asm/system_misc.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -36,17 +37,6 @@ static struct of_dev_auxdata orion5x_auxdata_lookup[] __initdata = {
{},
};
-static void orion5x_dt_init_early(void)
-{
- orion_time_set_base(TIMER_VIRT_BASE);
-}
-
-static void orion5x_dt_init_time(void)
-{
- orion5x_timer_init();
- of_clk_init(NULL);
-}
-
static void __init orion5x_dt_init(void)
{
char *dev_name;
@@ -86,9 +76,6 @@ static const char *orion5x_dt_compat[] = {
DT_MACHINE_START(ORION5X_DT, "Marvell Orion5x (Flattened Device Tree)")
/* Maintainer: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> */
.map_io = orion5x_map_io,
- .init_early = orion5x_dt_init_early,
- .init_irq = orion_dt_init_irq,
- .init_time = orion5x_dt_init_time,
.init_machine = orion5x_dt_init,
.restart = orion5x_restart,
.dt_compat = orion5x_dt_compat,
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index 9654b0c..cd4bac4 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -16,6 +16,7 @@
#include <mach/bridge-regs.h>
#include <plat/orion-gpio.h>
#include <plat/irq.h>
+#include <asm/exception.h>
#include "common.h"
static int __initdata gpio0_irqs[4] = {
@@ -25,10 +26,37 @@ static int __initdata gpio0_irqs[4] = {
IRQ_ORION5X_GPIO_24_31,
};
+#ifdef CONFIG_MULTI_IRQ_HANDLER
+/*
+ * Compiling with both non-DT and DT support enabled, will
+ * break asm irq handler used by non-DT boards. Therefore,
+ * we provide a C-style irq handler even for non-DT boards,
+ * if MULTI_IRQ_HANDLER is set.
+ */
+
+asmlinkage void
+__exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs)
+{
+ u32 stat;
+
+ stat = readl_relaxed(MAIN_IRQ_CAUSE);
+ stat &= readl_relaxed(MAIN_IRQ_MASK);
+ if (stat) {
+ unsigned int hwirq = __fls(stat);
+ handle_IRQ(hwirq, regs);
+ return;
+ }
+}
+#endif
+
void __init orion5x_init_irq(void)
{
orion_irq_init(0, MAIN_IRQ_MASK);
+#ifdef CONFIG_MULTI_IRQ_HANDLER
+ set_handle_irq(orion5x_legacy_handle_irq);
+#endif
+
/*
* Initialize gpiolib for GPIOs 0-31.
*/
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 24/38] ARM: orion5x: enable pinctrl driver at SoC level
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (22 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 23/38] ARM: orion5x: switch to DT interrupts and timer Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 25/38] ARM: orion5x: update I2C description " Thomas Petazzoni
` (14 subsequent siblings)
38 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit declares the pinctrl device in the Orion5x 5182 Device
Tree files, and ensures that the Orion pinctrl driver is compiled.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
arch/arm/boot/dts/orion5x-mv88f5182.dtsi | 5 +++++
arch/arm/mach-orion5x/Kconfig | 2 ++
2 files changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/orion5x-mv88f5182.dtsi b/arch/arm/boot/dts/orion5x-mv88f5182.dtsi
index a56f9c8..8c71b6b 100644
--- a/arch/arm/boot/dts/orion5x-mv88f5182.dtsi
+++ b/arch/arm/boot/dts/orion5x-mv88f5182.dtsi
@@ -15,6 +15,11 @@
compatible = "marvell,orion5x-88f5182-mbus", "simple-bus";
internal-regs {
+ pinctrl: pinctrl at 10000 {
+ compatible = "marvell,88f5182-pinctrl";
+ reg = <0x10000 0x8>, <0x10050 0x4>;
+ };
+
core_clk: core-clocks at 10030 {
compatible = "marvell,mv88f5182-core-clock";
reg = <0x10010 0x4>;
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index bd65872..3c69a3c 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -8,6 +8,8 @@ config ARCH_ORION5X_DT
select ORION_CLK
select ORION_IRQCHIP
select ORION_TIMER
+ select PINCTRL
+ select PINCTRL_ORION
help
Say 'Y' here if you want your kernel to support the
Marvell Orion5x using flattened device tree.
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 25/38] ARM: orion5x: update I2C description at SoC level
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (23 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 24/38] ARM: orion5x: enable pinctrl driver at SoC level Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 26/38] ARM: orion5x: add Device Bus " Thomas Petazzoni
` (13 subsequent siblings)
38 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit fixes the Orion5x SoC definition to:
* Not define a clock-frequency, as it should be described on a
per-board basis.
* Declare the appropriate clock reference, so that the driver can do
correct divisors calculations for the I2C bus.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
arch/arm/boot/dts/orion5x.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
index b4c2234..203edde 100644
--- a/arch/arm/boot/dts/orion5x.dtsi
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -56,7 +56,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupts = <5>;
- clock-frequency = <100000>;
+ clocks = <&core_clk 0>;
status = "disabled";
};
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 26/38] ARM: orion5x: add Device Bus description at SoC level
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (24 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 25/38] ARM: orion5x: update I2C description " Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 27/38] ARM: orion5x: add standard pinctrl configs for sata0 and sata1 Thomas Petazzoni
` (12 subsequent siblings)
38 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit adds the necessary SoC-level Device Tree definitions to
describe the Device Bus of Orion5x SOCs. The Device Bus is mainly used
to connect NOR flashes to the system.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
arch/arm/boot/dts/orion5x.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
index 203edde..75cd01b 100644
--- a/arch/arm/boot/dts/orion5x.dtsi
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -24,6 +24,46 @@
#size-cells = <1>;
controller = <&mbusc>;
+ devbus_bootcs: devbus-bootcs {
+ compatible = "marvell,orion-devbus";
+ reg = <MBUS_ID(0xf0, 0x01) 0x1046C 0x4>;
+ ranges = <0 MBUS_ID(0x01, 0x0f) 0 0xffffffff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&core_clk 0>;
+ status = "disabled";
+ };
+
+ devbus_cs0: devbus-cs0 {
+ compatible = "marvell,orion-devbus";
+ reg = <MBUS_ID(0xf0, 0x01) 0x1045C 0x4>;
+ ranges = <0 MBUS_ID(0x01, 0x1e) 0 0xffffffff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&core_clk 0>;
+ status = "disabled";
+ };
+
+ devbus_cs1: devbus-cs1 {
+ compatible = "marvell,orion-devbus";
+ reg = <MBUS_ID(0xf0, 0x01) 0x10460 0x4>;
+ ranges = <0 MBUS_ID(0x01, 0x1d) 0 0xffffffff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&core_clk 0>;
+ status = "disabled";
+ };
+
+ devbus_cs2: devbus-cs2 {
+ compatible = "marvell,orion-devbus";
+ reg = <MBUS_ID(0xf0, 0x01) 0x10464 0x4>;
+ ranges = <0 MBUS_ID(0x01, 0x1b) 0 0xffffffff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&core_clk 0>;
+ status = "disabled";
+ };
+
internal-regs {
compatible = "simple-bus";
#address-cells = <1>;
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 27/38] ARM: orion5x: add standard pinctrl configs for sata0 and sata1
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (25 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 26/38] ARM: orion5x: add Device Bus " Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 28/38] ARM: orion5x: convert edmini_v2 to DT pinctrl Thomas Petazzoni
` (11 subsequent siblings)
38 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
Several platforms will most likely use similar pinctrl configurations
for SATA0 and SATA1, so we declare those common configurations in the
Orion5x DT file.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
arch/arm/boot/dts/orion5x-mv88f5182.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/orion5x-mv88f5182.dtsi b/arch/arm/boot/dts/orion5x-mv88f5182.dtsi
index 8c71b6b..d1ed71c 100644
--- a/arch/arm/boot/dts/orion5x-mv88f5182.dtsi
+++ b/arch/arm/boot/dts/orion5x-mv88f5182.dtsi
@@ -18,6 +18,16 @@
pinctrl: pinctrl at 10000 {
compatible = "marvell,88f5182-pinctrl";
reg = <0x10000 0x8>, <0x10050 0x4>;
+
+ pmx_sata0: pmx-sata0 {
+ marvell,pins = "mpp12", "mpp14";
+ marvell,function = "sata0";
+ };
+
+ pmx_sata1: pmx-sata1 {
+ marvell,pins = "mpp13", "mpp15";
+ marvell,function = "sata1";
+ };
};
core_clk: core-clocks at 10030 {
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 28/38] ARM: orion5x: convert edmini_v2 to DT pinctrl
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (26 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 27/38] ARM: orion5x: add standard pinctrl configs for sata0 and sata1 Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:27 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 29/38] ARM: orion5x: use DT to describe I2C devices on edmini_v2 Thomas Petazzoni
` (10 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit converts the already partially DT-converted edmini_v2
platform to use the Device Tree for pinctrl.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
.../dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 31 ++++++++++++++++++++++
arch/arm/mach-orion5x/edmini_v2-setup.c | 28 -------------------
2 files changed, 31 insertions(+), 28 deletions(-)
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index ba43197..aa74b00 100644
--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -32,6 +32,8 @@
gpio-keys {
compatible = "gpio-keys";
+ pinctrl-0 = <&pmx_power_button>;
+ pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
button at 1 {
@@ -43,6 +45,8 @@
gpio-leds {
compatible = "gpio-leds";
+ pinctrl-0 = <&pmx_power_led>;
+ pinctrl-names = "default";
led at 1 {
label = "power:blue";
@@ -67,7 +71,34 @@
};
};
+&pinctrl {
+ pinctrl-0 = <&pmx_rtc &pmx_power_led_ctrl>;
+ pinctrl-names = "default";
+
+ pmx_power_button: pmx-power-button {
+ marvell,pins = "mpp18";
+ marvell,function = "gpio";
+ };
+
+ pmx_power_led: pmx-power-led {
+ marvell,pins = "mpp16";
+ marvell,function = "gpio";
+ };
+
+ pmx_power_led_ctrl: pmx-power-led-ctrl {
+ marvell,pins = "mpp17";
+ marvell,function = "gpio";
+ };
+
+ pmx_rtc: pmx-rtc {
+ marvell,pins = "mpp3";
+ marvell,function = "gpio";
+ };
+};
+
&sata {
+ pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
+ pinctrl-names = "default";
status = "okay";
nr-ports = <2>;
};
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
index f66c1b2..c50469e 100644
--- a/arch/arm/mach-orion5x/edmini_v2-setup.c
+++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
@@ -109,37 +109,9 @@ static struct i2c_board_info __initdata edmini_v2_i2c_rtc = {
/*****************************************************************************
* General Setup
****************************************************************************/
-static unsigned int edminiv2_mpp_modes[] __initdata = {
- MPP0_UNUSED,
- MPP1_UNUSED,
- MPP2_UNUSED,
- MPP3_GPIO, /* RTC interrupt */
- MPP4_UNUSED,
- MPP5_UNUSED,
- MPP6_UNUSED,
- MPP7_UNUSED,
- MPP8_UNUSED,
- MPP9_UNUSED,
- MPP10_UNUSED,
- MPP11_UNUSED,
- MPP12_SATA_LED, /* SATA 0 presence */
- MPP13_SATA_LED, /* SATA 1 presence */
- MPP14_SATA_LED, /* SATA 0 active */
- MPP15_SATA_LED, /* SATA 1 active */
- /* 16: Power LED control (0 = On, 1 = Off) */
- MPP16_GPIO,
- /* 17: Power LED control select (0 = CPLD, 1 = GPIO16) */
- MPP17_GPIO,
- /* 18: Power button status (0 = Released, 1 = Pressed) */
- MPP18_GPIO,
- MPP19_UNUSED,
- 0,
-};
void __init edmini_v2_init(void)
{
- orion5x_mpp_conf(edminiv2_mpp_modes);
-
/*
* Configure peripherals.
*/
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 29/38] ARM: orion5x: use DT to describe I2C devices on edmini_v2
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (27 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 28/38] ARM: orion5x: convert edmini_v2 to DT pinctrl Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:28 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 30/38] ARM: orion5x: use DT to describe EHCI " Thomas Petazzoni
` (9 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit converts the already partially DT-converted edmini_v2
platform to use the Device Tree for I2C bus and devices.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
.../dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 14 +++++++++++++
arch/arm/mach-orion5x/edmini_v2-setup.c | 24 ----------------------
2 files changed, 14 insertions(+), 24 deletions(-)
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index aa74b00..41b2ab5 100644
--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -10,6 +10,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
#include "orion5x-mv88f5182.dtsi"
/ {
@@ -63,6 +64,19 @@
};
};
+&i2c {
+ status = "okay";
+ clock-frequency = <100000>;
+ #address-cells = <1>;
+
+ rtc at 32 {
+ compatible = "ricoh,rs5c372a";
+ reg = <0x32>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
&mdio {
status = "okay";
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
index c50469e..75648ab 100644
--- a/arch/arm/mach-orion5x/edmini_v2-setup.c
+++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
@@ -96,17 +96,6 @@ static struct platform_device edmini_v2_nor_flash = {
};
/*****************************************************************************
- * RTC 5C372a on I2C bus
- ****************************************************************************/
-
-#define EDMINIV2_RTC_GPIO 3
-
-static struct i2c_board_info __initdata edmini_v2_i2c_rtc = {
- I2C_BOARD_INFO("rs5c372a", 0x32),
- .irq = 0,
-};
-
-/*****************************************************************************
* General Setup
****************************************************************************/
@@ -125,17 +114,4 @@ void __init edmini_v2_init(void)
pr_notice("edmini_v2: USB device port, flash write and power-off "
"are not yet supported.\n");
-
- /* Get RTC IRQ and register the chip */
- if (gpio_request(EDMINIV2_RTC_GPIO, "rtc") == 0) {
- if (gpio_direction_input(EDMINIV2_RTC_GPIO) == 0)
- edmini_v2_i2c_rtc.irq = gpio_to_irq(EDMINIV2_RTC_GPIO);
- else
- gpio_free(EDMINIV2_RTC_GPIO);
- }
-
- if (edmini_v2_i2c_rtc.irq == 0)
- pr_warning("edmini_v2: failed to get RTC IRQ\n");
-
- i2c_register_board_info(0, &edmini_v2_i2c_rtc, 1);
}
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 30/38] ARM: orion5x: use DT to describe EHCI on edmini_v2
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (28 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 29/38] ARM: orion5x: use DT to describe I2C devices on edmini_v2 Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:28 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 31/38] ARM: orion5x: use DT to describe NOR " Thomas Petazzoni
` (8 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit converts the already partially DT-converted edmini_v2
platform to use the Device Tree for USB.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 4 ++++
arch/arm/mach-orion5x/edmini_v2-setup.c | 2 --
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index 41b2ab5..f0f2bcc 100644
--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -56,6 +56,10 @@
};
};
+&ehci0 {
+ status = "okay";
+};
+
ð {
status = "okay";
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
index 75648ab..2eebc0c 100644
--- a/arch/arm/mach-orion5x/edmini_v2-setup.c
+++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
@@ -104,8 +104,6 @@ void __init edmini_v2_init(void)
/*
* Configure peripherals.
*/
- orion5x_ehci0_init();
-
mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
ORION_MBUS_DEVBUS_BOOT_ATTR,
EDMINI_V2_NOR_BOOT_BASE,
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 31/38] ARM: orion5x: use DT to describe NOR on edmini_v2
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (29 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 30/38] ARM: orion5x: use DT to describe EHCI " Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:29 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 32/38] ARM: orion5x: keep TODO list in edmini_v2 DT Thomas Petazzoni
` (7 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit converts the already partially DT-converted edmini_v2
platform to use the Device Tree for NOR flash, using the Device Bus.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
.../dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 43 ++++++++++++++-
arch/arm/mach-orion5x/edmini_v2-setup.c | 62 ----------------------
2 files changed, 42 insertions(+), 63 deletions(-)
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index f0f2bcc..1ecddbe 100644
--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -28,7 +28,8 @@
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
- <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>;
+ <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
+ <MBUS_ID(0x01, 0x0f) 0 0xfff80000 0x80000>;
};
gpio-keys {
@@ -56,6 +57,46 @@
};
};
+&devbus_bootcs {
+ status = "okay";
+
+ /* Read parameters */
+ devbus,bus-width = <8>;
+ devbus,turn-off-ps = <90000>;
+ devbus,badr-skew-ps = <0>;
+ devbus,acc-first-ps = <186000>;
+ devbus,acc-next-ps = <186000>;
+
+ /* Write parameters */
+ devbus,wr-high-ps = <90000>;
+ devbus,wr-low-ps = <90000>;
+ devbus,ale-wr-ps = <90000>;
+
+ /*
+ * Currently the MTD code does not recognize the MX29LV400CBCT
+ * as a bottom-type device. This could cause risks of
+ * accidentally erasing critical flash sectors. We thus define
+ * a single, write-protected partition covering the whole
+ * flash. TODO: once the flash part TOP/BOTTOM detection
+ * issue is sorted out in the MTD code, break this into at
+ * least three partitions: 'u-boot code', 'u-boot environment'
+ * and 'whatever is left'.
+ */
+ flash at 0 {
+ compatible = "cfi-flash";
+ reg = <0 0x80000>;
+ bank-width = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition at 0 {
+ label = "Full512Kb";
+ reg = <0 0x80000>;
+ read-only;
+ };
+ };
+};
+
&ehci0 {
status = "okay";
};
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
index 2eebc0c..6bef2d5 100644
--- a/arch/arm/mach-orion5x/edmini_v2-setup.c
+++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
@@ -42,74 +42,12 @@
* EDMINI_V2 Info
****************************************************************************/
-/*
- * 512KB NOR flash Device bus boot chip select
- */
-
-#define EDMINI_V2_NOR_BOOT_BASE 0xfff80000
-#define EDMINI_V2_NOR_BOOT_SIZE SZ_512K
-
-/*****************************************************************************
- * 512KB NOR Flash on BOOT Device
- ****************************************************************************/
-
-/*
- * Currently the MTD code does not recognize the MX29LV400CBCT as a bottom
- * -type device. This could cause risks of accidentally erasing critical
- * flash sectors. We thus define a single, write-protected partition covering
- * the whole flash.
- * TODO: once the flash part TOP/BOTTOM detection issue is sorted out in the MTD
- * code, break this into at least three partitions: 'u-boot code', 'u-boot
- * environment' and 'whatever is left'.
- */
-
-static struct mtd_partition edmini_v2_partitions[] = {
- {
- .name = "Full512kb",
- .size = 0x00080000,
- .offset = 0x00000000,
- .mask_flags = MTD_WRITEABLE,
- },
-};
-
-static struct physmap_flash_data edmini_v2_nor_flash_data = {
- .width = 1,
- .parts = edmini_v2_partitions,
- .nr_parts = ARRAY_SIZE(edmini_v2_partitions),
-};
-
-static struct resource edmini_v2_nor_flash_resource = {
- .flags = IORESOURCE_MEM,
- .start = EDMINI_V2_NOR_BOOT_BASE,
- .end = EDMINI_V2_NOR_BOOT_BASE
- + EDMINI_V2_NOR_BOOT_SIZE - 1,
-};
-
-static struct platform_device edmini_v2_nor_flash = {
- .name = "physmap-flash",
- .id = 0,
- .dev = {
- .platform_data = &edmini_v2_nor_flash_data,
- },
- .num_resources = 1,
- .resource = &edmini_v2_nor_flash_resource,
-};
-
/*****************************************************************************
* General Setup
****************************************************************************/
void __init edmini_v2_init(void)
{
- /*
- * Configure peripherals.
- */
- mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
- ORION_MBUS_DEVBUS_BOOT_ATTR,
- EDMINI_V2_NOR_BOOT_BASE,
- EDMINI_V2_NOR_BOOT_SIZE);
- platform_device_register(&edmini_v2_nor_flash);
-
pr_notice("edmini_v2: USB device port, flash write and power-off "
"are not yet supported.\n");
}
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 32/38] ARM: orion5x: keep TODO list in edmini_v2 DT
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (30 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 31/38] ARM: orion5x: use DT to describe NOR " Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:29 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 33/38] ARM: orion5x: remove unneeded code for edmini_v2 Thomas Petazzoni
` (6 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
In preparation to the complete removal of non-DT support for
edmini_v2, this commit copies the TODO list of things to support from
the old-style board file into the Device Tree of edmini_v2.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index 1ecddbe..89ff404 100644
--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -6,6 +6,13 @@
* warranty of any kind, whether express or implied.
*/
+/*
+ * TODO: add Orion USB device port init when kernel.org support is added.
+ * TODO: add flash write support: see below.
+ * TODO: add power-off support.
+ * TODO: add I2C EEPROM support.
+ */
+
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 33/38] ARM: orion5x: remove unneeded code for edmini_v2
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (31 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 32/38] ARM: orion5x: keep TODO list in edmini_v2 DT Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 34/38] ARM: orion5x: convert RD-88F5182 to Device Tree Thomas Petazzoni
` (5 subsequent siblings)
38 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
The edmini_v2 platform is now fully converted to the Device Tree, so
we can get rid of the old style board-file and the related Kconfig
option.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
arch/arm/mach-orion5x/Kconfig | 8 -----
arch/arm/mach-orion5x/Makefile | 1 -
arch/arm/mach-orion5x/board-dt.c | 3 --
arch/arm/mach-orion5x/common.h | 7 -----
arch/arm/mach-orion5x/edmini_v2-setup.c | 53 ---------------------------------
5 files changed, 72 deletions(-)
delete mode 100644 arch/arm/mach-orion5x/edmini_v2-setup.c
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index 3c69a3c..928f4cb 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -107,14 +107,6 @@ config MACH_MV2120
Say 'Y' here if you want your kernel to support the
HP Media Vault mv2120 or mv5100.
-config MACH_EDMINI_V2_DT
- bool "LaCie Ethernet Disk mini V2 (Flattened Device Tree)"
- select I2C_BOARDINFO
- select ARCH_ORION5X_DT
- help
- Say 'Y' here if you want your kernel to support the
- LaCie Ethernet Disk mini V2 (Flattened Device Tree).
-
config MACH_D2NET
bool "LaCie d2 Network"
select I2C_BOARDINFO
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index 45da805..e8fdbdd 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -23,4 +23,3 @@ obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o
obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o
obj-$(CONFIG_ARCH_ORION5X_DT) += board-dt.o
-obj-$(CONFIG_MACH_EDMINI_V2_DT) += edmini_v2-setup.o
diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c
index 6dc48465..78d2e52 100644
--- a/arch/arm/mach-orion5x/board-dt.c
+++ b/arch/arm/mach-orion5x/board-dt.c
@@ -61,9 +61,6 @@ static void __init orion5x_dt_init(void)
cpu_idle_poll_ctrl(true);
}
- if (of_machine_is_compatible("lacie,ethernet-disk-mini-v2"))
- edmini_v2_init();
-
of_platform_populate(NULL, of_default_bus_match_table,
orion5x_auxdata_lookup, NULL);
}
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 7548db2..4470e31 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -64,13 +64,6 @@ int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
-/* board init functions for boards not fully converted to fdt */
-#ifdef CONFIG_MACH_EDMINI_V2_DT
-void edmini_v2_init(void);
-#else
-static inline void edmini_v2_init(void) {};
-#endif
-
struct meminfo;
struct tag;
extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *);
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
deleted file mode 100644
index 6bef2d5..0000000
--- a/arch/arm/mach-orion5x/edmini_v2-setup.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * arch/arm/mach-orion5x/edmini_v2-setup.c
- *
- * LaCie Ethernet Disk mini V2 Setup
- *
- * Copyright (C) 2008 Christopher Moore <moore@free.fr>
- * Copyright (C) 2008 Albert Aribaud <albert.aribaud@free.fr>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-/*
- * TODO: add Orion USB device port init when kernel.org support is added.
- * TODO: add flash write support: see below.
- * TODO: add power-off support.
- * TODO: add I2C EEPROM support.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/pci.h>
-#include <linux/irq.h>
-#include <linux/mbus.h>
-#include <linux/mtd/physmap.h>
-#include <linux/leds.h>
-#include <linux/gpio_keys.h>
-#include <linux/input.h>
-#include <linux/i2c.h>
-#include <linux/ata_platform.h>
-#include <linux/gpio.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/pci.h>
-#include <mach/orion5x.h>
-#include "common.h"
-#include "mpp.h"
-
-/*****************************************************************************
- * EDMINI_V2 Info
- ****************************************************************************/
-
-/*****************************************************************************
- * General Setup
- ****************************************************************************/
-
-void __init edmini_v2_init(void)
-{
- pr_notice("edmini_v2: USB device port, flash write and power-off "
- "are not yet supported.\n");
-}
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 34/38] ARM: orion5x: convert RD-88F5182 to Device Tree
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (32 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 33/38] ARM: orion5x: remove unneeded code for edmini_v2 Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:30 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 35/38] ARM: orion5x: convert d2net " Thomas Petazzoni
` (4 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit converts the RD-88F5182 platform to the Device Tree. All
devices except the PCI are converted to the Device Tree.
It is worth noting that:
* The PCI description for the DT case is kept in board-rd88f5182.c.
* The existing non-DT support in rd88f5182-setup.c is kept as is, in
order to allow testing of a given platform in both DT and non-DT
cases. It will ultimately be removed, once we no longer care about
non-DT support for Orion5x.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Ronen Shitrit <rshitrit@marvell.com>
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/orion5x-rd88f5182-nas.dts | 177 ++++++++++++++++++++++++++++
arch/arm/mach-orion5x/Kconfig | 8 ++
arch/arm/mach-orion5x/Makefile | 1 +
arch/arm/mach-orion5x/board-rd88f5182.c | 116 ++++++++++++++++++
5 files changed, 304 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/orion5x-rd88f5182-nas.dts
create mode 100644 arch/arm/mach-orion5x/board-rd88f5182.c
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 35c146f..f7943a8 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -289,7 +289,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
am43x-epos-evm.dtb \
am437x-gp-evm.dtb \
dra7-evm.dtb
-dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
+dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb \
+ orion5x-rd88f5182-nas.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
qcom-msm8960-cdp.dtb \
diff --git a/arch/arm/boot/dts/orion5x-rd88f5182-nas.dts b/arch/arm/boot/dts/orion5x-rd88f5182-nas.dts
new file mode 100644
index 0000000..6fb0525
--- /dev/null
+++ b/arch/arm/boot/dts/orion5x-rd88f5182-nas.dts
@@ -0,0 +1,177 @@
+/*
+ * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "orion5x-mv88f5182.dtsi"
+
+/ {
+ model = "Marvell Reference Design 88F5182 NAS";
+ compatible = "marvell,rd-88f5182-nas", "marvell,orion5x-88f5182", "marvell,orion5x";
+
+ memory {
+ reg = <0x00000000 0x4000000>; /* 64 MB */
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ linux,stdout-path = &uart0;
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
+ <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
+ <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x80000>,
+ <MBUS_ID(0x01, 0x1d) 0 0xfc000000 0x1000000>;
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&pmx_debug_led>;
+ pinctrl-names = "default";
+
+ led at 0 {
+ label = "rd88f5182:cpu";
+ linux,default-trigger = "heartbeat";
+ gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&devbus_bootcs {
+ status = "okay";
+
+ /* Read parameters */
+ devbus,bus-width = <8>;
+ devbus,turn-off-ps = <90000>;
+ devbus,badr-skew-ps = <0>;
+ devbus,acc-first-ps = <186000>;
+ devbus,acc-next-ps = <186000>;
+
+ /* Write parameters */
+ devbus,wr-high-ps = <90000>;
+ devbus,wr-low-ps = <90000>;
+ devbus,ale-wr-ps = <90000>;
+
+ flash at 0 {
+ compatible = "cfi-flash";
+ reg = <0 0x80000>;
+ bank-width = <1>;
+ };
+};
+
+&devbus_cs1 {
+ status = "okay";
+
+ /* Read parameters */
+ devbus,bus-width = <8>;
+ devbus,turn-off-ps = <90000>;
+ devbus,badr-skew-ps = <0>;
+ devbus,acc-first-ps = <186000>;
+ devbus,acc-next-ps = <186000>;
+
+ /* Write parameters */
+ devbus,wr-high-ps = <90000>;
+ devbus,wr-low-ps = <90000>;
+ devbus,ale-wr-ps = <90000>;
+
+ flash at 0 {
+ compatible = "cfi-flash";
+ reg = <0 0x1000000>;
+ bank-width = <1>;
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+ð {
+ status = "okay";
+
+ ethernet-port at 0 {
+ phy-handle = <ðphy>;
+ };
+};
+
+&i2c {
+ status = "okay";
+ clock-frequency = <100000>;
+ #address-cells = <1>;
+
+ rtc at 68 {
+ pinctrl-0 = <&pmx_rtc>;
+ pinctrl-names = "default";
+ compatible = "dallas,ds1338";
+ reg = <0x68>;
+ };
+};
+
+&mdio {
+ status = "okay";
+
+ ethphy: ethernet-phy {
+ reg = <8>;
+ };
+};
+
+&pinctrl {
+ pinctrl-0 = <&pmx_reset_switch &pmx_misc_gpios
+ &pmx_pci_gpios>;
+ pinctrl-names = "default";
+
+ /*
+ * MPP[20] PCI Clock to MV88F5182
+ * MPP[21] PCI Clock to mini PCI CON11
+ * MPP[22] USB 0 over current indication
+ * MPP[23] USB 1 over current indication
+ * MPP[24] USB 1 over current enable
+ * MPP[25] USB 0 over current enable
+ */
+
+ pmx_debug_led: pmx-debug_led {
+ marvell,pins = "mpp0";
+ marvell,function = "gpio";
+ };
+
+ pmx_reset_switch: pmx-reset-switch {
+ marvell,pins = "mpp1";
+ marvell,function = "gpio";
+ };
+
+ pmx_rtc: pmx-rtc {
+ marvell,pins = "mpp3";
+ marvell,function = "gpio";
+ };
+
+ pmx_misc_gpios: pmx-misc-gpios {
+ marvell,pins = "mpp4", "mpp5";
+ marvell,function = "gpio";
+ };
+
+ pmx_pci_gpios: pmx-pci-gpios {
+ marvell,pins = "mpp6", "mpp7";
+ marvell,function = "gpio";
+ };
+};
+
+&sata {
+ pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
+ pinctrl-names = "default";
+ status = "okay";
+ nr-ports = <2>;
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index 928f4cb..11b0c7e 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -28,6 +28,14 @@ config MACH_RD88F5182
Say 'Y' here if you want your kernel to support the
Marvell Orion-NAS (88F5182) RD2
+config MACH_RD88F5182_DT
+ bool "Marvell Orion-NAS Reference Design (Flattened Device Tree)"
+ select ARCH_ORION5X_DT
+ select I2C_BOARDINFO
+ help
+ Say 'Y' here if you want your kernel to support the Marvell
+ Orion-NAS (88F5182) RD2, Flattened Device Tree.
+
config MACH_KUROBOX_PRO
bool "KuroBox Pro"
select I2C_BOARDINFO
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index e8fdbdd..f405894 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -23,3 +23,4 @@ obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o
obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o
obj-$(CONFIG_ARCH_ORION5X_DT) += board-dt.o
+obj-$(CONFIG_MACH_RD88F5182_DT) += board-rd88f5182.o
diff --git a/arch/arm/mach-orion5x/board-rd88f5182.c b/arch/arm/mach-orion5x/board-rd88f5182.c
new file mode 100644
index 0000000..270824b
--- /dev/null
+++ b/arch/arm/mach-orion5x/board-rd88f5182.c
@@ -0,0 +1,116 @@
+/*
+ * arch/arm/mach-orion5x/rd88f5182-setup.c
+ *
+ * Marvell Orion-NAS Reference Design Setup
+ *
+ * Maintainer: Ronen Shitrit <rshitrit@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/gpio.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/pci.h>
+#include <linux/irq.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/pci.h>
+#include <mach/orion5x.h>
+#include "common.h"
+
+/*****************************************************************************
+ * RD-88F5182 Info
+ ****************************************************************************/
+
+/*
+ * PCI
+ */
+
+#define RD88F5182_PCI_SLOT0_OFFS 7
+#define RD88F5182_PCI_SLOT0_IRQ_A_PIN 7
+#define RD88F5182_PCI_SLOT0_IRQ_B_PIN 6
+
+/*****************************************************************************
+ * PCI
+ ****************************************************************************/
+
+static void __init rd88f5182_pci_preinit(void)
+{
+ int pin;
+
+ /*
+ * Configure PCI GPIO IRQ pins
+ */
+ pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
+ if (gpio_request(pin, "PCI IntA") == 0) {
+ if (gpio_direction_input(pin) == 0) {
+ irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+ } else {
+ printk(KERN_ERR "rd88f5182_pci_preinit failed to "
+ "set_irq_type pin %d\n", pin);
+ gpio_free(pin);
+ }
+ } else {
+ printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin);
+ }
+
+ pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
+ if (gpio_request(pin, "PCI IntB") == 0) {
+ if (gpio_direction_input(pin) == 0) {
+ irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+ } else {
+ printk(KERN_ERR "rd88f5182_pci_preinit failed to "
+ "set_irq_type pin %d\n", pin);
+ gpio_free(pin);
+ }
+ } else {
+ printk(KERN_ERR "rd88f5182_pci_preinit failed to gpio_request %d\n", pin);
+ }
+}
+
+static int __init rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot,
+ u8 pin)
+{
+ int irq;
+
+ /*
+ * Check for devices with hard-wired IRQs.
+ */
+ irq = orion5x_pci_map_irq(dev, slot, pin);
+ if (irq != -1)
+ return irq;
+
+ /*
+ * PCI IRQs are connected via GPIOs
+ */
+ switch (slot - RD88F5182_PCI_SLOT0_OFFS) {
+ case 0:
+ if (pin == 1)
+ return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN);
+ else
+ return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN);
+ default:
+ return -1;
+ }
+}
+
+static struct hw_pci rd88f5182_pci __initdata = {
+ .nr_controllers = 2,
+ .preinit = rd88f5182_pci_preinit,
+ .setup = orion5x_pci_sys_setup,
+ .scan = orion5x_pci_sys_scan_bus,
+ .map_irq = rd88f5182_pci_map_irq,
+};
+
+static int __init rd88f5182_pci_init(void)
+{
+ if (of_machine_is_compatible("marvell,rd-88f5182-nas"))
+ pci_common_init(&rd88f5182_pci);
+
+ return 0;
+}
+
+subsys_initcall(rd88f5182_pci_init);
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 35/38] ARM: orion5x: convert d2net to Device Tree
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (33 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 34/38] ARM: orion5x: convert RD-88F5182 to Device Tree Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:32 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 36/38] ARM: orion5x: convert Maxtor Shared Storage II to the " Thomas Petazzoni
` (3 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit converts the LaCie d2 Network platform to the Device Tree.
All devices except LEDs are converted, because the LED code needs a
non-LED GPIO to be set to a given value for the LEDs to work, and this
cannot yet be easily represented in DT.
Also, references to the LaCie Big Disk Network platform are lost,
because this platform apparently has exactly the same hardware support
as the LaCie d2 Network, so their Device Tree files would be
identical.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Simon Guinot <sguinot@lacie.com>
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/orion5x-lacie-d2-network.dts | 236 ++++++++++++++++
arch/arm/mach-orion5x/Kconfig | 13 +-
arch/arm/mach-orion5x/Makefile | 3 +-
arch/arm/mach-orion5x/board-d2net.c | 109 ++++++++
arch/arm/mach-orion5x/d2net-setup.c | 365 -------------------------
6 files changed, 351 insertions(+), 378 deletions(-)
create mode 100644 arch/arm/boot/dts/orion5x-lacie-d2-network.dts
create mode 100644 arch/arm/mach-orion5x/board-d2net.c
delete mode 100644 arch/arm/mach-orion5x/d2net-setup.c
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f7943a8..59397c2 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -289,7 +289,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
am43x-epos-evm.dtb \
am437x-gp-evm.dtb \
dra7-evm.dtb
-dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb \
+dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-d2-network.dtb \
+ orion5x-lacie-ethernet-disk-mini-v2.dtb \
orion5x-rd88f5182-nas.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
diff --git a/arch/arm/boot/dts/orion5x-lacie-d2-network.dts b/arch/arm/boot/dts/orion5x-lacie-d2-network.dts
new file mode 100644
index 0000000..c701e8d
--- /dev/null
+++ b/arch/arm/boot/dts/orion5x-lacie-d2-network.dts
@@ -0,0 +1,236 @@
+/*
+ * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "orion5x-mv88f5182.dtsi"
+
+/ {
+ model = "LaCie d2 Network";
+ compatible = "lacie,d2-network", "marvell,orion5x-88f5182", "marvell,orion5x";
+
+ memory {
+ reg = <0x00000000 0x4000000>; /* 64 MB */
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ linux,stdout-path = &uart0;
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
+ <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
+ <MBUS_ID(0x01, 0x0f) 0 0xfff80000 0x80000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&pmx_buttons>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ front_button {
+ label = "Front Push Button";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
+ };
+
+ power_rocker_sw_on {
+ label = "Power rocker switch (on|auto)";
+ linux,input-type = <5>; /* EV_SW */
+ linux,code = <1>; /* D2NET_SWITCH_POWER_ON */
+ gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
+ };
+
+ power_rocker_sw_off {
+ label = "Power rocker switch (auto|off)";
+ linux,input-type = <5>; /* EV_SW */
+ linux,code = <2>; /* D2NET_SWITCH_POWER_OFF */
+ gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-0 = <&pmx_sata0_power &pmx_sata1_power>;
+ pinctrl-names = "default";
+
+ sata0_power: regulator at 0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "SATA0 Power";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ sata1_power: regulator at 1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "SATA1 Power";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&devbus_bootcs {
+ status = "okay";
+
+ devbus,keep-config;
+
+ /*
+ * Currently the MTD code does not recognize the MX29LV400CBCT
+ * as a bottom-type device. This could cause risks of
+ * accidentally erasing critical flash sectors. We thus define
+ * a single, write-protected partition covering the whole
+ * flash. TODO: once the flash part TOP/BOTTOM detection
+ * issue is sorted out in the MTD code, break this into at
+ * least three partitions: 'u-boot code', 'u-boot environment'
+ * and 'whatever is left'.
+ */
+ flash at 0 {
+ compatible = "cfi-flash";
+ reg = <0 0x80000>;
+ bank-width = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition at 0 {
+ label = "Full512Kb";
+ reg = <0 0x80000>;
+ read-only;
+ };
+ };
+};
+
+&mdio {
+ status = "okay";
+
+ ethphy: ethernet-phy {
+ reg = <8>;
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+ð {
+ status = "okay";
+
+ ethernet-port at 0 {
+ phy-handle = <ðphy>;
+ };
+};
+
+&i2c {
+ status = "okay";
+ clock-frequency = <100000>;
+ #address-cells = <1>;
+
+ rtc at 32 {
+ compatible = "ricoh,rs5c372b";
+ reg = <0x32>;
+ };
+
+ fan at 3e {
+ compatible = "gmt,g762";
+ reg = <0x3e>;
+
+ /* Not enough HW info */
+ status = "disabled";
+ };
+
+ eeprom at 50 {
+ compatible = "atmel,24c08";
+ reg = <0x50>;
+ };
+};
+
+&pinctrl {
+ pinctrl-0 = <&pmx_leds &pmx_board_id &pmx_fan_fail>;
+ pinctrl-names = "default";
+
+ pmx_board_id: pmx-board-id {
+ marvell,pins = "mpp0", "mpp1", "mpp2";
+ marvell,function = "gpio";
+ };
+
+ pmx_buttons: pmx-buttons {
+ marvell,pins = "mpp8", "mpp9", "mpp18";
+ marvell,function = "gpio";
+ };
+
+ pmx_fan_fail: pmx-fan-fail {
+ marvell,pins = "mpp5";
+ marvell,function = "gpio";
+ };
+
+ /*
+ * MPP6: Red front LED
+ * MPP16: Blue front LED blink control
+ */
+ pmx_leds: pmx-leds {
+ marvell,pins = "mpp6", "mpp16";
+ marvell,function = "gpio";
+ };
+
+ pmx_sata0_led_active: pmx-sata0-led-active {
+ marvell,pins = "mpp14";
+ marvell,function = "sata0";
+ };
+
+ pmx_sata0_power: pmx-sata0-power {
+ marvell,pins = "mpp3";
+ marvell,function = "gpio";
+ };
+
+ pmx_sata1_led_active: pmx-sata1-led-active {
+ marvell,pins = "mpp15";
+ marvell,function = "sata1";
+ };
+
+ pmx_sata1_power: pmx-sata1-power {
+ marvell,pins = "mpp12";
+ marvell,function = "gpio";
+ };
+
+ /*
+ * Non MPP GPIOs:
+ * GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok)
+ * GPIO 23: Blue front LED off
+ * GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled)
+ */
+};
+
+&sata {
+ pinctrl-0 = <&pmx_sata0_led_active
+ &pmx_sata1_led_active>;
+ pinctrl-names = "default";
+ status = "okay";
+ nr-ports = <2>;
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index 11b0c7e..3c4ad83 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -115,20 +115,13 @@ config MACH_MV2120
Say 'Y' here if you want your kernel to support the
HP Media Vault mv2120 or mv5100.
-config MACH_D2NET
- bool "LaCie d2 Network"
- select I2C_BOARDINFO
+config MACH_D2NET_DT
+ bool "LaCie d2 Network / Big Disk Network (Flattened Device Tree)"
+ select ARCH_ORION5X_DT
help
Say 'Y' here if you want your kernel to support the
LaCie d2 Network NAS.
-config MACH_BIGDISK
- bool "LaCie Big Disk Network"
- select I2C_BOARDINFO
- help
- Say 'Y' here if you want your kernel to support the
- LaCie Big Disk Network NAS.
-
config MACH_NET2BIG
bool "LaCie 2Big Network"
select I2C_BOARDINFO
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index f405894..787dcee 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -12,8 +12,6 @@ obj-$(CONFIG_MACH_TS409) += ts409-setup.o tsx09-common.o
obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o
obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o
obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o
-obj-$(CONFIG_MACH_D2NET) += d2net-setup.o
-obj-$(CONFIG_MACH_BIGDISK) += d2net-setup.o
obj-$(CONFIG_MACH_NET2BIG) += net2big-setup.o
obj-$(CONFIG_MACH_MSS2) += mss2-setup.o
obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o
@@ -23,4 +21,5 @@ obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o
obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o
obj-$(CONFIG_ARCH_ORION5X_DT) += board-dt.o
+obj-$(CONFIG_MACH_D2NET_DT) += board-d2net.o
obj-$(CONFIG_MACH_RD88F5182_DT) += board-rd88f5182.o
diff --git a/arch/arm/mach-orion5x/board-d2net.c b/arch/arm/mach-orion5x/board-d2net.c
new file mode 100644
index 0000000..8a72841
--- /dev/null
+++ b/arch/arm/mach-orion5x/board-d2net.c
@@ -0,0 +1,109 @@
+/*
+ * arch/arm/mach-orion5x/board-d2net.c
+ *
+ * LaCie d2Network and Big Disk Network NAS setup
+ *
+ * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/pci.h>
+#include <linux/irq.h>
+#include <linux/leds.h>
+#include <linux/gpio.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/pci.h>
+#include <mach/orion5x.h>
+#include <plat/orion-gpio.h>
+#include "common.h"
+
+/*****************************************************************************
+ * LaCie d2 Network Info
+ ****************************************************************************/
+
+/*****************************************************************************
+ * GPIO LED's
+ ****************************************************************************/
+
+/*
+ * The blue front LED is wired to the CPLD and can blink in relation with the
+ * SATA activity.
+ *
+ * The following array detail the different LED registers and the combination
+ * of their possible values:
+ *
+ * led_off | blink_ctrl | SATA active | LED state
+ * | | |
+ * 1 | x | x | off
+ * 0 | 0 | 0 | off
+ * 0 | 1 | 0 | blink (rate 300ms)
+ * 0 | x | 1 | on
+ *
+ * Notes: The blue and the red front LED's can't be on at the same time.
+ * Red LED have priority.
+ */
+
+#define D2NET_GPIO_RED_LED 6
+#define D2NET_GPIO_BLUE_LED_BLINK_CTRL 16
+#define D2NET_GPIO_BLUE_LED_OFF 23
+
+static struct gpio_led d2net_leds[] = {
+ {
+ .name = "d2net:blue:sata",
+ .default_trigger = "default-on",
+ .gpio = D2NET_GPIO_BLUE_LED_OFF,
+ .active_low = 1,
+ },
+ {
+ .name = "d2net:red:fail",
+ .gpio = D2NET_GPIO_RED_LED,
+ },
+};
+
+static struct gpio_led_platform_data d2net_led_data = {
+ .num_leds = ARRAY_SIZE(d2net_leds),
+ .leds = d2net_leds,
+};
+
+static struct platform_device d2net_gpio_leds = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &d2net_led_data,
+ },
+};
+
+static void __init d2net_gpio_leds_init(void)
+{
+ int err;
+
+ /* Configure register blink_ctrl to allow SATA activity LED blinking. */
+ err = gpio_request(D2NET_GPIO_BLUE_LED_BLINK_CTRL, "blue LED blink");
+ if (err == 0) {
+ err = gpio_direction_output(D2NET_GPIO_BLUE_LED_BLINK_CTRL, 1);
+ if (err)
+ gpio_free(D2NET_GPIO_BLUE_LED_BLINK_CTRL);
+ }
+ if (err)
+ pr_err("d2net: failed to configure blue LED blink GPIO\n");
+
+ platform_device_register(&d2net_gpio_leds);
+}
+
+/*****************************************************************************
+ * General Setup
+ ****************************************************************************/
+
+void __init d2net_init(void)
+{
+ d2net_gpio_leds_init();
+
+ pr_notice("d2net: Flash write are not yet supported.\n");
+}
diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c
deleted file mode 100644
index 8f68b74..0000000
--- a/arch/arm/mach-orion5x/d2net-setup.c
+++ /dev/null
@@ -1,365 +0,0 @@
-/*
- * arch/arm/mach-orion5x/d2net-setup.c
- *
- * LaCie d2Network and Big Disk Network NAS setup
- *
- * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/pci.h>
-#include <linux/irq.h>
-#include <linux/mtd/physmap.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/leds.h>
-#include <linux/gpio_keys.h>
-#include <linux/input.h>
-#include <linux/i2c.h>
-#include <linux/ata_platform.h>
-#include <linux/gpio.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/pci.h>
-#include <mach/orion5x.h>
-#include <plat/orion-gpio.h>
-#include "common.h"
-#include "mpp.h"
-
-/*****************************************************************************
- * LaCie d2 Network Info
- ****************************************************************************/
-
-/*
- * 512KB NOR flash Device bus boot chip select
- */
-
-#define D2NET_NOR_BOOT_BASE 0xfff80000
-#define D2NET_NOR_BOOT_SIZE SZ_512K
-
-/*****************************************************************************
- * 512KB NOR Flash on Boot Device
- ****************************************************************************/
-
-/*
- * TODO: Check write support on flash MX29LV400CBTC-70G
- */
-
-static struct mtd_partition d2net_partitions[] = {
- {
- .name = "Full512kb",
- .size = MTDPART_SIZ_FULL,
- .offset = 0,
- .mask_flags = MTD_WRITEABLE,
- },
-};
-
-static struct physmap_flash_data d2net_nor_flash_data = {
- .width = 1,
- .parts = d2net_partitions,
- .nr_parts = ARRAY_SIZE(d2net_partitions),
-};
-
-static struct resource d2net_nor_flash_resource = {
- .flags = IORESOURCE_MEM,
- .start = D2NET_NOR_BOOT_BASE,
- .end = D2NET_NOR_BOOT_BASE
- + D2NET_NOR_BOOT_SIZE - 1,
-};
-
-static struct platform_device d2net_nor_flash = {
- .name = "physmap-flash",
- .id = 0,
- .dev = {
- .platform_data = &d2net_nor_flash_data,
- },
- .num_resources = 1,
- .resource = &d2net_nor_flash_resource,
-};
-
-/*****************************************************************************
- * Ethernet
- ****************************************************************************/
-
-static struct mv643xx_eth_platform_data d2net_eth_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(8),
-};
-
-/*****************************************************************************
- * I2C devices
- ****************************************************************************/
-
-/*
- * i2c addr | chip | description
- * 0x32 | Ricoh 5C372b | RTC
- * 0x3e | GMT G762 | PWM fan controller
- * 0x50 | HT24LC08 | eeprom (1kB)
- *
- * TODO: Add G762 support to the g760a driver.
- */
-static struct i2c_board_info __initdata d2net_i2c_devices[] = {
- {
- I2C_BOARD_INFO("rs5c372b", 0x32),
- }, {
- I2C_BOARD_INFO("24c08", 0x50),
- },
-};
-
-/*****************************************************************************
- * SATA
- ****************************************************************************/
-
-static struct mv_sata_platform_data d2net_sata_data = {
- .n_ports = 2,
-};
-
-#define D2NET_GPIO_SATA0_POWER 3
-#define D2NET_GPIO_SATA1_POWER 12
-
-static void __init d2net_sata_power_init(void)
-{
- int err;
-
- err = gpio_request(D2NET_GPIO_SATA0_POWER, "SATA0 power");
- if (err == 0) {
- err = gpio_direction_output(D2NET_GPIO_SATA0_POWER, 1);
- if (err)
- gpio_free(D2NET_GPIO_SATA0_POWER);
- }
- if (err)
- pr_err("d2net: failed to configure SATA0 power GPIO\n");
-
- err = gpio_request(D2NET_GPIO_SATA1_POWER, "SATA1 power");
- if (err == 0) {
- err = gpio_direction_output(D2NET_GPIO_SATA1_POWER, 1);
- if (err)
- gpio_free(D2NET_GPIO_SATA1_POWER);
- }
- if (err)
- pr_err("d2net: failed to configure SATA1 power GPIO\n");
-}
-
-/*****************************************************************************
- * GPIO LED's
- ****************************************************************************/
-
-/*
- * The blue front LED is wired to the CPLD and can blink in relation with the
- * SATA activity.
- *
- * The following array detail the different LED registers and the combination
- * of their possible values:
- *
- * led_off | blink_ctrl | SATA active | LED state
- * | | |
- * 1 | x | x | off
- * 0 | 0 | 0 | off
- * 0 | 1 | 0 | blink (rate 300ms)
- * 0 | x | 1 | on
- *
- * Notes: The blue and the red front LED's can't be on at the same time.
- * Red LED have priority.
- */
-
-#define D2NET_GPIO_RED_LED 6
-#define D2NET_GPIO_BLUE_LED_BLINK_CTRL 16
-#define D2NET_GPIO_BLUE_LED_OFF 23
-
-static struct gpio_led d2net_leds[] = {
- {
- .name = "d2net:blue:sata",
- .default_trigger = "default-on",
- .gpio = D2NET_GPIO_BLUE_LED_OFF,
- .active_low = 1,
- },
- {
- .name = "d2net:red:fail",
- .gpio = D2NET_GPIO_RED_LED,
- },
-};
-
-static struct gpio_led_platform_data d2net_led_data = {
- .num_leds = ARRAY_SIZE(d2net_leds),
- .leds = d2net_leds,
-};
-
-static struct platform_device d2net_gpio_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &d2net_led_data,
- },
-};
-
-static void __init d2net_gpio_leds_init(void)
-{
- int err;
-
- /* Configure GPIO over MPP max number. */
- orion_gpio_set_valid(D2NET_GPIO_BLUE_LED_OFF, 1);
-
- /* Configure register blink_ctrl to allow SATA activity LED blinking. */
- err = gpio_request(D2NET_GPIO_BLUE_LED_BLINK_CTRL, "blue LED blink");
- if (err == 0) {
- err = gpio_direction_output(D2NET_GPIO_BLUE_LED_BLINK_CTRL, 1);
- if (err)
- gpio_free(D2NET_GPIO_BLUE_LED_BLINK_CTRL);
- }
- if (err)
- pr_err("d2net: failed to configure blue LED blink GPIO\n");
-
- platform_device_register(&d2net_gpio_leds);
-}
-
-/****************************************************************************
- * GPIO keys
- ****************************************************************************/
-
-#define D2NET_GPIO_PUSH_BUTTON 18
-#define D2NET_GPIO_POWER_SWITCH_ON 8
-#define D2NET_GPIO_POWER_SWITCH_OFF 9
-
-#define D2NET_SWITCH_POWER_ON 0x1
-#define D2NET_SWITCH_POWER_OFF 0x2
-
-static struct gpio_keys_button d2net_buttons[] = {
- {
- .type = EV_SW,
- .code = D2NET_SWITCH_POWER_OFF,
- .gpio = D2NET_GPIO_POWER_SWITCH_OFF,
- .desc = "Power rocker switch (auto|off)",
- .active_low = 0,
- },
- {
- .type = EV_SW,
- .code = D2NET_SWITCH_POWER_ON,
- .gpio = D2NET_GPIO_POWER_SWITCH_ON,
- .desc = "Power rocker switch (on|auto)",
- .active_low = 0,
- },
- {
- .type = EV_KEY,
- .code = KEY_POWER,
- .gpio = D2NET_GPIO_PUSH_BUTTON,
- .desc = "Front Push Button",
- .active_low = 0,
- },
-};
-
-static struct gpio_keys_platform_data d2net_button_data = {
- .buttons = d2net_buttons,
- .nbuttons = ARRAY_SIZE(d2net_buttons),
-};
-
-static struct platform_device d2net_gpio_buttons = {
- .name = "gpio-keys",
- .id = -1,
- .dev = {
- .platform_data = &d2net_button_data,
- },
-};
-
-/*****************************************************************************
- * General Setup
- ****************************************************************************/
-
-static unsigned int d2net_mpp_modes[] __initdata = {
- MPP0_GPIO, /* Board ID (bit 0) */
- MPP1_GPIO, /* Board ID (bit 1) */
- MPP2_GPIO, /* Board ID (bit 2) */
- MPP3_GPIO, /* SATA 0 power */
- MPP4_UNUSED,
- MPP5_GPIO, /* Fan fail detection */
- MPP6_GPIO, /* Red front LED */
- MPP7_UNUSED,
- MPP8_GPIO, /* Rear power switch (on|auto) */
- MPP9_GPIO, /* Rear power switch (auto|off) */
- MPP10_UNUSED,
- MPP11_UNUSED,
- MPP12_GPIO, /* SATA 1 power */
- MPP13_UNUSED,
- MPP14_SATA_LED, /* SATA 0 active */
- MPP15_SATA_LED, /* SATA 1 active */
- MPP16_GPIO, /* Blue front LED blink control */
- MPP17_UNUSED,
- MPP18_GPIO, /* Front button (0 = Released, 1 = Pushed ) */
- MPP19_UNUSED,
- 0,
- /* 22: USB port 1 fuse (0 = Fail, 1 = Ok) */
- /* 23: Blue front LED off */
- /* 24: Inhibit board power off (0 = Disabled, 1 = Enabled) */
-};
-
-#define D2NET_GPIO_INHIBIT_POWER_OFF 24
-
-static void __init d2net_init(void)
-{
- /*
- * Setup basic Orion functions. Need to be called early.
- */
- orion5x_init();
-
- orion5x_mpp_conf(d2net_mpp_modes);
-
- /*
- * Configure peripherals.
- */
- orion5x_ehci0_init();
- orion5x_eth_init(&d2net_eth_data);
- orion5x_i2c_init();
- orion5x_uart0_init();
-
- d2net_sata_power_init();
- orion5x_sata_init(&d2net_sata_data);
-
- mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
- ORION_MBUS_DEVBUS_BOOT_ATTR,
- D2NET_NOR_BOOT_BASE,
- D2NET_NOR_BOOT_SIZE);
- platform_device_register(&d2net_nor_flash);
-
- platform_device_register(&d2net_gpio_buttons);
-
- d2net_gpio_leds_init();
-
- pr_notice("d2net: Flash write are not yet supported.\n");
-
- i2c_register_board_info(0, d2net_i2c_devices,
- ARRAY_SIZE(d2net_i2c_devices));
-
- orion_gpio_set_valid(D2NET_GPIO_INHIBIT_POWER_OFF, 1);
-}
-
-/* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */
-
-#ifdef CONFIG_MACH_D2NET
-MACHINE_START(D2NET, "LaCie d2 Network")
- .atag_offset = 0x100,
- .init_machine = d2net_init,
- .map_io = orion5x_map_io,
- .init_early = orion5x_init_early,
- .init_irq = orion5x_init_irq,
- .init_time = orion5x_timer_init,
- .fixup = tag_fixup_mem32,
- .restart = orion5x_restart,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_BIGDISK
-MACHINE_START(BIGDISK, "LaCie Big Disk Network")
- .atag_offset = 0x100,
- .init_machine = d2net_init,
- .map_io = orion5x_map_io,
- .init_early = orion5x_init_early,
- .init_irq = orion5x_init_irq,
- .init_time = orion5x_timer_init,
- .fixup = tag_fixup_mem32,
- .restart = orion5x_restart,
-MACHINE_END
-#endif
-
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 36/38] ARM: orion5x: convert Maxtor Shared Storage II to the Device Tree
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (34 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 35/38] ARM: orion5x: convert d2net " Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:33 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 37/38] ARM: orion: remove no longer needed DT IRQ code Thomas Petazzoni
` (2 subsequent siblings)
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
This commit converts the Maxtor Shared Storage II Orion5x platform to
the Device Tree. The only remaining things not converted are PCI and
the special power off method.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sylver Bruneau <sylver.bruneau@googlemail.com>
---
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/orion5x-maxtor-shared-storage-2.dts | 178 +++++++++++++
arch/arm/mach-orion5x/Kconfig | 5 +-
arch/arm/mach-orion5x/Makefile | 2 +-
arch/arm/mach-orion5x/board-dt.c | 3 +
arch/arm/mach-orion5x/board-mss2.c | 90 +++++++
arch/arm/mach-orion5x/common.h | 6 +
arch/arm/mach-orion5x/mss2-setup.c | 274 ---------------------
8 files changed, 282 insertions(+), 277 deletions(-)
create mode 100644 arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts
create mode 100644 arch/arm/mach-orion5x/board-mss2.c
delete mode 100644 arch/arm/mach-orion5x/mss2-setup.c
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 59397c2..629eee2 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -291,6 +291,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
dra7-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-d2-network.dtb \
orion5x-lacie-ethernet-disk-mini-v2.dtb \
+ orion5x-maxtor-shared-storage-2.dtb \
orion5x-rd88f5182-nas.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
diff --git a/arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts b/arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts
new file mode 100644
index 0000000..ff34849
--- /dev/null
+++ b/arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts
@@ -0,0 +1,178 @@
+/*
+ * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ * Copyright (C) Sylver Bruneau <sylver.bruneau@googlemail.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "orion5x-mv88f5182.dtsi"
+
+/ {
+ model = "Maxtor Shared Storage II";
+ compatible = "maxtor,shared-storage-2", "marvell,orion5x-88f5182", "marvell,orion5x";
+
+ memory {
+ reg = <0x00000000 0x4000000>; /* 64 MB */
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ linux,stdout-path = &uart0;
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
+ <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
+ <MBUS_ID(0x01, 0x0f) 0 0xff800000 0x40000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&pmx_buttons>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ power {
+ label = "Power";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+ };
+
+ reset {
+ label = "Reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&devbus_bootcs {
+ status = "okay";
+
+ devbus,keep-config;
+
+ /*
+ * Currently the MTD code does not recognize the MX29LV400CBCT
+ * as a bottom-type device. This could cause risks of
+ * accidentally erasing critical flash sectors. We thus define
+ * a single, write-protected partition covering the whole
+ * flash. TODO: once the flash part TOP/BOTTOM detection
+ * issue is sorted out in the MTD code, break this into at
+ * least three partitions: 'u-boot code', 'u-boot environment'
+ * and 'whatever is left'.
+ */
+ flash at 0 {
+ compatible = "cfi-flash";
+ reg = <0 0x40000>;
+ bank-width = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+};
+
+&mdio {
+ status = "okay";
+
+ ethphy: ethernet-phy {
+ reg = <8>;
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+ð {
+ status = "okay";
+
+ ethernet-port at 0 {
+ phy-handle = <ðphy>;
+ };
+};
+
+&i2c {
+ status = "okay";
+ clock-frequency = <100000>;
+ #address-cells = <1>;
+
+ rtc at 68 {
+ compatible = "st,m41t81";
+ reg = <0x68>;
+ pinctrl-0 = <&pmx_rtc>;
+ pinctrl-names = "default";
+ interrupt-parent = <&gpio0>;
+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&pinctrl {
+ pinctrl-0 = <&pmx_leds &pmx_misc>;
+ pinctrl-names = "default";
+
+ pmx_buttons: pmx-buttons {
+ marvell,pins = "mpp11", "mpp12";
+ marvell,function = "gpio";
+ };
+
+ /*
+ * MPP0: Power LED
+ * MPP1: Error LED
+ */
+ pmx_leds: pmx-leds {
+ marvell,pins = "mpp0", "mpp1";
+ marvell,function = "gpio";
+ };
+
+ /*
+ * MPP4: HDD ind. (Single/Dual)
+ * MPP5: HD0 5V control
+ * MPP6: HD0 12V control
+ * MPP7: HD1 5V control
+ * MPP8: HD1 12V control
+ */
+ pmx_misc: pmx-misc {
+ marvell,pins = "mpp4", "mpp5", "mpp6", "mpp7", "mpp8", "mpp10";
+ marvell,function = "gpio";
+ };
+
+ pmx_rtc: pmx-rtc {
+ marvell,pins = "mpp3";
+ marvell,function = "gpio";
+ };
+
+ pmx_sata0_led_active: pmx-sata0-led-active {
+ marvell,pins = "mpp14";
+ marvell,function = "sata0";
+ };
+
+ pmx_sata1_led_active: pmx-sata1-led-active {
+ marvell,pins = "mpp15";
+ marvell,function = "sata1";
+ };
+
+ /*
+ * Non MPP GPIOs:
+ * GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok)
+ * GPIO 23: Blue front LED off
+ * GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled)
+ */
+};
+
+&sata {
+ pinctrl-0 = <&pmx_sata0_led_active
+ &pmx_sata1_led_active>;
+ pinctrl-names = "default";
+ status = "okay";
+ nr-ports = <2>;
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index 3c4ad83..2412efb 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -129,8 +129,9 @@ config MACH_NET2BIG
Say 'Y' here if you want your kernel to support the
LaCie 2Big Network NAS.
-config MACH_MSS2
- bool "Maxtor Shared Storage II"
+config MACH_MSS2_DT
+ bool "Maxtor Shared Storage II (Flattened Device Tree)"
+ select ARCH_ORION5X_DT
help
Say 'Y' here if you want your kernel to support the
Maxtor Shared Storage II platform.
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index 787dcee..a40b5c9 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -13,7 +13,6 @@ obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o
obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o
obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o
obj-$(CONFIG_MACH_NET2BIG) += net2big-setup.o
-obj-$(CONFIG_MACH_MSS2) += mss2-setup.o
obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o
obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o
obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o
@@ -22,4 +21,5 @@ obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o
obj-$(CONFIG_ARCH_ORION5X_DT) += board-dt.o
obj-$(CONFIG_MACH_D2NET_DT) += board-d2net.o
+obj-$(CONFIG_MACH_MSS2_DT) += board-mss2.o
obj-$(CONFIG_MACH_RD88F5182_DT) += board-rd88f5182.o
diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c
index 78d2e52..35d418f 100644
--- a/arch/arm/mach-orion5x/board-dt.c
+++ b/arch/arm/mach-orion5x/board-dt.c
@@ -61,6 +61,9 @@ static void __init orion5x_dt_init(void)
cpu_idle_poll_ctrl(true);
}
+ if (of_machine_is_compatible("maxtor,shared-storage-2"))
+ mss2_init();
+
of_platform_populate(NULL, of_default_bus_match_table,
orion5x_auxdata_lookup, NULL);
}
diff --git a/arch/arm/mach-orion5x/board-mss2.c b/arch/arm/mach-orion5x/board-mss2.c
new file mode 100644
index 0000000..66f9c3b
--- /dev/null
+++ b/arch/arm/mach-orion5x/board-mss2.c
@@ -0,0 +1,90 @@
+/*
+ * Maxtor Shared Storage II Board Setup
+ *
+ * Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/pci.h>
+#include <linux/irq.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/pci.h>
+#include <mach/orion5x.h>
+#include <mach/bridge-regs.h>
+#include "common.h"
+
+/*****************************************************************************
+ * Maxtor Shared Storage II Info
+ ****************************************************************************/
+
+/****************************************************************************
+ * PCI setup
+ ****************************************************************************/
+static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ int irq;
+
+ /*
+ * Check for devices with hard-wired IRQs.
+ */
+ irq = orion5x_pci_map_irq(dev, slot, pin);
+ if (irq != -1)
+ return irq;
+
+ return -1;
+}
+
+static struct hw_pci mss2_pci __initdata = {
+ .nr_controllers = 2,
+ .setup = orion5x_pci_sys_setup,
+ .scan = orion5x_pci_sys_scan_bus,
+ .map_irq = mss2_pci_map_irq,
+};
+
+static int __init mss2_pci_init(void)
+{
+ if (machine_is_mss2())
+ pci_common_init(&mss2_pci);
+
+ return 0;
+}
+subsys_initcall(mss2_pci_init);
+
+/*****************************************************************************
+ * MSS2 power off method
+ ****************************************************************************/
+/*
+ * On the Maxtor Shared Storage II, the shutdown process is the following :
+ * - Userland modifies U-boot env to tell U-boot to go idle at next boot
+ * - The board reboots
+ * - U-boot starts and go into an idle mode until the user press "power"
+ */
+static void mss2_power_off(void)
+{
+ u32 reg;
+
+ /*
+ * Enable and issue soft reset
+ */
+ reg = readl(RSTOUTn_MASK);
+ reg |= 1 << 2;
+ writel(reg, RSTOUTn_MASK);
+
+ reg = readl(CPU_SOFT_RESET);
+ reg |= 1;
+ writel(reg, CPU_SOFT_RESET);
+}
+
+void __init mss2_init(void)
+{
+ /* register mss2 specific power-off method */
+ pm_power_off = mss2_power_off;
+}
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 4470e31..26d6f34 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -68,6 +68,12 @@ struct meminfo;
struct tag;
extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *);
+#ifdef CONFIG_MACH_MSS2_DT
+extern void mss2_init(void);
+#else
+static inline void mss2_init(void) {}
+#endif
+
/*****************************************************************************
* Helpers to access Orion registers
****************************************************************************/
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c
deleted file mode 100644
index e105130..0000000
--- a/arch/arm/mach-orion5x/mss2-setup.c
+++ /dev/null
@@ -1,274 +0,0 @@
-/*
- * Maxtor Shared Storage II Board Setup
- *
- * Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/pci.h>
-#include <linux/irq.h>
-#include <linux/mtd/physmap.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/leds.h>
-#include <linux/gpio_keys.h>
-#include <linux/input.h>
-#include <linux/i2c.h>
-#include <linux/ata_platform.h>
-#include <linux/gpio.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/pci.h>
-#include <mach/orion5x.h>
-#include <mach/bridge-regs.h>
-#include "common.h"
-#include "mpp.h"
-
-#define MSS2_NOR_BOOT_BASE 0xff800000
-#define MSS2_NOR_BOOT_SIZE SZ_256K
-
-/*****************************************************************************
- * Maxtor Shared Storage II Info
- ****************************************************************************/
-
-/*
- * Maxtor Shared Storage II hardware :
- * - Marvell 88F5182-A2 C500
- * - Marvell 88E1111 Gigabit Ethernet PHY
- * - RTC M41T81 (@0x68) on I2C bus
- * - 256KB NOR flash
- * - 64MB of RAM
- */
-
-/*****************************************************************************
- * 256KB NOR Flash on BOOT Device
- ****************************************************************************/
-
-static struct physmap_flash_data mss2_nor_flash_data = {
- .width = 1,
-};
-
-static struct resource mss2_nor_flash_resource = {
- .flags = IORESOURCE_MEM,
- .start = MSS2_NOR_BOOT_BASE,
- .end = MSS2_NOR_BOOT_BASE + MSS2_NOR_BOOT_SIZE - 1,
-};
-
-static struct platform_device mss2_nor_flash = {
- .name = "physmap-flash",
- .id = 0,
- .dev = {
- .platform_data = &mss2_nor_flash_data,
- },
- .resource = &mss2_nor_flash_resource,
- .num_resources = 1,
-};
-
-/****************************************************************************
- * PCI setup
- ****************************************************************************/
-static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- int irq;
-
- /*
- * Check for devices with hard-wired IRQs.
- */
- irq = orion5x_pci_map_irq(dev, slot, pin);
- if (irq != -1)
- return irq;
-
- return -1;
-}
-
-static struct hw_pci mss2_pci __initdata = {
- .nr_controllers = 2,
- .setup = orion5x_pci_sys_setup,
- .scan = orion5x_pci_sys_scan_bus,
- .map_irq = mss2_pci_map_irq,
-};
-
-static int __init mss2_pci_init(void)
-{
- if (machine_is_mss2())
- pci_common_init(&mss2_pci);
-
- return 0;
-}
-subsys_initcall(mss2_pci_init);
-
-
-/*****************************************************************************
- * Ethernet
- ****************************************************************************/
-
-static struct mv643xx_eth_platform_data mss2_eth_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(8),
-};
-
-/*****************************************************************************
- * SATA
- ****************************************************************************/
-
-static struct mv_sata_platform_data mss2_sata_data = {
- .n_ports = 2,
-};
-
-/*****************************************************************************
- * GPIO buttons
- ****************************************************************************/
-
-#define MSS2_GPIO_KEY_RESET 12
-#define MSS2_GPIO_KEY_POWER 11
-
-static struct gpio_keys_button mss2_buttons[] = {
- {
- .code = KEY_POWER,
- .gpio = MSS2_GPIO_KEY_POWER,
- .desc = "Power",
- .active_low = 1,
- }, {
- .code = KEY_RESTART,
- .gpio = MSS2_GPIO_KEY_RESET,
- .desc = "Reset",
- .active_low = 1,
- },
-};
-
-static struct gpio_keys_platform_data mss2_button_data = {
- .buttons = mss2_buttons,
- .nbuttons = ARRAY_SIZE(mss2_buttons),
-};
-
-static struct platform_device mss2_button_device = {
- .name = "gpio-keys",
- .id = -1,
- .dev = {
- .platform_data = &mss2_button_data,
- },
-};
-
-/*****************************************************************************
- * RTC m41t81 on I2C bus
- ****************************************************************************/
-
-#define MSS2_GPIO_RTC_IRQ 3
-
-static struct i2c_board_info __initdata mss2_i2c_rtc = {
- I2C_BOARD_INFO("m41t81", 0x68),
-};
-
-/*****************************************************************************
- * MSS2 power off method
- ****************************************************************************/
-/*
- * On the Maxtor Shared Storage II, the shutdown process is the following :
- * - Userland modifies U-boot env to tell U-boot to go idle at next boot
- * - The board reboots
- * - U-boot starts and go into an idle mode until the user press "power"
- */
-static void mss2_power_off(void)
-{
- u32 reg;
-
- /*
- * Enable and issue soft reset
- */
- reg = readl(RSTOUTn_MASK);
- reg |= 1 << 2;
- writel(reg, RSTOUTn_MASK);
-
- reg = readl(CPU_SOFT_RESET);
- reg |= 1;
- writel(reg, CPU_SOFT_RESET);
-}
-
-/****************************************************************************
- * General Setup
- ****************************************************************************/
-static unsigned int mss2_mpp_modes[] __initdata = {
- MPP0_GPIO, /* Power LED */
- MPP1_GPIO, /* Error LED */
- MPP2_UNUSED,
- MPP3_GPIO, /* RTC interrupt */
- MPP4_GPIO, /* HDD ind. (Single/Dual)*/
- MPP5_GPIO, /* HD0 5V control */
- MPP6_GPIO, /* HD0 12V control */
- MPP7_GPIO, /* HD1 5V control */
- MPP8_GPIO, /* HD1 12V control */
- MPP9_UNUSED,
- MPP10_GPIO, /* Fan control */
- MPP11_GPIO, /* Power button */
- MPP12_GPIO, /* Reset button */
- MPP13_UNUSED,
- MPP14_SATA_LED, /* SATA 0 active */
- MPP15_SATA_LED, /* SATA 1 active */
- MPP16_UNUSED,
- MPP17_UNUSED,
- MPP18_UNUSED,
- MPP19_UNUSED,
- 0,
-};
-
-static void __init mss2_init(void)
-{
- /* Setup basic Orion functions. Need to be called early. */
- orion5x_init();
-
- orion5x_mpp_conf(mss2_mpp_modes);
-
- /*
- * MPP[20] Unused
- * MPP[21] PCI clock
- * MPP[22] USB 0 over current
- * MPP[23] USB 1 over current
- */
-
- /*
- * Configure peripherals.
- */
- orion5x_ehci0_init();
- orion5x_ehci1_init();
- orion5x_eth_init(&mss2_eth_data);
- orion5x_i2c_init();
- orion5x_sata_init(&mss2_sata_data);
- orion5x_uart0_init();
- orion5x_xor_init();
-
- mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
- ORION_MBUS_DEVBUS_BOOT_ATTR,
- MSS2_NOR_BOOT_BASE,
- MSS2_NOR_BOOT_SIZE);
- platform_device_register(&mss2_nor_flash);
-
- platform_device_register(&mss2_button_device);
-
- if (gpio_request(MSS2_GPIO_RTC_IRQ, "rtc") == 0) {
- if (gpio_direction_input(MSS2_GPIO_RTC_IRQ) == 0)
- mss2_i2c_rtc.irq = gpio_to_irq(MSS2_GPIO_RTC_IRQ);
- else
- gpio_free(MSS2_GPIO_RTC_IRQ);
- }
- i2c_register_board_info(0, &mss2_i2c_rtc, 1);
-
- /* register mss2 specific power-off method */
- pm_power_off = mss2_power_off;
-}
-
-MACHINE_START(MSS2, "Maxtor Shared Storage II")
- /* Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com> */
- .atag_offset = 0x100,
- .init_machine = mss2_init,
- .map_io = orion5x_map_io,
- .init_early = orion5x_init_early,
- .init_irq = orion5x_init_irq,
- .init_time = orion5x_timer_init,
- .fixup = tag_fixup_mem32,
- .restart = orion5x_restart,
-MACHINE_END
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 37/38] ARM: orion: remove no longer needed DT IRQ code
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (35 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 36/38] ARM: orion5x: convert Maxtor Shared Storage II to the " Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:33 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 38/38] ARM: orion: remove no longer needed gpio DT code Thomas Petazzoni
2014-04-23 11:35 ` [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Sebastian Hesselbarth
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
Following the move of the Orion5x Device Tree support to use
irqchip_init() for the interrupt controller probing, the
plat-orion/irq.c code for DT-probing of the interrupt controller is no
longer necessary, so we can get rid of it.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/plat-orion/include/plat/irq.h | 1 -
arch/arm/plat-orion/irq.c | 32 --------------------------------
2 files changed, 33 deletions(-)
diff --git a/arch/arm/plat-orion/include/plat/irq.h b/arch/arm/plat-orion/include/plat/irq.h
index 50547e4..96be19e 100644
--- a/arch/arm/plat-orion/include/plat/irq.h
+++ b/arch/arm/plat-orion/include/plat/irq.h
@@ -12,5 +12,4 @@
#define __PLAT_IRQ_H
void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr);
-void __init orion_dt_init_irq(void);
#endif
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index 27ec18b..8c1fc06 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -38,35 +38,3 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
}
-
-#ifdef CONFIG_OF
-static int __init orion_add_irq_domain(struct device_node *np,
- struct device_node *interrupt_parent)
-{
- int i = 0;
- void __iomem *base;
-
- do {
- base = of_iomap(np, i);
- if (base) {
- orion_irq_init(i * 32, base + 0x04);
- i++;
- }
- } while (base);
-
- irq_domain_add_legacy(np, i * 32, 0, 0,
- &irq_domain_simple_ops, NULL);
- return 0;
-}
-
-static const struct of_device_id orion_irq_match[] = {
- { .compatible = "marvell,orion-intc",
- .data = orion_add_irq_domain, },
- {},
-};
-
-void __init orion_dt_init_irq(void)
-{
- of_irq_init(orion_irq_match);
-}
-#endif
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 38/38] ARM: orion: remove no longer needed gpio DT code
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (36 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 37/38] ARM: orion: remove no longer needed DT IRQ code Thomas Petazzoni
@ 2014-04-22 21:26 ` Thomas Petazzoni
2014-04-23 11:34 ` Sebastian Hesselbarth
2014-04-23 11:35 ` [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Sebastian Hesselbarth
38 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:26 UTC (permalink / raw)
To: linux-arm-kernel
Following the move to pure DT-based probing of the GPIO controllers on
Orion5x, some code in plat-orion/orion-gpio.c can be removed as it is
no longer used.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/plat-orion/gpio.c | 48 ---------------------------
arch/arm/plat-orion/include/plat/orion-gpio.h | 1 -
2 files changed, 49 deletions(-)
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 6816192..b61a3bc 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -597,51 +597,3 @@ void __init orion_gpio_init(struct device_node *np,
orion_gpio_chip_count++;
}
-
-#ifdef CONFIG_OF
-static void __init orion_gpio_of_init_one(struct device_node *np,
- int irq_gpio_base)
-{
- int ngpio, gpio_base, mask_offset;
- void __iomem *base;
- int ret, i;
- int irqs[4];
- int secondary_irq_base;
-
- ret = of_property_read_u32(np, "ngpio", &ngpio);
- if (ret)
- goto out;
- ret = of_property_read_u32(np, "mask-offset", &mask_offset);
- if (ret == -EINVAL)
- mask_offset = 0;
- else
- goto out;
- base = of_iomap(np, 0);
- if (!base)
- goto out;
-
- secondary_irq_base = irq_gpio_base + (32 * orion_gpio_chip_count);
- gpio_base = 32 * orion_gpio_chip_count;
-
- /* Get the interrupt numbers. Each chip can have up to 4
- * interrupt handlers, with each handler dealing with 8 GPIO
- * pins. */
-
- for (i = 0; i < 4; i++)
- irqs[i] = irq_of_parse_and_map(np, i);
-
- orion_gpio_init(np, gpio_base, ngpio, base, mask_offset,
- secondary_irq_base, irqs);
- return;
-out:
- pr_err("%s: %s: missing mandatory property\n", __func__, np->name);
-}
-
-void __init orion_gpio_of_init(int irq_gpio_base)
-{
- struct device_node *np;
-
- for_each_compatible_node(np, NULL, "marvell,orion-gpio")
- orion_gpio_of_init_one(np, irq_gpio_base);
-}
-#endif
diff --git a/arch/arm/plat-orion/include/plat/orion-gpio.h b/arch/arm/plat-orion/include/plat/orion-gpio.h
index 614dcac..e763988 100644
--- a/arch/arm/plat-orion/include/plat/orion-gpio.h
+++ b/arch/arm/plat-orion/include/plat/orion-gpio.h
@@ -33,5 +33,4 @@ void __init orion_gpio_init(struct device_node *np,
int secondary_irq_base,
int irq[4]);
-void __init orion_gpio_of_init(int irq_gpio_base);
#endif
--
1.9.2
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function
2014-04-22 21:26 ` [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function Thomas Petazzoni
@ 2014-04-22 21:45 ` Arnd Bergmann
2014-04-22 21:53 ` Thomas Petazzoni
2014-04-23 11:25 ` Sebastian Hesselbarth
2014-04-26 14:54 ` Jason Cooper
2 siblings, 1 reply; 87+ messages in thread
From: Arnd Bergmann @ 2014-04-22 21:45 UTC (permalink / raw)
To: linux-arm-kernel
On Tuesday 22 April 2014 23:26:26 Thomas Petazzoni wrote:
> However, the common CONFIG_MULTI_IRQ_HANDLER handler for non-DT
> platforms in plat-orion/irq.c doesn't match the needs of
> Orion5x. Also, it doesn't make much sense for orion_irq_init() to
> register the multi-IRQ handler: orion_irq_init() is called once for
> each IRQ cause/mask tuple, while the multi-IRQ handler only needs to
> be registered once.
Since you now have the code for doing MULTI_IRQ_HANDLER on Orion5x,
why not always enable it for both Orion and Kirkwood, and remove
the #ifdef?
Arnd
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function
2014-04-22 21:45 ` Arnd Bergmann
@ 2014-04-22 21:53 ` Thomas Petazzoni
2014-04-23 10:30 ` Arnd Bergmann
0 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-22 21:53 UTC (permalink / raw)
To: linux-arm-kernel
Dear Arnd Bergmann,
On Tue, 22 Apr 2014 23:45:55 +0200, Arnd Bergmann wrote:
> On Tuesday 22 April 2014 23:26:26 Thomas Petazzoni wrote:
> > However, the common CONFIG_MULTI_IRQ_HANDLER handler for non-DT
> > platforms in plat-orion/irq.c doesn't match the needs of
> > Orion5x. Also, it doesn't make much sense for orion_irq_init() to
> > register the multi-IRQ handler: orion_irq_init() is called once for
> > each IRQ cause/mask tuple, while the multi-IRQ handler only needs to
> > be registered once.
>
> Since you now have the code for doing MULTI_IRQ_HANDLER on Orion5x,
> why not always enable it for both Orion and Kirkwood, and remove
> the #ifdef?
You mean the #ifdef CONFIG_MULTI_IRQ_HANDLER ? This is because this
piece of code is only needed if you build into the same image the DT
and non-DT code. For pure DT, this is not needed, as the handler is in
drivers/irqchip/irq-orion.c. For pure non-DT, this is not needed,
because we don't use MULTI_IRQ_HANDLER. However, for mixed DT and
non-DT, since the DT stuff selects MULTI_IRQ_HANDLER, the non-DT stuff
must have its own.
Also, this patch step is only *one* step in the (hopefully) right
direction. It's already a 38 patches series, so it would be good to
understand that no all cleanups can be done in this particular patch
series. What you're suggesting is not a problem introduced by this
patch series: the original code already had the #ifdef
CONFIG_MULTI_IRQ_HANDLER, so I would like to take the task of removing
it as a follow-up task, if you agree.
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function
2014-04-22 21:53 ` Thomas Petazzoni
@ 2014-04-23 10:30 ` Arnd Bergmann
0 siblings, 0 replies; 87+ messages in thread
From: Arnd Bergmann @ 2014-04-23 10:30 UTC (permalink / raw)
To: linux-arm-kernel
On Tuesday 22 April 2014 23:53:23 Thomas Petazzoni wrote:
>
> On Tue, 22 Apr 2014 23:45:55 +0200, Arnd Bergmann wrote:
> > On Tuesday 22 April 2014 23:26:26 Thomas Petazzoni wrote:
> > > However, the common CONFIG_MULTI_IRQ_HANDLER handler for non-DT
> > > platforms in plat-orion/irq.c doesn't match the needs of
> > > Orion5x. Also, it doesn't make much sense for orion_irq_init() to
> > > register the multi-IRQ handler: orion_irq_init() is called once for
> > > each IRQ cause/mask tuple, while the multi-IRQ handler only needs to
> > > be registered once.
> >
> > Since you now have the code for doing MULTI_IRQ_HANDLER on Orion5x,
> > why not always enable it for both Orion and Kirkwood, and remove
> > the #ifdef?
>
> You mean the #ifdef CONFIG_MULTI_IRQ_HANDLER ? This is because this
> piece of code is only needed if you build into the same image the DT
> and non-DT code. For pure DT, this is not needed, as the handler is in
> drivers/irqchip/irq-orion.c. For pure non-DT, this is not needed,
> because we don't use MULTI_IRQ_HANDLER. However, for mixed DT and
> non-DT, since the DT stuff selects MULTI_IRQ_HANDLER, the non-DT stuff
> must have its own.
>
> Also, this patch step is only *one* step in the (hopefully) right
> direction. It's already a 38 patches series, so it would be good to
> understand that no all cleanups can be done in this particular patch
> series. What you're suggesting is not a problem introduced by this
> patch series: the original code already had the #ifdef
> CONFIG_MULTI_IRQ_HANDLER, so I would like to take the task of removing
> it as a follow-up task, if you agree.
Nevermind then, I was trying to simplify the patches because you no
longer need the #ifdef after your change. If you prefer not to do
it right away, we can probably skip the change, since the code is
going to be removed anyway once the mach-mvebu version is complete.
Arnd
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 03/38] pinctrl: mvebu: new driver for Orion platforms
2014-04-22 21:26 ` [PATCH v2 03/38] pinctrl: mvebu: new driver for Orion platforms Thomas Petazzoni
@ 2014-04-23 11:16 ` Sebastian Hesselbarth
2014-04-23 14:17 ` Linus Walleij
2014-04-24 13:10 ` Linus Walleij
2 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:16 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> This commit extends the pinctrl mvebu logic with a new driver to cover
> Orion5x SoC. It supports the definitions for the 5181l, 5182 and 5281
> variants of Orion5x, which are the three ones supported by the old
> style MPP code in arch/arm/mach-orion5x/.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> .../bindings/pinctrl/marvell,orion-pinctrl.txt | 91 +++++++
> drivers/pinctrl/mvebu/Kconfig | 4 +
> drivers/pinctrl/mvebu/Makefile | 1 +
> drivers/pinctrl/mvebu/pinctrl-orion.c | 261 +++++++++++++++++++++
> 4 files changed, 357 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt
> create mode 100644 drivers/pinctrl/mvebu/pinctrl-orion.c
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt
> new file mode 100644
> index 0000000..27570a3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt
> @@ -0,0 +1,91 @@
> +* Marvell Orion SoC pinctrl driver for mpp
> +
> +Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
> +part and usage.
> +
> +Required properties:
> +- compatible: "marvell,88f5181l-pinctrl", "marvell,88f5182-pinctrl",
> + "marvell,88f5281-pinctrl"
> +
> +- reg: two register areas, the first one describing the first two
> + contiguous MPP registers, and the second one describing the single
> + final MPP register, separated from the previous one.
> +
> +Available mpp pins/groups and functions:
> +Note: brackets (x) are not part of the mpp name for marvell,function and given
> +only for more detailed description in this document.
> +
> +* Marvell Orion 88f5181l
> +
> +name pins functions
> +================================================================================
> +mpp0 0 pcie(rstout), pci(req2), gpio
> +mpp1 1 gpio, pci(gnt2)
> +mpp2 2 gpio, pci(req3), pci-1(pme)
> +mpp3 3 gpio, pci(gnt3)
> +mpp4 4 gpio, pci(req4)
> +mpp5 5 gpio, pci(gnt4)
> +mpp6 6 gpio, pci(req5), pci-1(clk)
> +mpp7 7 gpio, pci(gnt5), pci-1(clk)
> +mpp8 8 gpio, ge(col)
> +mpp9 9 gpio, ge(rxerr)
> +mpp10 10 gpio, ge(crs)
> +mpp11 11 gpio, ge(txerr)
> +mpp12 12 gpio, ge(txd4)
> +mpp13 13 gpio, ge(txd5)
> +mpp14 14 gpio, ge(txd6)
> +mpp15 15 gpio, ge(txd7)
> +mpp16 16 ge(rxd4)
> +mpp17 17 ge(rxd5)
> +mpp18 18 ge(rxd6)
> +mpp19 19 ge(rxd7)
> +
> +* Marvell Orion 88f5182
> +
> +name pins functions
> +================================================================================
> +mpp0 0 pcie(rstout), pci(req2), gpio
> +mpp1 1 gpio, pci(gnt2)
> +mpp2 2 gpio, pci(req3), pci-1(pme)
> +mpp3 3 gpio, pci(gnt3)
> +mpp4 4 gpio, pci(req4), bootnand(re), sata0(prsnt)
> +mpp5 5 gpio, pci(gnt4), bootnand(we), sata1(prsnt)
> +mpp6 6 gpio, pci(req5), nand(re0), sata0(act)
> +mpp7 7 gpio, pci(gnt5), nand(we0), sata1(act)
> +mpp8 8 gpio, ge(col)
> +mpp9 9 gpio, ge(rxerr)
> +mpp10 10 gpio, ge(crs)
> +mpp11 11 gpio, ge(txerr)
> +mpp12 12 gpio, ge(txd4), nand(re1), sata0(ledprsnt)
> +mpp13 13 gpio, ge(txd5), nand(we1), sata1(ledprsnt)
> +mpp14 14 gpio, ge(txd6), nand(re2), sata0(ledact)
> +mpp15 15 gpio, ge(txd7), nand(we2), sata1(ledact)
> +mpp16 16 uart1(rxd), ge(rxd4), gpio
> +mpp17 17 uart1(txd), ge(rxd5), gpio
> +mpp18 18 uart1(cts), ge(rxd6), gpio
> +mpp19 19 uart1(rts), ge(rxd7), gpio
> +
> +* Marvell Orion 88f5281
> +
> +name pins functions
> +================================================================================
> +mpp0 0 pcie(rstout), pci(req2), gpio
> +mpp1 1 gpio, pci(gnt2)
> +mpp2 2 gpio, pci(req3), pci(pme)
> +mpp3 3 gpio, pci(gnt3)
> +mpp4 4 gpio, pci(req4), bootnand(re)
> +mpp5 5 gpio, pci(gnt4), bootnand(we)
> +mpp6 6 gpio, pci(req5), nand(re0)
> +mpp7 7 gpio, pci(gnt5), nand(we0)
> +mpp8 8 gpio, ge(col)
> +mpp9 9 gpio, ge(rxerr)
> +mpp10 10 gpio, ge(crs)
> +mpp11 11 gpio, ge(txerr)
> +mpp12 12 gpio, ge(txd4), nand(re1)
> +mpp13 13 gpio, ge(txd5), nand(we1)
> +mpp14 14 gpio, ge(txd6), nand(re2)
> +mpp15 15 gpio, ge(txd7), nand(we2)
> +mpp16 16 uart1(rxd), ge(rxd4)
> +mpp17 17 uart1(txd), ge(rxd5)
> +mpp18 18 uart1(cts), ge(rxd6)
> +mpp19 19 uart1(rts), ge(rxd7)
> diff --git a/drivers/pinctrl/mvebu/Kconfig b/drivers/pinctrl/mvebu/Kconfig
> index cc298fad..d6dd835 100644
> --- a/drivers/pinctrl/mvebu/Kconfig
> +++ b/drivers/pinctrl/mvebu/Kconfig
> @@ -30,4 +30,8 @@ config PINCTRL_ARMADA_XP
> bool
> select PINCTRL_MVEBU
>
> +config PINCTRL_ORION
> + bool
> + select PINCTRL_MVEBU
> +
> endif
> diff --git a/drivers/pinctrl/mvebu/Makefile b/drivers/pinctrl/mvebu/Makefile
> index bc1b9f1..a0818e9 100644
> --- a/drivers/pinctrl/mvebu/Makefile
> +++ b/drivers/pinctrl/mvebu/Makefile
> @@ -5,3 +5,4 @@ obj-$(CONFIG_PINCTRL_ARMADA_370) += pinctrl-armada-370.o
> obj-$(CONFIG_PINCTRL_ARMADA_375) += pinctrl-armada-375.o
> obj-$(CONFIG_PINCTRL_ARMADA_38X) += pinctrl-armada-38x.o
> obj-$(CONFIG_PINCTRL_ARMADA_XP) += pinctrl-armada-xp.o
> +obj-$(CONFIG_PINCTRL_ORION) += pinctrl-orion.o
> diff --git a/drivers/pinctrl/mvebu/pinctrl-orion.c b/drivers/pinctrl/mvebu/pinctrl-orion.c
> new file mode 100644
> index 0000000..dda1e72
> --- /dev/null
> +++ b/drivers/pinctrl/mvebu/pinctrl-orion.c
> @@ -0,0 +1,261 @@
> +/*
> + * Marvell Orion pinctrl driver based on mvebu pinctrl core
> + *
> + * Author: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * The first 16 MPP pins on Orion are easy to handle: they are
> + * configured through 2 consecutive registers, located at the base
> + * address of the MPP device.
> + *
> + * However the last 4 MPP pins are handled by a register at offset
> + * 0x50 from the base address, so it is not consecutive with the first
> + * two registers.
> + */
> +
> +#include <linux/err.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/clk.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/pinctrl/pinctrl.h>
> +
> +#include "pinctrl-mvebu.h"
> +
> +static void __iomem *mpp_base;
> +static void __iomem *high_mpp_base;
> +
> +static int orion_mpp_ctrl_get(unsigned pid, unsigned long *config)
> +{
> + unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
> +
> + if (pid < 16) {
> + unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
> + *config = (readl(mpp_base + off) >> shift) & MVEBU_MPP_MASK;
> + }
> + else {
> + *config = (readl(high_mpp_base) >> shift) & MVEBU_MPP_MASK;
> + }
> +
> + return 0;
> +}
> +
> +static int orion_mpp_ctrl_set(unsigned pid, unsigned long config)
> +{
> + unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
> +
> + if (pid < 16) {
> + unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
> + u32 reg = readl(mpp_base + off) & ~(MVEBU_MPP_MASK << shift);
> + writel(reg | (config << shift), mpp_base + off);
> + }
> + else {
> + u32 reg = readl(high_mpp_base) & ~(MVEBU_MPP_MASK << shift);
> + writel(reg | (config << shift), high_mpp_base);
> + }
> +
> + return 0;
> +}
> +
> +#define V(f5181l, f5182, f5281) \
> + ((f5181l << 0) | (f5182 << 1) | (f5281 << 2))
> +
> +enum orion_variant {
> + V_5181L = V(1, 0, 0),
> + V_5182 = V(0, 1, 0),
> + V_5281 = V(0, 0, 1),
> + V_ALL = V(1, 1, 1),
> +};
> +
> +static struct mvebu_mpp_mode orion_mpp_modes[] = {
> + MPP_MODE(0,
> + MPP_VAR_FUNCTION(0x0, "pcie", "rstout", V_ALL),
> + MPP_VAR_FUNCTION(0x2, "pci", "req2", V_ALL),
> + MPP_VAR_FUNCTION(0x3, "gpio", NULL, V_ALL)),
> + MPP_MODE(1,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x2, "pci", "gnt2", V_ALL)),
> + MPP_MODE(2,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x2, "pci", "req3", V_ALL),
> + MPP_VAR_FUNCTION(0x3, "pci-1", "pme", V_ALL)),
> + MPP_MODE(3,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x2, "pci", "gnt3", V_ALL)),
> + MPP_MODE(4,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x2, "pci", "req4", V_ALL),
> + MPP_VAR_FUNCTION(0x4, "bootnand", "re", V_5182 | V_5281),
> + MPP_VAR_FUNCTION(0x5, "sata0", "prsnt", V_5182)),
> + MPP_MODE(5,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x2, "pci", "gnt4", V_ALL),
> + MPP_VAR_FUNCTION(0x4, "bootnand", "we", V_5182 | V_5281),
> + MPP_VAR_FUNCTION(0x5, "sata1", "prsnt", V_5182)),
> + MPP_MODE(6,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x2, "pci", "req5", V_ALL),
> + MPP_VAR_FUNCTION(0x4, "nand", "re0", V_5182 | V_5281),
> + MPP_VAR_FUNCTION(0x5, "pci-1", "clk", V_5181L),
> + MPP_VAR_FUNCTION(0x5, "sata0", "act", V_5182)),
> + MPP_MODE(7,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x2, "pci", "gnt5", V_ALL),
> + MPP_VAR_FUNCTION(0x4, "nand", "we0", V_5182 | V_5281),
> + MPP_VAR_FUNCTION(0x5, "pci-1", "clk", V_5181L),
> + MPP_VAR_FUNCTION(0x5, "sata1", "act", V_5182)),
> + MPP_MODE(8,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x1, "ge", "col", V_ALL)),
> + MPP_MODE(9,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x1, "ge", "rxerr", V_ALL)),
> + MPP_MODE(10,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x1, "ge", "crs", V_ALL)),
> + MPP_MODE(11,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x1, "ge", "txerr", V_ALL)),
> + MPP_MODE(12,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x1, "ge", "txd4", V_ALL),
> + MPP_VAR_FUNCTION(0x4, "nand", "re1", V_5182 | V_5281),
> + MPP_VAR_FUNCTION(0x5, "sata0", "ledprsnt", V_5182)),
> + MPP_MODE(13,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x1, "ge", "txd5", V_ALL),
> + MPP_VAR_FUNCTION(0x4, "nand", "we1", V_5182 | V_5281),
> + MPP_VAR_FUNCTION(0x5, "sata1", "ledprsnt", V_5182)),
> + MPP_MODE(14,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x1, "ge", "txd6", V_ALL),
> + MPP_VAR_FUNCTION(0x4, "nand", "re2", V_5182 | V_5281),
> + MPP_VAR_FUNCTION(0x5, "sata0", "ledact", V_5182)),
> + MPP_MODE(15,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL),
> + MPP_VAR_FUNCTION(0x1, "ge", "txd7", V_ALL),
> + MPP_VAR_FUNCTION(0x4, "nand", "we2", V_5182 | V_5281),
> + MPP_VAR_FUNCTION(0x5, "sata1", "ledact", V_5182)),
> + MPP_MODE(16,
> + MPP_VAR_FUNCTION(0x0, "uart1", "rxd", V_5182 | V_5281),
> + MPP_VAR_FUNCTION(0x1, "ge", "rxd4", V_ALL),
> + MPP_VAR_FUNCTION(0x5, "gpio", NULL, V_5182)),
> + MPP_MODE(17,
> + MPP_VAR_FUNCTION(0x0, "uart1", "txd", V_5182 | V_5281),
> + MPP_VAR_FUNCTION(0x1, "ge", "rxd5", V_ALL),
> + MPP_VAR_FUNCTION(0x5, "gpio", NULL, V_5182)),
> + MPP_MODE(18,
> + MPP_VAR_FUNCTION(0x0, "uart1", "cts", V_5182 | V_5281),
> + MPP_VAR_FUNCTION(0x1, "ge", "rxd6", V_ALL),
> + MPP_VAR_FUNCTION(0x5, "gpio", NULL, V_5182)),
> + MPP_MODE(19,
> + MPP_VAR_FUNCTION(0x0, "uart1", "rts", V_5182 | V_5281),
> + MPP_VAR_FUNCTION(0x1, "ge", "rxd7", V_ALL),
> + MPP_VAR_FUNCTION(0x5, "gpio", NULL, V_5182)),
> +};
> +
> +static struct mvebu_mpp_ctrl orion_mpp_controls[] = {
> + MPP_FUNC_CTRL(0, 19, NULL, orion_mpp_ctrl),
> +};
> +
> +static struct pinctrl_gpio_range mv88f5181l_gpio_ranges[] = {
> + MPP_GPIO_RANGE(0, 0, 0, 16),
> +};
> +
> +static struct pinctrl_gpio_range mv88f5182_gpio_ranges[] = {
> + MPP_GPIO_RANGE(0, 0, 0, 19),
> +};
> +
> +static struct pinctrl_gpio_range mv88f5281_gpio_ranges[] = {
> + MPP_GPIO_RANGE(0, 0, 0, 16),
> +};
> +
> +static struct mvebu_pinctrl_soc_info mv88f5181l_info = {
> + .variant = V_5181L,
> + .controls = orion_mpp_controls,
> + .ncontrols = ARRAY_SIZE(orion_mpp_controls),
> + .modes = orion_mpp_modes,
> + .nmodes = ARRAY_SIZE(orion_mpp_modes),
> + .gpioranges = mv88f5181l_gpio_ranges,
> + .ngpioranges = ARRAY_SIZE(mv88f5181l_gpio_ranges),
> +};
> +
> +static struct mvebu_pinctrl_soc_info mv88f5182_info = {
> + .variant = V_5182,
> + .controls = orion_mpp_controls,
> + .ncontrols = ARRAY_SIZE(orion_mpp_controls),
> + .modes = orion_mpp_modes,
> + .nmodes = ARRAY_SIZE(orion_mpp_modes),
> + .gpioranges = mv88f5182_gpio_ranges,
> + .ngpioranges = ARRAY_SIZE(mv88f5182_gpio_ranges),
> +};
> +
> +static struct mvebu_pinctrl_soc_info mv88f5281_info = {
> + .variant = V_5281,
> + .controls = orion_mpp_controls,
> + .ncontrols = ARRAY_SIZE(orion_mpp_controls),
> + .modes = orion_mpp_modes,
> + .nmodes = ARRAY_SIZE(orion_mpp_modes),
> + .gpioranges = mv88f5281_gpio_ranges,
> + .ngpioranges = ARRAY_SIZE(mv88f5281_gpio_ranges),
> +};
> +
> +/*
> + * There are multiple variants of the Orion SoCs, but in terms of pin
> + * muxing, they are identical.
> + */
> +static struct of_device_id orion_pinctrl_of_match[] = {
> + { .compatible = "marvell,88f5181l-pinctrl", .data = &mv88f5181l_info },
> + { .compatible = "marvell,88f5182-pinctrl", .data = &mv88f5182_info },
> + { .compatible = "marvell,88f5281-pinctrl", .data = &mv88f5281_info },
> + { }
> +};
> +
> +static int orion_pinctrl_probe(struct platform_device *pdev)
> +{
> + const struct of_device_id *match =
> + of_match_device(orion_pinctrl_of_match, &pdev->dev);
> + struct resource *res;
> +
> + pdev->dev.platform_data = (void*)match->data;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + mpp_base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(mpp_base))
> + return PTR_ERR(mpp_base);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> + high_mpp_base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(high_mpp_base))
> + return PTR_ERR(high_mpp_base);
> +
> + return mvebu_pinctrl_probe(pdev);
> +}
> +
> +static int orion_pinctrl_remove(struct platform_device *pdev)
> +{
> + return mvebu_pinctrl_remove(pdev);
> +}
> +
> +static struct platform_driver orion_pinctrl_driver = {
> + .driver = {
> + .name = "orion-pinctrl",
> + .owner = THIS_MODULE,
> + .of_match_table = of_match_ptr(orion_pinctrl_of_match),
> + },
> + .probe = orion_pinctrl_probe,
> + .remove = orion_pinctrl_remove,
> +};
> +
> +module_platform_driver(orion_pinctrl_driver);
> +
> +MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
> +MODULE_DESCRIPTION("Marvell Orion pinctrl driver");
> +MODULE_LICENSE("GPL v2");
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 04/38] clk: mvebu: add Orion5x clock driver
2014-04-22 21:26 ` [PATCH v2 04/38] clk: mvebu: add Orion5x clock driver Thomas Petazzoni
@ 2014-04-23 11:16 ` Sebastian Hesselbarth
2014-04-26 1:11 ` Jason Cooper
1 sibling, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:16 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> This commit adds a core clock driver for the Orion5x SoC, with support
> for the tclk, the CPU frequency and the DDR frequency. All the details
> about the Sample-At-Reset register were extracted from the U-Boot
> sources for Orion5x.
>
> Note that Orion5x does not have gatable clocks, so this core clock
> driver is sufficient to support clocking on Orion5x platforms.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Mike Turquette <mturquette@linaro.org>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> .../devicetree/bindings/clock/mvebu-core-clock.txt | 8 +
> drivers/clk/mvebu/Kconfig | 4 +
> drivers/clk/mvebu/Makefile | 1 +
> drivers/clk/mvebu/orion.c | 210 +++++++++++++++++++++
> 4 files changed, 223 insertions(+)
> create mode 100644 drivers/clk/mvebu/orion.c
>
> diff --git a/Documentation/devicetree/bindings/clock/mvebu-core-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-core-clock.txt
> index 307a503..dc5ea5b 100644
> --- a/Documentation/devicetree/bindings/clock/mvebu-core-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/mvebu-core-clock.txt
> @@ -29,6 +29,11 @@ The following is a list of provided IDs and clock names on Kirkwood and Dove:
> 2 = l2clk (L2 Cache clock derived from CPU0 clock)
> 3 = ddrclk (DDR controller clock derived from CPU0 clock)
>
> +The following is a list of provided IDs and clock names on Orion5x:
> + 0 = tclk (Internal Bus clock)
> + 1 = cpuclk (CPU0 clock)
> + 2 = ddrclk (DDR controller clock derived from CPU0 clock)
> +
> Required properties:
> - compatible : shall be one of the following:
> "marvell,armada-370-core-clock" - For Armada 370 SoC core clocks
> @@ -38,6 +43,9 @@ Required properties:
> "marvell,dove-core-clock" - for Dove SoC core clocks
> "marvell,kirkwood-core-clock" - for Kirkwood SoC (except mv88f6180)
> "marvell,mv88f6180-core-clock" - for Kirkwood MV88f6180 SoC
> + "marvell,mv88f5182-core-clock" - for Orion MV88F5182 SoC
> + "marvell,mv88f5281-core-clock" - for Orion MV88F5281 SoC
> + "marvell,mv88f6183-core-clock" - for Orion MV88F6183 SoC
> - reg : shall be the register address of the Sample-At-Reset (SAR) register
> - #clock-cells : from common clock binding; shall be set to 1
>
> diff --git a/drivers/clk/mvebu/Kconfig b/drivers/clk/mvebu/Kconfig
> index 693f7be..3b34dba 100644
> --- a/drivers/clk/mvebu/Kconfig
> +++ b/drivers/clk/mvebu/Kconfig
> @@ -34,3 +34,7 @@ config DOVE_CLK
> config KIRKWOOD_CLK
> bool
> select MVEBU_CLK_COMMON
> +
> +config ORION_CLK
> + bool
> + select MVEBU_CLK_COMMON
> diff --git a/drivers/clk/mvebu/Makefile b/drivers/clk/mvebu/Makefile
> index 4c66162..a9a56fc 100644
> --- a/drivers/clk/mvebu/Makefile
> +++ b/drivers/clk/mvebu/Makefile
> @@ -8,3 +8,4 @@ obj-$(CONFIG_ARMADA_38X_CLK) += armada-38x.o
> obj-$(CONFIG_ARMADA_XP_CLK) += armada-xp.o
> obj-$(CONFIG_DOVE_CLK) += dove.o
> obj-$(CONFIG_KIRKWOOD_CLK) += kirkwood.o
> +obj-$(CONFIG_ORION_CLK) += orion.o
> diff --git a/drivers/clk/mvebu/orion.c b/drivers/clk/mvebu/orion.c
> new file mode 100644
> index 0000000..fd12956
> --- /dev/null
> +++ b/drivers/clk/mvebu/orion.c
> @@ -0,0 +1,210 @@
> +/*
> + * Marvell Orion SoC clocks
> + *
> + * Copyright (C) 2014 Thomas Petazzoni
> + *
> + * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/clk-provider.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include "common.h"
> +
> +static const struct coreclk_ratio orion_coreclk_ratios[] __initconst = {
> + { .id = 0, .name = "ddrclk", }
> +};
> +
> +/*
> + * Orion 5182
> + */
> +
> +#define SAR_MV88F5182_TCLK_FREQ 8
> +#define SAR_MV88F5182_TCLK_FREQ_MASK 0x3
> +
> +static u32 __init mv88f5182_get_tclk_freq(void __iomem *sar)
> +{
> + u32 opt = (readl(sar) >> SAR_MV88F5182_TCLK_FREQ) &
> + SAR_MV88F5182_TCLK_FREQ_MASK;
> + if (opt == 1)
> + return 150000000;
> + else if (opt == 2)
> + return 166666667;
> + else
> + return 0;
> +}
> +
> +#define SAR_MV88F5182_CPU_FREQ 4
> +#define SAR_MV88F5182_CPU_FREQ_MASK 0xf
> +
> +static u32 __init mv88f5182_get_cpu_freq(void __iomem *sar)
> +{
> + u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) &
> + SAR_MV88F5182_CPU_FREQ_MASK;
> + if (opt == 0)
> + return 333333333;
> + else if (opt == 1 || opt == 2)
> + return 400000000;
> + else if (opt == 3)
> + return 500000000;
> + else
> + return 0;
> +}
> +
> +static void __init mv88f5182_get_clk_ratio(void __iomem *sar, int id,
> + int *mult, int *div)
> +{
> + u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) &
> + SAR_MV88F5182_CPU_FREQ_MASK;
> + if (opt == 0 || opt == 1) {
> + *mult = 1;
> + *div = 2;
> + } else if (opt == 2 || opt == 3) {
> + *mult = 1;
> + *div = 3;
> + } else {
> + *mult = 0;
> + *div = 1;
> + }
> +}
> +
> +static const struct coreclk_soc_desc mv88f5182_coreclks = {
> + .get_tclk_freq = mv88f5182_get_tclk_freq,
> + .get_cpu_freq = mv88f5182_get_cpu_freq,
> + .get_clk_ratio = mv88f5182_get_clk_ratio,
> + .ratios = orion_coreclk_ratios,
> + .num_ratios = ARRAY_SIZE(orion_coreclk_ratios),
> +};
> +
> +static void __init mv88f5182_clk_init(struct device_node *np)
> +{
> + return mvebu_coreclk_setup(np, &mv88f5182_coreclks);
> +}
> +
> +CLK_OF_DECLARE(mv88f5182_clk, "marvell,mv88f5182-core-clock", mv88f5182_clk_init);
> +
> +/*
> + * Orion 5281
> + */
> +
> +static u32 __init mv88f5281_get_tclk_freq(void __iomem *sar)
> +{
> + /* On 5281, tclk is always 166 Mhz */
> + return 166666667;
> +}
> +
> +#define SAR_MV88F5281_CPU_FREQ 4
> +#define SAR_MV88F5281_CPU_FREQ_MASK 0xf
> +
> +static u32 __init mv88f5281_get_cpu_freq(void __iomem *sar)
> +{
> + u32 opt = (readl(sar) >> SAR_MV88F5281_CPU_FREQ) &
> + SAR_MV88F5281_CPU_FREQ_MASK;
> + if (opt == 1 || opt == 2)
> + return 400000000;
> + else if (opt == 3)
> + return 500000000;
> + else
> + return 0;
> +}
> +
> +static void __init mv88f5281_get_clk_ratio(void __iomem *sar, int id,
> + int *mult, int *div)
> +{
> + u32 opt = (readl(sar) >> SAR_MV88F5281_CPU_FREQ) &
> + SAR_MV88F5281_CPU_FREQ_MASK;
> + if (opt == 1) {
> + *mult = 1;
> + *div = 2;
> + } else if (opt == 2 || opt == 3) {
> + *mult = 1;
> + *div = 3;
> + } else {
> + *mult = 0;
> + *div = 1;
> + }
> +}
> +
> +static const struct coreclk_soc_desc mv88f5281_coreclks = {
> + .get_tclk_freq = mv88f5281_get_tclk_freq,
> + .get_cpu_freq = mv88f5281_get_cpu_freq,
> + .get_clk_ratio = mv88f5281_get_clk_ratio,
> + .ratios = orion_coreclk_ratios,
> + .num_ratios = ARRAY_SIZE(orion_coreclk_ratios),
> +};
> +
> +static void __init mv88f5281_clk_init(struct device_node *np)
> +{
> + return mvebu_coreclk_setup(np, &mv88f5281_coreclks);
> +}
> +
> +CLK_OF_DECLARE(mv88f5281_clk, "marvell,mv88f5281-core-clock", mv88f5281_clk_init);
> +
> +/*
> + * Orion 6183
> + */
> +
> +#define SAR_MV88F6183_TCLK_FREQ 9
> +#define SAR_MV88F6183_TCLK_FREQ_MASK 0x1
> +
> +static u32 __init mv88f6183_get_tclk_freq(void __iomem *sar)
> +{
> + u32 opt = (readl(sar) >> SAR_MV88F6183_TCLK_FREQ) &
> + SAR_MV88F6183_TCLK_FREQ_MASK;
> + if (opt == 0)
> + return 133333333;
> + else if (opt == 1)
> + return 166666667;
> + else
> + return 0;
> +}
> +
> +#define SAR_MV88F6183_CPU_FREQ 1
> +#define SAR_MV88F6183_CPU_FREQ_MASK 0x3f
> +
> +static u32 __init mv88f6183_get_cpu_freq(void __iomem *sar)
> +{
> + u32 opt = (readl(sar) >> SAR_MV88F6183_CPU_FREQ) &
> + SAR_MV88F6183_CPU_FREQ_MASK;
> + if (opt == 9)
> + return 333333333;
> + else if (opt == 17)
> + return 400000000;
> + else
> + return 0;
> +}
> +
> +static void __init mv88f6183_get_clk_ratio(void __iomem *sar, int id,
> + int *mult, int *div)
> +{
> + u32 opt = (readl(sar) >> SAR_MV88F6183_CPU_FREQ) &
> + SAR_MV88F6183_CPU_FREQ_MASK;
> + if (opt == 9 || opt == 17) {
> + *mult = 1;
> + *div = 2;
> + } else {
> + *mult = 0;
> + *div = 1;
> + }
> +}
> +
> +static const struct coreclk_soc_desc mv88f6183_coreclks = {
> + .get_tclk_freq = mv88f6183_get_tclk_freq,
> + .get_cpu_freq = mv88f6183_get_cpu_freq,
> + .get_clk_ratio = mv88f6183_get_clk_ratio,
> + .ratios = orion_coreclk_ratios,
> + .num_ratios = ARRAY_SIZE(orion_coreclk_ratios),
> +};
> +
> +
> +static void __init mv88f6183_clk_init(struct device_node *np)
> +{
> + return mvebu_coreclk_setup(np, &mv88f6183_coreclks);
> +}
> +
> +CLK_OF_DECLARE(mv88f6183_clk, "marvell,mv88f6183-core-clock", mv88f6183_clk_init);
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 05/38] memory: mvebu-devbus: use ARMADA_ prefix in defines
2014-04-22 21:26 ` [PATCH v2 05/38] memory: mvebu-devbus: use ARMADA_ prefix in defines Thomas Petazzoni
@ 2014-04-23 11:17 ` Sebastian Hesselbarth
2014-04-26 14:21 ` Jason Cooper
1 sibling, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:17 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> The mvebu-devbus driver currently only supports the Armada 370/XP
> family, but it can also cover the Orion5x family. However, the Orion5x
> family has a different organization of the register. Therefore, in
> preparation to the introduction of Orion5x support, we rename the
> Armada 370/XP specific definitions to have an ARMADA_ prefix.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> drivers/memory/mvebu-devbus.c | 48 +++++++++++++++++++++----------------------
> 1 file changed, 24 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/memory/mvebu-devbus.c b/drivers/memory/mvebu-devbus.c
> index b59a17f..e66de7f 100644
> --- a/drivers/memory/mvebu-devbus.c
> +++ b/drivers/memory/mvebu-devbus.c
> @@ -30,19 +30,19 @@
> #include <linux/platform_device.h>
>
> /* Register definitions */
> -#define DEV_WIDTH_BIT 30
> -#define BADR_SKEW_BIT 28
> -#define RD_HOLD_BIT 23
> -#define ACC_NEXT_BIT 17
> -#define RD_SETUP_BIT 12
> -#define ACC_FIRST_BIT 6
> +#define ARMADA_DEV_WIDTH_BIT 30
> +#define ARMADA_BADR_SKEW_BIT 28
> +#define ARMADA_RD_HOLD_BIT 23
> +#define ARMADA_ACC_NEXT_BIT 17
> +#define ARMADA_RD_SETUP_BIT 12
> +#define ARMADA_ACC_FIRST_BIT 6
>
> -#define SYNC_ENABLE_BIT 24
> -#define WR_HIGH_BIT 16
> -#define WR_LOW_BIT 8
> +#define ARMADA_SYNC_ENABLE_BIT 24
> +#define ARMADA_WR_HIGH_BIT 16
> +#define ARMADA_WR_LOW_BIT 8
>
> -#define READ_PARAM_OFFSET 0x0
> -#define WRITE_PARAM_OFFSET 0x4
> +#define ARMADA_READ_PARAM_OFFSET 0x0
> +#define ARMADA_WRITE_PARAM_OFFSET 0x4
>
> struct devbus_read_params {
> u32 bus_width;
> @@ -178,31 +178,31 @@ static int devbus_set_timing_params(struct devbus *devbus,
> return err;
>
> /* Set read timings */
> - value = r.bus_width << DEV_WIDTH_BIT |
> - r.badr_skew << BADR_SKEW_BIT |
> - r.rd_hold << RD_HOLD_BIT |
> - r.acc_next << ACC_NEXT_BIT |
> - r.rd_setup << RD_SETUP_BIT |
> - r.acc_first << ACC_FIRST_BIT |
> + value = r.bus_width << ARMADA_DEV_WIDTH_BIT |
> + r.badr_skew << ARMADA_BADR_SKEW_BIT |
> + r.rd_hold << ARMADA_RD_HOLD_BIT |
> + r.acc_next << ARMADA_ACC_NEXT_BIT |
> + r.rd_setup << ARMADA_RD_SETUP_BIT |
> + r.acc_first << ARMADA_ACC_FIRST_BIT |
> r.turn_off;
>
> dev_dbg(devbus->dev, "read parameters register 0x%p = 0x%x\n",
> - devbus->base + READ_PARAM_OFFSET,
> + devbus->base + ARMADA_READ_PARAM_OFFSET,
> value);
>
> - writel(value, devbus->base + READ_PARAM_OFFSET);
> + writel(value, devbus->base + ARMADA_READ_PARAM_OFFSET);
>
> /* Set write timings */
> - value = w.sync_enable << SYNC_ENABLE_BIT |
> - w.wr_low << WR_LOW_BIT |
> - w.wr_high << WR_HIGH_BIT |
> + value = w.sync_enable << ARMADA_SYNC_ENABLE_BIT |
> + w.wr_low << ARMADA_WR_LOW_BIT |
> + w.wr_high << ARMADA_WR_HIGH_BIT |
> w.ale_wr;
>
> dev_dbg(devbus->dev, "write parameters register: 0x%p = 0x%x\n",
> - devbus->base + WRITE_PARAM_OFFSET,
> + devbus->base + ARMADA_WRITE_PARAM_OFFSET,
> value);
>
> - writel(value, devbus->base + WRITE_PARAM_OFFSET);
> + writel(value, devbus->base + ARMADA_WRITE_PARAM_OFFSET);
>
> return 0;
> }
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 06/38] memory: mvebu-devbus: use _SHIFT suffixes instead of _BIT
2014-04-22 21:26 ` [PATCH v2 06/38] memory: mvebu-devbus: use _SHIFT suffixes instead of _BIT Thomas Petazzoni
@ 2014-04-23 11:17 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:17 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> As noted by Sebastian Hesselbarth, the definitions in mvebu-devbus.c
> are not bit definition, but rather shift values, so a _SHIFT prefix
> would make more sense. This commit therefore replaces the *_BIT
> definitions by *_SHIFT definitions.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> drivers/memory/mvebu-devbus.c | 36 ++++++++++++++++++------------------
> 1 file changed, 18 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/memory/mvebu-devbus.c b/drivers/memory/mvebu-devbus.c
> index e66de7f..0f196b3 100644
> --- a/drivers/memory/mvebu-devbus.c
> +++ b/drivers/memory/mvebu-devbus.c
> @@ -30,16 +30,16 @@
> #include <linux/platform_device.h>
>
> /* Register definitions */
> -#define ARMADA_DEV_WIDTH_BIT 30
> -#define ARMADA_BADR_SKEW_BIT 28
> -#define ARMADA_RD_HOLD_BIT 23
> -#define ARMADA_ACC_NEXT_BIT 17
> -#define ARMADA_RD_SETUP_BIT 12
> -#define ARMADA_ACC_FIRST_BIT 6
> +#define ARMADA_DEV_WIDTH_SHIFT 30
> +#define ARMADA_BADR_SKEW_SHIFT 28
> +#define ARMADA_RD_HOLD_SHIFT 23
> +#define ARMADA_ACC_NEXT_SHIFT 17
> +#define ARMADA_RD_SETUP_SHIFT 12
> +#define ARMADA_ACC_FIRST_SHIFT 6
>
> -#define ARMADA_SYNC_ENABLE_BIT 24
> -#define ARMADA_WR_HIGH_BIT 16
> -#define ARMADA_WR_LOW_BIT 8
> +#define ARMADA_SYNC_ENABLE_SHIFT 24
> +#define ARMADA_WR_HIGH_SHIFT 16
> +#define ARMADA_WR_LOW_SHIFT 8
>
> #define ARMADA_READ_PARAM_OFFSET 0x0
> #define ARMADA_WRITE_PARAM_OFFSET 0x4
> @@ -178,12 +178,12 @@ static int devbus_set_timing_params(struct devbus *devbus,
> return err;
>
> /* Set read timings */
> - value = r.bus_width << ARMADA_DEV_WIDTH_BIT |
> - r.badr_skew << ARMADA_BADR_SKEW_BIT |
> - r.rd_hold << ARMADA_RD_HOLD_BIT |
> - r.acc_next << ARMADA_ACC_NEXT_BIT |
> - r.rd_setup << ARMADA_RD_SETUP_BIT |
> - r.acc_first << ARMADA_ACC_FIRST_BIT |
> + value = r.bus_width << ARMADA_DEV_WIDTH_SHIFT |
> + r.badr_skew << ARMADA_BADR_SKEW_SHIFT |
> + r.rd_hold << ARMADA_RD_HOLD_SHIFT |
> + r.acc_next << ARMADA_ACC_NEXT_SHIFT |
> + r.rd_setup << ARMADA_RD_SETUP_SHIFT |
> + r.acc_first << ARMADA_ACC_FIRST_SHIFT |
> r.turn_off;
>
> dev_dbg(devbus->dev, "read parameters register 0x%p = 0x%x\n",
> @@ -193,9 +193,9 @@ static int devbus_set_timing_params(struct devbus *devbus,
> writel(value, devbus->base + ARMADA_READ_PARAM_OFFSET);
>
> /* Set write timings */
> - value = w.sync_enable << ARMADA_SYNC_ENABLE_BIT |
> - w.wr_low << ARMADA_WR_LOW_BIT |
> - w.wr_high << ARMADA_WR_HIGH_BIT |
> + value = w.sync_enable << ARMADA_SYNC_ENABLE_SHIFT |
> + w.wr_low << ARMADA_WR_LOW_SHIFT |
> + w.wr_high << ARMADA_WR_HIGH_SHIFT |
> w.ale_wr;
>
> dev_dbg(devbus->dev, "write parameters register: 0x%p = 0x%x\n",
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 07/38] memory: mvebu-devbus: split functions
2014-04-22 21:26 ` [PATCH v2 07/38] memory: mvebu-devbus: split functions Thomas Petazzoni
@ 2014-04-23 11:18 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:18 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> The mvebu-devbus driver currently only supports the Armada 370/XP
> family, but it can also cover the Orion5x family. However, the Orion5x
> family has a different organization of the registers.
>
> Therefore, in preparation to the introduction of Orion5x support, we
> separate into two functions the code that 1/ retrieves the timing
> parameters from the Device Tree and 2/ applies those timings
> parameters into the hardware registers.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> drivers/memory/mvebu-devbus.c | 90 ++++++++++++++++++++++++-------------------
> 1 file changed, 51 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/memory/mvebu-devbus.c b/drivers/memory/mvebu-devbus.c
> index 0f196b3..5dc9c63 100644
> --- a/drivers/memory/mvebu-devbus.c
> +++ b/drivers/memory/mvebu-devbus.c
> @@ -89,19 +89,15 @@ static int get_timing_param_ps(struct devbus *devbus,
> return 0;
> }
>
> -static int devbus_set_timing_params(struct devbus *devbus,
> - struct device_node *node)
> +static int devbus_get_timing_params(struct devbus *devbus,
> + struct device_node *node,
> + struct devbus_read_params *r,
> + struct devbus_write_params *w)
> {
> - struct devbus_read_params r;
> - struct devbus_write_params w;
> - u32 value;
> int err;
>
> - dev_dbg(devbus->dev, "Setting timing parameter, tick is %lu ps\n",
> - devbus->tick_ps);
> -
> /* Get read timings */
> - err = of_property_read_u32(node, "devbus,bus-width", &r.bus_width);
> + err = of_property_read_u32(node, "devbus,bus-width", &r->bus_width);
> if (err < 0) {
> dev_err(devbus->dev,
> "%s has no 'devbus,bus-width' property\n",
> @@ -113,48 +109,48 @@ static int devbus_set_timing_params(struct devbus *devbus,
> * The bus width is encoded into the register as 0 for 8 bits,
> * and 1 for 16 bits, so we do the necessary conversion here.
> */
> - if (r.bus_width == 8)
> - r.bus_width = 0;
> - else if (r.bus_width == 16)
> - r.bus_width = 1;
> + if (r->bus_width == 8)
> + r->bus_width = 0;
> + else if (r->bus_width == 16)
> + r->bus_width = 1;
> else {
> - dev_err(devbus->dev, "invalid bus width %d\n", r.bus_width);
> + dev_err(devbus->dev, "invalid bus width %d\n", r->bus_width);
> return -EINVAL;
> }
>
> err = get_timing_param_ps(devbus, node, "devbus,badr-skew-ps",
> - &r.badr_skew);
> + &r->badr_skew);
> if (err < 0)
> return err;
>
> err = get_timing_param_ps(devbus, node, "devbus,turn-off-ps",
> - &r.turn_off);
> + &r->turn_off);
> if (err < 0)
> return err;
>
> err = get_timing_param_ps(devbus, node, "devbus,acc-first-ps",
> - &r.acc_first);
> + &r->acc_first);
> if (err < 0)
> return err;
>
> err = get_timing_param_ps(devbus, node, "devbus,acc-next-ps",
> - &r.acc_next);
> + &r->acc_next);
> if (err < 0)
> return err;
>
> err = get_timing_param_ps(devbus, node, "devbus,rd-setup-ps",
> - &r.rd_setup);
> + &r->rd_setup);
> if (err < 0)
> return err;
>
> err = get_timing_param_ps(devbus, node, "devbus,rd-hold-ps",
> - &r.rd_hold);
> + &r->rd_hold);
> if (err < 0)
> return err;
>
> /* Get write timings */
> err = of_property_read_u32(node, "devbus,sync-enable",
> - &w.sync_enable);
> + &w->sync_enable);
> if (err < 0) {
> dev_err(devbus->dev,
> "%s has no 'devbus,sync-enable' property\n",
> @@ -163,28 +159,38 @@ static int devbus_set_timing_params(struct devbus *devbus,
> }
>
> err = get_timing_param_ps(devbus, node, "devbus,ale-wr-ps",
> - &w.ale_wr);
> + &w->ale_wr);
> if (err < 0)
> return err;
>
> err = get_timing_param_ps(devbus, node, "devbus,wr-low-ps",
> - &w.wr_low);
> + &w->wr_low);
> if (err < 0)
> return err;
>
> err = get_timing_param_ps(devbus, node, "devbus,wr-high-ps",
> - &w.wr_high);
> + &w->wr_high);
> if (err < 0)
> return err;
>
> + return 0;
> +}
> +
> +static void devbus_armada_set_timing_params(struct devbus *devbus,
> + struct device_node *node,
> + struct devbus_read_params *r,
> + struct devbus_write_params *w)
> +{
> + u32 value;
> +
> /* Set read timings */
> - value = r.bus_width << ARMADA_DEV_WIDTH_SHIFT |
> - r.badr_skew << ARMADA_BADR_SKEW_SHIFT |
> - r.rd_hold << ARMADA_RD_HOLD_SHIFT |
> - r.acc_next << ARMADA_ACC_NEXT_SHIFT |
> - r.rd_setup << ARMADA_RD_SETUP_SHIFT |
> - r.acc_first << ARMADA_ACC_FIRST_SHIFT |
> - r.turn_off;
> + value = r->bus_width << ARMADA_DEV_WIDTH_SHIFT |
> + r->badr_skew << ARMADA_BADR_SKEW_SHIFT |
> + r->rd_hold << ARMADA_RD_HOLD_SHIFT |
> + r->acc_next << ARMADA_ACC_NEXT_SHIFT |
> + r->rd_setup << ARMADA_RD_SETUP_SHIFT |
> + r->acc_first << ARMADA_ACC_FIRST_SHIFT |
> + r->turn_off;
>
> dev_dbg(devbus->dev, "read parameters register 0x%p = 0x%x\n",
> devbus->base + ARMADA_READ_PARAM_OFFSET,
> @@ -193,24 +199,24 @@ static int devbus_set_timing_params(struct devbus *devbus,
> writel(value, devbus->base + ARMADA_READ_PARAM_OFFSET);
>
> /* Set write timings */
> - value = w.sync_enable << ARMADA_SYNC_ENABLE_SHIFT |
> - w.wr_low << ARMADA_WR_LOW_SHIFT |
> - w.wr_high << ARMADA_WR_HIGH_SHIFT |
> - w.ale_wr;
> + value = w->sync_enable << ARMADA_SYNC_ENABLE_SHIFT |
> + w->wr_low << ARMADA_WR_LOW_SHIFT |
> + w->wr_high << ARMADA_WR_HIGH_SHIFT |
> + w->ale_wr;
>
> dev_dbg(devbus->dev, "write parameters register: 0x%p = 0x%x\n",
> devbus->base + ARMADA_WRITE_PARAM_OFFSET,
> value);
>
> writel(value, devbus->base + ARMADA_WRITE_PARAM_OFFSET);
> -
> - return 0;
> }
>
> static int mvebu_devbus_probe(struct platform_device *pdev)
> {
> struct device *dev = &pdev->dev;
> struct device_node *node = pdev->dev.of_node;
> + struct devbus_read_params r;
> + struct devbus_write_params w;
> struct devbus *devbus;
> struct resource *res;
> struct clk *clk;
> @@ -240,11 +246,17 @@ static int mvebu_devbus_probe(struct platform_device *pdev)
> rate = clk_get_rate(clk) / 1000;
> devbus->tick_ps = 1000000000 / rate;
>
> - /* Read the device tree node and set the new timing parameters */
> - err = devbus_set_timing_params(devbus, node);
> + dev_dbg(devbus->dev, "Setting timing parameter, tick is %lu ps\n",
> + devbus->tick_ps);
> +
> + /* Read the Device Tree node */
> + err = devbus_get_timing_params(devbus, node, &r, &w);
> if (err < 0)
> return err;
>
> + /* Set the new timing parameters */
> + devbus_armada_set_timing_params(devbus, node, &r, &w);
> +
> /*
> * We need to create a child device explicitly from here to
> * guarantee that the child will be probed after the timing
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 08/38] memory: mvebu-devbus: add Orion5x support
2014-04-22 21:26 ` [PATCH v2 08/38] memory: mvebu-devbus: add Orion5x support Thomas Petazzoni
@ 2014-04-23 11:18 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:18 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> This commit adds support for the Orion5x family of Marvell processors
> into the mvebu-devbus driver. It differs from the already supported
> Armada 370/XP by:
>
> * Having a single register (instead of two) for doing all the timing
> configuration.
>
> * Having a few less timing configuration parameters.
>
> For this reason, a separate compatible string "marvell,orion-devbus"
> is introduced.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> .../bindings/memory-controllers/mvebu-devbus.txt | 25 ++++-
> drivers/memory/mvebu-devbus.c | 107 +++++++++++++++++----
> 2 files changed, 106 insertions(+), 26 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt b/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt
> index 653c90c..55adde2 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt
> +++ b/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt
> @@ -6,10 +6,11 @@ The actual devices are instantiated from the child nodes of a Device Bus node.
>
> Required properties:
>
> - - compatible: Currently only Armada 370/XP SoC are supported,
> - with this compatible string:
> + - compatible: Armada 370/XP SoC are supported using the
> + "marvell,mvebu-devbus" compatible string.
>
> - marvell,mvebu-devbus
> + Orion5x SoC are supported using the
> + "marvell,orion-devbus" compatible string.
>
> - reg: A resource specifier for the register space.
> This is the base address of a chip select within
> @@ -22,7 +23,7 @@ Required properties:
> integer values for each chip-select line in use:
> 0 <physical address of mapping> <size>
>
> -Mandatory timing properties for child nodes:
> +Timing properties for child nodes:
>
> Read parameters:
>
> @@ -30,21 +31,26 @@ Read parameters:
> drive the AD bus after the completion of a device read.
> This prevents contentions on the Device Bus after a read
> cycle from a slow device.
> + Mandatory.
>
> - - devbus,bus-width: Defines the bus width (e.g. <16>)
> + - devbus,bus-width: Defines the bus width, in bits (e.g. <16>).
> + Mandatory.
>
> - devbus,badr-skew-ps: Defines the time delay from from A[2:0] toggle,
> to read data sample. This parameter is useful for
> synchronous pipelined devices, where the address
> precedes the read data by one or two cycles.
> + Mandatory.
>
> - devbus,acc-first-ps: Defines the time delay from the negation of
> ALE[0] to the cycle that the first read data is sampled
> by the controller.
> + Mandatory.
>
> - devbus,acc-next-ps: Defines the time delay between the cycle that
> samples data N and the cycle that samples data N+1
> (in burst accesses).
> + Mandatory.
>
> - devbus,rd-setup-ps: Defines the time delay between DEV_CSn assertion to
> DEV_OEn assertion. If set to 0 (default),
> @@ -52,6 +58,8 @@ Read parameters:
> This parameter has no affect on <acc-first-ps> parameter
> (no affect on first data sample). Set <rd-setup-ps>
> to a value smaller than <acc-first-ps>.
> + Mandatory for "marvell,mvebu-devbus"
> + compatible string, ignored otherwise.
>
> - devbus,rd-hold-ps: Defines the time between the last data sample to the
> de-assertion of DEV_CSn. If set to 0 (default),
> @@ -62,16 +70,20 @@ Read parameters:
> last data sampled. Also this parameter has no
> affect on <turn-off-ps> parameter.
> Set <rd-hold-ps> to a value smaller than <turn-off-ps>.
> + Mandatory for "marvell,mvebu-devbus"
> + compatible string, ignored otherwise.
>
> Write parameters:
>
> - devbus,ale-wr-ps: Defines the time delay from the ALE[0] negation cycle
> to the DEV_WEn assertion.
> + Mandatory.
>
> - devbus,wr-low-ps: Defines the time during which DEV_WEn is active.
> A[2:0] and Data are kept valid as long as DEV_WEn
> is active. This parameter defines the setup time of
> address and data to DEV_WEn rise.
> + Mandatory.
>
> - devbus,wr-high-ps: Defines the time during which DEV_WEn is kept
> inactive (high) between data beats of a burst write.
> @@ -79,10 +91,13 @@ Write parameters:
> <wr-high-ps> - <tick> ps.
> This parameter defines the hold time of address and
> data after DEV_WEn rise.
> + Mandatory.
>
> - devbus,sync-enable: Synchronous device enable.
> 1: True
> 0: False
> + Mandatory for "marvell,mvebu-devbus" compatible
> + string, ignored otherwise.
>
> An example for an Armada XP GP board, with a 16 MiB NOR device as child
> is showed below. Note that the Device Bus driver is in charge of allocating
> diff --git a/drivers/memory/mvebu-devbus.c b/drivers/memory/mvebu-devbus.c
> index 5dc9c63..c8f3dad 100644
> --- a/drivers/memory/mvebu-devbus.c
> +++ b/drivers/memory/mvebu-devbus.c
> @@ -2,7 +2,7 @@
> * Marvell EBU SoC Device Bus Controller
> * (memory controller for NOR/NAND/SRAM/FPGA devices)
> *
> - * Copyright (C) 2013 Marvell
> + * Copyright (C) 2013-2014 Marvell
> *
> * This program is free software: you can redistribute it and/or modify
> * it under the terms of the GNU General Public License as published by
> @@ -44,6 +44,34 @@
> #define ARMADA_READ_PARAM_OFFSET 0x0
> #define ARMADA_WRITE_PARAM_OFFSET 0x4
>
> +#define ORION_RESERVED (0x2 << 30)
> +#define ORION_BADR_SKEW_SHIFT 28
> +#define ORION_WR_HIGH_EXT_BIT BIT(27)
> +#define ORION_WR_HIGH_EXT_MASK 0x8
> +#define ORION_WR_LOW_EXT_BIT BIT(26)
> +#define ORION_WR_LOW_EXT_MASK 0x8
> +#define ORION_ALE_WR_EXT_BIT BIT(25)
> +#define ORION_ALE_WR_EXT_MASK 0x8
> +#define ORION_ACC_NEXT_EXT_BIT BIT(24)
> +#define ORION_ACC_NEXT_EXT_MASK 0x10
> +#define ORION_ACC_FIRST_EXT_BIT BIT(23)
> +#define ORION_ACC_FIRST_EXT_MASK 0x10
> +#define ORION_TURN_OFF_EXT_BIT BIT(22)
> +#define ORION_TURN_OFF_EXT_MASK 0x8
> +#define ORION_DEV_WIDTH_SHIFT 20
> +#define ORION_WR_HIGH_SHIFT 17
> +#define ORION_WR_HIGH_MASK 0x7
> +#define ORION_WR_LOW_SHIFT 14
> +#define ORION_WR_LOW_MASK 0x7
> +#define ORION_ALE_WR_SHIFT 11
> +#define ORION_ALE_WR_MASK 0x7
> +#define ORION_ACC_NEXT_SHIFT 7
> +#define ORION_ACC_NEXT_MASK 0xF
> +#define ORION_ACC_FIRST_SHIFT 3
> +#define ORION_ACC_FIRST_MASK 0xF
> +#define ORION_TURN_OFF_SHIFT 0
> +#define ORION_TURN_OFF_MASK 0x7
> +
> struct devbus_read_params {
> u32 bus_width;
> u32 badr_skew;
> @@ -96,7 +124,6 @@ static int devbus_get_timing_params(struct devbus *devbus,
> {
> int err;
>
> - /* Get read timings */
> err = of_property_read_u32(node, "devbus,bus-width", &r->bus_width);
> if (err < 0) {
> dev_err(devbus->dev,
> @@ -138,24 +165,25 @@ static int devbus_get_timing_params(struct devbus *devbus,
> if (err < 0)
> return err;
>
> - err = get_timing_param_ps(devbus, node, "devbus,rd-setup-ps",
> - &r->rd_setup);
> - if (err < 0)
> - return err;
> -
> - err = get_timing_param_ps(devbus, node, "devbus,rd-hold-ps",
> - &r->rd_hold);
> - if (err < 0)
> - return err;
> -
> - /* Get write timings */
> - err = of_property_read_u32(node, "devbus,sync-enable",
> - &w->sync_enable);
> - if (err < 0) {
> - dev_err(devbus->dev,
> - "%s has no 'devbus,sync-enable' property\n",
> - node->full_name);
> - return err;
> + if (of_device_is_compatible(devbus->dev->of_node, "marvell,mvebu-devbus")) {
> + err = get_timing_param_ps(devbus, node, "devbus,rd-setup-ps",
> + &r->rd_setup);
> + if (err < 0)
> + return err;
> +
> + err = get_timing_param_ps(devbus, node, "devbus,rd-hold-ps",
> + &r->rd_hold);
> + if (err < 0)
> + return err;
> +
> + err = of_property_read_u32(node, "devbus,sync-enable",
> + &w->sync_enable);
> + if (err < 0) {
> + dev_err(devbus->dev,
> + "%s has no 'devbus,sync-enable' property\n",
> + node->full_name);
> + return err;
> + }
> }
>
> err = get_timing_param_ps(devbus, node, "devbus,ale-wr-ps",
> @@ -176,6 +204,39 @@ static int devbus_get_timing_params(struct devbus *devbus,
> return 0;
> }
>
> +static void devbus_orion_set_timing_params(struct devbus *devbus,
> + struct device_node *node,
> + struct devbus_read_params *r,
> + struct devbus_write_params *w)
> +{
> + u32 value;
> +
> + /*
> + * The hardware designers found it would be a good idea to
> + * split most of the values in the register into two fields:
> + * one containing all the low-order bits, and another one
> + * containing just the high-order bit. For all of those
> + * fields, we have to split the value into these two parts.
> + */
> + value = (r->turn_off & ORION_TURN_OFF_MASK) << ORION_TURN_OFF_SHIFT |
> + (r->acc_first & ORION_ACC_FIRST_MASK) << ORION_ACC_FIRST_SHIFT |
> + (r->acc_next & ORION_ACC_NEXT_MASK) << ORION_ACC_NEXT_SHIFT |
> + (w->ale_wr & ORION_ALE_WR_MASK) << ORION_ALE_WR_SHIFT |
> + (w->wr_low & ORION_WR_LOW_MASK) << ORION_WR_LOW_SHIFT |
> + (w->wr_high & ORION_WR_HIGH_MASK) << ORION_WR_HIGH_SHIFT |
> + r->bus_width << ORION_DEV_WIDTH_SHIFT |
> + ((r->turn_off & ORION_TURN_OFF_EXT_MASK) ? ORION_TURN_OFF_EXT_BIT : 0) |
> + ((r->acc_first & ORION_ACC_FIRST_EXT_MASK) ? ORION_ACC_FIRST_EXT_BIT : 0) |
> + ((r->acc_next & ORION_ACC_NEXT_EXT_MASK) ? ORION_ACC_NEXT_EXT_BIT : 0) |
> + ((w->ale_wr & ORION_ALE_WR_EXT_MASK) ? ORION_ALE_WR_EXT_BIT : 0) |
> + ((w->wr_low & ORION_WR_LOW_EXT_MASK) ? ORION_WR_LOW_EXT_BIT : 0) |
> + ((w->wr_high & ORION_WR_HIGH_EXT_MASK) ? ORION_WR_HIGH_EXT_BIT : 0) |
> + (r->badr_skew << ORION_BADR_SKEW_SHIFT) |
> + ORION_RESERVED;
> +
> + writel(value, devbus->base);
> +}
> +
> static void devbus_armada_set_timing_params(struct devbus *devbus,
> struct device_node *node,
> struct devbus_read_params *r,
> @@ -255,7 +316,10 @@ static int mvebu_devbus_probe(struct platform_device *pdev)
> return err;
>
> /* Set the new timing parameters */
> - devbus_armada_set_timing_params(devbus, node, &r, &w);
> + if (of_device_is_compatible(node, "marvell,orion-devbus"))
> + devbus_orion_set_timing_params(devbus, node, &r, &w);
> + else
> + devbus_armada_set_timing_params(devbus, node, &r, &w);
>
> /*
> * We need to create a child device explicitly from here to
> @@ -271,6 +335,7 @@ static int mvebu_devbus_probe(struct platform_device *pdev)
>
> static const struct of_device_id mvebu_devbus_of_match[] = {
> { .compatible = "marvell,mvebu-devbus" },
> + { .compatible = "marvell,orion-devbus" },
> {},
> };
> MODULE_DEVICE_TABLE(of, mvebu_devbus_of_match);
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 09/38] memory: mvebu-devbus: add a devbus,keep-config property
2014-04-22 21:26 ` [PATCH v2 09/38] memory: mvebu-devbus: add a devbus, keep-config property Thomas Petazzoni
@ 2014-04-23 11:18 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:18 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> Currently, the mvebu-devbus Device Tree binding makes defining the
> timing parameters mandatory.
>
> However, in practice, when converting Orion5x platforms to the Device
> Tree, we may not necessarily have easy access to the hardware
> platforms to fetch those values which were not defined in old-style
> board files: all these platforms rely on the bootloader setting the
> timing parameters correctly.
>
> In order to facilitate the migration to the Device Tree of this
> platform, this commit relaxes the mvebu-devbus Device Tree binding by
> introducing a 'devbus,keep-config' boolean property, which, if
> defined, will ignore all timing parameters passed in the Device Tree,
> and simply rely on the timing values already defined by the
> bootloader.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> .../bindings/memory-controllers/mvebu-devbus.txt | 29 ++++++++++++++--------
> drivers/memory/mvebu-devbus.c | 20 ++++++++-------
> 2 files changed, 29 insertions(+), 20 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt b/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt
> index 55adde2..1ee3bc0 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt
> +++ b/Documentation/devicetree/bindings/memory-controllers/mvebu-devbus.txt
> @@ -23,6 +23,13 @@ Required properties:
> integer values for each chip-select line in use:
> 0 <physical address of mapping> <size>
>
> +Optional properties:
> +
> + - devbus,keep-config This property can optionally be used to keep
> + using the timing parameters set by the
> + bootloader. It makes all the timing properties
> + described below unused.
> +
> Timing properties for child nodes:
>
> Read parameters:
> @@ -31,26 +38,26 @@ Read parameters:
> drive the AD bus after the completion of a device read.
> This prevents contentions on the Device Bus after a read
> cycle from a slow device.
> - Mandatory.
> + Mandatory, except if devbus,keep-config is used.
>
> - devbus,bus-width: Defines the bus width, in bits (e.g. <16>).
> - Mandatory.
> + Mandatory, except if devbus,keep-config is used.
>
> - devbus,badr-skew-ps: Defines the time delay from from A[2:0] toggle,
> to read data sample. This parameter is useful for
> synchronous pipelined devices, where the address
> precedes the read data by one or two cycles.
> - Mandatory.
> + Mandatory, except if devbus,keep-config is used.
>
> - devbus,acc-first-ps: Defines the time delay from the negation of
> ALE[0] to the cycle that the first read data is sampled
> by the controller.
> - Mandatory.
> + Mandatory, except if devbus,keep-config is used.
>
> - devbus,acc-next-ps: Defines the time delay between the cycle that
> samples data N and the cycle that samples data N+1
> (in burst accesses).
> - Mandatory.
> + Mandatory, except if devbus,keep-config is used.
>
> - devbus,rd-setup-ps: Defines the time delay between DEV_CSn assertion to
> DEV_OEn assertion. If set to 0 (default),
> @@ -58,8 +65,8 @@ Read parameters:
> This parameter has no affect on <acc-first-ps> parameter
> (no affect on first data sample). Set <rd-setup-ps>
> to a value smaller than <acc-first-ps>.
> - Mandatory for "marvell,mvebu-devbus"
> - compatible string, ignored otherwise.
> + Mandatory for "marvell,mvebu-devbus" compatible string,
> + except if devbus,keep-config is used.
>
> - devbus,rd-hold-ps: Defines the time between the last data sample to the
> de-assertion of DEV_CSn. If set to 0 (default),
> @@ -70,8 +77,8 @@ Read parameters:
> last data sampled. Also this parameter has no
> affect on <turn-off-ps> parameter.
> Set <rd-hold-ps> to a value smaller than <turn-off-ps>.
> - Mandatory for "marvell,mvebu-devbus"
> - compatible string, ignored otherwise.
> + Mandatory for "marvell,mvebu-devbus" compatible string,
> + except if devbus,keep-config is used.
>
> Write parameters:
>
> @@ -96,8 +103,8 @@ Write parameters:
> - devbus,sync-enable: Synchronous device enable.
> 1: True
> 0: False
> - Mandatory for "marvell,mvebu-devbus" compatible
> - string, ignored otherwise.
> + Mandatory for "marvell,mvebu-devbus" compatible string,
> + except if devbus,keep-config is used.
>
> An example for an Armada XP GP board, with a 16 MiB NOR device as child
> is showed below. Note that the Device Bus driver is in charge of allocating
> diff --git a/drivers/memory/mvebu-devbus.c b/drivers/memory/mvebu-devbus.c
> index c8f3dad..ff7138f 100644
> --- a/drivers/memory/mvebu-devbus.c
> +++ b/drivers/memory/mvebu-devbus.c
> @@ -310,16 +310,18 @@ static int mvebu_devbus_probe(struct platform_device *pdev)
> dev_dbg(devbus->dev, "Setting timing parameter, tick is %lu ps\n",
> devbus->tick_ps);
>
> - /* Read the Device Tree node */
> - err = devbus_get_timing_params(devbus, node, &r, &w);
> - if (err < 0)
> - return err;
> + if (!of_property_read_bool(node, "devbus,keep-config")) {
> + /* Read the Device Tree node */
> + err = devbus_get_timing_params(devbus, node, &r, &w);
> + if (err < 0)
> + return err;
>
> - /* Set the new timing parameters */
> - if (of_device_is_compatible(node, "marvell,orion-devbus"))
> - devbus_orion_set_timing_params(devbus, node, &r, &w);
> - else
> - devbus_armada_set_timing_params(devbus, node, &r, &w);
> + /* Set the new timing parameters */
> + if (of_device_is_compatible(node, "marvell,orion-devbus"))
> + devbus_orion_set_timing_params(devbus, node, &r, &w);
> + else
> + devbus_armada_set_timing_params(devbus, node, &r, &w);
> + }
>
> /*
> * We need to create a child device explicitly from here to
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 13/38] ARM: orion5x: convert DT to use the mvebu-mbus driver
2014-04-22 21:26 ` [PATCH v2 13/38] ARM: orion5x: convert DT to use the mvebu-mbus driver Thomas Petazzoni
@ 2014-04-23 11:22 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:22 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> This commit switches the Orion5x Device Tree files to use the DT
> representation and probing for the mvebu-mbus driver. The changes are
> mainly:
>
> * Re-organize the DT to follow the same organization as the one used
> on Armada 370/XP, which is needed for mvebu-mbus to work: a
> top-level soc { ... } node, which corresponds to the MBus bus, and
> a sub-node internal-regs { ... } for all peripherals whose register
> sit only in the "Internal Register Window". This change re-indents
> by one level the definition of all nodes in the Device Tree, which
> explains the large change.
>
> * Use custom functions orion5x_dt_init_early() and
> orion5x_dt_init_time() instead of orion5x_init_early() and
> orion5x_timer_init() as we now want the MBus driver to be probed
> from the Device Tree. We still use the old-style timer
> initialization, but that will be changed in a followup commit.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> .../dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 23 +-
> arch/arm/boot/dts/orion5x-mv88f5182.dtsi | 24 ++
> arch/arm/boot/dts/orion5x.dtsi | 245 +++++++++++----------
> arch/arm/mach-orion5x/board-dt.c | 20 +-
> 4 files changed, 182 insertions(+), 130 deletions(-)
> create mode 100644 arch/arm/boot/dts/orion5x-mv88f5182.dtsi
>
> diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> index 24f1ce7..d66d2fa 100644
> --- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> +++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> @@ -10,7 +10,7 @@
>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/input/input.h>
> -#include "orion5x.dtsi"
> +#include "orion5x-mv88f5182.dtsi"
>
> / {
> model = "LaCie Ethernet Disk mini V2";
> @@ -24,15 +24,20 @@
> bootargs = "console=ttyS0,115200n8 earlyprintk";
> };
>
> - ocp at f1000000 {
> - serial at 12000 {
> - clock-frequency = <166666667>;
> - status = "okay";
> - };
> + soc {
> + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
> + <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>;
> +
> + internal-regs {
> + serial at 12000 {
> + clock-frequency = <166666667>;
> + status = "okay";
> + };
>
> - sata at 80000 {
> - status = "okay";
> - nr-ports = <2>;
> + sata at 80000 {
> + status = "okay";
> + nr-ports = <2>;
> + };
> };
> };
>
> diff --git a/arch/arm/boot/dts/orion5x-mv88f5182.dtsi b/arch/arm/boot/dts/orion5x-mv88f5182.dtsi
> new file mode 100644
> index 0000000..ddfb4d1
> --- /dev/null
> +++ b/arch/arm/boot/dts/orion5x-mv88f5182.dtsi
> @@ -0,0 +1,24 @@
> +/*
> + * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include "orion5x.dtsi"
> +
> +/ {
> + compatible = "marvell,orion5x-88f5182", "marvell,orion5x";
> +
> + soc {
> + compatible = "marvell,orion5x-88f5182-mbus", "simple-bus";
> +
> + internal-regs {
> + mbusc: mbus-controller at 20000 {
> + compatible = "marvell,mbus-controller";
> + reg = <0x20000 0x100>, <0x1500 0x20>;
> + };
> + };
> + };
> +};
> diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
> index 2364e3d..31d46e6 100644
> --- a/arch/arm/boot/dts/orion5x.dtsi
> +++ b/arch/arm/boot/dts/orion5x.dtsi
> @@ -8,6 +8,8 @@
>
> #include "skeleton.dtsi"
>
> +#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
> +
> / {
> model = "Marvell Orion5x SoC";
> compatible = "marvell,orion5x";
> @@ -17,149 +19,154 @@
> gpio0 = &gpio0;
> };
>
> - ocp at f1000000 {
> - compatible = "simple-bus";
> - ranges = <0x00000000 0xf1000000 0x4000000
> - 0xf2200000 0xf2200000 0x0000800>;
> - #address-cells = <1>;
> + soc {
> + #address-cells = <2>;
> #size-cells = <1>;
> + controller = <&mbusc>;
>
> - gpio0: gpio at 10100 {
> - compatible = "marvell,orion-gpio";
> - #gpio-cells = <2>;
> - gpio-controller;
> - reg = <0x10100 0x40>;
> - ngpios = <32>;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - interrupts = <6>, <7>, <8>, <9>;
> - };
> -
> - spi at 10600 {
> - compatible = "marvell,orion-spi";
> + internal-regs {
> + compatible = "simple-bus";
> #address-cells = <1>;
> - #size-cells = <0>;
> - cell-index = <0>;
> - reg = <0x10600 0x28>;
> - status = "disabled";
> - };
> -
> - i2c at 11000 {
> - compatible = "marvell,mv64xxx-i2c";
> - reg = <0x11000 0x20>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - interrupts = <5>;
> - clock-frequency = <100000>;
> - status = "disabled";
> - };
> + #size-cells = <1>;
> + ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
> +
> + gpio0: gpio at 10100 {
> + compatible = "marvell,orion-gpio";
> + #gpio-cells = <2>;
> + gpio-controller;
> + reg = <0x10100 0x40>;
> + ngpios = <32>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <6>, <7>, <8>, <9>;
> + };
>
> - serial at 12000 {
> - compatible = "ns16550a";
> - reg = <0x12000 0x100>;
> - reg-shift = <2>;
> - interrupts = <3>;
> - /* set clock-frequency in board dts */
> - status = "disabled";
> - };
> + spi at 10600 {
> + compatible = "marvell,orion-spi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + cell-index = <0>;
> + reg = <0x10600 0x28>;
> + status = "disabled";
> + };
>
> - serial at 12100 {
> - compatible = "ns16550a";
> - reg = <0x12100 0x100>;
> - reg-shift = <2>;
> - interrupts = <4>;
> - /* set clock-frequency in board dts */
> - status = "disabled";
> - };
> + i2c at 11000 {
> + compatible = "marvell,mv64xxx-i2c";
> + reg = <0x11000 0x20>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + interrupts = <5>;
> + clock-frequency = <100000>;
> + status = "disabled";
> + };
>
> - intc: interrupt-controller at 20200 {
> - compatible = "marvell,orion-intc";
> - interrupt-controller;
> - #interrupt-cells = <1>;
> - reg = <0x20200 0x08>;
> - };
> + serial at 12000 {
> + compatible = "ns16550a";
> + reg = <0x12000 0x100>;
> + reg-shift = <2>;
> + interrupts = <3>;
> + /* set clock-frequency in board dts */
> + status = "disabled";
> + };
>
> - wdt at 20300 {
> - compatible = "marvell,orion-wdt";
> - reg = <0x20300 0x28>;
> - status = "okay";
> - };
> + serial at 12100 {
> + compatible = "ns16550a";
> + reg = <0x12100 0x100>;
> + reg-shift = <2>;
> + interrupts = <4>;
> + /* set clock-frequency in board dts */
> + status = "disabled";
> + };
>
> - ehci at 50000 {
> - compatible = "marvell,orion-ehci";
> - reg = <0x50000 0x1000>;
> - interrupts = <17>;
> - status = "disabled";
> - };
> + intc: interrupt-controller at 20200 {
> + compatible = "marvell,orion-intc";
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + reg = <0x20200 0x08>;
> + };
>
> - xor at 60900 {
> - compatible = "marvell,orion-xor";
> - reg = <0x60900 0x100
> - 0x60b00 0x100>;
> - status = "okay";
> + wdt at 20300 {
> + compatible = "marvell,orion-wdt";
> + reg = <0x20300 0x28>;
> + status = "okay";
> + };
>
> - xor00 {
> - interrupts = <30>;
> - dmacap,memcpy;
> - dmacap,xor;
> + ehci at 50000 {
> + compatible = "marvell,orion-ehci";
> + reg = <0x50000 0x1000>;
> + interrupts = <17>;
> + status = "disabled";
> };
> - xor01 {
> - interrupts = <31>;
> - dmacap,memcpy;
> - dmacap,xor;
> - dmacap,memset;
> +
> + xor at 60900 {
> + compatible = "marvell,orion-xor";
> + reg = <0x60900 0x100
> + 0x60b00 0x100>;
> + status = "okay";
> +
> + xor00 {
> + interrupts = <30>;
> + dmacap,memcpy;
> + dmacap,xor;
> + };
> + xor01 {
> + interrupts = <31>;
> + dmacap,memcpy;
> + dmacap,xor;
> + dmacap,memset;
> + };
> };
> - };
>
> - eth: ethernet-controller at 72000 {
> - compatible = "marvell,orion-eth";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - reg = <0x72000 0x4000>;
> - marvell,tx-checksum-limit = <1600>;
> - status = "disabled";
> -
> - ethernet-port at 0 {
> - compatible = "marvell,orion-eth-port";
> - reg = <0>;
> - /* overwrite MAC address in bootloader */
> - local-mac-address = [00 00 00 00 00 00];
> - /* set phy-handle property in board file */
> + eth: ethernet-controller at 72000 {
> + compatible = "marvell,orion-eth";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x72000 0x4000>;
> + marvell,tx-checksum-limit = <1600>;
> + status = "disabled";
> +
> + ethernet-port at 0 {
> + compatible = "marvell,orion-eth-port";
> + reg = <0>;
> + /* overwrite MAC address in bootloader */
> + local-mac-address = [00 00 00 00 00 00];
> + /* set phy-handle property in board file */
> + };
> };
> - };
>
> - mdio: mdio-bus at 72004 {
> - compatible = "marvell,orion-mdio";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - reg = <0x72004 0x84>;
> - interrupts = <22>;
> - status = "disabled";
> + mdio: mdio-bus at 72004 {
> + compatible = "marvell,orion-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x72004 0x84>;
> + interrupts = <22>;
> + status = "disabled";
>
> - /* add phy nodes in board file */
> - };
> + /* add phy nodes in board file */
> + };
> +
> + sata at 80000 {
> + compatible = "marvell,orion-sata";
> + reg = <0x80000 0x5000>;
> + interrupts = <29>;
> + status = "disabled";
> + };
>
> - sata at 80000 {
> - compatible = "marvell,orion-sata";
> - reg = <0x80000 0x5000>;
> - interrupts = <29>;
> - status = "disabled";
> + ehci at a0000 {
> + compatible = "marvell,orion-ehci";
> + reg = <0xa0000 0x1000>;
> + interrupts = <12>;
> + status = "disabled";
> + };
> };
>
> crypto at 90000 {
> compatible = "marvell,orion-crypto";
> - reg = <0x90000 0x10000>,
> - <0xf2200000 0x800>;
> + reg = <MBUS_ID(0xf0, 0x01) 0x90000 0x10000>,
> + <MBUS_ID(0x09, 0x00) 0x0 0x800>;
> reg-names = "regs", "sram";
> interrupts = <28>;
> status = "okay";
> };
> -
> - ehci at a0000 {
> - compatible = "marvell,orion-ehci";
> - reg = <0xa0000 0x1000>;
> - interrupts = <12>;
> - status = "disabled";
> - };
> };
> };
> diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c
> index c134a82..7f00897 100644
> --- a/arch/arm/mach-orion5x/board-dt.c
> +++ b/arch/arm/mach-orion5x/board-dt.c
> @@ -15,10 +15,14 @@
> #include <linux/of.h>
> #include <linux/of_platform.h>
> #include <linux/cpu.h>
> +#include <linux/mbus.h>
> #include <asm/system_misc.h>
> #include <asm/mach/arch.h>
> +#include <asm/mach/map.h>
> #include <mach/orion5x.h>
> +#include <mach/bridge-regs.h>
> #include <plat/irq.h>
> +#include <plat/time.h>
> #include "common.h"
>
> static struct of_dev_auxdata orion5x_auxdata_lookup[] __initdata = {
> @@ -31,6 +35,16 @@ static struct of_dev_auxdata orion5x_auxdata_lookup[] __initdata = {
> {},
> };
>
> +static void orion5x_dt_init_early(void)
> +{
> + orion_time_set_base(TIMER_VIRT_BASE);
> +}
> +
> +static void orion5x_dt_init_time(void)
> +{
> + orion5x_timer_init();
> +}
> +
> static void __init orion5x_dt_init(void)
> {
> char *dev_name;
> @@ -39,6 +53,8 @@ static void __init orion5x_dt_init(void)
> orion5x_id(&dev, &rev, &dev_name);
> printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
>
> + BUG_ON(mvebu_mbus_dt_init());
> +
> /*
> * Setup Orion address map
> */
> @@ -71,9 +87,9 @@ static const char *orion5x_dt_compat[] = {
> DT_MACHINE_START(ORION5X_DT, "Marvell Orion5x (Flattened Device Tree)")
> /* Maintainer: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> */
> .map_io = orion5x_map_io,
> - .init_early = orion5x_init_early,
> + .init_early = orion5x_dt_init_early,
> .init_irq = orion_dt_init_irq,
> - .init_time = orion5x_timer_init,
> + .init_time = orion5x_dt_init_time,
> .init_machine = orion5x_dt_init,
> .restart = orion5x_restart,
> .dt_compat = orion5x_dt_compat,
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 14/38] ARM: orion5x: add node labels in Orion5x SoC Device Tree file
2014-04-22 21:26 ` [PATCH v2 14/38] ARM: orion5x: add node labels in Orion5x SoC Device Tree file Thomas Petazzoni
@ 2014-04-23 11:22 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:22 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> In order to ease identification of devices, it is useful to have
> Device Tree labels on all devices. This commit adds such labels to the
> Orion5x SoC Device Tree file.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Oh, nice one :)
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> arch/arm/boot/dts/orion5x.dtsi | 22 +++++++++++-----------
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
> index 31d46e6..aef5d17 100644
> --- a/arch/arm/boot/dts/orion5x.dtsi
> +++ b/arch/arm/boot/dts/orion5x.dtsi
> @@ -41,7 +41,7 @@
> interrupts = <6>, <7>, <8>, <9>;
> };
>
> - spi at 10600 {
> + spi: spi at 10600 {
> compatible = "marvell,orion-spi";
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -50,7 +50,7 @@
> status = "disabled";
> };
>
> - i2c at 11000 {
> + i2c: i2c at 11000 {
> compatible = "marvell,mv64xxx-i2c";
> reg = <0x11000 0x20>;
> #address-cells = <1>;
> @@ -60,7 +60,7 @@
> status = "disabled";
> };
>
> - serial at 12000 {
> + uart0: serial at 12000 {
> compatible = "ns16550a";
> reg = <0x12000 0x100>;
> reg-shift = <2>;
> @@ -69,7 +69,7 @@
> status = "disabled";
> };
>
> - serial at 12100 {
> + uart1: serial at 12100 {
> compatible = "ns16550a";
> reg = <0x12100 0x100>;
> reg-shift = <2>;
> @@ -85,20 +85,20 @@
> reg = <0x20200 0x08>;
> };
>
> - wdt at 20300 {
> + wdt: wdt at 20300 {
> compatible = "marvell,orion-wdt";
> reg = <0x20300 0x28>;
> status = "okay";
> };
>
> - ehci at 50000 {
> + ehci0: ehci at 50000 {
> compatible = "marvell,orion-ehci";
> reg = <0x50000 0x1000>;
> interrupts = <17>;
> status = "disabled";
> };
>
> - xor at 60900 {
> + xor: xor at 60900 {
> compatible = "marvell,orion-xor";
> reg = <0x60900 0x100
> 0x60b00 0x100>;
> @@ -125,7 +125,7 @@
> marvell,tx-checksum-limit = <1600>;
> status = "disabled";
>
> - ethernet-port at 0 {
> + ethport: ethernet-port at 0 {
> compatible = "marvell,orion-eth-port";
> reg = <0>;
> /* overwrite MAC address in bootloader */
> @@ -145,14 +145,14 @@
> /* add phy nodes in board file */
> };
>
> - sata at 80000 {
> + sata: sata at 80000 {
> compatible = "marvell,orion-sata";
> reg = <0x80000 0x5000>;
> interrupts = <29>;
> status = "disabled";
> };
>
> - ehci at a0000 {
> + ehci1: ehci at a0000 {
> compatible = "marvell,orion-ehci";
> reg = <0xa0000 0x1000>;
> interrupts = <12>;
> @@ -160,7 +160,7 @@
> };
> };
>
> - crypto at 90000 {
> + cesa: crypto at 90000 {
> compatible = "marvell,orion-crypto";
> reg = <MBUS_ID(0xf0, 0x01) 0x90000 0x10000>,
> <MBUS_ID(0x09, 0x00) 0x0 0x800>;
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 15/38] ARM: orion5x: use gpio-keys and gpio-leds instead of gpio_keys/gpio_leds in edmini_v2
2014-04-22 21:26 ` [PATCH v2 15/38] ARM: orion5x: use gpio-keys and gpio-leds instead of gpio_keys/gpio_leds in edmini_v2 Thomas Petazzoni
@ 2014-04-23 11:22 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:22 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> As noted by Sebastian Hesselbarth, the Device Tree nodes for GPIO keys
> and LEDs should be named gpio-keys and gpio-leds.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> index d66d2fa..d85a206 100644
> --- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> +++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> @@ -41,7 +41,7 @@
> };
> };
>
> - gpio_keys {
> + gpio-keys {
> compatible = "gpio-keys";
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -52,7 +52,7 @@
> };
> };
>
> - gpio_leds {
> + gpio-leds {
> compatible = "gpio-leds";
>
> led at 1 {
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 16/38] ARM: orion5x: add linux, stdout-path to edmini_v2
2014-04-22 21:26 ` [PATCH v2 16/38] ARM: orion5x: add linux,stdout-path to edmini_v2 Thomas Petazzoni
@ 2014-04-23 11:22 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:22 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> This commit adds the new linux,stdout-path to the edmini_v2 platform,
> pointing to the serial device use for the console.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> index d85a206..df53d256 100644
> --- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> +++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> @@ -22,6 +22,7 @@
>
> chosen {
> bootargs = "console=ttyS0,115200n8 earlyprintk";
> + linux,stdout-path = &uart0;
> };
>
> soc {
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 17/38] ARM: orion5x: use node labels for UART and SATA on edmini_v2
2014-04-22 21:26 ` [PATCH v2 17/38] ARM: orion5x: use node labels for UART and SATA on edmini_v2 Thomas Petazzoni
@ 2014-04-23 11:23 ` Sebastian Hesselbarth
2014-04-23 12:23 ` Thomas Petazzoni
0 siblings, 1 reply; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:23 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> This commit converts the existing devices described in the edmini_v2
> Device Tree to use node labels: the UART and SATA device. Also, it
> reorders the eth and mdio node label references to be sorted
> alphabetically.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Does this also mean, we agree on the "using node label references" topic
for Kirkwood?
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> .../dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 30 ++++++++++------------
> 1 file changed, 14 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> index df53d256..83f45a7 100644
> --- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> +++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> @@ -28,18 +28,6 @@
> soc {
> ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
> <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>;
> -
> - internal-regs {
> - serial at 12000 {
> - clock-frequency = <166666667>;
> - status = "okay";
> - };
> -
> - sata at 80000 {
> - status = "okay";
> - nr-ports = <2>;
> - };
> - };
> };
>
> gpio-keys {
> @@ -63,6 +51,14 @@
> };
> };
>
> +ð {
> + status = "okay";
> +
> + ethernet-port at 0 {
> + phy-handle = <ðphy>;
> + };
> +};
> +
> &mdio {
> status = "okay";
>
> @@ -71,10 +67,12 @@
> };
> };
>
> -ð {
> +&sata {
> status = "okay";
> + nr-ports = <2>;
> +};
>
> - ethernet-port at 0 {
> - phy-handle = <ðphy>;
> - };
> +&uart0 {
> + clock-frequency = <166666667>;
> + status = "okay";
> };
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 21/38] ARM: orion5x: convert to use 'clocks' property for UART controllers
2014-04-22 21:26 ` [PATCH v2 21/38] ARM: orion5x: convert to use 'clocks' property for UART controllers Thomas Petazzoni
@ 2014-04-23 11:24 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:24 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> Until the previous commit, the Orion5x clocks were not described in
> the Device Tree. Now that they are described in the Device Tree, we
> can replace the manual 'clock-frequency' property in the UART nodes
> by a nicer 'clocks' reference in those UART nodes.
>
> This commit consequently removes the 'clock-frequency' property from
> the LaCie edmini_v2 board, which is at this point the only Orion5x
> board converted to the Device Tree.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 1 -
> arch/arm/boot/dts/orion5x.dtsi | 4 ++--
> 2 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> index 83f45a7..ba43197 100644
> --- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> +++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> @@ -73,6 +73,5 @@
> };
>
> &uart0 {
> - clock-frequency = <166666667>;
> status = "okay";
> };
> diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
> index ad23ff4..88df8a8 100644
> --- a/arch/arm/boot/dts/orion5x.dtsi
> +++ b/arch/arm/boot/dts/orion5x.dtsi
> @@ -65,7 +65,7 @@
> reg = <0x12000 0x100>;
> reg-shift = <2>;
> interrupts = <3>;
> - /* set clock-frequency in board dts */
> + clocks = <&core_clk 0>;
> status = "disabled";
> };
>
> @@ -74,7 +74,7 @@
> reg = <0x12100 0x100>;
> reg-shift = <2>;
> interrupts = <4>;
> - /* set clock-frequency in board dts */
> + clocks = <&core_clk 0>;
> status = "disabled";
> };
>
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function
2014-04-22 21:26 ` [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function Thomas Petazzoni
2014-04-22 21:45 ` Arnd Bergmann
@ 2014-04-23 11:25 ` Sebastian Hesselbarth
2014-04-26 14:54 ` Jason Cooper
2 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:25 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> Moving to the Device Tree implies having CONFIG_MULTI_IRQ_HANDLER
> enabled, even for non-DT platforms (if we want both DT and non-DT
> platforms to be supported in a single kernel).
>
> However, the common CONFIG_MULTI_IRQ_HANDLER handler for non-DT
> platforms in plat-orion/irq.c doesn't match the needs of
> Orion5x. Also, it doesn't make much sense for orion_irq_init() to
> register the multi-IRQ handler: orion_irq_init() is called once for
> each IRQ cause/mask tuple, while the multi-IRQ handler only needs to
> be registered once.
>
> To solve this problem, we move the multi-IRQ handle in per-platform
> code: mach-kirkwood/irq.c and mach-dove/irq.c. The Orion5x variant
> will be introduced in a followup commit. Of course, this code will
> ultimately be completely removed once all boards are converted to the
> Device Tree.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
I definitely agree on this, as you made clear that this temporary
solution will ease removing plat-orion later.
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> arch/arm/mach-dove/irq.c | 36 +++++++++++++++++++++++++++++++++++
> arch/arm/mach-kirkwood/irq.c | 36 +++++++++++++++++++++++++++++++++++
> arch/arm/plat-orion/irq.c | 45 --------------------------------------------
> 3 files changed, 72 insertions(+), 45 deletions(-)
>
> diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
> index bc4344a..4a5a7ae 100644
> --- a/arch/arm/mach-dove/irq.c
> +++ b/arch/arm/mach-dove/irq.c
> @@ -108,6 +108,38 @@ static int __initdata gpio2_irqs[4] = {
> 0,
> };
>
> +#ifdef CONFIG_MULTI_IRQ_HANDLER
> +/*
> + * Compiling with both non-DT and DT support enabled, will
> + * break asm irq handler used by non-DT boards. Therefore,
> + * we provide a C-style irq handler even for non-DT boards,
> + * if MULTI_IRQ_HANDLER is set.
> + */
> +
> +static void __iomem *dove_irq_base = IRQ_VIRT_BASE;
> +
> +static asmlinkage void
> +__exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs)
> +{
> + u32 stat;
> +
> + stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_LOW_OFF);
> + stat &= readl_relaxed(dove_irq_base + IRQ_MASK_LOW_OFF);
> + if (stat) {
> + unsigned int hwirq = __fls(stat);
> + handle_IRQ(hwirq, regs);
> + return;
> + }
> + stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_HIGH_OFF);
> + stat &= readl_relaxed(dove_irq_base + IRQ_MASK_HIGH_OFF);
> + if (stat) {
> + unsigned int hwirq = 32 + __fls(stat);
> + handle_IRQ(hwirq, regs);
> + return;
> + }
> +}
> +#endif
> +
> void __init dove_init_irq(void)
> {
> int i;
> @@ -115,6 +147,10 @@ void __init dove_init_irq(void)
> orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
> orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
>
> +#ifdef CONFIG_MULTI_IRQ_HANDLER
> + set_handle_irq(dove_legacy_handle_irq);
> +#endif
> +
> /*
> * Initialize gpiolib for GPIOs 0-71.
> */
> diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
> index 2a97a2e..c9dd860 100644
> --- a/arch/arm/mach-kirkwood/irq.c
> +++ b/arch/arm/mach-kirkwood/irq.c
> @@ -30,11 +30,47 @@ static int __initdata gpio1_irqs[4] = {
> 0,
> };
>
> +#ifdef CONFIG_MULTI_IRQ_HANDLER
> +/*
> + * Compiling with both non-DT and DT support enabled, will
> + * break asm irq handler used by non-DT boards. Therefore,
> + * we provide a C-style irq handler even for non-DT boards,
> + * if MULTI_IRQ_HANDLER is set.
> + */
> +
> +static void __iomem *kirkwood_irq_base = IRQ_VIRT_BASE;
> +
> +asmlinkage void
> +__exception_irq_entry kirkwood_legacy_handle_irq(struct pt_regs *regs)
> +{
> + u32 stat;
> +
> + stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_LOW_OFF);
> + stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_LOW_OFF);
> + if (stat) {
> + unsigned int hwirq = __fls(stat);
> + handle_IRQ(hwirq, regs);
> + return;
> + }
> + stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_HIGH_OFF);
> + stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_HIGH_OFF);
> + if (stat) {
> + unsigned int hwirq = 32 + __fls(stat);
> + handle_IRQ(hwirq, regs);
> + return;
> + }
> +}
> +#endif
> +
> void __init kirkwood_init_irq(void)
> {
> orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
> orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
>
> +#ifdef CONFIG_MULTI_IRQ_HANDLER
> + set_handle_irq(kirkwood_legacy_handle_irq);
> +#endif
> +
> /*
> * Initialize gpiolib for GPIOs 0-49.
> */
> diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
> index 807df14..27ec18b 100644
> --- a/arch/arm/plat-orion/irq.c
> +++ b/arch/arm/plat-orion/irq.c
> @@ -20,47 +20,6 @@
> #include <plat/orion-gpio.h>
> #include <mach/bridge-regs.h>
>
> -#ifdef CONFIG_MULTI_IRQ_HANDLER
> -/*
> - * Compiling with both non-DT and DT support enabled, will
> - * break asm irq handler used by non-DT boards. Therefore,
> - * we provide a C-style irq handler even for non-DT boards,
> - * if MULTI_IRQ_HANDLER is set.
> - *
> - * Notes:
> - * - this is prepared for Kirkwood and Dove only, update
> - * accordingly if you add Orion5x or MV78x00.
> - * - Orion5x uses different macro names and has only one
> - * set of CAUSE/MASK registers.
> - * - MV78x00 uses the same macro names but has a third
> - * set of CAUSE/MASK registers.
> - *
> - */
> -
> -static void __iomem *orion_irq_base = IRQ_VIRT_BASE;
> -
> -asmlinkage void
> -__exception_irq_entry orion_legacy_handle_irq(struct pt_regs *regs)
> -{
> - u32 stat;
> -
> - stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_LOW_OFF);
> - stat &= readl_relaxed(orion_irq_base + IRQ_MASK_LOW_OFF);
> - if (stat) {
> - unsigned int hwirq = __fls(stat);
> - handle_IRQ(hwirq, regs);
> - return;
> - }
> - stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_HIGH_OFF);
> - stat &= readl_relaxed(orion_irq_base + IRQ_MASK_HIGH_OFF);
> - if (stat) {
> - unsigned int hwirq = 32 + __fls(stat);
> - handle_IRQ(hwirq, regs);
> - return;
> - }
> -}
> -#endif
> -
> void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
> {
> struct irq_chip_generic *gc;
> @@ -78,10 +37,6 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
> ct->chip.irq_unmask = irq_gc_mask_set_bit;
> irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
> IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
> -
> -#ifdef CONFIG_MULTI_IRQ_HANDLER
> - set_handle_irq(orion_legacy_handle_irq);
> -#endif
> }
>
> #ifdef CONFIG_OF
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 23/38] ARM: orion5x: switch to DT interrupts and timer
2014-04-22 21:26 ` [PATCH v2 23/38] ARM: orion5x: switch to DT interrupts and timer Thomas Petazzoni
@ 2014-04-23 11:26 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:26 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> This commit switches the Orion5x platforms described through DT to use
> a DT-defined interrupt controller and timer.
>
> This involves:
>
> * Describing in the DT the bridge interrupt controller, which is a
> child interrupt controller to the main one, which is used for timer
> and watchdog interrupts.
>
> * Describing in the DT the timer.
>
> * Adding in the DT the interrupt specifications for the watchdog.
>
> * Selecting the ORION_IRQCHIP and ORION_TIMER drivers to be compiled.
>
> * Change board-dt.c to no longer have an ->init_time() callback,
> since the default callback will work fine: it calls
> clocksource_of_init() and of_clk_init(), as needed.
>
> * Implement a multi-IRQ handler for non-DT platforms in
> mach-orion5x/irq.c.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> arch/arm/boot/dts/orion5x.dtsi | 19 +++++++++++++++++++
> arch/arm/mach-orion5x/Kconfig | 2 ++
> arch/arm/mach-orion5x/board-dt.c | 15 +--------------
> arch/arm/mach-orion5x/irq.c | 28 ++++++++++++++++++++++++++++
> 4 files changed, 50 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
> index 88df8a8..b4c2234 100644
> --- a/arch/arm/boot/dts/orion5x.dtsi
> +++ b/arch/arm/boot/dts/orion5x.dtsi
> @@ -78,6 +78,15 @@
> status = "disabled";
> };
>
> + bridge_intc: bridge-interrupt-ctrl at 20110 {
> + compatible = "marvell,orion-bridge-intc";
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + reg = <0x20110 0x8>;
> + interrupts = <0>;
> + marvell,#interrupts = <4>;
> + };
> +
> intc: interrupt-controller at 20200 {
> compatible = "marvell,orion-intc";
> interrupt-controller;
> @@ -85,9 +94,19 @@
> reg = <0x20200 0x08>;
> };
>
> + timer: timer at 20300 {
> + compatible = "marvell,orion-timer";
> + reg = <0x20300 0x20>;
> + interrupt-parent = <&bridge_intc>;
> + interrupts = <1>, <2>;
> + clocks = <&core_clk 0>;
> + };
> +
> wdt: wdt at 20300 {
> compatible = "marvell,orion-wdt";
> reg = <0x20300 0x28>;
> + interrupt-parent = <&bridge_intc>;
> + interrupts = <3>;
> status = "okay";
> };
>
> diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
> index 4f51132..bd65872 100644
> --- a/arch/arm/mach-orion5x/Kconfig
> +++ b/arch/arm/mach-orion5x/Kconfig
> @@ -6,6 +6,8 @@ config ARCH_ORION5X_DT
> bool "Marvell Orion5x Flattened Device Tree"
> select USE_OF
> select ORION_CLK
> + select ORION_IRQCHIP
> + select ORION_TIMER
> help
> Say 'Y' here if you want your kernel to support the
> Marvell Orion5x using flattened device tree.
> diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c
> index 34286ef..6dc48465 100644
> --- a/arch/arm/mach-orion5x/board-dt.c
> +++ b/arch/arm/mach-orion5x/board-dt.c
> @@ -17,6 +17,7 @@
> #include <linux/cpu.h>
> #include <linux/mbus.h>
> #include <linux/clk-provider.h>
> +#include <linux/clocksource.h>
> #include <asm/system_misc.h>
> #include <asm/mach/arch.h>
> #include <asm/mach/map.h>
> @@ -36,17 +37,6 @@ static struct of_dev_auxdata orion5x_auxdata_lookup[] __initdata = {
> {},
> };
>
> -static void orion5x_dt_init_early(void)
> -{
> - orion_time_set_base(TIMER_VIRT_BASE);
> -}
> -
> -static void orion5x_dt_init_time(void)
> -{
> - orion5x_timer_init();
> - of_clk_init(NULL);
> -}
> -
> static void __init orion5x_dt_init(void)
> {
> char *dev_name;
> @@ -86,9 +76,6 @@ static const char *orion5x_dt_compat[] = {
> DT_MACHINE_START(ORION5X_DT, "Marvell Orion5x (Flattened Device Tree)")
> /* Maintainer: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> */
> .map_io = orion5x_map_io,
> - .init_early = orion5x_dt_init_early,
> - .init_irq = orion_dt_init_irq,
> - .init_time = orion5x_dt_init_time,
> .init_machine = orion5x_dt_init,
> .restart = orion5x_restart,
> .dt_compat = orion5x_dt_compat,
> diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
> index 9654b0c..cd4bac4 100644
> --- a/arch/arm/mach-orion5x/irq.c
> +++ b/arch/arm/mach-orion5x/irq.c
> @@ -16,6 +16,7 @@
> #include <mach/bridge-regs.h>
> #include <plat/orion-gpio.h>
> #include <plat/irq.h>
> +#include <asm/exception.h>
> #include "common.h"
>
> static int __initdata gpio0_irqs[4] = {
> @@ -25,10 +26,37 @@ static int __initdata gpio0_irqs[4] = {
> IRQ_ORION5X_GPIO_24_31,
> };
>
> +#ifdef CONFIG_MULTI_IRQ_HANDLER
> +/*
> + * Compiling with both non-DT and DT support enabled, will
> + * break asm irq handler used by non-DT boards. Therefore,
> + * we provide a C-style irq handler even for non-DT boards,
> + * if MULTI_IRQ_HANDLER is set.
> + */
> +
> +asmlinkage void
> +__exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs)
> +{
> + u32 stat;
> +
> + stat = readl_relaxed(MAIN_IRQ_CAUSE);
> + stat &= readl_relaxed(MAIN_IRQ_MASK);
> + if (stat) {
> + unsigned int hwirq = __fls(stat);
> + handle_IRQ(hwirq, regs);
> + return;
> + }
> +}
> +#endif
> +
> void __init orion5x_init_irq(void)
> {
> orion_irq_init(0, MAIN_IRQ_MASK);
>
> +#ifdef CONFIG_MULTI_IRQ_HANDLER
> + set_handle_irq(orion5x_legacy_handle_irq);
> +#endif
> +
> /*
> * Initialize gpiolib for GPIOs 0-31.
> */
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 28/38] ARM: orion5x: convert edmini_v2 to DT pinctrl
2014-04-22 21:26 ` [PATCH v2 28/38] ARM: orion5x: convert edmini_v2 to DT pinctrl Thomas Petazzoni
@ 2014-04-23 11:27 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:27 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> This commit converts the already partially DT-converted edmini_v2
> platform to use the Device Tree for pinctrl.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> .../dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 31 ++++++++++++++++++++++
> arch/arm/mach-orion5x/edmini_v2-setup.c | 28 -------------------
> 2 files changed, 31 insertions(+), 28 deletions(-)
>
> diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> index ba43197..aa74b00 100644
> --- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> +++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> @@ -32,6 +32,8 @@
>
> gpio-keys {
> compatible = "gpio-keys";
> + pinctrl-0 = <&pmx_power_button>;
> + pinctrl-names = "default";
> #address-cells = <1>;
> #size-cells = <0>;
> button at 1 {
> @@ -43,6 +45,8 @@
>
> gpio-leds {
> compatible = "gpio-leds";
> + pinctrl-0 = <&pmx_power_led>;
> + pinctrl-names = "default";
>
> led at 1 {
> label = "power:blue";
> @@ -67,7 +71,34 @@
> };
> };
>
> +&pinctrl {
> + pinctrl-0 = <&pmx_rtc &pmx_power_led_ctrl>;
> + pinctrl-names = "default";
> +
> + pmx_power_button: pmx-power-button {
> + marvell,pins = "mpp18";
> + marvell,function = "gpio";
> + };
> +
> + pmx_power_led: pmx-power-led {
> + marvell,pins = "mpp16";
> + marvell,function = "gpio";
> + };
> +
> + pmx_power_led_ctrl: pmx-power-led-ctrl {
> + marvell,pins = "mpp17";
> + marvell,function = "gpio";
> + };
> +
> + pmx_rtc: pmx-rtc {
> + marvell,pins = "mpp3";
> + marvell,function = "gpio";
> + };
> +};
> +
> &sata {
> + pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
> + pinctrl-names = "default";
> status = "okay";
> nr-ports = <2>;
> };
> diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
> index f66c1b2..c50469e 100644
> --- a/arch/arm/mach-orion5x/edmini_v2-setup.c
> +++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
> @@ -109,37 +109,9 @@ static struct i2c_board_info __initdata edmini_v2_i2c_rtc = {
> /*****************************************************************************
> * General Setup
> ****************************************************************************/
> -static unsigned int edminiv2_mpp_modes[] __initdata = {
> - MPP0_UNUSED,
> - MPP1_UNUSED,
> - MPP2_UNUSED,
> - MPP3_GPIO, /* RTC interrupt */
> - MPP4_UNUSED,
> - MPP5_UNUSED,
> - MPP6_UNUSED,
> - MPP7_UNUSED,
> - MPP8_UNUSED,
> - MPP9_UNUSED,
> - MPP10_UNUSED,
> - MPP11_UNUSED,
> - MPP12_SATA_LED, /* SATA 0 presence */
> - MPP13_SATA_LED, /* SATA 1 presence */
> - MPP14_SATA_LED, /* SATA 0 active */
> - MPP15_SATA_LED, /* SATA 1 active */
> - /* 16: Power LED control (0 = On, 1 = Off) */
> - MPP16_GPIO,
> - /* 17: Power LED control select (0 = CPLD, 1 = GPIO16) */
> - MPP17_GPIO,
> - /* 18: Power button status (0 = Released, 1 = Pressed) */
> - MPP18_GPIO,
> - MPP19_UNUSED,
> - 0,
> -};
>
> void __init edmini_v2_init(void)
> {
> - orion5x_mpp_conf(edminiv2_mpp_modes);
> -
> /*
> * Configure peripherals.
> */
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 29/38] ARM: orion5x: use DT to describe I2C devices on edmini_v2
2014-04-22 21:26 ` [PATCH v2 29/38] ARM: orion5x: use DT to describe I2C devices on edmini_v2 Thomas Petazzoni
@ 2014-04-23 11:28 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:28 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> This commit converts the already partially DT-converted edmini_v2
> platform to use the Device Tree for I2C bus and devices.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> .../dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 14 +++++++++++++
> arch/arm/mach-orion5x/edmini_v2-setup.c | 24 ----------------------
> 2 files changed, 14 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> index aa74b00..41b2ab5 100644
> --- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> +++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> @@ -10,6 +10,7 @@
>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/input/input.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> #include "orion5x-mv88f5182.dtsi"
>
> / {
> @@ -63,6 +64,19 @@
> };
> };
>
> +&i2c {
> + status = "okay";
> + clock-frequency = <100000>;
> + #address-cells = <1>;
> +
> + rtc at 32 {
> + compatible = "ricoh,rs5c372a";
> + reg = <0x32>;
> + interrupt-parent = <&gpio0>;
> + interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
> + };
> +};
> +
> &mdio {
> status = "okay";
>
> diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
> index c50469e..75648ab 100644
> --- a/arch/arm/mach-orion5x/edmini_v2-setup.c
> +++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
> @@ -96,17 +96,6 @@ static struct platform_device edmini_v2_nor_flash = {
> };
>
> /*****************************************************************************
> - * RTC 5C372a on I2C bus
> - ****************************************************************************/
> -
> -#define EDMINIV2_RTC_GPIO 3
> -
> -static struct i2c_board_info __initdata edmini_v2_i2c_rtc = {
> - I2C_BOARD_INFO("rs5c372a", 0x32),
> - .irq = 0,
> -};
> -
> -/*****************************************************************************
> * General Setup
> ****************************************************************************/
>
> @@ -125,17 +114,4 @@ void __init edmini_v2_init(void)
>
> pr_notice("edmini_v2: USB device port, flash write and power-off "
> "are not yet supported.\n");
> -
> - /* Get RTC IRQ and register the chip */
> - if (gpio_request(EDMINIV2_RTC_GPIO, "rtc") == 0) {
> - if (gpio_direction_input(EDMINIV2_RTC_GPIO) == 0)
> - edmini_v2_i2c_rtc.irq = gpio_to_irq(EDMINIV2_RTC_GPIO);
> - else
> - gpio_free(EDMINIV2_RTC_GPIO);
> - }
> -
> - if (edmini_v2_i2c_rtc.irq == 0)
> - pr_warning("edmini_v2: failed to get RTC IRQ\n");
> -
> - i2c_register_board_info(0, &edmini_v2_i2c_rtc, 1);
> }
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 30/38] ARM: orion5x: use DT to describe EHCI on edmini_v2
2014-04-22 21:26 ` [PATCH v2 30/38] ARM: orion5x: use DT to describe EHCI " Thomas Petazzoni
@ 2014-04-23 11:28 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:28 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> This commit converts the already partially DT-converted edmini_v2
> platform to use the Device Tree for USB.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 4 ++++
> arch/arm/mach-orion5x/edmini_v2-setup.c | 2 --
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> index 41b2ab5..f0f2bcc 100644
> --- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> +++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> @@ -56,6 +56,10 @@
> };
> };
>
> +&ehci0 {
> + status = "okay";
> +};
> +
> ð {
> status = "okay";
>
> diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
> index 75648ab..2eebc0c 100644
> --- a/arch/arm/mach-orion5x/edmini_v2-setup.c
> +++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
> @@ -104,8 +104,6 @@ void __init edmini_v2_init(void)
> /*
> * Configure peripherals.
> */
> - orion5x_ehci0_init();
> -
> mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
> ORION_MBUS_DEVBUS_BOOT_ATTR,
> EDMINI_V2_NOR_BOOT_BASE,
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 31/38] ARM: orion5x: use DT to describe NOR on edmini_v2
2014-04-22 21:26 ` [PATCH v2 31/38] ARM: orion5x: use DT to describe NOR " Thomas Petazzoni
@ 2014-04-23 11:29 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:29 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> This commit converts the already partially DT-converted edmini_v2
> platform to use the Device Tree for NOR flash, using the Device Bus.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> .../dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 43 ++++++++++++++-
> arch/arm/mach-orion5x/edmini_v2-setup.c | 62 ----------------------
> 2 files changed, 42 insertions(+), 63 deletions(-)
>
> diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> index f0f2bcc..1ecddbe 100644
> --- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> +++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> @@ -28,7 +28,8 @@
>
> soc {
> ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
> - <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>;
> + <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
> + <MBUS_ID(0x01, 0x0f) 0 0xfff80000 0x80000>;
> };
>
> gpio-keys {
> @@ -56,6 +57,46 @@
> };
> };
>
> +&devbus_bootcs {
> + status = "okay";
> +
> + /* Read parameters */
> + devbus,bus-width = <8>;
> + devbus,turn-off-ps = <90000>;
> + devbus,badr-skew-ps = <0>;
> + devbus,acc-first-ps = <186000>;
> + devbus,acc-next-ps = <186000>;
> +
> + /* Write parameters */
> + devbus,wr-high-ps = <90000>;
> + devbus,wr-low-ps = <90000>;
> + devbus,ale-wr-ps = <90000>;
> +
> + /*
> + * Currently the MTD code does not recognize the MX29LV400CBCT
> + * as a bottom-type device. This could cause risks of
> + * accidentally erasing critical flash sectors. We thus define
> + * a single, write-protected partition covering the whole
> + * flash. TODO: once the flash part TOP/BOTTOM detection
> + * issue is sorted out in the MTD code, break this into at
> + * least three partitions: 'u-boot code', 'u-boot environment'
> + * and 'whatever is left'.
> + */
> + flash at 0 {
> + compatible = "cfi-flash";
> + reg = <0 0x80000>;
> + bank-width = <1>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + partition at 0 {
> + label = "Full512Kb";
> + reg = <0 0x80000>;
> + read-only;
> + };
> + };
> +};
> +
> &ehci0 {
> status = "okay";
> };
> diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
> index 2eebc0c..6bef2d5 100644
> --- a/arch/arm/mach-orion5x/edmini_v2-setup.c
> +++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
> @@ -42,74 +42,12 @@
> * EDMINI_V2 Info
> ****************************************************************************/
>
> -/*
> - * 512KB NOR flash Device bus boot chip select
> - */
> -
> -#define EDMINI_V2_NOR_BOOT_BASE 0xfff80000
> -#define EDMINI_V2_NOR_BOOT_SIZE SZ_512K
> -
> -/*****************************************************************************
> - * 512KB NOR Flash on BOOT Device
> - ****************************************************************************/
> -
> -/*
> - * Currently the MTD code does not recognize the MX29LV400CBCT as a bottom
> - * -type device. This could cause risks of accidentally erasing critical
> - * flash sectors. We thus define a single, write-protected partition covering
> - * the whole flash.
> - * TODO: once the flash part TOP/BOTTOM detection issue is sorted out in the MTD
> - * code, break this into at least three partitions: 'u-boot code', 'u-boot
> - * environment' and 'whatever is left'.
> - */
> -
> -static struct mtd_partition edmini_v2_partitions[] = {
> - {
> - .name = "Full512kb",
> - .size = 0x00080000,
> - .offset = 0x00000000,
> - .mask_flags = MTD_WRITEABLE,
> - },
> -};
> -
> -static struct physmap_flash_data edmini_v2_nor_flash_data = {
> - .width = 1,
> - .parts = edmini_v2_partitions,
> - .nr_parts = ARRAY_SIZE(edmini_v2_partitions),
> -};
> -
> -static struct resource edmini_v2_nor_flash_resource = {
> - .flags = IORESOURCE_MEM,
> - .start = EDMINI_V2_NOR_BOOT_BASE,
> - .end = EDMINI_V2_NOR_BOOT_BASE
> - + EDMINI_V2_NOR_BOOT_SIZE - 1,
> -};
> -
> -static struct platform_device edmini_v2_nor_flash = {
> - .name = "physmap-flash",
> - .id = 0,
> - .dev = {
> - .platform_data = &edmini_v2_nor_flash_data,
> - },
> - .num_resources = 1,
> - .resource = &edmini_v2_nor_flash_resource,
> -};
> -
> /*****************************************************************************
> * General Setup
> ****************************************************************************/
>
> void __init edmini_v2_init(void)
> {
> - /*
> - * Configure peripherals.
> - */
> - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
> - ORION_MBUS_DEVBUS_BOOT_ATTR,
> - EDMINI_V2_NOR_BOOT_BASE,
> - EDMINI_V2_NOR_BOOT_SIZE);
> - platform_device_register(&edmini_v2_nor_flash);
> -
> pr_notice("edmini_v2: USB device port, flash write and power-off "
> "are not yet supported.\n");
> }
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 32/38] ARM: orion5x: keep TODO list in edmini_v2 DT
2014-04-22 21:26 ` [PATCH v2 32/38] ARM: orion5x: keep TODO list in edmini_v2 DT Thomas Petazzoni
@ 2014-04-23 11:29 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:29 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> In preparation to the complete removal of non-DT support for
> edmini_v2, this commit copies the TODO list of things to support from
> the old-style board file into the Device Tree of edmini_v2.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> index 1ecddbe..89ff404 100644
> --- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> +++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
> @@ -6,6 +6,13 @@
> * warranty of any kind, whether express or implied.
> */
>
> +/*
> + * TODO: add Orion USB device port init when kernel.org support is added.
> + * TODO: add flash write support: see below.
> + * TODO: add power-off support.
> + * TODO: add I2C EEPROM support.
> + */
> +
> /dts-v1/;
>
> #include <dt-bindings/gpio/gpio.h>
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 34/38] ARM: orion5x: convert RD-88F5182 to Device Tree
2014-04-22 21:26 ` [PATCH v2 34/38] ARM: orion5x: convert RD-88F5182 to Device Tree Thomas Petazzoni
@ 2014-04-23 11:30 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:30 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> This commit converts the RD-88F5182 platform to the Device Tree. All
> devices except the PCI are converted to the Device Tree.
>
> It is worth noting that:
>
> * The PCI description for the DT case is kept in board-rd88f5182.c.
>
> * The existing non-DT support in rd88f5182-setup.c is kept as is, in
> order to allow testing of a given platform in both DT and non-DT
> cases. It will ultimately be removed, once we no longer care about
> non-DT support for Orion5x.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Ronen Shitrit <rshitrit@marvell.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> arch/arm/boot/dts/Makefile | 3 +-
> arch/arm/boot/dts/orion5x-rd88f5182-nas.dts | 177 ++++++++++++++++++++++++++++
> arch/arm/mach-orion5x/Kconfig | 8 ++
> arch/arm/mach-orion5x/Makefile | 1 +
> arch/arm/mach-orion5x/board-rd88f5182.c | 116 ++++++++++++++++++
> 5 files changed, 304 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/orion5x-rd88f5182-nas.dts
> create mode 100644 arch/arm/mach-orion5x/board-rd88f5182.c
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 35c146f..f7943a8 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -289,7 +289,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
> am43x-epos-evm.dtb \
> am437x-gp-evm.dtb \
> dra7-evm.dtb
> -dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
> +dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb \
> + orion5x-rd88f5182-nas.dtb
> dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
> qcom-msm8960-cdp.dtb \
> diff --git a/arch/arm/boot/dts/orion5x-rd88f5182-nas.dts b/arch/arm/boot/dts/orion5x-rd88f5182-nas.dts
> new file mode 100644
> index 0000000..6fb0525
> --- /dev/null
> +++ b/arch/arm/boot/dts/orion5x-rd88f5182-nas.dts
> @@ -0,0 +1,177 @@
> +/*
> + * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include "orion5x-mv88f5182.dtsi"
> +
> +/ {
> + model = "Marvell Reference Design 88F5182 NAS";
> + compatible = "marvell,rd-88f5182-nas", "marvell,orion5x-88f5182", "marvell,orion5x";
> +
> + memory {
> + reg = <0x00000000 0x4000000>; /* 64 MB */
> + };
> +
> + chosen {
> + bootargs = "console=ttyS0,115200n8 earlyprintk";
> + linux,stdout-path = &uart0;
> + };
> +
> + soc {
> + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
> + <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
> + <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x80000>,
> + <MBUS_ID(0x01, 0x1d) 0 0xfc000000 0x1000000>;
> + };
> +
> + gpio-leds {
> + compatible = "gpio-leds";
> + pinctrl-0 = <&pmx_debug_led>;
> + pinctrl-names = "default";
> +
> + led at 0 {
> + label = "rd88f5182:cpu";
> + linux,default-trigger = "heartbeat";
> + gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +};
> +
> +&devbus_bootcs {
> + status = "okay";
> +
> + /* Read parameters */
> + devbus,bus-width = <8>;
> + devbus,turn-off-ps = <90000>;
> + devbus,badr-skew-ps = <0>;
> + devbus,acc-first-ps = <186000>;
> + devbus,acc-next-ps = <186000>;
> +
> + /* Write parameters */
> + devbus,wr-high-ps = <90000>;
> + devbus,wr-low-ps = <90000>;
> + devbus,ale-wr-ps = <90000>;
> +
> + flash at 0 {
> + compatible = "cfi-flash";
> + reg = <0 0x80000>;
> + bank-width = <1>;
> + };
> +};
> +
> +&devbus_cs1 {
> + status = "okay";
> +
> + /* Read parameters */
> + devbus,bus-width = <8>;
> + devbus,turn-off-ps = <90000>;
> + devbus,badr-skew-ps = <0>;
> + devbus,acc-first-ps = <186000>;
> + devbus,acc-next-ps = <186000>;
> +
> + /* Write parameters */
> + devbus,wr-high-ps = <90000>;
> + devbus,wr-low-ps = <90000>;
> + devbus,ale-wr-ps = <90000>;
> +
> + flash at 0 {
> + compatible = "cfi-flash";
> + reg = <0 0x1000000>;
> + bank-width = <1>;
> + };
> +};
> +
> +&ehci0 {
> + status = "okay";
> +};
> +
> +&ehci1 {
> + status = "okay";
> +};
> +
> +ð {
> + status = "okay";
> +
> + ethernet-port at 0 {
> + phy-handle = <ðphy>;
> + };
> +};
> +
> +&i2c {
> + status = "okay";
> + clock-frequency = <100000>;
> + #address-cells = <1>;
> +
> + rtc at 68 {
> + pinctrl-0 = <&pmx_rtc>;
> + pinctrl-names = "default";
> + compatible = "dallas,ds1338";
> + reg = <0x68>;
> + };
> +};
> +
> +&mdio {
> + status = "okay";
> +
> + ethphy: ethernet-phy {
> + reg = <8>;
> + };
> +};
> +
> +&pinctrl {
> + pinctrl-0 = <&pmx_reset_switch &pmx_misc_gpios
> + &pmx_pci_gpios>;
> + pinctrl-names = "default";
> +
> + /*
> + * MPP[20] PCI Clock to MV88F5182
> + * MPP[21] PCI Clock to mini PCI CON11
> + * MPP[22] USB 0 over current indication
> + * MPP[23] USB 1 over current indication
> + * MPP[24] USB 1 over current enable
> + * MPP[25] USB 0 over current enable
> + */
> +
> + pmx_debug_led: pmx-debug_led {
> + marvell,pins = "mpp0";
> + marvell,function = "gpio";
> + };
> +
> + pmx_reset_switch: pmx-reset-switch {
> + marvell,pins = "mpp1";
> + marvell,function = "gpio";
> + };
> +
> + pmx_rtc: pmx-rtc {
> + marvell,pins = "mpp3";
> + marvell,function = "gpio";
> + };
> +
> + pmx_misc_gpios: pmx-misc-gpios {
> + marvell,pins = "mpp4", "mpp5";
> + marvell,function = "gpio";
> + };
> +
> + pmx_pci_gpios: pmx-pci-gpios {
> + marvell,pins = "mpp6", "mpp7";
> + marvell,function = "gpio";
> + };
> +};
> +
> +&sata {
> + pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
> + pinctrl-names = "default";
> + status = "okay";
> + nr-ports = <2>;
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
> index 928f4cb..11b0c7e 100644
> --- a/arch/arm/mach-orion5x/Kconfig
> +++ b/arch/arm/mach-orion5x/Kconfig
> @@ -28,6 +28,14 @@ config MACH_RD88F5182
> Say 'Y' here if you want your kernel to support the
> Marvell Orion-NAS (88F5182) RD2
>
> +config MACH_RD88F5182_DT
> + bool "Marvell Orion-NAS Reference Design (Flattened Device Tree)"
> + select ARCH_ORION5X_DT
> + select I2C_BOARDINFO
> + help
> + Say 'Y' here if you want your kernel to support the Marvell
> + Orion-NAS (88F5182) RD2, Flattened Device Tree.
> +
> config MACH_KUROBOX_PRO
> bool "KuroBox Pro"
> select I2C_BOARDINFO
> diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
> index e8fdbdd..f405894 100644
> --- a/arch/arm/mach-orion5x/Makefile
> +++ b/arch/arm/mach-orion5x/Makefile
> @@ -23,3 +23,4 @@ obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o
> obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o
>
> obj-$(CONFIG_ARCH_ORION5X_DT) += board-dt.o
> +obj-$(CONFIG_MACH_RD88F5182_DT) += board-rd88f5182.o
> diff --git a/arch/arm/mach-orion5x/board-rd88f5182.c b/arch/arm/mach-orion5x/board-rd88f5182.c
> new file mode 100644
> index 0000000..270824b
> --- /dev/null
> +++ b/arch/arm/mach-orion5x/board-rd88f5182.c
> @@ -0,0 +1,116 @@
> +/*
> + * arch/arm/mach-orion5x/rd88f5182-setup.c
> + *
> + * Marvell Orion-NAS Reference Design Setup
> + *
> + * Maintainer: Ronen Shitrit <rshitrit@marvell.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +#include <linux/gpio.h>
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/platform_device.h>
> +#include <linux/pci.h>
> +#include <linux/irq.h>
> +#include <asm/mach-types.h>
> +#include <asm/mach/arch.h>
> +#include <asm/mach/pci.h>
> +#include <mach/orion5x.h>
> +#include "common.h"
> +
> +/*****************************************************************************
> + * RD-88F5182 Info
> + ****************************************************************************/
> +
> +/*
> + * PCI
> + */
> +
> +#define RD88F5182_PCI_SLOT0_OFFS 7
> +#define RD88F5182_PCI_SLOT0_IRQ_A_PIN 7
> +#define RD88F5182_PCI_SLOT0_IRQ_B_PIN 6
> +
> +/*****************************************************************************
> + * PCI
> + ****************************************************************************/
> +
> +static void __init rd88f5182_pci_preinit(void)
> +{
> + int pin;
> +
> + /*
> + * Configure PCI GPIO IRQ pins
> + */
> + pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
> + if (gpio_request(pin, "PCI IntA") == 0) {
> + if (gpio_direction_input(pin) == 0) {
> + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
> + } else {
> + printk(KERN_ERR "rd88f5182_pci_preinit failed to "
> + "set_irq_type pin %d\n", pin);
> + gpio_free(pin);
> + }
> + } else {
> + printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin);
> + }
> +
> + pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
> + if (gpio_request(pin, "PCI IntB") == 0) {
> + if (gpio_direction_input(pin) == 0) {
> + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
> + } else {
> + printk(KERN_ERR "rd88f5182_pci_preinit failed to "
> + "set_irq_type pin %d\n", pin);
> + gpio_free(pin);
> + }
> + } else {
> + printk(KERN_ERR "rd88f5182_pci_preinit failed to gpio_request %d\n", pin);
> + }
> +}
> +
> +static int __init rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot,
> + u8 pin)
> +{
> + int irq;
> +
> + /*
> + * Check for devices with hard-wired IRQs.
> + */
> + irq = orion5x_pci_map_irq(dev, slot, pin);
> + if (irq != -1)
> + return irq;
> +
> + /*
> + * PCI IRQs are connected via GPIOs
> + */
> + switch (slot - RD88F5182_PCI_SLOT0_OFFS) {
> + case 0:
> + if (pin == 1)
> + return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN);
> + else
> + return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN);
> + default:
> + return -1;
> + }
> +}
> +
> +static struct hw_pci rd88f5182_pci __initdata = {
> + .nr_controllers = 2,
> + .preinit = rd88f5182_pci_preinit,
> + .setup = orion5x_pci_sys_setup,
> + .scan = orion5x_pci_sys_scan_bus,
> + .map_irq = rd88f5182_pci_map_irq,
> +};
> +
> +static int __init rd88f5182_pci_init(void)
> +{
> + if (of_machine_is_compatible("marvell,rd-88f5182-nas"))
> + pci_common_init(&rd88f5182_pci);
> +
> + return 0;
> +}
> +
> +subsys_initcall(rd88f5182_pci_init);
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 35/38] ARM: orion5x: convert d2net to Device Tree
2014-04-22 21:26 ` [PATCH v2 35/38] ARM: orion5x: convert d2net " Thomas Petazzoni
@ 2014-04-23 11:32 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:32 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> This commit converts the LaCie d2 Network platform to the Device Tree.
>
> All devices except LEDs are converted, because the LED code needs a
> non-LED GPIO to be set to a given value for the LEDs to work, and this
> cannot yet be easily represented in DT.
>
> Also, references to the LaCie Big Disk Network platform are lost,
> because this platform apparently has exactly the same hardware support
> as the LaCie d2 Network, so their Device Tree files would be
> identical.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Simon Guinot <sguinot@lacie.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> arch/arm/boot/dts/Makefile | 3 +-
> arch/arm/boot/dts/orion5x-lacie-d2-network.dts | 236 ++++++++++++++++
> arch/arm/mach-orion5x/Kconfig | 13 +-
> arch/arm/mach-orion5x/Makefile | 3 +-
> arch/arm/mach-orion5x/board-d2net.c | 109 ++++++++
> arch/arm/mach-orion5x/d2net-setup.c | 365 -------------------------
> 6 files changed, 351 insertions(+), 378 deletions(-)
> create mode 100644 arch/arm/boot/dts/orion5x-lacie-d2-network.dts
> create mode 100644 arch/arm/mach-orion5x/board-d2net.c
> delete mode 100644 arch/arm/mach-orion5x/d2net-setup.c
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index f7943a8..59397c2 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -289,7 +289,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
> am43x-epos-evm.dtb \
> am437x-gp-evm.dtb \
> dra7-evm.dtb
> -dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb \
> +dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-d2-network.dtb \
> + orion5x-lacie-ethernet-disk-mini-v2.dtb \
> orion5x-rd88f5182-nas.dtb
> dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
> diff --git a/arch/arm/boot/dts/orion5x-lacie-d2-network.dts b/arch/arm/boot/dts/orion5x-lacie-d2-network.dts
> new file mode 100644
> index 0000000..c701e8d
> --- /dev/null
> +++ b/arch/arm/boot/dts/orion5x-lacie-d2-network.dts
> @@ -0,0 +1,236 @@
> +/*
> + * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> + * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include "orion5x-mv88f5182.dtsi"
> +
> +/ {
> + model = "LaCie d2 Network";
> + compatible = "lacie,d2-network", "marvell,orion5x-88f5182", "marvell,orion5x";
> +
> + memory {
> + reg = <0x00000000 0x4000000>; /* 64 MB */
> + };
> +
> + chosen {
> + bootargs = "console=ttyS0,115200n8 earlyprintk";
> + linux,stdout-path = &uart0;
> + };
> +
> + soc {
> + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
> + <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
> + <MBUS_ID(0x01, 0x0f) 0 0xfff80000 0x80000>;
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-0 = <&pmx_buttons>;
> + pinctrl-names = "default";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + front_button {
> + label = "Front Push Button";
> + linux,code = <KEY_POWER>;
> + gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
> + };
> +
> + power_rocker_sw_on {
> + label = "Power rocker switch (on|auto)";
> + linux,input-type = <5>; /* EV_SW */
> + linux,code = <1>; /* D2NET_SWITCH_POWER_ON */
> + gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
> + };
> +
> + power_rocker_sw_off {
> + label = "Power rocker switch (auto|off)";
> + linux,input-type = <5>; /* EV_SW */
> + linux,code = <2>; /* D2NET_SWITCH_POWER_OFF */
> + gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +
> + regulators {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-0 = <&pmx_sata0_power &pmx_sata1_power>;
> + pinctrl-names = "default";
> +
> + sata0_power: regulator at 0 {
> + compatible = "regulator-fixed";
> + reg = <0>;
> + regulator-name = "SATA0 Power";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + enable-active-high;
> + regulator-always-on;
> + regulator-boot-on;
> + gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>;
> + };
> +
> + sata1_power: regulator at 1 {
> + compatible = "regulator-fixed";
> + reg = <1>;
> + regulator-name = "SATA1 Power";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + enable-active-high;
> + regulator-always-on;
> + regulator-boot-on;
> + gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +};
> +
> +&devbus_bootcs {
> + status = "okay";
> +
> + devbus,keep-config;
> +
> + /*
> + * Currently the MTD code does not recognize the MX29LV400CBCT
> + * as a bottom-type device. This could cause risks of
> + * accidentally erasing critical flash sectors. We thus define
> + * a single, write-protected partition covering the whole
> + * flash. TODO: once the flash part TOP/BOTTOM detection
> + * issue is sorted out in the MTD code, break this into at
> + * least three partitions: 'u-boot code', 'u-boot environment'
> + * and 'whatever is left'.
> + */
> + flash at 0 {
> + compatible = "cfi-flash";
> + reg = <0 0x80000>;
> + bank-width = <1>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + partition at 0 {
> + label = "Full512Kb";
> + reg = <0 0x80000>;
> + read-only;
> + };
> + };
> +};
> +
> +&mdio {
> + status = "okay";
> +
> + ethphy: ethernet-phy {
> + reg = <8>;
> + };
> +};
> +
> +&ehci0 {
> + status = "okay";
> +};
> +
> +ð {
> + status = "okay";
> +
> + ethernet-port at 0 {
> + phy-handle = <ðphy>;
> + };
> +};
> +
> +&i2c {
> + status = "okay";
> + clock-frequency = <100000>;
> + #address-cells = <1>;
> +
> + rtc at 32 {
> + compatible = "ricoh,rs5c372b";
> + reg = <0x32>;
> + };
> +
> + fan at 3e {
> + compatible = "gmt,g762";
> + reg = <0x3e>;
> +
> + /* Not enough HW info */
> + status = "disabled";
> + };
> +
> + eeprom at 50 {
> + compatible = "atmel,24c08";
> + reg = <0x50>;
> + };
> +};
> +
> +&pinctrl {
> + pinctrl-0 = <&pmx_leds &pmx_board_id &pmx_fan_fail>;
> + pinctrl-names = "default";
> +
> + pmx_board_id: pmx-board-id {
> + marvell,pins = "mpp0", "mpp1", "mpp2";
> + marvell,function = "gpio";
> + };
> +
> + pmx_buttons: pmx-buttons {
> + marvell,pins = "mpp8", "mpp9", "mpp18";
> + marvell,function = "gpio";
> + };
> +
> + pmx_fan_fail: pmx-fan-fail {
> + marvell,pins = "mpp5";
> + marvell,function = "gpio";
> + };
> +
> + /*
> + * MPP6: Red front LED
> + * MPP16: Blue front LED blink control
> + */
> + pmx_leds: pmx-leds {
> + marvell,pins = "mpp6", "mpp16";
> + marvell,function = "gpio";
> + };
> +
> + pmx_sata0_led_active: pmx-sata0-led-active {
> + marvell,pins = "mpp14";
> + marvell,function = "sata0";
> + };
> +
> + pmx_sata0_power: pmx-sata0-power {
> + marvell,pins = "mpp3";
> + marvell,function = "gpio";
> + };
> +
> + pmx_sata1_led_active: pmx-sata1-led-active {
> + marvell,pins = "mpp15";
> + marvell,function = "sata1";
> + };
> +
> + pmx_sata1_power: pmx-sata1-power {
> + marvell,pins = "mpp12";
> + marvell,function = "gpio";
> + };
> +
> + /*
> + * Non MPP GPIOs:
> + * GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok)
> + * GPIO 23: Blue front LED off
> + * GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled)
> + */
> +};
> +
> +&sata {
> + pinctrl-0 = <&pmx_sata0_led_active
> + &pmx_sata1_led_active>;
> + pinctrl-names = "default";
> + status = "okay";
> + nr-ports = <2>;
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
> index 11b0c7e..3c4ad83 100644
> --- a/arch/arm/mach-orion5x/Kconfig
> +++ b/arch/arm/mach-orion5x/Kconfig
> @@ -115,20 +115,13 @@ config MACH_MV2120
> Say 'Y' here if you want your kernel to support the
> HP Media Vault mv2120 or mv5100.
>
> -config MACH_D2NET
> - bool "LaCie d2 Network"
> - select I2C_BOARDINFO
> +config MACH_D2NET_DT
> + bool "LaCie d2 Network / Big Disk Network (Flattened Device Tree)"
> + select ARCH_ORION5X_DT
> help
> Say 'Y' here if you want your kernel to support the
> LaCie d2 Network NAS.
>
> -config MACH_BIGDISK
> - bool "LaCie Big Disk Network"
> - select I2C_BOARDINFO
> - help
> - Say 'Y' here if you want your kernel to support the
> - LaCie Big Disk Network NAS.
> -
> config MACH_NET2BIG
> bool "LaCie 2Big Network"
> select I2C_BOARDINFO
> diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
> index f405894..787dcee 100644
> --- a/arch/arm/mach-orion5x/Makefile
> +++ b/arch/arm/mach-orion5x/Makefile
> @@ -12,8 +12,6 @@ obj-$(CONFIG_MACH_TS409) += ts409-setup.o tsx09-common.o
> obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o
> obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o
> obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o
> -obj-$(CONFIG_MACH_D2NET) += d2net-setup.o
> -obj-$(CONFIG_MACH_BIGDISK) += d2net-setup.o
> obj-$(CONFIG_MACH_NET2BIG) += net2big-setup.o
> obj-$(CONFIG_MACH_MSS2) += mss2-setup.o
> obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o
> @@ -23,4 +21,5 @@ obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o
> obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o
>
> obj-$(CONFIG_ARCH_ORION5X_DT) += board-dt.o
> +obj-$(CONFIG_MACH_D2NET_DT) += board-d2net.o
> obj-$(CONFIG_MACH_RD88F5182_DT) += board-rd88f5182.o
> diff --git a/arch/arm/mach-orion5x/board-d2net.c b/arch/arm/mach-orion5x/board-d2net.c
> new file mode 100644
> index 0000000..8a72841
> --- /dev/null
> +++ b/arch/arm/mach-orion5x/board-d2net.c
> @@ -0,0 +1,109 @@
> +/*
> + * arch/arm/mach-orion5x/board-d2net.c
> + *
> + * LaCie d2Network and Big Disk Network NAS setup
> + *
> + * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/platform_device.h>
> +#include <linux/pci.h>
> +#include <linux/irq.h>
> +#include <linux/leds.h>
> +#include <linux/gpio.h>
> +#include <asm/mach-types.h>
> +#include <asm/mach/arch.h>
> +#include <asm/mach/pci.h>
> +#include <mach/orion5x.h>
> +#include <plat/orion-gpio.h>
> +#include "common.h"
> +
> +/*****************************************************************************
> + * LaCie d2 Network Info
> + ****************************************************************************/
> +
> +/*****************************************************************************
> + * GPIO LED's
> + ****************************************************************************/
> +
> +/*
> + * The blue front LED is wired to the CPLD and can blink in relation with the
> + * SATA activity.
> + *
> + * The following array detail the different LED registers and the combination
> + * of their possible values:
> + *
> + * led_off | blink_ctrl | SATA active | LED state
> + * | | |
> + * 1 | x | x | off
> + * 0 | 0 | 0 | off
> + * 0 | 1 | 0 | blink (rate 300ms)
> + * 0 | x | 1 | on
> + *
> + * Notes: The blue and the red front LED's can't be on at the same time.
> + * Red LED have priority.
> + */
> +
> +#define D2NET_GPIO_RED_LED 6
> +#define D2NET_GPIO_BLUE_LED_BLINK_CTRL 16
> +#define D2NET_GPIO_BLUE_LED_OFF 23
> +
> +static struct gpio_led d2net_leds[] = {
> + {
> + .name = "d2net:blue:sata",
> + .default_trigger = "default-on",
> + .gpio = D2NET_GPIO_BLUE_LED_OFF,
> + .active_low = 1,
> + },
> + {
> + .name = "d2net:red:fail",
> + .gpio = D2NET_GPIO_RED_LED,
> + },
> +};
> +
> +static struct gpio_led_platform_data d2net_led_data = {
> + .num_leds = ARRAY_SIZE(d2net_leds),
> + .leds = d2net_leds,
> +};
> +
> +static struct platform_device d2net_gpio_leds = {
> + .name = "leds-gpio",
> + .id = -1,
> + .dev = {
> + .platform_data = &d2net_led_data,
> + },
> +};
> +
> +static void __init d2net_gpio_leds_init(void)
> +{
> + int err;
> +
> + /* Configure register blink_ctrl to allow SATA activity LED blinking. */
> + err = gpio_request(D2NET_GPIO_BLUE_LED_BLINK_CTRL, "blue LED blink");
> + if (err == 0) {
> + err = gpio_direction_output(D2NET_GPIO_BLUE_LED_BLINK_CTRL, 1);
> + if (err)
> + gpio_free(D2NET_GPIO_BLUE_LED_BLINK_CTRL);
> + }
> + if (err)
> + pr_err("d2net: failed to configure blue LED blink GPIO\n");
> +
> + platform_device_register(&d2net_gpio_leds);
> +}
> +
> +/*****************************************************************************
> + * General Setup
> + ****************************************************************************/
> +
> +void __init d2net_init(void)
> +{
> + d2net_gpio_leds_init();
> +
> + pr_notice("d2net: Flash write are not yet supported.\n");
> +}
> diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c
> deleted file mode 100644
> index 8f68b74..0000000
> --- a/arch/arm/mach-orion5x/d2net-setup.c
> +++ /dev/null
> @@ -1,365 +0,0 @@
> -/*
> - * arch/arm/mach-orion5x/d2net-setup.c
> - *
> - * LaCie d2Network and Big Disk Network NAS setup
> - *
> - * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
> - *
> - * This file is licensed under the terms of the GNU General Public
> - * License version 2. This program is licensed "as is" without any
> - * warranty of any kind, whether express or implied.
> - */
> -
> -#include <linux/kernel.h>
> -#include <linux/init.h>
> -#include <linux/platform_device.h>
> -#include <linux/pci.h>
> -#include <linux/irq.h>
> -#include <linux/mtd/physmap.h>
> -#include <linux/mv643xx_eth.h>
> -#include <linux/leds.h>
> -#include <linux/gpio_keys.h>
> -#include <linux/input.h>
> -#include <linux/i2c.h>
> -#include <linux/ata_platform.h>
> -#include <linux/gpio.h>
> -#include <asm/mach-types.h>
> -#include <asm/mach/arch.h>
> -#include <asm/mach/pci.h>
> -#include <mach/orion5x.h>
> -#include <plat/orion-gpio.h>
> -#include "common.h"
> -#include "mpp.h"
> -
> -/*****************************************************************************
> - * LaCie d2 Network Info
> - ****************************************************************************/
> -
> -/*
> - * 512KB NOR flash Device bus boot chip select
> - */
> -
> -#define D2NET_NOR_BOOT_BASE 0xfff80000
> -#define D2NET_NOR_BOOT_SIZE SZ_512K
> -
> -/*****************************************************************************
> - * 512KB NOR Flash on Boot Device
> - ****************************************************************************/
> -
> -/*
> - * TODO: Check write support on flash MX29LV400CBTC-70G
> - */
> -
> -static struct mtd_partition d2net_partitions[] = {
> - {
> - .name = "Full512kb",
> - .size = MTDPART_SIZ_FULL,
> - .offset = 0,
> - .mask_flags = MTD_WRITEABLE,
> - },
> -};
> -
> -static struct physmap_flash_data d2net_nor_flash_data = {
> - .width = 1,
> - .parts = d2net_partitions,
> - .nr_parts = ARRAY_SIZE(d2net_partitions),
> -};
> -
> -static struct resource d2net_nor_flash_resource = {
> - .flags = IORESOURCE_MEM,
> - .start = D2NET_NOR_BOOT_BASE,
> - .end = D2NET_NOR_BOOT_BASE
> - + D2NET_NOR_BOOT_SIZE - 1,
> -};
> -
> -static struct platform_device d2net_nor_flash = {
> - .name = "physmap-flash",
> - .id = 0,
> - .dev = {
> - .platform_data = &d2net_nor_flash_data,
> - },
> - .num_resources = 1,
> - .resource = &d2net_nor_flash_resource,
> -};
> -
> -/*****************************************************************************
> - * Ethernet
> - ****************************************************************************/
> -
> -static struct mv643xx_eth_platform_data d2net_eth_data = {
> - .phy_addr = MV643XX_ETH_PHY_ADDR(8),
> -};
> -
> -/*****************************************************************************
> - * I2C devices
> - ****************************************************************************/
> -
> -/*
> - * i2c addr | chip | description
> - * 0x32 | Ricoh 5C372b | RTC
> - * 0x3e | GMT G762 | PWM fan controller
> - * 0x50 | HT24LC08 | eeprom (1kB)
> - *
> - * TODO: Add G762 support to the g760a driver.
> - */
> -static struct i2c_board_info __initdata d2net_i2c_devices[] = {
> - {
> - I2C_BOARD_INFO("rs5c372b", 0x32),
> - }, {
> - I2C_BOARD_INFO("24c08", 0x50),
> - },
> -};
> -
> -/*****************************************************************************
> - * SATA
> - ****************************************************************************/
> -
> -static struct mv_sata_platform_data d2net_sata_data = {
> - .n_ports = 2,
> -};
> -
> -#define D2NET_GPIO_SATA0_POWER 3
> -#define D2NET_GPIO_SATA1_POWER 12
> -
> -static void __init d2net_sata_power_init(void)
> -{
> - int err;
> -
> - err = gpio_request(D2NET_GPIO_SATA0_POWER, "SATA0 power");
> - if (err == 0) {
> - err = gpio_direction_output(D2NET_GPIO_SATA0_POWER, 1);
> - if (err)
> - gpio_free(D2NET_GPIO_SATA0_POWER);
> - }
> - if (err)
> - pr_err("d2net: failed to configure SATA0 power GPIO\n");
> -
> - err = gpio_request(D2NET_GPIO_SATA1_POWER, "SATA1 power");
> - if (err == 0) {
> - err = gpio_direction_output(D2NET_GPIO_SATA1_POWER, 1);
> - if (err)
> - gpio_free(D2NET_GPIO_SATA1_POWER);
> - }
> - if (err)
> - pr_err("d2net: failed to configure SATA1 power GPIO\n");
> -}
> -
> -/*****************************************************************************
> - * GPIO LED's
> - ****************************************************************************/
> -
> -/*
> - * The blue front LED is wired to the CPLD and can blink in relation with the
> - * SATA activity.
> - *
> - * The following array detail the different LED registers and the combination
> - * of their possible values:
> - *
> - * led_off | blink_ctrl | SATA active | LED state
> - * | | |
> - * 1 | x | x | off
> - * 0 | 0 | 0 | off
> - * 0 | 1 | 0 | blink (rate 300ms)
> - * 0 | x | 1 | on
> - *
> - * Notes: The blue and the red front LED's can't be on at the same time.
> - * Red LED have priority.
> - */
> -
> -#define D2NET_GPIO_RED_LED 6
> -#define D2NET_GPIO_BLUE_LED_BLINK_CTRL 16
> -#define D2NET_GPIO_BLUE_LED_OFF 23
> -
> -static struct gpio_led d2net_leds[] = {
> - {
> - .name = "d2net:blue:sata",
> - .default_trigger = "default-on",
> - .gpio = D2NET_GPIO_BLUE_LED_OFF,
> - .active_low = 1,
> - },
> - {
> - .name = "d2net:red:fail",
> - .gpio = D2NET_GPIO_RED_LED,
> - },
> -};
> -
> -static struct gpio_led_platform_data d2net_led_data = {
> - .num_leds = ARRAY_SIZE(d2net_leds),
> - .leds = d2net_leds,
> -};
> -
> -static struct platform_device d2net_gpio_leds = {
> - .name = "leds-gpio",
> - .id = -1,
> - .dev = {
> - .platform_data = &d2net_led_data,
> - },
> -};
> -
> -static void __init d2net_gpio_leds_init(void)
> -{
> - int err;
> -
> - /* Configure GPIO over MPP max number. */
> - orion_gpio_set_valid(D2NET_GPIO_BLUE_LED_OFF, 1);
> -
> - /* Configure register blink_ctrl to allow SATA activity LED blinking. */
> - err = gpio_request(D2NET_GPIO_BLUE_LED_BLINK_CTRL, "blue LED blink");
> - if (err == 0) {
> - err = gpio_direction_output(D2NET_GPIO_BLUE_LED_BLINK_CTRL, 1);
> - if (err)
> - gpio_free(D2NET_GPIO_BLUE_LED_BLINK_CTRL);
> - }
> - if (err)
> - pr_err("d2net: failed to configure blue LED blink GPIO\n");
> -
> - platform_device_register(&d2net_gpio_leds);
> -}
> -
> -/****************************************************************************
> - * GPIO keys
> - ****************************************************************************/
> -
> -#define D2NET_GPIO_PUSH_BUTTON 18
> -#define D2NET_GPIO_POWER_SWITCH_ON 8
> -#define D2NET_GPIO_POWER_SWITCH_OFF 9
> -
> -#define D2NET_SWITCH_POWER_ON 0x1
> -#define D2NET_SWITCH_POWER_OFF 0x2
> -
> -static struct gpio_keys_button d2net_buttons[] = {
> - {
> - .type = EV_SW,
> - .code = D2NET_SWITCH_POWER_OFF,
> - .gpio = D2NET_GPIO_POWER_SWITCH_OFF,
> - .desc = "Power rocker switch (auto|off)",
> - .active_low = 0,
> - },
> - {
> - .type = EV_SW,
> - .code = D2NET_SWITCH_POWER_ON,
> - .gpio = D2NET_GPIO_POWER_SWITCH_ON,
> - .desc = "Power rocker switch (on|auto)",
> - .active_low = 0,
> - },
> - {
> - .type = EV_KEY,
> - .code = KEY_POWER,
> - .gpio = D2NET_GPIO_PUSH_BUTTON,
> - .desc = "Front Push Button",
> - .active_low = 0,
> - },
> -};
> -
> -static struct gpio_keys_platform_data d2net_button_data = {
> - .buttons = d2net_buttons,
> - .nbuttons = ARRAY_SIZE(d2net_buttons),
> -};
> -
> -static struct platform_device d2net_gpio_buttons = {
> - .name = "gpio-keys",
> - .id = -1,
> - .dev = {
> - .platform_data = &d2net_button_data,
> - },
> -};
> -
> -/*****************************************************************************
> - * General Setup
> - ****************************************************************************/
> -
> -static unsigned int d2net_mpp_modes[] __initdata = {
> - MPP0_GPIO, /* Board ID (bit 0) */
> - MPP1_GPIO, /* Board ID (bit 1) */
> - MPP2_GPIO, /* Board ID (bit 2) */
> - MPP3_GPIO, /* SATA 0 power */
> - MPP4_UNUSED,
> - MPP5_GPIO, /* Fan fail detection */
> - MPP6_GPIO, /* Red front LED */
> - MPP7_UNUSED,
> - MPP8_GPIO, /* Rear power switch (on|auto) */
> - MPP9_GPIO, /* Rear power switch (auto|off) */
> - MPP10_UNUSED,
> - MPP11_UNUSED,
> - MPP12_GPIO, /* SATA 1 power */
> - MPP13_UNUSED,
> - MPP14_SATA_LED, /* SATA 0 active */
> - MPP15_SATA_LED, /* SATA 1 active */
> - MPP16_GPIO, /* Blue front LED blink control */
> - MPP17_UNUSED,
> - MPP18_GPIO, /* Front button (0 = Released, 1 = Pushed ) */
> - MPP19_UNUSED,
> - 0,
> - /* 22: USB port 1 fuse (0 = Fail, 1 = Ok) */
> - /* 23: Blue front LED off */
> - /* 24: Inhibit board power off (0 = Disabled, 1 = Enabled) */
> -};
> -
> -#define D2NET_GPIO_INHIBIT_POWER_OFF 24
> -
> -static void __init d2net_init(void)
> -{
> - /*
> - * Setup basic Orion functions. Need to be called early.
> - */
> - orion5x_init();
> -
> - orion5x_mpp_conf(d2net_mpp_modes);
> -
> - /*
> - * Configure peripherals.
> - */
> - orion5x_ehci0_init();
> - orion5x_eth_init(&d2net_eth_data);
> - orion5x_i2c_init();
> - orion5x_uart0_init();
> -
> - d2net_sata_power_init();
> - orion5x_sata_init(&d2net_sata_data);
> -
> - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
> - ORION_MBUS_DEVBUS_BOOT_ATTR,
> - D2NET_NOR_BOOT_BASE,
> - D2NET_NOR_BOOT_SIZE);
> - platform_device_register(&d2net_nor_flash);
> -
> - platform_device_register(&d2net_gpio_buttons);
> -
> - d2net_gpio_leds_init();
> -
> - pr_notice("d2net: Flash write are not yet supported.\n");
> -
> - i2c_register_board_info(0, d2net_i2c_devices,
> - ARRAY_SIZE(d2net_i2c_devices));
> -
> - orion_gpio_set_valid(D2NET_GPIO_INHIBIT_POWER_OFF, 1);
> -}
> -
> -/* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */
> -
> -#ifdef CONFIG_MACH_D2NET
> -MACHINE_START(D2NET, "LaCie d2 Network")
> - .atag_offset = 0x100,
> - .init_machine = d2net_init,
> - .map_io = orion5x_map_io,
> - .init_early = orion5x_init_early,
> - .init_irq = orion5x_init_irq,
> - .init_time = orion5x_timer_init,
> - .fixup = tag_fixup_mem32,
> - .restart = orion5x_restart,
> -MACHINE_END
> -#endif
> -
> -#ifdef CONFIG_MACH_BIGDISK
> -MACHINE_START(BIGDISK, "LaCie Big Disk Network")
> - .atag_offset = 0x100,
> - .init_machine = d2net_init,
> - .map_io = orion5x_map_io,
> - .init_early = orion5x_init_early,
> - .init_irq = orion5x_init_irq,
> - .init_time = orion5x_timer_init,
> - .fixup = tag_fixup_mem32,
> - .restart = orion5x_restart,
> -MACHINE_END
> -#endif
> -
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 36/38] ARM: orion5x: convert Maxtor Shared Storage II to the Device Tree
2014-04-22 21:26 ` [PATCH v2 36/38] ARM: orion5x: convert Maxtor Shared Storage II to the " Thomas Petazzoni
@ 2014-04-23 11:33 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:33 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> This commit converts the Maxtor Shared Storage II Orion5x platform to
> the Device Tree. The only remaining things not converted are PCI and
> the special power off method.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Sylver Bruneau <sylver.bruneau@googlemail.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> .../boot/dts/orion5x-maxtor-shared-storage-2.dts | 178 +++++++++++++
> arch/arm/mach-orion5x/Kconfig | 5 +-
> arch/arm/mach-orion5x/Makefile | 2 +-
> arch/arm/mach-orion5x/board-dt.c | 3 +
> arch/arm/mach-orion5x/board-mss2.c | 90 +++++++
> arch/arm/mach-orion5x/common.h | 6 +
> arch/arm/mach-orion5x/mss2-setup.c | 274 ---------------------
> 8 files changed, 282 insertions(+), 277 deletions(-)
> create mode 100644 arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts
> create mode 100644 arch/arm/mach-orion5x/board-mss2.c
> delete mode 100644 arch/arm/mach-orion5x/mss2-setup.c
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 59397c2..629eee2 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -291,6 +291,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
> dra7-evm.dtb
> dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-d2-network.dtb \
> orion5x-lacie-ethernet-disk-mini-v2.dtb \
> + orion5x-maxtor-shared-storage-2.dtb \
> orion5x-rd88f5182-nas.dtb
> dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
> diff --git a/arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts b/arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts
> new file mode 100644
> index 0000000..ff34849
> --- /dev/null
> +++ b/arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts
> @@ -0,0 +1,178 @@
> +/*
> + * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> + * Copyright (C) Sylver Bruneau <sylver.bruneau@googlemail.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include "orion5x-mv88f5182.dtsi"
> +
> +/ {
> + model = "Maxtor Shared Storage II";
> + compatible = "maxtor,shared-storage-2", "marvell,orion5x-88f5182", "marvell,orion5x";
> +
> + memory {
> + reg = <0x00000000 0x4000000>; /* 64 MB */
> + };
> +
> + chosen {
> + bootargs = "console=ttyS0,115200n8 earlyprintk";
> + linux,stdout-path = &uart0;
> + };
> +
> + soc {
> + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
> + <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
> + <MBUS_ID(0x01, 0x0f) 0 0xff800000 0x40000>;
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-0 = <&pmx_buttons>;
> + pinctrl-names = "default";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + power {
> + label = "Power";
> + linux,code = <KEY_POWER>;
> + gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
> + };
> +
> + reset {
> + label = "Reset";
> + linux,code = <KEY_RESTART>;
> + gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
> + };
> + };
> +};
> +
> +&devbus_bootcs {
> + status = "okay";
> +
> + devbus,keep-config;
> +
> + /*
> + * Currently the MTD code does not recognize the MX29LV400CBCT
> + * as a bottom-type device. This could cause risks of
> + * accidentally erasing critical flash sectors. We thus define
> + * a single, write-protected partition covering the whole
> + * flash. TODO: once the flash part TOP/BOTTOM detection
> + * issue is sorted out in the MTD code, break this into at
> + * least three partitions: 'u-boot code', 'u-boot environment'
> + * and 'whatever is left'.
> + */
> + flash at 0 {
> + compatible = "cfi-flash";
> + reg = <0 0x40000>;
> + bank-width = <1>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + };
> +};
> +
> +&mdio {
> + status = "okay";
> +
> + ethphy: ethernet-phy {
> + reg = <8>;
> + };
> +};
> +
> +&ehci0 {
> + status = "okay";
> +};
> +
> +ð {
> + status = "okay";
> +
> + ethernet-port at 0 {
> + phy-handle = <ðphy>;
> + };
> +};
> +
> +&i2c {
> + status = "okay";
> + clock-frequency = <100000>;
> + #address-cells = <1>;
> +
> + rtc at 68 {
> + compatible = "st,m41t81";
> + reg = <0x68>;
> + pinctrl-0 = <&pmx_rtc>;
> + pinctrl-names = "default";
> + interrupt-parent = <&gpio0>;
> + interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
> + };
> +};
> +
> +&pinctrl {
> + pinctrl-0 = <&pmx_leds &pmx_misc>;
> + pinctrl-names = "default";
> +
> + pmx_buttons: pmx-buttons {
> + marvell,pins = "mpp11", "mpp12";
> + marvell,function = "gpio";
> + };
> +
> + /*
> + * MPP0: Power LED
> + * MPP1: Error LED
> + */
> + pmx_leds: pmx-leds {
> + marvell,pins = "mpp0", "mpp1";
> + marvell,function = "gpio";
> + };
> +
> + /*
> + * MPP4: HDD ind. (Single/Dual)
> + * MPP5: HD0 5V control
> + * MPP6: HD0 12V control
> + * MPP7: HD1 5V control
> + * MPP8: HD1 12V control
> + */
> + pmx_misc: pmx-misc {
> + marvell,pins = "mpp4", "mpp5", "mpp6", "mpp7", "mpp8", "mpp10";
> + marvell,function = "gpio";
> + };
> +
> + pmx_rtc: pmx-rtc {
> + marvell,pins = "mpp3";
> + marvell,function = "gpio";
> + };
> +
> + pmx_sata0_led_active: pmx-sata0-led-active {
> + marvell,pins = "mpp14";
> + marvell,function = "sata0";
> + };
> +
> + pmx_sata1_led_active: pmx-sata1-led-active {
> + marvell,pins = "mpp15";
> + marvell,function = "sata1";
> + };
> +
> + /*
> + * Non MPP GPIOs:
> + * GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok)
> + * GPIO 23: Blue front LED off
> + * GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled)
> + */
> +};
> +
> +&sata {
> + pinctrl-0 = <&pmx_sata0_led_active
> + &pmx_sata1_led_active>;
> + pinctrl-names = "default";
> + status = "okay";
> + nr-ports = <2>;
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
> index 3c4ad83..2412efb 100644
> --- a/arch/arm/mach-orion5x/Kconfig
> +++ b/arch/arm/mach-orion5x/Kconfig
> @@ -129,8 +129,9 @@ config MACH_NET2BIG
> Say 'Y' here if you want your kernel to support the
> LaCie 2Big Network NAS.
>
> -config MACH_MSS2
> - bool "Maxtor Shared Storage II"
> +config MACH_MSS2_DT
> + bool "Maxtor Shared Storage II (Flattened Device Tree)"
> + select ARCH_ORION5X_DT
> help
> Say 'Y' here if you want your kernel to support the
> Maxtor Shared Storage II platform.
> diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
> index 787dcee..a40b5c9 100644
> --- a/arch/arm/mach-orion5x/Makefile
> +++ b/arch/arm/mach-orion5x/Makefile
> @@ -13,7 +13,6 @@ obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o
> obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o
> obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o
> obj-$(CONFIG_MACH_NET2BIG) += net2big-setup.o
> -obj-$(CONFIG_MACH_MSS2) += mss2-setup.o
> obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o
> obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o
> obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o
> @@ -22,4 +21,5 @@ obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o
>
> obj-$(CONFIG_ARCH_ORION5X_DT) += board-dt.o
> obj-$(CONFIG_MACH_D2NET_DT) += board-d2net.o
> +obj-$(CONFIG_MACH_MSS2_DT) += board-mss2.o
> obj-$(CONFIG_MACH_RD88F5182_DT) += board-rd88f5182.o
> diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c
> index 78d2e52..35d418f 100644
> --- a/arch/arm/mach-orion5x/board-dt.c
> +++ b/arch/arm/mach-orion5x/board-dt.c
> @@ -61,6 +61,9 @@ static void __init orion5x_dt_init(void)
> cpu_idle_poll_ctrl(true);
> }
>
> + if (of_machine_is_compatible("maxtor,shared-storage-2"))
> + mss2_init();
> +
> of_platform_populate(NULL, of_default_bus_match_table,
> orion5x_auxdata_lookup, NULL);
> }
> diff --git a/arch/arm/mach-orion5x/board-mss2.c b/arch/arm/mach-orion5x/board-mss2.c
> new file mode 100644
> index 0000000..66f9c3b
> --- /dev/null
> +++ b/arch/arm/mach-orion5x/board-mss2.c
> @@ -0,0 +1,90 @@
> +/*
> + * Maxtor Shared Storage II Board Setup
> + *
> + * Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/platform_device.h>
> +#include <linux/pci.h>
> +#include <linux/irq.h>
> +#include <asm/mach-types.h>
> +#include <asm/mach/arch.h>
> +#include <asm/mach/pci.h>
> +#include <mach/orion5x.h>
> +#include <mach/bridge-regs.h>
> +#include "common.h"
> +
> +/*****************************************************************************
> + * Maxtor Shared Storage II Info
> + ****************************************************************************/
> +
> +/****************************************************************************
> + * PCI setup
> + ****************************************************************************/
> +static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
> +{
> + int irq;
> +
> + /*
> + * Check for devices with hard-wired IRQs.
> + */
> + irq = orion5x_pci_map_irq(dev, slot, pin);
> + if (irq != -1)
> + return irq;
> +
> + return -1;
> +}
> +
> +static struct hw_pci mss2_pci __initdata = {
> + .nr_controllers = 2,
> + .setup = orion5x_pci_sys_setup,
> + .scan = orion5x_pci_sys_scan_bus,
> + .map_irq = mss2_pci_map_irq,
> +};
> +
> +static int __init mss2_pci_init(void)
> +{
> + if (machine_is_mss2())
> + pci_common_init(&mss2_pci);
> +
> + return 0;
> +}
> +subsys_initcall(mss2_pci_init);
> +
> +/*****************************************************************************
> + * MSS2 power off method
> + ****************************************************************************/
> +/*
> + * On the Maxtor Shared Storage II, the shutdown process is the following :
> + * - Userland modifies U-boot env to tell U-boot to go idle at next boot
> + * - The board reboots
> + * - U-boot starts and go into an idle mode until the user press "power"
> + */
> +static void mss2_power_off(void)
> +{
> + u32 reg;
> +
> + /*
> + * Enable and issue soft reset
> + */
> + reg = readl(RSTOUTn_MASK);
> + reg |= 1 << 2;
> + writel(reg, RSTOUTn_MASK);
> +
> + reg = readl(CPU_SOFT_RESET);
> + reg |= 1;
> + writel(reg, CPU_SOFT_RESET);
> +}
> +
> +void __init mss2_init(void)
> +{
> + /* register mss2 specific power-off method */
> + pm_power_off = mss2_power_off;
> +}
> diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
> index 4470e31..26d6f34 100644
> --- a/arch/arm/mach-orion5x/common.h
> +++ b/arch/arm/mach-orion5x/common.h
> @@ -68,6 +68,12 @@ struct meminfo;
> struct tag;
> extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *);
>
> +#ifdef CONFIG_MACH_MSS2_DT
> +extern void mss2_init(void);
> +#else
> +static inline void mss2_init(void) {}
> +#endif
> +
> /*****************************************************************************
> * Helpers to access Orion registers
> ****************************************************************************/
> diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c
> deleted file mode 100644
> index e105130..0000000
> --- a/arch/arm/mach-orion5x/mss2-setup.c
> +++ /dev/null
> @@ -1,274 +0,0 @@
> -/*
> - * Maxtor Shared Storage II Board Setup
> - *
> - * Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com>
> - *
> - * This program is free software; you can redistribute it and/or
> - * modify it under the terms of the GNU General Public License
> - * as published by the Free Software Foundation; either version
> - * 2 of the License, or (at your option) any later version.
> - */
> -
> -#include <linux/kernel.h>
> -#include <linux/init.h>
> -#include <linux/platform_device.h>
> -#include <linux/pci.h>
> -#include <linux/irq.h>
> -#include <linux/mtd/physmap.h>
> -#include <linux/mv643xx_eth.h>
> -#include <linux/leds.h>
> -#include <linux/gpio_keys.h>
> -#include <linux/input.h>
> -#include <linux/i2c.h>
> -#include <linux/ata_platform.h>
> -#include <linux/gpio.h>
> -#include <asm/mach-types.h>
> -#include <asm/mach/arch.h>
> -#include <asm/mach/pci.h>
> -#include <mach/orion5x.h>
> -#include <mach/bridge-regs.h>
> -#include "common.h"
> -#include "mpp.h"
> -
> -#define MSS2_NOR_BOOT_BASE 0xff800000
> -#define MSS2_NOR_BOOT_SIZE SZ_256K
> -
> -/*****************************************************************************
> - * Maxtor Shared Storage II Info
> - ****************************************************************************/
> -
> -/*
> - * Maxtor Shared Storage II hardware :
> - * - Marvell 88F5182-A2 C500
> - * - Marvell 88E1111 Gigabit Ethernet PHY
> - * - RTC M41T81 (@0x68) on I2C bus
> - * - 256KB NOR flash
> - * - 64MB of RAM
> - */
> -
> -/*****************************************************************************
> - * 256KB NOR Flash on BOOT Device
> - ****************************************************************************/
> -
> -static struct physmap_flash_data mss2_nor_flash_data = {
> - .width = 1,
> -};
> -
> -static struct resource mss2_nor_flash_resource = {
> - .flags = IORESOURCE_MEM,
> - .start = MSS2_NOR_BOOT_BASE,
> - .end = MSS2_NOR_BOOT_BASE + MSS2_NOR_BOOT_SIZE - 1,
> -};
> -
> -static struct platform_device mss2_nor_flash = {
> - .name = "physmap-flash",
> - .id = 0,
> - .dev = {
> - .platform_data = &mss2_nor_flash_data,
> - },
> - .resource = &mss2_nor_flash_resource,
> - .num_resources = 1,
> -};
> -
> -/****************************************************************************
> - * PCI setup
> - ****************************************************************************/
> -static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
> -{
> - int irq;
> -
> - /*
> - * Check for devices with hard-wired IRQs.
> - */
> - irq = orion5x_pci_map_irq(dev, slot, pin);
> - if (irq != -1)
> - return irq;
> -
> - return -1;
> -}
> -
> -static struct hw_pci mss2_pci __initdata = {
> - .nr_controllers = 2,
> - .setup = orion5x_pci_sys_setup,
> - .scan = orion5x_pci_sys_scan_bus,
> - .map_irq = mss2_pci_map_irq,
> -};
> -
> -static int __init mss2_pci_init(void)
> -{
> - if (machine_is_mss2())
> - pci_common_init(&mss2_pci);
> -
> - return 0;
> -}
> -subsys_initcall(mss2_pci_init);
> -
> -
> -/*****************************************************************************
> - * Ethernet
> - ****************************************************************************/
> -
> -static struct mv643xx_eth_platform_data mss2_eth_data = {
> - .phy_addr = MV643XX_ETH_PHY_ADDR(8),
> -};
> -
> -/*****************************************************************************
> - * SATA
> - ****************************************************************************/
> -
> -static struct mv_sata_platform_data mss2_sata_data = {
> - .n_ports = 2,
> -};
> -
> -/*****************************************************************************
> - * GPIO buttons
> - ****************************************************************************/
> -
> -#define MSS2_GPIO_KEY_RESET 12
> -#define MSS2_GPIO_KEY_POWER 11
> -
> -static struct gpio_keys_button mss2_buttons[] = {
> - {
> - .code = KEY_POWER,
> - .gpio = MSS2_GPIO_KEY_POWER,
> - .desc = "Power",
> - .active_low = 1,
> - }, {
> - .code = KEY_RESTART,
> - .gpio = MSS2_GPIO_KEY_RESET,
> - .desc = "Reset",
> - .active_low = 1,
> - },
> -};
> -
> -static struct gpio_keys_platform_data mss2_button_data = {
> - .buttons = mss2_buttons,
> - .nbuttons = ARRAY_SIZE(mss2_buttons),
> -};
> -
> -static struct platform_device mss2_button_device = {
> - .name = "gpio-keys",
> - .id = -1,
> - .dev = {
> - .platform_data = &mss2_button_data,
> - },
> -};
> -
> -/*****************************************************************************
> - * RTC m41t81 on I2C bus
> - ****************************************************************************/
> -
> -#define MSS2_GPIO_RTC_IRQ 3
> -
> -static struct i2c_board_info __initdata mss2_i2c_rtc = {
> - I2C_BOARD_INFO("m41t81", 0x68),
> -};
> -
> -/*****************************************************************************
> - * MSS2 power off method
> - ****************************************************************************/
> -/*
> - * On the Maxtor Shared Storage II, the shutdown process is the following :
> - * - Userland modifies U-boot env to tell U-boot to go idle at next boot
> - * - The board reboots
> - * - U-boot starts and go into an idle mode until the user press "power"
> - */
> -static void mss2_power_off(void)
> -{
> - u32 reg;
> -
> - /*
> - * Enable and issue soft reset
> - */
> - reg = readl(RSTOUTn_MASK);
> - reg |= 1 << 2;
> - writel(reg, RSTOUTn_MASK);
> -
> - reg = readl(CPU_SOFT_RESET);
> - reg |= 1;
> - writel(reg, CPU_SOFT_RESET);
> -}
> -
> -/****************************************************************************
> - * General Setup
> - ****************************************************************************/
> -static unsigned int mss2_mpp_modes[] __initdata = {
> - MPP0_GPIO, /* Power LED */
> - MPP1_GPIO, /* Error LED */
> - MPP2_UNUSED,
> - MPP3_GPIO, /* RTC interrupt */
> - MPP4_GPIO, /* HDD ind. (Single/Dual)*/
> - MPP5_GPIO, /* HD0 5V control */
> - MPP6_GPIO, /* HD0 12V control */
> - MPP7_GPIO, /* HD1 5V control */
> - MPP8_GPIO, /* HD1 12V control */
> - MPP9_UNUSED,
> - MPP10_GPIO, /* Fan control */
> - MPP11_GPIO, /* Power button */
> - MPP12_GPIO, /* Reset button */
> - MPP13_UNUSED,
> - MPP14_SATA_LED, /* SATA 0 active */
> - MPP15_SATA_LED, /* SATA 1 active */
> - MPP16_UNUSED,
> - MPP17_UNUSED,
> - MPP18_UNUSED,
> - MPP19_UNUSED,
> - 0,
> -};
> -
> -static void __init mss2_init(void)
> -{
> - /* Setup basic Orion functions. Need to be called early. */
> - orion5x_init();
> -
> - orion5x_mpp_conf(mss2_mpp_modes);
> -
> - /*
> - * MPP[20] Unused
> - * MPP[21] PCI clock
> - * MPP[22] USB 0 over current
> - * MPP[23] USB 1 over current
> - */
> -
> - /*
> - * Configure peripherals.
> - */
> - orion5x_ehci0_init();
> - orion5x_ehci1_init();
> - orion5x_eth_init(&mss2_eth_data);
> - orion5x_i2c_init();
> - orion5x_sata_init(&mss2_sata_data);
> - orion5x_uart0_init();
> - orion5x_xor_init();
> -
> - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
> - ORION_MBUS_DEVBUS_BOOT_ATTR,
> - MSS2_NOR_BOOT_BASE,
> - MSS2_NOR_BOOT_SIZE);
> - platform_device_register(&mss2_nor_flash);
> -
> - platform_device_register(&mss2_button_device);
> -
> - if (gpio_request(MSS2_GPIO_RTC_IRQ, "rtc") == 0) {
> - if (gpio_direction_input(MSS2_GPIO_RTC_IRQ) == 0)
> - mss2_i2c_rtc.irq = gpio_to_irq(MSS2_GPIO_RTC_IRQ);
> - else
> - gpio_free(MSS2_GPIO_RTC_IRQ);
> - }
> - i2c_register_board_info(0, &mss2_i2c_rtc, 1);
> -
> - /* register mss2 specific power-off method */
> - pm_power_off = mss2_power_off;
> -}
> -
> -MACHINE_START(MSS2, "Maxtor Shared Storage II")
> - /* Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com> */
> - .atag_offset = 0x100,
> - .init_machine = mss2_init,
> - .map_io = orion5x_map_io,
> - .init_early = orion5x_init_early,
> - .init_irq = orion5x_init_irq,
> - .init_time = orion5x_timer_init,
> - .fixup = tag_fixup_mem32,
> - .restart = orion5x_restart,
> -MACHINE_END
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 37/38] ARM: orion: remove no longer needed DT IRQ code
2014-04-22 21:26 ` [PATCH v2 37/38] ARM: orion: remove no longer needed DT IRQ code Thomas Petazzoni
@ 2014-04-23 11:33 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:33 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> Following the move of the Orion5x Device Tree support to use
> irqchip_init() for the interrupt controller probing, the
> plat-orion/irq.c code for DT-probing of the interrupt controller is no
> longer necessary, so we can get rid of it.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> arch/arm/plat-orion/include/plat/irq.h | 1 -
> arch/arm/plat-orion/irq.c | 32 --------------------------------
> 2 files changed, 33 deletions(-)
>
> diff --git a/arch/arm/plat-orion/include/plat/irq.h b/arch/arm/plat-orion/include/plat/irq.h
> index 50547e4..96be19e 100644
> --- a/arch/arm/plat-orion/include/plat/irq.h
> +++ b/arch/arm/plat-orion/include/plat/irq.h
> @@ -12,5 +12,4 @@
> #define __PLAT_IRQ_H
>
> void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr);
> -void __init orion_dt_init_irq(void);
> #endif
> diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
> index 27ec18b..8c1fc06 100644
> --- a/arch/arm/plat-orion/irq.c
> +++ b/arch/arm/plat-orion/irq.c
> @@ -38,35 +38,3 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
> irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
> IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
> }
> -
> -#ifdef CONFIG_OF
> -static int __init orion_add_irq_domain(struct device_node *np,
> - struct device_node *interrupt_parent)
> -{
> - int i = 0;
> - void __iomem *base;
> -
> - do {
> - base = of_iomap(np, i);
> - if (base) {
> - orion_irq_init(i * 32, base + 0x04);
> - i++;
> - }
> - } while (base);
> -
> - irq_domain_add_legacy(np, i * 32, 0, 0,
> - &irq_domain_simple_ops, NULL);
> - return 0;
> -}
> -
> -static const struct of_device_id orion_irq_match[] = {
> - { .compatible = "marvell,orion-intc",
> - .data = orion_add_irq_domain, },
> - {},
> -};
> -
> -void __init orion_dt_init_irq(void)
> -{
> - of_irq_init(orion_irq_match);
> -}
> -#endif
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 38/38] ARM: orion: remove no longer needed gpio DT code
2014-04-22 21:26 ` [PATCH v2 38/38] ARM: orion: remove no longer needed gpio DT code Thomas Petazzoni
@ 2014-04-23 11:34 ` Sebastian Hesselbarth
0 siblings, 0 replies; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:34 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> Following the move to pure DT-based probing of the GPIO controllers on
> Orion5x, some code in plat-orion/orion-gpio.c can be removed as it is
> no longer used.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> arch/arm/plat-orion/gpio.c | 48 ---------------------------
> arch/arm/plat-orion/include/plat/orion-gpio.h | 1 -
> 2 files changed, 49 deletions(-)
>
> diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
> index 6816192..b61a3bc 100644
> --- a/arch/arm/plat-orion/gpio.c
> +++ b/arch/arm/plat-orion/gpio.c
> @@ -597,51 +597,3 @@ void __init orion_gpio_init(struct device_node *np,
>
> orion_gpio_chip_count++;
> }
> -
> -#ifdef CONFIG_OF
> -static void __init orion_gpio_of_init_one(struct device_node *np,
> - int irq_gpio_base)
> -{
> - int ngpio, gpio_base, mask_offset;
> - void __iomem *base;
> - int ret, i;
> - int irqs[4];
> - int secondary_irq_base;
> -
> - ret = of_property_read_u32(np, "ngpio", &ngpio);
> - if (ret)
> - goto out;
> - ret = of_property_read_u32(np, "mask-offset", &mask_offset);
> - if (ret == -EINVAL)
> - mask_offset = 0;
> - else
> - goto out;
> - base = of_iomap(np, 0);
> - if (!base)
> - goto out;
> -
> - secondary_irq_base = irq_gpio_base + (32 * orion_gpio_chip_count);
> - gpio_base = 32 * orion_gpio_chip_count;
> -
> - /* Get the interrupt numbers. Each chip can have up to 4
> - * interrupt handlers, with each handler dealing with 8 GPIO
> - * pins. */
> -
> - for (i = 0; i < 4; i++)
> - irqs[i] = irq_of_parse_and_map(np, i);
> -
> - orion_gpio_init(np, gpio_base, ngpio, base, mask_offset,
> - secondary_irq_base, irqs);
> - return;
> -out:
> - pr_err("%s: %s: missing mandatory property\n", __func__, np->name);
> -}
> -
> -void __init orion_gpio_of_init(int irq_gpio_base)
> -{
> - struct device_node *np;
> -
> - for_each_compatible_node(np, NULL, "marvell,orion-gpio")
> - orion_gpio_of_init_one(np, irq_gpio_base);
> -}
> -#endif
> diff --git a/arch/arm/plat-orion/include/plat/orion-gpio.h b/arch/arm/plat-orion/include/plat/orion-gpio.h
> index 614dcac..e763988 100644
> --- a/arch/arm/plat-orion/include/plat/orion-gpio.h
> +++ b/arch/arm/plat-orion/include/plat/orion-gpio.h
> @@ -33,5 +33,4 @@ void __init orion_gpio_init(struct device_node *np,
> int secondary_irq_base,
> int irq[4]);
>
> -void __init orion_gpio_of_init(int irq_gpio_base);
> #endif
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
` (37 preceding siblings ...)
2014-04-22 21:26 ` [PATCH v2 38/38] ARM: orion: remove no longer needed gpio DT code Thomas Petazzoni
@ 2014-04-23 11:35 ` Sebastian Hesselbarth
2014-04-23 12:24 ` Thomas Petazzoni
38 siblings, 1 reply; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-23 11:35 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> Jason, Andrew, Sebastian, Gregory,
>
> Here is the second version of the Orion5x big DT migration: it moves
> over to the Device Tree the probing of a large number of devices, up
> to a point where on platform (edmini_v2) can be fully converted, and
> three other platforms can be almost completely converted.
>
> Summary of the patches:
>
> * Patches 1 and 2 are fixes that have already been taken by Jason
> Cooper in mvebu/fixes.
>
> * Patches 3 and 4 add the Orion pinctrl and Orion clock drivers
> respectively.
>
> * Patches 5 to 9 extend the existing mvebu-devbus driver to also
> cover the Orion platform.
>
> * Patches 10 to 33 progressively migrate the edmini_v2 platform more
> and more to the Device Tree, which mainly consists of SoC-level
> changes (using DT probed timer, clocks, etc.)
>
> * Patches 34, 35 and 36 convert three other Orion5x platforms to the
> Device Tree.
>
> * Patches 37 and 38 make some follow-up clean up in
> arch/arm/plat-orion/ of code that is no longer used after this DT
> migration.
>
> Changes since v1:
>
> The vast majority of the changes were made according to the
> suggestions and review of Sebastian Hesselbarth. Thanks to him for the
> very detailed review.
>
> * In the pinctrl driver:
> - change pci(rstout) to pcie(rstout)
> - rename double pci functions pci-1
>
> * In the clock driver:
> - use decimal values for shift values
> - join two similar cases
>
> * In the mvebu-devbus driver:
> - minor fixes in DT binding documentation
> - use _SHIFT instead of _BIT for Armada definitions
> - use _SHIFT where needed for Orion definitions, use BIT() directly
> in the macro definition for single bit fields, and define _MASK
> values.
> - introduce a devbus,keep-config DT property to make timing
> parameters optional, which is useful when migrating platforms to
> the Device Tree since we may not have their Device Bus timing
> details readily available.
>
> * Added Acked-by from Sebastian on the following patches:
I guess you now have an Acked-by for each of the individual patches.
Great work, thanks Thomas!
Sebastian
> - ARM: orion5x: move interrupt controller node into ocp
> - ARM: orion5x: switch to preprocessor includes in DT
> - ARM: orion5x: use existing dt-bindings include for Device Tree files
> - ARM: orion5x: add interrupt for Ethernet in Device Tree
> - ARM: orion5x: switch to use the clock driver for DT platforms
> - ARM: orion5x: enable pinctrl driver at SoC level
> - ARM: orion5x: add Device Bus description at SoC level
> - ARM: orion5x: update I2C description at SoC level
> - ARM: orion5x: update I2C description at SoC level
> - ARM: orion5x: remove unneeded code for edmini_v2
>
> * Numerous Device Tree improvements:
> - add node labels for all devices, and used them in the .dts
> files.
> - add linux,stdout-path chosen property.
> - add missing chosen and memory nodes for d2net
> - use the clocks property instead of the clock-frequency property
> for UART controllers, and fixed board DTs accordingly.
> - rename the xor node to dma-controller, to match ePAPR.
> - rename gpio_leds to gpio-leds and gpio_keys to gpio-keys.
> - use GPIO dt-bindings header file where possible.
> - use vendor prefixes for I2C devices
>
> * Changed board-dt.c to call mvebu_mbus_dt_init() in
> ->init_machine(), which allows to remove ->init_time() entirely.
>
> * One more board converted to the Device Tree: the Maxtor Shared
> Storage II.
>
> Thomas
>
> Thomas Petazzoni (38):
> ARM: orion5x: fix target ID for crypto SRAM window
> memory: mvebu-devbus: fix the conversion of the bus width
> pinctrl: mvebu: new driver for Orion platforms
> clk: mvebu: add Orion5x clock driver
> memory: mvebu-devbus: use ARMADA_ prefix in defines
> memory: mvebu-devbus: use _SHIFT suffixes instead of _BIT
> memory: mvebu-devbus: split functions
> memory: mvebu-devbus: add Orion5x support
> memory: mvebu-devbus: add a devbus,keep-config property
> ARM: orion5x: move interrupt controller node into ocp
> ARM: orion5x: switch to preprocessor includes in DT
> ARM: orion5x: use existing dt-bindings include for Device Tree files
> ARM: orion5x: convert DT to use the mvebu-mbus driver
> ARM: orion5x: add node labels in Orion5x SoC Device Tree file
> ARM: orion5x: use gpio-keys and gpio-leds instead of
> gpio_keys/gpio_leds in edmini_v2
> ARM: orion5x: add linux,stdout-path to edmini_v2
> ARM: orion5x: use node labels for UART and SATA on edmini_v2
> ARM: orion5x: rename XOR node to dma-controller@<address>
> ARM: orion5x: add interrupt for Ethernet in Device Tree
> ARM: orion5x: switch to use the clock driver for DT platforms
> ARM: orion5x: convert to use 'clocks' property for UART controllers
> ARM: orion: switch to a per-platform handle_irq() function
> ARM: orion5x: switch to DT interrupts and timer
> ARM: orion5x: enable pinctrl driver at SoC level
> ARM: orion5x: update I2C description at SoC level
> ARM: orion5x: add Device Bus description at SoC level
> ARM: orion5x: add standard pinctrl configs for sata0 and sata1
> ARM: orion5x: convert edmini_v2 to DT pinctrl
> ARM: orion5x: use DT to describe I2C devices on edmini_v2
> ARM: orion5x: use DT to describe EHCI on edmini_v2
> ARM: orion5x: use DT to describe NOR on edmini_v2
> ARM: orion5x: keep TODO list in edmini_v2 DT
> ARM: orion5x: remove unneeded code for edmini_v2
> ARM: orion5x: convert RD-88F5182 to Device Tree
> ARM: orion5x: convert d2net to Device Tree
> ARM: orion5x: convert Maxtor Shared Storage II to the Device Tree
> ARM: orion: remove no longer needed DT IRQ code
> ARM: orion: remove no longer needed gpio DT code
>
> .../devicetree/bindings/clock/mvebu-core-clock.txt | 8 +
> .../bindings/memory-controllers/mvebu-devbus.txt | 32 +-
> .../bindings/pinctrl/marvell,orion-pinctrl.txt | 91 +++++
> arch/arm/boot/dts/Makefile | 5 +-
> arch/arm/boot/dts/orion5x-lacie-d2-network.dts | 236 +++++++++++++
> .../dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 141 ++++++--
> .../boot/dts/orion5x-maxtor-shared-storage-2.dts | 178 ++++++++++
> arch/arm/boot/dts/orion5x-mv88f5182.dtsi | 45 +++
> arch/arm/boot/dts/orion5x-rd88f5182-nas.dts | 177 ++++++++++
> arch/arm/boot/dts/orion5x.dtsi | 289 +++++++++-------
> arch/arm/mach-dove/irq.c | 36 ++
> arch/arm/mach-kirkwood/irq.c | 36 ++
> arch/arm/mach-orion5x/Kconfig | 37 +--
> arch/arm/mach-orion5x/Makefile | 7 +-
> arch/arm/mach-orion5x/board-d2net.c | 109 ++++++
> arch/arm/mach-orion5x/board-dt.c | 18 +-
> arch/arm/mach-orion5x/board-mss2.c | 90 +++++
> arch/arm/mach-orion5x/board-rd88f5182.c | 116 +++++++
> arch/arm/mach-orion5x/common.h | 15 +-
> arch/arm/mach-orion5x/d2net-setup.c | 365 ---------------------
> arch/arm/mach-orion5x/edmini_v2-setup.c | 169 ----------
> arch/arm/mach-orion5x/irq.c | 28 ++
> arch/arm/mach-orion5x/mss2-setup.c | 274 ----------------
> arch/arm/plat-orion/gpio.c | 48 ---
> arch/arm/plat-orion/include/plat/irq.h | 1 -
> arch/arm/plat-orion/include/plat/orion-gpio.h | 1 -
> arch/arm/plat-orion/irq.c | 77 -----
> drivers/clk/mvebu/Kconfig | 4 +
> drivers/clk/mvebu/Makefile | 1 +
> drivers/clk/mvebu/orion.c | 210 ++++++++++++
> drivers/memory/mvebu-devbus.c | 234 +++++++++----
> drivers/pinctrl/mvebu/Kconfig | 4 +
> drivers/pinctrl/mvebu/Makefile | 1 +
> drivers/pinctrl/mvebu/pinctrl-orion.c | 261 +++++++++++++++
> 34 files changed, 2162 insertions(+), 1182 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt
> create mode 100644 arch/arm/boot/dts/orion5x-lacie-d2-network.dts
> create mode 100644 arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts
> create mode 100644 arch/arm/boot/dts/orion5x-mv88f5182.dtsi
> create mode 100644 arch/arm/boot/dts/orion5x-rd88f5182-nas.dts
> create mode 100644 arch/arm/mach-orion5x/board-d2net.c
> create mode 100644 arch/arm/mach-orion5x/board-mss2.c
> create mode 100644 arch/arm/mach-orion5x/board-rd88f5182.c
> delete mode 100644 arch/arm/mach-orion5x/d2net-setup.c
> delete mode 100644 arch/arm/mach-orion5x/edmini_v2-setup.c
> delete mode 100644 arch/arm/mach-orion5x/mss2-setup.c
> create mode 100644 drivers/clk/mvebu/orion.c
> create mode 100644 drivers/pinctrl/mvebu/pinctrl-orion.c
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 17/38] ARM: orion5x: use node labels for UART and SATA on edmini_v2
2014-04-23 11:23 ` Sebastian Hesselbarth
@ 2014-04-23 12:23 ` Thomas Petazzoni
2014-04-23 12:46 ` Ezequiel Garcia
0 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-23 12:23 UTC (permalink / raw)
To: linux-arm-kernel
Dear Sebastian Hesselbarth,
On Wed, 23 Apr 2014 13:23:38 +0200, Sebastian Hesselbarth wrote:
> On 04/22/2014 11:26 PM, Thomas Petazzoni wrote:
> > This commit converts the existing devices described in the edmini_v2
> > Device Tree to use node labels: the UART and SATA device. Also, it
> > reorders the eth and mdio node label references to be sorted
> > alphabetically.
> >
> > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
>
> Does this also mean, we agree on the "using node label references" topic
> for Kirkwood?
Well, for Kirkwood I don't know, I'm not the one who has done most of
the Kirkwood conversions.
I continue to have mixed feelings about the usage of node labels. To
me, it breaks the "tree" nature of the Device Tree, by turning it into
just a bunch of &bleh { ... } long list of statements. But this is
purely subjective (just like your opinion, I believe), and I wanted to
move forward with this, so I just did what was necessary :-)
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion
2014-04-23 11:35 ` [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Sebastian Hesselbarth
@ 2014-04-23 12:24 ` Thomas Petazzoni
0 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-23 12:24 UTC (permalink / raw)
To: linux-arm-kernel
Dear Sebastian Hesselbarth,
On Wed, 23 Apr 2014 13:35:04 +0200, Sebastian Hesselbarth wrote:
> > * Added Acked-by from Sebastian on the following patches:
>
> I guess you now have an Acked-by for each of the individual patches.
Seems so, yes :-)
> Great work, thanks Thomas!
Thanks a lot to you for the detailed review!
I will probably stop here in terms of Orion5x conversion for 3.16, but
I'm already planning on continuing this conversion effort by looking at
more boards, and at the PCI/PCIe support through pci-mvebu.
Thanks,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 17/38] ARM: orion5x: use node labels for UART and SATA on edmini_v2
2014-04-23 12:23 ` Thomas Petazzoni
@ 2014-04-23 12:46 ` Ezequiel Garcia
2014-04-23 12:48 ` Thomas Petazzoni
0 siblings, 1 reply; 87+ messages in thread
From: Ezequiel Garcia @ 2014-04-23 12:46 UTC (permalink / raw)
To: linux-arm-kernel
Thomas,
On Apr 23, Thomas Petazzoni wrote:
[..]
>
> I continue to have mixed feelings about the usage of node labels. To
> me, it breaks the "tree" nature of the Device Tree, by turning it into
> just a bunch of &bleh { ... } long list of statements. But this is
> purely subjective (just like your opinion, I believe), and I wanted to
> move forward with this, so I just did what was necessary :-)
>
Let me try to convince you a little :) Regressions like this would never
appear with proper usage of phandles:
http://www.spinics.net/lists/arm-kernel/msg322999.html
This may be a matter of taste, but when I'm on the devicetree "user" side,
I really don't care if the USB0 is part of some super complex tree, but just
want to enable it in my board. Writing:
&usb0 {
status = "okay";
};
seems to be just fine.
--
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 17/38] ARM: orion5x: use node labels for UART and SATA on edmini_v2
2014-04-23 12:46 ` Ezequiel Garcia
@ 2014-04-23 12:48 ` Thomas Petazzoni
0 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-23 12:48 UTC (permalink / raw)
To: linux-arm-kernel
Dear Ezequiel Garcia,
On Wed, 23 Apr 2014 09:46:26 -0300, Ezequiel Garcia wrote:
> > I continue to have mixed feelings about the usage of node labels. To
> > me, it breaks the "tree" nature of the Device Tree, by turning it into
> > just a bunch of &bleh { ... } long list of statements. But this is
> > purely subjective (just like your opinion, I believe), and I wanted to
> > move forward with this, so I just did what was necessary :-)
> >
>
> Let me try to convince you a little :) Regressions like this would never
> appear with proper usage of phandles:
>
> http://www.spinics.net/lists/arm-kernel/msg322999.html
>
> This may be a matter of taste, but when I'm on the devicetree "user" side,
> I really don't care if the USB0 is part of some super complex tree, but just
> want to enable it in my board. Writing:
>
> &usb0 {
> status = "okay";
> };
>
> seems to be just fine.
Yes, yes, for sure I do understand this argument. Quite certainly, if I
decided to make the change to use phandles all over the place, it's
probably because I thought that there were some valid arguments
being given ;-)
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 03/38] pinctrl: mvebu: new driver for Orion platforms
2014-04-22 21:26 ` [PATCH v2 03/38] pinctrl: mvebu: new driver for Orion platforms Thomas Petazzoni
2014-04-23 11:16 ` Sebastian Hesselbarth
@ 2014-04-23 14:17 ` Linus Walleij
2014-04-23 14:18 ` Thomas Petazzoni
2014-04-24 13:10 ` Linus Walleij
2 siblings, 1 reply; 87+ messages in thread
From: Linus Walleij @ 2014-04-23 14:17 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Apr 22, 2014 at 11:26 PM, Thomas Petazzoni
<thomas.petazzoni@free-electrons.com> wrote:
> This commit extends the pinctrl mvebu logic with a new driver to cover
> Orion5x SoC. It supports the definitions for the 5181l, 5182 and 5281
> variants of Orion5x, which are the three ones supported by the old
> style MPP code in arch/arm/mach-orion5x/.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>
Nothing very controversial about this, shall I just apply it or do you need
it to be kept together with other stuff?
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 03/38] pinctrl: mvebu: new driver for Orion platforms
2014-04-23 14:17 ` Linus Walleij
@ 2014-04-23 14:18 ` Thomas Petazzoni
2014-04-24 2:37 ` Jason Cooper
0 siblings, 1 reply; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-23 14:18 UTC (permalink / raw)
To: linux-arm-kernel
Dear Linus Walleij,
On Wed, 23 Apr 2014 16:17:03 +0200, Linus Walleij wrote:
> On Tue, Apr 22, 2014 at 11:26 PM, Thomas Petazzoni
> <thomas.petazzoni@free-electrons.com> wrote:
>
> > This commit extends the pinctrl mvebu logic with a new driver to cover
> > Orion5x SoC. It supports the definitions for the 5181l, 5182 and 5281
> > variants of Orion5x, which are the three ones supported by the old
> > style MPP code in arch/arm/mach-orion5x/.
> >
> > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> > Cc: Linus Walleij <linus.walleij@linaro.org>
>
> Nothing very controversial about this,
Yeah, just a boring list of pins and functions :-)
> shall I just apply it or do you need it to be kept together with other stuff?
I'll let the mvebu maintainers answer this. Since there is no build
dependency with the rest of the series, I guess it could go through
your tree, but I leave the decision to the mvebu maintainers.
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 03/38] pinctrl: mvebu: new driver for Orion platforms
2014-04-23 14:18 ` Thomas Petazzoni
@ 2014-04-24 2:37 ` Jason Cooper
0 siblings, 0 replies; 87+ messages in thread
From: Jason Cooper @ 2014-04-24 2:37 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Apr 23, 2014 at 04:18:55PM +0200, Thomas Petazzoni wrote:
> Dear Linus Walleij,
>
> On Wed, 23 Apr 2014 16:17:03 +0200, Linus Walleij wrote:
> > On Tue, Apr 22, 2014 at 11:26 PM, Thomas Petazzoni
> > <thomas.petazzoni@free-electrons.com> wrote:
> >
> > > This commit extends the pinctrl mvebu logic with a new driver to cover
> > > Orion5x SoC. It supports the definitions for the 5181l, 5182 and 5281
> > > variants of Orion5x, which are the three ones supported by the old
> > > style MPP code in arch/arm/mach-orion5x/.
> > >
> > > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> > > Cc: Linus Walleij <linus.walleij@linaro.org>
> >
> > Nothing very controversial about this,
>
> Yeah, just a boring list of pins and functions :-)
>
> > shall I just apply it or do you need it to be kept together with other stuff?
>
> I'll let the mvebu maintainers answer this. Since there is no build
> dependency with the rest of the series, I guess it could go through
> your tree, but I leave the decision to the mvebu maintainers.
Yep, take it. orion5x isn't in the boot farm, so I'm not worried about
booting this through the merge cycle.
thx,
Jason.
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 03/38] pinctrl: mvebu: new driver for Orion platforms
2014-04-22 21:26 ` [PATCH v2 03/38] pinctrl: mvebu: new driver for Orion platforms Thomas Petazzoni
2014-04-23 11:16 ` Sebastian Hesselbarth
2014-04-23 14:17 ` Linus Walleij
@ 2014-04-24 13:10 ` Linus Walleij
2 siblings, 0 replies; 87+ messages in thread
From: Linus Walleij @ 2014-04-24 13:10 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Apr 22, 2014 at 11:26 PM, Thomas Petazzoni
<thomas.petazzoni@free-electrons.com> wrote:
> This commit extends the pinctrl mvebu logic with a new driver to cover
> Orion5x SoC. It supports the definitions for the 5181l, 5182 and 5281
> variants of Orion5x, which are the three ones supported by the old
> style MPP code in arch/arm/mach-orion5x/.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>
Patch applied with Sebastian's ACK.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 04/38] clk: mvebu: add Orion5x clock driver
2014-04-22 21:26 ` [PATCH v2 04/38] clk: mvebu: add Orion5x clock driver Thomas Petazzoni
2014-04-23 11:16 ` Sebastian Hesselbarth
@ 2014-04-26 1:11 ` Jason Cooper
1 sibling, 0 replies; 87+ messages in thread
From: Jason Cooper @ 2014-04-26 1:11 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Apr 22, 2014 at 11:26:08PM +0200, Thomas Petazzoni wrote:
> This commit adds a core clock driver for the Orion5x SoC, with support
> for the tclk, the CPU frequency and the DDR frequency. All the details
> about the Sample-At-Reset register were extracted from the U-Boot
> sources for Orion5x.
>
> Note that Orion5x does not have gatable clocks, so this core clock
> driver is sufficient to support clocking on Orion5x platforms.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Mike Turquette <mturquette@linaro.org>
> ---
> .../devicetree/bindings/clock/mvebu-core-clock.txt | 8 +
> drivers/clk/mvebu/Kconfig | 4 +
> drivers/clk/mvebu/Makefile | 1 +
> drivers/clk/mvebu/orion.c | 210 +++++++++++++++++++++
> 4 files changed, 223 insertions(+)
> create mode 100644 drivers/clk/mvebu/orion.c
Applied to mvebu/drivers-clk for routing through Mike's tree. With
Sebastian's Ack.
thx,
Jason.
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 05/38] memory: mvebu-devbus: use ARMADA_ prefix in defines
2014-04-22 21:26 ` [PATCH v2 05/38] memory: mvebu-devbus: use ARMADA_ prefix in defines Thomas Petazzoni
2014-04-23 11:17 ` Sebastian Hesselbarth
@ 2014-04-26 14:21 ` Jason Cooper
2014-04-28 13:19 ` Ezequiel Garcia
1 sibling, 1 reply; 87+ messages in thread
From: Jason Cooper @ 2014-04-26 14:21 UTC (permalink / raw)
To: linux-arm-kernel
Thomas,
On Tue, Apr 22, 2014 at 11:26:09PM +0200, Thomas Petazzoni wrote:
> The mvebu-devbus driver currently only supports the Armada 370/XP
> family, but it can also cover the Orion5x family. However, the Orion5x
> family has a different organization of the register. Therefore, in
> preparation to the introduction of Orion5x support, we rename the
> Armada 370/XP specific definitions to have an ARMADA_ prefix.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> ---
> drivers/memory/mvebu-devbus.c | 48 +++++++++++++++++++++----------------------
> 1 file changed, 24 insertions(+), 24 deletions(-)
Patches 5 through 9 (devbus) applied to mvebu/drivers With Sebastian's
Acks and a dep on mvebu/fixes.
thx,
Jason.
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function
2014-04-22 21:26 ` [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function Thomas Petazzoni
2014-04-22 21:45 ` Arnd Bergmann
2014-04-23 11:25 ` Sebastian Hesselbarth
@ 2014-04-26 14:54 ` Jason Cooper
2014-04-26 15:00 ` Jason Cooper
2014-04-26 15:42 ` Sebastian Hesselbarth
2 siblings, 2 replies; 87+ messages in thread
From: Jason Cooper @ 2014-04-26 14:54 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Apr 22, 2014 at 11:26:26PM +0200, Thomas Petazzoni wrote:
> Moving to the Device Tree implies having CONFIG_MULTI_IRQ_HANDLER
> enabled, even for non-DT platforms (if we want both DT and non-DT
> platforms to be supported in a single kernel).
>
> However, the common CONFIG_MULTI_IRQ_HANDLER handler for non-DT
> platforms in plat-orion/irq.c doesn't match the needs of
> Orion5x. Also, it doesn't make much sense for orion_irq_init() to
> register the multi-IRQ handler: orion_irq_init() is called once for
> each IRQ cause/mask tuple, while the multi-IRQ handler only needs to
> be registered once.
>
> To solve this problem, we move the multi-IRQ handle in per-platform
> code: mach-kirkwood/irq.c and mach-dove/irq.c. The Orion5x variant
> will be introduced in a followup commit. Of course, this code will
> ultimately be completely removed once all boards are converted to the
> Device Tree.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> ---
> arch/arm/mach-dove/irq.c | 36 +++++++++++++++++++++++++++++++++++
> arch/arm/mach-kirkwood/irq.c | 36 +++++++++++++++++++++++++++++++++++
> arch/arm/plat-orion/irq.c | 45 --------------------------------------------
> 3 files changed, 72 insertions(+), 45 deletions(-)
Dabbit! So close... I pulled in 10 - 38 into mvebu/soc-orion5x and it
failed to build kirkwood_defconfig:
arch/arm/mach-kirkwood/irq.c:44:23: error: expected ?=?, ?,?, ?;?, ?asm? or ?__attribute__? before ?kirkwood_legacy_handle_irq?
arch/arm/mach-kirkwood/irq.c: In function ?kirkwood_init_irq?:
arch/arm/mach-kirkwood/irq.c:71:17: error:
?kirkwood_legacy_handle_irq? undeclared (first use in this function)
arch/arm/mach-kirkwood/irq.c:71:17: note: each undeclared
identifier is reported only once for each function it appears in
arch/arm/mach-kirkwood/irq.c: At top level:
arch/arm/mach-kirkwood/irq.c:41:22: warning: ?kirkwood_irq_base?
defined but not used [-Wunused-variable]
make[1]: *** [arch/arm/mach-kirkwood/irq.o] Error 1
make[1]: *** Waiting for unfinished jobs....
arch/arm/kernel/return_address.c:63:2: warning: #warning "TODO:
return_address should use unwind tables" [-Wcpp]
make: *** [arch/arm/mach-kirkwood] Error 2
make: *** Waiting for unfinished jobs....
orion5x_defconfig built fine of course. I'm testing the others right
now.
thx,
Jason.
>
> diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
> index bc4344a..4a5a7ae 100644
> --- a/arch/arm/mach-dove/irq.c
> +++ b/arch/arm/mach-dove/irq.c
> @@ -108,6 +108,38 @@ static int __initdata gpio2_irqs[4] = {
> 0,
> };
>
> +#ifdef CONFIG_MULTI_IRQ_HANDLER
> +/*
> + * Compiling with both non-DT and DT support enabled, will
> + * break asm irq handler used by non-DT boards. Therefore,
> + * we provide a C-style irq handler even for non-DT boards,
> + * if MULTI_IRQ_HANDLER is set.
> + */
> +
> +static void __iomem *dove_irq_base = IRQ_VIRT_BASE;
> +
> +static asmlinkage void
> +__exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs)
> +{
> + u32 stat;
> +
> + stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_LOW_OFF);
> + stat &= readl_relaxed(dove_irq_base + IRQ_MASK_LOW_OFF);
> + if (stat) {
> + unsigned int hwirq = __fls(stat);
> + handle_IRQ(hwirq, regs);
> + return;
> + }
> + stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_HIGH_OFF);
> + stat &= readl_relaxed(dove_irq_base + IRQ_MASK_HIGH_OFF);
> + if (stat) {
> + unsigned int hwirq = 32 + __fls(stat);
> + handle_IRQ(hwirq, regs);
> + return;
> + }
> +}
> +#endif
> +
> void __init dove_init_irq(void)
> {
> int i;
> @@ -115,6 +147,10 @@ void __init dove_init_irq(void)
> orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
> orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
>
> +#ifdef CONFIG_MULTI_IRQ_HANDLER
> + set_handle_irq(dove_legacy_handle_irq);
> +#endif
> +
> /*
> * Initialize gpiolib for GPIOs 0-71.
> */
> diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
> index 2a97a2e..c9dd860 100644
> --- a/arch/arm/mach-kirkwood/irq.c
> +++ b/arch/arm/mach-kirkwood/irq.c
> @@ -30,11 +30,47 @@ static int __initdata gpio1_irqs[4] = {
> 0,
> };
>
> +#ifdef CONFIG_MULTI_IRQ_HANDLER
> +/*
> + * Compiling with both non-DT and DT support enabled, will
> + * break asm irq handler used by non-DT boards. Therefore,
> + * we provide a C-style irq handler even for non-DT boards,
> + * if MULTI_IRQ_HANDLER is set.
> + */
> +
> +static void __iomem *kirkwood_irq_base = IRQ_VIRT_BASE;
> +
> +asmlinkage void
> +__exception_irq_entry kirkwood_legacy_handle_irq(struct pt_regs *regs)
> +{
> + u32 stat;
> +
> + stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_LOW_OFF);
> + stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_LOW_OFF);
> + if (stat) {
> + unsigned int hwirq = __fls(stat);
> + handle_IRQ(hwirq, regs);
> + return;
> + }
> + stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_HIGH_OFF);
> + stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_HIGH_OFF);
> + if (stat) {
> + unsigned int hwirq = 32 + __fls(stat);
> + handle_IRQ(hwirq, regs);
> + return;
> + }
> +}
> +#endif
> +
> void __init kirkwood_init_irq(void)
> {
> orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
> orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
>
> +#ifdef CONFIG_MULTI_IRQ_HANDLER
> + set_handle_irq(kirkwood_legacy_handle_irq);
> +#endif
> +
> /*
> * Initialize gpiolib for GPIOs 0-49.
> */
> diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
> index 807df14..27ec18b 100644
> --- a/arch/arm/plat-orion/irq.c
> +++ b/arch/arm/plat-orion/irq.c
> @@ -20,47 +20,6 @@
> #include <plat/orion-gpio.h>
> #include <mach/bridge-regs.h>
>
> -#ifdef CONFIG_MULTI_IRQ_HANDLER
> -/*
> - * Compiling with both non-DT and DT support enabled, will
> - * break asm irq handler used by non-DT boards. Therefore,
> - * we provide a C-style irq handler even for non-DT boards,
> - * if MULTI_IRQ_HANDLER is set.
> - *
> - * Notes:
> - * - this is prepared for Kirkwood and Dove only, update
> - * accordingly if you add Orion5x or MV78x00.
> - * - Orion5x uses different macro names and has only one
> - * set of CAUSE/MASK registers.
> - * - MV78x00 uses the same macro names but has a third
> - * set of CAUSE/MASK registers.
> - *
> - */
> -
> -static void __iomem *orion_irq_base = IRQ_VIRT_BASE;
> -
> -asmlinkage void
> -__exception_irq_entry orion_legacy_handle_irq(struct pt_regs *regs)
> -{
> - u32 stat;
> -
> - stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_LOW_OFF);
> - stat &= readl_relaxed(orion_irq_base + IRQ_MASK_LOW_OFF);
> - if (stat) {
> - unsigned int hwirq = __fls(stat);
> - handle_IRQ(hwirq, regs);
> - return;
> - }
> - stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_HIGH_OFF);
> - stat &= readl_relaxed(orion_irq_base + IRQ_MASK_HIGH_OFF);
> - if (stat) {
> - unsigned int hwirq = 32 + __fls(stat);
> - handle_IRQ(hwirq, regs);
> - return;
> - }
> -}
> -#endif
> -
> void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
> {
> struct irq_chip_generic *gc;
> @@ -78,10 +37,6 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
> ct->chip.irq_unmask = irq_gc_mask_set_bit;
> irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
> IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
> -
> -#ifdef CONFIG_MULTI_IRQ_HANDLER
> - set_handle_irq(orion_legacy_handle_irq);
> -#endif
> }
>
> #ifdef CONFIG_OF
> --
> 1.9.2
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function
2014-04-26 14:54 ` Jason Cooper
@ 2014-04-26 15:00 ` Jason Cooper
2014-04-26 15:42 ` Sebastian Hesselbarth
1 sibling, 0 replies; 87+ messages in thread
From: Jason Cooper @ 2014-04-26 15:00 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Apr 26, 2014 at 10:54:57AM -0400, Jason Cooper wrote:
> On Tue, Apr 22, 2014 at 11:26:26PM +0200, Thomas Petazzoni wrote:
> > Moving to the Device Tree implies having CONFIG_MULTI_IRQ_HANDLER
> > enabled, even for non-DT platforms (if we want both DT and non-DT
> > platforms to be supported in a single kernel).
> >
> > However, the common CONFIG_MULTI_IRQ_HANDLER handler for non-DT
> > platforms in plat-orion/irq.c doesn't match the needs of
> > Orion5x. Also, it doesn't make much sense for orion_irq_init() to
> > register the multi-IRQ handler: orion_irq_init() is called once for
> > each IRQ cause/mask tuple, while the multi-IRQ handler only needs to
> > be registered once.
> >
> > To solve this problem, we move the multi-IRQ handle in per-platform
> > code: mach-kirkwood/irq.c and mach-dove/irq.c. The Orion5x variant
> > will be introduced in a followup commit. Of course, this code will
> > ultimately be completely removed once all boards are converted to the
> > Device Tree.
> >
> > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> > ---
> > arch/arm/mach-dove/irq.c | 36 +++++++++++++++++++++++++++++++++++
> > arch/arm/mach-kirkwood/irq.c | 36 +++++++++++++++++++++++++++++++++++
> > arch/arm/plat-orion/irq.c | 45 --------------------------------------------
> > 3 files changed, 72 insertions(+), 45 deletions(-)
>
> Dabbit! So close... I pulled in 10 - 38 into mvebu/soc-orion5x and it
> failed to build kirkwood_defconfig:
>
> arch/arm/mach-kirkwood/irq.c:44:23: error: expected ?=?, ?,?, ?;?, ?asm? or ?__attribute__? before ?kirkwood_legacy_handle_irq?
> arch/arm/mach-kirkwood/irq.c: In function ?kirkwood_init_irq?:
> arch/arm/mach-kirkwood/irq.c:71:17: error:
> ?kirkwood_legacy_handle_irq? undeclared (first use in this function)
> arch/arm/mach-kirkwood/irq.c:71:17: note: each undeclared
> identifier is reported only once for each function it appears in
> arch/arm/mach-kirkwood/irq.c: At top level:
> arch/arm/mach-kirkwood/irq.c:41:22: warning: ?kirkwood_irq_base?
> defined but not used [-Wunused-variable]
> make[1]: *** [arch/arm/mach-kirkwood/irq.o] Error 1
> make[1]: *** Waiting for unfinished jobs....
> arch/arm/kernel/return_address.c:63:2: warning: #warning "TODO:
> return_address should use unwind tables" [-Wcpp]
> make: *** [arch/arm/mach-kirkwood] Error 2
> make: *** Waiting for unfinished jobs....
>
> orion5x_defconfig built fine of course. I'm testing the others right
> now.
I should also mention that mvebu_v5_defconfig built fine as well. As
did dove_defconfig.
thx,
Jason.
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function
2014-04-26 14:54 ` Jason Cooper
2014-04-26 15:00 ` Jason Cooper
@ 2014-04-26 15:42 ` Sebastian Hesselbarth
2014-04-26 20:33 ` Jason Cooper
1 sibling, 1 reply; 87+ messages in thread
From: Sebastian Hesselbarth @ 2014-04-26 15:42 UTC (permalink / raw)
To: linux-arm-kernel
On 04/26/2014 04:54 PM, Jason Cooper wrote:
> On Tue, Apr 22, 2014 at 11:26:26PM +0200, Thomas Petazzoni wrote:
>> Moving to the Device Tree implies having CONFIG_MULTI_IRQ_HANDLER
>> enabled, even for non-DT platforms (if we want both DT and non-DT
>> platforms to be supported in a single kernel).
>>
>> However, the common CONFIG_MULTI_IRQ_HANDLER handler for non-DT
>> platforms in plat-orion/irq.c doesn't match the needs of
>> Orion5x. Also, it doesn't make much sense for orion_irq_init() to
>> register the multi-IRQ handler: orion_irq_init() is called once for
>> each IRQ cause/mask tuple, while the multi-IRQ handler only needs to
>> be registered once.
>>
>> To solve this problem, we move the multi-IRQ handle in per-platform
>> code: mach-kirkwood/irq.c and mach-dove/irq.c. The Orion5x variant
>> will be introduced in a followup commit. Of course, this code will
>> ultimately be completely removed once all boards are converted to the
>> Device Tree.
>>
>> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
>> ---
>> arch/arm/mach-dove/irq.c | 36 +++++++++++++++++++++++++++++++++++
>> arch/arm/mach-kirkwood/irq.c | 36 +++++++++++++++++++++++++++++++++++
>> arch/arm/plat-orion/irq.c | 45 --------------------------------------------
>> 3 files changed, 72 insertions(+), 45 deletions(-)
>
> Dabbit! So close... I pulled in 10 - 38 into mvebu/soc-orion5x and it
> failed to build kirkwood_defconfig:
>
> arch/arm/mach-kirkwood/irq.c:44:23: error: expected ?=?, ?,?, ?;?, ?asm? or ?__attribute__? before ?kirkwood_legacy_handle_irq?
> arch/arm/mach-kirkwood/irq.c: In function ?kirkwood_init_irq?:
> arch/arm/mach-kirkwood/irq.c:71:17: error:
> ?kirkwood_legacy_handle_irq? undeclared (first use in this function)
> arch/arm/mach-kirkwood/irq.c:71:17: note: each undeclared
> identifier is reported only once for each function it appears in
> arch/arm/mach-kirkwood/irq.c: At top level:
> arch/arm/mach-kirkwood/irq.c:41:22: warning: ?kirkwood_irq_base?
> defined but not used [-Wunused-variable]
> make[1]: *** [arch/arm/mach-kirkwood/irq.o] Error 1
> make[1]: *** Waiting for unfinished jobs....
> arch/arm/kernel/return_address.c:63:2: warning: #warning "TODO:
> return_address should use unwind tables" [-Wcpp]
> make: *** [arch/arm/mach-kirkwood] Error 2
> make: *** Waiting for unfinished jobs....
Jason,
adding a missing #include <asm/exception.h> fixes the build issue.
Can you squash adding it in?
Sebastian
> orion5x_defconfig built fine of course. I'm testing the others right
> now.
>
> thx,
>
> Jason.
>
>>
>> diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
>> index bc4344a..4a5a7ae 100644
>> --- a/arch/arm/mach-dove/irq.c
>> +++ b/arch/arm/mach-dove/irq.c
>> @@ -108,6 +108,38 @@ static int __initdata gpio2_irqs[4] = {
>> 0,
>> };
>>
>> +#ifdef CONFIG_MULTI_IRQ_HANDLER
>> +/*
>> + * Compiling with both non-DT and DT support enabled, will
>> + * break asm irq handler used by non-DT boards. Therefore,
>> + * we provide a C-style irq handler even for non-DT boards,
>> + * if MULTI_IRQ_HANDLER is set.
>> + */
>> +
>> +static void __iomem *dove_irq_base = IRQ_VIRT_BASE;
>> +
>> +static asmlinkage void
>> +__exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs)
>> +{
>> + u32 stat;
>> +
>> + stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_LOW_OFF);
>> + stat &= readl_relaxed(dove_irq_base + IRQ_MASK_LOW_OFF);
>> + if (stat) {
>> + unsigned int hwirq = __fls(stat);
>> + handle_IRQ(hwirq, regs);
>> + return;
>> + }
>> + stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_HIGH_OFF);
>> + stat &= readl_relaxed(dove_irq_base + IRQ_MASK_HIGH_OFF);
>> + if (stat) {
>> + unsigned int hwirq = 32 + __fls(stat);
>> + handle_IRQ(hwirq, regs);
>> + return;
>> + }
>> +}
>> +#endif
>> +
>> void __init dove_init_irq(void)
>> {
>> int i;
>> @@ -115,6 +147,10 @@ void __init dove_init_irq(void)
>> orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
>> orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
>>
>> +#ifdef CONFIG_MULTI_IRQ_HANDLER
>> + set_handle_irq(dove_legacy_handle_irq);
>> +#endif
>> +
>> /*
>> * Initialize gpiolib for GPIOs 0-71.
>> */
>> diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
>> index 2a97a2e..c9dd860 100644
>> --- a/arch/arm/mach-kirkwood/irq.c
>> +++ b/arch/arm/mach-kirkwood/irq.c
>> @@ -30,11 +30,47 @@ static int __initdata gpio1_irqs[4] = {
>> 0,
>> };
>>
>> +#ifdef CONFIG_MULTI_IRQ_HANDLER
>> +/*
>> + * Compiling with both non-DT and DT support enabled, will
>> + * break asm irq handler used by non-DT boards. Therefore,
>> + * we provide a C-style irq handler even for non-DT boards,
>> + * if MULTI_IRQ_HANDLER is set.
>> + */
>> +
>> +static void __iomem *kirkwood_irq_base = IRQ_VIRT_BASE;
>> +
>> +asmlinkage void
>> +__exception_irq_entry kirkwood_legacy_handle_irq(struct pt_regs *regs)
>> +{
>> + u32 stat;
>> +
>> + stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_LOW_OFF);
>> + stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_LOW_OFF);
>> + if (stat) {
>> + unsigned int hwirq = __fls(stat);
>> + handle_IRQ(hwirq, regs);
>> + return;
>> + }
>> + stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_HIGH_OFF);
>> + stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_HIGH_OFF);
>> + if (stat) {
>> + unsigned int hwirq = 32 + __fls(stat);
>> + handle_IRQ(hwirq, regs);
>> + return;
>> + }
>> +}
>> +#endif
>> +
>> void __init kirkwood_init_irq(void)
>> {
>> orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
>> orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
>>
>> +#ifdef CONFIG_MULTI_IRQ_HANDLER
>> + set_handle_irq(kirkwood_legacy_handle_irq);
>> +#endif
>> +
>> /*
>> * Initialize gpiolib for GPIOs 0-49.
>> */
>> diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
>> index 807df14..27ec18b 100644
>> --- a/arch/arm/plat-orion/irq.c
>> +++ b/arch/arm/plat-orion/irq.c
>> @@ -20,47 +20,6 @@
>> #include <plat/orion-gpio.h>
>> #include <mach/bridge-regs.h>
>>
>> -#ifdef CONFIG_MULTI_IRQ_HANDLER
>> -/*
>> - * Compiling with both non-DT and DT support enabled, will
>> - * break asm irq handler used by non-DT boards. Therefore,
>> - * we provide a C-style irq handler even for non-DT boards,
>> - * if MULTI_IRQ_HANDLER is set.
>> - *
>> - * Notes:
>> - * - this is prepared for Kirkwood and Dove only, update
>> - * accordingly if you add Orion5x or MV78x00.
>> - * - Orion5x uses different macro names and has only one
>> - * set of CAUSE/MASK registers.
>> - * - MV78x00 uses the same macro names but has a third
>> - * set of CAUSE/MASK registers.
>> - *
>> - */
>> -
>> -static void __iomem *orion_irq_base = IRQ_VIRT_BASE;
>> -
>> -asmlinkage void
>> -__exception_irq_entry orion_legacy_handle_irq(struct pt_regs *regs)
>> -{
>> - u32 stat;
>> -
>> - stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_LOW_OFF);
>> - stat &= readl_relaxed(orion_irq_base + IRQ_MASK_LOW_OFF);
>> - if (stat) {
>> - unsigned int hwirq = __fls(stat);
>> - handle_IRQ(hwirq, regs);
>> - return;
>> - }
>> - stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_HIGH_OFF);
>> - stat &= readl_relaxed(orion_irq_base + IRQ_MASK_HIGH_OFF);
>> - if (stat) {
>> - unsigned int hwirq = 32 + __fls(stat);
>> - handle_IRQ(hwirq, regs);
>> - return;
>> - }
>> -}
>> -#endif
>> -
>> void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
>> {
>> struct irq_chip_generic *gc;
>> @@ -78,10 +37,6 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
>> ct->chip.irq_unmask = irq_gc_mask_set_bit;
>> irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
>> IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
>> -
>> -#ifdef CONFIG_MULTI_IRQ_HANDLER
>> - set_handle_irq(orion_legacy_handle_irq);
>> -#endif
>> }
>>
>> #ifdef CONFIG_OF
>> --
>> 1.9.2
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function
2014-04-26 15:42 ` Sebastian Hesselbarth
@ 2014-04-26 20:33 ` Jason Cooper
2014-04-29 14:52 ` Thomas Petazzoni
0 siblings, 1 reply; 87+ messages in thread
From: Jason Cooper @ 2014-04-26 20:33 UTC (permalink / raw)
To: linux-arm-kernel
> On Apr 26, 2014, at 11:42 AM, Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
>
>> On 04/26/2014 04:54 PM, Jason Cooper wrote:
>>> On Tue, Apr 22, 2014 at 11:26:26PM +0200, Thomas Petazzoni wrote:
>>> Moving to the Device Tree implies having CONFIG_MULTI_IRQ_HANDLER
>>> enabled, even for non-DT platforms (if we want both DT and non-DT
>>> platforms to be supported in a single kernel).
>>>
>>> However, the common CONFIG_MULTI_IRQ_HANDLER handler for non-DT
>>> platforms in plat-orion/irq.c doesn't match the needs of
>>> Orion5x. Also, it doesn't make much sense for orion_irq_init() to
>>> register the multi-IRQ handler: orion_irq_init() is called once for
>>> each IRQ cause/mask tuple, while the multi-IRQ handler only needs to
>>> be registered once.
>>>
>>> To solve this problem, we move the multi-IRQ handle in per-platform
>>> code: mach-kirkwood/irq.c and mach-dove/irq.c. The Orion5x variant
>>> will be introduced in a followup commit. Of course, this code will
>>> ultimately be completely removed once all boards are converted to the
>>> Device Tree.
>>>
>>> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
>>> ---
>>> arch/arm/mach-dove/irq.c | 36 +++++++++++++++++++++++++++++++++++
>>> arch/arm/mach-kirkwood/irq.c | 36 +++++++++++++++++++++++++++++++++++
>>> arch/arm/plat-orion/irq.c | 45 --------------------------------------------
>>> 3 files changed, 72 insertions(+), 45 deletions(-)
>>
>> Dabbit! So close... I pulled in 10 - 38 into mvebu/soc-orion5x and it
>> failed to build kirkwood_defconfig:
>>
>> arch/arm/mach-kirkwood/irq.c:44:23: error: expected ?=?, ?,?, ?;?, ?asm? or ?__attribute__? before ?kirkwood_legacy_handle_irq?
>> arch/arm/mach-kirkwood/irq.c: In function ?kirkwood_init_irq?:
>> arch/arm/mach-kirkwood/irq.c:71:17: error:
>> ?kirkwood_legacy_handle_irq? undeclared (first use in this function)
>> arch/arm/mach-kirkwood/irq.c:71:17: note: each undeclared
>> identifier is reported only once for each function it appears in
>> arch/arm/mach-kirkwood/irq.c: At top level:
>> arch/arm/mach-kirkwood/irq.c:41:22: warning: ?kirkwood_irq_base?
>> defined but not used [-Wunused-variable]
>> make[1]: *** [arch/arm/mach-kirkwood/irq.o] Error 1
>> make[1]: *** Waiting for unfinished jobs....
>> arch/arm/kernel/return_address.c:63:2: warning: #warning "TODO:
>> return_address should use unwind tables" [-Wcpp]
>> make: *** [arch/arm/mach-kirkwood] Error 2
>> make: *** Waiting for unfinished jobs....
>
> Jason,
>
> adding a missing #include <asm/exception.h> fixes the build issue.
> Can you squash adding it in?
>
Yep, that fixed it. Entire gamut of build tests have passed. So I squashed it into this patch and push the series out to mvebu/soc-orion5x
thx,
Jason.
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 05/38] memory: mvebu-devbus: use ARMADA_ prefix in defines
2014-04-26 14:21 ` Jason Cooper
@ 2014-04-28 13:19 ` Ezequiel Garcia
2014-04-28 14:56 ` Jason Cooper
0 siblings, 1 reply; 87+ messages in thread
From: Ezequiel Garcia @ 2014-04-28 13:19 UTC (permalink / raw)
To: linux-arm-kernel
Hi guys,
On Apr 26, Jason Cooper wrote:
> On Tue, Apr 22, 2014 at 11:26:09PM +0200, Thomas Petazzoni wrote:
> > The mvebu-devbus driver currently only supports the Armada 370/XP
> > family, but it can also cover the Orion5x family. However, the Orion5x
> > family has a different organization of the register. Therefore, in
> > preparation to the introduction of Orion5x support, we rename the
> > Armada 370/XP specific definitions to have an ARMADA_ prefix.
> >
> > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> > ---
> > drivers/memory/mvebu-devbus.c | 48 +++++++++++++++++++++----------------------
> > 1 file changed, 24 insertions(+), 24 deletions(-)
>
> Patches 5 through 9 (devbus) applied to mvebu/drivers With Sebastian's
> Acks and a dep on mvebu/fixes.
>
Tested the branch (plus some -next fixes) on the AXP-GP. The NOR works perfectly fine.
--
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 05/38] memory: mvebu-devbus: use ARMADA_ prefix in defines
2014-04-28 13:19 ` Ezequiel Garcia
@ 2014-04-28 14:56 ` Jason Cooper
2014-04-28 16:04 ` Ezequiel Garcia
0 siblings, 1 reply; 87+ messages in thread
From: Jason Cooper @ 2014-04-28 14:56 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Apr 28, 2014 at 10:19:49AM -0300, Ezequiel Garcia wrote:
> Hi guys,
>
> On Apr 26, Jason Cooper wrote:
> > On Tue, Apr 22, 2014 at 11:26:09PM +0200, Thomas Petazzoni wrote:
> > > The mvebu-devbus driver currently only supports the Armada 370/XP
> > > family, but it can also cover the Orion5x family. However, the Orion5x
> > > family has a different organization of the register. Therefore, in
> > > preparation to the introduction of Orion5x support, we rename the
> > > Armada 370/XP specific definitions to have an ARMADA_ prefix.
> > >
> > > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> > > ---
> > > drivers/memory/mvebu-devbus.c | 48 +++++++++++++++++++++----------------------
> > > 1 file changed, 24 insertions(+), 24 deletions(-)
> >
> > Patches 5 through 9 (devbus) applied to mvebu/drivers With Sebastian's
> > Acks and a dep on mvebu/fixes.
> >
>
> Tested the branch (plus some -next fixes) on the AXP-GP. The NOR works perfectly fine.
Which fixes?
Does this count as a Tested-by?
thx,
Jason.
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 05/38] memory: mvebu-devbus: use ARMADA_ prefix in defines
2014-04-28 14:56 ` Jason Cooper
@ 2014-04-28 16:04 ` Ezequiel Garcia
2014-04-29 13:19 ` Jason Cooper
0 siblings, 1 reply; 87+ messages in thread
From: Ezequiel Garcia @ 2014-04-28 16:04 UTC (permalink / raw)
To: linux-arm-kernel
On Apr 28, Jason Cooper wrote:
> On Mon, Apr 28, 2014 at 10:19:49AM -0300, Ezequiel Garcia wrote:
> > Hi guys,
> >
> > On Apr 26, Jason Cooper wrote:
> > > On Tue, Apr 22, 2014 at 11:26:09PM +0200, Thomas Petazzoni wrote:
> > > > The mvebu-devbus driver currently only supports the Armada 370/XP
> > > > family, but it can also cover the Orion5x family. However, the Orion5x
> > > > family has a different organization of the register. Therefore, in
> > > > preparation to the introduction of Orion5x support, we rename the
> > > > Armada 370/XP specific definitions to have an ARMADA_ prefix.
> > > >
> > > > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> > > > ---
> > > > drivers/memory/mvebu-devbus.c | 48 +++++++++++++++++++++----------------------
> > > > 1 file changed, 24 insertions(+), 24 deletions(-)
> > >
> > > Patches 5 through 9 (devbus) applied to mvebu/drivers With Sebastian's
> > > Acks and a dep on mvebu/fixes.
> > >
> >
> > Tested the branch (plus some -next fixes) on the AXP-GP. The NOR works perfectly fine.
>
> Which fixes?
>
Gah, nevermind. I took the mvneta -netdev fixes, but the XP-GP wasn't affected.
So, no fixes required.
> Does this count as a Tested-by?
>
Sure: Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
--
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 05/38] memory: mvebu-devbus: use ARMADA_ prefix in defines
2014-04-28 16:04 ` Ezequiel Garcia
@ 2014-04-29 13:19 ` Jason Cooper
0 siblings, 0 replies; 87+ messages in thread
From: Jason Cooper @ 2014-04-29 13:19 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Apr 28, 2014 at 01:04:29PM -0300, Ezequiel Garcia wrote:
> On Apr 28, Jason Cooper wrote:
> > On Mon, Apr 28, 2014 at 10:19:49AM -0300, Ezequiel Garcia wrote:
> > > Hi guys,
> > >
> > > On Apr 26, Jason Cooper wrote:
> > > > On Tue, Apr 22, 2014 at 11:26:09PM +0200, Thomas Petazzoni wrote:
> > > > > The mvebu-devbus driver currently only supports the Armada 370/XP
> > > > > family, but it can also cover the Orion5x family. However, the Orion5x
> > > > > family has a different organization of the register. Therefore, in
> > > > > preparation to the introduction of Orion5x support, we rename the
> > > > > Armada 370/XP specific definitions to have an ARMADA_ prefix.
> > > > >
> > > > > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> > > > > ---
> > > > > drivers/memory/mvebu-devbus.c | 48 +++++++++++++++++++++----------------------
> > > > > 1 file changed, 24 insertions(+), 24 deletions(-)
> > > >
> > > > Patches 5 through 9 (devbus) applied to mvebu/drivers With Sebastian's
> > > > Acks and a dep on mvebu/fixes.
> > > >
> > >
> > > Tested the branch (plus some -next fixes) on the AXP-GP. The NOR works perfectly fine.
> >
> > Which fixes?
> >
>
> Gah, nevermind. I took the mvneta -netdev fixes, but the XP-GP wasn't affected.
> So, no fixes required.
>
> > Does this count as a Tested-by?
> >
>
> Sure: Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Added, thanks for testing.
thx,
Jason.
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function
2014-04-26 20:33 ` Jason Cooper
@ 2014-04-29 14:52 ` Thomas Petazzoni
0 siblings, 0 replies; 87+ messages in thread
From: Thomas Petazzoni @ 2014-04-29 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Dear Jason Cooper,
On Sat, 26 Apr 2014 16:33:01 -0400, Jason Cooper wrote:
> > Jason,
> >
> > adding a missing #include <asm/exception.h> fixes the build issue.
> > Can you squash adding it in?
> >
>
> Yep, that fixed it. Entire gamut of build tests have passed. So I squashed it into this patch and push the series out to mvebu/soc-orion5x
Great, thanks! And thanks a lot to Sebastian for fixing the build issue.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 87+ messages in thread
end of thread, other threads:[~2014-04-29 14:52 UTC | newest]
Thread overview: 87+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-04-22 21:26 [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 01/38] ARM: orion5x: fix target ID for crypto SRAM window Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 02/38] memory: mvebu-devbus: fix the conversion of the bus width Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 03/38] pinctrl: mvebu: new driver for Orion platforms Thomas Petazzoni
2014-04-23 11:16 ` Sebastian Hesselbarth
2014-04-23 14:17 ` Linus Walleij
2014-04-23 14:18 ` Thomas Petazzoni
2014-04-24 2:37 ` Jason Cooper
2014-04-24 13:10 ` Linus Walleij
2014-04-22 21:26 ` [PATCH v2 04/38] clk: mvebu: add Orion5x clock driver Thomas Petazzoni
2014-04-23 11:16 ` Sebastian Hesselbarth
2014-04-26 1:11 ` Jason Cooper
2014-04-22 21:26 ` [PATCH v2 05/38] memory: mvebu-devbus: use ARMADA_ prefix in defines Thomas Petazzoni
2014-04-23 11:17 ` Sebastian Hesselbarth
2014-04-26 14:21 ` Jason Cooper
2014-04-28 13:19 ` Ezequiel Garcia
2014-04-28 14:56 ` Jason Cooper
2014-04-28 16:04 ` Ezequiel Garcia
2014-04-29 13:19 ` Jason Cooper
2014-04-22 21:26 ` [PATCH v2 06/38] memory: mvebu-devbus: use _SHIFT suffixes instead of _BIT Thomas Petazzoni
2014-04-23 11:17 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 07/38] memory: mvebu-devbus: split functions Thomas Petazzoni
2014-04-23 11:18 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 08/38] memory: mvebu-devbus: add Orion5x support Thomas Petazzoni
2014-04-23 11:18 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 09/38] memory: mvebu-devbus: add a devbus, keep-config property Thomas Petazzoni
2014-04-23 11:18 ` [PATCH v2 09/38] memory: mvebu-devbus: add a devbus,keep-config property Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 10/38] ARM: orion5x: move interrupt controller node into ocp Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 11/38] ARM: orion5x: switch to preprocessor includes in DT Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 12/38] ARM: orion5x: use existing dt-bindings include for Device Tree files Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 13/38] ARM: orion5x: convert DT to use the mvebu-mbus driver Thomas Petazzoni
2014-04-23 11:22 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 14/38] ARM: orion5x: add node labels in Orion5x SoC Device Tree file Thomas Petazzoni
2014-04-23 11:22 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 15/38] ARM: orion5x: use gpio-keys and gpio-leds instead of gpio_keys/gpio_leds in edmini_v2 Thomas Petazzoni
2014-04-23 11:22 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 16/38] ARM: orion5x: add linux,stdout-path to edmini_v2 Thomas Petazzoni
2014-04-23 11:22 ` [PATCH v2 16/38] ARM: orion5x: add linux, stdout-path " Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 17/38] ARM: orion5x: use node labels for UART and SATA on edmini_v2 Thomas Petazzoni
2014-04-23 11:23 ` Sebastian Hesselbarth
2014-04-23 12:23 ` Thomas Petazzoni
2014-04-23 12:46 ` Ezequiel Garcia
2014-04-23 12:48 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 18/38] ARM: orion5x: rename XOR node to dma-controller@<address> Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 19/38] ARM: orion5x: add interrupt for Ethernet in Device Tree Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 20/38] ARM: orion5x: switch to use the clock driver for DT platforms Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 21/38] ARM: orion5x: convert to use 'clocks' property for UART controllers Thomas Petazzoni
2014-04-23 11:24 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 22/38] ARM: orion: switch to a per-platform handle_irq() function Thomas Petazzoni
2014-04-22 21:45 ` Arnd Bergmann
2014-04-22 21:53 ` Thomas Petazzoni
2014-04-23 10:30 ` Arnd Bergmann
2014-04-23 11:25 ` Sebastian Hesselbarth
2014-04-26 14:54 ` Jason Cooper
2014-04-26 15:00 ` Jason Cooper
2014-04-26 15:42 ` Sebastian Hesselbarth
2014-04-26 20:33 ` Jason Cooper
2014-04-29 14:52 ` Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 23/38] ARM: orion5x: switch to DT interrupts and timer Thomas Petazzoni
2014-04-23 11:26 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 24/38] ARM: orion5x: enable pinctrl driver at SoC level Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 25/38] ARM: orion5x: update I2C description " Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 26/38] ARM: orion5x: add Device Bus " Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 27/38] ARM: orion5x: add standard pinctrl configs for sata0 and sata1 Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 28/38] ARM: orion5x: convert edmini_v2 to DT pinctrl Thomas Petazzoni
2014-04-23 11:27 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 29/38] ARM: orion5x: use DT to describe I2C devices on edmini_v2 Thomas Petazzoni
2014-04-23 11:28 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 30/38] ARM: orion5x: use DT to describe EHCI " Thomas Petazzoni
2014-04-23 11:28 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 31/38] ARM: orion5x: use DT to describe NOR " Thomas Petazzoni
2014-04-23 11:29 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 32/38] ARM: orion5x: keep TODO list in edmini_v2 DT Thomas Petazzoni
2014-04-23 11:29 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 33/38] ARM: orion5x: remove unneeded code for edmini_v2 Thomas Petazzoni
2014-04-22 21:26 ` [PATCH v2 34/38] ARM: orion5x: convert RD-88F5182 to Device Tree Thomas Petazzoni
2014-04-23 11:30 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 35/38] ARM: orion5x: convert d2net " Thomas Petazzoni
2014-04-23 11:32 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 36/38] ARM: orion5x: convert Maxtor Shared Storage II to the " Thomas Petazzoni
2014-04-23 11:33 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 37/38] ARM: orion: remove no longer needed DT IRQ code Thomas Petazzoni
2014-04-23 11:33 ` Sebastian Hesselbarth
2014-04-22 21:26 ` [PATCH v2 38/38] ARM: orion: remove no longer needed gpio DT code Thomas Petazzoni
2014-04-23 11:34 ` Sebastian Hesselbarth
2014-04-23 11:35 ` [PATCH v2 00/38] ARM: orion5x: big step towards DT conversion Sebastian Hesselbarth
2014-04-23 12:24 ` Thomas Petazzoni
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