* [PATCH 0/3] Exynos multi-platform support
@ 2014-05-21 6:52 ` Sachin Kamat
0 siblings, 0 replies; 45+ messages in thread
From: Sachin Kamat @ 2014-05-21 6:52 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: linux-samsung-soc, kgene.kim, arnd, sachin.kamat
The patches in this series were earlier sent as part of other
series. Now that the other patches have been merged, re-sending
these after rebasing them on linux-next (20140519).
Tested on Exynos4210, 4412, 5250 and 5420 based boards.
A particular change in this series is the removal of single platform
support for Exynos as suggested by Arnd and Olof (patch 2/3). With
this change certain features (drivers) which are not yet multi-platform
aware like cpufreq, devfreq and DRM based gscaler will not be available
now.
Arnd Bergmann (1):
ARM: EXYNOS: Enable multi-platform build support
Sachin Kamat (2):
ARM: EXYNOS: Consolidate Kconfig entries
ARM: multi_v7_defconfig: Enable Exynos platform
arch/arm/Kconfig | 20 ----------
arch/arm/configs/multi_v7_defconfig | 12 ++++++
arch/arm/mach-exynos/Kconfig | 73 +++++++++++++++--------------------
arch/arm/mach-exynos/Makefile | 2 +
arch/arm/plat-samsung/Makefile | 3 ++
5 files changed, 49 insertions(+), 61 deletions(-)
--
1.7.9.5
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 0/3] Exynos multi-platform support
@ 2014-05-21 6:52 ` Sachin Kamat
0 siblings, 0 replies; 45+ messages in thread
From: Sachin Kamat @ 2014-05-21 6:52 UTC (permalink / raw)
To: linux-arm-kernel
The patches in this series were earlier sent as part of other
series. Now that the other patches have been merged, re-sending
these after rebasing them on linux-next (20140519).
Tested on Exynos4210, 4412, 5250 and 5420 based boards.
A particular change in this series is the removal of single platform
support for Exynos as suggested by Arnd and Olof (patch 2/3). With
this change certain features (drivers) which are not yet multi-platform
aware like cpufreq, devfreq and DRM based gscaler will not be available
now.
Arnd Bergmann (1):
ARM: EXYNOS: Enable multi-platform build support
Sachin Kamat (2):
ARM: EXYNOS: Consolidate Kconfig entries
ARM: multi_v7_defconfig: Enable Exynos platform
arch/arm/Kconfig | 20 ----------
arch/arm/configs/multi_v7_defconfig | 12 ++++++
arch/arm/mach-exynos/Kconfig | 73 +++++++++++++++--------------------
arch/arm/mach-exynos/Makefile | 2 +
arch/arm/plat-samsung/Makefile | 3 ++
5 files changed, 49 insertions(+), 61 deletions(-)
--
1.7.9.5
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 1/3] ARM: EXYNOS: Consolidate Kconfig entries
2014-05-21 6:52 ` Sachin Kamat
@ 2014-05-21 6:52 ` Sachin Kamat
-1 siblings, 0 replies; 45+ messages in thread
From: Sachin Kamat @ 2014-05-21 6:52 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: linux-samsung-soc, kgene.kim, arnd, sachin.kamat
Instead of repeating the Kconfig entries for every SoC, move them under
ARCH_EXYNOS4 and 5 and move the entries common to both 4 and 5 under
ARCH_EXYNOS.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
---
arch/arm/Kconfig | 10 ++++++++++
arch/arm/mach-exynos/Kconfig | 45 ++++--------------------------------------
2 files changed, 14 insertions(+), 41 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5e91e40c1d22..666b59b58ab0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -831,18 +831,28 @@ config ARCH_S5PV210
config ARCH_EXYNOS
bool "Samsung EXYNOS"
+ select ARCH_HAS_BANDGAP
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_REQUIRE_GPIOLIB
select ARCH_SPARSEMEM_ENABLE
+ select ARM_AMBA
select ARM_GIC
+ select CLKSRC_OF
select COMMON_CLK_SAMSUNG
select CPU_V7
select GENERIC_CLOCKEVENTS
+ select HAVE_ARM_SCU if SMP
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select HAVE_S3C_RTC if RTC_CLASS
+ select HAVE_SMP
select NEED_MACH_MEMORY_H
+ select PINCTRL
+ select PINCTRL_EXYNOS
+ select PM_GENERIC_DOMAINS if PM_RUNTIME
+ select S5P_DEV_MFC
+ select SAMSUNG_DMADEV
select SPARSE_IRQ
select SRAM
select USE_OF
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 1602abce6ec0..138070e42aa9 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -14,30 +14,20 @@ menu "SAMSUNG EXYNOS SoCs Support"
config ARCH_EXYNOS4
bool "SAMSUNG EXYNOS4"
default y
- select ARM_AMBA
- select CLKSRC_OF
+ select ARM_CPU_SUSPEND if PM_SLEEP
select CLKSRC_SAMSUNG_PWM if CPU_EXYNOS4210
select CPU_EXYNOS4210
select GIC_NON_BANKED
select KEYBOARD_SAMSUNG if INPUT_KEYBOARD
- select HAVE_ARM_SCU if SMP
- select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0
- select PINCTRL
- select PM_GENERIC_DOMAINS if PM_RUNTIME
- select S5P_DEV_MFC
help
- Samsung EXYNOS4 SoCs based systems
+ Samsung EXYNOS4 (Cortex-A9) SoC based systems
config ARCH_EXYNOS5
bool "SAMSUNG EXYNOS5"
- select ARM_AMBA
- select CLKSRC_OF
- select HAVE_ARM_SCU if SMP
- select HAVE_SMP
- select PINCTRL
+ default y
help
- Samsung EXYNOS5 (Cortex-A15) SoC based systems
+ Samsung EXYNOS5 (Cortex-A15/A7) SoC based systems
comment "EXYNOS SoCs"
@@ -45,59 +35,32 @@ config CPU_EXYNOS4210
bool "SAMSUNG EXYNOS4210"
default y
depends on ARCH_EXYNOS4
- select ARCH_HAS_BANDGAP
- select ARM_CPU_SUSPEND if PM_SLEEP
- select PINCTRL_EXYNOS
- select SAMSUNG_DMADEV
- help
- Enable EXYNOS4210 CPU support
config SOC_EXYNOS4212
bool "SAMSUNG EXYNOS4212"
default y
depends on ARCH_EXYNOS4
- select ARCH_HAS_BANDGAP
- select PINCTRL_EXYNOS
- select SAMSUNG_DMADEV
- help
- Enable EXYNOS4212 SoC support
config SOC_EXYNOS4412
bool "SAMSUNG EXYNOS4412"
default y
depends on ARCH_EXYNOS4
- select ARCH_HAS_BANDGAP
- select PINCTRL_EXYNOS
- select SAMSUNG_DMADEV
- help
- Enable EXYNOS4412 SoC support
config SOC_EXYNOS5250
bool "SAMSUNG EXYNOS5250"
default y
depends on ARCH_EXYNOS5
- select ARCH_HAS_BANDGAP
- select PINCTRL_EXYNOS
- select PM_GENERIC_DOMAINS if PM_RUNTIME
- select S5P_DEV_MFC
- select SAMSUNG_DMADEV
- help
- Enable EXYNOS5250 SoC support
config SOC_EXYNOS5420
bool "SAMSUNG EXYNOS5420"
default y
depends on ARCH_EXYNOS5
- select PM_GENERIC_DOMAINS if PM_RUNTIME
- help
- Enable EXYNOS5420 SoC support
config SOC_EXYNOS5440
bool "SAMSUNG EXYNOS5440"
default y
depends on ARCH_EXYNOS5
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
- select ARCH_HAS_BANDGAP
select ARCH_HAS_OPP
select HAVE_ARM_ARCH_TIMER
select AUTO_ZRELADDR
--
1.7.9.5
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 1/3] ARM: EXYNOS: Consolidate Kconfig entries
@ 2014-05-21 6:52 ` Sachin Kamat
0 siblings, 0 replies; 45+ messages in thread
From: Sachin Kamat @ 2014-05-21 6:52 UTC (permalink / raw)
To: linux-arm-kernel
Instead of repeating the Kconfig entries for every SoC, move them under
ARCH_EXYNOS4 and 5 and move the entries common to both 4 and 5 under
ARCH_EXYNOS.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
---
arch/arm/Kconfig | 10 ++++++++++
arch/arm/mach-exynos/Kconfig | 45 ++++--------------------------------------
2 files changed, 14 insertions(+), 41 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5e91e40c1d22..666b59b58ab0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -831,18 +831,28 @@ config ARCH_S5PV210
config ARCH_EXYNOS
bool "Samsung EXYNOS"
+ select ARCH_HAS_BANDGAP
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_REQUIRE_GPIOLIB
select ARCH_SPARSEMEM_ENABLE
+ select ARM_AMBA
select ARM_GIC
+ select CLKSRC_OF
select COMMON_CLK_SAMSUNG
select CPU_V7
select GENERIC_CLOCKEVENTS
+ select HAVE_ARM_SCU if SMP
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select HAVE_S3C_RTC if RTC_CLASS
+ select HAVE_SMP
select NEED_MACH_MEMORY_H
+ select PINCTRL
+ select PINCTRL_EXYNOS
+ select PM_GENERIC_DOMAINS if PM_RUNTIME
+ select S5P_DEV_MFC
+ select SAMSUNG_DMADEV
select SPARSE_IRQ
select SRAM
select USE_OF
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 1602abce6ec0..138070e42aa9 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -14,30 +14,20 @@ menu "SAMSUNG EXYNOS SoCs Support"
config ARCH_EXYNOS4
bool "SAMSUNG EXYNOS4"
default y
- select ARM_AMBA
- select CLKSRC_OF
+ select ARM_CPU_SUSPEND if PM_SLEEP
select CLKSRC_SAMSUNG_PWM if CPU_EXYNOS4210
select CPU_EXYNOS4210
select GIC_NON_BANKED
select KEYBOARD_SAMSUNG if INPUT_KEYBOARD
- select HAVE_ARM_SCU if SMP
- select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0
- select PINCTRL
- select PM_GENERIC_DOMAINS if PM_RUNTIME
- select S5P_DEV_MFC
help
- Samsung EXYNOS4 SoCs based systems
+ Samsung EXYNOS4 (Cortex-A9) SoC based systems
config ARCH_EXYNOS5
bool "SAMSUNG EXYNOS5"
- select ARM_AMBA
- select CLKSRC_OF
- select HAVE_ARM_SCU if SMP
- select HAVE_SMP
- select PINCTRL
+ default y
help
- Samsung EXYNOS5 (Cortex-A15) SoC based systems
+ Samsung EXYNOS5 (Cortex-A15/A7) SoC based systems
comment "EXYNOS SoCs"
@@ -45,59 +35,32 @@ config CPU_EXYNOS4210
bool "SAMSUNG EXYNOS4210"
default y
depends on ARCH_EXYNOS4
- select ARCH_HAS_BANDGAP
- select ARM_CPU_SUSPEND if PM_SLEEP
- select PINCTRL_EXYNOS
- select SAMSUNG_DMADEV
- help
- Enable EXYNOS4210 CPU support
config SOC_EXYNOS4212
bool "SAMSUNG EXYNOS4212"
default y
depends on ARCH_EXYNOS4
- select ARCH_HAS_BANDGAP
- select PINCTRL_EXYNOS
- select SAMSUNG_DMADEV
- help
- Enable EXYNOS4212 SoC support
config SOC_EXYNOS4412
bool "SAMSUNG EXYNOS4412"
default y
depends on ARCH_EXYNOS4
- select ARCH_HAS_BANDGAP
- select PINCTRL_EXYNOS
- select SAMSUNG_DMADEV
- help
- Enable EXYNOS4412 SoC support
config SOC_EXYNOS5250
bool "SAMSUNG EXYNOS5250"
default y
depends on ARCH_EXYNOS5
- select ARCH_HAS_BANDGAP
- select PINCTRL_EXYNOS
- select PM_GENERIC_DOMAINS if PM_RUNTIME
- select S5P_DEV_MFC
- select SAMSUNG_DMADEV
- help
- Enable EXYNOS5250 SoC support
config SOC_EXYNOS5420
bool "SAMSUNG EXYNOS5420"
default y
depends on ARCH_EXYNOS5
- select PM_GENERIC_DOMAINS if PM_RUNTIME
- help
- Enable EXYNOS5420 SoC support
config SOC_EXYNOS5440
bool "SAMSUNG EXYNOS5440"
default y
depends on ARCH_EXYNOS5
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
- select ARCH_HAS_BANDGAP
select ARCH_HAS_OPP
select HAVE_ARM_ARCH_TIMER
select AUTO_ZRELADDR
--
1.7.9.5
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support
2014-05-21 6:52 ` Sachin Kamat
@ 2014-05-21 6:52 ` Sachin Kamat
-1 siblings, 0 replies; 45+ messages in thread
From: Sachin Kamat @ 2014-05-21 6:52 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: linux-samsung-soc, kgene.kim, arnd, sachin.kamat
From: Arnd Bergmann <arnd@arndb.de>
This makes it possible to enable the exynos platform as part of a
multiplatform kernel, in addition to keeping the single-platform
Exynos support.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
---
arch/arm/Kconfig | 30 ------------------------------
arch/arm/mach-exynos/Kconfig | 28 ++++++++++++++++++++++++++++
arch/arm/mach-exynos/Makefile | 2 ++
arch/arm/plat-samsung/Makefile | 3 +++
4 files changed, 33 insertions(+), 30 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 666b59b58ab0..26f2bae4d948 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -829,36 +829,6 @@ config ARCH_S5PV210
help
Samsung S5PV210/S5PC110 series based systems
-config ARCH_EXYNOS
- bool "Samsung EXYNOS"
- select ARCH_HAS_BANDGAP
- select ARCH_HAS_CPUFREQ
- select ARCH_HAS_HOLES_MEMORYMODEL
- select ARCH_REQUIRE_GPIOLIB
- select ARCH_SPARSEMEM_ENABLE
- select ARM_AMBA
- select ARM_GIC
- select CLKSRC_OF
- select COMMON_CLK_SAMSUNG
- select CPU_V7
- select GENERIC_CLOCKEVENTS
- select HAVE_ARM_SCU if SMP
- select HAVE_S3C2410_I2C if I2C
- select HAVE_S3C2410_WATCHDOG if WATCHDOG
- select HAVE_S3C_RTC if RTC_CLASS
- select HAVE_SMP
- select NEED_MACH_MEMORY_H
- select PINCTRL
- select PINCTRL_EXYNOS
- select PM_GENERIC_DOMAINS if PM_RUNTIME
- select S5P_DEV_MFC
- select SAMSUNG_DMADEV
- select SPARSE_IRQ
- select SRAM
- select USE_OF
- help
- Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
-
config ARCH_DAVINCI
bool "TI DaVinci"
select ARCH_HAS_HOLES_MEMORYMODEL
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 138070e42aa9..46634175cf54 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -7,6 +7,34 @@
# Configuration options for the EXYNOS4
+config ARCH_EXYNOS
+ bool "Samsung EXYNOS" if ARCH_MULTI_V7
+ select ARCH_HAS_BANDGAP
+ select ARCH_HAS_CPUFREQ
+ select ARCH_HAS_HOLES_MEMORYMODEL
+ select ARCH_REQUIRE_GPIOLIB
+ select ARM_AMBA
+ select ARM_GIC
+ select CLKSRC_OF
+ select COMMON_CLK_SAMSUNG
+ select CPU_V7
+ select GENERIC_CLOCKEVENTS
+ select HAVE_ARM_SCU if SMP
+ select HAVE_S3C2410_I2C if I2C
+ select HAVE_S3C2410_WATCHDOG if WATCHDOG
+ select HAVE_S3C_RTC if RTC_CLASS
+ select HAVE_SMP
+ select PINCTRL
+ select PINCTRL_EXYNOS
+ select PM_GENERIC_DOMAINS if PM_RUNTIME
+ select S5P_DEV_MFC
+ select SAMSUNG_DMADEV
+ select SPARSE_IRQ
+ select SRAM
+ select USE_OF
+ help
+ Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
+
if ARCH_EXYNOS
menu "SAMSUNG EXYNOS SoCs Support"
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 2e0666d31e75..97af694291f1 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -5,6 +5,8 @@
#
# Licensed under GPLv2
+ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include
+
obj-y :=
obj-m :=
obj-n :=
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 25c826ed3b65..5e5beaa9ae15 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -4,6 +4,9 @@
#
# Licensed under GPLv2
+ccflags-$(CONFIG_ARCH_MULTI_V7) += -I$(srctree)/$(src)/include
+ccflags-$(CONFIG_ARCH_EXYNOS) += -I$(srctree)/arch/arm/mach-exynos/include
+
obj-y :=
obj-m :=
obj-n := dummy.o
--
1.7.9.5
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support
@ 2014-05-21 6:52 ` Sachin Kamat
0 siblings, 0 replies; 45+ messages in thread
From: Sachin Kamat @ 2014-05-21 6:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Arnd Bergmann <arnd@arndb.de>
This makes it possible to enable the exynos platform as part of a
multiplatform kernel, in addition to keeping the single-platform
Exynos support.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
---
arch/arm/Kconfig | 30 ------------------------------
arch/arm/mach-exynos/Kconfig | 28 ++++++++++++++++++++++++++++
arch/arm/mach-exynos/Makefile | 2 ++
arch/arm/plat-samsung/Makefile | 3 +++
4 files changed, 33 insertions(+), 30 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 666b59b58ab0..26f2bae4d948 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -829,36 +829,6 @@ config ARCH_S5PV210
help
Samsung S5PV210/S5PC110 series based systems
-config ARCH_EXYNOS
- bool "Samsung EXYNOS"
- select ARCH_HAS_BANDGAP
- select ARCH_HAS_CPUFREQ
- select ARCH_HAS_HOLES_MEMORYMODEL
- select ARCH_REQUIRE_GPIOLIB
- select ARCH_SPARSEMEM_ENABLE
- select ARM_AMBA
- select ARM_GIC
- select CLKSRC_OF
- select COMMON_CLK_SAMSUNG
- select CPU_V7
- select GENERIC_CLOCKEVENTS
- select HAVE_ARM_SCU if SMP
- select HAVE_S3C2410_I2C if I2C
- select HAVE_S3C2410_WATCHDOG if WATCHDOG
- select HAVE_S3C_RTC if RTC_CLASS
- select HAVE_SMP
- select NEED_MACH_MEMORY_H
- select PINCTRL
- select PINCTRL_EXYNOS
- select PM_GENERIC_DOMAINS if PM_RUNTIME
- select S5P_DEV_MFC
- select SAMSUNG_DMADEV
- select SPARSE_IRQ
- select SRAM
- select USE_OF
- help
- Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
-
config ARCH_DAVINCI
bool "TI DaVinci"
select ARCH_HAS_HOLES_MEMORYMODEL
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 138070e42aa9..46634175cf54 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -7,6 +7,34 @@
# Configuration options for the EXYNOS4
+config ARCH_EXYNOS
+ bool "Samsung EXYNOS" if ARCH_MULTI_V7
+ select ARCH_HAS_BANDGAP
+ select ARCH_HAS_CPUFREQ
+ select ARCH_HAS_HOLES_MEMORYMODEL
+ select ARCH_REQUIRE_GPIOLIB
+ select ARM_AMBA
+ select ARM_GIC
+ select CLKSRC_OF
+ select COMMON_CLK_SAMSUNG
+ select CPU_V7
+ select GENERIC_CLOCKEVENTS
+ select HAVE_ARM_SCU if SMP
+ select HAVE_S3C2410_I2C if I2C
+ select HAVE_S3C2410_WATCHDOG if WATCHDOG
+ select HAVE_S3C_RTC if RTC_CLASS
+ select HAVE_SMP
+ select PINCTRL
+ select PINCTRL_EXYNOS
+ select PM_GENERIC_DOMAINS if PM_RUNTIME
+ select S5P_DEV_MFC
+ select SAMSUNG_DMADEV
+ select SPARSE_IRQ
+ select SRAM
+ select USE_OF
+ help
+ Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
+
if ARCH_EXYNOS
menu "SAMSUNG EXYNOS SoCs Support"
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 2e0666d31e75..97af694291f1 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -5,6 +5,8 @@
#
# Licensed under GPLv2
+ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include
+
obj-y :=
obj-m :=
obj-n :=
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 25c826ed3b65..5e5beaa9ae15 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -4,6 +4,9 @@
#
# Licensed under GPLv2
+ccflags-$(CONFIG_ARCH_MULTI_V7) += -I$(srctree)/$(src)/include
+ccflags-$(CONFIG_ARCH_EXYNOS) += -I$(srctree)/arch/arm/mach-exynos/include
+
obj-y :=
obj-m :=
obj-n := dummy.o
--
1.7.9.5
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 3/3] ARM: multi_v7_defconfig: Enable Exynos platform
2014-05-21 6:52 ` Sachin Kamat
@ 2014-05-21 6:52 ` Sachin Kamat
-1 siblings, 0 replies; 45+ messages in thread
From: Sachin Kamat @ 2014-05-21 6:52 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: linux-samsung-soc, kgene.kim, arnd, sachin.kamat
Enable Exynos platform and its related IPs.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
---
arch/arm/configs/multi_v7_defconfig | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 2fbafc529624..b76e978a62ae 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -48,6 +48,7 @@ CONFIG_ARCH_SPEAR13XX=y
CONFIG_MACH_SPEAR1310=y
CONFIG_MACH_SPEAR1340=y
CONFIG_ARCH_STI=y
+CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_SUNXI=y
CONFIG_ARCH_SIRF=y
CONFIG_ARCH_TEGRA=y
@@ -72,6 +73,7 @@ CONFIG_PCI_MSI=y
CONFIG_PCI_MVEBU=y
CONFIG_PCI_TEGRA=y
CONFIG_SMP=y
+CONFIG_NR_CPUS=8
CONFIG_HIGHPTE=y
CONFIG_CMA=y
CONFIG_ARM_APPENDED_DTB=y
@@ -155,6 +157,8 @@ CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
CONFIG_SERIAL_SIRFSOC=y
CONFIG_SERIAL_SIRFSOC_CONSOLE=y
CONFIG_SERIAL_TEGRA=y
@@ -178,6 +182,7 @@ CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_MUX_PINCTRL=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_I2C_EXYNOS5=y
CONFIG_I2C_MV64XXX=y
CONFIG_I2C_SIRF=y
CONFIG_I2C_TEGRA=y
@@ -213,6 +218,7 @@ CONFIG_MFD_AS3722=y
CONFIG_MFD_CROS_EC=y
CONFIG_MFD_CROS_EC_SPI=y
CONFIG_MFD_MAX8907=y
+CONFIG_MFD_SEC_CORE=y
CONFIG_MFD_PALMAS=y
CONFIG_MFD_TPS65090=y
CONFIG_MFD_TPS6586X=y
@@ -223,6 +229,8 @@ CONFIG_REGULATOR_AS3722=y
CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_MAX8907=y
CONFIG_REGULATOR_PALMAS=y
+CONFIG_REGULATOR_S2MPS11=y
+CONFIG_REGULATOR_S5M8767=y
CONFIG_REGULATOR_TPS51632=y
CONFIG_REGULATOR_TPS62360=y
CONFIG_REGULATOR_TPS65090=y
@@ -279,12 +287,16 @@ CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y
CONFIG_MMC_SDHCI_PXAV3=y
CONFIG_MMC_SDHCI_TEGRA=y
+CONFIG_MMC_SDHCI_S3C=y
CONFIG_MMC_SDHCI_DOVE=y
CONFIG_MMC_SDHCI_SPEAR=y
+CONFIG_MMC_SDHCI_S3C_DMA=y
CONFIG_MMC_SDHCI_BCM_KONA=y
CONFIG_MMC_OMAP=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MMC_MVSDIO=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_EXYNOS=y
CONFIG_EDAC=y
CONFIG_EDAC_MM_EDAC=y
CONFIG_EDAC_HIGHBANK_MC=y
--
1.7.9.5
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 3/3] ARM: multi_v7_defconfig: Enable Exynos platform
@ 2014-05-21 6:52 ` Sachin Kamat
0 siblings, 0 replies; 45+ messages in thread
From: Sachin Kamat @ 2014-05-21 6:52 UTC (permalink / raw)
To: linux-arm-kernel
Enable Exynos platform and its related IPs.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
---
arch/arm/configs/multi_v7_defconfig | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 2fbafc529624..b76e978a62ae 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -48,6 +48,7 @@ CONFIG_ARCH_SPEAR13XX=y
CONFIG_MACH_SPEAR1310=y
CONFIG_MACH_SPEAR1340=y
CONFIG_ARCH_STI=y
+CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_SUNXI=y
CONFIG_ARCH_SIRF=y
CONFIG_ARCH_TEGRA=y
@@ -72,6 +73,7 @@ CONFIG_PCI_MSI=y
CONFIG_PCI_MVEBU=y
CONFIG_PCI_TEGRA=y
CONFIG_SMP=y
+CONFIG_NR_CPUS=8
CONFIG_HIGHPTE=y
CONFIG_CMA=y
CONFIG_ARM_APPENDED_DTB=y
@@ -155,6 +157,8 @@ CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
CONFIG_SERIAL_SIRFSOC=y
CONFIG_SERIAL_SIRFSOC_CONSOLE=y
CONFIG_SERIAL_TEGRA=y
@@ -178,6 +182,7 @@ CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_MUX_PINCTRL=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_I2C_EXYNOS5=y
CONFIG_I2C_MV64XXX=y
CONFIG_I2C_SIRF=y
CONFIG_I2C_TEGRA=y
@@ -213,6 +218,7 @@ CONFIG_MFD_AS3722=y
CONFIG_MFD_CROS_EC=y
CONFIG_MFD_CROS_EC_SPI=y
CONFIG_MFD_MAX8907=y
+CONFIG_MFD_SEC_CORE=y
CONFIG_MFD_PALMAS=y
CONFIG_MFD_TPS65090=y
CONFIG_MFD_TPS6586X=y
@@ -223,6 +229,8 @@ CONFIG_REGULATOR_AS3722=y
CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_MAX8907=y
CONFIG_REGULATOR_PALMAS=y
+CONFIG_REGULATOR_S2MPS11=y
+CONFIG_REGULATOR_S5M8767=y
CONFIG_REGULATOR_TPS51632=y
CONFIG_REGULATOR_TPS62360=y
CONFIG_REGULATOR_TPS65090=y
@@ -279,12 +287,16 @@ CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y
CONFIG_MMC_SDHCI_PXAV3=y
CONFIG_MMC_SDHCI_TEGRA=y
+CONFIG_MMC_SDHCI_S3C=y
CONFIG_MMC_SDHCI_DOVE=y
CONFIG_MMC_SDHCI_SPEAR=y
+CONFIG_MMC_SDHCI_S3C_DMA=y
CONFIG_MMC_SDHCI_BCM_KONA=y
CONFIG_MMC_OMAP=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MMC_MVSDIO=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_EXYNOS=y
CONFIG_EDAC=y
CONFIG_EDAC_MM_EDAC=y
CONFIG_EDAC_HIGHBANK_MC=y
--
1.7.9.5
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support
2014-05-21 6:52 ` Sachin Kamat
@ 2014-05-21 8:16 ` Arnd Bergmann
-1 siblings, 0 replies; 45+ messages in thread
From: Arnd Bergmann @ 2014-05-21 8:16 UTC (permalink / raw)
To: Sachin Kamat; +Cc: linux-arm-kernel, linux-samsung-soc, kgene.kim
On Wednesday 21 May 2014 12:22:48 Sachin Kamat wrote:
> # Configuration options for the EXYNOS4
>
> +config ARCH_EXYNOS
> + bool "Samsung EXYNOS" if ARCH_MULTI_V7
> + select ARCH_HAS_BANDGAP
> + select ARCH_HAS_CPUFREQ
> + select ARCH_HAS_HOLES_MEMORYMODEL
> + select ARCH_REQUIRE_GPIOLIB
> + select ARM_AMBA
> + select ARM_GIC
> + select CLKSRC_OF
> + select COMMON_CLK_SAMSUNG
> + select CPU_V7
> + select GENERIC_CLOCKEVENTS
> + select HAVE_ARM_SCU if SMP
> + select HAVE_S3C2410_I2C if I2C
> + select HAVE_S3C2410_WATCHDOG if WATCHDOG
> + select HAVE_S3C_RTC if RTC_CLASS
> + select HAVE_SMP
> + select PINCTRL
> + select PINCTRL_EXYNOS
> + select PM_GENERIC_DOMAINS if PM_RUNTIME
> + select S5P_DEV_MFC
> + select SAMSUNG_DMADEV
> + select SPARSE_IRQ
> + select SRAM
> + select USE_OF
> + help
> + Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
> +
>
A number of these can be removed now: SPARSE_IRQ, USE_OF, GENERIC_CLOCKEVENTS,
CLKSRC_OF, CPU_V7 and HAVE_SMP are implied by ARCH_MULTIPLATFORM or ARCH_MULTI_V7,
so we shouldn't duplicate them here.
I believe SAMSUNG_DMADEV cannot work in multiplatform, but we also don't need
it any more.
The rest looks good.
Arnd
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support
@ 2014-05-21 8:16 ` Arnd Bergmann
0 siblings, 0 replies; 45+ messages in thread
From: Arnd Bergmann @ 2014-05-21 8:16 UTC (permalink / raw)
To: linux-arm-kernel
On Wednesday 21 May 2014 12:22:48 Sachin Kamat wrote:
> # Configuration options for the EXYNOS4
>
> +config ARCH_EXYNOS
> + bool "Samsung EXYNOS" if ARCH_MULTI_V7
> + select ARCH_HAS_BANDGAP
> + select ARCH_HAS_CPUFREQ
> + select ARCH_HAS_HOLES_MEMORYMODEL
> + select ARCH_REQUIRE_GPIOLIB
> + select ARM_AMBA
> + select ARM_GIC
> + select CLKSRC_OF
> + select COMMON_CLK_SAMSUNG
> + select CPU_V7
> + select GENERIC_CLOCKEVENTS
> + select HAVE_ARM_SCU if SMP
> + select HAVE_S3C2410_I2C if I2C
> + select HAVE_S3C2410_WATCHDOG if WATCHDOG
> + select HAVE_S3C_RTC if RTC_CLASS
> + select HAVE_SMP
> + select PINCTRL
> + select PINCTRL_EXYNOS
> + select PM_GENERIC_DOMAINS if PM_RUNTIME
> + select S5P_DEV_MFC
> + select SAMSUNG_DMADEV
> + select SPARSE_IRQ
> + select SRAM
> + select USE_OF
> + help
> + Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
> +
>
A number of these can be removed now: SPARSE_IRQ, USE_OF, GENERIC_CLOCKEVENTS,
CLKSRC_OF, CPU_V7 and HAVE_SMP are implied by ARCH_MULTIPLATFORM or ARCH_MULTI_V7,
so we shouldn't duplicate them here.
I believe SAMSUNG_DMADEV cannot work in multiplatform, but we also don't need
it any more.
The rest looks good.
Arnd
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support
2014-05-21 8:16 ` Arnd Bergmann
@ 2014-05-21 8:20 ` Sachin Kamat
-1 siblings, 0 replies; 45+ messages in thread
From: Sachin Kamat @ 2014-05-21 8:20 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linux-arm-kernel, linux-samsung-soc, Kukjin Kim
On 21 May 2014 13:46, Arnd Bergmann <arnd@arndb.de> wrote:
> On Wednesday 21 May 2014 12:22:48 Sachin Kamat wrote:
>> # Configuration options for the EXYNOS4
>>
>> +config ARCH_EXYNOS
>> + bool "Samsung EXYNOS" if ARCH_MULTI_V7
>> + select ARCH_HAS_BANDGAP
>> + select ARCH_HAS_CPUFREQ
>> + select ARCH_HAS_HOLES_MEMORYMODEL
>> + select ARCH_REQUIRE_GPIOLIB
>> + select ARM_AMBA
>> + select ARM_GIC
>> + select CLKSRC_OF
>> + select COMMON_CLK_SAMSUNG
>> + select CPU_V7
>> + select GENERIC_CLOCKEVENTS
>> + select HAVE_ARM_SCU if SMP
>> + select HAVE_S3C2410_I2C if I2C
>> + select HAVE_S3C2410_WATCHDOG if WATCHDOG
>> + select HAVE_S3C_RTC if RTC_CLASS
>> + select HAVE_SMP
>> + select PINCTRL
>> + select PINCTRL_EXYNOS
>> + select PM_GENERIC_DOMAINS if PM_RUNTIME
>> + select S5P_DEV_MFC
>> + select SAMSUNG_DMADEV
>> + select SPARSE_IRQ
>> + select SRAM
>> + select USE_OF
>> + help
>> + Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
>> +
>>
>
> A number of these can be removed now: SPARSE_IRQ, USE_OF, GENERIC_CLOCKEVENTS,
> CLKSRC_OF, CPU_V7 and HAVE_SMP are implied by ARCH_MULTIPLATFORM or ARCH_MULTI_V7,
> so we shouldn't duplicate them here.
OK.
>
> I believe SAMSUNG_DMADEV cannot work in multiplatform, but we also don't need
> it any more.
Yes this is no longer needed now that we use generic DMA engine. Will
remove this too.
Thanks for the review.
--
With warm regards,
Sachin
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support
@ 2014-05-21 8:20 ` Sachin Kamat
0 siblings, 0 replies; 45+ messages in thread
From: Sachin Kamat @ 2014-05-21 8:20 UTC (permalink / raw)
To: linux-arm-kernel
On 21 May 2014 13:46, Arnd Bergmann <arnd@arndb.de> wrote:
> On Wednesday 21 May 2014 12:22:48 Sachin Kamat wrote:
>> # Configuration options for the EXYNOS4
>>
>> +config ARCH_EXYNOS
>> + bool "Samsung EXYNOS" if ARCH_MULTI_V7
>> + select ARCH_HAS_BANDGAP
>> + select ARCH_HAS_CPUFREQ
>> + select ARCH_HAS_HOLES_MEMORYMODEL
>> + select ARCH_REQUIRE_GPIOLIB
>> + select ARM_AMBA
>> + select ARM_GIC
>> + select CLKSRC_OF
>> + select COMMON_CLK_SAMSUNG
>> + select CPU_V7
>> + select GENERIC_CLOCKEVENTS
>> + select HAVE_ARM_SCU if SMP
>> + select HAVE_S3C2410_I2C if I2C
>> + select HAVE_S3C2410_WATCHDOG if WATCHDOG
>> + select HAVE_S3C_RTC if RTC_CLASS
>> + select HAVE_SMP
>> + select PINCTRL
>> + select PINCTRL_EXYNOS
>> + select PM_GENERIC_DOMAINS if PM_RUNTIME
>> + select S5P_DEV_MFC
>> + select SAMSUNG_DMADEV
>> + select SPARSE_IRQ
>> + select SRAM
>> + select USE_OF
>> + help
>> + Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
>> +
>>
>
> A number of these can be removed now: SPARSE_IRQ, USE_OF, GENERIC_CLOCKEVENTS,
> CLKSRC_OF, CPU_V7 and HAVE_SMP are implied by ARCH_MULTIPLATFORM or ARCH_MULTI_V7,
> so we shouldn't duplicate them here.
OK.
>
> I believe SAMSUNG_DMADEV cannot work in multiplatform, but we also don't need
> it any more.
Yes this is no longer needed now that we use generic DMA engine. Will
remove this too.
Thanks for the review.
--
With warm regards,
Sachin
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 0/3] Exynos multi-platform support
2014-05-21 6:52 ` Sachin Kamat
@ 2014-05-21 8:26 ` Tomasz Figa
-1 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2014-05-21 8:26 UTC (permalink / raw)
To: Sachin Kamat, linux-arm-kernel; +Cc: linux-samsung-soc, kgene.kim, arnd
Hi,
On 21.05.2014 08:52, Sachin Kamat wrote:
> The patches in this series were earlier sent as part of other
> series. Now that the other patches have been merged, re-sending
> these after rebasing them on linux-next (20140519).
> Tested on Exynos4210, 4412, 5250 and 5420 based boards.
>
> A particular change in this series is the removal of single platform
> support for Exynos as suggested by Arnd and Olof (patch 2/3). With
> this change certain features (drivers) which are not yet multi-platform
> aware like cpufreq, devfreq and DRM based gscaler will not be available
> now.
I really don't like this. Well, I don't care too much for devfreq and
DRM Gscaler, as the the first one doesn't even support DT and Gscaler is
usually used through a V4L2 driver, which should be fine. However
cpufreq is quite important feature and it will be a serious regression
in terms of performance (most boards don't boot at maximum frequency)
and power consumption (no ability to scale the CPU down).
So my proposal here is to hack the cpufreq driver with a minimal amount
of changes needed to compile and use it on multi-platform builds. I'll
send a patch later today to show what I mean. It would have to be merged
as a prerequisite for this series, to keep the history bisectable.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 0/3] Exynos multi-platform support
@ 2014-05-21 8:26 ` Tomasz Figa
0 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2014-05-21 8:26 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On 21.05.2014 08:52, Sachin Kamat wrote:
> The patches in this series were earlier sent as part of other
> series. Now that the other patches have been merged, re-sending
> these after rebasing them on linux-next (20140519).
> Tested on Exynos4210, 4412, 5250 and 5420 based boards.
>
> A particular change in this series is the removal of single platform
> support for Exynos as suggested by Arnd and Olof (patch 2/3). With
> this change certain features (drivers) which are not yet multi-platform
> aware like cpufreq, devfreq and DRM based gscaler will not be available
> now.
I really don't like this. Well, I don't care too much for devfreq and
DRM Gscaler, as the the first one doesn't even support DT and Gscaler is
usually used through a V4L2 driver, which should be fine. However
cpufreq is quite important feature and it will be a serious regression
in terms of performance (most boards don't boot at maximum frequency)
and power consumption (no ability to scale the CPU down).
So my proposal here is to hack the cpufreq driver with a minimal amount
of changes needed to compile and use it on multi-platform builds. I'll
send a patch later today to show what I mean. It would have to be merged
as a prerequisite for this series, to keep the history bisectable.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support
2014-05-21 6:52 ` Sachin Kamat
@ 2014-05-21 10:36 ` Bartlomiej Zolnierkiewicz
-1 siblings, 0 replies; 45+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2014-05-21 10:36 UTC (permalink / raw)
To: Sachin Kamat; +Cc: linux-arm-kernel, linux-samsung-soc, kgene.kim, arnd
Hi,
On Wednesday, May 21, 2014 12:22:48 PM Sachin Kamat wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> This makes it possible to enable the exynos platform as part of a
> multiplatform kernel, in addition to keeping the single-platform
> Exynos support.
The patch description is wrong. After this patch single-platform Exynos
support is no longer available and it adds at least one serious regression
(cpufreq) which should be fixed before merging this patch. Moreover it
seems that this patch (#2) should be merged with patch #3 to preserve
bisectability. Please also note that exynos_defconfig is no longer useful
after these changes and can be be removed.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
> ---
> arch/arm/Kconfig | 30 ------------------------------
> arch/arm/mach-exynos/Kconfig | 28 ++++++++++++++++++++++++++++
> arch/arm/mach-exynos/Makefile | 2 ++
> arch/arm/plat-samsung/Makefile | 3 +++
> 4 files changed, 33 insertions(+), 30 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 666b59b58ab0..26f2bae4d948 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -829,36 +829,6 @@ config ARCH_S5PV210
> help
> Samsung S5PV210/S5PC110 series based systems
>
> -config ARCH_EXYNOS
> - bool "Samsung EXYNOS"
> - select ARCH_HAS_BANDGAP
> - select ARCH_HAS_CPUFREQ
> - select ARCH_HAS_HOLES_MEMORYMODEL
> - select ARCH_REQUIRE_GPIOLIB
> - select ARCH_SPARSEMEM_ENABLE
> - select ARM_AMBA
> - select ARM_GIC
> - select CLKSRC_OF
> - select COMMON_CLK_SAMSUNG
> - select CPU_V7
> - select GENERIC_CLOCKEVENTS
> - select HAVE_ARM_SCU if SMP
> - select HAVE_S3C2410_I2C if I2C
> - select HAVE_S3C2410_WATCHDOG if WATCHDOG
> - select HAVE_S3C_RTC if RTC_CLASS
> - select HAVE_SMP
> - select NEED_MACH_MEMORY_H
> - select PINCTRL
> - select PINCTRL_EXYNOS
> - select PM_GENERIC_DOMAINS if PM_RUNTIME
> - select S5P_DEV_MFC
> - select SAMSUNG_DMADEV
> - select SPARSE_IRQ
> - select SRAM
> - select USE_OF
> - help
> - Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
> -
> config ARCH_DAVINCI
> bool "TI DaVinci"
> select ARCH_HAS_HOLES_MEMORYMODEL
> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> index 138070e42aa9..46634175cf54 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -7,6 +7,34 @@
>
> # Configuration options for the EXYNOS4
>
> +config ARCH_EXYNOS
> + bool "Samsung EXYNOS" if ARCH_MULTI_V7
> + select ARCH_HAS_BANDGAP
> + select ARCH_HAS_CPUFREQ
> + select ARCH_HAS_HOLES_MEMORYMODEL
> + select ARCH_REQUIRE_GPIOLIB
> + select ARM_AMBA
> + select ARM_GIC
> + select CLKSRC_OF
> + select COMMON_CLK_SAMSUNG
> + select CPU_V7
> + select GENERIC_CLOCKEVENTS
> + select HAVE_ARM_SCU if SMP
> + select HAVE_S3C2410_I2C if I2C
> + select HAVE_S3C2410_WATCHDOG if WATCHDOG
> + select HAVE_S3C_RTC if RTC_CLASS
> + select HAVE_SMP
> + select PINCTRL
> + select PINCTRL_EXYNOS
> + select PM_GENERIC_DOMAINS if PM_RUNTIME
> + select S5P_DEV_MFC
> + select SAMSUNG_DMADEV
> + select SPARSE_IRQ
> + select SRAM
> + select USE_OF
> + help
> + Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
> +
> if ARCH_EXYNOS
>
> menu "SAMSUNG EXYNOS SoCs Support"
> diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
> index 2e0666d31e75..97af694291f1 100644
> --- a/arch/arm/mach-exynos/Makefile
> +++ b/arch/arm/mach-exynos/Makefile
> @@ -5,6 +5,8 @@
> #
> # Licensed under GPLv2
>
> +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include
> +
> obj-y :=
> obj-m :=
> obj-n :=
> diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
> index 25c826ed3b65..5e5beaa9ae15 100644
> --- a/arch/arm/plat-samsung/Makefile
> +++ b/arch/arm/plat-samsung/Makefile
> @@ -4,6 +4,9 @@
> #
> # Licensed under GPLv2
>
> +ccflags-$(CONFIG_ARCH_MULTI_V7) += -I$(srctree)/$(src)/include
> +ccflags-$(CONFIG_ARCH_EXYNOS) += -I$(srctree)/arch/arm/mach-exynos/include
> +
> obj-y :=
> obj-m :=
> obj-n := dummy.o
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support
@ 2014-05-21 10:36 ` Bartlomiej Zolnierkiewicz
0 siblings, 0 replies; 45+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2014-05-21 10:36 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Wednesday, May 21, 2014 12:22:48 PM Sachin Kamat wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> This makes it possible to enable the exynos platform as part of a
> multiplatform kernel, in addition to keeping the single-platform
> Exynos support.
The patch description is wrong. After this patch single-platform Exynos
support is no longer available and it adds at least one serious regression
(cpufreq) which should be fixed before merging this patch. Moreover it
seems that this patch (#2) should be merged with patch #3 to preserve
bisectability. Please also note that exynos_defconfig is no longer useful
after these changes and can be be removed.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
> ---
> arch/arm/Kconfig | 30 ------------------------------
> arch/arm/mach-exynos/Kconfig | 28 ++++++++++++++++++++++++++++
> arch/arm/mach-exynos/Makefile | 2 ++
> arch/arm/plat-samsung/Makefile | 3 +++
> 4 files changed, 33 insertions(+), 30 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 666b59b58ab0..26f2bae4d948 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -829,36 +829,6 @@ config ARCH_S5PV210
> help
> Samsung S5PV210/S5PC110 series based systems
>
> -config ARCH_EXYNOS
> - bool "Samsung EXYNOS"
> - select ARCH_HAS_BANDGAP
> - select ARCH_HAS_CPUFREQ
> - select ARCH_HAS_HOLES_MEMORYMODEL
> - select ARCH_REQUIRE_GPIOLIB
> - select ARCH_SPARSEMEM_ENABLE
> - select ARM_AMBA
> - select ARM_GIC
> - select CLKSRC_OF
> - select COMMON_CLK_SAMSUNG
> - select CPU_V7
> - select GENERIC_CLOCKEVENTS
> - select HAVE_ARM_SCU if SMP
> - select HAVE_S3C2410_I2C if I2C
> - select HAVE_S3C2410_WATCHDOG if WATCHDOG
> - select HAVE_S3C_RTC if RTC_CLASS
> - select HAVE_SMP
> - select NEED_MACH_MEMORY_H
> - select PINCTRL
> - select PINCTRL_EXYNOS
> - select PM_GENERIC_DOMAINS if PM_RUNTIME
> - select S5P_DEV_MFC
> - select SAMSUNG_DMADEV
> - select SPARSE_IRQ
> - select SRAM
> - select USE_OF
> - help
> - Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
> -
> config ARCH_DAVINCI
> bool "TI DaVinci"
> select ARCH_HAS_HOLES_MEMORYMODEL
> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> index 138070e42aa9..46634175cf54 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -7,6 +7,34 @@
>
> # Configuration options for the EXYNOS4
>
> +config ARCH_EXYNOS
> + bool "Samsung EXYNOS" if ARCH_MULTI_V7
> + select ARCH_HAS_BANDGAP
> + select ARCH_HAS_CPUFREQ
> + select ARCH_HAS_HOLES_MEMORYMODEL
> + select ARCH_REQUIRE_GPIOLIB
> + select ARM_AMBA
> + select ARM_GIC
> + select CLKSRC_OF
> + select COMMON_CLK_SAMSUNG
> + select CPU_V7
> + select GENERIC_CLOCKEVENTS
> + select HAVE_ARM_SCU if SMP
> + select HAVE_S3C2410_I2C if I2C
> + select HAVE_S3C2410_WATCHDOG if WATCHDOG
> + select HAVE_S3C_RTC if RTC_CLASS
> + select HAVE_SMP
> + select PINCTRL
> + select PINCTRL_EXYNOS
> + select PM_GENERIC_DOMAINS if PM_RUNTIME
> + select S5P_DEV_MFC
> + select SAMSUNG_DMADEV
> + select SPARSE_IRQ
> + select SRAM
> + select USE_OF
> + help
> + Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
> +
> if ARCH_EXYNOS
>
> menu "SAMSUNG EXYNOS SoCs Support"
> diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
> index 2e0666d31e75..97af694291f1 100644
> --- a/arch/arm/mach-exynos/Makefile
> +++ b/arch/arm/mach-exynos/Makefile
> @@ -5,6 +5,8 @@
> #
> # Licensed under GPLv2
>
> +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include
> +
> obj-y :=
> obj-m :=
> obj-n :=
> diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
> index 25c826ed3b65..5e5beaa9ae15 100644
> --- a/arch/arm/plat-samsung/Makefile
> +++ b/arch/arm/plat-samsung/Makefile
> @@ -4,6 +4,9 @@
> #
> # Licensed under GPLv2
>
> +ccflags-$(CONFIG_ARCH_MULTI_V7) += -I$(srctree)/$(src)/include
> +ccflags-$(CONFIG_ARCH_EXYNOS) += -I$(srctree)/arch/arm/mach-exynos/include
> +
> obj-y :=
> obj-m :=
> obj-n := dummy.o
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-21 8:26 ` Tomasz Figa
(?)
@ 2014-05-21 11:12 ` Tomasz Figa
2014-05-21 11:17 ` Tomasz Figa
` (2 more replies)
-1 siblings, 3 replies; 45+ messages in thread
From: Tomasz Figa @ 2014-05-21 11:12 UTC (permalink / raw)
To: linux-arm-kernel
Currently Exynos cpufreq drivers rely on globally mapped clock
controller registers to configure frequency of CPU cores. This is
obviously wrong and will be removed in near future, but to enable
support for multi-platform builds without introducing a regression it
needs to be worked around.
This patch hacks the code to look for clock controller node in device
tree and map its registers using of_iomap(), instead of relying on
global mapping, so dependencies on platform headers are removed and the
driver can compile again with multiplatform support.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
---
drivers/cpufreq/Kconfig.arm | 6 +++---
drivers/cpufreq/exynos-cpufreq.c | 2 --
drivers/cpufreq/exynos-cpufreq.h | 30 ++++++++++++++----------------
drivers/cpufreq/exynos4210-cpufreq.c | 31 +++++++++++++++++++++++++------
drivers/cpufreq/exynos4x12-cpufreq.c | 32 ++++++++++++++++++++++++++------
drivers/cpufreq/exynos5250-cpufreq.c | 35 +++++++++++++++++++++++++++--------
6 files changed, 95 insertions(+), 41 deletions(-)
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 6a7dd3e..2b7548f 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -31,7 +31,7 @@ config ARM_EXYNOS_CPUFREQ
config ARM_EXYNOS4210_CPUFREQ
bool "SAMSUNG EXYNOS4210"
- depends on CPU_EXYNOS4210 && !ARCH_MULTIPLATFORM
+ depends on CPU_EXYNOS4210
default y
select ARM_EXYNOS_CPUFREQ
help
@@ -42,7 +42,7 @@ config ARM_EXYNOS4210_CPUFREQ
config ARM_EXYNOS4X12_CPUFREQ
bool "SAMSUNG EXYNOS4x12"
- depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412) && !ARCH_MULTIPLATFORM
+ depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412)
default y
select ARM_EXYNOS_CPUFREQ
help
@@ -53,7 +53,7 @@ config ARM_EXYNOS4X12_CPUFREQ
config ARM_EXYNOS5250_CPUFREQ
bool "SAMSUNG EXYNOS5250"
- depends on SOC_EXYNOS5250 && !ARCH_MULTIPLATFORM
+ depends on SOC_EXYNOS5250
default y
select ARM_EXYNOS_CPUFREQ
help
diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index 7c2a096..1e0ec57 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -19,8 +19,6 @@
#include <linux/platform_device.h>
#include <linux/of.h>
-#include <plat/cpu.h>
-
#include "exynos-cpufreq.h"
static struct exynos_dvfs_info *exynos_info;
diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
index a28ee9d..8dfebac 100644
--- a/drivers/cpufreq/exynos-cpufreq.h
+++ b/drivers/cpufreq/exynos-cpufreq.h
@@ -50,6 +50,7 @@ struct exynos_dvfs_info {
struct cpufreq_frequency_table *freq_table;
void (*set_freq)(unsigned int, unsigned int);
bool (*need_apll_change)(unsigned int, unsigned int);
+ void __iomem *cmu_regs;
};
#ifdef CONFIG_ARM_EXYNOS4210_CPUFREQ
@@ -77,24 +78,21 @@ static inline int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
}
#endif
-#include <plat/cpu.h>
-#include <mach/map.h>
+#define EXYNOS4_CLKSRC_CPU 0x14200
+#define EXYNOS4_CLKMUX_STATCPU 0x14400
-#define EXYNOS4_CLKSRC_CPU (S5P_VA_CMU + 0x14200)
-#define EXYNOS4_CLKMUX_STATCPU (S5P_VA_CMU + 0x14400)
-
-#define EXYNOS4_CLKDIV_CPU (S5P_VA_CMU + 0x14500)
-#define EXYNOS4_CLKDIV_CPU1 (S5P_VA_CMU + 0x14504)
-#define EXYNOS4_CLKDIV_STATCPU (S5P_VA_CMU + 0x14600)
-#define EXYNOS4_CLKDIV_STATCPU1 (S5P_VA_CMU + 0x14604)
+#define EXYNOS4_CLKDIV_CPU 0x14500
+#define EXYNOS4_CLKDIV_CPU1 0x14504
+#define EXYNOS4_CLKDIV_STATCPU 0x14600
+#define EXYNOS4_CLKDIV_STATCPU1 0x14604
#define EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT (16)
#define EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK (0x7 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT)
-#define EXYNOS5_APLL_LOCK (S5P_VA_CMU + 0x00000)
-#define EXYNOS5_APLL_CON0 (S5P_VA_CMU + 0x00100)
-#define EXYNOS5_CLKMUX_STATCPU (S5P_VA_CMU + 0x00400)
-#define EXYNOS5_CLKDIV_CPU0 (S5P_VA_CMU + 0x00500)
-#define EXYNOS5_CLKDIV_CPU1 (S5P_VA_CMU + 0x00504)
-#define EXYNOS5_CLKDIV_STATCPU0 (S5P_VA_CMU + 0x00600)
-#define EXYNOS5_CLKDIV_STATCPU1 (S5P_VA_CMU + 0x00604)
+#define EXYNOS5_APLL_LOCK 0x00000
+#define EXYNOS5_APLL_CON0 0x00100
+#define EXYNOS5_CLKMUX_STATCPU 0x00400
+#define EXYNOS5_CLKDIV_CPU0 0x00500
+#define EXYNOS5_CLKDIV_CPU1 0x00504
+#define EXYNOS5_CLKDIV_STATCPU0 0x00600
+#define EXYNOS5_CLKDIV_STATCPU1 0x00604
diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c
index 6384e5b..a412146 100644
--- a/drivers/cpufreq/exynos4210-cpufreq.c
+++ b/drivers/cpufreq/exynos4210-cpufreq.c
@@ -16,6 +16,8 @@
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/cpufreq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include "exynos-cpufreq.h"
@@ -23,6 +25,7 @@ static struct clk *cpu_clk;
static struct clk *moutcore;
static struct clk *mout_mpll;
static struct clk *mout_apll;
+static struct exynos_dvfs_info *cpufreq;
static unsigned int exynos4210_volt_table[] = {
1250000, 1150000, 1050000, 975000, 950000,
@@ -60,20 +63,20 @@ static void exynos4210_set_clkdiv(unsigned int div_index)
tmp = apll_freq_4210[div_index].clk_div_cpu0;
- __raw_writel(tmp, EXYNOS4_CLKDIV_CPU);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
do {
- tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU);
} while (tmp & 0x1111111);
/* Change Divider - CPU1 */
tmp = apll_freq_4210[div_index].clk_div_cpu1;
- __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
do {
- tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
} while (tmp & 0x11);
}
@@ -85,7 +88,7 @@ static void exynos4210_set_apll(unsigned int index)
clk_set_parent(moutcore, mout_mpll);
do {
- tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU)
+ tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
>> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
tmp &= 0x7;
} while (tmp != 0x2);
@@ -96,7 +99,7 @@ static void exynos4210_set_apll(unsigned int index)
clk_set_parent(moutcore, mout_apll);
do {
- tmp = __raw_readl(EXYNOS4_CLKMUX_STATCPU);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
tmp &= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
} while (tmp != (0x1 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
}
@@ -115,8 +118,22 @@ static void exynos4210_set_frequency(unsigned int old_index,
int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
{
+ struct device_node *np;
unsigned long rate;
+ np = of_find_compatible_node(NULL, NULL, "samsung,exynos4210-clock");
+ if (!np) {
+ pr_err("%s: failed to find clock controller DT node\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ info->cmu_regs = of_iomap(np, 0);
+ if (!info->cmu_regs) {
+ pr_err("%s: failed to map CMU registers\n", __func__);
+ return -EFAULT;
+ }
+
cpu_clk = clk_get(NULL, "armclk");
if (IS_ERR(cpu_clk))
return PTR_ERR(cpu_clk);
@@ -143,6 +160,8 @@ int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
info->freq_table = exynos4210_freq_table;
info->set_freq = exynos4210_set_frequency;
+ cpufreq = info;
+
return 0;
err_mout_apll:
diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
index 63a3907..aaeceb6 100644
--- a/drivers/cpufreq/exynos4x12-cpufreq.c
+++ b/drivers/cpufreq/exynos4x12-cpufreq.c
@@ -16,6 +16,8 @@
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/cpufreq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include "exynos-cpufreq.h"
@@ -23,6 +25,7 @@ static struct clk *cpu_clk;
static struct clk *moutcore;
static struct clk *mout_mpll;
static struct clk *mout_apll;
+static struct exynos_dvfs_info *cpufreq;
static unsigned int exynos4x12_volt_table[] = {
1350000, 1287500, 1250000, 1187500, 1137500, 1087500, 1037500,
@@ -105,19 +108,20 @@ static void exynos4x12_set_clkdiv(unsigned int div_index)
tmp = apll_freq_4x12[div_index].clk_div_cpu0;
- __raw_writel(tmp, EXYNOS4_CLKDIV_CPU);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
- while (__raw_readl(EXYNOS4_CLKDIV_STATCPU) & 0x11111111)
+ while (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU)
+ & 0x11111111)
cpu_relax();
/* Change Divider - CPU1 */
tmp = apll_freq_4x12[div_index].clk_div_cpu1;
- __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
do {
cpu_relax();
- tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
} while (tmp != 0x0);
}
@@ -130,7 +134,7 @@ static void exynos4x12_set_apll(unsigned int index)
do {
cpu_relax();
- tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU)
+ tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
>> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
tmp &= 0x7;
} while (tmp != 0x2);
@@ -142,7 +146,7 @@ static void exynos4x12_set_apll(unsigned int index)
do {
cpu_relax();
- tmp = __raw_readl(EXYNOS4_CLKMUX_STATCPU);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
tmp &= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
} while (tmp != (0x1 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
}
@@ -161,8 +165,22 @@ static void exynos4x12_set_frequency(unsigned int old_index,
int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
{
+ struct device_node *np;
unsigned long rate;
+ np = of_find_compatible_node(NULL, NULL, "samsung,exynos4412-clock");
+ if (!np) {
+ pr_err("%s: failed to find clock controller DT node\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ info->cmu_regs = of_iomap(np, 0);
+ if (!info->cmu_regs) {
+ pr_err("%s: failed to map CMU registers\n", __func__);
+ return -EFAULT;
+ }
+
cpu_clk = clk_get(NULL, "armclk");
if (IS_ERR(cpu_clk))
return PTR_ERR(cpu_clk);
@@ -194,6 +212,8 @@ int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
info->freq_table = exynos4x12_freq_table;
info->set_freq = exynos4x12_set_frequency;
+ cpufreq = info;
+
return 0;
err_mout_apll:
diff --git a/drivers/cpufreq/exynos5250-cpufreq.c b/drivers/cpufreq/exynos5250-cpufreq.c
index 363a0b3..cbfbe30 100644
--- a/drivers/cpufreq/exynos5250-cpufreq.c
+++ b/drivers/cpufreq/exynos5250-cpufreq.c
@@ -16,8 +16,8 @@
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/cpufreq.h>
-
-#include <mach/map.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include "exynos-cpufreq.h"
@@ -25,6 +25,7 @@ static struct clk *cpu_clk;
static struct clk *moutcore;
static struct clk *mout_mpll;
static struct clk *mout_apll;
+static struct exynos_dvfs_info *cpufreq;
static unsigned int exynos5250_volt_table[] = {
1300000, 1250000, 1225000, 1200000, 1150000,
@@ -87,17 +88,18 @@ static void set_clkdiv(unsigned int div_index)
tmp = apll_freq_5250[div_index].clk_div_cpu0;
- __raw_writel(tmp, EXYNOS5_CLKDIV_CPU0);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU0);
- while (__raw_readl(EXYNOS5_CLKDIV_STATCPU0) & 0x11111111)
+ while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU0)
+ & 0x11111111)
cpu_relax();
/* Change Divider - CPU1 */
tmp = apll_freq_5250[div_index].clk_div_cpu1;
- __raw_writel(tmp, EXYNOS5_CLKDIV_CPU1);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU1);
- while (__raw_readl(EXYNOS5_CLKDIV_STATCPU1) & 0x11)
+ while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU1) & 0x11)
cpu_relax();
}
@@ -111,7 +113,8 @@ static void set_apll(unsigned int index)
do {
cpu_relax();
- tmp = (__raw_readl(EXYNOS5_CLKMUX_STATCPU) >> 16);
+ tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU)
+ >> 16);
tmp &= 0x7;
} while (tmp != 0x2);
@@ -122,7 +125,7 @@ static void set_apll(unsigned int index)
do {
cpu_relax();
- tmp = __raw_readl(EXYNOS5_CLKMUX_STATCPU);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU);
tmp &= (0x7 << 16);
} while (tmp != (0x1 << 16));
}
@@ -141,8 +144,22 @@ static void exynos5250_set_frequency(unsigned int old_index,
int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
{
+ struct device_node *np;
unsigned long rate;
+ np = of_find_compatible_node(NULL, NULL, "samsung,exynos5250-clock");
+ if (!np) {
+ pr_err("%s: failed to find clock controller DT node\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ info->cmu_regs = of_iomap(np, 0);
+ if (!info->cmu_regs) {
+ pr_err("%s: failed to map CMU registers\n", __func__);
+ return -EFAULT;
+ }
+
cpu_clk = clk_get(NULL, "armclk");
if (IS_ERR(cpu_clk))
return PTR_ERR(cpu_clk);
@@ -169,6 +186,8 @@ int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
info->freq_table = exynos5250_freq_table;
info->set_freq = exynos5250_set_frequency;
+ cpufreq = info;
+
return 0;
err_mout_apll:
--
1.9.3
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support
2014-05-21 10:36 ` Bartlomiej Zolnierkiewicz
@ 2014-05-21 11:14 ` Sachin Kamat
-1 siblings, 0 replies; 45+ messages in thread
From: Sachin Kamat @ 2014-05-21 11:14 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz
Cc: linux-arm-kernel, linux-samsung-soc, Kukjin Kim, Arnd Bergmann
Hi Bartlomiej,
On 21 May 2014 16:06, Bartlomiej Zolnierkiewicz
<b.zolnierkie@samsung.com> wrote:
>
> Hi,
>
> On Wednesday, May 21, 2014 12:22:48 PM Sachin Kamat wrote:
>> From: Arnd Bergmann <arnd@arndb.de>
>>
>> This makes it possible to enable the exynos platform as part of a
>> multiplatform kernel, in addition to keeping the single-platform
>> Exynos support.
>
> The patch description is wrong. After this patch single-platform Exynos
> support is no longer available
Forgot to update the message while rebasing. Thanks for noticing.
> and it adds at least one serious regression
I have mentioned about this in the cover letter.
> (cpufreq) which should be fixed before merging this patch. Moreover it
> seems that this patch (#2) should be merged with patch #3 to preserve
> bisectability.
At this point exynos_defconfig works.
>Please also note that exynos_defconfig is no longer useful
> after these changes and can be be removed.
Yes.
---
With warm regards,
Sachin
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support
@ 2014-05-21 11:14 ` Sachin Kamat
0 siblings, 0 replies; 45+ messages in thread
From: Sachin Kamat @ 2014-05-21 11:14 UTC (permalink / raw)
To: linux-arm-kernel
Hi Bartlomiej,
On 21 May 2014 16:06, Bartlomiej Zolnierkiewicz
<b.zolnierkie@samsung.com> wrote:
>
> Hi,
>
> On Wednesday, May 21, 2014 12:22:48 PM Sachin Kamat wrote:
>> From: Arnd Bergmann <arnd@arndb.de>
>>
>> This makes it possible to enable the exynos platform as part of a
>> multiplatform kernel, in addition to keeping the single-platform
>> Exynos support.
>
> The patch description is wrong. After this patch single-platform Exynos
> support is no longer available
Forgot to update the message while rebasing. Thanks for noticing.
> and it adds at least one serious regression
I have mentioned about this in the cover letter.
> (cpufreq) which should be fixed before merging this patch. Moreover it
> seems that this patch (#2) should be merged with patch #3 to preserve
> bisectability.
At this point exynos_defconfig works.
>Please also note that exynos_defconfig is no longer useful
> after these changes and can be be removed.
Yes.
---
With warm regards,
Sachin
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-21 11:12 ` [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM Tomasz Figa
@ 2014-05-21 11:17 ` Tomasz Figa
2014-05-21 12:21 ` Arnd Bergmann
2014-05-23 15:22 ` Tomasz Figa
2 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2014-05-21 11:17 UTC (permalink / raw)
To: linux-arm-kernel, Sachin Kamat
Cc: Kukjin Kim, Arnd Bergmann, Viresh Kumar, Rafael J. Wysocki,
Bartlomiej Zolnierkiewicz, linux-samsung-soc
Forwarding to linux-samsung-soc ML, which was omitted by mistake. Sorry,
for the noise.
Best regards,
Tomasz
On 21.05.2014 13:12, Tomasz Figa wrote:
> Currently Exynos cpufreq drivers rely on globally mapped clock
> controller registers to configure frequency of CPU cores. This is
> obviously wrong and will be removed in near future, but to enable
> support for multi-platform builds without introducing a regression it
> needs to be worked around.
>
> This patch hacks the code to look for clock controller node in device
> tree and map its registers using of_iomap(), instead of relying on
> global mapping, so dependencies on platform headers are removed and the
> driver can compile again with multiplatform support.
>
> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
> ---
> drivers/cpufreq/Kconfig.arm | 6 +++---
> drivers/cpufreq/exynos-cpufreq.c | 2 --
> drivers/cpufreq/exynos-cpufreq.h | 30 ++++++++++++++----------------
> drivers/cpufreq/exynos4210-cpufreq.c | 31 +++++++++++++++++++++++++------
> drivers/cpufreq/exynos4x12-cpufreq.c | 32 ++++++++++++++++++++++++++------
> drivers/cpufreq/exynos5250-cpufreq.c | 35 +++++++++++++++++++++++++++--------
> 6 files changed, 95 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
> index 6a7dd3e..2b7548f 100644
> --- a/drivers/cpufreq/Kconfig.arm
> +++ b/drivers/cpufreq/Kconfig.arm
> @@ -31,7 +31,7 @@ config ARM_EXYNOS_CPUFREQ
>
> config ARM_EXYNOS4210_CPUFREQ
> bool "SAMSUNG EXYNOS4210"
> - depends on CPU_EXYNOS4210 && !ARCH_MULTIPLATFORM
> + depends on CPU_EXYNOS4210
> default y
> select ARM_EXYNOS_CPUFREQ
> help
> @@ -42,7 +42,7 @@ config ARM_EXYNOS4210_CPUFREQ
>
> config ARM_EXYNOS4X12_CPUFREQ
> bool "SAMSUNG EXYNOS4x12"
> - depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412) && !ARCH_MULTIPLATFORM
> + depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412)
> default y
> select ARM_EXYNOS_CPUFREQ
> help
> @@ -53,7 +53,7 @@ config ARM_EXYNOS4X12_CPUFREQ
>
> config ARM_EXYNOS5250_CPUFREQ
> bool "SAMSUNG EXYNOS5250"
> - depends on SOC_EXYNOS5250 && !ARCH_MULTIPLATFORM
> + depends on SOC_EXYNOS5250
> default y
> select ARM_EXYNOS_CPUFREQ
> help
> diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
> index 7c2a096..1e0ec57 100644
> --- a/drivers/cpufreq/exynos-cpufreq.c
> +++ b/drivers/cpufreq/exynos-cpufreq.c
> @@ -19,8 +19,6 @@
> #include <linux/platform_device.h>
> #include <linux/of.h>
>
> -#include <plat/cpu.h>
> -
> #include "exynos-cpufreq.h"
>
> static struct exynos_dvfs_info *exynos_info;
> diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
> index a28ee9d..8dfebac 100644
> --- a/drivers/cpufreq/exynos-cpufreq.h
> +++ b/drivers/cpufreq/exynos-cpufreq.h
> @@ -50,6 +50,7 @@ struct exynos_dvfs_info {
> struct cpufreq_frequency_table *freq_table;
> void (*set_freq)(unsigned int, unsigned int);
> bool (*need_apll_change)(unsigned int, unsigned int);
> + void __iomem *cmu_regs;
> };
>
> #ifdef CONFIG_ARM_EXYNOS4210_CPUFREQ
> @@ -77,24 +78,21 @@ static inline int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
> }
> #endif
>
> -#include <plat/cpu.h>
> -#include <mach/map.h>
> +#define EXYNOS4_CLKSRC_CPU 0x14200
> +#define EXYNOS4_CLKMUX_STATCPU 0x14400
>
> -#define EXYNOS4_CLKSRC_CPU (S5P_VA_CMU + 0x14200)
> -#define EXYNOS4_CLKMUX_STATCPU (S5P_VA_CMU + 0x14400)
> -
> -#define EXYNOS4_CLKDIV_CPU (S5P_VA_CMU + 0x14500)
> -#define EXYNOS4_CLKDIV_CPU1 (S5P_VA_CMU + 0x14504)
> -#define EXYNOS4_CLKDIV_STATCPU (S5P_VA_CMU + 0x14600)
> -#define EXYNOS4_CLKDIV_STATCPU1 (S5P_VA_CMU + 0x14604)
> +#define EXYNOS4_CLKDIV_CPU 0x14500
> +#define EXYNOS4_CLKDIV_CPU1 0x14504
> +#define EXYNOS4_CLKDIV_STATCPU 0x14600
> +#define EXYNOS4_CLKDIV_STATCPU1 0x14604
>
> #define EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT (16)
> #define EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK (0x7 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT)
>
> -#define EXYNOS5_APLL_LOCK (S5P_VA_CMU + 0x00000)
> -#define EXYNOS5_APLL_CON0 (S5P_VA_CMU + 0x00100)
> -#define EXYNOS5_CLKMUX_STATCPU (S5P_VA_CMU + 0x00400)
> -#define EXYNOS5_CLKDIV_CPU0 (S5P_VA_CMU + 0x00500)
> -#define EXYNOS5_CLKDIV_CPU1 (S5P_VA_CMU + 0x00504)
> -#define EXYNOS5_CLKDIV_STATCPU0 (S5P_VA_CMU + 0x00600)
> -#define EXYNOS5_CLKDIV_STATCPU1 (S5P_VA_CMU + 0x00604)
> +#define EXYNOS5_APLL_LOCK 0x00000
> +#define EXYNOS5_APLL_CON0 0x00100
> +#define EXYNOS5_CLKMUX_STATCPU 0x00400
> +#define EXYNOS5_CLKDIV_CPU0 0x00500
> +#define EXYNOS5_CLKDIV_CPU1 0x00504
> +#define EXYNOS5_CLKDIV_STATCPU0 0x00600
> +#define EXYNOS5_CLKDIV_STATCPU1 0x00604
> diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c
> index 6384e5b..a412146 100644
> --- a/drivers/cpufreq/exynos4210-cpufreq.c
> +++ b/drivers/cpufreq/exynos4210-cpufreq.c
> @@ -16,6 +16,8 @@
> #include <linux/io.h>
> #include <linux/slab.h>
> #include <linux/cpufreq.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
>
> #include "exynos-cpufreq.h"
>
> @@ -23,6 +25,7 @@ static struct clk *cpu_clk;
> static struct clk *moutcore;
> static struct clk *mout_mpll;
> static struct clk *mout_apll;
> +static struct exynos_dvfs_info *cpufreq;
>
> static unsigned int exynos4210_volt_table[] = {
> 1250000, 1150000, 1050000, 975000, 950000,
> @@ -60,20 +63,20 @@ static void exynos4210_set_clkdiv(unsigned int div_index)
>
> tmp = apll_freq_4210[div_index].clk_div_cpu0;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
>
> do {
> - tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU);
> } while (tmp & 0x1111111);
>
> /* Change Divider - CPU1 */
>
> tmp = apll_freq_4210[div_index].clk_div_cpu1;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
>
> do {
> - tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
> } while (tmp & 0x11);
> }
>
> @@ -85,7 +88,7 @@ static void exynos4210_set_apll(unsigned int index)
> clk_set_parent(moutcore, mout_mpll);
>
> do {
> - tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU)
> + tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
> >> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
> tmp &= 0x7;
> } while (tmp != 0x2);
> @@ -96,7 +99,7 @@ static void exynos4210_set_apll(unsigned int index)
> clk_set_parent(moutcore, mout_apll);
>
> do {
> - tmp = __raw_readl(EXYNOS4_CLKMUX_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
> tmp &= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
> } while (tmp != (0x1 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
> }
> @@ -115,8 +118,22 @@ static void exynos4210_set_frequency(unsigned int old_index,
>
> int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
> {
> + struct device_node *np;
> unsigned long rate;
>
> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos4210-clock");
> + if (!np) {
> + pr_err("%s: failed to find clock controller DT node\n",
> + __func__);
> + return -ENODEV;
> + }
> +
> + info->cmu_regs = of_iomap(np, 0);
> + if (!info->cmu_regs) {
> + pr_err("%s: failed to map CMU registers\n", __func__);
> + return -EFAULT;
> + }
> +
> cpu_clk = clk_get(NULL, "armclk");
> if (IS_ERR(cpu_clk))
> return PTR_ERR(cpu_clk);
> @@ -143,6 +160,8 @@ int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
> info->freq_table = exynos4210_freq_table;
> info->set_freq = exynos4210_set_frequency;
>
> + cpufreq = info;
> +
> return 0;
>
> err_mout_apll:
> diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
> index 63a3907..aaeceb6 100644
> --- a/drivers/cpufreq/exynos4x12-cpufreq.c
> +++ b/drivers/cpufreq/exynos4x12-cpufreq.c
> @@ -16,6 +16,8 @@
> #include <linux/io.h>
> #include <linux/slab.h>
> #include <linux/cpufreq.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
>
> #include "exynos-cpufreq.h"
>
> @@ -23,6 +25,7 @@ static struct clk *cpu_clk;
> static struct clk *moutcore;
> static struct clk *mout_mpll;
> static struct clk *mout_apll;
> +static struct exynos_dvfs_info *cpufreq;
>
> static unsigned int exynos4x12_volt_table[] = {
> 1350000, 1287500, 1250000, 1187500, 1137500, 1087500, 1037500,
> @@ -105,19 +108,20 @@ static void exynos4x12_set_clkdiv(unsigned int div_index)
>
> tmp = apll_freq_4x12[div_index].clk_div_cpu0;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
>
> - while (__raw_readl(EXYNOS4_CLKDIV_STATCPU) & 0x11111111)
> + while (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU)
> + & 0x11111111)
> cpu_relax();
>
> /* Change Divider - CPU1 */
> tmp = apll_freq_4x12[div_index].clk_div_cpu1;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
>
> do {
> cpu_relax();
> - tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
> } while (tmp != 0x0);
> }
>
> @@ -130,7 +134,7 @@ static void exynos4x12_set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU)
> + tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
> >> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
> tmp &= 0x7;
> } while (tmp != 0x2);
> @@ -142,7 +146,7 @@ static void exynos4x12_set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = __raw_readl(EXYNOS4_CLKMUX_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
> tmp &= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
> } while (tmp != (0x1 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
> }
> @@ -161,8 +165,22 @@ static void exynos4x12_set_frequency(unsigned int old_index,
>
> int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
> {
> + struct device_node *np;
> unsigned long rate;
>
> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos4412-clock");
> + if (!np) {
> + pr_err("%s: failed to find clock controller DT node\n",
> + __func__);
> + return -ENODEV;
> + }
> +
> + info->cmu_regs = of_iomap(np, 0);
> + if (!info->cmu_regs) {
> + pr_err("%s: failed to map CMU registers\n", __func__);
> + return -EFAULT;
> + }
> +
> cpu_clk = clk_get(NULL, "armclk");
> if (IS_ERR(cpu_clk))
> return PTR_ERR(cpu_clk);
> @@ -194,6 +212,8 @@ int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
> info->freq_table = exynos4x12_freq_table;
> info->set_freq = exynos4x12_set_frequency;
>
> + cpufreq = info;
> +
> return 0;
>
> err_mout_apll:
> diff --git a/drivers/cpufreq/exynos5250-cpufreq.c b/drivers/cpufreq/exynos5250-cpufreq.c
> index 363a0b3..cbfbe30 100644
> --- a/drivers/cpufreq/exynos5250-cpufreq.c
> +++ b/drivers/cpufreq/exynos5250-cpufreq.c
> @@ -16,8 +16,8 @@
> #include <linux/io.h>
> #include <linux/slab.h>
> #include <linux/cpufreq.h>
> -
> -#include <mach/map.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
>
> #include "exynos-cpufreq.h"
>
> @@ -25,6 +25,7 @@ static struct clk *cpu_clk;
> static struct clk *moutcore;
> static struct clk *mout_mpll;
> static struct clk *mout_apll;
> +static struct exynos_dvfs_info *cpufreq;
>
> static unsigned int exynos5250_volt_table[] = {
> 1300000, 1250000, 1225000, 1200000, 1150000,
> @@ -87,17 +88,18 @@ static void set_clkdiv(unsigned int div_index)
>
> tmp = apll_freq_5250[div_index].clk_div_cpu0;
>
> - __raw_writel(tmp, EXYNOS5_CLKDIV_CPU0);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU0);
>
> - while (__raw_readl(EXYNOS5_CLKDIV_STATCPU0) & 0x11111111)
> + while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU0)
> + & 0x11111111)
> cpu_relax();
>
> /* Change Divider - CPU1 */
> tmp = apll_freq_5250[div_index].clk_div_cpu1;
>
> - __raw_writel(tmp, EXYNOS5_CLKDIV_CPU1);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU1);
>
> - while (__raw_readl(EXYNOS5_CLKDIV_STATCPU1) & 0x11)
> + while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU1) & 0x11)
> cpu_relax();
> }
>
> @@ -111,7 +113,8 @@ static void set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = (__raw_readl(EXYNOS5_CLKMUX_STATCPU) >> 16);
> + tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU)
> + >> 16);
> tmp &= 0x7;
> } while (tmp != 0x2);
>
> @@ -122,7 +125,7 @@ static void set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = __raw_readl(EXYNOS5_CLKMUX_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU);
> tmp &= (0x7 << 16);
> } while (tmp != (0x1 << 16));
> }
> @@ -141,8 +144,22 @@ static void exynos5250_set_frequency(unsigned int old_index,
>
> int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
> {
> + struct device_node *np;
> unsigned long rate;
>
> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos5250-clock");
> + if (!np) {
> + pr_err("%s: failed to find clock controller DT node\n",
> + __func__);
> + return -ENODEV;
> + }
> +
> + info->cmu_regs = of_iomap(np, 0);
> + if (!info->cmu_regs) {
> + pr_err("%s: failed to map CMU registers\n", __func__);
> + return -EFAULT;
> + }
> +
> cpu_clk = clk_get(NULL, "armclk");
> if (IS_ERR(cpu_clk))
> return PTR_ERR(cpu_clk);
> @@ -169,6 +186,8 @@ int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
> info->freq_table = exynos5250_freq_table;
> info->set_freq = exynos5250_set_frequency;
>
> + cpufreq = info;
> +
> return 0;
>
> err_mout_apll:
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
@ 2014-05-21 11:17 ` Tomasz Figa
0 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2014-05-21 11:17 UTC (permalink / raw)
To: linux-arm-kernel
Forwarding to linux-samsung-soc ML, which was omitted by mistake. Sorry,
for the noise.
Best regards,
Tomasz
On 21.05.2014 13:12, Tomasz Figa wrote:
> Currently Exynos cpufreq drivers rely on globally mapped clock
> controller registers to configure frequency of CPU cores. This is
> obviously wrong and will be removed in near future, but to enable
> support for multi-platform builds without introducing a regression it
> needs to be worked around.
>
> This patch hacks the code to look for clock controller node in device
> tree and map its registers using of_iomap(), instead of relying on
> global mapping, so dependencies on platform headers are removed and the
> driver can compile again with multiplatform support.
>
> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
> ---
> drivers/cpufreq/Kconfig.arm | 6 +++---
> drivers/cpufreq/exynos-cpufreq.c | 2 --
> drivers/cpufreq/exynos-cpufreq.h | 30 ++++++++++++++----------------
> drivers/cpufreq/exynos4210-cpufreq.c | 31 +++++++++++++++++++++++++------
> drivers/cpufreq/exynos4x12-cpufreq.c | 32 ++++++++++++++++++++++++++------
> drivers/cpufreq/exynos5250-cpufreq.c | 35 +++++++++++++++++++++++++++--------
> 6 files changed, 95 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
> index 6a7dd3e..2b7548f 100644
> --- a/drivers/cpufreq/Kconfig.arm
> +++ b/drivers/cpufreq/Kconfig.arm
> @@ -31,7 +31,7 @@ config ARM_EXYNOS_CPUFREQ
>
> config ARM_EXYNOS4210_CPUFREQ
> bool "SAMSUNG EXYNOS4210"
> - depends on CPU_EXYNOS4210 && !ARCH_MULTIPLATFORM
> + depends on CPU_EXYNOS4210
> default y
> select ARM_EXYNOS_CPUFREQ
> help
> @@ -42,7 +42,7 @@ config ARM_EXYNOS4210_CPUFREQ
>
> config ARM_EXYNOS4X12_CPUFREQ
> bool "SAMSUNG EXYNOS4x12"
> - depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412) && !ARCH_MULTIPLATFORM
> + depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412)
> default y
> select ARM_EXYNOS_CPUFREQ
> help
> @@ -53,7 +53,7 @@ config ARM_EXYNOS4X12_CPUFREQ
>
> config ARM_EXYNOS5250_CPUFREQ
> bool "SAMSUNG EXYNOS5250"
> - depends on SOC_EXYNOS5250 && !ARCH_MULTIPLATFORM
> + depends on SOC_EXYNOS5250
> default y
> select ARM_EXYNOS_CPUFREQ
> help
> diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
> index 7c2a096..1e0ec57 100644
> --- a/drivers/cpufreq/exynos-cpufreq.c
> +++ b/drivers/cpufreq/exynos-cpufreq.c
> @@ -19,8 +19,6 @@
> #include <linux/platform_device.h>
> #include <linux/of.h>
>
> -#include <plat/cpu.h>
> -
> #include "exynos-cpufreq.h"
>
> static struct exynos_dvfs_info *exynos_info;
> diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
> index a28ee9d..8dfebac 100644
> --- a/drivers/cpufreq/exynos-cpufreq.h
> +++ b/drivers/cpufreq/exynos-cpufreq.h
> @@ -50,6 +50,7 @@ struct exynos_dvfs_info {
> struct cpufreq_frequency_table *freq_table;
> void (*set_freq)(unsigned int, unsigned int);
> bool (*need_apll_change)(unsigned int, unsigned int);
> + void __iomem *cmu_regs;
> };
>
> #ifdef CONFIG_ARM_EXYNOS4210_CPUFREQ
> @@ -77,24 +78,21 @@ static inline int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
> }
> #endif
>
> -#include <plat/cpu.h>
> -#include <mach/map.h>
> +#define EXYNOS4_CLKSRC_CPU 0x14200
> +#define EXYNOS4_CLKMUX_STATCPU 0x14400
>
> -#define EXYNOS4_CLKSRC_CPU (S5P_VA_CMU + 0x14200)
> -#define EXYNOS4_CLKMUX_STATCPU (S5P_VA_CMU + 0x14400)
> -
> -#define EXYNOS4_CLKDIV_CPU (S5P_VA_CMU + 0x14500)
> -#define EXYNOS4_CLKDIV_CPU1 (S5P_VA_CMU + 0x14504)
> -#define EXYNOS4_CLKDIV_STATCPU (S5P_VA_CMU + 0x14600)
> -#define EXYNOS4_CLKDIV_STATCPU1 (S5P_VA_CMU + 0x14604)
> +#define EXYNOS4_CLKDIV_CPU 0x14500
> +#define EXYNOS4_CLKDIV_CPU1 0x14504
> +#define EXYNOS4_CLKDIV_STATCPU 0x14600
> +#define EXYNOS4_CLKDIV_STATCPU1 0x14604
>
> #define EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT (16)
> #define EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK (0x7 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT)
>
> -#define EXYNOS5_APLL_LOCK (S5P_VA_CMU + 0x00000)
> -#define EXYNOS5_APLL_CON0 (S5P_VA_CMU + 0x00100)
> -#define EXYNOS5_CLKMUX_STATCPU (S5P_VA_CMU + 0x00400)
> -#define EXYNOS5_CLKDIV_CPU0 (S5P_VA_CMU + 0x00500)
> -#define EXYNOS5_CLKDIV_CPU1 (S5P_VA_CMU + 0x00504)
> -#define EXYNOS5_CLKDIV_STATCPU0 (S5P_VA_CMU + 0x00600)
> -#define EXYNOS5_CLKDIV_STATCPU1 (S5P_VA_CMU + 0x00604)
> +#define EXYNOS5_APLL_LOCK 0x00000
> +#define EXYNOS5_APLL_CON0 0x00100
> +#define EXYNOS5_CLKMUX_STATCPU 0x00400
> +#define EXYNOS5_CLKDIV_CPU0 0x00500
> +#define EXYNOS5_CLKDIV_CPU1 0x00504
> +#define EXYNOS5_CLKDIV_STATCPU0 0x00600
> +#define EXYNOS5_CLKDIV_STATCPU1 0x00604
> diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c
> index 6384e5b..a412146 100644
> --- a/drivers/cpufreq/exynos4210-cpufreq.c
> +++ b/drivers/cpufreq/exynos4210-cpufreq.c
> @@ -16,6 +16,8 @@
> #include <linux/io.h>
> #include <linux/slab.h>
> #include <linux/cpufreq.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
>
> #include "exynos-cpufreq.h"
>
> @@ -23,6 +25,7 @@ static struct clk *cpu_clk;
> static struct clk *moutcore;
> static struct clk *mout_mpll;
> static struct clk *mout_apll;
> +static struct exynos_dvfs_info *cpufreq;
>
> static unsigned int exynos4210_volt_table[] = {
> 1250000, 1150000, 1050000, 975000, 950000,
> @@ -60,20 +63,20 @@ static void exynos4210_set_clkdiv(unsigned int div_index)
>
> tmp = apll_freq_4210[div_index].clk_div_cpu0;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
>
> do {
> - tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU);
> } while (tmp & 0x1111111);
>
> /* Change Divider - CPU1 */
>
> tmp = apll_freq_4210[div_index].clk_div_cpu1;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
>
> do {
> - tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
> } while (tmp & 0x11);
> }
>
> @@ -85,7 +88,7 @@ static void exynos4210_set_apll(unsigned int index)
> clk_set_parent(moutcore, mout_mpll);
>
> do {
> - tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU)
> + tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
> >> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
> tmp &= 0x7;
> } while (tmp != 0x2);
> @@ -96,7 +99,7 @@ static void exynos4210_set_apll(unsigned int index)
> clk_set_parent(moutcore, mout_apll);
>
> do {
> - tmp = __raw_readl(EXYNOS4_CLKMUX_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
> tmp &= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
> } while (tmp != (0x1 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
> }
> @@ -115,8 +118,22 @@ static void exynos4210_set_frequency(unsigned int old_index,
>
> int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
> {
> + struct device_node *np;
> unsigned long rate;
>
> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos4210-clock");
> + if (!np) {
> + pr_err("%s: failed to find clock controller DT node\n",
> + __func__);
> + return -ENODEV;
> + }
> +
> + info->cmu_regs = of_iomap(np, 0);
> + if (!info->cmu_regs) {
> + pr_err("%s: failed to map CMU registers\n", __func__);
> + return -EFAULT;
> + }
> +
> cpu_clk = clk_get(NULL, "armclk");
> if (IS_ERR(cpu_clk))
> return PTR_ERR(cpu_clk);
> @@ -143,6 +160,8 @@ int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
> info->freq_table = exynos4210_freq_table;
> info->set_freq = exynos4210_set_frequency;
>
> + cpufreq = info;
> +
> return 0;
>
> err_mout_apll:
> diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
> index 63a3907..aaeceb6 100644
> --- a/drivers/cpufreq/exynos4x12-cpufreq.c
> +++ b/drivers/cpufreq/exynos4x12-cpufreq.c
> @@ -16,6 +16,8 @@
> #include <linux/io.h>
> #include <linux/slab.h>
> #include <linux/cpufreq.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
>
> #include "exynos-cpufreq.h"
>
> @@ -23,6 +25,7 @@ static struct clk *cpu_clk;
> static struct clk *moutcore;
> static struct clk *mout_mpll;
> static struct clk *mout_apll;
> +static struct exynos_dvfs_info *cpufreq;
>
> static unsigned int exynos4x12_volt_table[] = {
> 1350000, 1287500, 1250000, 1187500, 1137500, 1087500, 1037500,
> @@ -105,19 +108,20 @@ static void exynos4x12_set_clkdiv(unsigned int div_index)
>
> tmp = apll_freq_4x12[div_index].clk_div_cpu0;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
>
> - while (__raw_readl(EXYNOS4_CLKDIV_STATCPU) & 0x11111111)
> + while (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU)
> + & 0x11111111)
> cpu_relax();
>
> /* Change Divider - CPU1 */
> tmp = apll_freq_4x12[div_index].clk_div_cpu1;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
>
> do {
> cpu_relax();
> - tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
> } while (tmp != 0x0);
> }
>
> @@ -130,7 +134,7 @@ static void exynos4x12_set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU)
> + tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
> >> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
> tmp &= 0x7;
> } while (tmp != 0x2);
> @@ -142,7 +146,7 @@ static void exynos4x12_set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = __raw_readl(EXYNOS4_CLKMUX_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
> tmp &= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
> } while (tmp != (0x1 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
> }
> @@ -161,8 +165,22 @@ static void exynos4x12_set_frequency(unsigned int old_index,
>
> int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
> {
> + struct device_node *np;
> unsigned long rate;
>
> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos4412-clock");
> + if (!np) {
> + pr_err("%s: failed to find clock controller DT node\n",
> + __func__);
> + return -ENODEV;
> + }
> +
> + info->cmu_regs = of_iomap(np, 0);
> + if (!info->cmu_regs) {
> + pr_err("%s: failed to map CMU registers\n", __func__);
> + return -EFAULT;
> + }
> +
> cpu_clk = clk_get(NULL, "armclk");
> if (IS_ERR(cpu_clk))
> return PTR_ERR(cpu_clk);
> @@ -194,6 +212,8 @@ int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
> info->freq_table = exynos4x12_freq_table;
> info->set_freq = exynos4x12_set_frequency;
>
> + cpufreq = info;
> +
> return 0;
>
> err_mout_apll:
> diff --git a/drivers/cpufreq/exynos5250-cpufreq.c b/drivers/cpufreq/exynos5250-cpufreq.c
> index 363a0b3..cbfbe30 100644
> --- a/drivers/cpufreq/exynos5250-cpufreq.c
> +++ b/drivers/cpufreq/exynos5250-cpufreq.c
> @@ -16,8 +16,8 @@
> #include <linux/io.h>
> #include <linux/slab.h>
> #include <linux/cpufreq.h>
> -
> -#include <mach/map.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
>
> #include "exynos-cpufreq.h"
>
> @@ -25,6 +25,7 @@ static struct clk *cpu_clk;
> static struct clk *moutcore;
> static struct clk *mout_mpll;
> static struct clk *mout_apll;
> +static struct exynos_dvfs_info *cpufreq;
>
> static unsigned int exynos5250_volt_table[] = {
> 1300000, 1250000, 1225000, 1200000, 1150000,
> @@ -87,17 +88,18 @@ static void set_clkdiv(unsigned int div_index)
>
> tmp = apll_freq_5250[div_index].clk_div_cpu0;
>
> - __raw_writel(tmp, EXYNOS5_CLKDIV_CPU0);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU0);
>
> - while (__raw_readl(EXYNOS5_CLKDIV_STATCPU0) & 0x11111111)
> + while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU0)
> + & 0x11111111)
> cpu_relax();
>
> /* Change Divider - CPU1 */
> tmp = apll_freq_5250[div_index].clk_div_cpu1;
>
> - __raw_writel(tmp, EXYNOS5_CLKDIV_CPU1);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU1);
>
> - while (__raw_readl(EXYNOS5_CLKDIV_STATCPU1) & 0x11)
> + while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU1) & 0x11)
> cpu_relax();
> }
>
> @@ -111,7 +113,8 @@ static void set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = (__raw_readl(EXYNOS5_CLKMUX_STATCPU) >> 16);
> + tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU)
> + >> 16);
> tmp &= 0x7;
> } while (tmp != 0x2);
>
> @@ -122,7 +125,7 @@ static void set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = __raw_readl(EXYNOS5_CLKMUX_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU);
> tmp &= (0x7 << 16);
> } while (tmp != (0x1 << 16));
> }
> @@ -141,8 +144,22 @@ static void exynos5250_set_frequency(unsigned int old_index,
>
> int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
> {
> + struct device_node *np;
> unsigned long rate;
>
> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos5250-clock");
> + if (!np) {
> + pr_err("%s: failed to find clock controller DT node\n",
> + __func__);
> + return -ENODEV;
> + }
> +
> + info->cmu_regs = of_iomap(np, 0);
> + if (!info->cmu_regs) {
> + pr_err("%s: failed to map CMU registers\n", __func__);
> + return -EFAULT;
> + }
> +
> cpu_clk = clk_get(NULL, "armclk");
> if (IS_ERR(cpu_clk))
> return PTR_ERR(cpu_clk);
> @@ -169,6 +186,8 @@ int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
> info->freq_table = exynos5250_freq_table;
> info->set_freq = exynos5250_set_frequency;
>
> + cpufreq = info;
> +
> return 0;
>
> err_mout_apll:
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-21 11:17 ` Tomasz Figa
@ 2014-05-21 11:22 ` Viresh Kumar
-1 siblings, 0 replies; 45+ messages in thread
From: Viresh Kumar @ 2014-05-21 11:22 UTC (permalink / raw)
To: Tomasz Figa
Cc: linux-arm-kernel, Sachin Kamat, Kukjin Kim, Arnd Bergmann,
Rafael J. Wysocki, Bartlomiej Zolnierkiewicz, linux-samsung-soc
On 21 May 2014 16:47, Tomasz Figa <t.figa@samsung.com> wrote:
Mostly nitpicks ..
>> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
>> config ARM_EXYNOS4X12_CPUFREQ
>> bool "SAMSUNG EXYNOS4x12"
>> - depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412) && !ARCH_MULTIPLATFORM
>> + depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412)
Get rid of () as well..
>> diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
>> index a28ee9d..8dfebac 100644
>> --- a/drivers/cpufreq/exynos-cpufreq.h
>> +++ b/drivers/cpufreq/exynos-cpufreq.h
>> @@ -50,6 +50,7 @@ struct exynos_dvfs_info {
>> struct cpufreq_frequency_table *freq_table;
>> void (*set_freq)(unsigned int, unsigned int);
>> bool (*need_apll_change)(unsigned int, unsigned int);
>> + void __iomem *cmu_regs;
s/tab/space ? before *cmu_regs ..
>> diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c
>> @@ -143,6 +160,8 @@ int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
>> info->freq_table = exynos4210_freq_table;
>> info->set_freq = exynos4210_set_frequency;
>>
>> + cpufreq = info;
I couldn't find this variable .. i.e. 'cpufreq'
>> +
>> return 0;
>>
>> err_mout_apll:
>> diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
>> int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
>> {
>> + struct device_node *np;
>> unsigned long rate;
>>
>> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos4412-clock");
>> + if (!np) {
>> + pr_err("%s: failed to find clock controller DT node\n",
>> + __func__);
>> + return -ENODEV;
>> + }
>> +
>> + info->cmu_regs = of_iomap(np, 0);
>> + if (!info->cmu_regs) {
>> + pr_err("%s: failed to map CMU registers\n", __func__);
>> + return -EFAULT;
>> + }
>> +
Don't replicate. Create a routine for all this..
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
@ 2014-05-21 11:22 ` Viresh Kumar
0 siblings, 0 replies; 45+ messages in thread
From: Viresh Kumar @ 2014-05-21 11:22 UTC (permalink / raw)
To: linux-arm-kernel
On 21 May 2014 16:47, Tomasz Figa <t.figa@samsung.com> wrote:
Mostly nitpicks ..
>> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
>> config ARM_EXYNOS4X12_CPUFREQ
>> bool "SAMSUNG EXYNOS4x12"
>> - depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412) && !ARCH_MULTIPLATFORM
>> + depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412)
Get rid of () as well..
>> diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
>> index a28ee9d..8dfebac 100644
>> --- a/drivers/cpufreq/exynos-cpufreq.h
>> +++ b/drivers/cpufreq/exynos-cpufreq.h
>> @@ -50,6 +50,7 @@ struct exynos_dvfs_info {
>> struct cpufreq_frequency_table *freq_table;
>> void (*set_freq)(unsigned int, unsigned int);
>> bool (*need_apll_change)(unsigned int, unsigned int);
>> + void __iomem *cmu_regs;
s/tab/space ? before *cmu_regs ..
>> diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c
>> @@ -143,6 +160,8 @@ int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
>> info->freq_table = exynos4210_freq_table;
>> info->set_freq = exynos4210_set_frequency;
>>
>> + cpufreq = info;
I couldn't find this variable .. i.e. 'cpufreq'
>> +
>> return 0;
>>
>> err_mout_apll:
>> diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
>> int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
>> {
>> + struct device_node *np;
>> unsigned long rate;
>>
>> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos4412-clock");
>> + if (!np) {
>> + pr_err("%s: failed to find clock controller DT node\n",
>> + __func__);
>> + return -ENODEV;
>> + }
>> +
>> + info->cmu_regs = of_iomap(np, 0);
>> + if (!info->cmu_regs) {
>> + pr_err("%s: failed to map CMU registers\n", __func__);
>> + return -EFAULT;
>> + }
>> +
Don't replicate. Create a routine for all this..
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-21 11:22 ` Viresh Kumar
@ 2014-05-21 12:11 ` Tomasz Figa
-1 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2014-05-21 12:11 UTC (permalink / raw)
To: Viresh Kumar
Cc: linux-arm-kernel, Sachin Kamat, Kukjin Kim, Arnd Bergmann,
Rafael J. Wysocki, Bartlomiej Zolnierkiewicz, linux-samsung-soc
Hi Viresh,
Thanks for the review.
On 21.05.2014 13:22, Viresh Kumar wrote:
> On 21 May 2014 16:47, Tomasz Figa <t.figa@samsung.com> wrote:
>
> Mostly nitpicks ..
>
>>> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
>>> config ARM_EXYNOS4X12_CPUFREQ
>>> bool "SAMSUNG EXYNOS4x12"
>>> - depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412) && !ARCH_MULTIPLATFORM
>>> + depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412)
>
> Get rid of () as well..
Right.
>
>>> diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
>>> index a28ee9d..8dfebac 100644
>>> --- a/drivers/cpufreq/exynos-cpufreq.h
>>> +++ b/drivers/cpufreq/exynos-cpufreq.h
>>> @@ -50,6 +50,7 @@ struct exynos_dvfs_info {
>>> struct cpufreq_frequency_table *freq_table;
>>> void (*set_freq)(unsigned int, unsigned int);
>>> bool (*need_apll_change)(unsigned int, unsigned int);
>>> + void __iomem *cmu_regs;
>
> s/tab/space ? before *cmu_regs ..
Other fields in this struct have their names aligned with a tab as well.
>
>>> diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c
>>> @@ -143,6 +160,8 @@ int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
>>> info->freq_table = exynos4210_freq_table;
>>> info->set_freq = exynos4210_set_frequency;
>>>
>>> + cpufreq = info;
>
> I couldn't find this variable .. i.e. 'cpufreq'
It is a static global variable that is being added at the top of the file.
>
>>> +
>>> return 0;
>>>
>>> err_mout_apll:
>>> diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
>
>>> int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
>>> {
>>> + struct device_node *np;
>>> unsigned long rate;
>>>
>>> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos4412-clock");
>>> + if (!np) {
>>> + pr_err("%s: failed to find clock controller DT node\n",
>>> + __func__);
>>> + return -ENODEV;
>>> + }
>>> +
>>> + info->cmu_regs = of_iomap(np, 0);
>>> + if (!info->cmu_regs) {
>>> + pr_err("%s: failed to map CMU registers\n", __func__);
>>> + return -EFAULT;
>>> + }
>>> +
>
> Don't replicate. Create a routine for all this..
>
While I agree that all three drivers basically use the same look-up and
mapping code replicated, this patch is a temporary hack, until all those
three drivers are completely removed, most likely in 3.17, so I would
prefer doing this in the most ugly way, so that people don't follow this.
Still, I think a comment added before of_find_compatible_node() in each
driver saying that this is a hack and why it is there would be nice, though.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
@ 2014-05-21 12:11 ` Tomasz Figa
0 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2014-05-21 12:11 UTC (permalink / raw)
To: linux-arm-kernel
Hi Viresh,
Thanks for the review.
On 21.05.2014 13:22, Viresh Kumar wrote:
> On 21 May 2014 16:47, Tomasz Figa <t.figa@samsung.com> wrote:
>
> Mostly nitpicks ..
>
>>> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
>>> config ARM_EXYNOS4X12_CPUFREQ
>>> bool "SAMSUNG EXYNOS4x12"
>>> - depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412) && !ARCH_MULTIPLATFORM
>>> + depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412)
>
> Get rid of () as well..
Right.
>
>>> diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
>>> index a28ee9d..8dfebac 100644
>>> --- a/drivers/cpufreq/exynos-cpufreq.h
>>> +++ b/drivers/cpufreq/exynos-cpufreq.h
>>> @@ -50,6 +50,7 @@ struct exynos_dvfs_info {
>>> struct cpufreq_frequency_table *freq_table;
>>> void (*set_freq)(unsigned int, unsigned int);
>>> bool (*need_apll_change)(unsigned int, unsigned int);
>>> + void __iomem *cmu_regs;
>
> s/tab/space ? before *cmu_regs ..
Other fields in this struct have their names aligned with a tab as well.
>
>>> diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c
>>> @@ -143,6 +160,8 @@ int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
>>> info->freq_table = exynos4210_freq_table;
>>> info->set_freq = exynos4210_set_frequency;
>>>
>>> + cpufreq = info;
>
> I couldn't find this variable .. i.e. 'cpufreq'
It is a static global variable that is being added at the top of the file.
>
>>> +
>>> return 0;
>>>
>>> err_mout_apll:
>>> diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
>
>>> int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
>>> {
>>> + struct device_node *np;
>>> unsigned long rate;
>>>
>>> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos4412-clock");
>>> + if (!np) {
>>> + pr_err("%s: failed to find clock controller DT node\n",
>>> + __func__);
>>> + return -ENODEV;
>>> + }
>>> +
>>> + info->cmu_regs = of_iomap(np, 0);
>>> + if (!info->cmu_regs) {
>>> + pr_err("%s: failed to map CMU registers\n", __func__);
>>> + return -EFAULT;
>>> + }
>>> +
>
> Don't replicate. Create a routine for all this..
>
While I agree that all three drivers basically use the same look-up and
mapping code replicated, this patch is a temporary hack, until all those
three drivers are completely removed, most likely in 3.17, so I would
prefer doing this in the most ugly way, so that people don't follow this.
Still, I think a comment added before of_find_compatible_node() in each
driver saying that this is a hack and why it is there would be nice, though.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-21 11:12 ` [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM Tomasz Figa
2014-05-21 11:17 ` Tomasz Figa
@ 2014-05-21 12:21 ` Arnd Bergmann
2014-05-21 12:26 ` Tomasz Figa
2014-05-23 15:22 ` Tomasz Figa
2 siblings, 1 reply; 45+ messages in thread
From: Arnd Bergmann @ 2014-05-21 12:21 UTC (permalink / raw)
To: linux-arm-kernel
On Wednesday 21 May 2014 13:12:32 Tomasz Figa wrote:
> Currently Exynos cpufreq drivers rely on globally mapped clock
> controller registers to configure frequency of CPU cores. This is
> obviously wrong and will be removed in near future, but to enable
> support for multi-platform builds without introducing a regression it
> needs to be worked around.
>
> This patch hacks the code to look for clock controller node in device
> tree and map its registers using of_iomap(), instead of relying on
> global mapping, so dependencies on platform headers are removed and the
> driver can compile again with multiplatform support.
>
> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
> ---
> drivers/cpufreq/Kconfig.arm | 6 +++---
> drivers/cpufreq/exynos-cpufreq.c | 2 --
> drivers/cpufreq/exynos-cpufreq.h | 30 ++++++++++++++----------------
> drivers/cpufreq/exynos4210-cpufreq.c | 31 +++++++++++++++++++++++++------
> drivers/cpufreq/exynos4x12-cpufreq.c | 32 ++++++++++++++++++++++++++------
> drivers/cpufreq/exynos5250-cpufreq.c | 35 +++++++++++++++++++++++++++--------
> 6 files changed, 95 insertions(+), 41 deletions(-)
Isn't this completely obsoleted by Thomas Abraham's work on cpufreq-cpu0
support in Exynos? I thought that was going to make it for 3.16.
Arnd
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-21 12:21 ` Arnd Bergmann
@ 2014-05-21 12:26 ` Tomasz Figa
2014-05-21 12:32 ` Thomas Abraham
0 siblings, 1 reply; 45+ messages in thread
From: Tomasz Figa @ 2014-05-21 12:26 UTC (permalink / raw)
To: linux-arm-kernel
On 21.05.2014 14:21, Arnd Bergmann wrote:
> On Wednesday 21 May 2014 13:12:32 Tomasz Figa wrote:
>> Currently Exynos cpufreq drivers rely on globally mapped clock
>> controller registers to configure frequency of CPU cores. This is
>> obviously wrong and will be removed in near future, but to enable
>> support for multi-platform builds without introducing a regression it
>> needs to be worked around.
>>
>> This patch hacks the code to look for clock controller node in device
>> tree and map its registers using of_iomap(), instead of relying on
>> global mapping, so dependencies on platform headers are removed and the
>> driver can compile again with multiplatform support.
>>
>> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
>> ---
>> drivers/cpufreq/Kconfig.arm | 6 +++---
>> drivers/cpufreq/exynos-cpufreq.c | 2 --
>> drivers/cpufreq/exynos-cpufreq.h | 30 ++++++++++++++----------------
>> drivers/cpufreq/exynos4210-cpufreq.c | 31 +++++++++++++++++++++++++------
>> drivers/cpufreq/exynos4x12-cpufreq.c | 32 ++++++++++++++++++++++++++------
>> drivers/cpufreq/exynos5250-cpufreq.c | 35 +++++++++++++++++++++++++++--------
>> 6 files changed, 95 insertions(+), 41 deletions(-)
>
> Isn't this completely obsoleted by Thomas Abraham's work on cpufreq-cpu0
> support in Exynos? I thought that was going to make it for 3.16.
That would be the best solution, but we need at least one more version
of that series and I'm not sure if it isn't already too late to merge it
for 3.16.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-21 12:26 ` Tomasz Figa
@ 2014-05-21 12:32 ` Thomas Abraham
2014-05-21 13:31 ` Kukjin Kim
0 siblings, 1 reply; 45+ messages in thread
From: Thomas Abraham @ 2014-05-21 12:32 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, May 21, 2014 at 5:56 PM, Tomasz Figa <t.figa@samsung.com> wrote:
> On 21.05.2014 14:21, Arnd Bergmann wrote:
>> On Wednesday 21 May 2014 13:12:32 Tomasz Figa wrote:
>>> Currently Exynos cpufreq drivers rely on globally mapped clock
>>> controller registers to configure frequency of CPU cores. This is
>>> obviously wrong and will be removed in near future, but to enable
>>> support for multi-platform builds without introducing a regression it
>>> needs to be worked around.
>>>
>>> This patch hacks the code to look for clock controller node in device
>>> tree and map its registers using of_iomap(), instead of relying on
>>> global mapping, so dependencies on platform headers are removed and the
>>> driver can compile again with multiplatform support.
>>>
>>> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
>>> ---
>>> drivers/cpufreq/Kconfig.arm | 6 +++---
>>> drivers/cpufreq/exynos-cpufreq.c | 2 --
>>> drivers/cpufreq/exynos-cpufreq.h | 30 ++++++++++++++----------------
>>> drivers/cpufreq/exynos4210-cpufreq.c | 31 +++++++++++++++++++++++++------
>>> drivers/cpufreq/exynos4x12-cpufreq.c | 32 ++++++++++++++++++++++++++------
>>> drivers/cpufreq/exynos5250-cpufreq.c | 35 +++++++++++++++++++++++++++--------
>>> 6 files changed, 95 insertions(+), 41 deletions(-)
>>
>> Isn't this completely obsoleted by Thomas Abraham's work on cpufreq-cpu0
>> support in Exynos? I thought that was going to make it for 3.16.
>
> That would be the best solution, but we need at least one more version
> of that series and I'm not sure if it isn't already too late to merge it
> for 3.16.
I have addressed most the comments on the v4 patches. I will post v5
of the cpufreq consolidation patches a little later or early tomorrow.
Thanks,
Thomas.
>
> Best regards,
> Tomasz
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-21 12:32 ` Thomas Abraham
@ 2014-05-21 13:31 ` Kukjin Kim
2014-05-21 14:05 ` Viresh Kumar
0 siblings, 1 reply; 45+ messages in thread
From: Kukjin Kim @ 2014-05-21 13:31 UTC (permalink / raw)
To: linux-arm-kernel
Thomas Abraham wrote:
>
> On Wed, May 21, 2014 at 5:56 PM, Tomasz Figa <t.figa@samsung.com> wrote:
> > On 21.05.2014 14:21, Arnd Bergmann wrote:
> >> On Wednesday 21 May 2014 13:12:32 Tomasz Figa wrote:
> >>> Currently Exynos cpufreq drivers rely on globally mapped clock
> >>> controller registers to configure frequency of CPU cores. This is
> >>> obviously wrong and will be removed in near future, but to enable
> >>> support for multi-platform builds without introducing a regression it
> >>> needs to be worked around.
> >>>
> >>> This patch hacks the code to look for clock controller node in device
> >>> tree and map its registers using of_iomap(), instead of relying on
> >>> global mapping, so dependencies on platform headers are removed and the
> >>> driver can compile again with multiplatform support.
> >>>
> >>> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
> >>> ---
> >>> drivers/cpufreq/Kconfig.arm | 6 +++---
> >>> drivers/cpufreq/exynos-cpufreq.c | 2 --
> >>> drivers/cpufreq/exynos-cpufreq.h | 30 ++++++++++++++----------------
> >>> drivers/cpufreq/exynos4210-cpufreq.c | 31 +++++++++++++++++++++++++----
> --
> >>> drivers/cpufreq/exynos4x12-cpufreq.c | 32 ++++++++++++++++++++++++++---
> ---
> >>> drivers/cpufreq/exynos5250-cpufreq.c | 35 +++++++++++++++++++++++++++--
> ------
> >>> 6 files changed, 95 insertions(+), 41 deletions(-)
> >>
> >> Isn't this completely obsoleted by Thomas Abraham's work on cpufreq-cpu0
> >> support in Exynos? I thought that was going to make it for 3.16.
> >
> > That would be the best solution, but we need at least one more version
> > of that series and I'm not sure if it isn't already too late to merge it
> > for 3.16.
>
> I have addressed most the comments on the v4 patches. I will post v5
> of the cpufreq consolidation patches a little later or early tomorrow.
>
+1
If there is no comments more on Thomas P Abraham's series v4 ;-), I will take that series in this time with ack from Viresh.
Rafael already agreed that exynos related cpufreq is handled in samsung tree with Viresh's ack.
Thanks,
Kukjin
^ permalink raw reply [flat|nested] 45+ messages in thread
* RE: [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support
2014-05-21 11:14 ` Sachin Kamat
@ 2014-05-21 13:40 ` Kukjin Kim
-1 siblings, 0 replies; 45+ messages in thread
From: Kukjin Kim @ 2014-05-21 13:40 UTC (permalink / raw)
To: 'Sachin Kamat', 'Bartlomiej Zolnierkiewicz'
Cc: 'linux-arm-kernel', 'linux-samsung-soc',
'Arnd Bergmann'
Sachin Kamat wrote:
>
> Hi Bartlomiej,
>
> On 21 May 2014 16:06, Bartlomiej Zolnierkiewicz
> <b.zolnierkie@samsung.com> wrote:
> >
> > Hi,
> >
> > On Wednesday, May 21, 2014 12:22:48 PM Sachin Kamat wrote:
> >> From: Arnd Bergmann <arnd@arndb.de>
> >>
> >> This makes it possible to enable the exynos platform as part of a
> >> multiplatform kernel, in addition to keeping the single-platform
> >> Exynos support.
> >
> > The patch description is wrong. After this patch single-platform Exynos
> > support is no longer available
>
> Forgot to update the message while rebasing. Thanks for noticing.
>
> > and it adds at least one serious regression
>
> I have mentioned about this in the cover letter.
>
> > (cpufreq) which should be fixed before merging this patch. Moreover it
> > seems that this patch (#2) should be merged with patch #3 to preserve
> > bisectability.
>
> At this point exynos_defconfig works.
>
> >Please also note that exynos_defconfig is no longer useful
> > after these changes and can be be removed.
>
> Yes.
>
Well, I think keeping the exynos_defconfig would be nice like other platform in multiplatforms...and I'm going to enable possible configs in exynos_defconfig for exynso SoCs then it can cover more for exynos...
Thanks,
Kukjin
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support
@ 2014-05-21 13:40 ` Kukjin Kim
0 siblings, 0 replies; 45+ messages in thread
From: Kukjin Kim @ 2014-05-21 13:40 UTC (permalink / raw)
To: linux-arm-kernel
Sachin Kamat wrote:
>
> Hi Bartlomiej,
>
> On 21 May 2014 16:06, Bartlomiej Zolnierkiewicz
> <b.zolnierkie@samsung.com> wrote:
> >
> > Hi,
> >
> > On Wednesday, May 21, 2014 12:22:48 PM Sachin Kamat wrote:
> >> From: Arnd Bergmann <arnd@arndb.de>
> >>
> >> This makes it possible to enable the exynos platform as part of a
> >> multiplatform kernel, in addition to keeping the single-platform
> >> Exynos support.
> >
> > The patch description is wrong. After this patch single-platform Exynos
> > support is no longer available
>
> Forgot to update the message while rebasing. Thanks for noticing.
>
> > and it adds at least one serious regression
>
> I have mentioned about this in the cover letter.
>
> > (cpufreq) which should be fixed before merging this patch. Moreover it
> > seems that this patch (#2) should be merged with patch #3 to preserve
> > bisectability.
>
> At this point exynos_defconfig works.
>
> >Please also note that exynos_defconfig is no longer useful
> > after these changes and can be be removed.
>
> Yes.
>
Well, I think keeping the exynos_defconfig would be nice like other platform in multiplatforms...and I'm going to enable possible configs in exynos_defconfig for exynso SoCs then it can cover more for exynos...
Thanks,
Kukjin
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support
2014-05-21 13:40 ` Kukjin Kim
@ 2014-05-21 14:02 ` Bartlomiej Zolnierkiewicz
-1 siblings, 0 replies; 45+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2014-05-21 14:02 UTC (permalink / raw)
To: Kukjin Kim
Cc: 'Sachin Kamat', 'linux-arm-kernel',
'linux-samsung-soc', 'Arnd Bergmann'
Hi,
On Wednesday, May 21, 2014 10:40:07 PM Kukjin Kim wrote:
> Sachin Kamat wrote:
> >
> > Hi Bartlomiej,
> >
> > On 21 May 2014 16:06, Bartlomiej Zolnierkiewicz
> > <b.zolnierkie@samsung.com> wrote:
> > >
> > > Hi,
> > >
> > > On Wednesday, May 21, 2014 12:22:48 PM Sachin Kamat wrote:
> > >> From: Arnd Bergmann <arnd@arndb.de>
> > >>
> > >> This makes it possible to enable the exynos platform as part of a
> > >> multiplatform kernel, in addition to keeping the single-platform
> > >> Exynos support.
> > >
> > > The patch description is wrong. After this patch single-platform Exynos
> > > support is no longer available
> >
> > Forgot to update the message while rebasing. Thanks for noticing.
> >
> > > and it adds at least one serious regression
> >
> > I have mentioned about this in the cover letter.
> >
> > > (cpufreq) which should be fixed before merging this patch. Moreover it
> > > seems that this patch (#2) should be merged with patch #3 to preserve
> > > bisectability.
> >
> > At this point exynos_defconfig works.
> >
> > >Please also note that exynos_defconfig is no longer useful
> > > after these changes and can be be removed.
> >
> > Yes.
> >
> Well, I think keeping the exynos_defconfig would be nice like other platform in multiplatforms...and I'm going to enable possible configs in exynos_defconfig for exynso SoCs then it can cover more for exynos...
I know that many other platforms still have their own configs [*] but
I would strongly prefer to have a single config supporting Exynos SoCs
(that would be a multiplatform one) to simplify testing and prevent
situations when something works with one config but not the other.
[*] I also hope that they get removed in the longer-term..
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support
@ 2014-05-21 14:02 ` Bartlomiej Zolnierkiewicz
0 siblings, 0 replies; 45+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2014-05-21 14:02 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Wednesday, May 21, 2014 10:40:07 PM Kukjin Kim wrote:
> Sachin Kamat wrote:
> >
> > Hi Bartlomiej,
> >
> > On 21 May 2014 16:06, Bartlomiej Zolnierkiewicz
> > <b.zolnierkie@samsung.com> wrote:
> > >
> > > Hi,
> > >
> > > On Wednesday, May 21, 2014 12:22:48 PM Sachin Kamat wrote:
> > >> From: Arnd Bergmann <arnd@arndb.de>
> > >>
> > >> This makes it possible to enable the exynos platform as part of a
> > >> multiplatform kernel, in addition to keeping the single-platform
> > >> Exynos support.
> > >
> > > The patch description is wrong. After this patch single-platform Exynos
> > > support is no longer available
> >
> > Forgot to update the message while rebasing. Thanks for noticing.
> >
> > > and it adds at least one serious regression
> >
> > I have mentioned about this in the cover letter.
> >
> > > (cpufreq) which should be fixed before merging this patch. Moreover it
> > > seems that this patch (#2) should be merged with patch #3 to preserve
> > > bisectability.
> >
> > At this point exynos_defconfig works.
> >
> > >Please also note that exynos_defconfig is no longer useful
> > > after these changes and can be be removed.
> >
> > Yes.
> >
> Well, I think keeping the exynos_defconfig would be nice like other platform in multiplatforms...and I'm going to enable possible configs in exynos_defconfig for exynso SoCs then it can cover more for exynos...
I know that many other platforms still have their own configs [*] but
I would strongly prefer to have a single config supporting Exynos SoCs
(that would be a multiplatform one) to simplify testing and prevent
situations when something works with one config but not the other.
[*] I also hope that they get removed in the longer-term..
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-21 13:31 ` Kukjin Kim
@ 2014-05-21 14:05 ` Viresh Kumar
2014-05-23 14:52 ` Tomasz Figa
0 siblings, 1 reply; 45+ messages in thread
From: Viresh Kumar @ 2014-05-21 14:05 UTC (permalink / raw)
To: linux-arm-kernel
On 21 May 2014 19:01, Kukjin Kim <kgene.kim@samsung.com> wrote:
> If there is no comments more on Thomas P Abraham's series v4 ;-), I will take that series in this time with ack from Viresh.
@Thomas: Please post V5 quickly, let close it ASAP :)
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-21 14:05 ` Viresh Kumar
@ 2014-05-23 14:52 ` Tomasz Figa
0 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2014-05-23 14:52 UTC (permalink / raw)
To: linux-arm-kernel
On 21.05.2014 16:05, Viresh Kumar wrote:
> On 21 May 2014 19:01, Kukjin Kim <kgene.kim@samsung.com> wrote:
>> If there is no comments more on Thomas P Abraham's series v4 ;-), I will take that series in this time with ack from Viresh.
>
> @Thomas: Please post V5 quickly, let close it ASAP :)
>
Well, as far as I can see, the DT binding is not yet acked by DT
maintainers, so IMHO the best solution for this release would be to
apply my patch to avoid regression. New version with some of Viresh's
comments addressed is on the way.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v2] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-21 11:12 ` [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM Tomasz Figa
@ 2014-05-23 15:22 ` Tomasz Figa
2014-05-21 12:21 ` Arnd Bergmann
2014-05-23 15:22 ` Tomasz Figa
2 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2014-05-23 15:22 UTC (permalink / raw)
To: linux-samsung-soc
Cc: linux-arm-kernel, Sachin Kamat, Kukjin Kim, Arnd Bergmann,
Viresh Kumar, Rafael J. Wysocki, Bartlomiej Zolnierkiewicz,
Tomasz Figa
Currently Exynos cpufreq drivers rely on globally mapped clock
controller registers to configure frequency of CPU cores. This is
obviously wrong and will be removed in near future, but to enable
support for multi-platform builds without introducing a regression it
needs to be worked around.
This patch hacks the code to look for clock controller node in device
tree and map its registers using of_iomap(), instead of relying on
global mapping, so dependencies on platform headers are removed and the
driver can compile again with multiplatform support.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
---
drivers/cpufreq/Kconfig.arm | 6 ++---
drivers/cpufreq/exynos-cpufreq.c | 2 --
drivers/cpufreq/exynos-cpufreq.h | 30 ++++++++++++-------------
drivers/cpufreq/exynos4210-cpufreq.c | 39 +++++++++++++++++++++++++++-----
drivers/cpufreq/exynos4x12-cpufreq.c | 40 ++++++++++++++++++++++++++++-----
drivers/cpufreq/exynos5250-cpufreq.c | 43 +++++++++++++++++++++++++++++-------
6 files changed, 119 insertions(+), 41 deletions(-)
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 6a7dd3e..36d20d0 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -31,7 +31,7 @@ config ARM_EXYNOS_CPUFREQ
config ARM_EXYNOS4210_CPUFREQ
bool "SAMSUNG EXYNOS4210"
- depends on CPU_EXYNOS4210 && !ARCH_MULTIPLATFORM
+ depends on CPU_EXYNOS4210
default y
select ARM_EXYNOS_CPUFREQ
help
@@ -42,7 +42,7 @@ config ARM_EXYNOS4210_CPUFREQ
config ARM_EXYNOS4X12_CPUFREQ
bool "SAMSUNG EXYNOS4x12"
- depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412) && !ARCH_MULTIPLATFORM
+ depends on SOC_EXYNOS4212 || SOC_EXYNOS4412
default y
select ARM_EXYNOS_CPUFREQ
help
@@ -53,7 +53,7 @@ config ARM_EXYNOS4X12_CPUFREQ
config ARM_EXYNOS5250_CPUFREQ
bool "SAMSUNG EXYNOS5250"
- depends on SOC_EXYNOS5250 && !ARCH_MULTIPLATFORM
+ depends on SOC_EXYNOS5250
default y
select ARM_EXYNOS_CPUFREQ
help
diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index 7c2a096..1e0ec57 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -19,8 +19,6 @@
#include <linux/platform_device.h>
#include <linux/of.h>
-#include <plat/cpu.h>
-
#include "exynos-cpufreq.h"
static struct exynos_dvfs_info *exynos_info;
diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
index a28ee9d..8dfebac 100644
--- a/drivers/cpufreq/exynos-cpufreq.h
+++ b/drivers/cpufreq/exynos-cpufreq.h
@@ -50,6 +50,7 @@ struct exynos_dvfs_info {
struct cpufreq_frequency_table *freq_table;
void (*set_freq)(unsigned int, unsigned int);
bool (*need_apll_change)(unsigned int, unsigned int);
+ void __iomem *cmu_regs;
};
#ifdef CONFIG_ARM_EXYNOS4210_CPUFREQ
@@ -77,24 +78,21 @@ static inline int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
}
#endif
-#include <plat/cpu.h>
-#include <mach/map.h>
+#define EXYNOS4_CLKSRC_CPU 0x14200
+#define EXYNOS4_CLKMUX_STATCPU 0x14400
-#define EXYNOS4_CLKSRC_CPU (S5P_VA_CMU + 0x14200)
-#define EXYNOS4_CLKMUX_STATCPU (S5P_VA_CMU + 0x14400)
-
-#define EXYNOS4_CLKDIV_CPU (S5P_VA_CMU + 0x14500)
-#define EXYNOS4_CLKDIV_CPU1 (S5P_VA_CMU + 0x14504)
-#define EXYNOS4_CLKDIV_STATCPU (S5P_VA_CMU + 0x14600)
-#define EXYNOS4_CLKDIV_STATCPU1 (S5P_VA_CMU + 0x14604)
+#define EXYNOS4_CLKDIV_CPU 0x14500
+#define EXYNOS4_CLKDIV_CPU1 0x14504
+#define EXYNOS4_CLKDIV_STATCPU 0x14600
+#define EXYNOS4_CLKDIV_STATCPU1 0x14604
#define EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT (16)
#define EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK (0x7 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT)
-#define EXYNOS5_APLL_LOCK (S5P_VA_CMU + 0x00000)
-#define EXYNOS5_APLL_CON0 (S5P_VA_CMU + 0x00100)
-#define EXYNOS5_CLKMUX_STATCPU (S5P_VA_CMU + 0x00400)
-#define EXYNOS5_CLKDIV_CPU0 (S5P_VA_CMU + 0x00500)
-#define EXYNOS5_CLKDIV_CPU1 (S5P_VA_CMU + 0x00504)
-#define EXYNOS5_CLKDIV_STATCPU0 (S5P_VA_CMU + 0x00600)
-#define EXYNOS5_CLKDIV_STATCPU1 (S5P_VA_CMU + 0x00604)
+#define EXYNOS5_APLL_LOCK 0x00000
+#define EXYNOS5_APLL_CON0 0x00100
+#define EXYNOS5_CLKMUX_STATCPU 0x00400
+#define EXYNOS5_CLKDIV_CPU0 0x00500
+#define EXYNOS5_CLKDIV_CPU1 0x00504
+#define EXYNOS5_CLKDIV_STATCPU0 0x00600
+#define EXYNOS5_CLKDIV_STATCPU1 0x00604
diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c
index 6384e5b..61a5431 100644
--- a/drivers/cpufreq/exynos4210-cpufreq.c
+++ b/drivers/cpufreq/exynos4210-cpufreq.c
@@ -16,6 +16,8 @@
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/cpufreq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include "exynos-cpufreq.h"
@@ -23,6 +25,7 @@ static struct clk *cpu_clk;
static struct clk *moutcore;
static struct clk *mout_mpll;
static struct clk *mout_apll;
+static struct exynos_dvfs_info *cpufreq;
static unsigned int exynos4210_volt_table[] = {
1250000, 1150000, 1050000, 975000, 950000,
@@ -60,20 +63,20 @@ static void exynos4210_set_clkdiv(unsigned int div_index)
tmp = apll_freq_4210[div_index].clk_div_cpu0;
- __raw_writel(tmp, EXYNOS4_CLKDIV_CPU);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
do {
- tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU);
} while (tmp & 0x1111111);
/* Change Divider - CPU1 */
tmp = apll_freq_4210[div_index].clk_div_cpu1;
- __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
do {
- tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
} while (tmp & 0x11);
}
@@ -85,7 +88,7 @@ static void exynos4210_set_apll(unsigned int index)
clk_set_parent(moutcore, mout_mpll);
do {
- tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU)
+ tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
>> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
tmp &= 0x7;
} while (tmp != 0x2);
@@ -96,7 +99,7 @@ static void exynos4210_set_apll(unsigned int index)
clk_set_parent(moutcore, mout_apll);
do {
- tmp = __raw_readl(EXYNOS4_CLKMUX_STATCPU);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
tmp &= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
} while (tmp != (0x1 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
}
@@ -115,8 +118,30 @@ static void exynos4210_set_frequency(unsigned int old_index,
int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
{
+ struct device_node *np;
unsigned long rate;
+ /*
+ * HACK: This is a temporary workaround to get access to clock
+ * controller registers directly and remove static mappings and
+ * dependencies on platform headers. It is necessary to enable
+ * Exynos multi-platform support and will be removed together with
+ * this whole driver as soon as Exynos gets migrated to use
+ * cpufreq-cpu0 driver.
+ */
+ np = of_find_compatible_node(NULL, NULL, "samsung,exynos4210-clock");
+ if (!np) {
+ pr_err("%s: failed to find clock controller DT node\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ info->cmu_regs = of_iomap(np, 0);
+ if (!info->cmu_regs) {
+ pr_err("%s: failed to map CMU registers\n", __func__);
+ return -EFAULT;
+ }
+
cpu_clk = clk_get(NULL, "armclk");
if (IS_ERR(cpu_clk))
return PTR_ERR(cpu_clk);
@@ -143,6 +168,8 @@ int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
info->freq_table = exynos4210_freq_table;
info->set_freq = exynos4210_set_frequency;
+ cpufreq = info;
+
return 0;
err_mout_apll:
diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
index 63a3907..351a207 100644
--- a/drivers/cpufreq/exynos4x12-cpufreq.c
+++ b/drivers/cpufreq/exynos4x12-cpufreq.c
@@ -16,6 +16,8 @@
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/cpufreq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include "exynos-cpufreq.h"
@@ -23,6 +25,7 @@ static struct clk *cpu_clk;
static struct clk *moutcore;
static struct clk *mout_mpll;
static struct clk *mout_apll;
+static struct exynos_dvfs_info *cpufreq;
static unsigned int exynos4x12_volt_table[] = {
1350000, 1287500, 1250000, 1187500, 1137500, 1087500, 1037500,
@@ -105,19 +108,20 @@ static void exynos4x12_set_clkdiv(unsigned int div_index)
tmp = apll_freq_4x12[div_index].clk_div_cpu0;
- __raw_writel(tmp, EXYNOS4_CLKDIV_CPU);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
- while (__raw_readl(EXYNOS4_CLKDIV_STATCPU) & 0x11111111)
+ while (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU)
+ & 0x11111111)
cpu_relax();
/* Change Divider - CPU1 */
tmp = apll_freq_4x12[div_index].clk_div_cpu1;
- __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
do {
cpu_relax();
- tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
} while (tmp != 0x0);
}
@@ -130,7 +134,7 @@ static void exynos4x12_set_apll(unsigned int index)
do {
cpu_relax();
- tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU)
+ tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
>> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
tmp &= 0x7;
} while (tmp != 0x2);
@@ -142,7 +146,7 @@ static void exynos4x12_set_apll(unsigned int index)
do {
cpu_relax();
- tmp = __raw_readl(EXYNOS4_CLKMUX_STATCPU);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
tmp &= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
} while (tmp != (0x1 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
}
@@ -161,8 +165,30 @@ static void exynos4x12_set_frequency(unsigned int old_index,
int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
{
+ struct device_node *np;
unsigned long rate;
+ /*
+ * HACK: This is a temporary workaround to get access to clock
+ * controller registers directly and remove static mappings and
+ * dependencies on platform headers. It is necessary to enable
+ * Exynos multi-platform support and will be removed together with
+ * this whole driver as soon as Exynos gets migrated to use
+ * cpufreq-cpu0 driver.
+ */
+ np = of_find_compatible_node(NULL, NULL, "samsung,exynos4412-clock");
+ if (!np) {
+ pr_err("%s: failed to find clock controller DT node\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ info->cmu_regs = of_iomap(np, 0);
+ if (!info->cmu_regs) {
+ pr_err("%s: failed to map CMU registers\n", __func__);
+ return -EFAULT;
+ }
+
cpu_clk = clk_get(NULL, "armclk");
if (IS_ERR(cpu_clk))
return PTR_ERR(cpu_clk);
@@ -194,6 +220,8 @@ int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
info->freq_table = exynos4x12_freq_table;
info->set_freq = exynos4x12_set_frequency;
+ cpufreq = info;
+
return 0;
err_mout_apll:
diff --git a/drivers/cpufreq/exynos5250-cpufreq.c b/drivers/cpufreq/exynos5250-cpufreq.c
index 363a0b3..c91ce69 100644
--- a/drivers/cpufreq/exynos5250-cpufreq.c
+++ b/drivers/cpufreq/exynos5250-cpufreq.c
@@ -16,8 +16,8 @@
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/cpufreq.h>
-
-#include <mach/map.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include "exynos-cpufreq.h"
@@ -25,6 +25,7 @@ static struct clk *cpu_clk;
static struct clk *moutcore;
static struct clk *mout_mpll;
static struct clk *mout_apll;
+static struct exynos_dvfs_info *cpufreq;
static unsigned int exynos5250_volt_table[] = {
1300000, 1250000, 1225000, 1200000, 1150000,
@@ -87,17 +88,18 @@ static void set_clkdiv(unsigned int div_index)
tmp = apll_freq_5250[div_index].clk_div_cpu0;
- __raw_writel(tmp, EXYNOS5_CLKDIV_CPU0);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU0);
- while (__raw_readl(EXYNOS5_CLKDIV_STATCPU0) & 0x11111111)
+ while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU0)
+ & 0x11111111)
cpu_relax();
/* Change Divider - CPU1 */
tmp = apll_freq_5250[div_index].clk_div_cpu1;
- __raw_writel(tmp, EXYNOS5_CLKDIV_CPU1);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU1);
- while (__raw_readl(EXYNOS5_CLKDIV_STATCPU1) & 0x11)
+ while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU1) & 0x11)
cpu_relax();
}
@@ -111,7 +113,8 @@ static void set_apll(unsigned int index)
do {
cpu_relax();
- tmp = (__raw_readl(EXYNOS5_CLKMUX_STATCPU) >> 16);
+ tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU)
+ >> 16);
tmp &= 0x7;
} while (tmp != 0x2);
@@ -122,7 +125,7 @@ static void set_apll(unsigned int index)
do {
cpu_relax();
- tmp = __raw_readl(EXYNOS5_CLKMUX_STATCPU);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU);
tmp &= (0x7 << 16);
} while (tmp != (0x1 << 16));
}
@@ -141,8 +144,30 @@ static void exynos5250_set_frequency(unsigned int old_index,
int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
{
+ struct device_node *np;
unsigned long rate;
+ /*
+ * HACK: This is a temporary workaround to get access to clock
+ * controller registers directly and remove static mappings and
+ * dependencies on platform headers. It is necessary to enable
+ * Exynos multi-platform support and will be removed together with
+ * this whole driver as soon as Exynos gets migrated to use
+ * cpufreq-cpu0 driver.
+ */
+ np = of_find_compatible_node(NULL, NULL, "samsung,exynos5250-clock");
+ if (!np) {
+ pr_err("%s: failed to find clock controller DT node\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ info->cmu_regs = of_iomap(np, 0);
+ if (!info->cmu_regs) {
+ pr_err("%s: failed to map CMU registers\n", __func__);
+ return -EFAULT;
+ }
+
cpu_clk = clk_get(NULL, "armclk");
if (IS_ERR(cpu_clk))
return PTR_ERR(cpu_clk);
@@ -169,6 +194,8 @@ int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
info->freq_table = exynos5250_freq_table;
info->set_freq = exynos5250_set_frequency;
+ cpufreq = info;
+
return 0;
err_mout_apll:
--
1.9.3
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v2] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
@ 2014-05-23 15:22 ` Tomasz Figa
0 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2014-05-23 15:22 UTC (permalink / raw)
To: linux-arm-kernel
Currently Exynos cpufreq drivers rely on globally mapped clock
controller registers to configure frequency of CPU cores. This is
obviously wrong and will be removed in near future, but to enable
support for multi-platform builds without introducing a regression it
needs to be worked around.
This patch hacks the code to look for clock controller node in device
tree and map its registers using of_iomap(), instead of relying on
global mapping, so dependencies on platform headers are removed and the
driver can compile again with multiplatform support.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
---
drivers/cpufreq/Kconfig.arm | 6 ++---
drivers/cpufreq/exynos-cpufreq.c | 2 --
drivers/cpufreq/exynos-cpufreq.h | 30 ++++++++++++-------------
drivers/cpufreq/exynos4210-cpufreq.c | 39 +++++++++++++++++++++++++++-----
drivers/cpufreq/exynos4x12-cpufreq.c | 40 ++++++++++++++++++++++++++++-----
drivers/cpufreq/exynos5250-cpufreq.c | 43 +++++++++++++++++++++++++++++-------
6 files changed, 119 insertions(+), 41 deletions(-)
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 6a7dd3e..36d20d0 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -31,7 +31,7 @@ config ARM_EXYNOS_CPUFREQ
config ARM_EXYNOS4210_CPUFREQ
bool "SAMSUNG EXYNOS4210"
- depends on CPU_EXYNOS4210 && !ARCH_MULTIPLATFORM
+ depends on CPU_EXYNOS4210
default y
select ARM_EXYNOS_CPUFREQ
help
@@ -42,7 +42,7 @@ config ARM_EXYNOS4210_CPUFREQ
config ARM_EXYNOS4X12_CPUFREQ
bool "SAMSUNG EXYNOS4x12"
- depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412) && !ARCH_MULTIPLATFORM
+ depends on SOC_EXYNOS4212 || SOC_EXYNOS4412
default y
select ARM_EXYNOS_CPUFREQ
help
@@ -53,7 +53,7 @@ config ARM_EXYNOS4X12_CPUFREQ
config ARM_EXYNOS5250_CPUFREQ
bool "SAMSUNG EXYNOS5250"
- depends on SOC_EXYNOS5250 && !ARCH_MULTIPLATFORM
+ depends on SOC_EXYNOS5250
default y
select ARM_EXYNOS_CPUFREQ
help
diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index 7c2a096..1e0ec57 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -19,8 +19,6 @@
#include <linux/platform_device.h>
#include <linux/of.h>
-#include <plat/cpu.h>
-
#include "exynos-cpufreq.h"
static struct exynos_dvfs_info *exynos_info;
diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
index a28ee9d..8dfebac 100644
--- a/drivers/cpufreq/exynos-cpufreq.h
+++ b/drivers/cpufreq/exynos-cpufreq.h
@@ -50,6 +50,7 @@ struct exynos_dvfs_info {
struct cpufreq_frequency_table *freq_table;
void (*set_freq)(unsigned int, unsigned int);
bool (*need_apll_change)(unsigned int, unsigned int);
+ void __iomem *cmu_regs;
};
#ifdef CONFIG_ARM_EXYNOS4210_CPUFREQ
@@ -77,24 +78,21 @@ static inline int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
}
#endif
-#include <plat/cpu.h>
-#include <mach/map.h>
+#define EXYNOS4_CLKSRC_CPU 0x14200
+#define EXYNOS4_CLKMUX_STATCPU 0x14400
-#define EXYNOS4_CLKSRC_CPU (S5P_VA_CMU + 0x14200)
-#define EXYNOS4_CLKMUX_STATCPU (S5P_VA_CMU + 0x14400)
-
-#define EXYNOS4_CLKDIV_CPU (S5P_VA_CMU + 0x14500)
-#define EXYNOS4_CLKDIV_CPU1 (S5P_VA_CMU + 0x14504)
-#define EXYNOS4_CLKDIV_STATCPU (S5P_VA_CMU + 0x14600)
-#define EXYNOS4_CLKDIV_STATCPU1 (S5P_VA_CMU + 0x14604)
+#define EXYNOS4_CLKDIV_CPU 0x14500
+#define EXYNOS4_CLKDIV_CPU1 0x14504
+#define EXYNOS4_CLKDIV_STATCPU 0x14600
+#define EXYNOS4_CLKDIV_STATCPU1 0x14604
#define EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT (16)
#define EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK (0x7 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT)
-#define EXYNOS5_APLL_LOCK (S5P_VA_CMU + 0x00000)
-#define EXYNOS5_APLL_CON0 (S5P_VA_CMU + 0x00100)
-#define EXYNOS5_CLKMUX_STATCPU (S5P_VA_CMU + 0x00400)
-#define EXYNOS5_CLKDIV_CPU0 (S5P_VA_CMU + 0x00500)
-#define EXYNOS5_CLKDIV_CPU1 (S5P_VA_CMU + 0x00504)
-#define EXYNOS5_CLKDIV_STATCPU0 (S5P_VA_CMU + 0x00600)
-#define EXYNOS5_CLKDIV_STATCPU1 (S5P_VA_CMU + 0x00604)
+#define EXYNOS5_APLL_LOCK 0x00000
+#define EXYNOS5_APLL_CON0 0x00100
+#define EXYNOS5_CLKMUX_STATCPU 0x00400
+#define EXYNOS5_CLKDIV_CPU0 0x00500
+#define EXYNOS5_CLKDIV_CPU1 0x00504
+#define EXYNOS5_CLKDIV_STATCPU0 0x00600
+#define EXYNOS5_CLKDIV_STATCPU1 0x00604
diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c
index 6384e5b..61a5431 100644
--- a/drivers/cpufreq/exynos4210-cpufreq.c
+++ b/drivers/cpufreq/exynos4210-cpufreq.c
@@ -16,6 +16,8 @@
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/cpufreq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include "exynos-cpufreq.h"
@@ -23,6 +25,7 @@ static struct clk *cpu_clk;
static struct clk *moutcore;
static struct clk *mout_mpll;
static struct clk *mout_apll;
+static struct exynos_dvfs_info *cpufreq;
static unsigned int exynos4210_volt_table[] = {
1250000, 1150000, 1050000, 975000, 950000,
@@ -60,20 +63,20 @@ static void exynos4210_set_clkdiv(unsigned int div_index)
tmp = apll_freq_4210[div_index].clk_div_cpu0;
- __raw_writel(tmp, EXYNOS4_CLKDIV_CPU);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
do {
- tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU);
} while (tmp & 0x1111111);
/* Change Divider - CPU1 */
tmp = apll_freq_4210[div_index].clk_div_cpu1;
- __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
do {
- tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
} while (tmp & 0x11);
}
@@ -85,7 +88,7 @@ static void exynos4210_set_apll(unsigned int index)
clk_set_parent(moutcore, mout_mpll);
do {
- tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU)
+ tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
>> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
tmp &= 0x7;
} while (tmp != 0x2);
@@ -96,7 +99,7 @@ static void exynos4210_set_apll(unsigned int index)
clk_set_parent(moutcore, mout_apll);
do {
- tmp = __raw_readl(EXYNOS4_CLKMUX_STATCPU);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
tmp &= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
} while (tmp != (0x1 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
}
@@ -115,8 +118,30 @@ static void exynos4210_set_frequency(unsigned int old_index,
int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
{
+ struct device_node *np;
unsigned long rate;
+ /*
+ * HACK: This is a temporary workaround to get access to clock
+ * controller registers directly and remove static mappings and
+ * dependencies on platform headers. It is necessary to enable
+ * Exynos multi-platform support and will be removed together with
+ * this whole driver as soon as Exynos gets migrated to use
+ * cpufreq-cpu0 driver.
+ */
+ np = of_find_compatible_node(NULL, NULL, "samsung,exynos4210-clock");
+ if (!np) {
+ pr_err("%s: failed to find clock controller DT node\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ info->cmu_regs = of_iomap(np, 0);
+ if (!info->cmu_regs) {
+ pr_err("%s: failed to map CMU registers\n", __func__);
+ return -EFAULT;
+ }
+
cpu_clk = clk_get(NULL, "armclk");
if (IS_ERR(cpu_clk))
return PTR_ERR(cpu_clk);
@@ -143,6 +168,8 @@ int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
info->freq_table = exynos4210_freq_table;
info->set_freq = exynos4210_set_frequency;
+ cpufreq = info;
+
return 0;
err_mout_apll:
diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
index 63a3907..351a207 100644
--- a/drivers/cpufreq/exynos4x12-cpufreq.c
+++ b/drivers/cpufreq/exynos4x12-cpufreq.c
@@ -16,6 +16,8 @@
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/cpufreq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include "exynos-cpufreq.h"
@@ -23,6 +25,7 @@ static struct clk *cpu_clk;
static struct clk *moutcore;
static struct clk *mout_mpll;
static struct clk *mout_apll;
+static struct exynos_dvfs_info *cpufreq;
static unsigned int exynos4x12_volt_table[] = {
1350000, 1287500, 1250000, 1187500, 1137500, 1087500, 1037500,
@@ -105,19 +108,20 @@ static void exynos4x12_set_clkdiv(unsigned int div_index)
tmp = apll_freq_4x12[div_index].clk_div_cpu0;
- __raw_writel(tmp, EXYNOS4_CLKDIV_CPU);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
- while (__raw_readl(EXYNOS4_CLKDIV_STATCPU) & 0x11111111)
+ while (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU)
+ & 0x11111111)
cpu_relax();
/* Change Divider - CPU1 */
tmp = apll_freq_4x12[div_index].clk_div_cpu1;
- __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
do {
cpu_relax();
- tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
} while (tmp != 0x0);
}
@@ -130,7 +134,7 @@ static void exynos4x12_set_apll(unsigned int index)
do {
cpu_relax();
- tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU)
+ tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
>> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
tmp &= 0x7;
} while (tmp != 0x2);
@@ -142,7 +146,7 @@ static void exynos4x12_set_apll(unsigned int index)
do {
cpu_relax();
- tmp = __raw_readl(EXYNOS4_CLKMUX_STATCPU);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
tmp &= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
} while (tmp != (0x1 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
}
@@ -161,8 +165,30 @@ static void exynos4x12_set_frequency(unsigned int old_index,
int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
{
+ struct device_node *np;
unsigned long rate;
+ /*
+ * HACK: This is a temporary workaround to get access to clock
+ * controller registers directly and remove static mappings and
+ * dependencies on platform headers. It is necessary to enable
+ * Exynos multi-platform support and will be removed together with
+ * this whole driver as soon as Exynos gets migrated to use
+ * cpufreq-cpu0 driver.
+ */
+ np = of_find_compatible_node(NULL, NULL, "samsung,exynos4412-clock");
+ if (!np) {
+ pr_err("%s: failed to find clock controller DT node\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ info->cmu_regs = of_iomap(np, 0);
+ if (!info->cmu_regs) {
+ pr_err("%s: failed to map CMU registers\n", __func__);
+ return -EFAULT;
+ }
+
cpu_clk = clk_get(NULL, "armclk");
if (IS_ERR(cpu_clk))
return PTR_ERR(cpu_clk);
@@ -194,6 +220,8 @@ int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
info->freq_table = exynos4x12_freq_table;
info->set_freq = exynos4x12_set_frequency;
+ cpufreq = info;
+
return 0;
err_mout_apll:
diff --git a/drivers/cpufreq/exynos5250-cpufreq.c b/drivers/cpufreq/exynos5250-cpufreq.c
index 363a0b3..c91ce69 100644
--- a/drivers/cpufreq/exynos5250-cpufreq.c
+++ b/drivers/cpufreq/exynos5250-cpufreq.c
@@ -16,8 +16,8 @@
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/cpufreq.h>
-
-#include <mach/map.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include "exynos-cpufreq.h"
@@ -25,6 +25,7 @@ static struct clk *cpu_clk;
static struct clk *moutcore;
static struct clk *mout_mpll;
static struct clk *mout_apll;
+static struct exynos_dvfs_info *cpufreq;
static unsigned int exynos5250_volt_table[] = {
1300000, 1250000, 1225000, 1200000, 1150000,
@@ -87,17 +88,18 @@ static void set_clkdiv(unsigned int div_index)
tmp = apll_freq_5250[div_index].clk_div_cpu0;
- __raw_writel(tmp, EXYNOS5_CLKDIV_CPU0);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU0);
- while (__raw_readl(EXYNOS5_CLKDIV_STATCPU0) & 0x11111111)
+ while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU0)
+ & 0x11111111)
cpu_relax();
/* Change Divider - CPU1 */
tmp = apll_freq_5250[div_index].clk_div_cpu1;
- __raw_writel(tmp, EXYNOS5_CLKDIV_CPU1);
+ __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU1);
- while (__raw_readl(EXYNOS5_CLKDIV_STATCPU1) & 0x11)
+ while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU1) & 0x11)
cpu_relax();
}
@@ -111,7 +113,8 @@ static void set_apll(unsigned int index)
do {
cpu_relax();
- tmp = (__raw_readl(EXYNOS5_CLKMUX_STATCPU) >> 16);
+ tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU)
+ >> 16);
tmp &= 0x7;
} while (tmp != 0x2);
@@ -122,7 +125,7 @@ static void set_apll(unsigned int index)
do {
cpu_relax();
- tmp = __raw_readl(EXYNOS5_CLKMUX_STATCPU);
+ tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU);
tmp &= (0x7 << 16);
} while (tmp != (0x1 << 16));
}
@@ -141,8 +144,30 @@ static void exynos5250_set_frequency(unsigned int old_index,
int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
{
+ struct device_node *np;
unsigned long rate;
+ /*
+ * HACK: This is a temporary workaround to get access to clock
+ * controller registers directly and remove static mappings and
+ * dependencies on platform headers. It is necessary to enable
+ * Exynos multi-platform support and will be removed together with
+ * this whole driver as soon as Exynos gets migrated to use
+ * cpufreq-cpu0 driver.
+ */
+ np = of_find_compatible_node(NULL, NULL, "samsung,exynos5250-clock");
+ if (!np) {
+ pr_err("%s: failed to find clock controller DT node\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ info->cmu_regs = of_iomap(np, 0);
+ if (!info->cmu_regs) {
+ pr_err("%s: failed to map CMU registers\n", __func__);
+ return -EFAULT;
+ }
+
cpu_clk = clk_get(NULL, "armclk");
if (IS_ERR(cpu_clk))
return PTR_ERR(cpu_clk);
@@ -169,6 +194,8 @@ int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
info->freq_table = exynos5250_freq_table;
info->set_freq = exynos5250_set_frequency;
+ cpufreq = info;
+
return 0;
err_mout_apll:
--
1.9.3
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH v2] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-23 15:22 ` Tomasz Figa
@ 2014-05-25 21:41 ` Kukjin Kim
-1 siblings, 0 replies; 45+ messages in thread
From: Kukjin Kim @ 2014-05-25 21:41 UTC (permalink / raw)
To: Tomasz Figa
Cc: linux-samsung-soc, linux-arm-kernel, Sachin Kamat, Kukjin Kim,
Arnd Bergmann, Viresh Kumar, Rafael J. Wysocki,
Bartlomiej Zolnierkiewicz, Thomas Abraham
On 05/24/14 00:22, Tomasz Figa wrote:
> Currently Exynos cpufreq drivers rely on globally mapped clock
> controller registers to configure frequency of CPU cores. This is
> obviously wrong and will be removed in near future, but to enable
> support for multi-platform builds without introducing a regression it
> needs to be worked around.
>
> This patch hacks the code to look for clock controller node in device
> tree and map its registers using of_iomap(), instead of relying on
> global mapping, so dependencies on platform headers are removed and the
> driver can compile again with multiplatform support.
>
> Signed-off-by: Tomasz Figa<t.figa@samsung.com>
> ---
> drivers/cpufreq/Kconfig.arm | 6 ++---
> drivers/cpufreq/exynos-cpufreq.c | 2 --
> drivers/cpufreq/exynos-cpufreq.h | 30 ++++++++++++-------------
> drivers/cpufreq/exynos4210-cpufreq.c | 39 +++++++++++++++++++++++++++-----
> drivers/cpufreq/exynos4x12-cpufreq.c | 40 ++++++++++++++++++++++++++++-----
> drivers/cpufreq/exynos5250-cpufreq.c | 43 +++++++++++++++++++++++++++++-------
> 6 files changed, 119 insertions(+), 41 deletions(-)
>
Viresh,
I'm not sure Thomas' v5 cpufreq-cpu0 driver can be upstreamed for 3.16
because of dependency with others, some of them got ack though...
* "PM / OPP: move cpufreq specific helpers out of OPP layer"
- https://www.mail-archive.com/linux-omap@vger.kernel.org/msg104610.html
* "cpufreq: opp: Add device tree based lookup of boost mode frequency"
- http://www.spinics.net/lists/arm-kernel/msg334336.html
So firstly, I've queued this instead with exynos-multiplatform series...
How do you think?
- Kukjin
> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
> index 6a7dd3e..36d20d0 100644
> --- a/drivers/cpufreq/Kconfig.arm
> +++ b/drivers/cpufreq/Kconfig.arm
> @@ -31,7 +31,7 @@ config ARM_EXYNOS_CPUFREQ
>
> config ARM_EXYNOS4210_CPUFREQ
> bool "SAMSUNG EXYNOS4210"
> - depends on CPU_EXYNOS4210&& !ARCH_MULTIPLATFORM
> + depends on CPU_EXYNOS4210
> default y
> select ARM_EXYNOS_CPUFREQ
> help
> @@ -42,7 +42,7 @@ config ARM_EXYNOS4210_CPUFREQ
>
> config ARM_EXYNOS4X12_CPUFREQ
> bool "SAMSUNG EXYNOS4x12"
> - depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412)&& !ARCH_MULTIPLATFORM
> + depends on SOC_EXYNOS4212 || SOC_EXYNOS4412
> default y
> select ARM_EXYNOS_CPUFREQ
> help
> @@ -53,7 +53,7 @@ config ARM_EXYNOS4X12_CPUFREQ
>
> config ARM_EXYNOS5250_CPUFREQ
> bool "SAMSUNG EXYNOS5250"
> - depends on SOC_EXYNOS5250&& !ARCH_MULTIPLATFORM
> + depends on SOC_EXYNOS5250
> default y
> select ARM_EXYNOS_CPUFREQ
> help
> diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
> index 7c2a096..1e0ec57 100644
> --- a/drivers/cpufreq/exynos-cpufreq.c
> +++ b/drivers/cpufreq/exynos-cpufreq.c
> @@ -19,8 +19,6 @@
> #include<linux/platform_device.h>
> #include<linux/of.h>
>
> -#include<plat/cpu.h>
> -
> #include "exynos-cpufreq.h"
>
> static struct exynos_dvfs_info *exynos_info;
> diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
> index a28ee9d..8dfebac 100644
> --- a/drivers/cpufreq/exynos-cpufreq.h
> +++ b/drivers/cpufreq/exynos-cpufreq.h
> @@ -50,6 +50,7 @@ struct exynos_dvfs_info {
> struct cpufreq_frequency_table *freq_table;
> void (*set_freq)(unsigned int, unsigned int);
> bool (*need_apll_change)(unsigned int, unsigned int);
> + void __iomem *cmu_regs;
> };
>
> #ifdef CONFIG_ARM_EXYNOS4210_CPUFREQ
> @@ -77,24 +78,21 @@ static inline int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
> }
> #endif
>
> -#include<plat/cpu.h>
> -#include<mach/map.h>
> +#define EXYNOS4_CLKSRC_CPU 0x14200
> +#define EXYNOS4_CLKMUX_STATCPU 0x14400
>
> -#define EXYNOS4_CLKSRC_CPU (S5P_VA_CMU + 0x14200)
> -#define EXYNOS4_CLKMUX_STATCPU (S5P_VA_CMU + 0x14400)
> -
> -#define EXYNOS4_CLKDIV_CPU (S5P_VA_CMU + 0x14500)
> -#define EXYNOS4_CLKDIV_CPU1 (S5P_VA_CMU + 0x14504)
> -#define EXYNOS4_CLKDIV_STATCPU (S5P_VA_CMU + 0x14600)
> -#define EXYNOS4_CLKDIV_STATCPU1 (S5P_VA_CMU + 0x14604)
> +#define EXYNOS4_CLKDIV_CPU 0x14500
> +#define EXYNOS4_CLKDIV_CPU1 0x14504
> +#define EXYNOS4_CLKDIV_STATCPU 0x14600
> +#define EXYNOS4_CLKDIV_STATCPU1 0x14604
>
> #define EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT (16)
> #define EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK (0x7<< EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT)
>
> -#define EXYNOS5_APLL_LOCK (S5P_VA_CMU + 0x00000)
> -#define EXYNOS5_APLL_CON0 (S5P_VA_CMU + 0x00100)
> -#define EXYNOS5_CLKMUX_STATCPU (S5P_VA_CMU + 0x00400)
> -#define EXYNOS5_CLKDIV_CPU0 (S5P_VA_CMU + 0x00500)
> -#define EXYNOS5_CLKDIV_CPU1 (S5P_VA_CMU + 0x00504)
> -#define EXYNOS5_CLKDIV_STATCPU0 (S5P_VA_CMU + 0x00600)
> -#define EXYNOS5_CLKDIV_STATCPU1 (S5P_VA_CMU + 0x00604)
> +#define EXYNOS5_APLL_LOCK 0x00000
> +#define EXYNOS5_APLL_CON0 0x00100
> +#define EXYNOS5_CLKMUX_STATCPU 0x00400
> +#define EXYNOS5_CLKDIV_CPU0 0x00500
> +#define EXYNOS5_CLKDIV_CPU1 0x00504
> +#define EXYNOS5_CLKDIV_STATCPU0 0x00600
> +#define EXYNOS5_CLKDIV_STATCPU1 0x00604
> diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c
> index 6384e5b..61a5431 100644
> --- a/drivers/cpufreq/exynos4210-cpufreq.c
> +++ b/drivers/cpufreq/exynos4210-cpufreq.c
> @@ -16,6 +16,8 @@
> #include<linux/io.h>
> #include<linux/slab.h>
> #include<linux/cpufreq.h>
> +#include<linux/of.h>
> +#include<linux/of_address.h>
>
> #include "exynos-cpufreq.h"
>
> @@ -23,6 +25,7 @@ static struct clk *cpu_clk;
> static struct clk *moutcore;
> static struct clk *mout_mpll;
> static struct clk *mout_apll;
> +static struct exynos_dvfs_info *cpufreq;
>
> static unsigned int exynos4210_volt_table[] = {
> 1250000, 1150000, 1050000, 975000, 950000,
> @@ -60,20 +63,20 @@ static void exynos4210_set_clkdiv(unsigned int div_index)
>
> tmp = apll_freq_4210[div_index].clk_div_cpu0;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
>
> do {
> - tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU);
> } while (tmp& 0x1111111);
>
> /* Change Divider - CPU1 */
>
> tmp = apll_freq_4210[div_index].clk_div_cpu1;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
>
> do {
> - tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
> } while (tmp& 0x11);
> }
>
> @@ -85,7 +88,7 @@ static void exynos4210_set_apll(unsigned int index)
> clk_set_parent(moutcore, mout_mpll);
>
> do {
> - tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU)
> + tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
> >> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
> tmp&= 0x7;
> } while (tmp != 0x2);
> @@ -96,7 +99,7 @@ static void exynos4210_set_apll(unsigned int index)
> clk_set_parent(moutcore, mout_apll);
>
> do {
> - tmp = __raw_readl(EXYNOS4_CLKMUX_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
> tmp&= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
> } while (tmp != (0x1<< EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
> }
> @@ -115,8 +118,30 @@ static void exynos4210_set_frequency(unsigned int old_index,
>
> int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
> {
> + struct device_node *np;
> unsigned long rate;
>
> + /*
> + * HACK: This is a temporary workaround to get access to clock
> + * controller registers directly and remove static mappings and
> + * dependencies on platform headers. It is necessary to enable
> + * Exynos multi-platform support and will be removed together with
> + * this whole driver as soon as Exynos gets migrated to use
> + * cpufreq-cpu0 driver.
> + */
> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos4210-clock");
> + if (!np) {
> + pr_err("%s: failed to find clock controller DT node\n",
> + __func__);
> + return -ENODEV;
> + }
> +
> + info->cmu_regs = of_iomap(np, 0);
> + if (!info->cmu_regs) {
> + pr_err("%s: failed to map CMU registers\n", __func__);
> + return -EFAULT;
> + }
> +
> cpu_clk = clk_get(NULL, "armclk");
> if (IS_ERR(cpu_clk))
> return PTR_ERR(cpu_clk);
> @@ -143,6 +168,8 @@ int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
> info->freq_table = exynos4210_freq_table;
> info->set_freq = exynos4210_set_frequency;
>
> + cpufreq = info;
> +
> return 0;
>
> err_mout_apll:
> diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
> index 63a3907..351a207 100644
> --- a/drivers/cpufreq/exynos4x12-cpufreq.c
> +++ b/drivers/cpufreq/exynos4x12-cpufreq.c
> @@ -16,6 +16,8 @@
> #include<linux/io.h>
> #include<linux/slab.h>
> #include<linux/cpufreq.h>
> +#include<linux/of.h>
> +#include<linux/of_address.h>
>
> #include "exynos-cpufreq.h"
>
> @@ -23,6 +25,7 @@ static struct clk *cpu_clk;
> static struct clk *moutcore;
> static struct clk *mout_mpll;
> static struct clk *mout_apll;
> +static struct exynos_dvfs_info *cpufreq;
>
> static unsigned int exynos4x12_volt_table[] = {
> 1350000, 1287500, 1250000, 1187500, 1137500, 1087500, 1037500,
> @@ -105,19 +108,20 @@ static void exynos4x12_set_clkdiv(unsigned int div_index)
>
> tmp = apll_freq_4x12[div_index].clk_div_cpu0;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
>
> - while (__raw_readl(EXYNOS4_CLKDIV_STATCPU)& 0x11111111)
> + while (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU)
> + & 0x11111111)
> cpu_relax();
>
> /* Change Divider - CPU1 */
> tmp = apll_freq_4x12[div_index].clk_div_cpu1;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
>
> do {
> cpu_relax();
> - tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
> } while (tmp != 0x0);
> }
>
> @@ -130,7 +134,7 @@ static void exynos4x12_set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU)
> + tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
> >> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
> tmp&= 0x7;
> } while (tmp != 0x2);
> @@ -142,7 +146,7 @@ static void exynos4x12_set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = __raw_readl(EXYNOS4_CLKMUX_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
> tmp&= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
> } while (tmp != (0x1<< EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
> }
> @@ -161,8 +165,30 @@ static void exynos4x12_set_frequency(unsigned int old_index,
>
> int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
> {
> + struct device_node *np;
> unsigned long rate;
>
> + /*
> + * HACK: This is a temporary workaround to get access to clock
> + * controller registers directly and remove static mappings and
> + * dependencies on platform headers. It is necessary to enable
> + * Exynos multi-platform support and will be removed together with
> + * this whole driver as soon as Exynos gets migrated to use
> + * cpufreq-cpu0 driver.
> + */
> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos4412-clock");
> + if (!np) {
> + pr_err("%s: failed to find clock controller DT node\n",
> + __func__);
> + return -ENODEV;
> + }
> +
> + info->cmu_regs = of_iomap(np, 0);
> + if (!info->cmu_regs) {
> + pr_err("%s: failed to map CMU registers\n", __func__);
> + return -EFAULT;
> + }
> +
> cpu_clk = clk_get(NULL, "armclk");
> if (IS_ERR(cpu_clk))
> return PTR_ERR(cpu_clk);
> @@ -194,6 +220,8 @@ int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
> info->freq_table = exynos4x12_freq_table;
> info->set_freq = exynos4x12_set_frequency;
>
> + cpufreq = info;
> +
> return 0;
>
> err_mout_apll:
> diff --git a/drivers/cpufreq/exynos5250-cpufreq.c b/drivers/cpufreq/exynos5250-cpufreq.c
> index 363a0b3..c91ce69 100644
> --- a/drivers/cpufreq/exynos5250-cpufreq.c
> +++ b/drivers/cpufreq/exynos5250-cpufreq.c
> @@ -16,8 +16,8 @@
> #include<linux/io.h>
> #include<linux/slab.h>
> #include<linux/cpufreq.h>
> -
> -#include<mach/map.h>
> +#include<linux/of.h>
> +#include<linux/of_address.h>
>
> #include "exynos-cpufreq.h"
>
> @@ -25,6 +25,7 @@ static struct clk *cpu_clk;
> static struct clk *moutcore;
> static struct clk *mout_mpll;
> static struct clk *mout_apll;
> +static struct exynos_dvfs_info *cpufreq;
>
> static unsigned int exynos5250_volt_table[] = {
> 1300000, 1250000, 1225000, 1200000, 1150000,
> @@ -87,17 +88,18 @@ static void set_clkdiv(unsigned int div_index)
>
> tmp = apll_freq_5250[div_index].clk_div_cpu0;
>
> - __raw_writel(tmp, EXYNOS5_CLKDIV_CPU0);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU0);
>
> - while (__raw_readl(EXYNOS5_CLKDIV_STATCPU0)& 0x11111111)
> + while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU0)
> + & 0x11111111)
> cpu_relax();
>
> /* Change Divider - CPU1 */
> tmp = apll_freq_5250[div_index].clk_div_cpu1;
>
> - __raw_writel(tmp, EXYNOS5_CLKDIV_CPU1);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU1);
>
> - while (__raw_readl(EXYNOS5_CLKDIV_STATCPU1)& 0x11)
> + while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU1)& 0x11)
> cpu_relax();
> }
>
> @@ -111,7 +113,8 @@ static void set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = (__raw_readl(EXYNOS5_CLKMUX_STATCPU)>> 16);
> + tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU)
> + >> 16);
> tmp&= 0x7;
> } while (tmp != 0x2);
>
> @@ -122,7 +125,7 @@ static void set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = __raw_readl(EXYNOS5_CLKMUX_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU);
> tmp&= (0x7<< 16);
> } while (tmp != (0x1<< 16));
> }
> @@ -141,8 +144,30 @@ static void exynos5250_set_frequency(unsigned int old_index,
>
> int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
> {
> + struct device_node *np;
> unsigned long rate;
>
> + /*
> + * HACK: This is a temporary workaround to get access to clock
> + * controller registers directly and remove static mappings and
> + * dependencies on platform headers. It is necessary to enable
> + * Exynos multi-platform support and will be removed together with
> + * this whole driver as soon as Exynos gets migrated to use
> + * cpufreq-cpu0 driver.
> + */
> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos5250-clock");
> + if (!np) {
> + pr_err("%s: failed to find clock controller DT node\n",
> + __func__);
> + return -ENODEV;
> + }
> +
> + info->cmu_regs = of_iomap(np, 0);
> + if (!info->cmu_regs) {
> + pr_err("%s: failed to map CMU registers\n", __func__);
> + return -EFAULT;
> + }
> +
> cpu_clk = clk_get(NULL, "armclk");
> if (IS_ERR(cpu_clk))
> return PTR_ERR(cpu_clk);
> @@ -169,6 +194,8 @@ int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
> info->freq_table = exynos5250_freq_table;
> info->set_freq = exynos5250_set_frequency;
>
> + cpufreq = info;
> +
> return 0;
>
> err_mout_apll:
--
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v2] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
@ 2014-05-25 21:41 ` Kukjin Kim
0 siblings, 0 replies; 45+ messages in thread
From: Kukjin Kim @ 2014-05-25 21:41 UTC (permalink / raw)
To: linux-arm-kernel
On 05/24/14 00:22, Tomasz Figa wrote:
> Currently Exynos cpufreq drivers rely on globally mapped clock
> controller registers to configure frequency of CPU cores. This is
> obviously wrong and will be removed in near future, but to enable
> support for multi-platform builds without introducing a regression it
> needs to be worked around.
>
> This patch hacks the code to look for clock controller node in device
> tree and map its registers using of_iomap(), instead of relying on
> global mapping, so dependencies on platform headers are removed and the
> driver can compile again with multiplatform support.
>
> Signed-off-by: Tomasz Figa<t.figa@samsung.com>
> ---
> drivers/cpufreq/Kconfig.arm | 6 ++---
> drivers/cpufreq/exynos-cpufreq.c | 2 --
> drivers/cpufreq/exynos-cpufreq.h | 30 ++++++++++++-------------
> drivers/cpufreq/exynos4210-cpufreq.c | 39 +++++++++++++++++++++++++++-----
> drivers/cpufreq/exynos4x12-cpufreq.c | 40 ++++++++++++++++++++++++++++-----
> drivers/cpufreq/exynos5250-cpufreq.c | 43 +++++++++++++++++++++++++++++-------
> 6 files changed, 119 insertions(+), 41 deletions(-)
>
Viresh,
I'm not sure Thomas' v5 cpufreq-cpu0 driver can be upstreamed for 3.16
because of dependency with others, some of them got ack though...
* "PM / OPP: move cpufreq specific helpers out of OPP layer"
- https://www.mail-archive.com/linux-omap at vger.kernel.org/msg104610.html
* "cpufreq: opp: Add device tree based lookup of boost mode frequency"
- http://www.spinics.net/lists/arm-kernel/msg334336.html
So firstly, I've queued this instead with exynos-multiplatform series...
How do you think?
- Kukjin
> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
> index 6a7dd3e..36d20d0 100644
> --- a/drivers/cpufreq/Kconfig.arm
> +++ b/drivers/cpufreq/Kconfig.arm
> @@ -31,7 +31,7 @@ config ARM_EXYNOS_CPUFREQ
>
> config ARM_EXYNOS4210_CPUFREQ
> bool "SAMSUNG EXYNOS4210"
> - depends on CPU_EXYNOS4210&& !ARCH_MULTIPLATFORM
> + depends on CPU_EXYNOS4210
> default y
> select ARM_EXYNOS_CPUFREQ
> help
> @@ -42,7 +42,7 @@ config ARM_EXYNOS4210_CPUFREQ
>
> config ARM_EXYNOS4X12_CPUFREQ
> bool "SAMSUNG EXYNOS4x12"
> - depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412)&& !ARCH_MULTIPLATFORM
> + depends on SOC_EXYNOS4212 || SOC_EXYNOS4412
> default y
> select ARM_EXYNOS_CPUFREQ
> help
> @@ -53,7 +53,7 @@ config ARM_EXYNOS4X12_CPUFREQ
>
> config ARM_EXYNOS5250_CPUFREQ
> bool "SAMSUNG EXYNOS5250"
> - depends on SOC_EXYNOS5250&& !ARCH_MULTIPLATFORM
> + depends on SOC_EXYNOS5250
> default y
> select ARM_EXYNOS_CPUFREQ
> help
> diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
> index 7c2a096..1e0ec57 100644
> --- a/drivers/cpufreq/exynos-cpufreq.c
> +++ b/drivers/cpufreq/exynos-cpufreq.c
> @@ -19,8 +19,6 @@
> #include<linux/platform_device.h>
> #include<linux/of.h>
>
> -#include<plat/cpu.h>
> -
> #include "exynos-cpufreq.h"
>
> static struct exynos_dvfs_info *exynos_info;
> diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
> index a28ee9d..8dfebac 100644
> --- a/drivers/cpufreq/exynos-cpufreq.h
> +++ b/drivers/cpufreq/exynos-cpufreq.h
> @@ -50,6 +50,7 @@ struct exynos_dvfs_info {
> struct cpufreq_frequency_table *freq_table;
> void (*set_freq)(unsigned int, unsigned int);
> bool (*need_apll_change)(unsigned int, unsigned int);
> + void __iomem *cmu_regs;
> };
>
> #ifdef CONFIG_ARM_EXYNOS4210_CPUFREQ
> @@ -77,24 +78,21 @@ static inline int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
> }
> #endif
>
> -#include<plat/cpu.h>
> -#include<mach/map.h>
> +#define EXYNOS4_CLKSRC_CPU 0x14200
> +#define EXYNOS4_CLKMUX_STATCPU 0x14400
>
> -#define EXYNOS4_CLKSRC_CPU (S5P_VA_CMU + 0x14200)
> -#define EXYNOS4_CLKMUX_STATCPU (S5P_VA_CMU + 0x14400)
> -
> -#define EXYNOS4_CLKDIV_CPU (S5P_VA_CMU + 0x14500)
> -#define EXYNOS4_CLKDIV_CPU1 (S5P_VA_CMU + 0x14504)
> -#define EXYNOS4_CLKDIV_STATCPU (S5P_VA_CMU + 0x14600)
> -#define EXYNOS4_CLKDIV_STATCPU1 (S5P_VA_CMU + 0x14604)
> +#define EXYNOS4_CLKDIV_CPU 0x14500
> +#define EXYNOS4_CLKDIV_CPU1 0x14504
> +#define EXYNOS4_CLKDIV_STATCPU 0x14600
> +#define EXYNOS4_CLKDIV_STATCPU1 0x14604
>
> #define EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT (16)
> #define EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK (0x7<< EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT)
>
> -#define EXYNOS5_APLL_LOCK (S5P_VA_CMU + 0x00000)
> -#define EXYNOS5_APLL_CON0 (S5P_VA_CMU + 0x00100)
> -#define EXYNOS5_CLKMUX_STATCPU (S5P_VA_CMU + 0x00400)
> -#define EXYNOS5_CLKDIV_CPU0 (S5P_VA_CMU + 0x00500)
> -#define EXYNOS5_CLKDIV_CPU1 (S5P_VA_CMU + 0x00504)
> -#define EXYNOS5_CLKDIV_STATCPU0 (S5P_VA_CMU + 0x00600)
> -#define EXYNOS5_CLKDIV_STATCPU1 (S5P_VA_CMU + 0x00604)
> +#define EXYNOS5_APLL_LOCK 0x00000
> +#define EXYNOS5_APLL_CON0 0x00100
> +#define EXYNOS5_CLKMUX_STATCPU 0x00400
> +#define EXYNOS5_CLKDIV_CPU0 0x00500
> +#define EXYNOS5_CLKDIV_CPU1 0x00504
> +#define EXYNOS5_CLKDIV_STATCPU0 0x00600
> +#define EXYNOS5_CLKDIV_STATCPU1 0x00604
> diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c
> index 6384e5b..61a5431 100644
> --- a/drivers/cpufreq/exynos4210-cpufreq.c
> +++ b/drivers/cpufreq/exynos4210-cpufreq.c
> @@ -16,6 +16,8 @@
> #include<linux/io.h>
> #include<linux/slab.h>
> #include<linux/cpufreq.h>
> +#include<linux/of.h>
> +#include<linux/of_address.h>
>
> #include "exynos-cpufreq.h"
>
> @@ -23,6 +25,7 @@ static struct clk *cpu_clk;
> static struct clk *moutcore;
> static struct clk *mout_mpll;
> static struct clk *mout_apll;
> +static struct exynos_dvfs_info *cpufreq;
>
> static unsigned int exynos4210_volt_table[] = {
> 1250000, 1150000, 1050000, 975000, 950000,
> @@ -60,20 +63,20 @@ static void exynos4210_set_clkdiv(unsigned int div_index)
>
> tmp = apll_freq_4210[div_index].clk_div_cpu0;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
>
> do {
> - tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU);
> } while (tmp& 0x1111111);
>
> /* Change Divider - CPU1 */
>
> tmp = apll_freq_4210[div_index].clk_div_cpu1;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
>
> do {
> - tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
> } while (tmp& 0x11);
> }
>
> @@ -85,7 +88,7 @@ static void exynos4210_set_apll(unsigned int index)
> clk_set_parent(moutcore, mout_mpll);
>
> do {
> - tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU)
> + tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
> >> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
> tmp&= 0x7;
> } while (tmp != 0x2);
> @@ -96,7 +99,7 @@ static void exynos4210_set_apll(unsigned int index)
> clk_set_parent(moutcore, mout_apll);
>
> do {
> - tmp = __raw_readl(EXYNOS4_CLKMUX_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
> tmp&= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
> } while (tmp != (0x1<< EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
> }
> @@ -115,8 +118,30 @@ static void exynos4210_set_frequency(unsigned int old_index,
>
> int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
> {
> + struct device_node *np;
> unsigned long rate;
>
> + /*
> + * HACK: This is a temporary workaround to get access to clock
> + * controller registers directly and remove static mappings and
> + * dependencies on platform headers. It is necessary to enable
> + * Exynos multi-platform support and will be removed together with
> + * this whole driver as soon as Exynos gets migrated to use
> + * cpufreq-cpu0 driver.
> + */
> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos4210-clock");
> + if (!np) {
> + pr_err("%s: failed to find clock controller DT node\n",
> + __func__);
> + return -ENODEV;
> + }
> +
> + info->cmu_regs = of_iomap(np, 0);
> + if (!info->cmu_regs) {
> + pr_err("%s: failed to map CMU registers\n", __func__);
> + return -EFAULT;
> + }
> +
> cpu_clk = clk_get(NULL, "armclk");
> if (IS_ERR(cpu_clk))
> return PTR_ERR(cpu_clk);
> @@ -143,6 +168,8 @@ int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
> info->freq_table = exynos4210_freq_table;
> info->set_freq = exynos4210_set_frequency;
>
> + cpufreq = info;
> +
> return 0;
>
> err_mout_apll:
> diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
> index 63a3907..351a207 100644
> --- a/drivers/cpufreq/exynos4x12-cpufreq.c
> +++ b/drivers/cpufreq/exynos4x12-cpufreq.c
> @@ -16,6 +16,8 @@
> #include<linux/io.h>
> #include<linux/slab.h>
> #include<linux/cpufreq.h>
> +#include<linux/of.h>
> +#include<linux/of_address.h>
>
> #include "exynos-cpufreq.h"
>
> @@ -23,6 +25,7 @@ static struct clk *cpu_clk;
> static struct clk *moutcore;
> static struct clk *mout_mpll;
> static struct clk *mout_apll;
> +static struct exynos_dvfs_info *cpufreq;
>
> static unsigned int exynos4x12_volt_table[] = {
> 1350000, 1287500, 1250000, 1187500, 1137500, 1087500, 1037500,
> @@ -105,19 +108,20 @@ static void exynos4x12_set_clkdiv(unsigned int div_index)
>
> tmp = apll_freq_4x12[div_index].clk_div_cpu0;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
>
> - while (__raw_readl(EXYNOS4_CLKDIV_STATCPU)& 0x11111111)
> + while (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU)
> + & 0x11111111)
> cpu_relax();
>
> /* Change Divider - CPU1 */
> tmp = apll_freq_4x12[div_index].clk_div_cpu1;
>
> - __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
>
> do {
> cpu_relax();
> - tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
> } while (tmp != 0x0);
> }
>
> @@ -130,7 +134,7 @@ static void exynos4x12_set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU)
> + tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
> >> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
> tmp&= 0x7;
> } while (tmp != 0x2);
> @@ -142,7 +146,7 @@ static void exynos4x12_set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = __raw_readl(EXYNOS4_CLKMUX_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
> tmp&= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
> } while (tmp != (0x1<< EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
> }
> @@ -161,8 +165,30 @@ static void exynos4x12_set_frequency(unsigned int old_index,
>
> int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
> {
> + struct device_node *np;
> unsigned long rate;
>
> + /*
> + * HACK: This is a temporary workaround to get access to clock
> + * controller registers directly and remove static mappings and
> + * dependencies on platform headers. It is necessary to enable
> + * Exynos multi-platform support and will be removed together with
> + * this whole driver as soon as Exynos gets migrated to use
> + * cpufreq-cpu0 driver.
> + */
> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos4412-clock");
> + if (!np) {
> + pr_err("%s: failed to find clock controller DT node\n",
> + __func__);
> + return -ENODEV;
> + }
> +
> + info->cmu_regs = of_iomap(np, 0);
> + if (!info->cmu_regs) {
> + pr_err("%s: failed to map CMU registers\n", __func__);
> + return -EFAULT;
> + }
> +
> cpu_clk = clk_get(NULL, "armclk");
> if (IS_ERR(cpu_clk))
> return PTR_ERR(cpu_clk);
> @@ -194,6 +220,8 @@ int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
> info->freq_table = exynos4x12_freq_table;
> info->set_freq = exynos4x12_set_frequency;
>
> + cpufreq = info;
> +
> return 0;
>
> err_mout_apll:
> diff --git a/drivers/cpufreq/exynos5250-cpufreq.c b/drivers/cpufreq/exynos5250-cpufreq.c
> index 363a0b3..c91ce69 100644
> --- a/drivers/cpufreq/exynos5250-cpufreq.c
> +++ b/drivers/cpufreq/exynos5250-cpufreq.c
> @@ -16,8 +16,8 @@
> #include<linux/io.h>
> #include<linux/slab.h>
> #include<linux/cpufreq.h>
> -
> -#include<mach/map.h>
> +#include<linux/of.h>
> +#include<linux/of_address.h>
>
> #include "exynos-cpufreq.h"
>
> @@ -25,6 +25,7 @@ static struct clk *cpu_clk;
> static struct clk *moutcore;
> static struct clk *mout_mpll;
> static struct clk *mout_apll;
> +static struct exynos_dvfs_info *cpufreq;
>
> static unsigned int exynos5250_volt_table[] = {
> 1300000, 1250000, 1225000, 1200000, 1150000,
> @@ -87,17 +88,18 @@ static void set_clkdiv(unsigned int div_index)
>
> tmp = apll_freq_5250[div_index].clk_div_cpu0;
>
> - __raw_writel(tmp, EXYNOS5_CLKDIV_CPU0);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU0);
>
> - while (__raw_readl(EXYNOS5_CLKDIV_STATCPU0)& 0x11111111)
> + while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU0)
> + & 0x11111111)
> cpu_relax();
>
> /* Change Divider - CPU1 */
> tmp = apll_freq_5250[div_index].clk_div_cpu1;
>
> - __raw_writel(tmp, EXYNOS5_CLKDIV_CPU1);
> + __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU1);
>
> - while (__raw_readl(EXYNOS5_CLKDIV_STATCPU1)& 0x11)
> + while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU1)& 0x11)
> cpu_relax();
> }
>
> @@ -111,7 +113,8 @@ static void set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = (__raw_readl(EXYNOS5_CLKMUX_STATCPU)>> 16);
> + tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU)
> + >> 16);
> tmp&= 0x7;
> } while (tmp != 0x2);
>
> @@ -122,7 +125,7 @@ static void set_apll(unsigned int index)
>
> do {
> cpu_relax();
> - tmp = __raw_readl(EXYNOS5_CLKMUX_STATCPU);
> + tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU);
> tmp&= (0x7<< 16);
> } while (tmp != (0x1<< 16));
> }
> @@ -141,8 +144,30 @@ static void exynos5250_set_frequency(unsigned int old_index,
>
> int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
> {
> + struct device_node *np;
> unsigned long rate;
>
> + /*
> + * HACK: This is a temporary workaround to get access to clock
> + * controller registers directly and remove static mappings and
> + * dependencies on platform headers. It is necessary to enable
> + * Exynos multi-platform support and will be removed together with
> + * this whole driver as soon as Exynos gets migrated to use
> + * cpufreq-cpu0 driver.
> + */
> + np = of_find_compatible_node(NULL, NULL, "samsung,exynos5250-clock");
> + if (!np) {
> + pr_err("%s: failed to find clock controller DT node\n",
> + __func__);
> + return -ENODEV;
> + }
> +
> + info->cmu_regs = of_iomap(np, 0);
> + if (!info->cmu_regs) {
> + pr_err("%s: failed to map CMU registers\n", __func__);
> + return -EFAULT;
> + }
> +
> cpu_clk = clk_get(NULL, "armclk");
> if (IS_ERR(cpu_clk))
> return PTR_ERR(cpu_clk);
> @@ -169,6 +194,8 @@ int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
> info->freq_table = exynos5250_freq_table;
> info->set_freq = exynos5250_set_frequency;
>
> + cpufreq = info;
> +
> return 0;
>
> err_mout_apll:
--
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v2] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-23 15:22 ` Tomasz Figa
@ 2014-05-26 5:40 ` Viresh Kumar
-1 siblings, 0 replies; 45+ messages in thread
From: Viresh Kumar @ 2014-05-26 5:40 UTC (permalink / raw)
To: Tomasz Figa
Cc: linux-samsung-soc, linux-arm-kernel, Sachin Kamat, Kukjin Kim,
Arnd Bergmann, Rafael J. Wysocki, Bartlomiej Zolnierkiewicz
On 23 May 2014 20:52, Tomasz Figa <t.figa@samsung.com> wrote:
> Currently Exynos cpufreq drivers rely on globally mapped clock
> controller registers to configure frequency of CPU cores. This is
> obviously wrong and will be removed in near future, but to enable
> support for multi-platform builds without introducing a regression it
> needs to be worked around.
>
> This patch hacks the code to look for clock controller node in device
> tree and map its registers using of_iomap(), instead of relying on
> global mapping, so dependencies on platform headers are removed and the
> driver can compile again with multiplatform support.
>
> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
> ---
> drivers/cpufreq/Kconfig.arm | 6 ++---
> drivers/cpufreq/exynos-cpufreq.c | 2 --
> drivers/cpufreq/exynos-cpufreq.h | 30 ++++++++++++-------------
> drivers/cpufreq/exynos4210-cpufreq.c | 39 +++++++++++++++++++++++++++-----
> drivers/cpufreq/exynos4x12-cpufreq.c | 40 ++++++++++++++++++++++++++++-----
> drivers/cpufreq/exynos5250-cpufreq.c | 43 +++++++++++++++++++++++++++++-------
> 6 files changed, 119 insertions(+), 41 deletions(-)
Looks fine..
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v2] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
@ 2014-05-26 5:40 ` Viresh Kumar
0 siblings, 0 replies; 45+ messages in thread
From: Viresh Kumar @ 2014-05-26 5:40 UTC (permalink / raw)
To: linux-arm-kernel
On 23 May 2014 20:52, Tomasz Figa <t.figa@samsung.com> wrote:
> Currently Exynos cpufreq drivers rely on globally mapped clock
> controller registers to configure frequency of CPU cores. This is
> obviously wrong and will be removed in near future, but to enable
> support for multi-platform builds without introducing a regression it
> needs to be worked around.
>
> This patch hacks the code to look for clock controller node in device
> tree and map its registers using of_iomap(), instead of relying on
> global mapping, so dependencies on platform headers are removed and the
> driver can compile again with multiplatform support.
>
> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
> ---
> drivers/cpufreq/Kconfig.arm | 6 ++---
> drivers/cpufreq/exynos-cpufreq.c | 2 --
> drivers/cpufreq/exynos-cpufreq.h | 30 ++++++++++++-------------
> drivers/cpufreq/exynos4210-cpufreq.c | 39 +++++++++++++++++++++++++++-----
> drivers/cpufreq/exynos4x12-cpufreq.c | 40 ++++++++++++++++++++++++++++-----
> drivers/cpufreq/exynos5250-cpufreq.c | 43 +++++++++++++++++++++++++++++-------
> 6 files changed, 119 insertions(+), 41 deletions(-)
Looks fine..
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v2] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-25 21:41 ` Kukjin Kim
@ 2014-05-26 5:40 ` Viresh Kumar
-1 siblings, 0 replies; 45+ messages in thread
From: Viresh Kumar @ 2014-05-26 5:40 UTC (permalink / raw)
To: Kukjin Kim
Cc: Tomasz Figa, linux-samsung-soc, linux-arm-kernel, Sachin Kamat,
Arnd Bergmann, Rafael J. Wysocki, Bartlomiej Zolnierkiewicz,
Thomas Abraham
On 26 May 2014 03:11, Kukjin Kim <kgene.kim@samsung.com> wrote:
> I'm not sure Thomas' v5 cpufreq-cpu0 driver can be upstreamed for 3.16
> because of dependency with others, some of them got ack though...
>
> * "PM / OPP: move cpufreq specific helpers out of OPP layer"
> - https://www.mail-archive.com/linux-omap@vger.kernel.org/msg104610.html
This is already lying in Rafael's tree.
> * "cpufreq: opp: Add device tree based lookup of boost mode frequency"
> - http://www.spinics.net/lists/arm-kernel/msg334336.html
>
> So firstly, I've queued this instead with exynos-multiplatform series...
>
> How do you think?
Looks fine to me. Thanks.
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v2] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
@ 2014-05-26 5:40 ` Viresh Kumar
0 siblings, 0 replies; 45+ messages in thread
From: Viresh Kumar @ 2014-05-26 5:40 UTC (permalink / raw)
To: linux-arm-kernel
On 26 May 2014 03:11, Kukjin Kim <kgene.kim@samsung.com> wrote:
> I'm not sure Thomas' v5 cpufreq-cpu0 driver can be upstreamed for 3.16
> because of dependency with others, some of them got ack though...
>
> * "PM / OPP: move cpufreq specific helpers out of OPP layer"
> - https://www.mail-archive.com/linux-omap at vger.kernel.org/msg104610.html
This is already lying in Rafael's tree.
> * "cpufreq: opp: Add device tree based lookup of boost mode frequency"
> - http://www.spinics.net/lists/arm-kernel/msg334336.html
>
> So firstly, I've queued this instead with exynos-multiplatform series...
>
> How do you think?
Looks fine to me. Thanks.
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v2] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
2014-05-26 5:40 ` Viresh Kumar
@ 2014-05-26 22:06 ` Kukjin Kim
-1 siblings, 0 replies; 45+ messages in thread
From: Kukjin Kim @ 2014-05-26 22:06 UTC (permalink / raw)
To: Viresh Kumar
Cc: Kukjin Kim, Tomasz Figa, linux-samsung-soc, linux-arm-kernel,
Sachin Kamat, Arnd Bergmann, Rafael J. Wysocki,
Bartlomiej Zolnierkiewicz, Thomas Abraham
On 05/26/14 14:40, Viresh Kumar wrote:
> On 26 May 2014 03:11, Kukjin Kim<kgene.kim@samsung.com> wrote:
>> I'm not sure Thomas' v5 cpufreq-cpu0 driver can be upstreamed for 3.16
>> because of dependency with others, some of them got ack though...
>>
>> * "PM / OPP: move cpufreq specific helpers out of OPP layer"
>> - https://www.mail-archive.com/linux-omap@vger.kernel.org/msg104610.html
>
> This is already lying in Rafael's tree.
>
Good.
>> * "cpufreq: opp: Add device tree based lookup of boost mode frequency"
>> - http://www.spinics.net/lists/arm-kernel/msg334336.html
>>
Probably need more time?
>> So firstly, I've queued this instead with exynos-multiplatform series...
>>
>> How do you think?
>
> Looks fine to me. Thanks.
OK, I applied with your ack.
Thanks,
- Kukjin
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v2] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
@ 2014-05-26 22:06 ` Kukjin Kim
0 siblings, 0 replies; 45+ messages in thread
From: Kukjin Kim @ 2014-05-26 22:06 UTC (permalink / raw)
To: linux-arm-kernel
On 05/26/14 14:40, Viresh Kumar wrote:
> On 26 May 2014 03:11, Kukjin Kim<kgene.kim@samsung.com> wrote:
>> I'm not sure Thomas' v5 cpufreq-cpu0 driver can be upstreamed for 3.16
>> because of dependency with others, some of them got ack though...
>>
>> * "PM / OPP: move cpufreq specific helpers out of OPP layer"
>> - https://www.mail-archive.com/linux-omap at vger.kernel.org/msg104610.html
>
> This is already lying in Rafael's tree.
>
Good.
>> * "cpufreq: opp: Add device tree based lookup of boost mode frequency"
>> - http://www.spinics.net/lists/arm-kernel/msg334336.html
>>
Probably need more time?
>> So firstly, I've queued this instead with exynos-multiplatform series...
>>
>> How do you think?
>
> Looks fine to me. Thanks.
OK, I applied with your ack.
Thanks,
- Kukjin
^ permalink raw reply [flat|nested] 45+ messages in thread
end of thread, other threads:[~2014-05-26 22:06 UTC | newest]
Thread overview: 45+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-05-21 6:52 [PATCH 0/3] Exynos multi-platform support Sachin Kamat
2014-05-21 6:52 ` Sachin Kamat
2014-05-21 6:52 ` [PATCH 1/3] ARM: EXYNOS: Consolidate Kconfig entries Sachin Kamat
2014-05-21 6:52 ` Sachin Kamat
2014-05-21 6:52 ` [PATCH 2/3] ARM: EXYNOS: Enable multi-platform build support Sachin Kamat
2014-05-21 6:52 ` Sachin Kamat
2014-05-21 8:16 ` Arnd Bergmann
2014-05-21 8:16 ` Arnd Bergmann
2014-05-21 8:20 ` Sachin Kamat
2014-05-21 8:20 ` Sachin Kamat
2014-05-21 10:36 ` Bartlomiej Zolnierkiewicz
2014-05-21 10:36 ` Bartlomiej Zolnierkiewicz
2014-05-21 11:14 ` Sachin Kamat
2014-05-21 11:14 ` Sachin Kamat
2014-05-21 13:40 ` Kukjin Kim
2014-05-21 13:40 ` Kukjin Kim
2014-05-21 14:02 ` Bartlomiej Zolnierkiewicz
2014-05-21 14:02 ` Bartlomiej Zolnierkiewicz
2014-05-21 6:52 ` [PATCH 3/3] ARM: multi_v7_defconfig: Enable Exynos platform Sachin Kamat
2014-05-21 6:52 ` Sachin Kamat
2014-05-21 8:26 ` [PATCH 0/3] Exynos multi-platform support Tomasz Figa
2014-05-21 8:26 ` Tomasz Figa
2014-05-21 11:12 ` [PATCH] cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM Tomasz Figa
2014-05-21 11:17 ` Tomasz Figa
2014-05-21 11:17 ` Tomasz Figa
2014-05-21 11:22 ` Viresh Kumar
2014-05-21 11:22 ` Viresh Kumar
2014-05-21 12:11 ` Tomasz Figa
2014-05-21 12:11 ` Tomasz Figa
2014-05-21 12:21 ` Arnd Bergmann
2014-05-21 12:26 ` Tomasz Figa
2014-05-21 12:32 ` Thomas Abraham
2014-05-21 13:31 ` Kukjin Kim
2014-05-21 14:05 ` Viresh Kumar
2014-05-23 14:52 ` Tomasz Figa
2014-05-23 15:22 ` [PATCH v2] " Tomasz Figa
2014-05-23 15:22 ` Tomasz Figa
2014-05-25 21:41 ` Kukjin Kim
2014-05-25 21:41 ` Kukjin Kim
2014-05-26 5:40 ` Viresh Kumar
2014-05-26 5:40 ` Viresh Kumar
2014-05-26 22:06 ` Kukjin Kim
2014-05-26 22:06 ` Kukjin Kim
2014-05-26 5:40 ` Viresh Kumar
2014-05-26 5:40 ` Viresh Kumar
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