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From: Roger Quadros <rogerq@ti.com>
To: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
	wg@grandegger.com, mkl@pengutronix.de, tony@atomide.com
Cc: tglx@linutronix.de, linux-omap@vger.kernel.org,
	linux-can@vger.kernel.org, netdev@vger.kernel.org,
	mugunthanvnm@ti.com, george.cherian@ti.com, balbi@ti.com,
	nsekhar@ti.comnm@ti.com
Subject: Re: [PATCH 05/13] ARM: dts: DRA7: Add DCAN nodes
Date: Tue, 9 Sep 2014 11:30:50 +0300	[thread overview]
Message-ID: <540EBABA.9090009@ti.com> (raw)
In-Reply-To: <540DDBE0.5090004@cogentembedded.com>

Hi,

On 09/08/2014 07:40 PM, Sergei Shtylyov wrote:
> Hello.
> 
> On 9/8/2014 6:10 PM, Roger Quadros wrote:
> 
>> The SoC supports 2 DCAN nodes. Add them.
> 
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> ---
>>   arch/arm/boot/dts/dra7.dtsi | 30 ++++++++++++++++++++++++++++++
>>   1 file changed, 30 insertions(+)
> 
>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
>> index 370009e..4ce1a4f 100644
>> --- a/arch/arm/boot/dts/dra7.dtsi
>> +++ b/arch/arm/boot/dts/dra7.dtsi
> [...]
>> @@ -1267,6 +1269,34 @@
>>               ti,irqs-skip = <10 133 139 140>;
>>               ti,irqs-safe-map = <0>;
>>           };
>> +
>> +        dcan1: d_can@481cc000 {
> 
>    The ePAPR standard has something to say here:
> 
>>>
> The name of a node should be somewhat generic, reflecting the function of the device and not its precise programming model. If appropriate, the name should be one of the following choices:
> 
>     • can

Right. I'll fix it up.

>>>
> 
>> +            compatible = "bosch,d_can";
>> +            ti,hwmods = "dcan1";
>> +            reg = <0x4ae3c000 0x2000>,
>> +                  <0x558 0x4>; /* index to RAMINIT reg within syscon */
>> +            raminit-syscon = <&dra7_ctrl_core>;
>> +            raminit-start-bit = <3>;
>> +            raminit-done-bit = <1>;
>> +            raminit-pulse;
> 
>    Hm, aren't the above 4 properties vendor specific? If so, they should start with a vendor prefix and comma.

At least for now I don't know about any other platform other than TI using a RAMINIT register outside the
CAN register space. However the mechanism is generic enough and not limited to TI platforms.

I don't mind vendor prefix or not, but would like to hear the opinion of the CAN maintainers as to what they would prefer.

> 
>> +            interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
>> +            clocks = <&dcan1_sys_clk_mux>;
>> +            status = "disabled";
>> +        };
> 

cheers,
-roger

WARNING: multiple messages have this Message-ID (diff)
From: Roger Quadros <rogerq@ti.com>
To: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
	<wg@grandegger.com>, <mkl@pengutronix.de>, <tony@atomide.com>
Cc: <tglx@linutronix.de>, <linux-omap@vger.kernel.org>,
	<linux-can@vger.kernel.org>, <netdev@vger.kernel.org>,
	<mugunthanvnm@ti.com>, <george.cherian@ti.com>, <balbi@ti.com>,
	<nsekhar@ti.com>, <nm@ti.com>
Subject: Re: [PATCH 05/13] ARM: dts: DRA7: Add DCAN nodes
Date: Tue, 9 Sep 2014 11:30:50 +0300	[thread overview]
Message-ID: <540EBABA.9090009@ti.com> (raw)
In-Reply-To: <540DDBE0.5090004@cogentembedded.com>

Hi,

On 09/08/2014 07:40 PM, Sergei Shtylyov wrote:
> Hello.
> 
> On 9/8/2014 6:10 PM, Roger Quadros wrote:
> 
>> The SoC supports 2 DCAN nodes. Add them.
> 
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> ---
>>   arch/arm/boot/dts/dra7.dtsi | 30 ++++++++++++++++++++++++++++++
>>   1 file changed, 30 insertions(+)
> 
>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
>> index 370009e..4ce1a4f 100644
>> --- a/arch/arm/boot/dts/dra7.dtsi
>> +++ b/arch/arm/boot/dts/dra7.dtsi
> [...]
>> @@ -1267,6 +1269,34 @@
>>               ti,irqs-skip = <10 133 139 140>;
>>               ti,irqs-safe-map = <0>;
>>           };
>> +
>> +        dcan1: d_can@481cc000 {
> 
>    The ePAPR standard has something to say here:
> 
>>>
> The name of a node should be somewhat generic, reflecting the function of the device and not its precise programming model. If appropriate, the name should be one of the following choices:
> 
>     • can

Right. I'll fix it up.

>>>
> 
>> +            compatible = "bosch,d_can";
>> +            ti,hwmods = "dcan1";
>> +            reg = <0x4ae3c000 0x2000>,
>> +                  <0x558 0x4>; /* index to RAMINIT reg within syscon */
>> +            raminit-syscon = <&dra7_ctrl_core>;
>> +            raminit-start-bit = <3>;
>> +            raminit-done-bit = <1>;
>> +            raminit-pulse;
> 
>    Hm, aren't the above 4 properties vendor specific? If so, they should start with a vendor prefix and comma.

At least for now I don't know about any other platform other than TI using a RAMINIT register outside the
CAN register space. However the mechanism is generic enough and not limited to TI platforms.

I don't mind vendor prefix or not, but would like to hear the opinion of the CAN maintainers as to what they would prefer.

> 
>> +            interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
>> +            clocks = <&dcan1_sys_clk_mux>;
>> +            status = "disabled";
>> +        };
> 

cheers,
-roger

  reply	other threads:[~2014-09-09  8:31 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-08 14:10 [PATCH 00/13] net: can: Add can support for TI platforms Roger Quadros
2014-09-08 14:10 ` Roger Quadros
2014-09-08 14:10 ` [PATCH 01/13] can: c_can_platform: Fix c_can_hw_raminit_ti() and add timeout Roger Quadros
2014-09-08 14:10   ` Roger Quadros
2014-09-08 14:10 ` [PATCH 02/13] net: can: c_can: Add syscon/regmap RAMINIT mechanism Roger Quadros
2014-09-08 14:10   ` Roger Quadros
2014-09-08 14:10 ` [PATCH 03/13] net: can: c_can: Add support for START pulse in RAMINIT sequence Roger Quadros
2014-09-08 14:10   ` Roger Quadros
2014-09-08 14:10 ` [PATCH 04/13] ARM: dts: dra7: Add syscon regmap for CORE CONTROL area Roger Quadros
2014-09-08 14:10   ` Roger Quadros
2014-09-08 17:47   ` Tony Lindgren
2014-09-08 17:47     ` Tony Lindgren
2014-09-08 14:10 ` [PATCH 05/13] ARM: dts: DRA7: Add DCAN nodes Roger Quadros
2014-09-08 14:10   ` Roger Quadros
2014-09-08 16:40   ` Sergei Shtylyov
2014-09-08 16:40     ` Sergei Shtylyov
2014-09-09  8:30     ` Roger Quadros [this message]
2014-09-09  8:30       ` Roger Quadros
2014-09-09  8:34       ` Marc Kleine-Budde
2014-09-09  8:34         ` Marc Kleine-Budde
2014-09-09  8:37         ` Roger Quadros
2014-09-09  8:37           ` Roger Quadros
2014-09-08 14:10 ` [PATCH 06/13] ARM: dts: dra7-evm: Add CAN support Roger Quadros
2014-09-08 14:10   ` Roger Quadros
2014-09-08 14:10 ` [PATCH 07/13] ARM: dts: dra72-evm: " Roger Quadros
2014-09-08 14:10   ` Roger Quadros
2014-09-08 14:10 ` [PATCH 08/13] arm: dts: am4372: Add dcan nodes Roger Quadros
2014-09-08 14:10   ` Roger Quadros
2014-09-08 14:10 ` [PATCH 09/13] ARM: dts: AM43xx: Add aliases to d_can nodes Roger Quadros
2014-09-08 14:10   ` Roger Quadros
2014-09-08 14:10 ` [PATCH 10/13] arm: dts: am437x-gp: Add dcan support Roger Quadros
2014-09-08 14:10   ` Roger Quadros
2014-09-08 14:10 ` [PATCH 11/13] ARM: dts: am437x-gp-evm: Add pinctrl sleep states for dcan pins Roger Quadros
2014-09-08 14:10   ` Roger Quadros
2014-09-08 14:10 ` [PATCH 12/13] ARM: dts: am4372: Add control module syscon node Roger Quadros
2014-09-08 14:10   ` Roger Quadros
2014-09-08 14:10 ` [PATCH 13/13] ARM: dts: am4372: Add dcan raminit bits Roger Quadros
2014-09-08 14:10   ` Roger Quadros

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