All of lore.kernel.org
 help / color / mirror / Atom feed
* [U-Boot] [PATCH] imx: imx6q/dlsabreauto: Add PMIC Pfuze100 support
@ 2014-09-10  5:52 Ye.Li
  2014-09-12  8:17 ` Stefano Babic
  0 siblings, 1 reply; 4+ messages in thread
From: Ye.Li @ 2014-09-10  5:52 UTC (permalink / raw)
  To: u-boot

Initialize the Pfuze100 at board late init.

Signed-off-by: Ye.Li <B37916@freescale.com>
---
 board/freescale/mx6qsabreauto/mx6qsabreauto.c |   52 ++++++++++++++++++++++++-
 include/configs/mx6qsabreauto.h               |    6 +++
 2 files changed, 57 insertions(+), 1 deletions(-)

diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index bfb9b6a..76b024b 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2012-2014 Freescale Semiconductor, Inc.
  *
  * Author: Fabio Estevam <fabio.estevam@freescale.com>
  *
@@ -23,6 +23,8 @@
 #include <netdev.h>
 #include <asm/arch/sys_proto.h>
 #include <i2c.h>
+#include <power/pmic.h>
+#include <power/pfuze100_pmic.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -43,6 +45,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 
+#define I2C_PMIC	1
+
 int dram_init(void)
 {
 	gd->ram_size = (phys_size_t)CONFIG_DDR_MB * 1024 * 1024;
@@ -259,6 +263,51 @@ int board_init(void)
 	return 0;
 }
 
+static int pfuze_init(void)
+{
+	struct pmic *p;
+	int ret;
+	unsigned int reg;
+
+	ret = power_pfuze100_init(I2C_PMIC);
+	if (ret)
+		return ret;
+
+	p = pmic_get("PFUZE100");
+	ret = pmic_probe(p);
+	if (ret)
+		return ret;
+
+	pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
+	printf("PMIC:  PFUZE100 ID=0x%02x\n", reg);
+
+	/* Set SW1AB stanby volage to 0.975V */
+	pmic_reg_read(p, PFUZE100_SW1ABSTBY, &reg);
+	reg &= ~0x3f;
+	reg |= 0x1b;
+	pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
+
+	/* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
+	pmic_reg_read(p, PUZE_100_SW1ABCONF, &reg);
+	reg &= ~0xc0;
+	reg |= 0x40;
+	pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
+
+	/* Set SW1C standby voltage to 0.975V */
+	pmic_reg_read(p, PFUZE100_SW1CSTBY, &reg);
+	reg &= ~0x3f;
+	reg |= 0x1b;
+	pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
+
+	/* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
+	pmic_reg_read(p, PFUZE100_SW1CCONF, &reg);
+	reg &= ~0xc0;
+	reg |= 0x40;
+	pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
+
+	return 0;
+}
+
 #ifdef CONFIG_CMD_BMODE
 static const struct boot_mode board_boot_modes[] = {
 	/* 4 bit bus width */
@@ -272,6 +321,7 @@ int board_late_init(void)
 #ifdef CONFIG_CMD_BMODE
 	add_board_boot_modes(board_boot_modes);
 #endif
+	pfuze_init();
 
 	return 0;
 }
diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index e8580e6..d82563f 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -40,6 +40,12 @@
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_SPEED		100000
 
+/* PMIC */
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_PFUZE100
+#define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
+
 #define CONFIG_OF_SEPARATE
 #define CONFIG_DEFAULT_DEVICE_TREE   imx6q-sabreauto
 
-- 
1.7.4.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH] imx: imx6q/dlsabreauto: Add PMIC Pfuze100 support
  2014-09-10  5:52 [U-Boot] [PATCH] imx: imx6q/dlsabreauto: Add PMIC Pfuze100 support Ye.Li
@ 2014-09-12  8:17 ` Stefano Babic
  2014-09-12 10:27   ` Li Ye-B37916
  0 siblings, 1 reply; 4+ messages in thread
From: Stefano Babic @ 2014-09-12  8:17 UTC (permalink / raw)
  To: u-boot

Hi Ye,

On 10/09/2014 07:52, Ye.Li wrote:
> Initialize the Pfuze100 at board late init.
> 
> Signed-off-by: Ye.Li <B37916@freescale.com>
> ---
>  board/freescale/mx6qsabreauto/mx6qsabreauto.c |   52 ++++++++++++++++++++++++-
>  include/configs/mx6qsabreauto.h               |    6 +++
>  2 files changed, 57 insertions(+), 1 deletions(-)
> 
> diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
> index bfb9b6a..76b024b 100644
> --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
> +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
> @@ -1,5 +1,5 @@
>  /*
> - * Copyright (C) 2012 Freescale Semiconductor, Inc.
> + * Copyright (C) 2012-2014 Freescale Semiconductor, Inc.
>   *
>   * Author: Fabio Estevam <fabio.estevam@freescale.com>
>   *
> @@ -23,6 +23,8 @@
>  #include <netdev.h>
>  #include <asm/arch/sys_proto.h>
>  #include <i2c.h>
> +#include <power/pmic.h>
> +#include <power/pfuze100_pmic.h>
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> @@ -43,6 +45,8 @@ DECLARE_GLOBAL_DATA_PTR;
>  
>  #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
>  
> +#define I2C_PMIC	1
> +
>  int dram_init(void)
>  {
>  	gd->ram_size = (phys_size_t)CONFIG_DDR_MB * 1024 * 1024;
> @@ -259,6 +263,51 @@ int board_init(void)
>  	return 0;
>  }
>  
> +static int pfuze_init(void)
> +{
> +	struct pmic *p;
> +	int ret;
> +	unsigned int reg;
> +
> +	ret = power_pfuze100_init(I2C_PMIC);
> +	if (ret)
> +		return ret;
> +
> +	p = pmic_get("PFUZE100");
> +	ret = pmic_probe(p);
> +	if (ret)
> +		return ret;
> +
> +	pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
> +	printf("PMIC:  PFUZE100 ID=0x%02x\n", reg);
> +
> +	/* Set SW1AB stanby volage to 0.975V */
> +	pmic_reg_read(p, PFUZE100_SW1ABSTBY, &reg);
> +	reg &= ~0x3f;
> +	reg |= 0x1b;
> +	pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
> +
> +	/* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
> +	pmic_reg_read(p, PUZE_100_SW1ABCONF, &reg);
> +	reg &= ~0xc0;
> +	reg |= 0x40;
> +	pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
> +
> +	/* Set SW1C standby voltage to 0.975V */
> +	pmic_reg_read(p, PFUZE100_SW1CSTBY, &reg);
> +	reg &= ~0x3f;
> +	reg |= 0x1b;
> +	pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
> +
> +	/* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
> +	pmic_reg_read(p, PFUZE100_SW1CCONF, &reg);
> +	reg &= ~0xc0;
> +	reg |= 0x40;
> +	pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
> +
> +	return 0;
> +}

The initialization, with the exception of VGEN3/VGEN5, is identical to
the sabresd. Any possibility to improve code and factorize the function
for sabre* boards ?

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH] imx: imx6q/dlsabreauto: Add PMIC Pfuze100 support
  2014-09-12  8:17 ` Stefano Babic
@ 2014-09-12 10:27   ` Li Ye-B37916
  2014-09-12 10:37     ` Stefano Babic
  0 siblings, 1 reply; 4+ messages in thread
From: Li Ye-B37916 @ 2014-09-12 10:27 UTC (permalink / raw)
  To: u-boot


On 9/12/2014 4:17 PM, Stefano Babic wrote:
> Hi Ye,
>
> On 10/09/2014 07:52, Ye.Li wrote:
>> Initialize the Pfuze100 at board late init.
>>
>> Signed-off-by: Ye.Li <B37916@freescale.com>
>> ---
>>  board/freescale/mx6qsabreauto/mx6qsabreauto.c |   52 ++++++++++++++++++++++++-
>>  include/configs/mx6qsabreauto.h               |    6 +++
>>  2 files changed, 57 insertions(+), 1 deletions(-)
>>
>> diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
>> index bfb9b6a..76b024b 100644
>> --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
>> +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
>> @@ -1,5 +1,5 @@
>>  /*
>> - * Copyright (C) 2012 Freescale Semiconductor, Inc.
>> + * Copyright (C) 2012-2014 Freescale Semiconductor, Inc.
>>   *
>>   * Author: Fabio Estevam <fabio.estevam@freescale.com>
>>   *
>> @@ -23,6 +23,8 @@
>>  #include <netdev.h>
>>  #include <asm/arch/sys_proto.h>
>>  #include <i2c.h>
>> +#include <power/pmic.h>
>> +#include <power/pfuze100_pmic.h>
>>  
>>  DECLARE_GLOBAL_DATA_PTR;
>>  
>> @@ -43,6 +45,8 @@ DECLARE_GLOBAL_DATA_PTR;
>>  
>>  #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
>>  
>> +#define I2C_PMIC	1
>> +
>>  int dram_init(void)
>>  {
>>  	gd->ram_size = (phys_size_t)CONFIG_DDR_MB * 1024 * 1024;
>> @@ -259,6 +263,51 @@ int board_init(void)
>>  	return 0;
>>  }
>>  
>> +static int pfuze_init(void)
>> +{
>> +	struct pmic *p;
>> +	int ret;
>> +	unsigned int reg;
>> +
>> +	ret = power_pfuze100_init(I2C_PMIC);
>> +	if (ret)
>> +		return ret;
>> +
>> +	p = pmic_get("PFUZE100");
>> +	ret = pmic_probe(p);
>> +	if (ret)
>> +		return ret;
>> +
>> +	pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
>> +	printf("PMIC:  PFUZE100 ID=0x%02x\n", reg);
>> +
>> +	/* Set SW1AB stanby volage to 0.975V */
>> +	pmic_reg_read(p, PFUZE100_SW1ABSTBY, &reg);
>> +	reg &= ~0x3f;
>> +	reg |= 0x1b;
>> +	pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
>> +
>> +	/* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
>> +	pmic_reg_read(p, PUZE_100_SW1ABCONF, &reg);
>> +	reg &= ~0xc0;
>> +	reg |= 0x40;
>> +	pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
>> +
>> +	/* Set SW1C standby voltage to 0.975V */
>> +	pmic_reg_read(p, PFUZE100_SW1CSTBY, &reg);
>> +	reg &= ~0x3f;
>> +	reg |= 0x1b;
>> +	pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
>> +
>> +	/* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
>> +	pmic_reg_read(p, PFUZE100_SW1CCONF, &reg);
>> +	reg &= ~0xc0;
>> +	reg |= 0x40;
>> +	pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
>> +
>> +	return 0;
>> +}
> The initialization, with the exception of VGEN3/VGEN5, is identical to
> the sabresd. Any possibility to improve code and factorize the function
> for sabre* boards ?
>
> Best regards,
> Stefano Babic
>
Yes. The pfuze codes are similar on these boards. I will try to factorize the function. How about moving the common codes to "board/freescale/imx" ?

Best regards,
Ye Li

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH] imx: imx6q/dlsabreauto: Add PMIC Pfuze100 support
  2014-09-12 10:27   ` Li Ye-B37916
@ 2014-09-12 10:37     ` Stefano Babic
  0 siblings, 0 replies; 4+ messages in thread
From: Stefano Babic @ 2014-09-12 10:37 UTC (permalink / raw)
  To: u-boot

Hi Ye,

On 12/09/2014 12:27, Li Ye-B37916 wrote:
> 
> On 9/12/2014 4:17 PM, Stefano Babic wrote:
>> Hi Ye,
>>
>> On 10/09/2014 07:52, Ye.Li wrote:
>>> Initialize the Pfuze100 at board late init.
>>>
>>> Signed-off-by: Ye.Li <B37916@freescale.com>
>>> ---
>>>  board/freescale/mx6qsabreauto/mx6qsabreauto.c |   52 ++++++++++++++++++++++++-
>>>  include/configs/mx6qsabreauto.h               |    6 +++
>>>  2 files changed, 57 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
>>> index bfb9b6a..76b024b 100644
>>> --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
>>> +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
>>> @@ -1,5 +1,5 @@
>>>  /*
>>> - * Copyright (C) 2012 Freescale Semiconductor, Inc.
>>> + * Copyright (C) 2012-2014 Freescale Semiconductor, Inc.
>>>   *
>>>   * Author: Fabio Estevam <fabio.estevam@freescale.com>
>>>   *
>>> @@ -23,6 +23,8 @@
>>>  #include <netdev.h>
>>>  #include <asm/arch/sys_proto.h>
>>>  #include <i2c.h>
>>> +#include <power/pmic.h>
>>> +#include <power/pfuze100_pmic.h>
>>>  
>>>  DECLARE_GLOBAL_DATA_PTR;
>>>  
>>> @@ -43,6 +45,8 @@ DECLARE_GLOBAL_DATA_PTR;
>>>  
>>>  #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
>>>  
>>> +#define I2C_PMIC	1
>>> +
>>>  int dram_init(void)
>>>  {
>>>  	gd->ram_size = (phys_size_t)CONFIG_DDR_MB * 1024 * 1024;
>>> @@ -259,6 +263,51 @@ int board_init(void)
>>>  	return 0;
>>>  }
>>>  
>>> +static int pfuze_init(void)
>>> +{
>>> +	struct pmic *p;
>>> +	int ret;
>>> +	unsigned int reg;
>>> +
>>> +	ret = power_pfuze100_init(I2C_PMIC);
>>> +	if (ret)
>>> +		return ret;
>>> +
>>> +	p = pmic_get("PFUZE100");
>>> +	ret = pmic_probe(p);
>>> +	if (ret)
>>> +		return ret;
>>> +
>>> +	pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
>>> +	printf("PMIC:  PFUZE100 ID=0x%02x\n", reg);
>>> +
>>> +	/* Set SW1AB stanby volage to 0.975V */
>>> +	pmic_reg_read(p, PFUZE100_SW1ABSTBY, &reg);
>>> +	reg &= ~0x3f;
>>> +	reg |= 0x1b;
>>> +	pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
>>> +
>>> +	/* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
>>> +	pmic_reg_read(p, PUZE_100_SW1ABCONF, &reg);
>>> +	reg &= ~0xc0;
>>> +	reg |= 0x40;
>>> +	pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
>>> +
>>> +	/* Set SW1C standby voltage to 0.975V */
>>> +	pmic_reg_read(p, PFUZE100_SW1CSTBY, &reg);
>>> +	reg &= ~0x3f;
>>> +	reg |= 0x1b;
>>> +	pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
>>> +
>>> +	/* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
>>> +	pmic_reg_read(p, PFUZE100_SW1CCONF, &reg);
>>> +	reg &= ~0xc0;
>>> +	reg |= 0x40;
>>> +	pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
>>> +
>>> +	return 0;
>>> +}
>> The initialization, with the exception of VGEN3/VGEN5, is identical to
>> the sabresd. Any possibility to improve code and factorize the function
>> for sabre* boards ?
>>
>> Best regards,
>> Stefano Babic
>>
> Yes. The pfuze codes are similar on these boards. I will try to factorize the function. How about moving the common codes to "board/freescale/imx" ?
> 

Agree. The imx directory can contain all common code shared among
Freescale's board.

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2014-09-12 10:37 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-09-10  5:52 [U-Boot] [PATCH] imx: imx6q/dlsabreauto: Add PMIC Pfuze100 support Ye.Li
2014-09-12  8:17 ` Stefano Babic
2014-09-12 10:27   ` Li Ye-B37916
2014-09-12 10:37     ` Stefano Babic

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.