* [PATCH] VMX: don't unintentionally leave x2APIC MSR intercepts disabled
@ 2014-09-15 16:09 Jan Beulich
2014-09-15 19:44 ` Tian, Kevin
0 siblings, 1 reply; 2+ messages in thread
From: Jan Beulich @ 2014-09-15 16:09 UTC (permalink / raw)
To: xen-devel; +Cc: Kevin Tian, Eddie Dong, Jun Nakajima
[-- Attachment #1: Type: text/plain, Size: 1755 bytes --]
These should be re-enabled in particular when the virtualized APIC
transitions to HW-disabled state.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -2167,6 +2167,7 @@ void vmx_vlapic_msr_changed(struct vcpu
{
int virtualize_x2apic_mode;
struct vlapic *vlapic = vcpu_vlapic(v);
+ unsigned int msr;
virtualize_x2apic_mode = ( (cpu_has_vmx_apic_reg_virt ||
cpu_has_vmx_virtual_intr_delivery) &&
@@ -2183,8 +2184,6 @@ void vmx_vlapic_msr_changed(struct vcpu
if ( !vlapic_hw_disabled(vlapic) &&
(vlapic_base_address(vlapic) == APIC_DEFAULT_PHYS_BASE) )
{
- unsigned int msr;
-
if ( virtualize_x2apic_mode && vlapic_x2apic_mode(vlapic) )
{
v->arch.hvm_vmx.secondary_exec_control |=
@@ -2213,15 +2212,15 @@ void vmx_vlapic_msr_changed(struct vcpu
}
}
else
- {
v->arch.hvm_vmx.secondary_exec_control |=
SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
- for ( msr = MSR_IA32_APICBASE_MSR;
- msr <= MSR_IA32_APICBASE_MSR + 0xff; msr++ )
- vmx_enable_intercept_for_msr(v, msr,
- MSR_TYPE_R | MSR_TYPE_W);
- }
}
+ if ( !(v->arch.hvm_vmx.secondary_exec_control &
+ SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE) )
+ for ( msr = MSR_IA32_APICBASE_MSR;
+ msr <= MSR_IA32_APICBASE_MSR + 0xff; msr++ )
+ vmx_enable_intercept_for_msr(v, msr, MSR_TYPE_R | MSR_TYPE_W);
+
vmx_update_secondary_exec_control(v);
vmx_vmcs_exit(v);
}
[-- Attachment #2: VMX-x2APIC-MSR-intercept.patch --]
[-- Type: text/plain, Size: 1816 bytes --]
VMX: don't unintentionally leave x2APIC MSR intercepts disabled
These should be re-enabled in particular when the virtualized APIC
transitions to HW-disabled state.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -2167,6 +2167,7 @@ void vmx_vlapic_msr_changed(struct vcpu
{
int virtualize_x2apic_mode;
struct vlapic *vlapic = vcpu_vlapic(v);
+ unsigned int msr;
virtualize_x2apic_mode = ( (cpu_has_vmx_apic_reg_virt ||
cpu_has_vmx_virtual_intr_delivery) &&
@@ -2183,8 +2184,6 @@ void vmx_vlapic_msr_changed(struct vcpu
if ( !vlapic_hw_disabled(vlapic) &&
(vlapic_base_address(vlapic) == APIC_DEFAULT_PHYS_BASE) )
{
- unsigned int msr;
-
if ( virtualize_x2apic_mode && vlapic_x2apic_mode(vlapic) )
{
v->arch.hvm_vmx.secondary_exec_control |=
@@ -2213,15 +2212,15 @@ void vmx_vlapic_msr_changed(struct vcpu
}
}
else
- {
v->arch.hvm_vmx.secondary_exec_control |=
SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
- for ( msr = MSR_IA32_APICBASE_MSR;
- msr <= MSR_IA32_APICBASE_MSR + 0xff; msr++ )
- vmx_enable_intercept_for_msr(v, msr,
- MSR_TYPE_R | MSR_TYPE_W);
- }
}
+ if ( !(v->arch.hvm_vmx.secondary_exec_control &
+ SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE) )
+ for ( msr = MSR_IA32_APICBASE_MSR;
+ msr <= MSR_IA32_APICBASE_MSR + 0xff; msr++ )
+ vmx_enable_intercept_for_msr(v, msr, MSR_TYPE_R | MSR_TYPE_W);
+
vmx_update_secondary_exec_control(v);
vmx_vmcs_exit(v);
}
[-- Attachment #3: Type: text/plain, Size: 126 bytes --]
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^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] VMX: don't unintentionally leave x2APIC MSR intercepts disabled
2014-09-15 16:09 [PATCH] VMX: don't unintentionally leave x2APIC MSR intercepts disabled Jan Beulich
@ 2014-09-15 19:44 ` Tian, Kevin
0 siblings, 0 replies; 2+ messages in thread
From: Tian, Kevin @ 2014-09-15 19:44 UTC (permalink / raw)
To: Jan Beulich, xen-devel; +Cc: Dong, Eddie, Nakajima, Jun
> From: Jan Beulich [mailto:JBeulich@suse.com]
> Sent: Monday, September 15, 2014 9:10 AM
>
> These should be re-enabled in particular when the virtualized APIC
> transitions to HW-disabled state.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
>
> --- a/xen/arch/x86/hvm/vmx/vmx.c
> +++ b/xen/arch/x86/hvm/vmx/vmx.c
> @@ -2167,6 +2167,7 @@ void vmx_vlapic_msr_changed(struct vcpu
> {
> int virtualize_x2apic_mode;
> struct vlapic *vlapic = vcpu_vlapic(v);
> + unsigned int msr;
>
> virtualize_x2apic_mode = ( (cpu_has_vmx_apic_reg_virt ||
> cpu_has_vmx_virtual_intr_delivery)
> &&
> @@ -2183,8 +2184,6 @@ void vmx_vlapic_msr_changed(struct vcpu
> if ( !vlapic_hw_disabled(vlapic) &&
> (vlapic_base_address(vlapic) == APIC_DEFAULT_PHYS_BASE) )
> {
> - unsigned int msr;
> -
> if ( virtualize_x2apic_mode && vlapic_x2apic_mode(vlapic) )
> {
> v->arch.hvm_vmx.secondary_exec_control |=
> @@ -2213,15 +2212,15 @@ void vmx_vlapic_msr_changed(struct vcpu
> }
> }
> else
> - {
> v->arch.hvm_vmx.secondary_exec_control |=
> SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
> - for ( msr = MSR_IA32_APICBASE_MSR;
> - msr <= MSR_IA32_APICBASE_MSR + 0xff; msr++ )
> - vmx_enable_intercept_for_msr(v, msr,
> - MSR_TYPE_R |
> MSR_TYPE_W);
> - }
> }
> + if ( !(v->arch.hvm_vmx.secondary_exec_control &
> + SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE) )
> + for ( msr = MSR_IA32_APICBASE_MSR;
> + msr <= MSR_IA32_APICBASE_MSR + 0xff; msr++ )
> + vmx_enable_intercept_for_msr(v, msr, MSR_TYPE_R |
> MSR_TYPE_W);
> +
> vmx_update_secondary_exec_control(v);
> vmx_vmcs_exit(v);
> }
>
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2014-09-15 16:09 [PATCH] VMX: don't unintentionally leave x2APIC MSR intercepts disabled Jan Beulich
2014-09-15 19:44 ` Tian, Kevin
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