From: Kever Yang <kever.yang@rock-chips.com> To: Doug Anderson <dianders@chromium.org> Cc: "Tao Huang" <huangtao@rock-chips.com>, "Addy Ke" <addy.ke@rock-chips.com>, "Mike Turquette" <mturquette@linaro.org>, "Heiko Stübner" <heiko@sntech.de>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, linux-rockchip@lists.infradead.org, "Jianqun Xu" <xjq@rock-chips.com>, "Eddie Cai" <cf@rock-chips.com>, "han jiang" <hj@rock-chips.com>, "Sonny Rao" <sonnyrao@chromium.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH v2 3/3] clk: rockchip: add clock node in PD_VIDEO Date: Thu, 25 Sep 2014 09:28:14 +0800 [thread overview] Message-ID: <54236FAE.5090903@rock-chips.com> (raw) In-Reply-To: <CAD=FV=UqB26_GzP14ueHHpmjgJqX7sPpR0T+SR60e=i_YbWitQ@mail.gmail.com> Hi Doug, On 09/25/2014 03:48 AM, Doug Anderson wrote: > Kever, > > On Wed, Sep 24, 2014 at 8:33 AM, Kever Yang <kever.yang@rock-chips.com> wrote: >> This patch add the clock node in PD_VIDEO >> >> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> >> Reviewed-by: Heiko Stuebner <heiko@sntech.de> >> --- >> >> Changes in v2: >> - split out the patch >> >> drivers/clk/rockchip/clk-rk3288.c | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c >> index d691a56..2cfcfb6 100644 >> --- a/drivers/clk/rockchip/clk-rk3288.c >> +++ b/drivers/clk/rockchip/clk-rk3288.c >> @@ -296,6 +296,17 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { >> COMPOSITE(0, "aclk_vdpu", mux_pll_src_cpll_gpll_usb480m_p, 0, >> RK3288_CLKSEL_CON(32), 14, 2, MFLAGS, 8, 5, DFLAGS, >> RK3288_CLKGATE_CON(3), 11, GFLAGS), >> + /* >> + * We use aclk_vdpu by default GRF_SOC_CON0[7] setting in system, >> + * so we ignore the mux and make clocks nodes as following, > I guess we can't add the mux for now because it's in the GRF and not > in the clock area and the current clock tables don't have support for > that. I guess that OK for now, but eventually we should probably add > it in. The mux setting moved to GRF because it switch the clock source and some other controller logic. The VCODEC can be used as encoder or decoder, we use it as decoder by default, so I guess we can ignore the decoder part before the clock module can handle this. > > >> + * NOTE THAT hclk_vcodec is fix div by 4 from aclk_vcodec_pre. > Typo: from "aclk_vcodec_pre" or from "hclk_vcodec_pre"? hclk_vcodec_pre is /4 from aclk_vcodec_pre, and hclk_vcodec has a gate from hclk_vcodec_pre. I should fix this. > >> + */ >> + GATE(ACLK_VCODEC, "aclk_vcodec", "aclk_vdpu", 0, >> + RK3288_CLKGATE_CON(9), 0, GFLAGS), >> + GATE(0, "hclk_vcodec_pre", "aclk_vdpu", 0, >> + RK3288_CLKGATE_CON(3), 10, GFLAGS), >> + GATE(HCLK_VCODEC, "hclk_vcodec", "hclk_vcodec_pre", 0, >> + RK3288_CLKGATE_CON(9), 1, GFLAGS), > Shouldn't there be a fixed "/ 4" clock somewhere in here? That way > the clock rate will be reported correctly? > > I guess the cleanest would be to add support to rockchip/clk.c to call > clk_register_fixed_factor() somehow. I guess I'll leave it to you and > Heiko to decide what you want to do here. There is a fixed "/4" that not add to this tree, which makes we get a 4 times of real rate when we get the HCLK_VCODEC, that is why I write a commend with "NOTE THAT" before. I know there is a clk_register_fixed_factor(), but I'm not sure how to use it here, this is a table. I'll try to add the clk_register_fixed_factor() today. -Kever
WARNING: multiple messages have this Message-ID (diff)
From: kever.yang@rock-chips.com (Kever Yang) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 3/3] clk: rockchip: add clock node in PD_VIDEO Date: Thu, 25 Sep 2014 09:28:14 +0800 [thread overview] Message-ID: <54236FAE.5090903@rock-chips.com> (raw) In-Reply-To: <CAD=FV=UqB26_GzP14ueHHpmjgJqX7sPpR0T+SR60e=i_YbWitQ@mail.gmail.com> Hi Doug, On 09/25/2014 03:48 AM, Doug Anderson wrote: > Kever, > > On Wed, Sep 24, 2014 at 8:33 AM, Kever Yang <kever.yang@rock-chips.com> wrote: >> This patch add the clock node in PD_VIDEO >> >> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> >> Reviewed-by: Heiko Stuebner <heiko@sntech.de> >> --- >> >> Changes in v2: >> - split out the patch >> >> drivers/clk/rockchip/clk-rk3288.c | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c >> index d691a56..2cfcfb6 100644 >> --- a/drivers/clk/rockchip/clk-rk3288.c >> +++ b/drivers/clk/rockchip/clk-rk3288.c >> @@ -296,6 +296,17 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { >> COMPOSITE(0, "aclk_vdpu", mux_pll_src_cpll_gpll_usb480m_p, 0, >> RK3288_CLKSEL_CON(32), 14, 2, MFLAGS, 8, 5, DFLAGS, >> RK3288_CLKGATE_CON(3), 11, GFLAGS), >> + /* >> + * We use aclk_vdpu by default GRF_SOC_CON0[7] setting in system, >> + * so we ignore the mux and make clocks nodes as following, > I guess we can't add the mux for now because it's in the GRF and not > in the clock area and the current clock tables don't have support for > that. I guess that OK for now, but eventually we should probably add > it in. The mux setting moved to GRF because it switch the clock source and some other controller logic. The VCODEC can be used as encoder or decoder, we use it as decoder by default, so I guess we can ignore the decoder part before the clock module can handle this. > > >> + * NOTE THAT hclk_vcodec is fix div by 4 from aclk_vcodec_pre. > Typo: from "aclk_vcodec_pre" or from "hclk_vcodec_pre"? hclk_vcodec_pre is /4 from aclk_vcodec_pre, and hclk_vcodec has a gate from hclk_vcodec_pre. I should fix this. > >> + */ >> + GATE(ACLK_VCODEC, "aclk_vcodec", "aclk_vdpu", 0, >> + RK3288_CLKGATE_CON(9), 0, GFLAGS), >> + GATE(0, "hclk_vcodec_pre", "aclk_vdpu", 0, >> + RK3288_CLKGATE_CON(3), 10, GFLAGS), >> + GATE(HCLK_VCODEC, "hclk_vcodec", "hclk_vcodec_pre", 0, >> + RK3288_CLKGATE_CON(9), 1, GFLAGS), > Shouldn't there be a fixed "/ 4" clock somewhere in here? That way > the clock rate will be reported correctly? > > I guess the cleanest would be to add support to rockchip/clk.c to call > clk_register_fixed_factor() somehow. I guess I'll leave it to you and > Heiko to decide what you want to do here. There is a fixed "/4" that not add to this tree, which makes we get a 4 times of real rate when we get the HCLK_VCODEC, that is why I write a commend with "NOTE THAT" before. I know there is a clk_register_fixed_factor(), but I'm not sure how to use it here, this is a table. I'll try to add the clk_register_fixed_factor() today. -Kever
next prev parent reply other threads:[~2014-09-25 1:28 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-09-24 15:33 [PATCH v2 0/3] Add clock binding id for rk3288 Kever Yang 2014-09-24 15:33 ` Kever Yang 2014-09-24 15:33 ` Kever Yang 2014-09-24 15:33 ` [PATCH v2 1/3] clk: rockchip: add some needed " Kever Yang 2014-09-24 17:56 ` Doug Anderson 2014-09-24 17:56 ` Doug Anderson 2014-09-24 15:33 ` [PATCH v2 2/3] clk: rockchip: use the clock id for nodes init Kever Yang 2014-09-24 15:33 ` Kever Yang 2014-09-24 17:57 ` Doug Anderson 2014-09-24 17:57 ` Doug Anderson 2014-09-24 15:33 ` [PATCH v2 3/3] clk: rockchip: add clock node in PD_VIDEO Kever Yang 2014-09-24 15:33 ` Kever Yang 2014-09-24 19:48 ` Doug Anderson 2014-09-24 19:48 ` Doug Anderson 2014-09-25 1:28 ` Kever Yang [this message] 2014-09-25 1:28 ` Kever Yang
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=54236FAE.5090903@rock-chips.com \ --to=kever.yang@rock-chips.com \ --cc=addy.ke@rock-chips.com \ --cc=cf@rock-chips.com \ --cc=dianders@chromium.org \ --cc=heiko@sntech.de \ --cc=hj@rock-chips.com \ --cc=huangtao@rock-chips.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-rockchip@lists.infradead.org \ --cc=mturquette@linaro.org \ --cc=sonnyrao@chromium.org \ --cc=xjq@rock-chips.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.