* [PATCH] drm/i915: Display current hangcheck status in debugfs
@ 2014-11-20 18:54 Chris Wilson
2014-11-20 19:13 ` Chris Wilson
2014-11-22 17:12 ` shuang.he
0 siblings, 2 replies; 5+ messages in thread
From: Chris Wilson @ 2014-11-20 18:54 UTC (permalink / raw)
To: intel-gfx; +Cc: Mika Kuoppala
For example,
/sys/kernel/debug/dri/0/i915_hangcheck_info:
Hangcheck active
render ring
seqno = 263844 [current 263960]
action = 2
score = 0
ACTHD = 12809590 [current 1280b5a8]
max ACTHD = 0
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index f91e7f7c92af..a944831d88ab 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1165,6 +1165,37 @@ out:
return ret;
}
+static int i915_hangcheck_info(struct seq_file *m, void *unused)
+{
+ struct drm_info_node *node = m->private;
+ struct drm_i915_private *dev_priv = to_i915(node->minor->dev);
+ struct intel_engine_cs *ring;
+ int ret, i;
+
+ if (!i915.enable_hangcheck) {
+ seq_printf(m, "Hangcheck disabled\n");
+ return 0;
+ }
+
+ seq_printf(m, "Hangcheck %s\n",
+ timer_pending(&dev_priv->gpu_error.hangcheck_timer) ? "active" : "inactive");
+
+ for_each_ring(ring, dev_priv, i) {
+ seq_printf(m, "%s\n", ring->name);
+ seq_printf(m, "\tseqno = %d [current %d]\n",
+ ring->hangcheck.seqno, ring->get_seqno(ring, false));
+ seq_printf(m, "\taction = %d\n", ring->hangcheck.action);
+ seq_printf(m, "\tscore = %d\n", ring->hangcheck.score);
+ seq_printf(m, "\tACTHD = %llx [current %llx]\n",
+ (long long)ring->hangcheck.acthd,
+ (long long)intel_ring_get_active_head(ring));
+ seq_printf(m, "\tmax ACTHD = %llx\n",
+ (long long)ring->hangcheck.max_acthd);
+ }
+
+ return 0;
+}
+
static int ironlake_drpc_info(struct seq_file *m)
{
struct drm_info_node *node = m->private;
@@ -4276,6 +4307,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
{"i915_gem_hws_vebox", i915_hws_info, 0, (void *)VECS},
{"i915_frequency_info", i915_frequency_info, 0},
+ {"i915_hangcheck_info", i915_hangcheck_info, 0},
{"i915_drpc_info", i915_drpc_info, 0},
{"i915_emon_status", i915_emon_status, 0},
{"i915_ring_freq_table", i915_ring_freq_table, 0},
--
2.1.3
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH] drm/i915: Display current hangcheck status in debugfs
2014-11-20 18:54 [PATCH] drm/i915: Display current hangcheck status in debugfs Chris Wilson
@ 2014-11-20 19:13 ` Chris Wilson
2014-11-21 15:36 ` Dave Gordon
2014-11-22 20:22 ` [PATCH] drm/i915: Display current hangcheck status in shuang.he
2014-11-22 17:12 ` shuang.he
1 sibling, 2 replies; 5+ messages in thread
From: Chris Wilson @ 2014-11-20 19:13 UTC (permalink / raw)
To: intel-gfx; +Cc: Mika Kuoppala
For example,
/sys/kernel/debug/dri/0/i915_hangcheck_info:
Hangcheck active, fires in 15887800ms
render ring:
seqno = -4059 [current -583]
action = 2
score = 0
ACTHD = 1ee8 [current 21f980]
max ACTHD = 0
v2: Include expiration ETA. Can anyone spot a problem?
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index f91e7f7c92af..8c8743dec20e 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1165,6 +1165,40 @@ out:
return ret;
}
+static int i915_hangcheck_info(struct seq_file *m, void *unused)
+{
+ struct drm_info_node *node = m->private;
+ struct drm_i915_private *dev_priv = to_i915(node->minor->dev);
+ struct intel_engine_cs *ring;
+ int i;
+
+ if (!i915.enable_hangcheck) {
+ seq_printf(m, "Hangcheck disabled\n");
+ return 0;
+ }
+
+ if (timer_pending(&dev_priv->gpu_error.hangcheck_timer)) {
+ seq_printf(m, "Hangcheck active, fires in %dms\n",
+ jiffies_to_msecs(dev_priv->gpu_error.hangcheck_timer.expires - jiffies));
+ } else
+ seq_printf(m, "Hangcheck inactive\n");
+
+ for_each_ring(ring, dev_priv, i) {
+ seq_printf(m, "%s:\n", ring->name);
+ seq_printf(m, "\tseqno = %d [current %d]\n",
+ ring->hangcheck.seqno, ring->get_seqno(ring, false));
+ seq_printf(m, "\taction = %d\n", ring->hangcheck.action);
+ seq_printf(m, "\tscore = %d\n", ring->hangcheck.score);
+ seq_printf(m, "\tACTHD = 0x%08llx [current 0x%08llx]\n",
+ (long long)ring->hangcheck.acthd,
+ (long long)intel_ring_get_active_head(ring));
+ seq_printf(m, "\tmax ACTHD = 0x%08llx\n",
+ (long long)ring->hangcheck.max_acthd);
+ }
+
+ return 0;
+}
+
static int ironlake_drpc_info(struct seq_file *m)
{
struct drm_info_node *node = m->private;
@@ -4276,6 +4310,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
{"i915_gem_hws_vebox", i915_hws_info, 0, (void *)VECS},
{"i915_frequency_info", i915_frequency_info, 0},
+ {"i915_hangcheck_info", i915_hangcheck_info, 0},
{"i915_drpc_info", i915_drpc_info, 0},
{"i915_emon_status", i915_emon_status, 0},
{"i915_ring_freq_table", i915_ring_freq_table, 0},
--
2.1.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: Display current hangcheck status in debugfs
2014-11-20 19:13 ` Chris Wilson
@ 2014-11-21 15:36 ` Dave Gordon
2014-11-22 20:22 ` [PATCH] drm/i915: Display current hangcheck status in shuang.he
1 sibling, 0 replies; 5+ messages in thread
From: Dave Gordon @ 2014-11-21 15:36 UTC (permalink / raw)
To: intel-gfx
On 20/11/14 19:13, Chris Wilson wrote:
> For example,
>
> /sys/kernel/debug/dri/0/i915_hangcheck_info:
>
> Hangcheck active, fires in 15887800ms
> render ring:
> seqno = -4059 [current -583]
> action = 2
> score = 0
> ACTHD = 1ee8 [current 21f980]
> max ACTHD = 0
>
> v2: Include expiration ETA. Can anyone spot a problem?
Well, the time-until-the-hangcheck-fires in your example above looks
pretty bogus -- over 4 hours until next check seems rather unlikely, not
to say useless. The seq_printf format should be %u rather than %d, but I
don't think that's really the reason.
[[ Aside: the signatures of the jiffy-converting functions are:
unsigned int jiffies_to_msecs(const unsigned long j);
unsigned int jiffies_to_usecs(const unsigned long j);
which don't seem very sensible, as
(a) they return a possibly-smaller type than their argument, despite
probably needing a larger numeric range (if HZ <= MSEC_PER_SEC, hence
interval-in-ms is a larger number than interval-in-jiffies, and even
more so for usec), and
(b) they're defined only for non-negative quantities, whereas time
intervals can meaningfully be signed. Even if jiffies are regarded as
unsigned-ticks-since-boot, the subtraction of two unsigned quantities
yields a signed difference, requiring extra checks if you don't know
whether a certain absolute time has passed or not.
(c) 'ktime_t's are so much nicer than jiffies ]]
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 35 +++++++++++++++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index f91e7f7c92af..8c8743dec20e 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1165,6 +1165,40 @@ out:
> return ret;
> }
>
> +static int i915_hangcheck_info(struct seq_file *m, void *unused)
> +{
> + struct drm_info_node *node = m->private;
> + struct drm_i915_private *dev_priv = to_i915(node->minor->dev);
> + struct intel_engine_cs *ring;
> + int i;
> +
> + if (!i915.enable_hangcheck) {
> + seq_printf(m, "Hangcheck disabled\n");
> + return 0;
> + }
> +
> + if (timer_pending(&dev_priv->gpu_error.hangcheck_timer)) {
> + seq_printf(m, "Hangcheck active, fires in %dms\n",
> + jiffies_to_msecs(dev_priv->gpu_error.hangcheck_timer.expires - jiffies));
> + } else
> + seq_printf(m, "Hangcheck inactive\n");
> +
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: Display current hangcheck status in
2014-11-20 18:54 [PATCH] drm/i915: Display current hangcheck status in debugfs Chris Wilson
2014-11-20 19:13 ` Chris Wilson
@ 2014-11-22 17:12 ` shuang.he
1 sibling, 0 replies; 5+ messages in thread
From: shuang.he @ 2014-11-22 17:12 UTC (permalink / raw)
To: shuang.he, intel-gfx, chris
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 367/367 367/367
ILK -2 373/375 371/375
SNB 450/450 450/450
IVB -1 502/503 501/503
BYT 289/289 289/289
HSW -4 567/567 563/567
BDW 417/417 417/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
ILK igt_kms_flip_flip-vs-dpms DMESG_WARN(1, M26)PASS(1, M37) DMESG_WARN(1, M26)
ILK igt_kms_flip_rcs-flip-vs-panning DMESG_WARN(1, M26)PASS(1, M37) DMESG_WARN(1, M26)
IVB igt_gem_bad_reloc_negative-reloc-lut NSPT(3, M21M34M4)PASS(1, M21) NSPT(2, M4)
HSW igt_gem_bad_reloc_negative-reloc-lut NSPT(3, M40M20)PASS(1, M20) NSPT(1, M20)
HSW igt_kms_rotation_crc_primary-rotation PASS(4, M20M40) DMESG_WARN(1, M20)
HSW igt_pm_rc6_residency_rc6-accuracy PASS(4, M20M40) FAIL(1, M20)
HSW igt_pm_rpm_debugfs-read PASS(3, M20M40) DMESG_WARN(1, M20)
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: Display current hangcheck status in
2014-11-20 19:13 ` Chris Wilson
2014-11-21 15:36 ` Dave Gordon
@ 2014-11-22 20:22 ` shuang.he
1 sibling, 0 replies; 5+ messages in thread
From: shuang.he @ 2014-11-22 20:22 UTC (permalink / raw)
To: shuang.he, intel-gfx, chris
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 367/367 367/367
ILK 373/375 373/375
SNB 450/450 450/450
IVB -1 502/503 501/503
BYT 289/289 289/289
HSW -4 567/567 563/567
BDW 417/417 417/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
IVB igt_gem_bad_reloc_negative-reloc-lut NSPT(3, M21M34M4)PASS(1, M21) NSPT(2, M21)
HSW igt_gem_bad_reloc_negative-reloc-lut NSPT(6, M40M20)PASS(1, M20) NSPT(1, M40)
HSW igt_kms_rotation_crc_primary-rotation PASS(7, M20M40) DMESG_WARN(1, M40)
HSW igt_pm_rc6_residency_rc6-accuracy PASS(7, M20M40) FAIL(1, M40)
HSW igt_pm_rpm_debugfs-read PASS(3, M20M40) DMESG_WARN(1, M40)
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2014-11-22 20:22 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2014-11-20 18:54 [PATCH] drm/i915: Display current hangcheck status in debugfs Chris Wilson
2014-11-20 19:13 ` Chris Wilson
2014-11-21 15:36 ` Dave Gordon
2014-11-22 20:22 ` [PATCH] drm/i915: Display current hangcheck status in shuang.he
2014-11-22 17:12 ` shuang.he
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