[PATCH 00/22] new radeon info queries

[PATCH 00/22] new radeon info queries

[Alex Deucher]

This patch set implements a number of new
radeon info ioctl queries to support additional
profiling parameters for things like the GALLIUM
HUD.  It could also be used by apps like radeontop
to query the status registers, etc. without requiring
root privileges or needing asis specific knowledge
with respect to register BARs.

Alex Deucher (22):
  drm/radeon: add INFO query for GPU temperature
  drm/radeon/dpm: add new callbacks to get the current sclk/mclk
  drm/radeon/rs780: implement get_current_sclk/mclk
  drm/radeon/rv6xx: implement get_current_sclk/mclk
  drm/radeon/rv7xx/eg: implement get_current_sclk/mclk
  drm/radeon/btc: implement get_current_sclk/mclk
  drm/radeon: remove some rv7xx leftovers from btc dpm code
  drm/radeon/ni: implement get_current_sclk/mclk
  drm/radeon/si: implement get_current_sclk/mclk
  drm/radeon/ci: implement get_current_sclk/mclk
  drm/radeon/sumo: implement get_current_sclk/mclk
  drm/radeon/tn: implement get_current_sclk/mclk
  drm/radeon/kv: implement get_current_sclk/mclk
  drm/radeon: add INFO query for current sclk/mclk
  drm/radeon: add new callback for info ioctl register accessor
  drm/radeon: add get_allowed_info_register function for r1xx-r5xx
  drm/radeon: add get_allowed_info_register for r6xx/r7xx
  drm/radeon: add get_allowed_info_register for EG/BTC
  drm/radeon: add get_allowed_info_register for cayman/TN
  drm/radeon: add get_allowed_info_register for SI
  drm/radeon: add get_allowed_info_register for CIK
  drm/radeon: add support for read reg query from radeon info ioctl

 drivers/gpu/drm/radeon/btc_dpm.c     | 55 +++++++++++++++++++++++++++++++-----
 drivers/gpu/drm/radeon/ci_dpm.c      | 14 +++++++++
 drivers/gpu/drm/radeon/cik.c         | 33 ++++++++++++++++++++++
 drivers/gpu/drm/radeon/cikd.h        |  2 ++
 drivers/gpu/drm/radeon/evergreen.c   | 28 ++++++++++++++++++
 drivers/gpu/drm/radeon/evergreend.h  |  1 +
 drivers/gpu/drm/radeon/kv_dpm.c      | 23 +++++++++++++++
 drivers/gpu/drm/radeon/ni.c          | 29 +++++++++++++++++++
 drivers/gpu/drm/radeon/ni_dpm.c      | 36 +++++++++++++++++++++++
 drivers/gpu/drm/radeon/nid.h         |  1 +
 drivers/gpu/drm/radeon/r600.c        | 26 +++++++++++++++++
 drivers/gpu/drm/radeon/radeon.h      |  7 +++++
 drivers/gpu/drm/radeon/radeon_asic.c | 49 ++++++++++++++++++++++++++++++++
 drivers/gpu/drm/radeon/radeon_asic.h | 30 ++++++++++++++++++++
 drivers/gpu/drm/radeon/radeon_kms.c  | 29 +++++++++++++++++++
 drivers/gpu/drm/radeon/rs780_dpm.c   | 22 +++++++++++++++
 drivers/gpu/drm/radeon/rv6xx_dpm.c   | 46 ++++++++++++++++++++++++++++++
 drivers/gpu/drm/radeon/rv770_dpm.c   | 44 +++++++++++++++++++++++++++++
 drivers/gpu/drm/radeon/si.c          | 30 ++++++++++++++++++++
 drivers/gpu/drm/radeon/si_dpm.c      | 36 +++++++++++++++++++++++
 drivers/gpu/drm/radeon/sid.h         |  1 +
 drivers/gpu/drm/radeon/sumo_dpm.c    | 28 ++++++++++++++++++
 drivers/gpu/drm/radeon/trinity_dpm.c | 25 ++++++++++++++++
 include/uapi/drm/radeon_drm.h        |  4 +++
 24 files changed, 592 insertions(+), 7 deletions(-)

-- 
1.8.3.1

[PATCH 01/22] drm/radeon: add INFO query for GPU temperature

[Alex Deucher]

Useful for profiling.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/radeon_kms.c | 7 +++++++
 include/uapi/drm/radeon_drm.h       | 1 +
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index 8309b11..e0a85dc 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -540,6 +540,13 @@ static int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file
 		else
 			*value = 1;
 		break;
+	case RADEON_INFO_CURRENT_GPU_TEMP:
+		/* get temperature in millidegrees C */
+		if (rdev->asic->pm.get_temperature)
+			*value = radeon_get_temperature(rdev);
+		else
+			*value = 0;
+		break;
 	default:
 		DRM_DEBUG_KMS("Invalid request %d\n", info->request);
 		return -EINVAL;
diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
index 50d0fb4..66b1131 100644
--- a/include/uapi/drm/radeon_drm.h
+++ b/include/uapi/drm/radeon_drm.h
@@ -1034,6 +1034,7 @@ struct drm_radeon_cs {
 #define RADEON_INFO_VRAM_USAGE		0x1e
 #define RADEON_INFO_GTT_USAGE		0x1f
 #define RADEON_INFO_ACTIVE_CU_COUNT	0x20
+#define RADEON_INFO_CURRENT_GPU_TEMP	0x21
 
 struct drm_radeon_info {
 	uint32_t		request;
-- 
1.8.3.1

[PATCH 02/22] drm/radeon/dpm: add new callbacks to get the current sclk/mclk

[Alex Deucher]

Needed to to expose the current clocks via the INFO ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/radeon.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 510fe96..9e3dc82 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1935,6 +1935,8 @@ struct radeon_asic {
 		bool (*vblank_too_short)(struct radeon_device *rdev);
 		void (*powergate_uvd)(struct radeon_device *rdev, bool gate);
 		void (*enable_bapm)(struct radeon_device *rdev, bool enable);
+		u32 (*get_current_sclk)(struct radeon_device *rdev);
+		u32 (*get_current_mclk)(struct radeon_device *rdev);
 	} dpm;
 	/* pageflipping */
 	struct {
@@ -2893,6 +2895,8 @@ static inline void radeon_ring_write(struct radeon_ring *ring, uint32_t v)
 #define radeon_dpm_vblank_too_short(rdev) rdev->asic->dpm.vblank_too_short((rdev))
 #define radeon_dpm_powergate_uvd(rdev, g) rdev->asic->dpm.powergate_uvd((rdev), (g))
 #define radeon_dpm_enable_bapm(rdev, e) rdev->asic->dpm.enable_bapm((rdev), (e))
+#define radeon_dpm_get_current_sclk(rdev) rdev->asic->dpm.get_current_sclk((rdev))
+#define radeon_dpm_get_current_mclk(rdev) rdev->asic->dpm.get_current_mclk((rdev))
 
 /* Common functions */
 /* AGP */
-- 
1.8.3.1

[PATCH 03/22] drm/radeon/rs780: implement get_current_sclk/mclk

[Alex Deucher]

WIll be used for exposing current clocks via INFO ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/radeon_asic.c |  2 ++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 drivers/gpu/drm/radeon/rs780_dpm.c   | 22 ++++++++++++++++++++++
 3 files changed, 26 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index d91f965..50c5142 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1153,6 +1153,8 @@ static struct radeon_asic rs780_asic = {
 		.print_power_state = &rs780_dpm_print_power_state,
 		.debugfs_print_current_performance_level = &rs780_dpm_debugfs_print_current_performance_level,
 		.force_performance_level = &rs780_dpm_force_performance_level,
+		.get_current_sclk = &rs780_dpm_get_current_sclk,
+		.get_current_mclk = &rs780_dpm_get_current_mclk,
 	},
 	.pflip = {
 		.page_flip = &rs600_page_flip,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index c41363f..688626f 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -449,6 +449,8 @@ void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rde
 						       struct seq_file *m);
 int rs780_dpm_force_performance_level(struct radeon_device *rdev,
 				      enum radeon_dpm_forced_level level);
+u32 rs780_dpm_get_current_sclk(struct radeon_device *rdev);
+u32 rs780_dpm_get_current_mclk(struct radeon_device *rdev);
 
 /*
  * rv770,rv730,rv710,rv740
diff --git a/drivers/gpu/drm/radeon/rs780_dpm.c b/drivers/gpu/drm/radeon/rs780_dpm.c
index 02f7710..4318b5b 100644
--- a/drivers/gpu/drm/radeon/rs780_dpm.c
+++ b/drivers/gpu/drm/radeon/rs780_dpm.c
@@ -1000,6 +1000,28 @@ void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rde
 			   ps->sclk_high, ps->max_voltage);
 }
 
+/* get the current sclk in 10 khz units */
+u32 rs780_dpm_get_current_sclk(struct radeon_device *rdev)
+{
+	u32 current_fb_div = RREG32(FVTHROT_STATUS_REG0) & CURRENT_FEEDBACK_DIV_MASK;
+	u32 func_cntl = RREG32(CG_SPLL_FUNC_CNTL);
+	u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1;
+	u32 post_div = ((func_cntl & SPLL_SW_HILEN_MASK) >> SPLL_SW_HILEN_SHIFT) + 1 +
+		((func_cntl & SPLL_SW_LOLEN_MASK) >> SPLL_SW_LOLEN_SHIFT) + 1;
+	u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) /
+		(post_div * ref_div);
+
+	return sclk;
+}
+
+/* get the current mclk in 10 khz units */
+u32 rs780_dpm_get_current_mclk(struct radeon_device *rdev)
+{
+	struct igp_power_info *pi = rs780_get_pi(rdev);
+
+	return pi->bootup_uma_clk;
+}
+
 int rs780_dpm_force_performance_level(struct radeon_device *rdev,
 				      enum radeon_dpm_forced_level level)
 {
-- 
1.8.3.1

[PATCH 04/22] drm/radeon/rv6xx: implement get_current_sclk/mclk

[Alex Deucher]

Will be used for exposing current clocks via INFO ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/radeon_asic.c |  2 ++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 drivers/gpu/drm/radeon/rv6xx_dpm.c   | 46 ++++++++++++++++++++++++++++++++++++
 3 files changed, 50 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 50c5142..af9dbe8 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1062,6 +1062,8 @@ static struct radeon_asic rv6xx_asic = {
 		.print_power_state = &rv6xx_dpm_print_power_state,
 		.debugfs_print_current_performance_level = &rv6xx_dpm_debugfs_print_current_performance_level,
 		.force_performance_level = &rv6xx_dpm_force_performance_level,
+		.get_current_sclk = &rv6xx_dpm_get_current_sclk,
+		.get_current_mclk = &rv6xx_dpm_get_current_mclk,
 	},
 	.pflip = {
 		.page_flip = &rs600_page_flip,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 688626f..5252aef 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -433,6 +433,8 @@ void rv6xx_dpm_debugfs_print_current_performance_level(struct radeon_device *rde
 						       struct seq_file *m);
 int rv6xx_dpm_force_performance_level(struct radeon_device *rdev,
 				      enum radeon_dpm_forced_level level);
+u32 rv6xx_dpm_get_current_sclk(struct radeon_device *rdev);
+u32 rv6xx_dpm_get_current_mclk(struct radeon_device *rdev);
 /* rs780 dpm */
 int rs780_dpm_init(struct radeon_device *rdev);
 int rs780_dpm_enable(struct radeon_device *rdev);
diff --git a/drivers/gpu/drm/radeon/rv6xx_dpm.c b/drivers/gpu/drm/radeon/rv6xx_dpm.c
index e7045b0..d555661 100644
--- a/drivers/gpu/drm/radeon/rv6xx_dpm.c
+++ b/drivers/gpu/drm/radeon/rv6xx_dpm.c
@@ -2049,6 +2049,52 @@ void rv6xx_dpm_debugfs_print_current_performance_level(struct radeon_device *rde
 	}
 }
 
+/* get the current sclk in 10 khz units */
+u32 rv6xx_dpm_get_current_sclk(struct radeon_device *rdev)
+{
+	struct radeon_ps *rps = rdev->pm.dpm.current_ps;
+	struct rv6xx_ps *ps = rv6xx_get_ps(rps);
+	struct rv6xx_pl *pl;
+	u32 current_index =
+		(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >>
+		CURRENT_PROFILE_INDEX_SHIFT;
+
+	if (current_index > 2) {
+		return 0;
+	} else {
+		if (current_index == 0)
+			pl = &ps->low;
+		else if (current_index == 1)
+			pl = &ps->medium;
+		else /* current_index == 2 */
+			pl = &ps->high;
+		return pl->sclk;
+	}
+}
+
+/* get the current mclk in 10 khz units */
+u32 rv6xx_dpm_get_current_mclk(struct radeon_device *rdev)
+{
+	struct radeon_ps *rps = rdev->pm.dpm.current_ps;
+	struct rv6xx_ps *ps = rv6xx_get_ps(rps);
+	struct rv6xx_pl *pl;
+	u32 current_index =
+		(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >>
+		CURRENT_PROFILE_INDEX_SHIFT;
+
+	if (current_index > 2) {
+		return 0;
+	} else {
+		if (current_index == 0)
+			pl = &ps->low;
+		else if (current_index == 1)
+			pl = &ps->medium;
+		else /* current_index == 2 */
+			pl = &ps->high;
+		return pl->mclk;
+	}
+}
+
 void rv6xx_dpm_fini(struct radeon_device *rdev)
 {
 	int i;
-- 
1.8.3.1

[PATCH 05/22] drm/radeon/rv7xx/eg: implement get_current_sclk/mclk

[Alex Deucher]

Will be used for exposing current clocks via INFO ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/radeon_asic.c |  4 ++++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 drivers/gpu/drm/radeon/rv770_dpm.c   | 44 ++++++++++++++++++++++++++++++++++++
 3 files changed, 50 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index af9dbe8..aae302e 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1262,6 +1262,8 @@ static struct radeon_asic rv770_asic = {
 		.debugfs_print_current_performance_level = &rv770_dpm_debugfs_print_current_performance_level,
 		.force_performance_level = &rv770_dpm_force_performance_level,
 		.vblank_too_short = &rv770_dpm_vblank_too_short,
+		.get_current_sclk = &rv770_dpm_get_current_sclk,
+		.get_current_mclk = &rv770_dpm_get_current_mclk,
 	},
 	.pflip = {
 		.page_flip = &rv770_page_flip,
@@ -1380,6 +1382,8 @@ static struct radeon_asic evergreen_asic = {
 		.debugfs_print_current_performance_level = &rv770_dpm_debugfs_print_current_performance_level,
 		.force_performance_level = &rv770_dpm_force_performance_level,
 		.vblank_too_short = &cypress_dpm_vblank_too_short,
+		.get_current_sclk = &rv770_dpm_get_current_sclk,
+		.get_current_mclk = &rv770_dpm_get_current_mclk,
 	},
 	.pflip = {
 		.page_flip = &evergreen_page_flip,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 5252aef..15e9312 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -494,6 +494,8 @@ void rv770_dpm_debugfs_print_current_performance_level(struct radeon_device *rde
 int rv770_dpm_force_performance_level(struct radeon_device *rdev,
 				      enum radeon_dpm_forced_level level);
 bool rv770_dpm_vblank_too_short(struct radeon_device *rdev);
+u32 rv770_dpm_get_current_sclk(struct radeon_device *rdev);
+u32 rv770_dpm_get_current_mclk(struct radeon_device *rdev);
 
 /*
  * evergreen
diff --git a/drivers/gpu/drm/radeon/rv770_dpm.c b/drivers/gpu/drm/radeon/rv770_dpm.c
index 3c76e1d..da751910 100644
--- a/drivers/gpu/drm/radeon/rv770_dpm.c
+++ b/drivers/gpu/drm/radeon/rv770_dpm.c
@@ -2487,6 +2487,50 @@ void rv770_dpm_debugfs_print_current_performance_level(struct radeon_device *rde
 	}
 }
 
+u32 rv770_dpm_get_current_sclk(struct radeon_device *rdev)
+{
+	struct radeon_ps *rps = rdev->pm.dpm.current_ps;
+	struct rv7xx_ps *ps = rv770_get_ps(rps);
+	struct rv7xx_pl *pl;
+	u32 current_index =
+		(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >>
+		CURRENT_PROFILE_INDEX_SHIFT;
+
+	if (current_index > 2) {
+		return 0;
+	} else {
+		if (current_index == 0)
+			pl = &ps->low;
+		else if (current_index == 1)
+			pl = &ps->medium;
+		else /* current_index == 2 */
+			pl = &ps->high;
+		return  pl->sclk;
+	}
+}
+
+u32 rv770_dpm_get_current_mclk(struct radeon_device *rdev)
+{
+	struct radeon_ps *rps = rdev->pm.dpm.current_ps;
+	struct rv7xx_ps *ps = rv770_get_ps(rps);
+	struct rv7xx_pl *pl;
+	u32 current_index =
+		(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >>
+		CURRENT_PROFILE_INDEX_SHIFT;
+
+	if (current_index > 2) {
+		return 0;
+	} else {
+		if (current_index == 0)
+			pl = &ps->low;
+		else if (current_index == 1)
+			pl = &ps->medium;
+		else /* current_index == 2 */
+			pl = &ps->high;
+		return  pl->mclk;
+	}
+}
+
 void rv770_dpm_fini(struct radeon_device *rdev)
 {
 	int i;
-- 
1.8.3.1

[PATCH 06/22] drm/radeon/btc: implement get_current_sclk/mclk

[Alex Deucher]

Will be used for exposing current clocks via INFO ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/btc_dpm.c     | 46 ++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/radeon/radeon_asic.c |  2 ++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 3 files changed, 50 insertions(+)

diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c
index 300d971..38f6035 100644
--- a/drivers/gpu/drm/radeon/btc_dpm.c
+++ b/drivers/gpu/drm/radeon/btc_dpm.c
@@ -2741,6 +2741,52 @@ void btc_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
 	}
 }
 
+u32 btc_dpm_get_current_sclk(struct radeon_device *rdev)
+{
+	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
+	struct radeon_ps *rps = &eg_pi->current_rps;
+	struct rv7xx_ps *ps = rv770_get_ps(rps);
+	struct rv7xx_pl *pl;
+	u32 current_index =
+		(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >>
+		CURRENT_PROFILE_INDEX_SHIFT;
+
+	if (current_index > 2) {
+		return 0;
+	} else {
+		if (current_index == 0)
+			pl = &ps->low;
+		else if (current_index == 1)
+			pl = &ps->medium;
+		else /* current_index == 2 */
+			pl = &ps->high;
+		return pl->sclk;
+	}
+}
+
+u32 btc_dpm_get_current_mclk(struct radeon_device *rdev)
+{
+	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
+	struct radeon_ps *rps = &eg_pi->current_rps;
+	struct rv7xx_ps *ps = rv770_get_ps(rps);
+	struct rv7xx_pl *pl;
+	u32 current_index =
+		(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >>
+		CURRENT_PROFILE_INDEX_SHIFT;
+
+	if (current_index > 2) {
+		return 0;
+	} else {
+		if (current_index == 0)
+			pl = &ps->low;
+		else if (current_index == 1)
+			pl = &ps->medium;
+		else /* current_index == 2 */
+			pl = &ps->high;
+		return pl->mclk;
+	}
+}
+
 u32 btc_dpm_get_sclk(struct radeon_device *rdev, bool low)
 {
 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index aae302e..bafc7bc 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1567,6 +1567,8 @@ static struct radeon_asic btc_asic = {
 		.debugfs_print_current_performance_level = &btc_dpm_debugfs_print_current_performance_level,
 		.force_performance_level = &rv770_dpm_force_performance_level,
 		.vblank_too_short = &btc_dpm_vblank_too_short,
+		.get_current_sclk = &btc_dpm_get_current_sclk,
+		.get_current_mclk = &btc_dpm_get_current_mclk,
 	},
 	.pflip = {
 		.page_flip = &evergreen_page_flip,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 15e9312..44ebae6 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -573,6 +573,8 @@ u32 btc_dpm_get_mclk(struct radeon_device *rdev, bool low);
 bool btc_dpm_vblank_too_short(struct radeon_device *rdev);
 void btc_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
 						     struct seq_file *m);
+u32 btc_dpm_get_current_sclk(struct radeon_device *rdev);
+u32 btc_dpm_get_current_mclk(struct radeon_device *rdev);
 int sumo_dpm_init(struct radeon_device *rdev);
 int sumo_dpm_enable(struct radeon_device *rdev);
 int sumo_dpm_late_enable(struct radeon_device *rdev);
-- 
1.8.3.1

[PATCH 07/22] drm/radeon: remove some rv7xx leftovers from btc dpm code

[Alex Deucher]

Some copy paste leftovers.  No functional change.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/btc_dpm.c | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c
index 38f6035..987b352 100644
--- a/drivers/gpu/drm/radeon/btc_dpm.c
+++ b/drivers/gpu/drm/radeon/btc_dpm.c
@@ -2731,13 +2731,8 @@ void btc_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
 		else /* current_index == 2 */
 			pl = &ps->high;
 		seq_printf(m, "uvd    vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
-		if (rdev->family >= CHIP_CEDAR) {
-			seq_printf(m, "power level %d    sclk: %u mclk: %u vddc: %u vddci: %u\n",
-				   current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci);
-		} else {
-			seq_printf(m, "power level %d    sclk: %u mclk: %u vddc: %u\n",
-				   current_index, pl->sclk, pl->mclk, pl->vddc);
-		}
+		seq_printf(m, "power level %d    sclk: %u mclk: %u vddc: %u vddci: %u\n",
+			   current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci);
 	}
 }
 
-- 
1.8.3.1

[PATCH 08/22] drm/radeon/ni: implement get_current_sclk/mclk

[Alex Deucher]

Will be used for exposing current clocks via INFO ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/ni_dpm.c      | 36 ++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/radeon/radeon_asic.c |  2 ++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 3 files changed, 40 insertions(+)

diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c
index 715b181..40c1abd 100644
--- a/drivers/gpu/drm/radeon/ni_dpm.c
+++ b/drivers/gpu/drm/radeon/ni_dpm.c
@@ -4316,6 +4316,42 @@ void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
 	}
 }
 
+u32 ni_dpm_get_current_sclk(struct radeon_device *rdev)
+{
+	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
+	struct radeon_ps *rps = &eg_pi->current_rps;
+	struct ni_ps *ps = ni_get_ps(rps);
+	struct rv7xx_pl *pl;
+	u32 current_index =
+		(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_STATE_INDEX_MASK) >>
+		CURRENT_STATE_INDEX_SHIFT;
+
+	if (current_index >= ps->performance_level_count) {
+		return 0;
+	} else {
+		pl = &ps->performance_levels[current_index];
+		return pl->sclk;
+	}
+}
+
+u32 ni_dpm_get_current_mclk(struct radeon_device *rdev)
+{
+	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
+	struct radeon_ps *rps = &eg_pi->current_rps;
+	struct ni_ps *ps = ni_get_ps(rps);
+	struct rv7xx_pl *pl;
+	u32 current_index =
+		(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_STATE_INDEX_MASK) >>
+		CURRENT_STATE_INDEX_SHIFT;
+
+	if (current_index >= ps->performance_level_count) {
+		return 0;
+	} else {
+		pl = &ps->performance_levels[current_index];
+		return pl->mclk;
+	}
+}
+
 u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low)
 {
 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index bafc7bc..5faeab66 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1715,6 +1715,8 @@ static struct radeon_asic cayman_asic = {
 		.debugfs_print_current_performance_level = &ni_dpm_debugfs_print_current_performance_level,
 		.force_performance_level = &ni_dpm_force_performance_level,
 		.vblank_too_short = &ni_dpm_vblank_too_short,
+		.get_current_sclk = &ni_dpm_get_current_sclk,
+		.get_current_mclk = &ni_dpm_get_current_mclk,
 	},
 	.pflip = {
 		.page_flip = &evergreen_page_flip,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 44ebae6..a1de01b 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -665,6 +665,8 @@ void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
 int ni_dpm_force_performance_level(struct radeon_device *rdev,
 				   enum radeon_dpm_forced_level level);
 bool ni_dpm_vblank_too_short(struct radeon_device *rdev);
+u32 ni_dpm_get_current_sclk(struct radeon_device *rdev);
+u32 ni_dpm_get_current_mclk(struct radeon_device *rdev);
 int trinity_dpm_init(struct radeon_device *rdev);
 int trinity_dpm_enable(struct radeon_device *rdev);
 int trinity_dpm_late_enable(struct radeon_device *rdev);
-- 
1.8.3.1

[PATCH 09/22] drm/radeon/si: implement get_current_sclk/mclk

[Alex Deucher]

Will be used for exposing current clocks via INFO ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/radeon_asic.c |  2 ++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 drivers/gpu/drm/radeon/si_dpm.c      | 36 ++++++++++++++++++++++++++++++++++++
 3 files changed, 40 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 5faeab66..ccfc518 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1953,6 +1953,8 @@ static struct radeon_asic si_asic = {
 		.debugfs_print_current_performance_level = &si_dpm_debugfs_print_current_performance_level,
 		.force_performance_level = &si_dpm_force_performance_level,
 		.vblank_too_short = &ni_dpm_vblank_too_short,
+		.get_current_sclk = &si_dpm_get_current_sclk,
+		.get_current_mclk = &si_dpm_get_current_mclk,
 	},
 	.pflip = {
 		.page_flip = &evergreen_page_flip,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index a1de01b..17a8904 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -751,6 +751,8 @@ void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
 						    struct seq_file *m);
 int si_dpm_force_performance_level(struct radeon_device *rdev,
 				   enum radeon_dpm_forced_level level);
+u32 si_dpm_get_current_sclk(struct radeon_device *rdev);
+u32 si_dpm_get_current_mclk(struct radeon_device *rdev);
 
 /* DCE8 - CIK */
 void dce8_bandwidth_update(struct radeon_device *rdev);
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index 9e4d5d7..34ab390 100644
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -6537,3 +6537,39 @@ void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
 			   current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1);
 	}
 }
+
+u32 si_dpm_get_current_sclk(struct radeon_device *rdev)
+{
+	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
+	struct radeon_ps *rps = &eg_pi->current_rps;
+	struct ni_ps *ps = ni_get_ps(rps);
+	struct rv7xx_pl *pl;
+	u32 current_index =
+		(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_STATE_INDEX_MASK) >>
+		CURRENT_STATE_INDEX_SHIFT;
+
+	if (current_index >= ps->performance_level_count) {
+		return 0;
+	} else {
+		pl = &ps->performance_levels[current_index];
+		return pl->sclk;
+	}
+}
+
+u32 si_dpm_get_current_mclk(struct radeon_device *rdev)
+{
+	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
+	struct radeon_ps *rps = &eg_pi->current_rps;
+	struct ni_ps *ps = ni_get_ps(rps);
+	struct rv7xx_pl *pl;
+	u32 current_index =
+		(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_STATE_INDEX_MASK) >>
+		CURRENT_STATE_INDEX_SHIFT;
+
+	if (current_index >= ps->performance_level_count) {
+		return 0;
+	} else {
+		pl = &ps->performance_levels[current_index];
+		return pl->mclk;
+	}
+}
-- 
1.8.3.1

[PATCH 10/22] drm/radeon/ci: implement get_current_sclk/mclk

[Alex Deucher]

Will be used for exposing current clocks via INFO ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/ci_dpm.c      | 14 ++++++++++++++
 drivers/gpu/drm/radeon/radeon_asic.c |  2 ++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 3 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c
index d199be3..cdefdf3 100644
--- a/drivers/gpu/drm/radeon/ci_dpm.c
+++ b/drivers/gpu/drm/radeon/ci_dpm.c
@@ -5292,6 +5292,20 @@ void ci_dpm_print_power_state(struct radeon_device *rdev,
 	r600_dpm_print_ps_status(rdev, rps);
 }
 
+u32 ci_dpm_get_current_sclk(struct radeon_device *rdev)
+{
+	u32 sclk = ci_get_average_sclk_freq(rdev);
+
+	return sclk;
+}
+
+u32 ci_dpm_get_current_mclk(struct radeon_device *rdev)
+{
+	u32 mclk = ci_get_average_mclk_freq(rdev);
+
+	return mclk;
+}
+
 u32 ci_dpm_get_sclk(struct radeon_device *rdev, bool low)
 {
 	struct ci_power_info *pi = ci_get_pi(rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index ccfc518..cee4d82 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -2120,6 +2120,8 @@ static struct radeon_asic ci_asic = {
 		.force_performance_level = &ci_dpm_force_performance_level,
 		.vblank_too_short = &ci_dpm_vblank_too_short,
 		.powergate_uvd = &ci_dpm_powergate_uvd,
+		.get_current_sclk = &ci_dpm_get_current_sclk,
+		.get_current_mclk = &ci_dpm_get_current_mclk,
 	},
 	.pflip = {
 		.page_flip = &evergreen_page_flip,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 17a8904..fb17fa0 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -867,6 +867,8 @@ int ci_dpm_force_performance_level(struct radeon_device *rdev,
 				   enum radeon_dpm_forced_level level);
 bool ci_dpm_vblank_too_short(struct radeon_device *rdev);
 void ci_dpm_powergate_uvd(struct radeon_device *rdev, bool gate);
+u32 ci_dpm_get_current_sclk(struct radeon_device *rdev);
+u32 ci_dpm_get_current_mclk(struct radeon_device *rdev);
 
 int kv_dpm_init(struct radeon_device *rdev);
 int kv_dpm_enable(struct radeon_device *rdev);
-- 
1.8.3.1

[PATCH 11/22] drm/radeon/sumo: implement get_current_sclk/mclk

[Alex Deucher]

Will be used for exposing current clocks via INFO ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/radeon_asic.c |  2 ++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 drivers/gpu/drm/radeon/sumo_dpm.c    | 28 ++++++++++++++++++++++++++++
 3 files changed, 32 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index cee4d82..b7461c0 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1475,6 +1475,8 @@ static struct radeon_asic sumo_asic = {
 		.print_power_state = &sumo_dpm_print_power_state,
 		.debugfs_print_current_performance_level = &sumo_dpm_debugfs_print_current_performance_level,
 		.force_performance_level = &sumo_dpm_force_performance_level,
+		.get_current_sclk = &sumo_dpm_get_current_sclk,
+		.get_current_mclk = &sumo_dpm_get_current_mclk,
 	},
 	.pflip = {
 		.page_flip = &evergreen_page_flip,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index fb17fa0..44dccd5 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -593,6 +593,8 @@ void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev
 						      struct seq_file *m);
 int sumo_dpm_force_performance_level(struct radeon_device *rdev,
 				     enum radeon_dpm_forced_level level);
+u32 sumo_dpm_get_current_sclk(struct radeon_device *rdev);
+u32 sumo_dpm_get_current_mclk(struct radeon_device *rdev);
 
 /*
  * cayman
diff --git a/drivers/gpu/drm/radeon/sumo_dpm.c b/drivers/gpu/drm/radeon/sumo_dpm.c
index 3f0e8d7..e243a7e 100644
--- a/drivers/gpu/drm/radeon/sumo_dpm.c
+++ b/drivers/gpu/drm/radeon/sumo_dpm.c
@@ -1832,6 +1832,34 @@ void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev
 	}
 }
 
+u32 sumo_dpm_get_current_sclk(struct radeon_device *rdev)
+{
+	struct sumo_power_info *pi = sumo_get_pi(rdev);
+	struct radeon_ps *rps = &pi->current_rps;
+	struct sumo_ps *ps = sumo_get_ps(rps);
+	struct sumo_pl *pl;
+	u32 current_index =
+		(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURR_INDEX_MASK) >>
+		CURR_INDEX_SHIFT;
+
+	if (current_index == BOOST_DPM_LEVEL) {
+		pl = &pi->boost_pl;
+		return pl->sclk;
+	} else if (current_index >= ps->num_levels) {
+		return 0;
+	} else {
+		pl = &ps->levels[current_index];
+		return pl->sclk;
+	}
+}
+
+u32 sumo_dpm_get_current_mclk(struct radeon_device *rdev)
+{
+	struct sumo_power_info *pi = sumo_get_pi(rdev);
+
+	return pi->sys_info.bootup_uma_clk;
+}
+
 void sumo_dpm_fini(struct radeon_device *rdev)
 {
 	int i;
-- 
1.8.3.1

[PATCH 12/22] drm/radeon/tn: implement get_current_sclk/mclk

[Alex Deucher]

Will be used for exposing current clocks via INFO ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/radeon_asic.c |  2 ++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 drivers/gpu/drm/radeon/trinity_dpm.c | 25 +++++++++++++++++++++++++
 3 files changed, 29 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index b7461c0..8722141 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1822,6 +1822,8 @@ static struct radeon_asic trinity_asic = {
 		.debugfs_print_current_performance_level = &trinity_dpm_debugfs_print_current_performance_level,
 		.force_performance_level = &trinity_dpm_force_performance_level,
 		.enable_bapm = &trinity_dpm_enable_bapm,
+		.get_current_sclk = &trinity_dpm_get_current_sclk,
+		.get_current_mclk = &trinity_dpm_get_current_mclk,
 	},
 	.pflip = {
 		.page_flip = &evergreen_page_flip,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 44dccd5..b7b4854 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -688,6 +688,8 @@ void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *r
 int trinity_dpm_force_performance_level(struct radeon_device *rdev,
 					enum radeon_dpm_forced_level level);
 void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable);
+u32 trinity_dpm_get_current_sclk(struct radeon_device *rdev);
+u32 trinity_dpm_get_current_mclk(struct radeon_device *rdev);
 
 /* DCE6 - SI */
 void dce6_bandwidth_update(struct radeon_device *rdev);
diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c b/drivers/gpu/drm/radeon/trinity_dpm.c
index 57f7800..b6bbe98 100644
--- a/drivers/gpu/drm/radeon/trinity_dpm.c
+++ b/drivers/gpu/drm/radeon/trinity_dpm.c
@@ -1961,6 +1961,31 @@ void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *r
 	}
 }
 
+u32 trinity_dpm_get_current_sclk(struct radeon_device *rdev)
+{
+	struct trinity_power_info *pi = trinity_get_pi(rdev);
+	struct radeon_ps *rps = &pi->current_rps;
+	struct trinity_ps *ps = trinity_get_ps(rps);
+	struct trinity_pl *pl;
+	u32 current_index =
+		(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_STATE_MASK) >>
+		CURRENT_STATE_SHIFT;
+
+	if (current_index >= ps->num_levels) {
+		return 0;
+	} else {
+		pl = &ps->levels[current_index];
+		return pl->sclk;
+	}
+}
+
+u32 trinity_dpm_get_current_mclk(struct radeon_device *rdev)
+{
+	struct trinity_power_info *pi = trinity_get_pi(rdev);
+
+	return pi->sys_info.bootup_uma_clk;
+}
+
 void trinity_dpm_fini(struct radeon_device *rdev)
 {
 	int i;
-- 
1.8.3.1

[PATCH 13/22] drm/radeon/kv: implement get_current_sclk/mclk

[Alex Deucher]

Will be used for exposing current clocks via INFO ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/kv_dpm.c      | 23 +++++++++++++++++++++++
 drivers/gpu/drm/radeon/radeon_asic.c |  2 ++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 3 files changed, 27 insertions(+)

diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c
index 8b58e11..bffacd9 100644
--- a/drivers/gpu/drm/radeon/kv_dpm.c
+++ b/drivers/gpu/drm/radeon/kv_dpm.c
@@ -2778,6 +2778,29 @@ void kv_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
 	}
 }
 
+u32 kv_dpm_get_current_sclk(struct radeon_device *rdev)
+{
+	struct kv_power_info *pi = kv_get_pi(rdev);
+	u32 current_index =
+		(RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX) & CURR_SCLK_INDEX_MASK) >>
+		CURR_SCLK_INDEX_SHIFT;
+	u32 sclk;
+
+	if (current_index >= SMU__NUM_SCLK_DPM_STATE) {
+		return 0;
+	} else {
+		sclk = be32_to_cpu(pi->graphics_level[current_index].SclkFrequency);
+		return sclk;
+	}
+}
+
+u32 kv_dpm_get_current_mclk(struct radeon_device *rdev)
+{
+	struct kv_power_info *pi = kv_get_pi(rdev);
+
+	return pi->sys_info.bootup_uma_clk;
+}
+
 void kv_dpm_print_power_state(struct radeon_device *rdev,
 			      struct radeon_ps *rps)
 {
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 8722141..0b039fb 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -2233,6 +2233,8 @@ static struct radeon_asic kv_asic = {
 		.force_performance_level = &kv_dpm_force_performance_level,
 		.powergate_uvd = &kv_dpm_powergate_uvd,
 		.enable_bapm = &kv_dpm_enable_bapm,
+		.get_current_sclk = &kv_dpm_get_current_sclk,
+		.get_current_mclk = &kv_dpm_get_current_mclk,
 	},
 	.pflip = {
 		.page_flip = &evergreen_page_flip,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index b7b4854..2b60d0f 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -894,6 +894,8 @@ int kv_dpm_force_performance_level(struct radeon_device *rdev,
 				   enum radeon_dpm_forced_level level);
 void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate);
 void kv_dpm_enable_bapm(struct radeon_device *rdev, bool enable);
+u32 kv_dpm_get_current_sclk(struct radeon_device *rdev);
+u32 kv_dpm_get_current_mclk(struct radeon_device *rdev);
 
 /* uvd v1.0 */
 uint32_t uvd_v1_0_get_rptr(struct radeon_device *rdev,
-- 
1.8.3.1

[PATCH 14/22] drm/radeon: add INFO query for current sclk/mclk

[Alex Deucher]

Allow the UMDs to query the current sclk/mclk
for profiling, etc.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/radeon_kms.c | 14 ++++++++++++++
 include/uapi/drm/radeon_drm.h       |  2 ++
 2 files changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index e0a85dc..f15de68 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -547,6 +547,20 @@ static int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file
 		else
 			*value = 0;
 		break;
+	case RADEON_INFO_CURRENT_GPU_SCLK:
+		/* get sclk in Mhz */
+		if (rdev->pm.dpm_enabled)
+			*value = radeon_dpm_get_current_sclk(rdev) / 100;
+		else
+			*value = rdev->pm.current_sclk / 100;
+		break;
+	case RADEON_INFO_CURRENT_GPU_MCLK:
+		/* get mclk in Mhz */
+		if (rdev->pm.dpm_enabled)
+			*value = radeon_dpm_get_current_mclk(rdev) / 100;
+		else
+			*value = rdev->pm.current_mclk / 100;
+		break;
 	default:
 		DRM_DEBUG_KMS("Invalid request %d\n", info->request);
 		return -EINVAL;
diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
index 66b1131..de7ee21 100644
--- a/include/uapi/drm/radeon_drm.h
+++ b/include/uapi/drm/radeon_drm.h
@@ -1035,6 +1035,8 @@ struct drm_radeon_cs {
 #define RADEON_INFO_GTT_USAGE		0x1f
 #define RADEON_INFO_ACTIVE_CU_COUNT	0x20
 #define RADEON_INFO_CURRENT_GPU_TEMP	0x21
+#define RADEON_INFO_CURRENT_GPU_SCLK	0x22
+#define RADEON_INFO_CURRENT_GPU_MCLK	0x23
 
 struct drm_radeon_info {
 	uint32_t		request;
-- 
1.8.3.1

[PATCH 15/22] drm/radeon: add new callback for info ioctl register accessor

[Alex Deucher]

This adds a callback for each asic family to determine what
registers are allowed to be read back via the info ioctl.

The idea here is to allow usermode to query things like GPU status
registers or GPU harvest registers for profiling and determining
the gfx config.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/radeon.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 9e3dc82..7671e01 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1812,6 +1812,8 @@ struct radeon_asic {
 	u32 (*get_xclk)(struct radeon_device *rdev);
 	/* get the gpu clock counter */
 	uint64_t (*get_gpu_clock_counter)(struct radeon_device *rdev);
+	/* get register for info ioctl */
+	int (*get_allowed_info_register)(struct radeon_device *rdev, u32 reg, u32 *val);
 	/* gart */
 	struct {
 		void (*tlb_flush)(struct radeon_device *rdev);
@@ -2877,6 +2879,7 @@ static inline void radeon_ring_write(struct radeon_ring *ring, uint32_t v)
 #define radeon_mc_wait_for_idle(rdev) (rdev)->asic->mc_wait_for_idle((rdev))
 #define radeon_get_xclk(rdev) (rdev)->asic->get_xclk((rdev))
 #define radeon_get_gpu_clock_counter(rdev) (rdev)->asic->get_gpu_clock_counter((rdev))
+#define radeon_get_allowed_info_register(rdev, r, v) (rdev)->asic->get_allowed_info_register((rdev), (r), (v))
 #define radeon_dpm_init(rdev) rdev->asic->dpm.init((rdev))
 #define radeon_dpm_setup_asic(rdev) rdev->asic->dpm.setup_asic((rdev))
 #define radeon_dpm_enable(rdev) rdev->asic->dpm.enable((rdev))
-- 
1.8.3.1

[PATCH 16/22] drm/radeon: add get_allowed_info_register function for r1xx-r5xx

[Alex Deucher]

Just a stub.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/radeon_asic.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 0b039fb..603ed80 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -136,6 +136,11 @@ static void radeon_register_accessor_init(struct radeon_device *rdev)
 	}
 }
 
+static int radeon_invalid_get_allowed_info_register(struct radeon_device *rdev,
+						    u32 reg, u32 *val)
+{
+	return -EINVAL;
+}
 
 /* helper to disable agp */
 /**
@@ -198,6 +203,7 @@ static struct radeon_asic r100_asic = {
 	.mmio_hdp_flush = NULL,
 	.gui_idle = &r100_gui_idle,
 	.mc_wait_for_idle = &r100_mc_wait_for_idle,
+	.get_allowed_info_register = radeon_invalid_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &r100_pci_gart_tlb_flush,
 		.set_page = &r100_pci_gart_set_page,
@@ -264,6 +270,7 @@ static struct radeon_asic r200_asic = {
 	.mmio_hdp_flush = NULL,
 	.gui_idle = &r100_gui_idle,
 	.mc_wait_for_idle = &r100_mc_wait_for_idle,
+	.get_allowed_info_register = radeon_invalid_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &r100_pci_gart_tlb_flush,
 		.set_page = &r100_pci_gart_set_page,
@@ -345,6 +352,7 @@ static struct radeon_asic r300_asic = {
 	.mmio_hdp_flush = NULL,
 	.gui_idle = &r100_gui_idle,
 	.mc_wait_for_idle = &r300_mc_wait_for_idle,
+	.get_allowed_info_register = radeon_invalid_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &r100_pci_gart_tlb_flush,
 		.set_page = &r100_pci_gart_set_page,
@@ -411,6 +419,7 @@ static struct radeon_asic r300_asic_pcie = {
 	.mmio_hdp_flush = NULL,
 	.gui_idle = &r100_gui_idle,
 	.mc_wait_for_idle = &r300_mc_wait_for_idle,
+	.get_allowed_info_register = radeon_invalid_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &rv370_pcie_gart_tlb_flush,
 		.set_page = &rv370_pcie_gart_set_page,
@@ -477,6 +486,7 @@ static struct radeon_asic r420_asic = {
 	.mmio_hdp_flush = NULL,
 	.gui_idle = &r100_gui_idle,
 	.mc_wait_for_idle = &r300_mc_wait_for_idle,
+	.get_allowed_info_register = radeon_invalid_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &rv370_pcie_gart_tlb_flush,
 		.set_page = &rv370_pcie_gart_set_page,
@@ -543,6 +553,7 @@ static struct radeon_asic rs400_asic = {
 	.mmio_hdp_flush = NULL,
 	.gui_idle = &r100_gui_idle,
 	.mc_wait_for_idle = &rs400_mc_wait_for_idle,
+	.get_allowed_info_register = radeon_invalid_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &rs400_gart_tlb_flush,
 		.set_page = &rs400_gart_set_page,
@@ -609,6 +620,7 @@ static struct radeon_asic rs600_asic = {
 	.mmio_hdp_flush = NULL,
 	.gui_idle = &r100_gui_idle,
 	.mc_wait_for_idle = &rs600_mc_wait_for_idle,
+	.get_allowed_info_register = radeon_invalid_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &rs600_gart_tlb_flush,
 		.set_page = &rs600_gart_set_page,
@@ -677,6 +689,7 @@ static struct radeon_asic rs690_asic = {
 	.mmio_hdp_flush = NULL,
 	.gui_idle = &r100_gui_idle,
 	.mc_wait_for_idle = &rs690_mc_wait_for_idle,
+	.get_allowed_info_register = radeon_invalid_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &rs400_gart_tlb_flush,
 		.set_page = &rs400_gart_set_page,
@@ -745,6 +758,7 @@ static struct radeon_asic rv515_asic = {
 	.mmio_hdp_flush = NULL,
 	.gui_idle = &r100_gui_idle,
 	.mc_wait_for_idle = &rv515_mc_wait_for_idle,
+	.get_allowed_info_register = radeon_invalid_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &rv370_pcie_gart_tlb_flush,
 		.set_page = &rv370_pcie_gart_set_page,
@@ -811,6 +825,7 @@ static struct radeon_asic r520_asic = {
 	.mmio_hdp_flush = NULL,
 	.gui_idle = &r100_gui_idle,
 	.mc_wait_for_idle = &r520_mc_wait_for_idle,
+	.get_allowed_info_register = radeon_invalid_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &rv370_pcie_gart_tlb_flush,
 		.set_page = &rv370_pcie_gart_set_page,
-- 
1.8.3.1

[PATCH 17/22] drm/radeon: add get_allowed_info_register for r6xx/r7xx

[Alex Deucher]

Registers that can be fetched from the info ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/r600.c        | 26 ++++++++++++++++++++++++++
 drivers/gpu/drm/radeon/radeon_asic.c |  4 ++++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 3 files changed, 32 insertions(+)

diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 25f367a..5bf7860 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -108,6 +108,32 @@ extern int evergreen_rlc_resume(struct radeon_device *rdev);
 extern void rv770_set_clk_bypass_mode(struct radeon_device *rdev);
 
 /**
+ * r600_get_allowed_info_register - fetch the register for the info ioctl
+ *
+ * @rdev: radeon_device pointer
+ * @reg: register offset in bytes
+ * @val: register value
+ *
+ * Returns 0 for success or -EINVAL for an invalid register
+ *
+ */
+int r600_get_allowed_info_register(struct radeon_device *rdev,
+				   u32 reg, u32 *val)
+{
+	switch (reg) {
+	case GRBM_STATUS:
+	case GRBM_STATUS2:
+	case R_000E50_SRBM_STATUS:
+	case DMA_STATUS_REG:
+	case UVD_STATUS:
+		*val = RREG32(reg);
+		return 0;
+	default:
+		return -EINVAL;
+	}
+}
+
+/**
  * r600_get_xclk - get the xclk
  *
  * @rdev: radeon_device pointer
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 603ed80..f0101a4 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -920,6 +920,7 @@ static struct radeon_asic r600_asic = {
 	.mc_wait_for_idle = &r600_mc_wait_for_idle,
 	.get_xclk = &r600_get_xclk,
 	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
+	.get_allowed_info_register = r600_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &r600_pcie_gart_tlb_flush,
 		.set_page = &rs600_gart_set_page,
@@ -1005,6 +1006,7 @@ static struct radeon_asic rv6xx_asic = {
 	.mc_wait_for_idle = &r600_mc_wait_for_idle,
 	.get_xclk = &r600_get_xclk,
 	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
+	.get_allowed_info_register = r600_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &r600_pcie_gart_tlb_flush,
 		.set_page = &rs600_gart_set_page,
@@ -1098,6 +1100,7 @@ static struct radeon_asic rs780_asic = {
 	.mc_wait_for_idle = &r600_mc_wait_for_idle,
 	.get_xclk = &r600_get_xclk,
 	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
+	.get_allowed_info_register = r600_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &r600_pcie_gart_tlb_flush,
 		.set_page = &rs600_gart_set_page,
@@ -1204,6 +1207,7 @@ static struct radeon_asic rv770_asic = {
 	.mc_wait_for_idle = &r600_mc_wait_for_idle,
 	.get_xclk = &rv770_get_xclk,
 	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
+	.get_allowed_info_register = r600_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &r600_pcie_gart_tlb_flush,
 		.set_page = &rs600_gart_set_page,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 2b60d0f..5bf508f 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -381,6 +381,8 @@ u32 r600_gfx_get_wptr(struct radeon_device *rdev,
 		      struct radeon_ring *ring);
 void r600_gfx_set_wptr(struct radeon_device *rdev,
 		       struct radeon_ring *ring);
+int r600_get_allowed_info_register(struct radeon_device *rdev,
+				   u32 reg, u32 *val);
 /* r600 irq */
 int r600_irq_process(struct radeon_device *rdev);
 int r600_irq_init(struct radeon_device *rdev);
-- 
1.8.3.1

[PATCH 18/22] drm/radeon: add get_allowed_info_register for EG/BTC

[Alex Deucher]

Registers that can be fetched from the info ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/evergreen.c   | 28 ++++++++++++++++++++++++++++
 drivers/gpu/drm/radeon/evergreend.h  |  1 +
 drivers/gpu/drm/radeon/radeon_asic.c |  3 +++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 4 files changed, 34 insertions(+)

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index c09e40a..298b048 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1005,6 +1005,34 @@ static void evergreen_init_golden_registers(struct radeon_device *rdev)
 	}
 }
 
+/**
+ * evergreen_get_allowed_info_register - fetch the register for the info ioctl
+ *
+ * @rdev: radeon_device pointer
+ * @reg: register offset in bytes
+ * @val: register value
+ *
+ * Returns 0 for success or -EINVAL for an invalid register
+ *
+ */
+int evergreen_get_allowed_info_register(struct radeon_device *rdev,
+					u32 reg, u32 *val)
+{
+	switch (reg) {
+	case GRBM_STATUS:
+	case GRBM_STATUS_SE0:
+	case GRBM_STATUS_SE1:
+	case SRBM_STATUS:
+	case SRBM_STATUS2:
+	case DMA_STATUS_REG:
+	case UVD_STATUS:
+		*val = RREG32(reg);
+		return 0;
+	default:
+		return -EINVAL;
+	}
+}
+
 void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw,
 			     unsigned *bankh, unsigned *mtaspect,
 			     unsigned *tile_split)
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index b066d67..9d283d7 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -1515,6 +1515,7 @@
 #define UVD_UDEC_DBW_ADDR_CONFIG			0xef54
 #define UVD_RBC_RB_RPTR					0xf690
 #define UVD_RBC_RB_WPTR					0xf694
+#define UVD_STATUS					0xf6bc
 
 /*
  * PM4
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index f0101a4..48ae90d 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1328,6 +1328,7 @@ static struct radeon_asic evergreen_asic = {
 	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
 	.get_xclk = &rv770_get_xclk,
 	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
+	.get_allowed_info_register = evergreen_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &evergreen_pcie_gart_tlb_flush,
 		.set_page = &rs600_gart_set_page,
@@ -1422,6 +1423,7 @@ static struct radeon_asic sumo_asic = {
 	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
 	.get_xclk = &r600_get_xclk,
 	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
+	.get_allowed_info_register = evergreen_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &evergreen_pcie_gart_tlb_flush,
 		.set_page = &rs600_gart_set_page,
@@ -1515,6 +1517,7 @@ static struct radeon_asic btc_asic = {
 	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
 	.get_xclk = &rv770_get_xclk,
 	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
+	.get_allowed_info_register = evergreen_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &evergreen_pcie_gart_tlb_flush,
 		.set_page = &rs600_gart_set_page,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 5bf508f..6fdcdb3 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -552,6 +552,8 @@ struct radeon_fence *evergreen_copy_dma(struct radeon_device *rdev,
 void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable);
 void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode);
 int evergreen_get_temp(struct radeon_device *rdev);
+int evergreen_get_allowed_info_register(struct radeon_device *rdev,
+					u32 reg, u32 *val);
 int sumo_get_temp(struct radeon_device *rdev);
 int tn_get_temp(struct radeon_device *rdev);
 int cypress_dpm_init(struct radeon_device *rdev);
-- 
1.8.3.1

[PATCH 19/22] drm/radeon: add get_allowed_info_register for cayman/TN

[Alex Deucher]

Registers that can be fetched from the info ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/ni.c          | 29 +++++++++++++++++++++++++++++
 drivers/gpu/drm/radeon/nid.h         |  1 +
 drivers/gpu/drm/radeon/radeon_asic.c |  2 ++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 4 files changed, 34 insertions(+)

diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 3faee58..556f5f6 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -827,6 +827,35 @@ out:
 	return err;
 }
 
+/**
+ * cayman_get_allowed_info_register - fetch the register for the info ioctl
+ *
+ * @rdev: radeon_device pointer
+ * @reg: register offset in bytes
+ * @val: register value
+ *
+ * Returns 0 for success or -EINVAL for an invalid register
+ *
+ */
+int cayman_get_allowed_info_register(struct radeon_device *rdev,
+				     u32 reg, u32 *val)
+{
+	switch (reg) {
+	case GRBM_STATUS:
+	case GRBM_STATUS_SE0:
+	case GRBM_STATUS_SE1:
+	case SRBM_STATUS:
+	case SRBM_STATUS2:
+	case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET):
+	case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET):
+	case UVD_STATUS:
+		*val = RREG32(reg);
+		return 0;
+	default:
+		return -EINVAL;
+	}
+}
+
 int tn_get_temp(struct radeon_device *rdev)
 {
 	u32 temp = RREG32_SMC(TN_CURRENT_GNB_TEMP) & 0x7ff;
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h
index 2e12e4d..7797059 100644
--- a/drivers/gpu/drm/radeon/nid.h
+++ b/drivers/gpu/drm/radeon/nid.h
@@ -1082,6 +1082,7 @@
 #define UVD_UDEC_DBW_ADDR_CONFIG			0xEF54
 #define UVD_RBC_RB_RPTR					0xF690
 #define UVD_RBC_RB_WPTR					0xF694
+#define UVD_STATUS					0xf6bc
 
 /*
  * PM4
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 48ae90d..8a16c49 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1655,6 +1655,7 @@ static struct radeon_asic cayman_asic = {
 	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
 	.get_xclk = &rv770_get_xclk,
 	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
+	.get_allowed_info_register = cayman_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &cayman_pcie_gart_tlb_flush,
 		.set_page = &rs600_gart_set_page,
@@ -1760,6 +1761,7 @@ static struct radeon_asic trinity_asic = {
 	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
 	.get_xclk = &r600_get_xclk,
 	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
+	.get_allowed_info_register = cayman_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &cayman_pcie_gart_tlb_flush,
 		.set_page = &rs600_gart_set_page,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 6fdcdb3..91b2f6c 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -653,6 +653,8 @@ uint32_t cayman_dma_get_wptr(struct radeon_device *rdev,
 			     struct radeon_ring *ring);
 void cayman_dma_set_wptr(struct radeon_device *rdev,
 			 struct radeon_ring *ring);
+int cayman_get_allowed_info_register(struct radeon_device *rdev,
+				     u32 reg, u32 *val);
 
 int ni_dpm_init(struct radeon_device *rdev);
 void ni_dpm_setup_asic(struct radeon_device *rdev);
-- 
1.8.3.1

[PATCH 20/22] drm/radeon: add get_allowed_info_register for SI

[Alex Deucher]

Registers that can be fetched from the info ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/radeon_asic.c |  1 +
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 drivers/gpu/drm/radeon/si.c          | 30 ++++++++++++++++++++++++++++++
 drivers/gpu/drm/radeon/sid.h         |  1 +
 4 files changed, 34 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 8a16c49..f943cda 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1897,6 +1897,7 @@ static struct radeon_asic si_asic = {
 	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
 	.get_xclk = &si_get_xclk,
 	.get_gpu_clock_counter = &si_get_gpu_clock_counter,
+	.get_allowed_info_register = si_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &si_pcie_gart_tlb_flush,
 		.set_page = &rs600_gart_set_page,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 91b2f6c..6de6dc0 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -747,6 +747,8 @@ u32 si_get_xclk(struct radeon_device *rdev);
 uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev);
 int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
 int si_get_temp(struct radeon_device *rdev);
+int si_get_allowed_info_register(struct radeon_device *rdev,
+				 u32 reg, u32 *val);
 int si_dpm_init(struct radeon_device *rdev);
 void si_dpm_setup_asic(struct radeon_device *rdev);
 int si_dpm_enable(struct radeon_device *rdev);
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 423a8cd..a951e14 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -1263,6 +1263,36 @@ static void si_init_golden_registers(struct radeon_device *rdev)
 	}
 }
 
+/**
+ * si_get_allowed_info_register - fetch the register for the info ioctl
+ *
+ * @rdev: radeon_device pointer
+ * @reg: register offset in bytes
+ * @val: register value
+ *
+ * Returns 0 for success or -EINVAL for an invalid register
+ *
+ */
+int si_get_allowed_info_register(struct radeon_device *rdev,
+				 u32 reg, u32 *val)
+{
+	switch (reg) {
+	case GRBM_STATUS:
+	case GRBM_STATUS2:
+	case GRBM_STATUS_SE0:
+	case GRBM_STATUS_SE1:
+	case SRBM_STATUS:
+	case SRBM_STATUS2:
+	case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET):
+	case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET):
+	case UVD_STATUS:
+		*val = RREG32(reg);
+		return 0;
+	default:
+		return -EINVAL;
+	}
+}
+
 #define PCIE_BUS_CLK                10000
 #define TCLK                        (PCIE_BUS_CLK / 10)
 
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h
index 6635da9..581c30a 100644
--- a/drivers/gpu/drm/radeon/sid.h
+++ b/drivers/gpu/drm/radeon/sid.h
@@ -1504,6 +1504,7 @@
 #define UVD_UDEC_DBW_ADDR_CONFIG			0xEF54
 #define UVD_RBC_RB_RPTR					0xF690
 #define UVD_RBC_RB_WPTR					0xF694
+#define UVD_STATUS					0xf6bc
 
 #define	UVD_CGC_CTRL					0xF4B0
 #	define DCM					(1 << 0)
-- 
1.8.3.1

[PATCH 21/22] drm/radeon: add get_allowed_info_register for CIK

[Alex Deucher]

Registers that can be fetched from the info ioctl.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/cik.c         | 33 +++++++++++++++++++++++++++++++++
 drivers/gpu/drm/radeon/cikd.h        |  2 ++
 drivers/gpu/drm/radeon/radeon_asic.c |  2 ++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 4 files changed, 39 insertions(+)

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 05c2f43..f00c846 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -139,6 +139,39 @@ static void cik_fini_cg(struct radeon_device *rdev);
 static void cik_enable_gui_idle_interrupt(struct radeon_device *rdev,
 					  bool enable);
 
+/**
+ * cik_get_allowed_info_register - fetch the register for the info ioctl
+ *
+ * @rdev: radeon_device pointer
+ * @reg: register offset in bytes
+ * @val: register value
+ *
+ * Returns 0 for success or -EINVAL for an invalid register
+ *
+ */
+int cik_get_allowed_info_register(struct radeon_device *rdev,
+				  u32 reg, u32 *val)
+{
+	switch (reg) {
+	case GRBM_STATUS:
+	case GRBM_STATUS2:
+	case GRBM_STATUS_SE0:
+	case GRBM_STATUS_SE1:
+	case GRBM_STATUS_SE2:
+	case GRBM_STATUS_SE3:
+	case SRBM_STATUS:
+	case SRBM_STATUS2:
+	case (SDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET):
+	case (SDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET):
+	case UVD_STATUS:
+	/* TODO VCE */
+		*val = RREG32(reg);
+		return 0;
+	default:
+		return -EINVAL;
+	}
+}
+
 /* get temperature in millidegrees */
 int ci_get_temp(struct radeon_device *rdev)
 {
diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h
index 0c6e1b5..e5382ee 100644
--- a/drivers/gpu/drm/radeon/cikd.h
+++ b/drivers/gpu/drm/radeon/cikd.h
@@ -2013,6 +2013,8 @@
 #	define CLK_OD(x)				((x) << 6)
 #	define CLK_OD_MASK				(0x1f << 6)
 
+#define UVD_STATUS					0xf6bc
+
 /* UVD clocks */
 
 #define CG_DCLK_CNTL			0xC050009C
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index f943cda..27d2bcd 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -2061,6 +2061,7 @@ static struct radeon_asic ci_asic = {
 	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
 	.get_xclk = &cik_get_xclk,
 	.get_gpu_clock_counter = &cik_get_gpu_clock_counter,
+	.get_allowed_info_register = cik_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &cik_pcie_gart_tlb_flush,
 		.set_page = &rs600_gart_set_page,
@@ -2170,6 +2171,7 @@ static struct radeon_asic kv_asic = {
 	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
 	.get_xclk = &cik_get_xclk,
 	.get_gpu_clock_counter = &cik_get_gpu_clock_counter,
+	.get_allowed_info_register = cik_get_allowed_info_register,
 	.gart = {
 		.tlb_flush = &cik_pcie_gart_tlb_flush,
 		.set_page = &rs600_gart_set_page,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 6de6dc0..cfa9ec3 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -858,6 +858,8 @@ void cik_sdma_set_wptr(struct radeon_device *rdev,
 		       struct radeon_ring *ring);
 int ci_get_temp(struct radeon_device *rdev);
 int kv_get_temp(struct radeon_device *rdev);
+int cik_get_allowed_info_register(struct radeon_device *rdev,
+				  u32 reg, u32 *val);
 
 int ci_dpm_init(struct radeon_device *rdev);
 int ci_dpm_enable(struct radeon_device *rdev);
-- 
1.8.3.1

[PATCH 22/22] drm/radeon: add support for read reg query from radeon info ioctl

[Alex Deucher]

This allows us to query certain registers from userspace
for profiling and harvest configuration.  E.g., it can
be used by the GALLIUM_HUD for profiling the status of
various gfx blocks.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/radeon_kms.c | 8 ++++++++
 include/uapi/drm/radeon_drm.h       | 1 +
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index f15de68..86a0cb2 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -561,6 +561,14 @@ static int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file
 		else
 			*value = rdev->pm.current_mclk / 100;
 		break;
+	case RADEON_INFO_READ_REG:
+		if (copy_from_user(value, value_ptr, sizeof(uint32_t))) {
+			DRM_ERROR("copy_from_user %s:%u\n", __func__, __LINE__);
+			return -EFAULT;
+		}
+		if (radeon_get_allowed_info_register(rdev, *value, value))
+			return -EINVAL;
+		break;
 	default:
 		DRM_DEBUG_KMS("Invalid request %d\n", info->request);
 		return -EINVAL;
diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
index de7ee21..871e73f 100644
--- a/include/uapi/drm/radeon_drm.h
+++ b/include/uapi/drm/radeon_drm.h
@@ -1037,6 +1037,7 @@ struct drm_radeon_cs {
 #define RADEON_INFO_CURRENT_GPU_TEMP	0x21
 #define RADEON_INFO_CURRENT_GPU_SCLK	0x22
 #define RADEON_INFO_CURRENT_GPU_MCLK	0x23
+#define RADEON_INFO_READ_REG		0x24
 
 struct drm_radeon_info {
 	uint32_t		request;
-- 
1.8.3.1

Re: [PATCH 02/22] drm/radeon/dpm: add new callbacks to get the current sclk/mclk

[Christian König]

Might be a good idea to make that a bit more generic, e.g. add a 
get_current_clk callback and and a type (sclk, mclk, vclk, dclk, etc..) 
enum. But I can live with this approach as well.

Christian.

Am 01.10.2014 um 17:38 schrieb Alex Deucher:
> Needed to to expose the current clocks via the INFO ioctl.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>   drivers/gpu/drm/radeon/radeon.h | 4 ++++
>   1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index 510fe96..9e3dc82 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -1935,6 +1935,8 @@ struct radeon_asic {
>   		bool (*vblank_too_short)(struct radeon_device *rdev);
>   		void (*powergate_uvd)(struct radeon_device *rdev, bool gate);
>   		void (*enable_bapm)(struct radeon_device *rdev, bool enable);
> +		u32 (*get_current_sclk)(struct radeon_device *rdev);
> +		u32 (*get_current_mclk)(struct radeon_device *rdev);
>   	} dpm;
>   	/* pageflipping */
>   	struct {
> @@ -2893,6 +2895,8 @@ static inline void radeon_ring_write(struct radeon_ring *ring, uint32_t v)
>   #define radeon_dpm_vblank_too_short(rdev) rdev->asic->dpm.vblank_too_short((rdev))
>   #define radeon_dpm_powergate_uvd(rdev, g) rdev->asic->dpm.powergate_uvd((rdev), (g))
>   #define radeon_dpm_enable_bapm(rdev, e) rdev->asic->dpm.enable_bapm((rdev), (e))
> +#define radeon_dpm_get_current_sclk(rdev) rdev->asic->dpm.get_current_sclk((rdev))
> +#define radeon_dpm_get_current_mclk(rdev) rdev->asic->dpm.get_current_mclk((rdev))
>   
>   /* Common functions */
>   /* AGP */

Re: [PATCH 02/22] drm/radeon/dpm: add new callbacks to get the current sclk/mclk

[Alex Deucher]

On Thu, Oct 2, 2014 at 8:26 AM, Christian König <deathsimple@vodafone.de> wrote:
> Might be a good idea to make that a bit more generic, e.g. add a
> get_current_clk callback and and a type (sclk, mclk, vclk, dclk, etc..)
> enum. But I can live with this approach as well.
>

Yeah, I thought about that, but I'm not sure if there is a good way to
query that for certain clocks when dynamic clocking is enabled.  E.g.,
UVD on newer asics.

Alex

> Christian.
>
> Am 01.10.2014 um 17:38 schrieb Alex Deucher:
>
>> Needed to to expose the current clocks via the INFO ioctl.
>>
>> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
>> ---
>>   drivers/gpu/drm/radeon/radeon.h | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/radeon/radeon.h
>> b/drivers/gpu/drm/radeon/radeon.h
>> index 510fe96..9e3dc82 100644
>> --- a/drivers/gpu/drm/radeon/radeon.h
>> +++ b/drivers/gpu/drm/radeon/radeon.h
>> @@ -1935,6 +1935,8 @@ struct radeon_asic {
>>                 bool (*vblank_too_short)(struct radeon_device *rdev);
>>                 void (*powergate_uvd)(struct radeon_device *rdev, bool
>> gate);
>>                 void (*enable_bapm)(struct radeon_device *rdev, bool
>> enable);
>> +               u32 (*get_current_sclk)(struct radeon_device *rdev);
>> +               u32 (*get_current_mclk)(struct radeon_device *rdev);
>>         } dpm;
>>         /* pageflipping */
>>         struct {
>> @@ -2893,6 +2895,8 @@ static inline void radeon_ring_write(struct
>> radeon_ring *ring, uint32_t v)
>>   #define radeon_dpm_vblank_too_short(rdev)
>> rdev->asic->dpm.vblank_too_short((rdev))
>>   #define radeon_dpm_powergate_uvd(rdev, g)
>> rdev->asic->dpm.powergate_uvd((rdev), (g))
>>   #define radeon_dpm_enable_bapm(rdev, e)
>> rdev->asic->dpm.enable_bapm((rdev), (e))
>> +#define radeon_dpm_get_current_sclk(rdev)
>> rdev->asic->dpm.get_current_sclk((rdev))
>> +#define radeon_dpm_get_current_mclk(rdev)
>> rdev->asic->dpm.get_current_mclk((rdev))
>>     /* Common functions */
>>   /* AGP */
>
>
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Re: [PATCH 02/22] drm/radeon/dpm: add new callbacks to get the current sclk/mclk

[Christian König]

Am 02.10.2014 um 15:06 schrieb Alex Deucher:
> On Thu, Oct 2, 2014 at 8:26 AM, Christian König <deathsimple@vodafone.de> wrote:
>> Might be a good idea to make that a bit more generic, e.g. add a
>> get_current_clk callback and and a type (sclk, mclk, vclk, dclk, etc..)
>> enum. But I can live with this approach as well.
>>
> Yeah, I thought about that, but I'm not sure if there is a good way to
> query that for certain clocks when dynamic clocking is enabled.  E.g.,
> UVD on newer asics.

That's why I always favored using the PLL test registers. It can 
actually measure the clocks quite precisely if the reference clock 
(usually the PCI clock) is stable enough. And as far as I know can 
access any clock signal in the system, even the memory clock is 
measurable for each memory interface separately.

Christian.

>
> Alex
>
>> Christian.
>>
>> Am 01.10.2014 um 17:38 schrieb Alex Deucher:
>>
>>> Needed to to expose the current clocks via the INFO ioctl.
>>>
>>> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
>>> ---
>>>    drivers/gpu/drm/radeon/radeon.h | 4 ++++
>>>    1 file changed, 4 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/radeon/radeon.h
>>> b/drivers/gpu/drm/radeon/radeon.h
>>> index 510fe96..9e3dc82 100644
>>> --- a/drivers/gpu/drm/radeon/radeon.h
>>> +++ b/drivers/gpu/drm/radeon/radeon.h
>>> @@ -1935,6 +1935,8 @@ struct radeon_asic {
>>>                  bool (*vblank_too_short)(struct radeon_device *rdev);
>>>                  void (*powergate_uvd)(struct radeon_device *rdev, bool
>>> gate);
>>>                  void (*enable_bapm)(struct radeon_device *rdev, bool
>>> enable);
>>> +               u32 (*get_current_sclk)(struct radeon_device *rdev);
>>> +               u32 (*get_current_mclk)(struct radeon_device *rdev);
>>>          } dpm;
>>>          /* pageflipping */
>>>          struct {
>>> @@ -2893,6 +2895,8 @@ static inline void radeon_ring_write(struct
>>> radeon_ring *ring, uint32_t v)
>>>    #define radeon_dpm_vblank_too_short(rdev)
>>> rdev->asic->dpm.vblank_too_short((rdev))
>>>    #define radeon_dpm_powergate_uvd(rdev, g)
>>> rdev->asic->dpm.powergate_uvd((rdev), (g))
>>>    #define radeon_dpm_enable_bapm(rdev, e)
>>> rdev->asic->dpm.enable_bapm((rdev), (e))
>>> +#define radeon_dpm_get_current_sclk(rdev)
>>> rdev->asic->dpm.get_current_sclk((rdev))
>>> +#define radeon_dpm_get_current_mclk(rdev)
>>> rdev->asic->dpm.get_current_mclk((rdev))
>>>      /* Common functions */
>>>    /* AGP */
>>

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Re: [PATCH 00/22] new radeon info queries

[Siavash Eliasi]

Hello, are these patches merged yet? or are they on the queue for Linux 
kernel 3.19?

And how they (shader/memory clocks) should be queried?

Thanks!
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Re: [PATCH 00/22] new radeon info queries

[Alex Deucher]

On Sun, Dec 21, 2014 at 3:05 PM, Siavash Eliasi <siavashserver@gmail.com> wrote:
> Hello, are these patches merged yet? or are they on the queue for Linux
> kernel 3.19?
>
> And how they (shader/memory clocks) should be queried?

They are not merged yet.  There were some changes I wanted to make to
them before going upstream and I haven't had a chance to do it yet.

Alex
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Re: [PATCH 00/22] new radeon info queries

[Siavash Eliasi]

On 12/22/2014 08:31 PM, Alex Deucher wrote:
> On Sun, Dec 21, 2014 at 3:05 PM, Siavash Eliasi <siavashserver@gmail.com> wrote:
>> Hello, are these patches merged yet? or are they on the queue for Linux
>> kernel 3.19?
>>
>> And how they (shader/memory clocks) should be queried?
> They are not merged yet.  There were some changes I wanted to make to
> them before going upstream and I haven't had a chance to do it yet.
>
> Alex

Thank you very much for your great work on the drivers, and wish you 
guys have a happy new year :)
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Re: [PATCH 00/22] new radeon info queries

[Marek Olšák]

Tested-by: Marek Olšák <marek.olsak@amd.com>

Tested with: RV670, RV730, Redwood, Cayman, Cape Verde, Bonaire, Hawaii.

I have Mesa patches for the temperature, clocks, and GPU load. All
exposed via the Gallium HUD.

Marek

On Wed, Oct 1, 2014 at 5:38 PM, Alex Deucher <alexdeucher@gmail.com> wrote:
> This patch set implements a number of new
> radeon info ioctl queries to support additional
> profiling parameters for things like the GALLIUM
> HUD.  It could also be used by apps like radeontop
> to query the status registers, etc. without requiring
> root privileges or needing asis specific knowledge
> with respect to register BARs.
>
> Alex Deucher (22):
>   drm/radeon: add INFO query for GPU temperature
>   drm/radeon/dpm: add new callbacks to get the current sclk/mclk
>   drm/radeon/rs780: implement get_current_sclk/mclk
>   drm/radeon/rv6xx: implement get_current_sclk/mclk
>   drm/radeon/rv7xx/eg: implement get_current_sclk/mclk
>   drm/radeon/btc: implement get_current_sclk/mclk
>   drm/radeon: remove some rv7xx leftovers from btc dpm code
>   drm/radeon/ni: implement get_current_sclk/mclk
>   drm/radeon/si: implement get_current_sclk/mclk
>   drm/radeon/ci: implement get_current_sclk/mclk
>   drm/radeon/sumo: implement get_current_sclk/mclk
>   drm/radeon/tn: implement get_current_sclk/mclk
>   drm/radeon/kv: implement get_current_sclk/mclk
>   drm/radeon: add INFO query for current sclk/mclk
>   drm/radeon: add new callback for info ioctl register accessor
>   drm/radeon: add get_allowed_info_register function for r1xx-r5xx
>   drm/radeon: add get_allowed_info_register for r6xx/r7xx
>   drm/radeon: add get_allowed_info_register for EG/BTC
>   drm/radeon: add get_allowed_info_register for cayman/TN
>   drm/radeon: add get_allowed_info_register for SI
>   drm/radeon: add get_allowed_info_register for CIK
>   drm/radeon: add support for read reg query from radeon info ioctl
>
>  drivers/gpu/drm/radeon/btc_dpm.c     | 55 +++++++++++++++++++++++++++++++-----
>  drivers/gpu/drm/radeon/ci_dpm.c      | 14 +++++++++
>  drivers/gpu/drm/radeon/cik.c         | 33 ++++++++++++++++++++++
>  drivers/gpu/drm/radeon/cikd.h        |  2 ++
>  drivers/gpu/drm/radeon/evergreen.c   | 28 ++++++++++++++++++
>  drivers/gpu/drm/radeon/evergreend.h  |  1 +
>  drivers/gpu/drm/radeon/kv_dpm.c      | 23 +++++++++++++++
>  drivers/gpu/drm/radeon/ni.c          | 29 +++++++++++++++++++
>  drivers/gpu/drm/radeon/ni_dpm.c      | 36 +++++++++++++++++++++++
>  drivers/gpu/drm/radeon/nid.h         |  1 +
>  drivers/gpu/drm/radeon/r600.c        | 26 +++++++++++++++++
>  drivers/gpu/drm/radeon/radeon.h      |  7 +++++
>  drivers/gpu/drm/radeon/radeon_asic.c | 49 ++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/radeon/radeon_asic.h | 30 ++++++++++++++++++++
>  drivers/gpu/drm/radeon/radeon_kms.c  | 29 +++++++++++++++++++
>  drivers/gpu/drm/radeon/rs780_dpm.c   | 22 +++++++++++++++
>  drivers/gpu/drm/radeon/rv6xx_dpm.c   | 46 ++++++++++++++++++++++++++++++
>  drivers/gpu/drm/radeon/rv770_dpm.c   | 44 +++++++++++++++++++++++++++++
>  drivers/gpu/drm/radeon/si.c          | 30 ++++++++++++++++++++
>  drivers/gpu/drm/radeon/si_dpm.c      | 36 +++++++++++++++++++++++
>  drivers/gpu/drm/radeon/sid.h         |  1 +
>  drivers/gpu/drm/radeon/sumo_dpm.c    | 28 ++++++++++++++++++
>  drivers/gpu/drm/radeon/trinity_dpm.c | 25 ++++++++++++++++
>  include/uapi/drm/radeon_drm.h        |  4 +++
>  24 files changed, 592 insertions(+), 7 deletions(-)
>
> --
> 1.8.3.1
>
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> dri-devel@lists.freedesktop.org
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Re: [PATCH 00/22] new radeon info queries

[Alex Deucher]

On Tue, Feb 24, 2015 at 5:09 PM, Marek Olšák <maraeo@gmail.com> wrote:
> Tested-by: Marek Olšák <marek.olsak@amd.com>
>
> Tested with: RV670, RV730, Redwood, Cayman, Cape Verde, Bonaire, Hawaii.
>
> I have Mesa patches for the temperature, clocks, and GPU load. All
> exposed via the Gallium HUD.

Thanks!  Pushed to my 4.1 branch.

Alex

>
> Marek
>
> On Wed, Oct 1, 2014 at 5:38 PM, Alex Deucher <alexdeucher@gmail.com> wrote:
>> This patch set implements a number of new
>> radeon info ioctl queries to support additional
>> profiling parameters for things like the GALLIUM
>> HUD.  It could also be used by apps like radeontop
>> to query the status registers, etc. without requiring
>> root privileges or needing asis specific knowledge
>> with respect to register BARs.
>>
>> Alex Deucher (22):
>>   drm/radeon: add INFO query for GPU temperature
>>   drm/radeon/dpm: add new callbacks to get the current sclk/mclk
>>   drm/radeon/rs780: implement get_current_sclk/mclk
>>   drm/radeon/rv6xx: implement get_current_sclk/mclk
>>   drm/radeon/rv7xx/eg: implement get_current_sclk/mclk
>>   drm/radeon/btc: implement get_current_sclk/mclk
>>   drm/radeon: remove some rv7xx leftovers from btc dpm code
>>   drm/radeon/ni: implement get_current_sclk/mclk
>>   drm/radeon/si: implement get_current_sclk/mclk
>>   drm/radeon/ci: implement get_current_sclk/mclk
>>   drm/radeon/sumo: implement get_current_sclk/mclk
>>   drm/radeon/tn: implement get_current_sclk/mclk
>>   drm/radeon/kv: implement get_current_sclk/mclk
>>   drm/radeon: add INFO query for current sclk/mclk
>>   drm/radeon: add new callback for info ioctl register accessor
>>   drm/radeon: add get_allowed_info_register function for r1xx-r5xx
>>   drm/radeon: add get_allowed_info_register for r6xx/r7xx
>>   drm/radeon: add get_allowed_info_register for EG/BTC
>>   drm/radeon: add get_allowed_info_register for cayman/TN
>>   drm/radeon: add get_allowed_info_register for SI
>>   drm/radeon: add get_allowed_info_register for CIK
>>   drm/radeon: add support for read reg query from radeon info ioctl
>>
>>  drivers/gpu/drm/radeon/btc_dpm.c     | 55 +++++++++++++++++++++++++++++++-----
>>  drivers/gpu/drm/radeon/ci_dpm.c      | 14 +++++++++
>>  drivers/gpu/drm/radeon/cik.c         | 33 ++++++++++++++++++++++
>>  drivers/gpu/drm/radeon/cikd.h        |  2 ++
>>  drivers/gpu/drm/radeon/evergreen.c   | 28 ++++++++++++++++++
>>  drivers/gpu/drm/radeon/evergreend.h  |  1 +
>>  drivers/gpu/drm/radeon/kv_dpm.c      | 23 +++++++++++++++
>>  drivers/gpu/drm/radeon/ni.c          | 29 +++++++++++++++++++
>>  drivers/gpu/drm/radeon/ni_dpm.c      | 36 +++++++++++++++++++++++
>>  drivers/gpu/drm/radeon/nid.h         |  1 +
>>  drivers/gpu/drm/radeon/r600.c        | 26 +++++++++++++++++
>>  drivers/gpu/drm/radeon/radeon.h      |  7 +++++
>>  drivers/gpu/drm/radeon/radeon_asic.c | 49 ++++++++++++++++++++++++++++++++
>>  drivers/gpu/drm/radeon/radeon_asic.h | 30 ++++++++++++++++++++
>>  drivers/gpu/drm/radeon/radeon_kms.c  | 29 +++++++++++++++++++
>>  drivers/gpu/drm/radeon/rs780_dpm.c   | 22 +++++++++++++++
>>  drivers/gpu/drm/radeon/rv6xx_dpm.c   | 46 ++++++++++++++++++++++++++++++
>>  drivers/gpu/drm/radeon/rv770_dpm.c   | 44 +++++++++++++++++++++++++++++
>>  drivers/gpu/drm/radeon/si.c          | 30 ++++++++++++++++++++
>>  drivers/gpu/drm/radeon/si_dpm.c      | 36 +++++++++++++++++++++++
>>  drivers/gpu/drm/radeon/sid.h         |  1 +
>>  drivers/gpu/drm/radeon/sumo_dpm.c    | 28 ++++++++++++++++++
>>  drivers/gpu/drm/radeon/trinity_dpm.c | 25 ++++++++++++++++
>>  include/uapi/drm/radeon_drm.h        |  4 +++
>>  24 files changed, 592 insertions(+), 7 deletions(-)
>>
>> --
>> 1.8.3.1
>>
>> _______________________________________________
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>> dri-devel@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/dri-devel
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Re: [PATCH 00/22] new radeon info queries

[Christian König]

Am 02.10.2014 um 06:50 schrieb Alex Deucher:
> On Wed, Oct 1, 2014 at 12:30 PM, Alexandre Demers
> <alexandre.f.demers@gmail.com> wrote:
>> May I suggest something more to add if available? It would be great to
>> have the core and memory voltages. As an example of a specific
>> application where it would have been usefull: it would have been
>> easier to debug the problem with Cayman when vddci was not correctly
>> set (it would have been higher or lower than expected or the value
>> would have been nonsense).
> It wouldn't have helped for that problem since there's no way to query
> the actual vddc or vddci or even the clocks.  All you can query is
> which performance level is active, the driver has to determine the
> clocks and voltages based on that.  It's basically the same info that
> is already exposed via debugfs.

I hoped we could expose the PLL test registers as well, this way 
somebody could actually measure at least the clocks instead of just 
calculating them from the PM profile in use.

Christian.

>
> Alex
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Re: [PATCH 00/22] new radeon info queries

[Alex Deucher]

On Wed, Oct 1, 2014 at 12:30 PM, Alexandre Demers
<alexandre.f.demers@gmail.com> wrote:
> May I suggest something more to add if available? It would be great to
> have the core and memory voltages. As an example of a specific
> application where it would have been usefull: it would have been
> easier to debug the problem with Cayman when vddci was not correctly
> set (it would have been higher or lower than expected or the value
> would have been nonsense).

It wouldn't have helped for that problem since there's no way to query
the actual vddc or vddci or even the clocks.  All you can query is
which performance level is active, the driver has to determine the
clocks and voltages based on that.  It's basically the same info that
is already exposed via debugfs.

Alex

Re: [PATCH 00/22] new radeon info queries

[Alexandre Demers]

May I suggest something more to add if available? It would be great to
have the core and memory voltages. As an example of a specific
application where it would have been usefull: it would have been
easier to debug the problem with Cayman when vddci was not correctly
set (it would have been higher or lower than expected or the value
would have been nonsense).

Thanks,
Alexandre Demers